1b8e80941Smrg/*
2b8e80941Smrg * Copyright (c) 2015 Intel Corporation
3b8e80941Smrg *
4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
6b8e80941Smrg * to deal in the Software without restriction, including without limitation
7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
9b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
10b8e80941Smrg *
11b8e80941Smrg * The above copyright notice and this permission notice (including the next
12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the
13b8e80941Smrg * Software.
14b8e80941Smrg *
15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21b8e80941Smrg * IN THE SOFTWARE.
22b8e80941Smrg */
23b8e80941Smrg
24b8e80941Smrg#ifndef GEN_L3_CONFIG_H
25b8e80941Smrg#define GEN_L3_CONFIG_H
26b8e80941Smrg
27b8e80941Smrg#include <stdio.h>
28b8e80941Smrg
29b8e80941Smrg#include "dev/gen_device_info.h"
30b8e80941Smrg
31b8e80941Smrg/**
32b8e80941Smrg * Chunk of L3 cache reserved for some specific purpose.
33b8e80941Smrg */
34b8e80941Smrgenum gen_l3_partition {
35b8e80941Smrg   /** Shared local memory. */
36b8e80941Smrg   GEN_L3P_SLM = 0,
37b8e80941Smrg   /** Unified return buffer. */
38b8e80941Smrg   GEN_L3P_URB,
39b8e80941Smrg   /** Union of DC and RO. */
40b8e80941Smrg   GEN_L3P_ALL,
41b8e80941Smrg   /** Data cluster RW partition. */
42b8e80941Smrg   GEN_L3P_DC,
43b8e80941Smrg   /** Union of IS, C and T. */
44b8e80941Smrg   GEN_L3P_RO,
45b8e80941Smrg   /** Instruction and state cache. */
46b8e80941Smrg   GEN_L3P_IS,
47b8e80941Smrg   /** Constant cache. */
48b8e80941Smrg   GEN_L3P_C,
49b8e80941Smrg   /** Texture cache. */
50b8e80941Smrg   GEN_L3P_T,
51b8e80941Smrg   /** Number of supported L3 partitions. */
52b8e80941Smrg   GEN_NUM_L3P
53b8e80941Smrg};
54b8e80941Smrg
55b8e80941Smrg/**
56b8e80941Smrg * L3 configuration represented as the number of ways allocated for each
57b8e80941Smrg * partition.  \sa get_l3_way_size().
58b8e80941Smrg */
59b8e80941Smrgstruct gen_l3_config {
60b8e80941Smrg   unsigned n[GEN_NUM_L3P];
61b8e80941Smrg};
62b8e80941Smrg
63b8e80941Smrg/**
64b8e80941Smrg * L3 configuration represented as a vector of weights giving the desired
65b8e80941Smrg * relative size of each partition.  The scale is arbitrary, only the ratios
66b8e80941Smrg * between weights will have an influence on the selection of the closest L3
67b8e80941Smrg * configuration.
68b8e80941Smrg */
69b8e80941Smrgstruct gen_l3_weights {
70b8e80941Smrg   float w[GEN_NUM_L3P];
71b8e80941Smrg};
72b8e80941Smrg
73b8e80941Smrgfloat gen_diff_l3_weights(struct gen_l3_weights w0, struct gen_l3_weights w1);
74b8e80941Smrg
75b8e80941Smrgstruct gen_l3_weights
76b8e80941Smrggen_get_default_l3_weights(const struct gen_device_info *devinfo,
77b8e80941Smrg                           bool needs_dc, bool needs_slm);
78b8e80941Smrg
79b8e80941Smrgstruct gen_l3_weights
80b8e80941Smrggen_get_l3_config_weights(const struct gen_l3_config *cfg);
81b8e80941Smrg
82b8e80941Smrgconst struct gen_l3_config *
83b8e80941Smrggen_get_default_l3_config(const struct gen_device_info *devinfo);
84b8e80941Smrg
85b8e80941Smrgconst struct gen_l3_config *
86b8e80941Smrggen_get_l3_config(const struct gen_device_info *devinfo,
87b8e80941Smrg                  struct gen_l3_weights w0);
88b8e80941Smrg
89b8e80941Smrgunsigned
90b8e80941Smrggen_get_l3_config_urb_size(const struct gen_device_info *devinfo,
91b8e80941Smrg                           const struct gen_l3_config *cfg);
92b8e80941Smrg
93b8e80941Smrgvoid gen_dump_l3_config(const struct gen_l3_config *cfg, FILE *fp);
94b8e80941Smrg
95b8e80941Smrgvoid gen_get_urb_config(const struct gen_device_info *devinfo,
96b8e80941Smrg                        unsigned push_constant_bytes, unsigned urb_size_bytes,
97b8e80941Smrg                        bool tess_present, bool gs_present,
98b8e80941Smrg                        const unsigned entry_size[4],
99b8e80941Smrg                        unsigned entries[4], unsigned start[4]);
100b8e80941Smrg
101b8e80941Smrg#endif /* GEN_L3_CONFIG_H */
102