1b8e80941Smrg/*
2b8e80941Smrg Copyright (C) Intel Corp.  2006.  All Rights Reserved.
3b8e80941Smrg Intel funded Tungsten Graphics to
4b8e80941Smrg develop this 3D driver.
5b8e80941Smrg
6b8e80941Smrg Permission is hereby granted, free of charge, to any person obtaining
7b8e80941Smrg a copy of this software and associated documentation files (the
8b8e80941Smrg "Software"), to deal in the Software without restriction, including
9b8e80941Smrg without limitation the rights to use, copy, modify, merge, publish,
10b8e80941Smrg distribute, sublicense, and/or sell copies of the Software, and to
11b8e80941Smrg permit persons to whom the Software is furnished to do so, subject to
12b8e80941Smrg the following conditions:
13b8e80941Smrg
14b8e80941Smrg The above copyright notice and this permission notice (including the
15b8e80941Smrg next paragraph) shall be included in all copies or substantial
16b8e80941Smrg portions of the Software.
17b8e80941Smrg
18b8e80941Smrg THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19b8e80941Smrg EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20b8e80941Smrg MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21b8e80941Smrg IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22b8e80941Smrg LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23b8e80941Smrg OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24b8e80941Smrg WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25b8e80941Smrg
26b8e80941Smrg **********************************************************************/
27b8e80941Smrg /*
28b8e80941Smrg  * Authors:
29b8e80941Smrg  *   Keith Whitwell <keithw@vmware.com>
30b8e80941Smrg  */
31b8e80941Smrg
32b8e80941Smrg#ifndef BRW_CLIP_H
33b8e80941Smrg#define BRW_CLIP_H
34b8e80941Smrg
35b8e80941Smrg#include "brw_compiler.h"
36b8e80941Smrg#include "brw_eu.h"
37b8e80941Smrg
38b8e80941Smrg/* Initial 3 verts, plus at most 6 additional verts from intersections
39b8e80941Smrg * with fixed planes, plus at most 8 additional verts from intersections
40b8e80941Smrg * with user clip planes
41b8e80941Smrg */
42b8e80941Smrg#define MAX_VERTS (3+6+8)
43b8e80941Smrg
44b8e80941Smrg#define PRIM_MASK  (0x1f)
45b8e80941Smrg
46b8e80941Smrgstruct brw_clip_compile {
47b8e80941Smrg   struct brw_codegen func;
48b8e80941Smrg   struct brw_clip_prog_key key;
49b8e80941Smrg   struct brw_clip_prog_data prog_data;
50b8e80941Smrg
51b8e80941Smrg   struct {
52b8e80941Smrg      struct brw_reg R0;
53b8e80941Smrg      struct brw_reg vertex[MAX_VERTS];
54b8e80941Smrg
55b8e80941Smrg      struct brw_reg t;
56b8e80941Smrg      struct brw_reg t0, t1;
57b8e80941Smrg      struct brw_reg dp0, dp1;
58b8e80941Smrg
59b8e80941Smrg      struct brw_reg dpPrev;
60b8e80941Smrg      struct brw_reg dp;
61b8e80941Smrg      struct brw_reg loopcount;
62b8e80941Smrg      struct brw_reg nr_verts;
63b8e80941Smrg      struct brw_reg planemask;
64b8e80941Smrg
65b8e80941Smrg      struct brw_reg inlist;
66b8e80941Smrg      struct brw_reg outlist;
67b8e80941Smrg      struct brw_reg freelist;
68b8e80941Smrg
69b8e80941Smrg      struct brw_reg dir;
70b8e80941Smrg      struct brw_reg tmp0, tmp1;
71b8e80941Smrg      struct brw_reg offset;
72b8e80941Smrg
73b8e80941Smrg      struct brw_reg fixed_planes;
74b8e80941Smrg      struct brw_reg plane_equation;
75b8e80941Smrg
76b8e80941Smrg      struct brw_reg ff_sync;
77b8e80941Smrg
78b8e80941Smrg      /* Bitmask indicating which coordinate attribute should be used for
79b8e80941Smrg       * comparison to each clipping plane. A 0 indicates that VARYING_SLOT_POS
80b8e80941Smrg       * should be used, because it's one of the fixed +/- x/y/z planes that
81b8e80941Smrg       * constitute the bounds of the view volume. A 1 indicates that
82b8e80941Smrg       * VARYING_SLOT_CLIP_VERTEX should be used (if available) since it's a user-
83b8e80941Smrg       * defined clipping plane.
84b8e80941Smrg       */
85b8e80941Smrg      struct brw_reg vertex_src_mask;
86b8e80941Smrg
87b8e80941Smrg      /* Offset into the vertex of the current plane's clipdistance value */
88b8e80941Smrg      struct brw_reg clipdistance_offset;
89b8e80941Smrg   } reg;
90b8e80941Smrg
91b8e80941Smrg   /* Number of registers storing VUE data */
92b8e80941Smrg   GLuint nr_regs;
93b8e80941Smrg
94b8e80941Smrg   GLuint first_tmp;
95b8e80941Smrg   GLuint last_tmp;
96b8e80941Smrg
97b8e80941Smrg   bool need_direction;
98b8e80941Smrg
99b8e80941Smrg   struct brw_vue_map vue_map;
100b8e80941Smrg};
101b8e80941Smrg
102b8e80941Smrg/**
103b8e80941Smrg * True if the given varying is one of the outputs of the vertex shader.
104b8e80941Smrg */
105b8e80941Smrgstatic inline bool brw_clip_have_varying(struct brw_clip_compile *c,
106b8e80941Smrg                                         GLuint varying)
107b8e80941Smrg{
108b8e80941Smrg   return (c->key.attrs & BITFIELD64_BIT(varying)) ? 1 : 0;
109b8e80941Smrg}
110b8e80941Smrg
111b8e80941Smrg/* Points are only culled, so no need for a clip routine, however it
112b8e80941Smrg * works out easier to have a dummy one.
113b8e80941Smrg */
114b8e80941Smrgvoid brw_emit_unfilled_clip( struct brw_clip_compile *c );
115b8e80941Smrgvoid brw_emit_tri_clip( struct brw_clip_compile *c );
116b8e80941Smrgvoid brw_emit_line_clip( struct brw_clip_compile *c );
117b8e80941Smrgvoid brw_emit_point_clip( struct brw_clip_compile *c );
118b8e80941Smrg
119b8e80941Smrg/* brw_clip_tri.c, for use by the unfilled clip routine:
120b8e80941Smrg */
121b8e80941Smrgvoid brw_clip_tri_init_vertices( struct brw_clip_compile *c );
122b8e80941Smrgvoid brw_clip_tri_flat_shade( struct brw_clip_compile *c );
123b8e80941Smrgvoid brw_clip_tri( struct brw_clip_compile *c );
124b8e80941Smrgvoid brw_clip_tri_emit_polygon( struct brw_clip_compile *c );
125b8e80941Smrgvoid brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
126b8e80941Smrg			      GLuint nr_verts );
127b8e80941Smrg
128b8e80941Smrg
129b8e80941Smrg/* Utils:
130b8e80941Smrg */
131b8e80941Smrg
132b8e80941Smrgvoid brw_clip_interp_vertex( struct brw_clip_compile *c,
133b8e80941Smrg			     struct brw_indirect dest_ptr,
134b8e80941Smrg			     struct brw_indirect v0_ptr, /* from */
135b8e80941Smrg			     struct brw_indirect v1_ptr, /* to */
136b8e80941Smrg			     struct brw_reg t0,
137b8e80941Smrg			     bool force_edgeflag );
138b8e80941Smrg
139b8e80941Smrgvoid brw_clip_init_planes( struct brw_clip_compile *c );
140b8e80941Smrg
141b8e80941Smrgvoid brw_clip_emit_vue(struct brw_clip_compile *c,
142b8e80941Smrg		       struct brw_indirect vert,
143b8e80941Smrg                       enum brw_urb_write_flags flags,
144b8e80941Smrg		       GLuint header);
145b8e80941Smrg
146b8e80941Smrgvoid brw_clip_kill_thread(struct brw_clip_compile *c);
147b8e80941Smrg
148b8e80941Smrgstruct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c );
149b8e80941Smrgstruct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c );
150b8e80941Smrg
151b8e80941Smrgvoid brw_clip_copy_flatshaded_attributes( struct brw_clip_compile *c,
152b8e80941Smrg                                          GLuint to, GLuint from );
153b8e80941Smrg
154b8e80941Smrgvoid brw_clip_init_clipmask( struct brw_clip_compile *c );
155b8e80941Smrg
156b8e80941Smrgstruct brw_reg get_tmp( struct brw_clip_compile *c );
157b8e80941Smrg
158b8e80941Smrgvoid brw_clip_project_position(struct brw_clip_compile *c,
159b8e80941Smrg             struct brw_reg pos );
160b8e80941Smrgvoid brw_clip_ff_sync(struct brw_clip_compile *c);
161b8e80941Smrgvoid brw_clip_init_ff_sync(struct brw_clip_compile *c);
162b8e80941Smrg
163b8e80941Smrg#endif
164