1b8e80941Smrg/* 2b8e80941Smrg * Copyright (C) 2016 Intel Corporation 3b8e80941Smrg * 4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5b8e80941Smrg * copy of this software and associated documentation files (the "Software"), 6b8e80941Smrg * to deal in the Software without restriction, including without limitation 7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the 9b8e80941Smrg * Software is furnished to do so, subject to the following conditions: 10b8e80941Smrg * 11b8e80941Smrg * The above copyright notice and this permission notice (including the next 12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the 13b8e80941Smrg * Software. 14b8e80941Smrg * 15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21b8e80941Smrg * IN THE SOFTWARE. 22b8e80941Smrg */ 23b8e80941Smrg 24b8e80941Smrg 25b8e80941Smrg/* Instructions, enums and structures for CNL. 26b8e80941Smrg * 27b8e80941Smrg * This file has been generated, do not hand edit. 28b8e80941Smrg */ 29b8e80941Smrg 30b8e80941Smrg#ifndef GEN10_PACK_H 31b8e80941Smrg#define GEN10_PACK_H 32b8e80941Smrg 33b8e80941Smrg#include <stdio.h> 34b8e80941Smrg#include <stdint.h> 35b8e80941Smrg#include <stdbool.h> 36b8e80941Smrg#include <assert.h> 37b8e80941Smrg#include <math.h> 38b8e80941Smrg 39b8e80941Smrg#ifndef __gen_validate_value 40b8e80941Smrg#define __gen_validate_value(x) 41b8e80941Smrg#endif 42b8e80941Smrg 43b8e80941Smrg#ifndef __gen_field_functions 44b8e80941Smrg#define __gen_field_functions 45b8e80941Smrg 46b8e80941Smrg#ifdef NDEBUG 47b8e80941Smrg#define NDEBUG_UNUSED __attribute__((unused)) 48b8e80941Smrg#else 49b8e80941Smrg#define NDEBUG_UNUSED 50b8e80941Smrg#endif 51b8e80941Smrg 52b8e80941Smrgunion __gen_value { 53b8e80941Smrg float f; 54b8e80941Smrg uint32_t dw; 55b8e80941Smrg}; 56b8e80941Smrg 57b8e80941Smrgstatic inline uint64_t 58b8e80941Smrg__gen_mbo(uint32_t start, uint32_t end) 59b8e80941Smrg{ 60b8e80941Smrg return (~0ull >> (64 - (end - start + 1))) << start; 61b8e80941Smrg} 62b8e80941Smrg 63b8e80941Smrgstatic inline uint64_t 64b8e80941Smrg__gen_uint(uint64_t v, uint32_t start, NDEBUG_UNUSED uint32_t end) 65b8e80941Smrg{ 66b8e80941Smrg __gen_validate_value(v); 67b8e80941Smrg 68b8e80941Smrg#ifndef NDEBUG 69b8e80941Smrg const int width = end - start + 1; 70b8e80941Smrg if (width < 64) { 71b8e80941Smrg const uint64_t max = (1ull << width) - 1; 72b8e80941Smrg assert(v <= max); 73b8e80941Smrg } 74b8e80941Smrg#endif 75b8e80941Smrg 76b8e80941Smrg return v << start; 77b8e80941Smrg} 78b8e80941Smrg 79b8e80941Smrgstatic inline uint64_t 80b8e80941Smrg__gen_sint(int64_t v, uint32_t start, uint32_t end) 81b8e80941Smrg{ 82b8e80941Smrg const int width = end - start + 1; 83b8e80941Smrg 84b8e80941Smrg __gen_validate_value(v); 85b8e80941Smrg 86b8e80941Smrg#ifndef NDEBUG 87b8e80941Smrg if (width < 64) { 88b8e80941Smrg const int64_t max = (1ll << (width - 1)) - 1; 89b8e80941Smrg const int64_t min = -(1ll << (width - 1)); 90b8e80941Smrg assert(min <= v && v <= max); 91b8e80941Smrg } 92b8e80941Smrg#endif 93b8e80941Smrg 94b8e80941Smrg const uint64_t mask = ~0ull >> (64 - width); 95b8e80941Smrg 96b8e80941Smrg return (v & mask) << start; 97b8e80941Smrg} 98b8e80941Smrg 99b8e80941Smrgstatic inline uint64_t 100b8e80941Smrg__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end) 101b8e80941Smrg{ 102b8e80941Smrg __gen_validate_value(v); 103b8e80941Smrg#ifndef NDEBUG 104b8e80941Smrg uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; 105b8e80941Smrg 106b8e80941Smrg assert((v & ~mask) == 0); 107b8e80941Smrg#endif 108b8e80941Smrg 109b8e80941Smrg return v; 110b8e80941Smrg} 111b8e80941Smrg 112b8e80941Smrgstatic inline uint32_t 113b8e80941Smrg__gen_float(float v) 114b8e80941Smrg{ 115b8e80941Smrg __gen_validate_value(v); 116b8e80941Smrg return ((union __gen_value) { .f = (v) }).dw; 117b8e80941Smrg} 118b8e80941Smrg 119b8e80941Smrgstatic inline uint64_t 120b8e80941Smrg__gen_sfixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) 121b8e80941Smrg{ 122b8e80941Smrg __gen_validate_value(v); 123b8e80941Smrg 124b8e80941Smrg const float factor = (1 << fract_bits); 125b8e80941Smrg 126b8e80941Smrg#ifndef NDEBUG 127b8e80941Smrg const float max = ((1 << (end - start)) - 1) / factor; 128b8e80941Smrg const float min = -(1 << (end - start)) / factor; 129b8e80941Smrg assert(min <= v && v <= max); 130b8e80941Smrg#endif 131b8e80941Smrg 132b8e80941Smrg const int64_t int_val = llroundf(v * factor); 133b8e80941Smrg const uint64_t mask = ~0ull >> (64 - (end - start + 1)); 134b8e80941Smrg 135b8e80941Smrg return (int_val & mask) << start; 136b8e80941Smrg} 137b8e80941Smrg 138b8e80941Smrgstatic inline uint64_t 139b8e80941Smrg__gen_ufixed(float v, uint32_t start, NDEBUG_UNUSED uint32_t end, uint32_t fract_bits) 140b8e80941Smrg{ 141b8e80941Smrg __gen_validate_value(v); 142b8e80941Smrg 143b8e80941Smrg const float factor = (1 << fract_bits); 144b8e80941Smrg 145b8e80941Smrg#ifndef NDEBUG 146b8e80941Smrg const float max = ((1 << (end - start + 1)) - 1) / factor; 147b8e80941Smrg const float min = 0.0f; 148b8e80941Smrg assert(min <= v && v <= max); 149b8e80941Smrg#endif 150b8e80941Smrg 151b8e80941Smrg const uint64_t uint_val = llroundf(v * factor); 152b8e80941Smrg 153b8e80941Smrg return uint_val << start; 154b8e80941Smrg} 155b8e80941Smrg 156b8e80941Smrg#ifndef __gen_address_type 157b8e80941Smrg#error #define __gen_address_type before including this file 158b8e80941Smrg#endif 159b8e80941Smrg 160b8e80941Smrg#ifndef __gen_user_data 161b8e80941Smrg#error #define __gen_combine_address before including this file 162b8e80941Smrg#endif 163b8e80941Smrg 164b8e80941Smrg#undef NDEBUG_UNUSED 165b8e80941Smrg 166b8e80941Smrg#endif 167b8e80941Smrg 168b8e80941Smrg 169b8e80941Smrgenum GEN10_3D_Color_Buffer_Blend_Factor { 170b8e80941Smrg BLENDFACTOR_ONE = 1, 171b8e80941Smrg BLENDFACTOR_SRC_COLOR = 2, 172b8e80941Smrg BLENDFACTOR_SRC_ALPHA = 3, 173b8e80941Smrg BLENDFACTOR_DST_ALPHA = 4, 174b8e80941Smrg BLENDFACTOR_DST_COLOR = 5, 175b8e80941Smrg BLENDFACTOR_SRC_ALPHA_SATURATE = 6, 176b8e80941Smrg BLENDFACTOR_CONST_COLOR = 7, 177b8e80941Smrg BLENDFACTOR_CONST_ALPHA = 8, 178b8e80941Smrg BLENDFACTOR_SRC1_COLOR = 9, 179b8e80941Smrg BLENDFACTOR_SRC1_ALPHA = 10, 180b8e80941Smrg BLENDFACTOR_ZERO = 17, 181b8e80941Smrg BLENDFACTOR_INV_SRC_COLOR = 18, 182b8e80941Smrg BLENDFACTOR_INV_SRC_ALPHA = 19, 183b8e80941Smrg BLENDFACTOR_INV_DST_ALPHA = 20, 184b8e80941Smrg BLENDFACTOR_INV_DST_COLOR = 21, 185b8e80941Smrg BLENDFACTOR_INV_CONST_COLOR = 23, 186b8e80941Smrg BLENDFACTOR_INV_CONST_ALPHA = 24, 187b8e80941Smrg BLENDFACTOR_INV_SRC1_COLOR = 25, 188b8e80941Smrg BLENDFACTOR_INV_SRC1_ALPHA = 26, 189b8e80941Smrg}; 190b8e80941Smrg 191b8e80941Smrgenum GEN10_3D_Color_Buffer_Blend_Function { 192b8e80941Smrg BLENDFUNCTION_ADD = 0, 193b8e80941Smrg BLENDFUNCTION_SUBTRACT = 1, 194b8e80941Smrg BLENDFUNCTION_REVERSE_SUBTRACT = 2, 195b8e80941Smrg BLENDFUNCTION_MIN = 3, 196b8e80941Smrg BLENDFUNCTION_MAX = 4, 197b8e80941Smrg}; 198b8e80941Smrg 199b8e80941Smrgenum GEN10_3D_Compare_Function { 200b8e80941Smrg COMPAREFUNCTION_ALWAYS = 0, 201b8e80941Smrg COMPAREFUNCTION_NEVER = 1, 202b8e80941Smrg COMPAREFUNCTION_LESS = 2, 203b8e80941Smrg COMPAREFUNCTION_EQUAL = 3, 204b8e80941Smrg COMPAREFUNCTION_LEQUAL = 4, 205b8e80941Smrg COMPAREFUNCTION_GREATER = 5, 206b8e80941Smrg COMPAREFUNCTION_NOTEQUAL = 6, 207b8e80941Smrg COMPAREFUNCTION_GEQUAL = 7, 208b8e80941Smrg}; 209b8e80941Smrg 210b8e80941Smrgenum GEN10_3D_Logic_Op_Function { 211b8e80941Smrg LOGICOP_CLEAR = 0, 212b8e80941Smrg LOGICOP_NOR = 1, 213b8e80941Smrg LOGICOP_AND_INVERTED = 2, 214b8e80941Smrg LOGICOP_COPY_INVERTED = 3, 215b8e80941Smrg LOGICOP_AND_REVERSE = 4, 216b8e80941Smrg LOGICOP_INVERT = 5, 217b8e80941Smrg LOGICOP_XOR = 6, 218b8e80941Smrg LOGICOP_NAND = 7, 219b8e80941Smrg LOGICOP_AND = 8, 220b8e80941Smrg LOGICOP_EQUIV = 9, 221b8e80941Smrg LOGICOP_NOOP = 10, 222b8e80941Smrg LOGICOP_OR_INVERTED = 11, 223b8e80941Smrg LOGICOP_COPY = 12, 224b8e80941Smrg LOGICOP_OR_REVERSE = 13, 225b8e80941Smrg LOGICOP_OR = 14, 226b8e80941Smrg LOGICOP_SET = 15, 227b8e80941Smrg}; 228b8e80941Smrg 229b8e80941Smrgenum GEN10_3D_Prim_Topo_Type { 230b8e80941Smrg _3DPRIM_POINTLIST = 1, 231b8e80941Smrg _3DPRIM_LINELIST = 2, 232b8e80941Smrg _3DPRIM_LINESTRIP = 3, 233b8e80941Smrg _3DPRIM_TRILIST = 4, 234b8e80941Smrg _3DPRIM_TRISTRIP = 5, 235b8e80941Smrg _3DPRIM_TRIFAN = 6, 236b8e80941Smrg _3DPRIM_QUADLIST = 7, 237b8e80941Smrg _3DPRIM_QUADSTRIP = 8, 238b8e80941Smrg _3DPRIM_LINELIST_ADJ = 9, 239b8e80941Smrg _3DPRIM_LINESTRIP_ADJ = 10, 240b8e80941Smrg _3DPRIM_TRILIST_ADJ = 11, 241b8e80941Smrg _3DPRIM_TRISTRIP_ADJ = 12, 242b8e80941Smrg _3DPRIM_TRISTRIP_REVERSE = 13, 243b8e80941Smrg _3DPRIM_POLYGON = 14, 244b8e80941Smrg _3DPRIM_RECTLIST = 15, 245b8e80941Smrg _3DPRIM_LINELOOP = 16, 246b8e80941Smrg _3DPRIM_POINTLIST_BF = 17, 247b8e80941Smrg _3DPRIM_LINESTRIP_CONT = 18, 248b8e80941Smrg _3DPRIM_LINESTRIP_BF = 19, 249b8e80941Smrg _3DPRIM_LINESTRIP_CONT_BF = 20, 250b8e80941Smrg _3DPRIM_TRIFAN_NOSTIPPLE = 22, 251b8e80941Smrg _3DPRIM_PATCHLIST_1 = 32, 252b8e80941Smrg _3DPRIM_PATCHLIST_2 = 33, 253b8e80941Smrg _3DPRIM_PATCHLIST_3 = 34, 254b8e80941Smrg _3DPRIM_PATCHLIST_4 = 35, 255b8e80941Smrg _3DPRIM_PATCHLIST_5 = 36, 256b8e80941Smrg _3DPRIM_PATCHLIST_6 = 37, 257b8e80941Smrg _3DPRIM_PATCHLIST_7 = 38, 258b8e80941Smrg _3DPRIM_PATCHLIST_8 = 39, 259b8e80941Smrg _3DPRIM_PATCHLIST_9 = 40, 260b8e80941Smrg _3DPRIM_PATCHLIST_10 = 41, 261b8e80941Smrg _3DPRIM_PATCHLIST_11 = 42, 262b8e80941Smrg _3DPRIM_PATCHLIST_12 = 43, 263b8e80941Smrg _3DPRIM_PATCHLIST_13 = 44, 264b8e80941Smrg _3DPRIM_PATCHLIST_14 = 45, 265b8e80941Smrg _3DPRIM_PATCHLIST_15 = 46, 266b8e80941Smrg _3DPRIM_PATCHLIST_16 = 47, 267b8e80941Smrg _3DPRIM_PATCHLIST_17 = 48, 268b8e80941Smrg _3DPRIM_PATCHLIST_18 = 49, 269b8e80941Smrg _3DPRIM_PATCHLIST_19 = 50, 270b8e80941Smrg _3DPRIM_PATCHLIST_20 = 51, 271b8e80941Smrg _3DPRIM_PATCHLIST_21 = 52, 272b8e80941Smrg _3DPRIM_PATCHLIST_22 = 53, 273b8e80941Smrg _3DPRIM_PATCHLIST_23 = 54, 274b8e80941Smrg _3DPRIM_PATCHLIST_24 = 55, 275b8e80941Smrg _3DPRIM_PATCHLIST_25 = 56, 276b8e80941Smrg _3DPRIM_PATCHLIST_26 = 57, 277b8e80941Smrg _3DPRIM_PATCHLIST_27 = 58, 278b8e80941Smrg _3DPRIM_PATCHLIST_28 = 59, 279b8e80941Smrg _3DPRIM_PATCHLIST_29 = 60, 280b8e80941Smrg _3DPRIM_PATCHLIST_30 = 61, 281b8e80941Smrg _3DPRIM_PATCHLIST_31 = 62, 282b8e80941Smrg _3DPRIM_PATCHLIST_32 = 63, 283b8e80941Smrg}; 284b8e80941Smrg 285b8e80941Smrgenum GEN10_3D_Stencil_Operation { 286b8e80941Smrg STENCILOP_KEEP = 0, 287b8e80941Smrg STENCILOP_ZERO = 1, 288b8e80941Smrg STENCILOP_REPLACE = 2, 289b8e80941Smrg STENCILOP_INCRSAT = 3, 290b8e80941Smrg STENCILOP_DECRSAT = 4, 291b8e80941Smrg STENCILOP_INCR = 5, 292b8e80941Smrg STENCILOP_DECR = 6, 293b8e80941Smrg STENCILOP_INVERT = 7, 294b8e80941Smrg}; 295b8e80941Smrg 296b8e80941Smrgenum GEN10_3D_Vertex_Component_Control { 297b8e80941Smrg VFCOMP_NOSTORE = 0, 298b8e80941Smrg VFCOMP_STORE_SRC = 1, 299b8e80941Smrg VFCOMP_STORE_0 = 2, 300b8e80941Smrg VFCOMP_STORE_1_FP = 3, 301b8e80941Smrg VFCOMP_STORE_1_INT = 4, 302b8e80941Smrg VFCOMP_STORE_PID = 7, 303b8e80941Smrg}; 304b8e80941Smrg 305b8e80941Smrgenum GEN10_Atomic_OPCODE { 306b8e80941Smrg MI_ATOMIC_OP_AND = 1, 307b8e80941Smrg MI_ATOMIC_OP_OR = 2, 308b8e80941Smrg MI_ATOMIC_OP_XOR = 3, 309b8e80941Smrg MI_ATOMIC_OP_MOVE = 4, 310b8e80941Smrg MI_ATOMIC_OP_INC = 5, 311b8e80941Smrg MI_ATOMIC_OP_DEC = 6, 312b8e80941Smrg MI_ATOMIC_OP_ADD = 7, 313b8e80941Smrg MI_ATOMIC_OP_SUB = 8, 314b8e80941Smrg MI_ATOMIC_OP_RSUB = 9, 315b8e80941Smrg MI_ATOMIC_OP_IMAX = 10, 316b8e80941Smrg MI_ATOMIC_OP_IMIN = 11, 317b8e80941Smrg MI_ATOMIC_OP_UMAX = 12, 318b8e80941Smrg MI_ATOMIC_OP_UMIN = 13, 319b8e80941Smrg MI_ATOMIC_OP_CMP_WR = 14, 320b8e80941Smrg MI_ATOMIC_OP_PREDEC = 15, 321b8e80941Smrg MI_ATOMIC_OP_AND8B = 33, 322b8e80941Smrg MI_ATOMIC_OP_OR8B = 34, 323b8e80941Smrg MI_ATOMIC_OP_XOR8B = 35, 324b8e80941Smrg MI_ATOMIC_OP_MOVE8B = 36, 325b8e80941Smrg MI_ATOMIC_OP_INC8B = 37, 326b8e80941Smrg MI_ATOMIC_OP_DEC8B = 38, 327b8e80941Smrg MI_ATOMIC_OP_ADD8B = 39, 328b8e80941Smrg MI_ATOMIC_OP_SUB8B = 40, 329b8e80941Smrg MI_ATOMIC_OP_RSUB8B = 41, 330b8e80941Smrg MI_ATOMIC_OP_IMAX8B = 42, 331b8e80941Smrg MI_ATOMIC_OP_IMIN8B = 43, 332b8e80941Smrg MI_ATOMIC_OP_UMAX8B = 44, 333b8e80941Smrg MI_ATOMIC_OP_UMIN8B = 45, 334b8e80941Smrg MI_ATOMIC_OP_CMP_WR8B = 46, 335b8e80941Smrg MI_ATOMIC_OP_PREDEC8B = 47, 336b8e80941Smrg MI_ATOMIC_OP_CMP_WR16B = 78, 337b8e80941Smrg}; 338b8e80941Smrg 339b8e80941Smrgenum GEN10_Attribute_Component_Format { 340b8e80941Smrg ACF_DISABLED = 0, 341b8e80941Smrg ACF_XY = 1, 342b8e80941Smrg ACF_XYZ = 2, 343b8e80941Smrg ACF_XYZW = 3, 344b8e80941Smrg}; 345b8e80941Smrg 346b8e80941Smrgenum GEN10_COMPONENT_ENABLES { 347b8e80941Smrg CE_NONE = 0, 348b8e80941Smrg CE_X = 1, 349b8e80941Smrg CE_Y = 2, 350b8e80941Smrg CE_XY = 3, 351b8e80941Smrg CE_Z = 4, 352b8e80941Smrg CE_XZ = 5, 353b8e80941Smrg CE_YZ = 6, 354b8e80941Smrg CE_XYZ = 7, 355b8e80941Smrg CE_W = 8, 356b8e80941Smrg CE_XW = 9, 357b8e80941Smrg CE_YW = 10, 358b8e80941Smrg CE_XYW = 11, 359b8e80941Smrg CE_ZW = 12, 360b8e80941Smrg CE_XZW = 13, 361b8e80941Smrg CE_YZW = 14, 362b8e80941Smrg CE_XYZW = 15, 363b8e80941Smrg}; 364b8e80941Smrg 365b8e80941Smrgenum GEN10_ShaderChannelSelect { 366b8e80941Smrg SCS_ZERO = 0, 367b8e80941Smrg SCS_ONE = 1, 368b8e80941Smrg SCS_RED = 4, 369b8e80941Smrg SCS_GREEN = 5, 370b8e80941Smrg SCS_BLUE = 6, 371b8e80941Smrg SCS_ALPHA = 7, 372b8e80941Smrg}; 373b8e80941Smrg 374b8e80941Smrgenum GEN10_TextureCoordinateMode { 375b8e80941Smrg TCM_WRAP = 0, 376b8e80941Smrg TCM_MIRROR = 1, 377b8e80941Smrg TCM_CLAMP = 2, 378b8e80941Smrg TCM_CUBE = 3, 379b8e80941Smrg TCM_CLAMP_BORDER = 4, 380b8e80941Smrg TCM_MIRROR_ONCE = 5, 381b8e80941Smrg TCM_HALF_BORDER = 6, 382b8e80941Smrg}; 383b8e80941Smrg 384b8e80941Smrgenum GEN10_WRAP_SHORTEST_ENABLE { 385b8e80941Smrg WSE_X = 1, 386b8e80941Smrg WSE_Y = 2, 387b8e80941Smrg WSE_XY = 3, 388b8e80941Smrg WSE_Z = 4, 389b8e80941Smrg WSE_XZ = 5, 390b8e80941Smrg WSE_YZ = 6, 391b8e80941Smrg WSE_XYZ = 7, 392b8e80941Smrg WSE_W = 8, 393b8e80941Smrg WSE_XW = 9, 394b8e80941Smrg WSE_YW = 10, 395b8e80941Smrg WSE_XYW = 11, 396b8e80941Smrg WSE_ZW = 12, 397b8e80941Smrg WSE_XZW = 13, 398b8e80941Smrg WSE_YZW = 14, 399b8e80941Smrg WSE_XYZW = 15, 400b8e80941Smrg}; 401b8e80941Smrg 402b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_BODY_length 10 403b8e80941Smrgstruct GEN10_3DSTATE_CONSTANT_BODY { 404b8e80941Smrg uint32_t ReadLength[4]; 405b8e80941Smrg __gen_address_type Buffer[4]; 406b8e80941Smrg}; 407b8e80941Smrg 408b8e80941Smrgstatic inline void 409b8e80941SmrgGEN10_3DSTATE_CONSTANT_BODY_pack(__attribute__((unused)) __gen_user_data *data, 410b8e80941Smrg __attribute__((unused)) void * restrict dst, 411b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_BODY * restrict values) 412b8e80941Smrg{ 413b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 414b8e80941Smrg 415b8e80941Smrg dw[0] = 416b8e80941Smrg __gen_uint(values->ReadLength[0], 0, 15) | 417b8e80941Smrg __gen_uint(values->ReadLength[1], 16, 31); 418b8e80941Smrg 419b8e80941Smrg dw[1] = 420b8e80941Smrg __gen_uint(values->ReadLength[2], 0, 15) | 421b8e80941Smrg __gen_uint(values->ReadLength[3], 16, 31); 422b8e80941Smrg 423b8e80941Smrg const uint64_t v2_address = 424b8e80941Smrg __gen_combine_address(data, &dw[2], values->Buffer[0], 0); 425b8e80941Smrg dw[2] = v2_address; 426b8e80941Smrg dw[3] = v2_address >> 32; 427b8e80941Smrg 428b8e80941Smrg const uint64_t v4_address = 429b8e80941Smrg __gen_combine_address(data, &dw[4], values->Buffer[1], 0); 430b8e80941Smrg dw[4] = v4_address; 431b8e80941Smrg dw[5] = v4_address >> 32; 432b8e80941Smrg 433b8e80941Smrg const uint64_t v6_address = 434b8e80941Smrg __gen_combine_address(data, &dw[6], values->Buffer[2], 0); 435b8e80941Smrg dw[6] = v6_address; 436b8e80941Smrg dw[7] = v6_address >> 32; 437b8e80941Smrg 438b8e80941Smrg const uint64_t v8_address = 439b8e80941Smrg __gen_combine_address(data, &dw[8], values->Buffer[3], 0); 440b8e80941Smrg dw[8] = v8_address; 441b8e80941Smrg dw[9] = v8_address >> 32; 442b8e80941Smrg} 443b8e80941Smrg 444b8e80941Smrg#define GEN10_BINDING_TABLE_EDIT_ENTRY_length 1 445b8e80941Smrgstruct GEN10_BINDING_TABLE_EDIT_ENTRY { 446b8e80941Smrg uint64_t SurfaceStatePointer; 447b8e80941Smrg uint32_t BindingTableIndex; 448b8e80941Smrg}; 449b8e80941Smrg 450b8e80941Smrgstatic inline void 451b8e80941SmrgGEN10_BINDING_TABLE_EDIT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 452b8e80941Smrg __attribute__((unused)) void * restrict dst, 453b8e80941Smrg __attribute__((unused)) const struct GEN10_BINDING_TABLE_EDIT_ENTRY * restrict values) 454b8e80941Smrg{ 455b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 456b8e80941Smrg 457b8e80941Smrg dw[0] = 458b8e80941Smrg __gen_offset(values->SurfaceStatePointer, 0, 15) | 459b8e80941Smrg __gen_uint(values->BindingTableIndex, 16, 23); 460b8e80941Smrg} 461b8e80941Smrg 462b8e80941Smrg#define GEN10_BINDING_TABLE_STATE_length 1 463b8e80941Smrgstruct GEN10_BINDING_TABLE_STATE { 464b8e80941Smrg uint64_t SurfaceStatePointer; 465b8e80941Smrg}; 466b8e80941Smrg 467b8e80941Smrgstatic inline void 468b8e80941SmrgGEN10_BINDING_TABLE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 469b8e80941Smrg __attribute__((unused)) void * restrict dst, 470b8e80941Smrg __attribute__((unused)) const struct GEN10_BINDING_TABLE_STATE * restrict values) 471b8e80941Smrg{ 472b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 473b8e80941Smrg 474b8e80941Smrg dw[0] = 475b8e80941Smrg __gen_offset(values->SurfaceStatePointer, 6, 31); 476b8e80941Smrg} 477b8e80941Smrg 478b8e80941Smrg#define GEN10_BLEND_STATE_ENTRY_length 2 479b8e80941Smrgstruct GEN10_BLEND_STATE_ENTRY { 480b8e80941Smrg bool WriteDisableBlue; 481b8e80941Smrg bool WriteDisableGreen; 482b8e80941Smrg bool WriteDisableRed; 483b8e80941Smrg bool WriteDisableAlpha; 484b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Function AlphaBlendFunction; 485b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; 486b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; 487b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Function ColorBlendFunction; 488b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; 489b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Factor SourceBlendFactor; 490b8e80941Smrg bool ColorBufferBlendEnable; 491b8e80941Smrg bool PostBlendColorClampEnable; 492b8e80941Smrg bool PreBlendColorClampEnable; 493b8e80941Smrg uint32_t ColorClampRange; 494b8e80941Smrg#define COLORCLAMP_UNORM 0 495b8e80941Smrg#define COLORCLAMP_SNORM 1 496b8e80941Smrg#define COLORCLAMP_RTFORMAT 2 497b8e80941Smrg bool PreBlendSourceOnlyClampEnable; 498b8e80941Smrg enum GEN10_3D_Logic_Op_Function LogicOpFunction; 499b8e80941Smrg bool LogicOpEnable; 500b8e80941Smrg}; 501b8e80941Smrg 502b8e80941Smrgstatic inline void 503b8e80941SmrgGEN10_BLEND_STATE_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 504b8e80941Smrg __attribute__((unused)) void * restrict dst, 505b8e80941Smrg __attribute__((unused)) const struct GEN10_BLEND_STATE_ENTRY * restrict values) 506b8e80941Smrg{ 507b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 508b8e80941Smrg 509b8e80941Smrg dw[0] = 510b8e80941Smrg __gen_uint(values->WriteDisableBlue, 0, 0) | 511b8e80941Smrg __gen_uint(values->WriteDisableGreen, 1, 1) | 512b8e80941Smrg __gen_uint(values->WriteDisableRed, 2, 2) | 513b8e80941Smrg __gen_uint(values->WriteDisableAlpha, 3, 3) | 514b8e80941Smrg __gen_uint(values->AlphaBlendFunction, 5, 7) | 515b8e80941Smrg __gen_uint(values->DestinationAlphaBlendFactor, 8, 12) | 516b8e80941Smrg __gen_uint(values->SourceAlphaBlendFactor, 13, 17) | 517b8e80941Smrg __gen_uint(values->ColorBlendFunction, 18, 20) | 518b8e80941Smrg __gen_uint(values->DestinationBlendFactor, 21, 25) | 519b8e80941Smrg __gen_uint(values->SourceBlendFactor, 26, 30) | 520b8e80941Smrg __gen_uint(values->ColorBufferBlendEnable, 31, 31); 521b8e80941Smrg 522b8e80941Smrg dw[1] = 523b8e80941Smrg __gen_uint(values->PostBlendColorClampEnable, 0, 0) | 524b8e80941Smrg __gen_uint(values->PreBlendColorClampEnable, 1, 1) | 525b8e80941Smrg __gen_uint(values->ColorClampRange, 2, 3) | 526b8e80941Smrg __gen_uint(values->PreBlendSourceOnlyClampEnable, 4, 4) | 527b8e80941Smrg __gen_uint(values->LogicOpFunction, 27, 30) | 528b8e80941Smrg __gen_uint(values->LogicOpEnable, 31, 31); 529b8e80941Smrg} 530b8e80941Smrg 531b8e80941Smrg#define GEN10_BLEND_STATE_length 1 532b8e80941Smrgstruct GEN10_BLEND_STATE { 533b8e80941Smrg uint32_t YDitherOffset; 534b8e80941Smrg uint32_t XDitherOffset; 535b8e80941Smrg bool ColorDitherEnable; 536b8e80941Smrg enum GEN10_3D_Compare_Function AlphaTestFunction; 537b8e80941Smrg bool AlphaTestEnable; 538b8e80941Smrg bool AlphaToCoverageDitherEnable; 539b8e80941Smrg bool AlphaToOneEnable; 540b8e80941Smrg bool IndependentAlphaBlendEnable; 541b8e80941Smrg bool AlphaToCoverageEnable; 542b8e80941Smrg /* variable length fields follow */ 543b8e80941Smrg}; 544b8e80941Smrg 545b8e80941Smrgstatic inline void 546b8e80941SmrgGEN10_BLEND_STATE_pack(__attribute__((unused)) __gen_user_data *data, 547b8e80941Smrg __attribute__((unused)) void * restrict dst, 548b8e80941Smrg __attribute__((unused)) const struct GEN10_BLEND_STATE * restrict values) 549b8e80941Smrg{ 550b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 551b8e80941Smrg 552b8e80941Smrg dw[0] = 553b8e80941Smrg __gen_uint(values->YDitherOffset, 19, 20) | 554b8e80941Smrg __gen_uint(values->XDitherOffset, 21, 22) | 555b8e80941Smrg __gen_uint(values->ColorDitherEnable, 23, 23) | 556b8e80941Smrg __gen_uint(values->AlphaTestFunction, 24, 26) | 557b8e80941Smrg __gen_uint(values->AlphaTestEnable, 27, 27) | 558b8e80941Smrg __gen_uint(values->AlphaToCoverageDitherEnable, 28, 28) | 559b8e80941Smrg __gen_uint(values->AlphaToOneEnable, 29, 29) | 560b8e80941Smrg __gen_uint(values->IndependentAlphaBlendEnable, 30, 30) | 561b8e80941Smrg __gen_uint(values->AlphaToCoverageEnable, 31, 31); 562b8e80941Smrg} 563b8e80941Smrg 564b8e80941Smrg#define GEN10_CC_VIEWPORT_length 2 565b8e80941Smrgstruct GEN10_CC_VIEWPORT { 566b8e80941Smrg float MinimumDepth; 567b8e80941Smrg float MaximumDepth; 568b8e80941Smrg}; 569b8e80941Smrg 570b8e80941Smrgstatic inline void 571b8e80941SmrgGEN10_CC_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 572b8e80941Smrg __attribute__((unused)) void * restrict dst, 573b8e80941Smrg __attribute__((unused)) const struct GEN10_CC_VIEWPORT * restrict values) 574b8e80941Smrg{ 575b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 576b8e80941Smrg 577b8e80941Smrg dw[0] = 578b8e80941Smrg __gen_float(values->MinimumDepth); 579b8e80941Smrg 580b8e80941Smrg dw[1] = 581b8e80941Smrg __gen_float(values->MaximumDepth); 582b8e80941Smrg} 583b8e80941Smrg 584b8e80941Smrg#define GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_length 2 585b8e80941Smrgstruct GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY { 586b8e80941Smrg float Table1XFilterCoefficientn2; 587b8e80941Smrg float Table1YFilterCoefficientn2; 588b8e80941Smrg float Table1XFilterCoefficientn3; 589b8e80941Smrg float Table1YFilterCoefficientn3; 590b8e80941Smrg float Table1XFilterCoefficientn4; 591b8e80941Smrg float Table1YFilterCoefficientn4; 592b8e80941Smrg float Table1XFilterCoefficientn5; 593b8e80941Smrg float Table1YFilterCoefficientn5; 594b8e80941Smrg}; 595b8e80941Smrg 596b8e80941Smrgstatic inline void 597b8e80941SmrgGEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(__attribute__((unused)) __gen_user_data *data, 598b8e80941Smrg __attribute__((unused)) void * restrict dst, 599b8e80941Smrg __attribute__((unused)) const struct GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY * restrict values) 600b8e80941Smrg{ 601b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 602b8e80941Smrg 603b8e80941Smrg dw[0] = 604b8e80941Smrg __gen_sfixed(values->Table1XFilterCoefficientn2, 0, 7, 6) | 605b8e80941Smrg __gen_sfixed(values->Table1YFilterCoefficientn2, 8, 15, 6) | 606b8e80941Smrg __gen_sfixed(values->Table1XFilterCoefficientn3, 16, 23, 6) | 607b8e80941Smrg __gen_sfixed(values->Table1YFilterCoefficientn3, 24, 31, 6); 608b8e80941Smrg 609b8e80941Smrg dw[1] = 610b8e80941Smrg __gen_sfixed(values->Table1XFilterCoefficientn4, 0, 7, 6) | 611b8e80941Smrg __gen_sfixed(values->Table1YFilterCoefficientn4, 8, 15, 6) | 612b8e80941Smrg __gen_sfixed(values->Table1XFilterCoefficientn5, 16, 23, 6) | 613b8e80941Smrg __gen_sfixed(values->Table1YFilterCoefficientn5, 24, 31, 6); 614b8e80941Smrg} 615b8e80941Smrg 616b8e80941Smrg#define GEN10_CLEAR_COLOR_length 8 617b8e80941Smrgstruct GEN10_CLEAR_COLOR { 618b8e80941Smrg int32_t RawClearColorRed; 619b8e80941Smrg int32_t RawClearColorGreen; 620b8e80941Smrg int32_t RawClearColorBlue; 621b8e80941Smrg int32_t RawClearColorAlpha; 622b8e80941Smrg}; 623b8e80941Smrg 624b8e80941Smrgstatic inline void 625b8e80941SmrgGEN10_CLEAR_COLOR_pack(__attribute__((unused)) __gen_user_data *data, 626b8e80941Smrg __attribute__((unused)) void * restrict dst, 627b8e80941Smrg __attribute__((unused)) const struct GEN10_CLEAR_COLOR * restrict values) 628b8e80941Smrg{ 629b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 630b8e80941Smrg 631b8e80941Smrg dw[0] = 632b8e80941Smrg __gen_sint(values->RawClearColorRed, 0, 31); 633b8e80941Smrg 634b8e80941Smrg dw[1] = 635b8e80941Smrg __gen_sint(values->RawClearColorGreen, 0, 31); 636b8e80941Smrg 637b8e80941Smrg dw[2] = 638b8e80941Smrg __gen_sint(values->RawClearColorBlue, 0, 31); 639b8e80941Smrg 640b8e80941Smrg dw[3] = 641b8e80941Smrg __gen_sint(values->RawClearColorAlpha, 0, 31); 642b8e80941Smrg 643b8e80941Smrg dw[4] = 0; 644b8e80941Smrg 645b8e80941Smrg dw[5] = 0; 646b8e80941Smrg 647b8e80941Smrg dw[6] = 0; 648b8e80941Smrg 649b8e80941Smrg dw[7] = 0; 650b8e80941Smrg} 651b8e80941Smrg 652b8e80941Smrg#define GEN10_COLOR_CALC_STATE_length 6 653b8e80941Smrgstruct GEN10_COLOR_CALC_STATE { 654b8e80941Smrg uint32_t AlphaTestFormat; 655b8e80941Smrg#define ALPHATEST_UNORM8 0 656b8e80941Smrg#define ALPHATEST_FLOAT32 1 657b8e80941Smrg bool RoundDisableFunctionDisable; 658b8e80941Smrg uint32_t AlphaReferenceValueAsUNORM8; 659b8e80941Smrg float AlphaReferenceValueAsFLOAT32; 660b8e80941Smrg float BlendConstantColorRed; 661b8e80941Smrg float BlendConstantColorGreen; 662b8e80941Smrg float BlendConstantColorBlue; 663b8e80941Smrg float BlendConstantColorAlpha; 664b8e80941Smrg}; 665b8e80941Smrg 666b8e80941Smrgstatic inline void 667b8e80941SmrgGEN10_COLOR_CALC_STATE_pack(__attribute__((unused)) __gen_user_data *data, 668b8e80941Smrg __attribute__((unused)) void * restrict dst, 669b8e80941Smrg __attribute__((unused)) const struct GEN10_COLOR_CALC_STATE * restrict values) 670b8e80941Smrg{ 671b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 672b8e80941Smrg 673b8e80941Smrg dw[0] = 674b8e80941Smrg __gen_uint(values->AlphaTestFormat, 0, 0) | 675b8e80941Smrg __gen_uint(values->RoundDisableFunctionDisable, 15, 15); 676b8e80941Smrg 677b8e80941Smrg dw[1] = 678b8e80941Smrg __gen_uint(values->AlphaReferenceValueAsUNORM8, 0, 31) | 679b8e80941Smrg __gen_float(values->AlphaReferenceValueAsFLOAT32); 680b8e80941Smrg 681b8e80941Smrg dw[2] = 682b8e80941Smrg __gen_float(values->BlendConstantColorRed); 683b8e80941Smrg 684b8e80941Smrg dw[3] = 685b8e80941Smrg __gen_float(values->BlendConstantColorGreen); 686b8e80941Smrg 687b8e80941Smrg dw[4] = 688b8e80941Smrg __gen_float(values->BlendConstantColorBlue); 689b8e80941Smrg 690b8e80941Smrg dw[5] = 691b8e80941Smrg __gen_float(values->BlendConstantColorAlpha); 692b8e80941Smrg} 693b8e80941Smrg 694b8e80941Smrg#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length 1 695b8e80941Smrgstruct GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR { 696b8e80941Smrg uint32_t TargetFunctionID; 697b8e80941Smrg uint32_t EndOfThread; 698b8e80941Smrg#define NoTermination 0 699b8e80941Smrg#define EOT 1 700b8e80941Smrg uint32_t ExtendedMessageLength; 701b8e80941Smrg}; 702b8e80941Smrg 703b8e80941Smrgstatic inline void 704b8e80941SmrgGEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_pack(__attribute__((unused)) __gen_user_data *data, 705b8e80941Smrg __attribute__((unused)) void * restrict dst, 706b8e80941Smrg __attribute__((unused)) const struct GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR * restrict values) 707b8e80941Smrg{ 708b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 709b8e80941Smrg 710b8e80941Smrg dw[0] = 711b8e80941Smrg __gen_uint(values->TargetFunctionID, 0, 3) | 712b8e80941Smrg __gen_uint(values->EndOfThread, 5, 5) | 713b8e80941Smrg __gen_uint(values->ExtendedMessageLength, 6, 9); 714b8e80941Smrg} 715b8e80941Smrg 716b8e80941Smrg#define GEN10_FILTER_COEFFICIENT_length 1 717b8e80941Smrgstruct GEN10_FILTER_COEFFICIENT { 718b8e80941Smrg float FilterCoefficient; 719b8e80941Smrg}; 720b8e80941Smrg 721b8e80941Smrgstatic inline void 722b8e80941SmrgGEN10_FILTER_COEFFICIENT_pack(__attribute__((unused)) __gen_user_data *data, 723b8e80941Smrg __attribute__((unused)) void * restrict dst, 724b8e80941Smrg __attribute__((unused)) const struct GEN10_FILTER_COEFFICIENT * restrict values) 725b8e80941Smrg{ 726b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 727b8e80941Smrg 728b8e80941Smrg dw[0] = 729b8e80941Smrg __gen_sfixed(values->FilterCoefficient, 0, 7, 6); 730b8e80941Smrg} 731b8e80941Smrg 732b8e80941Smrg#define GEN10_FRAMEDELTAQP_length 2 733b8e80941Smrgstruct GEN10_FRAMEDELTAQP { 734b8e80941Smrg int32_t FrameDeltaQP[8]; 735b8e80941Smrg}; 736b8e80941Smrg 737b8e80941Smrgstatic inline void 738b8e80941SmrgGEN10_FRAMEDELTAQP_pack(__attribute__((unused)) __gen_user_data *data, 739b8e80941Smrg __attribute__((unused)) void * restrict dst, 740b8e80941Smrg __attribute__((unused)) const struct GEN10_FRAMEDELTAQP * restrict values) 741b8e80941Smrg{ 742b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 743b8e80941Smrg 744b8e80941Smrg dw[0] = 745b8e80941Smrg __gen_sint(values->FrameDeltaQP[0], 0, 7) | 746b8e80941Smrg __gen_sint(values->FrameDeltaQP[1], 8, 15) | 747b8e80941Smrg __gen_sint(values->FrameDeltaQP[2], 16, 23) | 748b8e80941Smrg __gen_sint(values->FrameDeltaQP[3], 24, 31); 749b8e80941Smrg 750b8e80941Smrg dw[1] = 751b8e80941Smrg __gen_sint(values->FrameDeltaQP[4], 0, 7) | 752b8e80941Smrg __gen_sint(values->FrameDeltaQP[5], 8, 15) | 753b8e80941Smrg __gen_sint(values->FrameDeltaQP[6], 16, 23) | 754b8e80941Smrg __gen_sint(values->FrameDeltaQP[7], 24, 31); 755b8e80941Smrg} 756b8e80941Smrg 757b8e80941Smrg#define GEN10_FRAMEDELTAQPRANGE_length 2 758b8e80941Smrgstruct GEN10_FRAMEDELTAQPRANGE { 759b8e80941Smrg uint32_t FrameDeltaQPRange[8]; 760b8e80941Smrg}; 761b8e80941Smrg 762b8e80941Smrgstatic inline void 763b8e80941SmrgGEN10_FRAMEDELTAQPRANGE_pack(__attribute__((unused)) __gen_user_data *data, 764b8e80941Smrg __attribute__((unused)) void * restrict dst, 765b8e80941Smrg __attribute__((unused)) const struct GEN10_FRAMEDELTAQPRANGE * restrict values) 766b8e80941Smrg{ 767b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 768b8e80941Smrg 769b8e80941Smrg dw[0] = 770b8e80941Smrg __gen_uint(values->FrameDeltaQPRange[0], 0, 7) | 771b8e80941Smrg __gen_uint(values->FrameDeltaQPRange[1], 8, 15) | 772b8e80941Smrg __gen_uint(values->FrameDeltaQPRange[2], 16, 23) | 773b8e80941Smrg __gen_uint(values->FrameDeltaQPRange[3], 24, 31); 774b8e80941Smrg 775b8e80941Smrg dw[1] = 776b8e80941Smrg __gen_uint(values->FrameDeltaQPRange[4], 0, 7) | 777b8e80941Smrg __gen_uint(values->FrameDeltaQPRange[5], 8, 15) | 778b8e80941Smrg __gen_uint(values->FrameDeltaQPRange[6], 16, 23) | 779b8e80941Smrg __gen_uint(values->FrameDeltaQPRange[7], 24, 31); 780b8e80941Smrg} 781b8e80941Smrg 782b8e80941Smrg#define GEN10_GATHER_CONSTANT_ENTRY_length 1 783b8e80941Smrgstruct GEN10_GATHER_CONSTANT_ENTRY { 784b8e80941Smrg uint32_t BindingTableIndexOffset; 785b8e80941Smrg uint32_t ChannelMask; 786b8e80941Smrg uint64_t ConstantBufferOffset; 787b8e80941Smrg}; 788b8e80941Smrg 789b8e80941Smrgstatic inline void 790b8e80941SmrgGEN10_GATHER_CONSTANT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 791b8e80941Smrg __attribute__((unused)) void * restrict dst, 792b8e80941Smrg __attribute__((unused)) const struct GEN10_GATHER_CONSTANT_ENTRY * restrict values) 793b8e80941Smrg{ 794b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 795b8e80941Smrg 796b8e80941Smrg dw[0] = 797b8e80941Smrg __gen_uint(values->BindingTableIndexOffset, 0, 3) | 798b8e80941Smrg __gen_uint(values->ChannelMask, 4, 7) | 799b8e80941Smrg __gen_offset(values->ConstantBufferOffset, 8, 15); 800b8e80941Smrg} 801b8e80941Smrg 802b8e80941Smrg#define GEN10_HEVC_ARBITRATION_PRIORITY_length 1 803b8e80941Smrgstruct GEN10_HEVC_ARBITRATION_PRIORITY { 804b8e80941Smrg uint32_t Priority; 805b8e80941Smrg#define Highestpriority 0 806b8e80941Smrg#define Secondhighestpriority 1 807b8e80941Smrg#define Thirdhighestpriority 2 808b8e80941Smrg#define Lowestpriority 3 809b8e80941Smrg}; 810b8e80941Smrg 811b8e80941Smrgstatic inline void 812b8e80941SmrgGEN10_HEVC_ARBITRATION_PRIORITY_pack(__attribute__((unused)) __gen_user_data *data, 813b8e80941Smrg __attribute__((unused)) void * restrict dst, 814b8e80941Smrg __attribute__((unused)) const struct GEN10_HEVC_ARBITRATION_PRIORITY * restrict values) 815b8e80941Smrg{ 816b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 817b8e80941Smrg 818b8e80941Smrg dw[0] = 819b8e80941Smrg __gen_uint(values->Priority, 0, 1); 820b8e80941Smrg} 821b8e80941Smrg 822b8e80941Smrg#define GEN10_MEMORYADDRESSATTRIBUTES_length 1 823b8e80941Smrgstruct GEN10_MEMORYADDRESSATTRIBUTES { 824b8e80941Smrg uint32_t MOCS; 825b8e80941Smrg struct GEN10_HEVC_ARBITRATION_PRIORITY ArbitrationPriorityControl; 826b8e80941Smrg bool MemoryCompressionEnable; 827b8e80941Smrg uint32_t MemoryCompressionMode; 828b8e80941Smrg uint32_t RowStoreScratchBufferCacheSelect; 829b8e80941Smrg uint32_t TiledResourceMode; 830b8e80941Smrg#define TRMODE_NONE 0 831b8e80941Smrg#define TRMODE_TILEYF 1 832b8e80941Smrg#define TRMODE_TILEYS 2 833b8e80941Smrg}; 834b8e80941Smrg 835b8e80941Smrgstatic inline void 836b8e80941SmrgGEN10_MEMORYADDRESSATTRIBUTES_pack(__attribute__((unused)) __gen_user_data *data, 837b8e80941Smrg __attribute__((unused)) void * restrict dst, 838b8e80941Smrg __attribute__((unused)) const struct GEN10_MEMORYADDRESSATTRIBUTES * restrict values) 839b8e80941Smrg{ 840b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 841b8e80941Smrg 842b8e80941Smrg uint32_t v0_0; 843b8e80941Smrg GEN10_HEVC_ARBITRATION_PRIORITY_pack(data, &v0_0, &values->ArbitrationPriorityControl); 844b8e80941Smrg 845b8e80941Smrg dw[0] = 846b8e80941Smrg __gen_uint(values->MOCS, 1, 6) | 847b8e80941Smrg __gen_uint(v0_0, 7, 8) | 848b8e80941Smrg __gen_uint(values->MemoryCompressionEnable, 9, 9) | 849b8e80941Smrg __gen_uint(values->MemoryCompressionMode, 10, 10) | 850b8e80941Smrg __gen_uint(values->RowStoreScratchBufferCacheSelect, 12, 12) | 851b8e80941Smrg __gen_uint(values->TiledResourceMode, 13, 14); 852b8e80941Smrg} 853b8e80941Smrg 854b8e80941Smrg#define GEN10_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_length 4 855b8e80941Smrgstruct GEN10_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD { 856b8e80941Smrg uint32_t IndirectPayloadDataSizeinbits; 857b8e80941Smrg __gen_address_type IndirectPayloadBaseAddress; 858b8e80941Smrg struct GEN10_MEMORYADDRESSATTRIBUTES IndirectPayloadBaseAddress2; 859b8e80941Smrg}; 860b8e80941Smrg 861b8e80941Smrgstatic inline void 862b8e80941SmrgGEN10_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_pack(__attribute__((unused)) __gen_user_data *data, 863b8e80941Smrg __attribute__((unused)) void * restrict dst, 864b8e80941Smrg __attribute__((unused)) const struct GEN10_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD * restrict values) 865b8e80941Smrg{ 866b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 867b8e80941Smrg 868b8e80941Smrg dw[0] = 869b8e80941Smrg __gen_uint(values->IndirectPayloadDataSizeinbits, 0, 31); 870b8e80941Smrg 871b8e80941Smrg const uint64_t v1_address = 872b8e80941Smrg __gen_combine_address(data, &dw[1], values->IndirectPayloadBaseAddress, 0); 873b8e80941Smrg dw[1] = v1_address; 874b8e80941Smrg dw[2] = v1_address >> 32; 875b8e80941Smrg 876b8e80941Smrg GEN10_MEMORYADDRESSATTRIBUTES_pack(data, &dw[3], &values->IndirectPayloadBaseAddress2); 877b8e80941Smrg} 878b8e80941Smrg 879b8e80941Smrg#define GEN10_HCP_REF_LIST_ENTRY_length 1 880b8e80941Smrgstruct GEN10_HCP_REF_LIST_ENTRY { 881b8e80941Smrg uint32_t ReferencePicturetbValue; 882b8e80941Smrg uint32_t ListEntry; 883b8e80941Smrg uint32_t ChromaWeightedPrediction; 884b8e80941Smrg#define Default 0 885b8e80941Smrg#define Explicit 1 886b8e80941Smrg uint32_t LumaWeightedPrediction; 887b8e80941Smrg#define Default 0 888b8e80941Smrg#define Explicit 1 889b8e80941Smrg bool LongTermReference; 890b8e80941Smrg bool FieldPic; 891b8e80941Smrg bool TopField; 892b8e80941Smrg}; 893b8e80941Smrg 894b8e80941Smrgstatic inline void 895b8e80941SmrgGEN10_HCP_REF_LIST_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 896b8e80941Smrg __attribute__((unused)) void * restrict dst, 897b8e80941Smrg __attribute__((unused)) const struct GEN10_HCP_REF_LIST_ENTRY * restrict values) 898b8e80941Smrg{ 899b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 900b8e80941Smrg 901b8e80941Smrg dw[0] = 902b8e80941Smrg __gen_uint(values->ReferencePicturetbValue, 0, 7) | 903b8e80941Smrg __gen_uint(values->ListEntry, 8, 10) | 904b8e80941Smrg __gen_uint(values->ChromaWeightedPrediction, 11, 11) | 905b8e80941Smrg __gen_uint(values->LumaWeightedPrediction, 12, 12) | 906b8e80941Smrg __gen_uint(values->LongTermReference, 13, 13) | 907b8e80941Smrg __gen_uint(values->FieldPic, 14, 14) | 908b8e80941Smrg __gen_uint(values->TopField, 15, 15); 909b8e80941Smrg} 910b8e80941Smrg 911b8e80941Smrg#define GEN10_HCP_TILE_POSITION_IN_CTB_length 1 912b8e80941Smrgstruct GEN10_HCP_TILE_POSITION_IN_CTB { 913b8e80941Smrg uint32_t CtbPos0i; 914b8e80941Smrg uint32_t CtbPos1i; 915b8e80941Smrg uint32_t CtbPos2i; 916b8e80941Smrg uint32_t CtbPos3i; 917b8e80941Smrg}; 918b8e80941Smrg 919b8e80941Smrgstatic inline void 920b8e80941SmrgGEN10_HCP_TILE_POSITION_IN_CTB_pack(__attribute__((unused)) __gen_user_data *data, 921b8e80941Smrg __attribute__((unused)) void * restrict dst, 922b8e80941Smrg __attribute__((unused)) const struct GEN10_HCP_TILE_POSITION_IN_CTB * restrict values) 923b8e80941Smrg{ 924b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 925b8e80941Smrg 926b8e80941Smrg dw[0] = 927b8e80941Smrg __gen_uint(values->CtbPos0i, 0, 7) | 928b8e80941Smrg __gen_uint(values->CtbPos1i, 8, 15) | 929b8e80941Smrg __gen_uint(values->CtbPos2i, 16, 23) | 930b8e80941Smrg __gen_uint(values->CtbPos3i, 24, 31); 931b8e80941Smrg} 932b8e80941Smrg 933b8e80941Smrg#define GEN10_HCP_WEIGHTOFFSET_CHROMA_ENTRY_length 1 934b8e80941Smrgstruct GEN10_HCP_WEIGHTOFFSET_CHROMA_ENTRY { 935b8e80941Smrg int32_t DeltaChromaWeightLX0; 936b8e80941Smrg uint32_t ChromaOffsetLX0; 937b8e80941Smrg int32_t DeltaChromaWeightLX1; 938b8e80941Smrg uint32_t ChromaOffsetLX1; 939b8e80941Smrg}; 940b8e80941Smrg 941b8e80941Smrgstatic inline void 942b8e80941SmrgGEN10_HCP_WEIGHTOFFSET_CHROMA_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 943b8e80941Smrg __attribute__((unused)) void * restrict dst, 944b8e80941Smrg __attribute__((unused)) const struct GEN10_HCP_WEIGHTOFFSET_CHROMA_ENTRY * restrict values) 945b8e80941Smrg{ 946b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 947b8e80941Smrg 948b8e80941Smrg dw[0] = 949b8e80941Smrg __gen_sint(values->DeltaChromaWeightLX0, 0, 7) | 950b8e80941Smrg __gen_uint(values->ChromaOffsetLX0, 8, 15) | 951b8e80941Smrg __gen_sint(values->DeltaChromaWeightLX1, 16, 23) | 952b8e80941Smrg __gen_uint(values->ChromaOffsetLX1, 24, 31); 953b8e80941Smrg} 954b8e80941Smrg 955b8e80941Smrg#define GEN10_HCP_WEIGHTOFFSET_LUMA_ENTRY_length 1 956b8e80941Smrgstruct GEN10_HCP_WEIGHTOFFSET_LUMA_ENTRY { 957b8e80941Smrg int32_t DeltaLumaWeightLX; 958b8e80941Smrg uint32_t LumaOffsetLX; 959b8e80941Smrg}; 960b8e80941Smrg 961b8e80941Smrgstatic inline void 962b8e80941SmrgGEN10_HCP_WEIGHTOFFSET_LUMA_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 963b8e80941Smrg __attribute__((unused)) void * restrict dst, 964b8e80941Smrg __attribute__((unused)) const struct GEN10_HCP_WEIGHTOFFSET_LUMA_ENTRY * restrict values) 965b8e80941Smrg{ 966b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 967b8e80941Smrg 968b8e80941Smrg dw[0] = 969b8e80941Smrg __gen_sint(values->DeltaLumaWeightLX, 0, 7) | 970b8e80941Smrg __gen_uint(values->LumaOffsetLX, 8, 15); 971b8e80941Smrg} 972b8e80941Smrg 973b8e80941Smrg#define GEN10_HEVC_VP9_RDOQ_LAMBDA_FIELDS_length 1 974b8e80941Smrgstruct GEN10_HEVC_VP9_RDOQ_LAMBDA_FIELDS { 975b8e80941Smrg uint32_t LambdaValue0; 976b8e80941Smrg uint32_t LambdaValue1; 977b8e80941Smrg}; 978b8e80941Smrg 979b8e80941Smrgstatic inline void 980b8e80941SmrgGEN10_HEVC_VP9_RDOQ_LAMBDA_FIELDS_pack(__attribute__((unused)) __gen_user_data *data, 981b8e80941Smrg __attribute__((unused)) void * restrict dst, 982b8e80941Smrg __attribute__((unused)) const struct GEN10_HEVC_VP9_RDOQ_LAMBDA_FIELDS * restrict values) 983b8e80941Smrg{ 984b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 985b8e80941Smrg 986b8e80941Smrg dw[0] = 987b8e80941Smrg __gen_uint(values->LambdaValue0, 0, 15) | 988b8e80941Smrg __gen_uint(values->LambdaValue1, 16, 31); 989b8e80941Smrg} 990b8e80941Smrg 991b8e80941Smrg#define GEN10_HUC_VIRTUAL_ADDR_REGION_length 3 992b8e80941Smrgstruct GEN10_HUC_VIRTUAL_ADDR_REGION { 993b8e80941Smrg __gen_address_type Address; 994b8e80941Smrg struct GEN10_MEMORYADDRESSATTRIBUTES MemoryAddressAttributes; 995b8e80941Smrg}; 996b8e80941Smrg 997b8e80941Smrgstatic inline void 998b8e80941SmrgGEN10_HUC_VIRTUAL_ADDR_REGION_pack(__attribute__((unused)) __gen_user_data *data, 999b8e80941Smrg __attribute__((unused)) void * restrict dst, 1000b8e80941Smrg __attribute__((unused)) const struct GEN10_HUC_VIRTUAL_ADDR_REGION * restrict values) 1001b8e80941Smrg{ 1002b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1003b8e80941Smrg 1004b8e80941Smrg const uint64_t v0_address = 1005b8e80941Smrg __gen_combine_address(data, &dw[0], values->Address, 0); 1006b8e80941Smrg dw[0] = v0_address; 1007b8e80941Smrg dw[1] = v0_address >> 32; 1008b8e80941Smrg 1009b8e80941Smrg GEN10_MEMORYADDRESSATTRIBUTES_pack(data, &dw[2], &values->MemoryAddressAttributes); 1010b8e80941Smrg} 1011b8e80941Smrg 1012b8e80941Smrg#define GEN10_IMAGE_STATE_COST_length 2 1013b8e80941Smrgstruct GEN10_IMAGE_STATE_COST { 1014b8e80941Smrg uint32_t MV0Cost; 1015b8e80941Smrg uint32_t MV1Cost; 1016b8e80941Smrg uint32_t MV2Cost; 1017b8e80941Smrg uint32_t MV3Cost; 1018b8e80941Smrg uint32_t MV4Cost; 1019b8e80941Smrg uint32_t MV5Cost; 1020b8e80941Smrg uint32_t MV6Cost; 1021b8e80941Smrg uint32_t MV7Cost; 1022b8e80941Smrg}; 1023b8e80941Smrg 1024b8e80941Smrgstatic inline void 1025b8e80941SmrgGEN10_IMAGE_STATE_COST_pack(__attribute__((unused)) __gen_user_data *data, 1026b8e80941Smrg __attribute__((unused)) void * restrict dst, 1027b8e80941Smrg __attribute__((unused)) const struct GEN10_IMAGE_STATE_COST * restrict values) 1028b8e80941Smrg{ 1029b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1030b8e80941Smrg 1031b8e80941Smrg dw[0] = 1032b8e80941Smrg __gen_uint(values->MV0Cost, 0, 7) | 1033b8e80941Smrg __gen_uint(values->MV1Cost, 8, 15) | 1034b8e80941Smrg __gen_uint(values->MV2Cost, 16, 23) | 1035b8e80941Smrg __gen_uint(values->MV3Cost, 24, 31); 1036b8e80941Smrg 1037b8e80941Smrg dw[1] = 1038b8e80941Smrg __gen_uint(values->MV4Cost, 0, 7) | 1039b8e80941Smrg __gen_uint(values->MV5Cost, 8, 15) | 1040b8e80941Smrg __gen_uint(values->MV6Cost, 16, 23) | 1041b8e80941Smrg __gen_uint(values->MV7Cost, 24, 31); 1042b8e80941Smrg} 1043b8e80941Smrg 1044b8e80941Smrg#define GEN10_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_length 3 1045b8e80941Smrgstruct GEN10_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT { 1046b8e80941Smrg bool MBErrorConcealmentPSliceWeightPredictionDisableFlag; 1047b8e80941Smrg bool MBErrorConcealmentPSliceMotionVectorsOverrideDisableFlag; 1048b8e80941Smrg bool MBErrorConcealmentBSpatialWeightPredictionDisableFlag; 1049b8e80941Smrg bool MBErrorConcealmentBSpatialMotionVectorsOverrideDisableFlag; 1050b8e80941Smrg uint32_t MBErrorConcealmentBSpatialPredictionMode; 1051b8e80941Smrg bool MBHeaderErrorHandling; 1052b8e80941Smrg bool EntropyErrorHandling; 1053b8e80941Smrg bool MPRErrorHandling; 1054b8e80941Smrg bool BSDPrematureCompleteErrorHandling; 1055b8e80941Smrg uint32_t ConcealmentPictureID; 1056b8e80941Smrg bool MBErrorConcealmentBTemporalWeightPredictionDisable; 1057b8e80941Smrg bool MBErrorConcealmentBTemporalMotionVectorsOverrideEnable; 1058b8e80941Smrg uint32_t MBErrorConcealmentBTemporalPredictionMode; 1059b8e80941Smrg bool IntraPredMode4x48x8LumaErrorControl; 1060b8e80941Smrg bool InitCurrentMBNumber; 1061b8e80941Smrg uint32_t ConcealmentMethod; 1062b8e80941Smrg uint32_t FirstMBBitOffset; 1063b8e80941Smrg bool LastSlice; 1064b8e80941Smrg bool EmulationPreventionBytePresent; 1065b8e80941Smrg bool FixPrevMBSkipped; 1066b8e80941Smrg uint32_t FirstMBByteOffsetofSliceDataorSliceHeader; 1067b8e80941Smrg bool IntraPredictionErrorControl; 1068b8e80941Smrg bool Intra8x84x4PredictionErrorConcealmentControl; 1069b8e80941Smrg uint32_t BSliceTemporalInterConcealmentMode; 1070b8e80941Smrg uint32_t BSliceSpatialInterConcealmentMode; 1071b8e80941Smrg uint32_t BSliceInterDirectTypeConcealmentMode; 1072b8e80941Smrg uint32_t BSliceConcealmentMode; 1073b8e80941Smrg#define IntraConcealment 1 1074b8e80941Smrg#define InterConcealment 0 1075b8e80941Smrg uint32_t PSliceInterConcealmentMode; 1076b8e80941Smrg uint32_t PSliceConcealmentMode; 1077b8e80941Smrg#define IntraConcealment 1 1078b8e80941Smrg#define InterConcealment 0 1079b8e80941Smrg uint32_t ConcealmentReferencePictureFieldBit; 1080b8e80941Smrg uint32_t ISliceConcealmentMode; 1081b8e80941Smrg#define IntraConcealment 1 1082b8e80941Smrg#define InterConcealment 0 1083b8e80941Smrg}; 1084b8e80941Smrg 1085b8e80941Smrgstatic inline void 1086b8e80941SmrgGEN10_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 1087b8e80941Smrg __attribute__((unused)) void * restrict dst, 1088b8e80941Smrg __attribute__((unused)) const struct GEN10_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT * restrict values) 1089b8e80941Smrg{ 1090b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1091b8e80941Smrg 1092b8e80941Smrg dw[0] = 1093b8e80941Smrg __gen_uint(values->MBErrorConcealmentPSliceWeightPredictionDisableFlag, 0, 0) | 1094b8e80941Smrg __gen_uint(values->MBErrorConcealmentPSliceMotionVectorsOverrideDisableFlag, 1, 1) | 1095b8e80941Smrg __gen_uint(values->MBErrorConcealmentBSpatialWeightPredictionDisableFlag, 3, 3) | 1096b8e80941Smrg __gen_uint(values->MBErrorConcealmentBSpatialMotionVectorsOverrideDisableFlag, 4, 4) | 1097b8e80941Smrg __gen_uint(values->MBErrorConcealmentBSpatialPredictionMode, 6, 7) | 1098b8e80941Smrg __gen_uint(values->MBHeaderErrorHandling, 8, 8) | 1099b8e80941Smrg __gen_uint(values->EntropyErrorHandling, 10, 10) | 1100b8e80941Smrg __gen_uint(values->MPRErrorHandling, 12, 12) | 1101b8e80941Smrg __gen_uint(values->BSDPrematureCompleteErrorHandling, 14, 14) | 1102b8e80941Smrg __gen_uint(values->ConcealmentPictureID, 16, 21) | 1103b8e80941Smrg __gen_uint(values->MBErrorConcealmentBTemporalWeightPredictionDisable, 24, 24) | 1104b8e80941Smrg __gen_uint(values->MBErrorConcealmentBTemporalMotionVectorsOverrideEnable, 25, 25) | 1105b8e80941Smrg __gen_uint(values->MBErrorConcealmentBTemporalPredictionMode, 27, 28) | 1106b8e80941Smrg __gen_uint(values->IntraPredMode4x48x8LumaErrorControl, 29, 29) | 1107b8e80941Smrg __gen_uint(values->InitCurrentMBNumber, 30, 30) | 1108b8e80941Smrg __gen_uint(values->ConcealmentMethod, 31, 31); 1109b8e80941Smrg 1110b8e80941Smrg dw[1] = 1111b8e80941Smrg __gen_uint(values->FirstMBBitOffset, 0, 2) | 1112b8e80941Smrg __gen_uint(values->LastSlice, 3, 3) | 1113b8e80941Smrg __gen_uint(values->EmulationPreventionBytePresent, 4, 4) | 1114b8e80941Smrg __gen_uint(values->FixPrevMBSkipped, 7, 7) | 1115b8e80941Smrg __gen_uint(values->FirstMBByteOffsetofSliceDataorSliceHeader, 16, 31); 1116b8e80941Smrg 1117b8e80941Smrg dw[2] = 1118b8e80941Smrg __gen_uint(values->IntraPredictionErrorControl, 0, 0) | 1119b8e80941Smrg __gen_uint(values->Intra8x84x4PredictionErrorConcealmentControl, 1, 1) | 1120b8e80941Smrg __gen_uint(values->BSliceTemporalInterConcealmentMode, 4, 6) | 1121b8e80941Smrg __gen_uint(values->BSliceSpatialInterConcealmentMode, 8, 10) | 1122b8e80941Smrg __gen_uint(values->BSliceInterDirectTypeConcealmentMode, 12, 13) | 1123b8e80941Smrg __gen_uint(values->BSliceConcealmentMode, 15, 15) | 1124b8e80941Smrg __gen_uint(values->PSliceInterConcealmentMode, 16, 18) | 1125b8e80941Smrg __gen_uint(values->PSliceConcealmentMode, 23, 23) | 1126b8e80941Smrg __gen_uint(values->ConcealmentReferencePictureFieldBit, 24, 29) | 1127b8e80941Smrg __gen_uint(values->ISliceConcealmentMode, 31, 31); 1128b8e80941Smrg} 1129b8e80941Smrg 1130b8e80941Smrg#define GEN10_INTERFACE_DESCRIPTOR_DATA_length 8 1131b8e80941Smrgstruct GEN10_INTERFACE_DESCRIPTOR_DATA { 1132b8e80941Smrg uint64_t KernelStartPointer; 1133b8e80941Smrg bool SoftwareExceptionEnable; 1134b8e80941Smrg bool MaskStackExceptionEnable; 1135b8e80941Smrg bool IllegalOpcodeExceptionEnable; 1136b8e80941Smrg uint32_t FloatingPointMode; 1137b8e80941Smrg#define IEEE754 0 1138b8e80941Smrg#define Alternate 1 1139b8e80941Smrg uint32_t ThreadPriority; 1140b8e80941Smrg#define NormalPriority 0 1141b8e80941Smrg#define HighPriority 1 1142b8e80941Smrg bool SingleProgramFlow; 1143b8e80941Smrg uint32_t DenormMode; 1144b8e80941Smrg#define Ftz 0 1145b8e80941Smrg#define SetByKernel 1 1146b8e80941Smrg bool ThreadPreemptiondisable; 1147b8e80941Smrg uint32_t SamplerCount; 1148b8e80941Smrg#define Nosamplersused 0 1149b8e80941Smrg#define Between1and4samplersused 1 1150b8e80941Smrg#define Between5and8samplersused 2 1151b8e80941Smrg#define Between9and12samplersused 3 1152b8e80941Smrg#define Between13and16samplersused 4 1153b8e80941Smrg uint64_t SamplerStatePointer; 1154b8e80941Smrg uint32_t BindingTableEntryCount; 1155b8e80941Smrg uint64_t BindingTablePointer; 1156b8e80941Smrg uint32_t ConstantURBEntryReadOffset; 1157b8e80941Smrg uint32_t ConstantURBEntryReadLength; 1158b8e80941Smrg uint32_t NumberofThreadsinGPGPUThreadGroup; 1159b8e80941Smrg bool GlobalBarrierEnable; 1160b8e80941Smrg uint32_t SharedLocalMemorySize; 1161b8e80941Smrg#define Encodes0K 0 1162b8e80941Smrg#define Encodes1K 1 1163b8e80941Smrg#define Encodes2K 2 1164b8e80941Smrg#define Encodes4K 3 1165b8e80941Smrg#define Encodes8K 4 1166b8e80941Smrg#define Encodes16K 5 1167b8e80941Smrg#define Encodes32K 6 1168b8e80941Smrg#define Encodes64K 7 1169b8e80941Smrg bool BarrierEnable; 1170b8e80941Smrg uint32_t RoundingMode; 1171b8e80941Smrg#define RTNE 0 1172b8e80941Smrg#define RU 1 1173b8e80941Smrg#define RD 2 1174b8e80941Smrg#define RTZ 3 1175b8e80941Smrg uint32_t CrossThreadConstantDataReadLength; 1176b8e80941Smrg}; 1177b8e80941Smrg 1178b8e80941Smrgstatic inline void 1179b8e80941SmrgGEN10_INTERFACE_DESCRIPTOR_DATA_pack(__attribute__((unused)) __gen_user_data *data, 1180b8e80941Smrg __attribute__((unused)) void * restrict dst, 1181b8e80941Smrg __attribute__((unused)) const struct GEN10_INTERFACE_DESCRIPTOR_DATA * restrict values) 1182b8e80941Smrg{ 1183b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1184b8e80941Smrg 1185b8e80941Smrg const uint64_t v0 = 1186b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 47); 1187b8e80941Smrg dw[0] = v0; 1188b8e80941Smrg dw[1] = v0 >> 32; 1189b8e80941Smrg 1190b8e80941Smrg dw[2] = 1191b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 1192b8e80941Smrg __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 1193b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 1194b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 1195b8e80941Smrg __gen_uint(values->ThreadPriority, 17, 17) | 1196b8e80941Smrg __gen_uint(values->SingleProgramFlow, 18, 18) | 1197b8e80941Smrg __gen_uint(values->DenormMode, 19, 19) | 1198b8e80941Smrg __gen_uint(values->ThreadPreemptiondisable, 20, 20); 1199b8e80941Smrg 1200b8e80941Smrg dw[3] = 1201b8e80941Smrg __gen_uint(values->SamplerCount, 2, 4) | 1202b8e80941Smrg __gen_offset(values->SamplerStatePointer, 5, 31); 1203b8e80941Smrg 1204b8e80941Smrg dw[4] = 1205b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 0, 4) | 1206b8e80941Smrg __gen_offset(values->BindingTablePointer, 5, 15); 1207b8e80941Smrg 1208b8e80941Smrg dw[5] = 1209b8e80941Smrg __gen_uint(values->ConstantURBEntryReadOffset, 0, 15) | 1210b8e80941Smrg __gen_uint(values->ConstantURBEntryReadLength, 16, 31); 1211b8e80941Smrg 1212b8e80941Smrg dw[6] = 1213b8e80941Smrg __gen_uint(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) | 1214b8e80941Smrg __gen_uint(values->GlobalBarrierEnable, 15, 15) | 1215b8e80941Smrg __gen_uint(values->SharedLocalMemorySize, 16, 20) | 1216b8e80941Smrg __gen_uint(values->BarrierEnable, 21, 21) | 1217b8e80941Smrg __gen_uint(values->RoundingMode, 22, 23); 1218b8e80941Smrg 1219b8e80941Smrg dw[7] = 1220b8e80941Smrg __gen_uint(values->CrossThreadConstantDataReadLength, 0, 7); 1221b8e80941Smrg} 1222b8e80941Smrg 1223b8e80941Smrg#define GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_length 4 1224b8e80941Smrgstruct GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY { 1225b8e80941Smrg float Table0XFilterCoefficientn0; 1226b8e80941Smrg float Table0YFilterCoefficientn0; 1227b8e80941Smrg float Table0XFilterCoefficientn1; 1228b8e80941Smrg float Table0YFilterCoefficientn1; 1229b8e80941Smrg float Table0XFilterCoefficientn2; 1230b8e80941Smrg float Table0YFilterCoefficientn2; 1231b8e80941Smrg float Table0XFilterCoefficientn3; 1232b8e80941Smrg float Table0YFilterCoefficientn3; 1233b8e80941Smrg float Table0XFilterCoefficientn4; 1234b8e80941Smrg float Table0YFilterCoefficientn4; 1235b8e80941Smrg float Table0XFilterCoefficientn5; 1236b8e80941Smrg float Table0YFilterCoefficientn5; 1237b8e80941Smrg float Table0XFilterCoefficientn6; 1238b8e80941Smrg float Table0YFilterCoefficientn6; 1239b8e80941Smrg float Table0XFilterCoefficientn7; 1240b8e80941Smrg float Table0YFilterCoefficientn7; 1241b8e80941Smrg}; 1242b8e80941Smrg 1243b8e80941Smrgstatic inline void 1244b8e80941SmrgGEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(__attribute__((unused)) __gen_user_data *data, 1245b8e80941Smrg __attribute__((unused)) void * restrict dst, 1246b8e80941Smrg __attribute__((unused)) const struct GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY * restrict values) 1247b8e80941Smrg{ 1248b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1249b8e80941Smrg 1250b8e80941Smrg dw[0] = 1251b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn0, 0, 7, 6) | 1252b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn0, 8, 15, 6) | 1253b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn1, 16, 23, 6) | 1254b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn1, 24, 31, 6); 1255b8e80941Smrg 1256b8e80941Smrg dw[1] = 1257b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn2, 0, 7, 6) | 1258b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn2, 8, 15, 6) | 1259b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn3, 16, 23, 6) | 1260b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn3, 24, 31, 6); 1261b8e80941Smrg 1262b8e80941Smrg dw[2] = 1263b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn4, 0, 7, 6) | 1264b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn4, 8, 15, 6) | 1265b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn5, 16, 23, 6) | 1266b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn5, 24, 31, 6); 1267b8e80941Smrg 1268b8e80941Smrg dw[3] = 1269b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn6, 0, 7, 6) | 1270b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn6, 8, 15, 6) | 1271b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn7, 16, 23, 6) | 1272b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn7, 24, 31, 6); 1273b8e80941Smrg} 1274b8e80941Smrg 1275b8e80941Smrg#define GEN10_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_length 2 1276b8e80941Smrgstruct GEN10_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION { 1277b8e80941Smrg uint32_t FirstMBBitOffset; 1278b8e80941Smrg bool LastMB; 1279b8e80941Smrg bool LastPicSlice; 1280b8e80941Smrg uint32_t SliceConcealmentType; 1281b8e80941Smrg uint32_t SliceConcealmentOverride; 1282b8e80941Smrg uint32_t MBCount; 1283b8e80941Smrg uint32_t SliceVerticalPosition; 1284b8e80941Smrg uint32_t SliceHorizontalPosition; 1285b8e80941Smrg uint32_t NextSliceHorizontalPosition; 1286b8e80941Smrg uint32_t NextSliceVerticalPosition; 1287b8e80941Smrg uint32_t QuantizerScaleCode; 1288b8e80941Smrg}; 1289b8e80941Smrg 1290b8e80941Smrgstatic inline void 1291b8e80941SmrgGEN10_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_pack(__attribute__((unused)) __gen_user_data *data, 1292b8e80941Smrg __attribute__((unused)) void * restrict dst, 1293b8e80941Smrg __attribute__((unused)) const struct GEN10_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION * restrict values) 1294b8e80941Smrg{ 1295b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1296b8e80941Smrg 1297b8e80941Smrg dw[0] = 1298b8e80941Smrg __gen_uint(values->FirstMBBitOffset, 0, 2) | 1299b8e80941Smrg __gen_uint(values->LastMB, 3, 3) | 1300b8e80941Smrg __gen_uint(values->LastPicSlice, 5, 5) | 1301b8e80941Smrg __gen_uint(values->SliceConcealmentType, 6, 6) | 1302b8e80941Smrg __gen_uint(values->SliceConcealmentOverride, 7, 7) | 1303b8e80941Smrg __gen_uint(values->MBCount, 8, 15) | 1304b8e80941Smrg __gen_uint(values->SliceVerticalPosition, 16, 23) | 1305b8e80941Smrg __gen_uint(values->SliceHorizontalPosition, 24, 31); 1306b8e80941Smrg 1307b8e80941Smrg dw[1] = 1308b8e80941Smrg __gen_uint(values->NextSliceHorizontalPosition, 0, 7) | 1309b8e80941Smrg __gen_uint(values->NextSliceVerticalPosition, 8, 16) | 1310b8e80941Smrg __gen_uint(values->QuantizerScaleCode, 24, 28); 1311b8e80941Smrg} 1312b8e80941Smrg 1313b8e80941Smrg#define GEN10_MI_MATH_ALU_INSTRUCTION_length 1 1314b8e80941Smrgstruct GEN10_MI_MATH_ALU_INSTRUCTION { 1315b8e80941Smrg uint32_t Operand2; 1316b8e80941Smrg#define MI_ALU_REG0 0 1317b8e80941Smrg#define MI_ALU_REG1 1 1318b8e80941Smrg#define MI_ALU_REG2 2 1319b8e80941Smrg#define MI_ALU_REG3 3 1320b8e80941Smrg#define MI_ALU_REG4 4 1321b8e80941Smrg#define MI_ALU_REG5 5 1322b8e80941Smrg#define MI_ALU_REG6 6 1323b8e80941Smrg#define MI_ALU_REG7 7 1324b8e80941Smrg#define MI_ALU_REG8 8 1325b8e80941Smrg#define MI_ALU_REG9 9 1326b8e80941Smrg#define MI_ALU_REG10 10 1327b8e80941Smrg#define MI_ALU_REG11 11 1328b8e80941Smrg#define MI_ALU_REG12 12 1329b8e80941Smrg#define MI_ALU_REG13 13 1330b8e80941Smrg#define MI_ALU_REG14 14 1331b8e80941Smrg#define MI_ALU_REG15 15 1332b8e80941Smrg#define MI_ALU_SRCA 32 1333b8e80941Smrg#define MI_ALU_SRCB 33 1334b8e80941Smrg#define MI_ALU_ACCU 49 1335b8e80941Smrg#define MI_ALU_ZF 50 1336b8e80941Smrg#define MI_ALU_CF 51 1337b8e80941Smrg uint32_t Operand1; 1338b8e80941Smrg#define MI_ALU_REG0 0 1339b8e80941Smrg#define MI_ALU_REG1 1 1340b8e80941Smrg#define MI_ALU_REG2 2 1341b8e80941Smrg#define MI_ALU_REG3 3 1342b8e80941Smrg#define MI_ALU_REG4 4 1343b8e80941Smrg#define MI_ALU_REG5 5 1344b8e80941Smrg#define MI_ALU_REG6 6 1345b8e80941Smrg#define MI_ALU_REG7 7 1346b8e80941Smrg#define MI_ALU_REG8 8 1347b8e80941Smrg#define MI_ALU_REG9 9 1348b8e80941Smrg#define MI_ALU_REG10 10 1349b8e80941Smrg#define MI_ALU_REG11 11 1350b8e80941Smrg#define MI_ALU_REG12 12 1351b8e80941Smrg#define MI_ALU_REG13 13 1352b8e80941Smrg#define MI_ALU_REG14 14 1353b8e80941Smrg#define MI_ALU_REG15 15 1354b8e80941Smrg#define MI_ALU_SRCA 32 1355b8e80941Smrg#define MI_ALU_SRCB 33 1356b8e80941Smrg#define MI_ALU_ACCU 49 1357b8e80941Smrg#define MI_ALU_ZF 50 1358b8e80941Smrg#define MI_ALU_CF 51 1359b8e80941Smrg uint32_t ALUOpcode; 1360b8e80941Smrg#define MI_ALU_NOOP 0 1361b8e80941Smrg#define MI_ALU_LOAD 128 1362b8e80941Smrg#define MI_ALU_LOADINV 1152 1363b8e80941Smrg#define MI_ALU_LOAD0 129 1364b8e80941Smrg#define MI_ALU_LOAD1 1153 1365b8e80941Smrg#define MI_ALU_ADD 256 1366b8e80941Smrg#define MI_ALU_SUB 257 1367b8e80941Smrg#define MI_ALU_AND 258 1368b8e80941Smrg#define MI_ALU_OR 259 1369b8e80941Smrg#define MI_ALU_XOR 260 1370b8e80941Smrg#define MI_ALU_STORE 384 1371b8e80941Smrg#define MI_ALU_STOREINV 1408 1372b8e80941Smrg}; 1373b8e80941Smrg 1374b8e80941Smrgstatic inline void 1375b8e80941SmrgGEN10_MI_MATH_ALU_INSTRUCTION_pack(__attribute__((unused)) __gen_user_data *data, 1376b8e80941Smrg __attribute__((unused)) void * restrict dst, 1377b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_MATH_ALU_INSTRUCTION * restrict values) 1378b8e80941Smrg{ 1379b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1380b8e80941Smrg 1381b8e80941Smrg dw[0] = 1382b8e80941Smrg __gen_uint(values->Operand2, 0, 9) | 1383b8e80941Smrg __gen_uint(values->Operand1, 10, 19) | 1384b8e80941Smrg __gen_uint(values->ALUOpcode, 20, 31); 1385b8e80941Smrg} 1386b8e80941Smrg 1387b8e80941Smrg#define GEN10_PALETTE_ENTRY_length 1 1388b8e80941Smrgstruct GEN10_PALETTE_ENTRY { 1389b8e80941Smrg uint32_t Blue; 1390b8e80941Smrg uint32_t Green; 1391b8e80941Smrg uint32_t Red; 1392b8e80941Smrg uint32_t Alpha; 1393b8e80941Smrg}; 1394b8e80941Smrg 1395b8e80941Smrgstatic inline void 1396b8e80941SmrgGEN10_PALETTE_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 1397b8e80941Smrg __attribute__((unused)) void * restrict dst, 1398b8e80941Smrg __attribute__((unused)) const struct GEN10_PALETTE_ENTRY * restrict values) 1399b8e80941Smrg{ 1400b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1401b8e80941Smrg 1402b8e80941Smrg dw[0] = 1403b8e80941Smrg __gen_uint(values->Blue, 0, 7) | 1404b8e80941Smrg __gen_uint(values->Green, 8, 15) | 1405b8e80941Smrg __gen_uint(values->Red, 16, 23) | 1406b8e80941Smrg __gen_uint(values->Alpha, 24, 31); 1407b8e80941Smrg} 1408b8e80941Smrg 1409b8e80941Smrg#define GEN10_RENDER_SURFACE_STATE_length 16 1410b8e80941Smrgstruct GEN10_RENDER_SURFACE_STATE { 1411b8e80941Smrg bool CubeFaceEnablePositiveZ; 1412b8e80941Smrg bool CubeFaceEnableNegativeZ; 1413b8e80941Smrg bool CubeFaceEnablePositiveY; 1414b8e80941Smrg bool CubeFaceEnableNegativeY; 1415b8e80941Smrg bool CubeFaceEnablePositiveX; 1416b8e80941Smrg bool CubeFaceEnableNegativeX; 1417b8e80941Smrg uint32_t MediaBoundaryPixelMode; 1418b8e80941Smrg#define NORMAL_MODE 0 1419b8e80941Smrg#define PROGRESSIVE_FRAME 2 1420b8e80941Smrg#define INTERLACED_FRAME 3 1421b8e80941Smrg uint32_t RenderCacheReadWriteMode; 1422b8e80941Smrg#define WriteOnlyCache 0 1423b8e80941Smrg#define ReadWriteCache 1 1424b8e80941Smrg bool SamplerL2BypassModeDisable; 1425b8e80941Smrg uint32_t VerticalLineStrideOffset; 1426b8e80941Smrg uint32_t VerticalLineStride; 1427b8e80941Smrg uint32_t TileMode; 1428b8e80941Smrg#define LINEAR 0 1429b8e80941Smrg#define WMAJOR 1 1430b8e80941Smrg#define XMAJOR 2 1431b8e80941Smrg#define YMAJOR 3 1432b8e80941Smrg uint32_t SurfaceHorizontalAlignment; 1433b8e80941Smrg#define HALIGN4 1 1434b8e80941Smrg#define HALIGN8 2 1435b8e80941Smrg#define HALIGN16 3 1436b8e80941Smrg uint32_t SurfaceVerticalAlignment; 1437b8e80941Smrg#define VALIGN4 1 1438b8e80941Smrg#define VALIGN8 2 1439b8e80941Smrg#define VALIGN16 3 1440b8e80941Smrg uint32_t SurfaceFormat; 1441b8e80941Smrg bool SurfaceArray; 1442b8e80941Smrg uint32_t SurfaceType; 1443b8e80941Smrg#define SURFTYPE_1D 0 1444b8e80941Smrg#define SURFTYPE_2D 1 1445b8e80941Smrg#define SURFTYPE_3D 2 1446b8e80941Smrg#define SURFTYPE_CUBE 3 1447b8e80941Smrg#define SURFTYPE_BUFFER 4 1448b8e80941Smrg#define SURFTYPE_STRBUF 5 1449b8e80941Smrg#define SURFTYPE_NULL 7 1450b8e80941Smrg uint32_t SurfaceQPitch; 1451b8e80941Smrg float BaseMipLevel; 1452b8e80941Smrg uint32_t MOCS; 1453b8e80941Smrg uint32_t Width; 1454b8e80941Smrg uint32_t Height; 1455b8e80941Smrg uint32_t SurfacePitch; 1456b8e80941Smrg uint32_t TileAddressMappingMode; 1457b8e80941Smrg#define Gen9 0 1458b8e80941Smrg#define Gen10 1 1459b8e80941Smrg uint32_t Depth; 1460b8e80941Smrg uint32_t MultisamplePositionPaletteIndex; 1461b8e80941Smrg uint32_t NumberofMultisamples; 1462b8e80941Smrg#define MULTISAMPLECOUNT_1 0 1463b8e80941Smrg#define MULTISAMPLECOUNT_2 1 1464b8e80941Smrg#define MULTISAMPLECOUNT_4 2 1465b8e80941Smrg#define MULTISAMPLECOUNT_8 3 1466b8e80941Smrg#define MULTISAMPLECOUNT_16 4 1467b8e80941Smrg uint32_t MultisampledSurfaceStorageFormat; 1468b8e80941Smrg#define MSFMT_MSS 0 1469b8e80941Smrg#define MSFMT_DEPTH_STENCIL 1 1470b8e80941Smrg uint32_t RenderTargetViewExtent; 1471b8e80941Smrg uint32_t MinimumArrayElement; 1472b8e80941Smrg uint32_t RenderTargetAndSampleUnormRotation; 1473b8e80941Smrg#define _0DEG 0 1474b8e80941Smrg#define _90DEG 1 1475b8e80941Smrg#define _180DEG 2 1476b8e80941Smrg#define _270DEG 3 1477b8e80941Smrg bool ForceNonComparisonReductionType; 1478b8e80941Smrg uint32_t MIPCountLOD; 1479b8e80941Smrg uint32_t SurfaceMinLOD; 1480b8e80941Smrg uint32_t MipTailStartLOD; 1481b8e80941Smrg uint32_t CoherencyType; 1482b8e80941Smrg#define GPUcoherent 0 1483b8e80941Smrg#define IAcoherent 1 1484b8e80941Smrg uint32_t TiledResourceMode; 1485b8e80941Smrg#define NONE 0 1486b8e80941Smrg#define _4KB 1 1487b8e80941Smrg#define _64KB 2 1488b8e80941Smrg#define TILEYF 1 1489b8e80941Smrg#define TILEYS 2 1490b8e80941Smrg bool EWADisableForCube; 1491b8e80941Smrg uint32_t YOffset; 1492b8e80941Smrg uint32_t XOffset; 1493b8e80941Smrg uint32_t AuxiliarySurfaceMode; 1494b8e80941Smrg#define AUX_NONE 0 1495b8e80941Smrg#define AUX_CCS_D 1 1496b8e80941Smrg#define AUX_APPEND 2 1497b8e80941Smrg#define AUX_HIZ 3 1498b8e80941Smrg#define AUX_CCS_E 5 1499b8e80941Smrg uint32_t YOffsetforUorUVPlane; 1500b8e80941Smrg uint32_t AuxiliarySurfacePitch; 1501b8e80941Smrg uint32_t AuxiliarySurfaceQPitch; 1502b8e80941Smrg uint32_t XOffsetforUorUVPlane; 1503b8e80941Smrg bool SeparateUVPlaneEnable; 1504b8e80941Smrg float ResourceMinLOD; 1505b8e80941Smrg enum GEN10_ShaderChannelSelect ShaderChannelSelectAlpha; 1506b8e80941Smrg enum GEN10_ShaderChannelSelect ShaderChannelSelectBlue; 1507b8e80941Smrg enum GEN10_ShaderChannelSelect ShaderChannelSelectGreen; 1508b8e80941Smrg enum GEN10_ShaderChannelSelect ShaderChannelSelectRed; 1509b8e80941Smrg bool MemoryCompressionEnable; 1510b8e80941Smrg uint32_t MemoryCompressionMode; 1511b8e80941Smrg#define Horizontal 0 1512b8e80941Smrg#define Vertical 1 1513b8e80941Smrg __gen_address_type SurfaceBaseAddress; 1514b8e80941Smrg uint32_t QuiltWidth; 1515b8e80941Smrg uint32_t QuiltHeight; 1516b8e80941Smrg bool ClearValueAddressEnable; 1517b8e80941Smrg __gen_address_type AuxiliarySurfaceBaseAddress; 1518b8e80941Smrg uint32_t AuxiliaryTableIndexforMediaCompressedSurface; 1519b8e80941Smrg uint32_t YOffsetforVPlane; 1520b8e80941Smrg uint32_t XOffsetforVPlane; 1521b8e80941Smrg int32_t RedClearColor; 1522b8e80941Smrg __gen_address_type ClearValueAddress; 1523b8e80941Smrg int32_t GreenClearColor; 1524b8e80941Smrg int32_t BlueClearColor; 1525b8e80941Smrg int32_t AlphaClearColor; 1526b8e80941Smrg}; 1527b8e80941Smrg 1528b8e80941Smrgstatic inline void 1529b8e80941SmrgGEN10_RENDER_SURFACE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1530b8e80941Smrg __attribute__((unused)) void * restrict dst, 1531b8e80941Smrg __attribute__((unused)) const struct GEN10_RENDER_SURFACE_STATE * restrict values) 1532b8e80941Smrg{ 1533b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1534b8e80941Smrg 1535b8e80941Smrg dw[0] = 1536b8e80941Smrg __gen_uint(values->CubeFaceEnablePositiveZ, 0, 0) | 1537b8e80941Smrg __gen_uint(values->CubeFaceEnableNegativeZ, 1, 1) | 1538b8e80941Smrg __gen_uint(values->CubeFaceEnablePositiveY, 2, 2) | 1539b8e80941Smrg __gen_uint(values->CubeFaceEnableNegativeY, 3, 3) | 1540b8e80941Smrg __gen_uint(values->CubeFaceEnablePositiveX, 4, 4) | 1541b8e80941Smrg __gen_uint(values->CubeFaceEnableNegativeX, 5, 5) | 1542b8e80941Smrg __gen_uint(values->MediaBoundaryPixelMode, 6, 7) | 1543b8e80941Smrg __gen_uint(values->RenderCacheReadWriteMode, 8, 8) | 1544b8e80941Smrg __gen_uint(values->SamplerL2BypassModeDisable, 9, 9) | 1545b8e80941Smrg __gen_uint(values->VerticalLineStrideOffset, 10, 10) | 1546b8e80941Smrg __gen_uint(values->VerticalLineStride, 11, 11) | 1547b8e80941Smrg __gen_uint(values->TileMode, 12, 13) | 1548b8e80941Smrg __gen_uint(values->SurfaceHorizontalAlignment, 14, 15) | 1549b8e80941Smrg __gen_uint(values->SurfaceVerticalAlignment, 16, 17) | 1550b8e80941Smrg __gen_uint(values->SurfaceFormat, 18, 27) | 1551b8e80941Smrg __gen_uint(values->SurfaceArray, 28, 28) | 1552b8e80941Smrg __gen_uint(values->SurfaceType, 29, 31); 1553b8e80941Smrg 1554b8e80941Smrg dw[1] = 1555b8e80941Smrg __gen_uint(values->SurfaceQPitch, 0, 14) | 1556b8e80941Smrg __gen_ufixed(values->BaseMipLevel, 19, 23, 1) | 1557b8e80941Smrg __gen_uint(values->MOCS, 24, 30); 1558b8e80941Smrg 1559b8e80941Smrg dw[2] = 1560b8e80941Smrg __gen_uint(values->Width, 0, 13) | 1561b8e80941Smrg __gen_uint(values->Height, 16, 29); 1562b8e80941Smrg 1563b8e80941Smrg dw[3] = 1564b8e80941Smrg __gen_uint(values->SurfacePitch, 0, 17) | 1565b8e80941Smrg __gen_uint(values->TileAddressMappingMode, 20, 20) | 1566b8e80941Smrg __gen_uint(values->Depth, 21, 31); 1567b8e80941Smrg 1568b8e80941Smrg dw[4] = 1569b8e80941Smrg __gen_uint(values->MultisamplePositionPaletteIndex, 0, 2) | 1570b8e80941Smrg __gen_uint(values->NumberofMultisamples, 3, 5) | 1571b8e80941Smrg __gen_uint(values->MultisampledSurfaceStorageFormat, 6, 6) | 1572b8e80941Smrg __gen_uint(values->RenderTargetViewExtent, 7, 17) | 1573b8e80941Smrg __gen_uint(values->MinimumArrayElement, 18, 28) | 1574b8e80941Smrg __gen_uint(values->RenderTargetAndSampleUnormRotation, 29, 30) | 1575b8e80941Smrg __gen_uint(values->ForceNonComparisonReductionType, 31, 31); 1576b8e80941Smrg 1577b8e80941Smrg dw[5] = 1578b8e80941Smrg __gen_uint(values->MIPCountLOD, 0, 3) | 1579b8e80941Smrg __gen_uint(values->SurfaceMinLOD, 4, 7) | 1580b8e80941Smrg __gen_uint(values->MipTailStartLOD, 8, 11) | 1581b8e80941Smrg __gen_uint(values->CoherencyType, 14, 14) | 1582b8e80941Smrg __gen_uint(values->TiledResourceMode, 18, 19) | 1583b8e80941Smrg __gen_uint(values->EWADisableForCube, 20, 20) | 1584b8e80941Smrg __gen_uint(values->YOffset, 21, 23) | 1585b8e80941Smrg __gen_uint(values->XOffset, 25, 31); 1586b8e80941Smrg 1587b8e80941Smrg dw[6] = 1588b8e80941Smrg __gen_uint(values->AuxiliarySurfaceMode, 0, 2) | 1589b8e80941Smrg __gen_uint(values->YOffsetforUorUVPlane, 0, 13) | 1590b8e80941Smrg __gen_uint(values->AuxiliarySurfacePitch, 3, 11) | 1591b8e80941Smrg __gen_uint(values->AuxiliarySurfaceQPitch, 16, 30) | 1592b8e80941Smrg __gen_uint(values->XOffsetforUorUVPlane, 16, 29) | 1593b8e80941Smrg __gen_uint(values->SeparateUVPlaneEnable, 31, 31); 1594b8e80941Smrg 1595b8e80941Smrg dw[7] = 1596b8e80941Smrg __gen_ufixed(values->ResourceMinLOD, 0, 11, 8) | 1597b8e80941Smrg __gen_uint(values->ShaderChannelSelectAlpha, 16, 18) | 1598b8e80941Smrg __gen_uint(values->ShaderChannelSelectBlue, 19, 21) | 1599b8e80941Smrg __gen_uint(values->ShaderChannelSelectGreen, 22, 24) | 1600b8e80941Smrg __gen_uint(values->ShaderChannelSelectRed, 25, 27) | 1601b8e80941Smrg __gen_uint(values->MemoryCompressionEnable, 30, 30) | 1602b8e80941Smrg __gen_uint(values->MemoryCompressionMode, 31, 31); 1603b8e80941Smrg 1604b8e80941Smrg const uint64_t v8_address = 1605b8e80941Smrg __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, 0); 1606b8e80941Smrg dw[8] = v8_address; 1607b8e80941Smrg dw[9] = v8_address >> 32; 1608b8e80941Smrg 1609b8e80941Smrg const uint64_t v10 = 1610b8e80941Smrg __gen_uint(values->QuiltWidth, 0, 4) | 1611b8e80941Smrg __gen_uint(values->QuiltHeight, 5, 9) | 1612b8e80941Smrg __gen_uint(values->ClearValueAddressEnable, 10, 10) | 1613b8e80941Smrg __gen_uint(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) | 1614b8e80941Smrg __gen_uint(values->YOffsetforVPlane, 32, 45) | 1615b8e80941Smrg __gen_uint(values->XOffsetforVPlane, 48, 61); 1616b8e80941Smrg const uint64_t v10_address = 1617b8e80941Smrg __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, v10); 1618b8e80941Smrg dw[10] = v10_address; 1619b8e80941Smrg dw[11] = (v10_address >> 32) | (v10 >> 32); 1620b8e80941Smrg 1621b8e80941Smrg const uint64_t v12 = 1622b8e80941Smrg __gen_sint(values->RedClearColor, 0, 31) | 1623b8e80941Smrg __gen_sint(values->GreenClearColor, 32, 63); 1624b8e80941Smrg const uint64_t v12_address = 1625b8e80941Smrg __gen_combine_address(data, &dw[12], values->ClearValueAddress, v12); 1626b8e80941Smrg dw[12] = v12_address; 1627b8e80941Smrg dw[13] = (v12_address >> 32) | (v12 >> 32); 1628b8e80941Smrg 1629b8e80941Smrg dw[14] = 1630b8e80941Smrg __gen_sint(values->BlueClearColor, 0, 31); 1631b8e80941Smrg 1632b8e80941Smrg dw[15] = 1633b8e80941Smrg __gen_sint(values->AlphaClearColor, 0, 31); 1634b8e80941Smrg} 1635b8e80941Smrg 1636b8e80941Smrg#define GEN10_ROUNDINGPRECISIONTABLE_3_BITS_length 1 1637b8e80941Smrgstruct GEN10_ROUNDINGPRECISIONTABLE_3_BITS { 1638b8e80941Smrg uint32_t RoundingPrecision; 1639b8e80941Smrg#define _116 0 1640b8e80941Smrg#define _216 1 1641b8e80941Smrg#define _316 2 1642b8e80941Smrg#define _416 3 1643b8e80941Smrg#define _516 4 1644b8e80941Smrg#define _616 5 1645b8e80941Smrg#define _716 6 1646b8e80941Smrg#define _816 7 1647b8e80941Smrg}; 1648b8e80941Smrg 1649b8e80941Smrgstatic inline void 1650b8e80941SmrgGEN10_ROUNDINGPRECISIONTABLE_3_BITS_pack(__attribute__((unused)) __gen_user_data *data, 1651b8e80941Smrg __attribute__((unused)) void * restrict dst, 1652b8e80941Smrg __attribute__((unused)) const struct GEN10_ROUNDINGPRECISIONTABLE_3_BITS * restrict values) 1653b8e80941Smrg{ 1654b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1655b8e80941Smrg 1656b8e80941Smrg dw[0] = 1657b8e80941Smrg __gen_uint(values->RoundingPrecision, 0, 2); 1658b8e80941Smrg} 1659b8e80941Smrg 1660b8e80941Smrg#define GEN10_SAMPLER_BORDER_COLOR_STATE_length 4 1661b8e80941Smrgstruct GEN10_SAMPLER_BORDER_COLOR_STATE { 1662b8e80941Smrg float BorderColorFloatRed; 1663b8e80941Smrg uint32_t BorderColor32bitRed; 1664b8e80941Smrg float BorderColorFloatGreen; 1665b8e80941Smrg uint32_t BorderColor32bitGreen; 1666b8e80941Smrg float BorderColorFloatBlue; 1667b8e80941Smrg uint32_t BorderColor32bitBlue; 1668b8e80941Smrg float BorderColorFloatAlpha; 1669b8e80941Smrg uint32_t BorderColor32bitAlpha; 1670b8e80941Smrg}; 1671b8e80941Smrg 1672b8e80941Smrgstatic inline void 1673b8e80941SmrgGEN10_SAMPLER_BORDER_COLOR_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1674b8e80941Smrg __attribute__((unused)) void * restrict dst, 1675b8e80941Smrg __attribute__((unused)) const struct GEN10_SAMPLER_BORDER_COLOR_STATE * restrict values) 1676b8e80941Smrg{ 1677b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1678b8e80941Smrg 1679b8e80941Smrg dw[0] = 1680b8e80941Smrg __gen_float(values->BorderColorFloatRed) | 1681b8e80941Smrg __gen_uint(values->BorderColor32bitRed, 0, 31); 1682b8e80941Smrg 1683b8e80941Smrg dw[1] = 1684b8e80941Smrg __gen_float(values->BorderColorFloatGreen) | 1685b8e80941Smrg __gen_uint(values->BorderColor32bitGreen, 0, 31); 1686b8e80941Smrg 1687b8e80941Smrg dw[2] = 1688b8e80941Smrg __gen_float(values->BorderColorFloatBlue) | 1689b8e80941Smrg __gen_uint(values->BorderColor32bitBlue, 0, 31); 1690b8e80941Smrg 1691b8e80941Smrg dw[3] = 1692b8e80941Smrg __gen_float(values->BorderColorFloatAlpha) | 1693b8e80941Smrg __gen_uint(values->BorderColor32bitAlpha, 0, 31); 1694b8e80941Smrg} 1695b8e80941Smrg 1696b8e80941Smrg#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_length 4 1697b8e80941Smrgstruct GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR { 1698b8e80941Smrg int32_t BorderColorRedAsS31; 1699b8e80941Smrg uint32_t BorderColorRedAsU32; 1700b8e80941Smrg float BorderColorRedAsFloat; 1701b8e80941Smrg uint32_t BorderColorRedAsU8; 1702b8e80941Smrg uint32_t BorderColorGreenAsU8; 1703b8e80941Smrg uint32_t BorderColorBlueAsU8; 1704b8e80941Smrg uint32_t BorderColorAlphaAsU8; 1705b8e80941Smrg int32_t BorderColorGreenAsS31; 1706b8e80941Smrg uint32_t BorderColorGreenAsU32; 1707b8e80941Smrg float BorderColorGreenAsFloat; 1708b8e80941Smrg int32_t BorderColorBlueAsS31; 1709b8e80941Smrg uint32_t BorderColorBlueAsU32; 1710b8e80941Smrg float BorderColorBlueAsFloat; 1711b8e80941Smrg int32_t BorderColorAlphaAsS31; 1712b8e80941Smrg uint32_t BorderColorAlphaAsU32; 1713b8e80941Smrg float BorderColorAlphaAsFloat; 1714b8e80941Smrg}; 1715b8e80941Smrg 1716b8e80941Smrgstatic inline void 1717b8e80941SmrgGEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_pack(__attribute__((unused)) __gen_user_data *data, 1718b8e80941Smrg __attribute__((unused)) void * restrict dst, 1719b8e80941Smrg __attribute__((unused)) const struct GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR * restrict values) 1720b8e80941Smrg{ 1721b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1722b8e80941Smrg 1723b8e80941Smrg dw[0] = 1724b8e80941Smrg __gen_sint(values->BorderColorRedAsS31, 0, 31) | 1725b8e80941Smrg __gen_uint(values->BorderColorRedAsU32, 0, 31) | 1726b8e80941Smrg __gen_float(values->BorderColorRedAsFloat) | 1727b8e80941Smrg __gen_uint(values->BorderColorRedAsU8, 0, 7) | 1728b8e80941Smrg __gen_uint(values->BorderColorGreenAsU8, 8, 15) | 1729b8e80941Smrg __gen_uint(values->BorderColorBlueAsU8, 16, 23) | 1730b8e80941Smrg __gen_uint(values->BorderColorAlphaAsU8, 24, 31); 1731b8e80941Smrg 1732b8e80941Smrg dw[1] = 1733b8e80941Smrg __gen_sint(values->BorderColorGreenAsS31, 0, 31) | 1734b8e80941Smrg __gen_uint(values->BorderColorGreenAsU32, 0, 31) | 1735b8e80941Smrg __gen_float(values->BorderColorGreenAsFloat); 1736b8e80941Smrg 1737b8e80941Smrg dw[2] = 1738b8e80941Smrg __gen_sint(values->BorderColorBlueAsS31, 0, 31) | 1739b8e80941Smrg __gen_uint(values->BorderColorBlueAsU32, 0, 31) | 1740b8e80941Smrg __gen_float(values->BorderColorBlueAsFloat); 1741b8e80941Smrg 1742b8e80941Smrg dw[3] = 1743b8e80941Smrg __gen_sint(values->BorderColorAlphaAsS31, 0, 31) | 1744b8e80941Smrg __gen_uint(values->BorderColorAlphaAsU32, 0, 31) | 1745b8e80941Smrg __gen_float(values->BorderColorAlphaAsFloat); 1746b8e80941Smrg} 1747b8e80941Smrg 1748b8e80941Smrg#define GEN10_SAMPLER_STATE_length 4 1749b8e80941Smrgstruct GEN10_SAMPLER_STATE { 1750b8e80941Smrg uint32_t AnisotropicAlgorithm; 1751b8e80941Smrg#define LEGACY 0 1752b8e80941Smrg#define EWAApproximation 1 1753b8e80941Smrg float TextureLODBias; 1754b8e80941Smrg uint32_t MinModeFilter; 1755b8e80941Smrg#define MAPFILTER_NEAREST 0 1756b8e80941Smrg#define MAPFILTER_LINEAR 1 1757b8e80941Smrg#define MAPFILTER_ANISOTROPIC 2 1758b8e80941Smrg#define MAPFILTER_MONO 6 1759b8e80941Smrg uint32_t MagModeFilter; 1760b8e80941Smrg#define MAPFILTER_NEAREST 0 1761b8e80941Smrg#define MAPFILTER_LINEAR 1 1762b8e80941Smrg#define MAPFILTER_ANISOTROPIC 2 1763b8e80941Smrg#define MAPFILTER_MONO 6 1764b8e80941Smrg uint32_t MipModeFilter; 1765b8e80941Smrg#define MIPFILTER_NONE 0 1766b8e80941Smrg#define MIPFILTER_NEAREST 1 1767b8e80941Smrg#define MIPFILTER_LINEAR 3 1768b8e80941Smrg uint32_t CoarseLODQualityMode; 1769b8e80941Smrg uint32_t LODPreClampMode; 1770b8e80941Smrg#define CLAMP_MODE_NONE 0 1771b8e80941Smrg#define CLAMP_MODE_OGL 2 1772b8e80941Smrg uint32_t TextureBorderColorMode; 1773b8e80941Smrg#define DX10OGL 0 1774b8e80941Smrg#define DX9 1 1775b8e80941Smrg bool SamplerDisable; 1776b8e80941Smrg uint32_t CubeSurfaceControlMode; 1777b8e80941Smrg#define PROGRAMMED 0 1778b8e80941Smrg#define OVERRIDE 1 1779b8e80941Smrg uint32_t ShadowFunction; 1780b8e80941Smrg#define PREFILTEROPALWAYS 0 1781b8e80941Smrg#define PREFILTEROPNEVER 1 1782b8e80941Smrg#define PREFILTEROPLESS 2 1783b8e80941Smrg#define PREFILTEROPEQUAL 3 1784b8e80941Smrg#define PREFILTEROPLEQUAL 4 1785b8e80941Smrg#define PREFILTEROPGREATER 5 1786b8e80941Smrg#define PREFILTEROPNOTEQUAL 6 1787b8e80941Smrg#define PREFILTEROPGEQUAL 7 1788b8e80941Smrg uint32_t ChromaKeyMode; 1789b8e80941Smrg#define KEYFILTER_KILL_ON_ANY_MATCH 0 1790b8e80941Smrg#define KEYFILTER_REPLACE_BLACK 1 1791b8e80941Smrg uint32_t ChromaKeyIndex; 1792b8e80941Smrg bool ChromaKeyEnable; 1793b8e80941Smrg float MaxLOD; 1794b8e80941Smrg float MinLOD; 1795b8e80941Smrg uint32_t LODClampMagnificationMode; 1796b8e80941Smrg#define MIPNONE 0 1797b8e80941Smrg#define MIPFILTER 1 1798b8e80941Smrg bool Forcegather4Behavior; 1799b8e80941Smrg uint64_t BorderColorPointer; 1800b8e80941Smrg enum GEN10_TextureCoordinateMode TCZAddressControlMode; 1801b8e80941Smrg enum GEN10_TextureCoordinateMode TCYAddressControlMode; 1802b8e80941Smrg enum GEN10_TextureCoordinateMode TCXAddressControlMode; 1803b8e80941Smrg bool ReductionTypeEnable; 1804b8e80941Smrg bool NonnormalizedCoordinateEnable; 1805b8e80941Smrg uint32_t TrilinearFilterQuality; 1806b8e80941Smrg#define FULL 0 1807b8e80941Smrg#define HIGH 1 1808b8e80941Smrg#define MED 2 1809b8e80941Smrg#define LOW 3 1810b8e80941Smrg bool RAddressMinFilterRoundingEnable; 1811b8e80941Smrg bool RAddressMagFilterRoundingEnable; 1812b8e80941Smrg bool VAddressMinFilterRoundingEnable; 1813b8e80941Smrg bool VAddressMagFilterRoundingEnable; 1814b8e80941Smrg bool UAddressMinFilterRoundingEnable; 1815b8e80941Smrg bool UAddressMagFilterRoundingEnable; 1816b8e80941Smrg uint32_t MaximumAnisotropy; 1817b8e80941Smrg#define RATIO21 0 1818b8e80941Smrg#define RATIO41 1 1819b8e80941Smrg#define RATIO61 2 1820b8e80941Smrg#define RATIO81 3 1821b8e80941Smrg#define RATIO101 4 1822b8e80941Smrg#define RATIO121 5 1823b8e80941Smrg#define RATIO141 6 1824b8e80941Smrg#define RATIO161 7 1825b8e80941Smrg uint32_t ReductionType; 1826b8e80941Smrg#define STD_FILTER 0 1827b8e80941Smrg#define COMPARISON 1 1828b8e80941Smrg#define MINIMUM 2 1829b8e80941Smrg#define MAXIMUM 3 1830b8e80941Smrg}; 1831b8e80941Smrg 1832b8e80941Smrgstatic inline void 1833b8e80941SmrgGEN10_SAMPLER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1834b8e80941Smrg __attribute__((unused)) void * restrict dst, 1835b8e80941Smrg __attribute__((unused)) const struct GEN10_SAMPLER_STATE * restrict values) 1836b8e80941Smrg{ 1837b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1838b8e80941Smrg 1839b8e80941Smrg dw[0] = 1840b8e80941Smrg __gen_uint(values->AnisotropicAlgorithm, 0, 0) | 1841b8e80941Smrg __gen_sfixed(values->TextureLODBias, 1, 13, 8) | 1842b8e80941Smrg __gen_uint(values->MinModeFilter, 14, 16) | 1843b8e80941Smrg __gen_uint(values->MagModeFilter, 17, 19) | 1844b8e80941Smrg __gen_uint(values->MipModeFilter, 20, 21) | 1845b8e80941Smrg __gen_uint(values->CoarseLODQualityMode, 22, 26) | 1846b8e80941Smrg __gen_uint(values->LODPreClampMode, 27, 28) | 1847b8e80941Smrg __gen_uint(values->TextureBorderColorMode, 29, 29) | 1848b8e80941Smrg __gen_uint(values->SamplerDisable, 31, 31); 1849b8e80941Smrg 1850b8e80941Smrg dw[1] = 1851b8e80941Smrg __gen_uint(values->CubeSurfaceControlMode, 0, 0) | 1852b8e80941Smrg __gen_uint(values->ShadowFunction, 1, 3) | 1853b8e80941Smrg __gen_uint(values->ChromaKeyMode, 4, 4) | 1854b8e80941Smrg __gen_uint(values->ChromaKeyIndex, 5, 6) | 1855b8e80941Smrg __gen_uint(values->ChromaKeyEnable, 7, 7) | 1856b8e80941Smrg __gen_ufixed(values->MaxLOD, 8, 19, 8) | 1857b8e80941Smrg __gen_ufixed(values->MinLOD, 20, 31, 8); 1858b8e80941Smrg 1859b8e80941Smrg dw[2] = 1860b8e80941Smrg __gen_uint(values->LODClampMagnificationMode, 0, 0) | 1861b8e80941Smrg __gen_uint(values->Forcegather4Behavior, 5, 5) | 1862b8e80941Smrg __gen_offset(values->BorderColorPointer, 6, 23); 1863b8e80941Smrg 1864b8e80941Smrg dw[3] = 1865b8e80941Smrg __gen_uint(values->TCZAddressControlMode, 0, 2) | 1866b8e80941Smrg __gen_uint(values->TCYAddressControlMode, 3, 5) | 1867b8e80941Smrg __gen_uint(values->TCXAddressControlMode, 6, 8) | 1868b8e80941Smrg __gen_uint(values->ReductionTypeEnable, 9, 9) | 1869b8e80941Smrg __gen_uint(values->NonnormalizedCoordinateEnable, 10, 10) | 1870b8e80941Smrg __gen_uint(values->TrilinearFilterQuality, 11, 12) | 1871b8e80941Smrg __gen_uint(values->RAddressMinFilterRoundingEnable, 13, 13) | 1872b8e80941Smrg __gen_uint(values->RAddressMagFilterRoundingEnable, 14, 14) | 1873b8e80941Smrg __gen_uint(values->VAddressMinFilterRoundingEnable, 15, 15) | 1874b8e80941Smrg __gen_uint(values->VAddressMagFilterRoundingEnable, 16, 16) | 1875b8e80941Smrg __gen_uint(values->UAddressMinFilterRoundingEnable, 17, 17) | 1876b8e80941Smrg __gen_uint(values->UAddressMagFilterRoundingEnable, 18, 18) | 1877b8e80941Smrg __gen_uint(values->MaximumAnisotropy, 19, 21) | 1878b8e80941Smrg __gen_uint(values->ReductionType, 22, 23); 1879b8e80941Smrg} 1880b8e80941Smrg 1881b8e80941Smrg#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 8 1882b8e80941Smrgstruct GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS { 1883b8e80941Smrg float Table0FilterCoefficient[4]; 1884b8e80941Smrg float Table1FilterCoefficient0[4]; 1885b8e80941Smrg float Table1FilterCoefficient1[4]; 1886b8e80941Smrg}; 1887b8e80941Smrg 1888b8e80941Smrgstatic inline void 1889b8e80941SmrgGEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_pack(__attribute__((unused)) __gen_user_data *data, 1890b8e80941Smrg __attribute__((unused)) void * restrict dst, 1891b8e80941Smrg __attribute__((unused)) const struct GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS * restrict values) 1892b8e80941Smrg{ 1893b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1894b8e80941Smrg 1895b8e80941Smrg dw[0] = 1896b8e80941Smrg __gen_sfixed(values->Table0FilterCoefficient[0], 0, 7, 6) | 1897b8e80941Smrg __gen_sfixed(values->Table0FilterCoefficient[1], 8, 15, 6) | 1898b8e80941Smrg __gen_sfixed(values->Table0FilterCoefficient[2], 16, 23, 6) | 1899b8e80941Smrg __gen_sfixed(values->Table0FilterCoefficient[3], 24, 31, 6) | 1900b8e80941Smrg __gen_sfixed(values->Table1FilterCoefficient0[0], 0, 7, 6) | 1901b8e80941Smrg __gen_sfixed(values->Table1FilterCoefficient1[0], 8, 15, 6); 1902b8e80941Smrg 1903b8e80941Smrg dw[1] = 1904b8e80941Smrg __gen_sfixed(values->Table1FilterCoefficient0[1], 0, 7, 6) | 1905b8e80941Smrg __gen_sfixed(values->Table1FilterCoefficient1[1], 8, 15, 6); 1906b8e80941Smrg 1907b8e80941Smrg dw[2] = 1908b8e80941Smrg __gen_sfixed(values->Table1FilterCoefficient0[2], 0, 7, 6) | 1909b8e80941Smrg __gen_sfixed(values->Table1FilterCoefficient1[2], 8, 15, 6); 1910b8e80941Smrg 1911b8e80941Smrg dw[3] = 1912b8e80941Smrg __gen_sfixed(values->Table1FilterCoefficient0[3], 0, 7, 6) | 1913b8e80941Smrg __gen_sfixed(values->Table1FilterCoefficient1[3], 8, 15, 6); 1914b8e80941Smrg 1915b8e80941Smrg dw[4] = 0; 1916b8e80941Smrg 1917b8e80941Smrg dw[5] = 0; 1918b8e80941Smrg 1919b8e80941Smrg dw[6] = 0; 1920b8e80941Smrg 1921b8e80941Smrg dw[7] = 0; 1922b8e80941Smrg} 1923b8e80941Smrg 1924b8e80941Smrg#define GEN10_SCISSOR_RECT_length 2 1925b8e80941Smrgstruct GEN10_SCISSOR_RECT { 1926b8e80941Smrg uint32_t ScissorRectangleXMin; 1927b8e80941Smrg uint32_t ScissorRectangleYMin; 1928b8e80941Smrg uint32_t ScissorRectangleXMax; 1929b8e80941Smrg uint32_t ScissorRectangleYMax; 1930b8e80941Smrg}; 1931b8e80941Smrg 1932b8e80941Smrgstatic inline void 1933b8e80941SmrgGEN10_SCISSOR_RECT_pack(__attribute__((unused)) __gen_user_data *data, 1934b8e80941Smrg __attribute__((unused)) void * restrict dst, 1935b8e80941Smrg __attribute__((unused)) const struct GEN10_SCISSOR_RECT * restrict values) 1936b8e80941Smrg{ 1937b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1938b8e80941Smrg 1939b8e80941Smrg dw[0] = 1940b8e80941Smrg __gen_uint(values->ScissorRectangleXMin, 0, 15) | 1941b8e80941Smrg __gen_uint(values->ScissorRectangleYMin, 16, 31); 1942b8e80941Smrg 1943b8e80941Smrg dw[1] = 1944b8e80941Smrg __gen_uint(values->ScissorRectangleXMax, 0, 15) | 1945b8e80941Smrg __gen_uint(values->ScissorRectangleYMax, 16, 31); 1946b8e80941Smrg} 1947b8e80941Smrg 1948b8e80941Smrg#define GEN10_SFC_AVS_CHROMA_COEFF_TABLE_BODY_length 64 1949b8e80941Smrgstruct GEN10_SFC_AVS_CHROMA_COEFF_TABLE_BODY { 1950b8e80941Smrg float Table1XFilterCoefficientn2; 1951b8e80941Smrg float Table1YFilterCoefficientn2; 1952b8e80941Smrg float Table1XFilterCoefficientn3; 1953b8e80941Smrg float Table1YFilterCoefficientn3; 1954b8e80941Smrg float Table1XFilterCoefficientn4; 1955b8e80941Smrg float Table1YFilterCoefficientn4; 1956b8e80941Smrg float Table1XFilterCoefficientn5; 1957b8e80941Smrg float Table1YFilterCoefficientn5; 1958b8e80941Smrg struct GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY FilterCoefficients[31]; 1959b8e80941Smrg}; 1960b8e80941Smrg 1961b8e80941Smrgstatic inline void 1962b8e80941SmrgGEN10_SFC_AVS_CHROMA_COEFF_TABLE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 1963b8e80941Smrg __attribute__((unused)) void * restrict dst, 1964b8e80941Smrg __attribute__((unused)) const struct GEN10_SFC_AVS_CHROMA_COEFF_TABLE_BODY * restrict values) 1965b8e80941Smrg{ 1966b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1967b8e80941Smrg 1968b8e80941Smrg dw[0] = 1969b8e80941Smrg __gen_sfixed(values->Table1XFilterCoefficientn2, 0, 7, 6) | 1970b8e80941Smrg __gen_sfixed(values->Table1YFilterCoefficientn2, 8, 15, 6) | 1971b8e80941Smrg __gen_sfixed(values->Table1XFilterCoefficientn3, 16, 23, 6) | 1972b8e80941Smrg __gen_sfixed(values->Table1YFilterCoefficientn3, 24, 31, 6); 1973b8e80941Smrg 1974b8e80941Smrg dw[1] = 1975b8e80941Smrg __gen_sfixed(values->Table1XFilterCoefficientn4, 0, 7, 6) | 1976b8e80941Smrg __gen_sfixed(values->Table1YFilterCoefficientn4, 8, 15, 6) | 1977b8e80941Smrg __gen_sfixed(values->Table1XFilterCoefficientn5, 16, 23, 6) | 1978b8e80941Smrg __gen_sfixed(values->Table1YFilterCoefficientn5, 24, 31, 6); 1979b8e80941Smrg 1980b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[2], &values->FilterCoefficients[0]); 1981b8e80941Smrg 1982b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[4], &values->FilterCoefficients[1]); 1983b8e80941Smrg 1984b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[6], &values->FilterCoefficients[2]); 1985b8e80941Smrg 1986b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[8], &values->FilterCoefficients[3]); 1987b8e80941Smrg 1988b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[10], &values->FilterCoefficients[4]); 1989b8e80941Smrg 1990b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[12], &values->FilterCoefficients[5]); 1991b8e80941Smrg 1992b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[14], &values->FilterCoefficients[6]); 1993b8e80941Smrg 1994b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[16], &values->FilterCoefficients[7]); 1995b8e80941Smrg 1996b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[18], &values->FilterCoefficients[8]); 1997b8e80941Smrg 1998b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[20], &values->FilterCoefficients[9]); 1999b8e80941Smrg 2000b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[22], &values->FilterCoefficients[10]); 2001b8e80941Smrg 2002b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[24], &values->FilterCoefficients[11]); 2003b8e80941Smrg 2004b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[26], &values->FilterCoefficients[12]); 2005b8e80941Smrg 2006b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[28], &values->FilterCoefficients[13]); 2007b8e80941Smrg 2008b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[30], &values->FilterCoefficients[14]); 2009b8e80941Smrg 2010b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[32], &values->FilterCoefficients[15]); 2011b8e80941Smrg 2012b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[34], &values->FilterCoefficients[16]); 2013b8e80941Smrg 2014b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[36], &values->FilterCoefficients[17]); 2015b8e80941Smrg 2016b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[38], &values->FilterCoefficients[18]); 2017b8e80941Smrg 2018b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[40], &values->FilterCoefficients[19]); 2019b8e80941Smrg 2020b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[42], &values->FilterCoefficients[20]); 2021b8e80941Smrg 2022b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[44], &values->FilterCoefficients[21]); 2023b8e80941Smrg 2024b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[46], &values->FilterCoefficients[22]); 2025b8e80941Smrg 2026b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[48], &values->FilterCoefficients[23]); 2027b8e80941Smrg 2028b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[50], &values->FilterCoefficients[24]); 2029b8e80941Smrg 2030b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[52], &values->FilterCoefficients[25]); 2031b8e80941Smrg 2032b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[54], &values->FilterCoefficients[26]); 2033b8e80941Smrg 2034b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[56], &values->FilterCoefficients[27]); 2035b8e80941Smrg 2036b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[58], &values->FilterCoefficients[28]); 2037b8e80941Smrg 2038b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[60], &values->FilterCoefficients[29]); 2039b8e80941Smrg 2040b8e80941Smrg GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[62], &values->FilterCoefficients[30]); 2041b8e80941Smrg} 2042b8e80941Smrg 2043b8e80941Smrg#define GEN10_SFC_AVS_LUMA_COEFF_TABLE_BODY_length 128 2044b8e80941Smrgstruct GEN10_SFC_AVS_LUMA_COEFF_TABLE_BODY { 2045b8e80941Smrg float Table0XFilterCoefficientn0; 2046b8e80941Smrg float Table0YFilterCoefficientn0; 2047b8e80941Smrg float Table0XFilterCoefficientn1; 2048b8e80941Smrg float Table0YFilterCoefficientn1; 2049b8e80941Smrg float Table0XFilterCoefficientn2; 2050b8e80941Smrg float Table0YFilterCoefficientn2; 2051b8e80941Smrg float Table0XFilterCoefficientn3; 2052b8e80941Smrg float Table0YFilterCoefficientn3; 2053b8e80941Smrg float Table0XFilterCoefficientn4; 2054b8e80941Smrg float Table0YFilterCoefficientn4; 2055b8e80941Smrg float Table0XFilterCoefficientn5; 2056b8e80941Smrg float Table0YFilterCoefficientn5; 2057b8e80941Smrg float Table0XFilterCoefficientn6; 2058b8e80941Smrg float Table0YFilterCoefficientn6; 2059b8e80941Smrg float Table0XFilterCoefficientn7; 2060b8e80941Smrg float Table0YFilterCoefficientn7; 2061b8e80941Smrg struct GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY FilterCoefficients[31]; 2062b8e80941Smrg}; 2063b8e80941Smrg 2064b8e80941Smrgstatic inline void 2065b8e80941SmrgGEN10_SFC_AVS_LUMA_COEFF_TABLE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2066b8e80941Smrg __attribute__((unused)) void * restrict dst, 2067b8e80941Smrg __attribute__((unused)) const struct GEN10_SFC_AVS_LUMA_COEFF_TABLE_BODY * restrict values) 2068b8e80941Smrg{ 2069b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2070b8e80941Smrg 2071b8e80941Smrg dw[0] = 2072b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn0, 0, 7, 6) | 2073b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn0, 8, 15, 6) | 2074b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn1, 16, 23, 6) | 2075b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn1, 24, 31, 6); 2076b8e80941Smrg 2077b8e80941Smrg dw[1] = 2078b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn2, 0, 7, 6) | 2079b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn2, 8, 15, 6) | 2080b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn3, 16, 23, 6) | 2081b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn3, 24, 31, 6); 2082b8e80941Smrg 2083b8e80941Smrg dw[2] = 2084b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn4, 0, 7, 6) | 2085b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn4, 8, 15, 6) | 2086b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn5, 16, 23, 6) | 2087b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn5, 24, 31, 6); 2088b8e80941Smrg 2089b8e80941Smrg dw[3] = 2090b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn6, 0, 7, 6) | 2091b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn6, 8, 15, 6) | 2092b8e80941Smrg __gen_sfixed(values->Table0XFilterCoefficientn7, 16, 23, 6) | 2093b8e80941Smrg __gen_sfixed(values->Table0YFilterCoefficientn7, 24, 31, 6); 2094b8e80941Smrg 2095b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[4], &values->FilterCoefficients[0]); 2096b8e80941Smrg 2097b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[8], &values->FilterCoefficients[1]); 2098b8e80941Smrg 2099b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[12], &values->FilterCoefficients[2]); 2100b8e80941Smrg 2101b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[16], &values->FilterCoefficients[3]); 2102b8e80941Smrg 2103b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[20], &values->FilterCoefficients[4]); 2104b8e80941Smrg 2105b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[24], &values->FilterCoefficients[5]); 2106b8e80941Smrg 2107b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[28], &values->FilterCoefficients[6]); 2108b8e80941Smrg 2109b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[32], &values->FilterCoefficients[7]); 2110b8e80941Smrg 2111b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[36], &values->FilterCoefficients[8]); 2112b8e80941Smrg 2113b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[40], &values->FilterCoefficients[9]); 2114b8e80941Smrg 2115b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[44], &values->FilterCoefficients[10]); 2116b8e80941Smrg 2117b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[48], &values->FilterCoefficients[11]); 2118b8e80941Smrg 2119b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[52], &values->FilterCoefficients[12]); 2120b8e80941Smrg 2121b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[56], &values->FilterCoefficients[13]); 2122b8e80941Smrg 2123b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[60], &values->FilterCoefficients[14]); 2124b8e80941Smrg 2125b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[64], &values->FilterCoefficients[15]); 2126b8e80941Smrg 2127b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[68], &values->FilterCoefficients[16]); 2128b8e80941Smrg 2129b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[72], &values->FilterCoefficients[17]); 2130b8e80941Smrg 2131b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[76], &values->FilterCoefficients[18]); 2132b8e80941Smrg 2133b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[80], &values->FilterCoefficients[19]); 2134b8e80941Smrg 2135b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[84], &values->FilterCoefficients[20]); 2136b8e80941Smrg 2137b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[88], &values->FilterCoefficients[21]); 2138b8e80941Smrg 2139b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[92], &values->FilterCoefficients[22]); 2140b8e80941Smrg 2141b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[96], &values->FilterCoefficients[23]); 2142b8e80941Smrg 2143b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[100], &values->FilterCoefficients[24]); 2144b8e80941Smrg 2145b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[104], &values->FilterCoefficients[25]); 2146b8e80941Smrg 2147b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[108], &values->FilterCoefficients[26]); 2148b8e80941Smrg 2149b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[112], &values->FilterCoefficients[27]); 2150b8e80941Smrg 2151b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[116], &values->FilterCoefficients[28]); 2152b8e80941Smrg 2153b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[120], &values->FilterCoefficients[29]); 2154b8e80941Smrg 2155b8e80941Smrg GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[124], &values->FilterCoefficients[30]); 2156b8e80941Smrg} 2157b8e80941Smrg 2158b8e80941Smrg#define GEN10_SFC_AVS_STATE_BODY_length 2 2159b8e80941Smrgstruct GEN10_SFC_AVS_STATE_BODY { 2160b8e80941Smrg uint32_t TransitionAreawith8Pixels; 2161b8e80941Smrg uint32_t TransitionAreawith4Pixels; 2162b8e80941Smrg uint32_t SharpnessLevel; 2163b8e80941Smrg uint32_t MaxDerivative8Pixels; 2164b8e80941Smrg uint32_t MaxDerivative4Pixels; 2165b8e80941Smrg}; 2166b8e80941Smrg 2167b8e80941Smrgstatic inline void 2168b8e80941SmrgGEN10_SFC_AVS_STATE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2169b8e80941Smrg __attribute__((unused)) void * restrict dst, 2170b8e80941Smrg __attribute__((unused)) const struct GEN10_SFC_AVS_STATE_BODY * restrict values) 2171b8e80941Smrg{ 2172b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2173b8e80941Smrg 2174b8e80941Smrg dw[0] = 2175b8e80941Smrg __gen_uint(values->TransitionAreawith8Pixels, 0, 2) | 2176b8e80941Smrg __gen_uint(values->TransitionAreawith4Pixels, 4, 6) | 2177b8e80941Smrg __gen_uint(values->SharpnessLevel, 24, 31); 2178b8e80941Smrg 2179b8e80941Smrg dw[1] = 2180b8e80941Smrg __gen_uint(values->MaxDerivative8Pixels, 0, 7) | 2181b8e80941Smrg __gen_uint(values->MaxDerivative4Pixels, 16, 23); 2182b8e80941Smrg} 2183b8e80941Smrg 2184b8e80941Smrg#define GEN10_SFC_IEF_STATE_BODY_length 23 2185b8e80941Smrgstruct GEN10_SFC_IEF_STATE_BODY { 2186b8e80941Smrg uint32_t GainFactor; 2187b8e80941Smrg uint32_t WeakEdgeThreshold; 2188b8e80941Smrg uint32_t StrongEdgeThreshold; 2189b8e80941Smrg float R3xCoefficient; 2190b8e80941Smrg float R3cCoefficient; 2191b8e80941Smrg uint32_t GlobalNoiseEstimation; 2192b8e80941Smrg uint32_t NonEdgeWeight; 2193b8e80941Smrg uint32_t RegularWeight; 2194b8e80941Smrg uint32_t StrongEdgeWeight; 2195b8e80941Smrg float R5xCoefficient; 2196b8e80941Smrg float R5cxCoefficient; 2197b8e80941Smrg float R5cCoefficient; 2198b8e80941Smrg float STDSinalpha; 2199b8e80941Smrg float STDCosalpha; 2200b8e80941Smrg uint32_t Sat_Max; 2201b8e80941Smrg uint32_t Hue_Max; 2202b8e80941Smrg float S3U; 2203b8e80941Smrg uint32_t DiamondMargin; 2204b8e80941Smrg bool VY_STD_Enable; 2205b8e80941Smrg uint32_t U_Mid; 2206b8e80941Smrg uint32_t V_Mid; 2207b8e80941Smrg int32_t Diamond_dv; 2208b8e80941Smrg uint32_t Diamond_Th; 2209b8e80941Smrg float Diamond_alpha; 2210b8e80941Smrg uint32_t HS_margin; 2211b8e80941Smrg int32_t Diamond_du; 2212b8e80941Smrg uint32_t SkinDetailFactor; 2213b8e80941Smrg#define DetailRevealed 0 2214b8e80941Smrg#define NotDetailRevealed 1 2215b8e80941Smrg uint32_t Y_point_1; 2216b8e80941Smrg uint32_t Y_point_2; 2217b8e80941Smrg uint32_t Y_point_3; 2218b8e80941Smrg uint32_t Y_point_4; 2219b8e80941Smrg float INV_Margin_VYL; 2220b8e80941Smrg float INV_Margin_VYU; 2221b8e80941Smrg uint32_t P0L; 2222b8e80941Smrg uint32_t P1L; 2223b8e80941Smrg uint32_t P2L; 2224b8e80941Smrg uint32_t P3L; 2225b8e80941Smrg uint32_t B0L; 2226b8e80941Smrg uint32_t B1L; 2227b8e80941Smrg uint32_t B2L; 2228b8e80941Smrg uint32_t B3L; 2229b8e80941Smrg float S0L; 2230b8e80941Smrg float Y_Slope_2; 2231b8e80941Smrg float S1L; 2232b8e80941Smrg float S2L; 2233b8e80941Smrg float S3L; 2234b8e80941Smrg uint32_t P0U; 2235b8e80941Smrg uint32_t P1U; 2236b8e80941Smrg float Y_Slope1; 2237b8e80941Smrg uint32_t P2U; 2238b8e80941Smrg uint32_t P3U; 2239b8e80941Smrg uint32_t B0U; 2240b8e80941Smrg uint32_t B1U; 2241b8e80941Smrg uint32_t B2U; 2242b8e80941Smrg uint32_t B3U; 2243b8e80941Smrg float S0U; 2244b8e80941Smrg float S1U; 2245b8e80941Smrg float S2U; 2246b8e80941Smrg bool TransformEnable; 2247b8e80941Smrg bool YUVChannelSwap; 2248b8e80941Smrg float C0; 2249b8e80941Smrg float C1; 2250b8e80941Smrg float C2; 2251b8e80941Smrg float C3; 2252b8e80941Smrg float C4; 2253b8e80941Smrg float C5; 2254b8e80941Smrg float C6; 2255b8e80941Smrg float C7; 2256b8e80941Smrg float C8; 2257b8e80941Smrg float OffsetIn1; 2258b8e80941Smrg float OffsetOut1; 2259b8e80941Smrg float OffsetIn2; 2260b8e80941Smrg float OffsetOut2; 2261b8e80941Smrg float OffsetIn3; 2262b8e80941Smrg float OffsetOut3; 2263b8e80941Smrg}; 2264b8e80941Smrg 2265b8e80941Smrgstatic inline void 2266b8e80941SmrgGEN10_SFC_IEF_STATE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2267b8e80941Smrg __attribute__((unused)) void * restrict dst, 2268b8e80941Smrg __attribute__((unused)) const struct GEN10_SFC_IEF_STATE_BODY * restrict values) 2269b8e80941Smrg{ 2270b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2271b8e80941Smrg 2272b8e80941Smrg dw[0] = 2273b8e80941Smrg __gen_uint(values->GainFactor, 0, 5) | 2274b8e80941Smrg __gen_uint(values->WeakEdgeThreshold, 6, 11) | 2275b8e80941Smrg __gen_uint(values->StrongEdgeThreshold, 12, 17) | 2276b8e80941Smrg __gen_ufixed(values->R3xCoefficient, 18, 22, 5) | 2277b8e80941Smrg __gen_ufixed(values->R3cCoefficient, 23, 27, 5); 2278b8e80941Smrg 2279b8e80941Smrg dw[1] = 2280b8e80941Smrg __gen_uint(values->GlobalNoiseEstimation, 0, 7) | 2281b8e80941Smrg __gen_uint(values->NonEdgeWeight, 8, 10) | 2282b8e80941Smrg __gen_uint(values->RegularWeight, 11, 13) | 2283b8e80941Smrg __gen_uint(values->StrongEdgeWeight, 14, 16) | 2284b8e80941Smrg __gen_ufixed(values->R5xCoefficient, 17, 21, 5) | 2285b8e80941Smrg __gen_ufixed(values->R5cxCoefficient, 22, 26, 5) | 2286b8e80941Smrg __gen_ufixed(values->R5cCoefficient, 27, 31, 5); 2287b8e80941Smrg 2288b8e80941Smrg dw[2] = 2289b8e80941Smrg __gen_sfixed(values->STDSinalpha, 0, 7, 7) | 2290b8e80941Smrg __gen_sfixed(values->STDCosalpha, 8, 15, 7) | 2291b8e80941Smrg __gen_uint(values->Sat_Max, 16, 21) | 2292b8e80941Smrg __gen_uint(values->Hue_Max, 22, 27); 2293b8e80941Smrg 2294b8e80941Smrg dw[3] = 2295b8e80941Smrg __gen_sfixed(values->S3U, 0, 10, 8) | 2296b8e80941Smrg __gen_uint(values->DiamondMargin, 12, 14) | 2297b8e80941Smrg __gen_uint(values->VY_STD_Enable, 15, 15) | 2298b8e80941Smrg __gen_uint(values->U_Mid, 16, 23) | 2299b8e80941Smrg __gen_uint(values->V_Mid, 24, 31); 2300b8e80941Smrg 2301b8e80941Smrg dw[4] = 2302b8e80941Smrg __gen_sint(values->Diamond_dv, 0, 6) | 2303b8e80941Smrg __gen_uint(values->Diamond_Th, 7, 12) | 2304b8e80941Smrg __gen_ufixed(values->Diamond_alpha, 13, 20, 6) | 2305b8e80941Smrg __gen_uint(values->HS_margin, 21, 23) | 2306b8e80941Smrg __gen_sint(values->Diamond_du, 24, 30) | 2307b8e80941Smrg __gen_uint(values->SkinDetailFactor, 31, 31); 2308b8e80941Smrg 2309b8e80941Smrg dw[5] = 2310b8e80941Smrg __gen_uint(values->Y_point_1, 0, 7) | 2311b8e80941Smrg __gen_uint(values->Y_point_2, 8, 15) | 2312b8e80941Smrg __gen_uint(values->Y_point_3, 16, 23) | 2313b8e80941Smrg __gen_uint(values->Y_point_4, 24, 31); 2314b8e80941Smrg 2315b8e80941Smrg dw[6] = 2316b8e80941Smrg __gen_ufixed(values->INV_Margin_VYL, 0, 15, 16); 2317b8e80941Smrg 2318b8e80941Smrg dw[7] = 2319b8e80941Smrg __gen_ufixed(values->INV_Margin_VYU, 0, 15, 16) | 2320b8e80941Smrg __gen_uint(values->P0L, 16, 23) | 2321b8e80941Smrg __gen_uint(values->P1L, 24, 31); 2322b8e80941Smrg 2323b8e80941Smrg dw[8] = 2324b8e80941Smrg __gen_uint(values->P2L, 0, 7) | 2325b8e80941Smrg __gen_uint(values->P3L, 8, 15) | 2326b8e80941Smrg __gen_uint(values->B0L, 16, 23) | 2327b8e80941Smrg __gen_uint(values->B1L, 24, 31); 2328b8e80941Smrg 2329b8e80941Smrg dw[9] = 2330b8e80941Smrg __gen_uint(values->B2L, 0, 7) | 2331b8e80941Smrg __gen_uint(values->B3L, 8, 15) | 2332b8e80941Smrg __gen_sfixed(values->S0L, 16, 26, 8) | 2333b8e80941Smrg __gen_ufixed(values->Y_Slope_2, 27, 31, 3); 2334b8e80941Smrg 2335b8e80941Smrg dw[10] = 2336b8e80941Smrg __gen_sfixed(values->S1L, 0, 10, 8) | 2337b8e80941Smrg __gen_sfixed(values->S2L, 11, 21, 8); 2338b8e80941Smrg 2339b8e80941Smrg dw[11] = 2340b8e80941Smrg __gen_sfixed(values->S3L, 0, 10, 8) | 2341b8e80941Smrg __gen_uint(values->P0U, 11, 18) | 2342b8e80941Smrg __gen_uint(values->P1U, 19, 26) | 2343b8e80941Smrg __gen_ufixed(values->Y_Slope1, 27, 31, 3); 2344b8e80941Smrg 2345b8e80941Smrg dw[12] = 2346b8e80941Smrg __gen_uint(values->P2U, 0, 7) | 2347b8e80941Smrg __gen_uint(values->P3U, 8, 15) | 2348b8e80941Smrg __gen_uint(values->B0U, 16, 23) | 2349b8e80941Smrg __gen_uint(values->B1U, 24, 31); 2350b8e80941Smrg 2351b8e80941Smrg dw[13] = 2352b8e80941Smrg __gen_uint(values->B2U, 0, 7) | 2353b8e80941Smrg __gen_uint(values->B3U, 8, 15) | 2354b8e80941Smrg __gen_sfixed(values->S0U, 16, 26, 8); 2355b8e80941Smrg 2356b8e80941Smrg dw[14] = 2357b8e80941Smrg __gen_sfixed(values->S1U, 0, 10, 8) | 2358b8e80941Smrg __gen_sfixed(values->S2U, 11, 21, 8); 2359b8e80941Smrg 2360b8e80941Smrg dw[15] = 2361b8e80941Smrg __gen_uint(values->TransformEnable, 0, 0) | 2362b8e80941Smrg __gen_uint(values->YUVChannelSwap, 1, 1) | 2363b8e80941Smrg __gen_sfixed(values->C0, 3, 15, 10) | 2364b8e80941Smrg __gen_sfixed(values->C1, 16, 28, 10); 2365b8e80941Smrg 2366b8e80941Smrg dw[16] = 2367b8e80941Smrg __gen_sfixed(values->C2, 0, 12, 10) | 2368b8e80941Smrg __gen_sfixed(values->C3, 13, 25, 10); 2369b8e80941Smrg 2370b8e80941Smrg dw[17] = 2371b8e80941Smrg __gen_sfixed(values->C4, 0, 12, 10) | 2372b8e80941Smrg __gen_sfixed(values->C5, 13, 25, 10); 2373b8e80941Smrg 2374b8e80941Smrg dw[18] = 2375b8e80941Smrg __gen_sfixed(values->C6, 0, 12, 10) | 2376b8e80941Smrg __gen_sfixed(values->C7, 13, 25, 10); 2377b8e80941Smrg 2378b8e80941Smrg dw[19] = 2379b8e80941Smrg __gen_sfixed(values->C8, 0, 12, 10); 2380b8e80941Smrg 2381b8e80941Smrg dw[20] = 2382b8e80941Smrg __gen_sfixed(values->OffsetIn1, 0, 10, 8) | 2383b8e80941Smrg __gen_sfixed(values->OffsetOut1, 11, 21, 8); 2384b8e80941Smrg 2385b8e80941Smrg dw[21] = 2386b8e80941Smrg __gen_sfixed(values->OffsetIn2, 0, 10, 8) | 2387b8e80941Smrg __gen_sfixed(values->OffsetOut2, 11, 21, 8); 2388b8e80941Smrg 2389b8e80941Smrg dw[22] = 2390b8e80941Smrg __gen_sfixed(values->OffsetIn3, 0, 10, 8) | 2391b8e80941Smrg __gen_sfixed(values->OffsetOut3, 11, 21, 8); 2392b8e80941Smrg} 2393b8e80941Smrg 2394b8e80941Smrg#define GEN10_SFC_LOCK_BODY_length 1 2395b8e80941Smrgstruct GEN10_SFC_LOCK_BODY { 2396b8e80941Smrg uint32_t VESFCPipeSelect; 2397b8e80941Smrg bool PreScaledOutputSurfaceOutputEnable; 2398b8e80941Smrg}; 2399b8e80941Smrg 2400b8e80941Smrgstatic inline void 2401b8e80941SmrgGEN10_SFC_LOCK_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2402b8e80941Smrg __attribute__((unused)) void * restrict dst, 2403b8e80941Smrg __attribute__((unused)) const struct GEN10_SFC_LOCK_BODY * restrict values) 2404b8e80941Smrg{ 2405b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2406b8e80941Smrg 2407b8e80941Smrg dw[0] = 2408b8e80941Smrg __gen_uint(values->VESFCPipeSelect, 0, 0) | 2409b8e80941Smrg __gen_uint(values->PreScaledOutputSurfaceOutputEnable, 1, 1); 2410b8e80941Smrg} 2411b8e80941Smrg 2412b8e80941Smrg#define GEN10_SF_CLIP_VIEWPORT_length 16 2413b8e80941Smrgstruct GEN10_SF_CLIP_VIEWPORT { 2414b8e80941Smrg float ViewportMatrixElementm00; 2415b8e80941Smrg float ViewportMatrixElementm11; 2416b8e80941Smrg float ViewportMatrixElementm22; 2417b8e80941Smrg float ViewportMatrixElementm30; 2418b8e80941Smrg float ViewportMatrixElementm31; 2419b8e80941Smrg float ViewportMatrixElementm32; 2420b8e80941Smrg float XMinClipGuardband; 2421b8e80941Smrg float XMaxClipGuardband; 2422b8e80941Smrg float YMinClipGuardband; 2423b8e80941Smrg float YMaxClipGuardband; 2424b8e80941Smrg float XMinViewPort; 2425b8e80941Smrg float XMaxViewPort; 2426b8e80941Smrg float YMinViewPort; 2427b8e80941Smrg float YMaxViewPort; 2428b8e80941Smrg}; 2429b8e80941Smrg 2430b8e80941Smrgstatic inline void 2431b8e80941SmrgGEN10_SF_CLIP_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 2432b8e80941Smrg __attribute__((unused)) void * restrict dst, 2433b8e80941Smrg __attribute__((unused)) const struct GEN10_SF_CLIP_VIEWPORT * restrict values) 2434b8e80941Smrg{ 2435b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2436b8e80941Smrg 2437b8e80941Smrg dw[0] = 2438b8e80941Smrg __gen_float(values->ViewportMatrixElementm00); 2439b8e80941Smrg 2440b8e80941Smrg dw[1] = 2441b8e80941Smrg __gen_float(values->ViewportMatrixElementm11); 2442b8e80941Smrg 2443b8e80941Smrg dw[2] = 2444b8e80941Smrg __gen_float(values->ViewportMatrixElementm22); 2445b8e80941Smrg 2446b8e80941Smrg dw[3] = 2447b8e80941Smrg __gen_float(values->ViewportMatrixElementm30); 2448b8e80941Smrg 2449b8e80941Smrg dw[4] = 2450b8e80941Smrg __gen_float(values->ViewportMatrixElementm31); 2451b8e80941Smrg 2452b8e80941Smrg dw[5] = 2453b8e80941Smrg __gen_float(values->ViewportMatrixElementm32); 2454b8e80941Smrg 2455b8e80941Smrg dw[6] = 0; 2456b8e80941Smrg 2457b8e80941Smrg dw[7] = 0; 2458b8e80941Smrg 2459b8e80941Smrg dw[8] = 2460b8e80941Smrg __gen_float(values->XMinClipGuardband); 2461b8e80941Smrg 2462b8e80941Smrg dw[9] = 2463b8e80941Smrg __gen_float(values->XMaxClipGuardband); 2464b8e80941Smrg 2465b8e80941Smrg dw[10] = 2466b8e80941Smrg __gen_float(values->YMinClipGuardband); 2467b8e80941Smrg 2468b8e80941Smrg dw[11] = 2469b8e80941Smrg __gen_float(values->YMaxClipGuardband); 2470b8e80941Smrg 2471b8e80941Smrg dw[12] = 2472b8e80941Smrg __gen_float(values->XMinViewPort); 2473b8e80941Smrg 2474b8e80941Smrg dw[13] = 2475b8e80941Smrg __gen_float(values->XMaxViewPort); 2476b8e80941Smrg 2477b8e80941Smrg dw[14] = 2478b8e80941Smrg __gen_float(values->YMinViewPort); 2479b8e80941Smrg 2480b8e80941Smrg dw[15] = 2481b8e80941Smrg __gen_float(values->YMaxViewPort); 2482b8e80941Smrg} 2483b8e80941Smrg 2484b8e80941Smrg#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1 2485b8e80941Smrgstruct GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL { 2486b8e80941Smrg uint32_t SourceAttribute; 2487b8e80941Smrg uint32_t SwizzleSelect; 2488b8e80941Smrg#define INPUTATTR 0 2489b8e80941Smrg#define INPUTATTR_FACING 1 2490b8e80941Smrg#define INPUTATTR_W 2 2491b8e80941Smrg#define INPUTATTR_FACING_W 3 2492b8e80941Smrg uint32_t ConstantSource; 2493b8e80941Smrg#define CONST_0000 0 2494b8e80941Smrg#define CONST_0001_FLOAT 1 2495b8e80941Smrg#define CONST_1111_FLOAT 2 2496b8e80941Smrg#define PRIM_ID 3 2497b8e80941Smrg uint32_t SwizzleControlMode; 2498b8e80941Smrg bool ComponentOverrideX; 2499b8e80941Smrg bool ComponentOverrideY; 2500b8e80941Smrg bool ComponentOverrideZ; 2501b8e80941Smrg bool ComponentOverrideW; 2502b8e80941Smrg}; 2503b8e80941Smrg 2504b8e80941Smrgstatic inline void 2505b8e80941SmrgGEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__attribute__((unused)) __gen_user_data *data, 2506b8e80941Smrg __attribute__((unused)) void * restrict dst, 2507b8e80941Smrg __attribute__((unused)) const struct GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values) 2508b8e80941Smrg{ 2509b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2510b8e80941Smrg 2511b8e80941Smrg dw[0] = 2512b8e80941Smrg __gen_uint(values->SourceAttribute, 0, 4) | 2513b8e80941Smrg __gen_uint(values->SwizzleSelect, 6, 7) | 2514b8e80941Smrg __gen_uint(values->ConstantSource, 9, 10) | 2515b8e80941Smrg __gen_uint(values->SwizzleControlMode, 11, 11) | 2516b8e80941Smrg __gen_uint(values->ComponentOverrideX, 12, 12) | 2517b8e80941Smrg __gen_uint(values->ComponentOverrideY, 13, 13) | 2518b8e80941Smrg __gen_uint(values->ComponentOverrideZ, 14, 14) | 2519b8e80941Smrg __gen_uint(values->ComponentOverrideW, 15, 15); 2520b8e80941Smrg} 2521b8e80941Smrg 2522b8e80941Smrg#define GEN10_SO_DECL_length 1 2523b8e80941Smrgstruct GEN10_SO_DECL { 2524b8e80941Smrg uint32_t ComponentMask; 2525b8e80941Smrg uint32_t RegisterIndex; 2526b8e80941Smrg uint32_t HoleFlag; 2527b8e80941Smrg uint32_t OutputBufferSlot; 2528b8e80941Smrg}; 2529b8e80941Smrg 2530b8e80941Smrgstatic inline void 2531b8e80941SmrgGEN10_SO_DECL_pack(__attribute__((unused)) __gen_user_data *data, 2532b8e80941Smrg __attribute__((unused)) void * restrict dst, 2533b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_DECL * restrict values) 2534b8e80941Smrg{ 2535b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2536b8e80941Smrg 2537b8e80941Smrg dw[0] = 2538b8e80941Smrg __gen_uint(values->ComponentMask, 0, 3) | 2539b8e80941Smrg __gen_uint(values->RegisterIndex, 4, 9) | 2540b8e80941Smrg __gen_uint(values->HoleFlag, 11, 11) | 2541b8e80941Smrg __gen_uint(values->OutputBufferSlot, 12, 13); 2542b8e80941Smrg} 2543b8e80941Smrg 2544b8e80941Smrg#define GEN10_SO_DECL_ENTRY_length 2 2545b8e80941Smrgstruct GEN10_SO_DECL_ENTRY { 2546b8e80941Smrg struct GEN10_SO_DECL Stream0Decl; 2547b8e80941Smrg struct GEN10_SO_DECL Stream1Decl; 2548b8e80941Smrg struct GEN10_SO_DECL Stream2Decl; 2549b8e80941Smrg struct GEN10_SO_DECL Stream3Decl; 2550b8e80941Smrg}; 2551b8e80941Smrg 2552b8e80941Smrgstatic inline void 2553b8e80941SmrgGEN10_SO_DECL_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 2554b8e80941Smrg __attribute__((unused)) void * restrict dst, 2555b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_DECL_ENTRY * restrict values) 2556b8e80941Smrg{ 2557b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2558b8e80941Smrg 2559b8e80941Smrg uint32_t v0_0; 2560b8e80941Smrg GEN10_SO_DECL_pack(data, &v0_0, &values->Stream0Decl); 2561b8e80941Smrg 2562b8e80941Smrg uint32_t v0_1; 2563b8e80941Smrg GEN10_SO_DECL_pack(data, &v0_1, &values->Stream1Decl); 2564b8e80941Smrg 2565b8e80941Smrg dw[0] = 2566b8e80941Smrg __gen_uint(v0_0, 0, 15) | 2567b8e80941Smrg __gen_uint(v0_1, 16, 31); 2568b8e80941Smrg 2569b8e80941Smrg uint32_t v1_0; 2570b8e80941Smrg GEN10_SO_DECL_pack(data, &v1_0, &values->Stream2Decl); 2571b8e80941Smrg 2572b8e80941Smrg uint32_t v1_1; 2573b8e80941Smrg GEN10_SO_DECL_pack(data, &v1_1, &values->Stream3Decl); 2574b8e80941Smrg 2575b8e80941Smrg dw[1] = 2576b8e80941Smrg __gen_uint(v1_0, 0, 15) | 2577b8e80941Smrg __gen_uint(v1_1, 16, 31); 2578b8e80941Smrg} 2579b8e80941Smrg 2580b8e80941Smrg#define GEN10_VDENC_SURFACE_CONTROL_BITS_length 1 2581b8e80941Smrgstruct GEN10_VDENC_SURFACE_CONTROL_BITS { 2582b8e80941Smrg uint32_t MOCS; 2583b8e80941Smrg uint32_t ArbitrationPriorityControl; 2584b8e80941Smrg#define Highestpriority 0 2585b8e80941Smrg#define Secondhighestpriority 1 2586b8e80941Smrg#define Thirdhighestpriority 2 2587b8e80941Smrg#define Lowestpriority 3 2588b8e80941Smrg bool MemoryCompressionEnable; 2589b8e80941Smrg uint32_t MemoryCompressionMode; 2590b8e80941Smrg uint32_t CacheSelect; 2591b8e80941Smrg uint32_t TiledResourceMode; 2592b8e80941Smrg#define TRMODE_NONE 0 2593b8e80941Smrg#define TRMODE_TILEYF 1 2594b8e80941Smrg#define TRMODE_TILEYS 2 2595b8e80941Smrg}; 2596b8e80941Smrg 2597b8e80941Smrgstatic inline void 2598b8e80941SmrgGEN10_VDENC_SURFACE_CONTROL_BITS_pack(__attribute__((unused)) __gen_user_data *data, 2599b8e80941Smrg __attribute__((unused)) void * restrict dst, 2600b8e80941Smrg __attribute__((unused)) const struct GEN10_VDENC_SURFACE_CONTROL_BITS * restrict values) 2601b8e80941Smrg{ 2602b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2603b8e80941Smrg 2604b8e80941Smrg dw[0] = 2605b8e80941Smrg __gen_uint(values->MOCS, 1, 6) | 2606b8e80941Smrg __gen_uint(values->ArbitrationPriorityControl, 7, 8) | 2607b8e80941Smrg __gen_uint(values->MemoryCompressionEnable, 9, 9) | 2608b8e80941Smrg __gen_uint(values->MemoryCompressionMode, 10, 10) | 2609b8e80941Smrg __gen_uint(values->CacheSelect, 12, 12) | 2610b8e80941Smrg __gen_uint(values->TiledResourceMode, 13, 14); 2611b8e80941Smrg} 2612b8e80941Smrg 2613b8e80941Smrg#define GEN10_VDENC_PICTURE_length 3 2614b8e80941Smrgstruct GEN10_VDENC_PICTURE { 2615b8e80941Smrg __gen_address_type Address; 2616b8e80941Smrg struct GEN10_VDENC_SURFACE_CONTROL_BITS PictureFields; 2617b8e80941Smrg}; 2618b8e80941Smrg 2619b8e80941Smrgstatic inline void 2620b8e80941SmrgGEN10_VDENC_PICTURE_pack(__attribute__((unused)) __gen_user_data *data, 2621b8e80941Smrg __attribute__((unused)) void * restrict dst, 2622b8e80941Smrg __attribute__((unused)) const struct GEN10_VDENC_PICTURE * restrict values) 2623b8e80941Smrg{ 2624b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2625b8e80941Smrg 2626b8e80941Smrg const uint64_t v0_address = 2627b8e80941Smrg __gen_combine_address(data, &dw[0], values->Address, 0); 2628b8e80941Smrg dw[0] = v0_address; 2629b8e80941Smrg dw[1] = v0_address >> 32; 2630b8e80941Smrg 2631b8e80941Smrg GEN10_VDENC_SURFACE_CONTROL_BITS_pack(data, &dw[2], &values->PictureFields); 2632b8e80941Smrg} 2633b8e80941Smrg 2634b8e80941Smrg#define GEN10_VDENC_SURFACE_STATE_FIELDS_length 4 2635b8e80941Smrgstruct GEN10_VDENC_SURFACE_STATE_FIELDS { 2636b8e80941Smrg float CrVCbUPixelOffsetVDirection; 2637b8e80941Smrg bool SurfaceFormatByteSwizzle; 2638b8e80941Smrg uint32_t ColorSpaceSelection; 2639b8e80941Smrg uint32_t Width; 2640b8e80941Smrg uint32_t Height; 2641b8e80941Smrg uint32_t TileWalk; 2642b8e80941Smrg#define TW_XMAJOR 0 2643b8e80941Smrg#define TW_YMAJOR 1 2644b8e80941Smrg uint32_t TiledSurface; 2645b8e80941Smrg bool HalfPitchforChroma; 2646b8e80941Smrg uint32_t SurfacePitch; 2647b8e80941Smrg uint32_t ChromaDownsampleFilterControl; 2648b8e80941Smrg uint32_t Format; 2649b8e80941Smrg uint32_t SurfaceFormat; 2650b8e80941Smrg#define VDENC_YUV422 0 2651b8e80941Smrg#define VDENC_RGBA4444 1 2652b8e80941Smrg#define VDENC_YUV444 2 2653b8e80941Smrg#define VDENC_Y8_UNORM 3 2654b8e80941Smrg#define VDENC_PLANAR_420_8 4 2655b8e80941Smrg#define VDENC_YCRCB_SwapY422 5 2656b8e80941Smrg#define VDENC_YCRCB_SwapUV422 6 2657b8e80941Smrg#define VDENC_YCRCB_SwapUVY422 7 2658b8e80941Smrg#define VDENC_P010 8 2659b8e80941Smrg#define VDENC_RGBA10bitpacked 9 2660b8e80941Smrg#define VDENC_Y410 10 2661b8e80941Smrg#define VDENC_NV21 11 2662b8e80941Smrg#define VDENC_P010Variant 12 2663b8e80941Smrg uint32_t YOffsetforUCb; 2664b8e80941Smrg uint32_t XOffsetforUCb; 2665b8e80941Smrg uint32_t YOffsetforVCr; 2666b8e80941Smrg uint32_t XOffsetforVCr; 2667b8e80941Smrg}; 2668b8e80941Smrg 2669b8e80941Smrgstatic inline void 2670b8e80941SmrgGEN10_VDENC_SURFACE_STATE_FIELDS_pack(__attribute__((unused)) __gen_user_data *data, 2671b8e80941Smrg __attribute__((unused)) void * restrict dst, 2672b8e80941Smrg __attribute__((unused)) const struct GEN10_VDENC_SURFACE_STATE_FIELDS * restrict values) 2673b8e80941Smrg{ 2674b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2675b8e80941Smrg 2676b8e80941Smrg dw[0] = 2677b8e80941Smrg __gen_ufixed(values->CrVCbUPixelOffsetVDirection, 0, 1, 2) | 2678b8e80941Smrg __gen_uint(values->SurfaceFormatByteSwizzle, 2, 2) | 2679b8e80941Smrg __gen_uint(values->ColorSpaceSelection, 3, 3) | 2680b8e80941Smrg __gen_uint(values->Width, 4, 17) | 2681b8e80941Smrg __gen_uint(values->Height, 18, 31); 2682b8e80941Smrg 2683b8e80941Smrg dw[1] = 2684b8e80941Smrg __gen_uint(values->TileWalk, 0, 0) | 2685b8e80941Smrg __gen_uint(values->TiledSurface, 1, 1) | 2686b8e80941Smrg __gen_uint(values->HalfPitchforChroma, 2, 2) | 2687b8e80941Smrg __gen_uint(values->SurfacePitch, 3, 19) | 2688b8e80941Smrg __gen_uint(values->ChromaDownsampleFilterControl, 20, 22) | 2689b8e80941Smrg __gen_uint(values->Format, 27, 31) | 2690b8e80941Smrg __gen_uint(values->SurfaceFormat, 28, 31); 2691b8e80941Smrg 2692b8e80941Smrg dw[2] = 2693b8e80941Smrg __gen_uint(values->YOffsetforUCb, 0, 14) | 2694b8e80941Smrg __gen_uint(values->XOffsetforUCb, 16, 30); 2695b8e80941Smrg 2696b8e80941Smrg dw[3] = 2697b8e80941Smrg __gen_uint(values->YOffsetforVCr, 0, 15) | 2698b8e80941Smrg __gen_uint(values->XOffsetforVCr, 16, 28); 2699b8e80941Smrg} 2700b8e80941Smrg 2701b8e80941Smrg#define GEN10_VERTEX_BUFFER_STATE_length 4 2702b8e80941Smrgstruct GEN10_VERTEX_BUFFER_STATE { 2703b8e80941Smrg uint32_t BufferPitch; 2704b8e80941Smrg bool NullVertexBuffer; 2705b8e80941Smrg bool AddressModifyEnable; 2706b8e80941Smrg uint32_t MOCS; 2707b8e80941Smrg uint32_t VertexBufferIndex; 2708b8e80941Smrg __gen_address_type BufferStartingAddress; 2709b8e80941Smrg uint32_t BufferSize; 2710b8e80941Smrg}; 2711b8e80941Smrg 2712b8e80941Smrgstatic inline void 2713b8e80941SmrgGEN10_VERTEX_BUFFER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 2714b8e80941Smrg __attribute__((unused)) void * restrict dst, 2715b8e80941Smrg __attribute__((unused)) const struct GEN10_VERTEX_BUFFER_STATE * restrict values) 2716b8e80941Smrg{ 2717b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2718b8e80941Smrg 2719b8e80941Smrg dw[0] = 2720b8e80941Smrg __gen_uint(values->BufferPitch, 0, 11) | 2721b8e80941Smrg __gen_uint(values->NullVertexBuffer, 13, 13) | 2722b8e80941Smrg __gen_uint(values->AddressModifyEnable, 14, 14) | 2723b8e80941Smrg __gen_uint(values->MOCS, 16, 22) | 2724b8e80941Smrg __gen_uint(values->VertexBufferIndex, 26, 31); 2725b8e80941Smrg 2726b8e80941Smrg const uint64_t v1_address = 2727b8e80941Smrg __gen_combine_address(data, &dw[1], values->BufferStartingAddress, 0); 2728b8e80941Smrg dw[1] = v1_address; 2729b8e80941Smrg dw[2] = v1_address >> 32; 2730b8e80941Smrg 2731b8e80941Smrg dw[3] = 2732b8e80941Smrg __gen_uint(values->BufferSize, 0, 31); 2733b8e80941Smrg} 2734b8e80941Smrg 2735b8e80941Smrg#define GEN10_VERTEX_ELEMENT_STATE_length 2 2736b8e80941Smrgstruct GEN10_VERTEX_ELEMENT_STATE { 2737b8e80941Smrg uint32_t SourceElementOffset; 2738b8e80941Smrg bool EdgeFlagEnable; 2739b8e80941Smrg uint32_t SourceElementFormat; 2740b8e80941Smrg bool Valid; 2741b8e80941Smrg uint32_t VertexBufferIndex; 2742b8e80941Smrg enum GEN10_3D_Vertex_Component_Control Component3Control; 2743b8e80941Smrg enum GEN10_3D_Vertex_Component_Control Component2Control; 2744b8e80941Smrg enum GEN10_3D_Vertex_Component_Control Component1Control; 2745b8e80941Smrg enum GEN10_3D_Vertex_Component_Control Component0Control; 2746b8e80941Smrg}; 2747b8e80941Smrg 2748b8e80941Smrgstatic inline void 2749b8e80941SmrgGEN10_VERTEX_ELEMENT_STATE_pack(__attribute__((unused)) __gen_user_data *data, 2750b8e80941Smrg __attribute__((unused)) void * restrict dst, 2751b8e80941Smrg __attribute__((unused)) const struct GEN10_VERTEX_ELEMENT_STATE * restrict values) 2752b8e80941Smrg{ 2753b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2754b8e80941Smrg 2755b8e80941Smrg dw[0] = 2756b8e80941Smrg __gen_uint(values->SourceElementOffset, 0, 11) | 2757b8e80941Smrg __gen_uint(values->EdgeFlagEnable, 15, 15) | 2758b8e80941Smrg __gen_uint(values->SourceElementFormat, 16, 24) | 2759b8e80941Smrg __gen_uint(values->Valid, 25, 25) | 2760b8e80941Smrg __gen_uint(values->VertexBufferIndex, 26, 31); 2761b8e80941Smrg 2762b8e80941Smrg dw[1] = 2763b8e80941Smrg __gen_uint(values->Component3Control, 16, 18) | 2764b8e80941Smrg __gen_uint(values->Component2Control, 20, 22) | 2765b8e80941Smrg __gen_uint(values->Component1Control, 24, 26) | 2766b8e80941Smrg __gen_uint(values->Component0Control, 28, 30); 2767b8e80941Smrg} 2768b8e80941Smrg 2769b8e80941Smrg#define GEN10_3DPRIMITIVE_length 7 2770b8e80941Smrg#define GEN10_3DPRIMITIVE_length_bias 2 2771b8e80941Smrg#define GEN10_3DPRIMITIVE_header \ 2772b8e80941Smrg .DWordLength = 5, \ 2773b8e80941Smrg ._3DCommandSubOpcode = 0, \ 2774b8e80941Smrg ._3DCommandOpcode = 3, \ 2775b8e80941Smrg .CommandSubType = 3, \ 2776b8e80941Smrg .CommandType = 3 2777b8e80941Smrg 2778b8e80941Smrgstruct GEN10_3DPRIMITIVE { 2779b8e80941Smrg uint32_t DWordLength; 2780b8e80941Smrg bool PredicateEnable; 2781b8e80941Smrg bool UAVCoherencyRequired; 2782b8e80941Smrg bool IndirectParameterEnable; 2783b8e80941Smrg uint32_t ExtendedParametersPresent; 2784b8e80941Smrg uint32_t _3DCommandSubOpcode; 2785b8e80941Smrg uint32_t _3DCommandOpcode; 2786b8e80941Smrg uint32_t CommandSubType; 2787b8e80941Smrg uint32_t CommandType; 2788b8e80941Smrg enum GEN10_3D_Prim_Topo_Type PrimitiveTopologyType; 2789b8e80941Smrg uint32_t VertexAccessType; 2790b8e80941Smrg#define SEQUENTIAL 0 2791b8e80941Smrg#define RANDOM 1 2792b8e80941Smrg bool EndOffsetEnable; 2793b8e80941Smrg uint32_t VertexCountPerInstance; 2794b8e80941Smrg uint32_t StartVertexLocation; 2795b8e80941Smrg uint32_t InstanceCount; 2796b8e80941Smrg uint32_t StartInstanceLocation; 2797b8e80941Smrg int32_t BaseVertexLocation; 2798b8e80941Smrg uint32_t ExtendedParameter0; 2799b8e80941Smrg uint32_t ExtendedParameter1; 2800b8e80941Smrg uint32_t ExtendedParameter2; 2801b8e80941Smrg}; 2802b8e80941Smrg 2803b8e80941Smrgstatic inline void 2804b8e80941SmrgGEN10_3DPRIMITIVE_pack(__attribute__((unused)) __gen_user_data *data, 2805b8e80941Smrg __attribute__((unused)) void * restrict dst, 2806b8e80941Smrg __attribute__((unused)) const struct GEN10_3DPRIMITIVE * restrict values) 2807b8e80941Smrg{ 2808b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2809b8e80941Smrg 2810b8e80941Smrg dw[0] = 2811b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2812b8e80941Smrg __gen_uint(values->PredicateEnable, 8, 8) | 2813b8e80941Smrg __gen_uint(values->UAVCoherencyRequired, 9, 9) | 2814b8e80941Smrg __gen_uint(values->IndirectParameterEnable, 10, 10) | 2815b8e80941Smrg __gen_uint(values->ExtendedParametersPresent, 11, 11) | 2816b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2817b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2818b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2819b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2820b8e80941Smrg 2821b8e80941Smrg dw[1] = 2822b8e80941Smrg __gen_uint(values->PrimitiveTopologyType, 0, 5) | 2823b8e80941Smrg __gen_uint(values->VertexAccessType, 8, 8) | 2824b8e80941Smrg __gen_uint(values->EndOffsetEnable, 9, 9); 2825b8e80941Smrg 2826b8e80941Smrg dw[2] = 2827b8e80941Smrg __gen_uint(values->VertexCountPerInstance, 0, 31); 2828b8e80941Smrg 2829b8e80941Smrg dw[3] = 2830b8e80941Smrg __gen_uint(values->StartVertexLocation, 0, 31); 2831b8e80941Smrg 2832b8e80941Smrg dw[4] = 2833b8e80941Smrg __gen_uint(values->InstanceCount, 0, 31); 2834b8e80941Smrg 2835b8e80941Smrg dw[5] = 2836b8e80941Smrg __gen_uint(values->StartInstanceLocation, 0, 31); 2837b8e80941Smrg 2838b8e80941Smrg dw[6] = 2839b8e80941Smrg __gen_sint(values->BaseVertexLocation, 0, 31); 2840b8e80941Smrg} 2841b8e80941Smrg 2842b8e80941Smrg#define GEN10_3DSTATE_AA_LINE_PARAMETERS_length 3 2843b8e80941Smrg#define GEN10_3DSTATE_AA_LINE_PARAMETERS_length_bias 2 2844b8e80941Smrg#define GEN10_3DSTATE_AA_LINE_PARAMETERS_header \ 2845b8e80941Smrg .DWordLength = 1, \ 2846b8e80941Smrg ._3DCommandSubOpcode = 10, \ 2847b8e80941Smrg ._3DCommandOpcode = 1, \ 2848b8e80941Smrg .CommandSubType = 3, \ 2849b8e80941Smrg .CommandType = 3 2850b8e80941Smrg 2851b8e80941Smrgstruct GEN10_3DSTATE_AA_LINE_PARAMETERS { 2852b8e80941Smrg uint32_t DWordLength; 2853b8e80941Smrg uint32_t _3DCommandSubOpcode; 2854b8e80941Smrg uint32_t _3DCommandOpcode; 2855b8e80941Smrg uint32_t CommandSubType; 2856b8e80941Smrg uint32_t CommandType; 2857b8e80941Smrg float AACoverageSlope; 2858b8e80941Smrg float AAPointCoverageSlope; 2859b8e80941Smrg float AACoverageBias; 2860b8e80941Smrg float AAPointCoverageBias; 2861b8e80941Smrg float AACoverageEndCapSlope; 2862b8e80941Smrg float AAPointCoverageEndCapSlope; 2863b8e80941Smrg float AACoverageEndCapBias; 2864b8e80941Smrg float AAPointCoverageEndCapBias; 2865b8e80941Smrg}; 2866b8e80941Smrg 2867b8e80941Smrgstatic inline void 2868b8e80941SmrgGEN10_3DSTATE_AA_LINE_PARAMETERS_pack(__attribute__((unused)) __gen_user_data *data, 2869b8e80941Smrg __attribute__((unused)) void * restrict dst, 2870b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_AA_LINE_PARAMETERS * restrict values) 2871b8e80941Smrg{ 2872b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2873b8e80941Smrg 2874b8e80941Smrg dw[0] = 2875b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2876b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2877b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2878b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2879b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2880b8e80941Smrg 2881b8e80941Smrg dw[1] = 2882b8e80941Smrg __gen_ufixed(values->AACoverageSlope, 0, 7, 8) | 2883b8e80941Smrg __gen_ufixed(values->AAPointCoverageSlope, 8, 15, 8) | 2884b8e80941Smrg __gen_ufixed(values->AACoverageBias, 16, 23, 8) | 2885b8e80941Smrg __gen_ufixed(values->AAPointCoverageBias, 24, 31, 8); 2886b8e80941Smrg 2887b8e80941Smrg dw[2] = 2888b8e80941Smrg __gen_ufixed(values->AACoverageEndCapSlope, 0, 7, 8) | 2889b8e80941Smrg __gen_ufixed(values->AAPointCoverageEndCapSlope, 8, 15, 8) | 2890b8e80941Smrg __gen_ufixed(values->AACoverageEndCapBias, 16, 23, 8) | 2891b8e80941Smrg __gen_ufixed(values->AAPointCoverageEndCapBias, 24, 31, 8); 2892b8e80941Smrg} 2893b8e80941Smrg 2894b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 2 2895b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_header\ 2896b8e80941Smrg .DWordLength = 0, \ 2897b8e80941Smrg ._3DCommandSubOpcode = 70, \ 2898b8e80941Smrg ._3DCommandOpcode = 0, \ 2899b8e80941Smrg .CommandSubType = 3, \ 2900b8e80941Smrg .CommandType = 3 2901b8e80941Smrg 2902b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_EDIT_DS { 2903b8e80941Smrg uint32_t DWordLength; 2904b8e80941Smrg uint32_t _3DCommandSubOpcode; 2905b8e80941Smrg uint32_t _3DCommandOpcode; 2906b8e80941Smrg uint32_t CommandSubType; 2907b8e80941Smrg uint32_t CommandType; 2908b8e80941Smrg uint32_t BindingTableEditTarget; 2909b8e80941Smrg#define AllCores 3 2910b8e80941Smrg#define Core1 2 2911b8e80941Smrg#define Core0 1 2912b8e80941Smrg uint32_t BindingTableBlockClear; 2913b8e80941Smrg /* variable length fields follow */ 2914b8e80941Smrg}; 2915b8e80941Smrg 2916b8e80941Smrgstatic inline void 2917b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__attribute__((unused)) __gen_user_data *data, 2918b8e80941Smrg __attribute__((unused)) void * restrict dst, 2919b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values) 2920b8e80941Smrg{ 2921b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2922b8e80941Smrg 2923b8e80941Smrg dw[0] = 2924b8e80941Smrg __gen_uint(values->DWordLength, 0, 8) | 2925b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2926b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2927b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2928b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2929b8e80941Smrg 2930b8e80941Smrg dw[1] = 2931b8e80941Smrg __gen_uint(values->BindingTableEditTarget, 0, 1) | 2932b8e80941Smrg __gen_uint(values->BindingTableBlockClear, 16, 31); 2933b8e80941Smrg} 2934b8e80941Smrg 2935b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 2 2936b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_header\ 2937b8e80941Smrg .DWordLength = 0, \ 2938b8e80941Smrg ._3DCommandSubOpcode = 68, \ 2939b8e80941Smrg ._3DCommandOpcode = 0, \ 2940b8e80941Smrg .CommandSubType = 3, \ 2941b8e80941Smrg .CommandType = 3 2942b8e80941Smrg 2943b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_EDIT_GS { 2944b8e80941Smrg uint32_t DWordLength; 2945b8e80941Smrg uint32_t _3DCommandSubOpcode; 2946b8e80941Smrg uint32_t _3DCommandOpcode; 2947b8e80941Smrg uint32_t CommandSubType; 2948b8e80941Smrg uint32_t CommandType; 2949b8e80941Smrg uint32_t BindingTableEditTarget; 2950b8e80941Smrg#define AllCores 3 2951b8e80941Smrg#define Core1 2 2952b8e80941Smrg#define Core0 1 2953b8e80941Smrg uint32_t BindingTableBlockClear; 2954b8e80941Smrg /* variable length fields follow */ 2955b8e80941Smrg}; 2956b8e80941Smrg 2957b8e80941Smrgstatic inline void 2958b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__attribute__((unused)) __gen_user_data *data, 2959b8e80941Smrg __attribute__((unused)) void * restrict dst, 2960b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values) 2961b8e80941Smrg{ 2962b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2963b8e80941Smrg 2964b8e80941Smrg dw[0] = 2965b8e80941Smrg __gen_uint(values->DWordLength, 0, 8) | 2966b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2967b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2968b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2969b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2970b8e80941Smrg 2971b8e80941Smrg dw[1] = 2972b8e80941Smrg __gen_uint(values->BindingTableEditTarget, 0, 1) | 2973b8e80941Smrg __gen_uint(values->BindingTableBlockClear, 16, 31); 2974b8e80941Smrg} 2975b8e80941Smrg 2976b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 2 2977b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_header\ 2978b8e80941Smrg .DWordLength = 0, \ 2979b8e80941Smrg ._3DCommandSubOpcode = 69, \ 2980b8e80941Smrg ._3DCommandOpcode = 0, \ 2981b8e80941Smrg .CommandSubType = 3, \ 2982b8e80941Smrg .CommandType = 3 2983b8e80941Smrg 2984b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_EDIT_HS { 2985b8e80941Smrg uint32_t DWordLength; 2986b8e80941Smrg uint32_t _3DCommandSubOpcode; 2987b8e80941Smrg uint32_t _3DCommandOpcode; 2988b8e80941Smrg uint32_t CommandSubType; 2989b8e80941Smrg uint32_t CommandType; 2990b8e80941Smrg uint32_t BindingTableEditTarget; 2991b8e80941Smrg#define AllCores 3 2992b8e80941Smrg#define Core1 2 2993b8e80941Smrg#define Core0 1 2994b8e80941Smrg uint32_t BindingTableBlockClear; 2995b8e80941Smrg /* variable length fields follow */ 2996b8e80941Smrg}; 2997b8e80941Smrg 2998b8e80941Smrgstatic inline void 2999b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__attribute__((unused)) __gen_user_data *data, 3000b8e80941Smrg __attribute__((unused)) void * restrict dst, 3001b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values) 3002b8e80941Smrg{ 3003b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3004b8e80941Smrg 3005b8e80941Smrg dw[0] = 3006b8e80941Smrg __gen_uint(values->DWordLength, 0, 8) | 3007b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3008b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3009b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3010b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3011b8e80941Smrg 3012b8e80941Smrg dw[1] = 3013b8e80941Smrg __gen_uint(values->BindingTableEditTarget, 0, 1) | 3014b8e80941Smrg __gen_uint(values->BindingTableBlockClear, 16, 31); 3015b8e80941Smrg} 3016b8e80941Smrg 3017b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 2 3018b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_header\ 3019b8e80941Smrg .DWordLength = 0, \ 3020b8e80941Smrg ._3DCommandSubOpcode = 71, \ 3021b8e80941Smrg ._3DCommandOpcode = 0, \ 3022b8e80941Smrg .CommandSubType = 3, \ 3023b8e80941Smrg .CommandType = 3 3024b8e80941Smrg 3025b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_EDIT_PS { 3026b8e80941Smrg uint32_t DWordLength; 3027b8e80941Smrg uint32_t _3DCommandSubOpcode; 3028b8e80941Smrg uint32_t _3DCommandOpcode; 3029b8e80941Smrg uint32_t CommandSubType; 3030b8e80941Smrg uint32_t CommandType; 3031b8e80941Smrg uint32_t BindingTableEditTarget; 3032b8e80941Smrg#define AllCores 3 3033b8e80941Smrg#define Core1 2 3034b8e80941Smrg#define Core0 1 3035b8e80941Smrg uint32_t BindingTableBlockClear; 3036b8e80941Smrg /* variable length fields follow */ 3037b8e80941Smrg}; 3038b8e80941Smrg 3039b8e80941Smrgstatic inline void 3040b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__attribute__((unused)) __gen_user_data *data, 3041b8e80941Smrg __attribute__((unused)) void * restrict dst, 3042b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values) 3043b8e80941Smrg{ 3044b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3045b8e80941Smrg 3046b8e80941Smrg dw[0] = 3047b8e80941Smrg __gen_uint(values->DWordLength, 0, 8) | 3048b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3049b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3050b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3051b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3052b8e80941Smrg 3053b8e80941Smrg dw[1] = 3054b8e80941Smrg __gen_uint(values->BindingTableEditTarget, 0, 1) | 3055b8e80941Smrg __gen_uint(values->BindingTableBlockClear, 16, 31); 3056b8e80941Smrg} 3057b8e80941Smrg 3058b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 2 3059b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_header\ 3060b8e80941Smrg .DWordLength = 0, \ 3061b8e80941Smrg ._3DCommandSubOpcode = 67, \ 3062b8e80941Smrg ._3DCommandOpcode = 0, \ 3063b8e80941Smrg .CommandSubType = 3, \ 3064b8e80941Smrg .CommandType = 3 3065b8e80941Smrg 3066b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_EDIT_VS { 3067b8e80941Smrg uint32_t DWordLength; 3068b8e80941Smrg uint32_t _3DCommandSubOpcode; 3069b8e80941Smrg uint32_t _3DCommandOpcode; 3070b8e80941Smrg uint32_t CommandSubType; 3071b8e80941Smrg uint32_t CommandType; 3072b8e80941Smrg uint32_t BindingTableEditTarget; 3073b8e80941Smrg#define AllCores 3 3074b8e80941Smrg#define Core1 2 3075b8e80941Smrg#define Core0 1 3076b8e80941Smrg uint32_t BindingTableBlockClear; 3077b8e80941Smrg /* variable length fields follow */ 3078b8e80941Smrg}; 3079b8e80941Smrg 3080b8e80941Smrgstatic inline void 3081b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__attribute__((unused)) __gen_user_data *data, 3082b8e80941Smrg __attribute__((unused)) void * restrict dst, 3083b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values) 3084b8e80941Smrg{ 3085b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3086b8e80941Smrg 3087b8e80941Smrg dw[0] = 3088b8e80941Smrg __gen_uint(values->DWordLength, 0, 8) | 3089b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3090b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3091b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3092b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3093b8e80941Smrg 3094b8e80941Smrg dw[1] = 3095b8e80941Smrg __gen_uint(values->BindingTableEditTarget, 0, 1) | 3096b8e80941Smrg __gen_uint(values->BindingTableBlockClear, 16, 31); 3097b8e80941Smrg} 3098b8e80941Smrg 3099b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2 3100b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 2 3101b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_header\ 3102b8e80941Smrg .DWordLength = 0, \ 3103b8e80941Smrg ._3DCommandSubOpcode = 40, \ 3104b8e80941Smrg ._3DCommandOpcode = 0, \ 3105b8e80941Smrg .CommandSubType = 3, \ 3106b8e80941Smrg .CommandType = 3 3107b8e80941Smrg 3108b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS { 3109b8e80941Smrg uint32_t DWordLength; 3110b8e80941Smrg uint32_t _3DCommandSubOpcode; 3111b8e80941Smrg uint32_t _3DCommandOpcode; 3112b8e80941Smrg uint32_t CommandSubType; 3113b8e80941Smrg uint32_t CommandType; 3114b8e80941Smrg uint64_t PointertoDSBindingTable; 3115b8e80941Smrg}; 3116b8e80941Smrg 3117b8e80941Smrgstatic inline void 3118b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__attribute__((unused)) __gen_user_data *data, 3119b8e80941Smrg __attribute__((unused)) void * restrict dst, 3120b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values) 3121b8e80941Smrg{ 3122b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3123b8e80941Smrg 3124b8e80941Smrg dw[0] = 3125b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3126b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3127b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3128b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3129b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3130b8e80941Smrg 3131b8e80941Smrg dw[1] = 3132b8e80941Smrg __gen_offset(values->PointertoDSBindingTable, 5, 15); 3133b8e80941Smrg} 3134b8e80941Smrg 3135b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2 3136b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 2 3137b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_header\ 3138b8e80941Smrg .DWordLength = 0, \ 3139b8e80941Smrg ._3DCommandSubOpcode = 41, \ 3140b8e80941Smrg ._3DCommandOpcode = 0, \ 3141b8e80941Smrg .CommandSubType = 3, \ 3142b8e80941Smrg .CommandType = 3 3143b8e80941Smrg 3144b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS { 3145b8e80941Smrg uint32_t DWordLength; 3146b8e80941Smrg uint32_t _3DCommandSubOpcode; 3147b8e80941Smrg uint32_t _3DCommandOpcode; 3148b8e80941Smrg uint32_t CommandSubType; 3149b8e80941Smrg uint32_t CommandType; 3150b8e80941Smrg uint64_t PointertoGSBindingTable; 3151b8e80941Smrg}; 3152b8e80941Smrg 3153b8e80941Smrgstatic inline void 3154b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__attribute__((unused)) __gen_user_data *data, 3155b8e80941Smrg __attribute__((unused)) void * restrict dst, 3156b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values) 3157b8e80941Smrg{ 3158b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3159b8e80941Smrg 3160b8e80941Smrg dw[0] = 3161b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3162b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3163b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3164b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3165b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3166b8e80941Smrg 3167b8e80941Smrg dw[1] = 3168b8e80941Smrg __gen_offset(values->PointertoGSBindingTable, 5, 15); 3169b8e80941Smrg} 3170b8e80941Smrg 3171b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2 3172b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 2 3173b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_header\ 3174b8e80941Smrg .DWordLength = 0, \ 3175b8e80941Smrg ._3DCommandSubOpcode = 39, \ 3176b8e80941Smrg ._3DCommandOpcode = 0, \ 3177b8e80941Smrg .CommandSubType = 3, \ 3178b8e80941Smrg .CommandType = 3 3179b8e80941Smrg 3180b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS { 3181b8e80941Smrg uint32_t DWordLength; 3182b8e80941Smrg uint32_t _3DCommandSubOpcode; 3183b8e80941Smrg uint32_t _3DCommandOpcode; 3184b8e80941Smrg uint32_t CommandSubType; 3185b8e80941Smrg uint32_t CommandType; 3186b8e80941Smrg uint64_t PointertoHSBindingTable; 3187b8e80941Smrg}; 3188b8e80941Smrg 3189b8e80941Smrgstatic inline void 3190b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__attribute__((unused)) __gen_user_data *data, 3191b8e80941Smrg __attribute__((unused)) void * restrict dst, 3192b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values) 3193b8e80941Smrg{ 3194b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3195b8e80941Smrg 3196b8e80941Smrg dw[0] = 3197b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3198b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3199b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3200b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3201b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3202b8e80941Smrg 3203b8e80941Smrg dw[1] = 3204b8e80941Smrg __gen_offset(values->PointertoHSBindingTable, 5, 15); 3205b8e80941Smrg} 3206b8e80941Smrg 3207b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2 3208b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 2 3209b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_header\ 3210b8e80941Smrg .DWordLength = 0, \ 3211b8e80941Smrg ._3DCommandSubOpcode = 42, \ 3212b8e80941Smrg ._3DCommandOpcode = 0, \ 3213b8e80941Smrg .CommandSubType = 3, \ 3214b8e80941Smrg .CommandType = 3 3215b8e80941Smrg 3216b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS { 3217b8e80941Smrg uint32_t DWordLength; 3218b8e80941Smrg uint32_t _3DCommandSubOpcode; 3219b8e80941Smrg uint32_t _3DCommandOpcode; 3220b8e80941Smrg uint32_t CommandSubType; 3221b8e80941Smrg uint32_t CommandType; 3222b8e80941Smrg uint64_t PointertoPSBindingTable; 3223b8e80941Smrg}; 3224b8e80941Smrg 3225b8e80941Smrgstatic inline void 3226b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__attribute__((unused)) __gen_user_data *data, 3227b8e80941Smrg __attribute__((unused)) void * restrict dst, 3228b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values) 3229b8e80941Smrg{ 3230b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3231b8e80941Smrg 3232b8e80941Smrg dw[0] = 3233b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3234b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3235b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3236b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3237b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3238b8e80941Smrg 3239b8e80941Smrg dw[1] = 3240b8e80941Smrg __gen_offset(values->PointertoPSBindingTable, 5, 15); 3241b8e80941Smrg} 3242b8e80941Smrg 3243b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2 3244b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 2 3245b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_header\ 3246b8e80941Smrg .DWordLength = 0, \ 3247b8e80941Smrg ._3DCommandSubOpcode = 38, \ 3248b8e80941Smrg ._3DCommandOpcode = 0, \ 3249b8e80941Smrg .CommandSubType = 3, \ 3250b8e80941Smrg .CommandType = 3 3251b8e80941Smrg 3252b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS { 3253b8e80941Smrg uint32_t DWordLength; 3254b8e80941Smrg uint32_t _3DCommandSubOpcode; 3255b8e80941Smrg uint32_t _3DCommandOpcode; 3256b8e80941Smrg uint32_t CommandSubType; 3257b8e80941Smrg uint32_t CommandType; 3258b8e80941Smrg uint64_t PointertoVSBindingTable; 3259b8e80941Smrg}; 3260b8e80941Smrg 3261b8e80941Smrgstatic inline void 3262b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__attribute__((unused)) __gen_user_data *data, 3263b8e80941Smrg __attribute__((unused)) void * restrict dst, 3264b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values) 3265b8e80941Smrg{ 3266b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3267b8e80941Smrg 3268b8e80941Smrg dw[0] = 3269b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3270b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3271b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3272b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3273b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3274b8e80941Smrg 3275b8e80941Smrg dw[1] = 3276b8e80941Smrg __gen_offset(values->PointertoVSBindingTable, 5, 15); 3277b8e80941Smrg} 3278b8e80941Smrg 3279b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 4 3280b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 2 3281b8e80941Smrg#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\ 3282b8e80941Smrg .DWordLength = 2, \ 3283b8e80941Smrg ._3DCommandSubOpcode = 25, \ 3284b8e80941Smrg ._3DCommandOpcode = 1, \ 3285b8e80941Smrg .CommandSubType = 3, \ 3286b8e80941Smrg .CommandType = 3 3287b8e80941Smrg 3288b8e80941Smrgstruct GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC { 3289b8e80941Smrg uint32_t DWordLength; 3290b8e80941Smrg uint32_t _3DCommandSubOpcode; 3291b8e80941Smrg uint32_t _3DCommandOpcode; 3292b8e80941Smrg uint32_t CommandSubType; 3293b8e80941Smrg uint32_t CommandType; 3294b8e80941Smrg uint32_t MOCS; 3295b8e80941Smrg uint32_t BindingTablePoolEnable; 3296b8e80941Smrg __gen_address_type BindingTablePoolBaseAddress; 3297b8e80941Smrg uint32_t BindingTablePoolBufferSize; 3298b8e80941Smrg#define NoValidData 0 3299b8e80941Smrg}; 3300b8e80941Smrg 3301b8e80941Smrgstatic inline void 3302b8e80941SmrgGEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 3303b8e80941Smrg __attribute__((unused)) void * restrict dst, 3304b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values) 3305b8e80941Smrg{ 3306b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3307b8e80941Smrg 3308b8e80941Smrg dw[0] = 3309b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3310b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3311b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3312b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3313b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3314b8e80941Smrg 3315b8e80941Smrg const uint64_t v1 = 3316b8e80941Smrg __gen_uint(values->MOCS, 0, 6) | 3317b8e80941Smrg __gen_uint(values->BindingTablePoolEnable, 11, 11); 3318b8e80941Smrg const uint64_t v1_address = 3319b8e80941Smrg __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, v1); 3320b8e80941Smrg dw[1] = v1_address; 3321b8e80941Smrg dw[2] = (v1_address >> 32) | (v1 >> 32); 3322b8e80941Smrg 3323b8e80941Smrg dw[3] = 3324b8e80941Smrg __gen_uint(values->BindingTablePoolBufferSize, 12, 31); 3325b8e80941Smrg} 3326b8e80941Smrg 3327b8e80941Smrg#define GEN10_3DSTATE_BLEND_STATE_POINTERS_length 2 3328b8e80941Smrg#define GEN10_3DSTATE_BLEND_STATE_POINTERS_length_bias 2 3329b8e80941Smrg#define GEN10_3DSTATE_BLEND_STATE_POINTERS_header\ 3330b8e80941Smrg .DWordLength = 0, \ 3331b8e80941Smrg ._3DCommandSubOpcode = 36, \ 3332b8e80941Smrg ._3DCommandOpcode = 0, \ 3333b8e80941Smrg .CommandSubType = 3, \ 3334b8e80941Smrg .CommandType = 3 3335b8e80941Smrg 3336b8e80941Smrgstruct GEN10_3DSTATE_BLEND_STATE_POINTERS { 3337b8e80941Smrg uint32_t DWordLength; 3338b8e80941Smrg uint32_t _3DCommandSubOpcode; 3339b8e80941Smrg uint32_t _3DCommandOpcode; 3340b8e80941Smrg uint32_t CommandSubType; 3341b8e80941Smrg uint32_t CommandType; 3342b8e80941Smrg bool BlendStatePointerValid; 3343b8e80941Smrg uint64_t BlendStatePointer; 3344b8e80941Smrg}; 3345b8e80941Smrg 3346b8e80941Smrgstatic inline void 3347b8e80941SmrgGEN10_3DSTATE_BLEND_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 3348b8e80941Smrg __attribute__((unused)) void * restrict dst, 3349b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_BLEND_STATE_POINTERS * restrict values) 3350b8e80941Smrg{ 3351b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3352b8e80941Smrg 3353b8e80941Smrg dw[0] = 3354b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3355b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3356b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3357b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3358b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3359b8e80941Smrg 3360b8e80941Smrg dw[1] = 3361b8e80941Smrg __gen_uint(values->BlendStatePointerValid, 0, 0) | 3362b8e80941Smrg __gen_offset(values->BlendStatePointer, 6, 31); 3363b8e80941Smrg} 3364b8e80941Smrg 3365b8e80941Smrg#define GEN10_3DSTATE_CC_STATE_POINTERS_length 2 3366b8e80941Smrg#define GEN10_3DSTATE_CC_STATE_POINTERS_length_bias 2 3367b8e80941Smrg#define GEN10_3DSTATE_CC_STATE_POINTERS_header \ 3368b8e80941Smrg .DWordLength = 0, \ 3369b8e80941Smrg ._3DCommandSubOpcode = 14, \ 3370b8e80941Smrg ._3DCommandOpcode = 0, \ 3371b8e80941Smrg .CommandSubType = 3, \ 3372b8e80941Smrg .CommandType = 3 3373b8e80941Smrg 3374b8e80941Smrgstruct GEN10_3DSTATE_CC_STATE_POINTERS { 3375b8e80941Smrg uint32_t DWordLength; 3376b8e80941Smrg uint32_t _3DCommandSubOpcode; 3377b8e80941Smrg uint32_t _3DCommandOpcode; 3378b8e80941Smrg uint32_t CommandSubType; 3379b8e80941Smrg uint32_t CommandType; 3380b8e80941Smrg bool ColorCalcStatePointerValid; 3381b8e80941Smrg uint64_t ColorCalcStatePointer; 3382b8e80941Smrg}; 3383b8e80941Smrg 3384b8e80941Smrgstatic inline void 3385b8e80941SmrgGEN10_3DSTATE_CC_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 3386b8e80941Smrg __attribute__((unused)) void * restrict dst, 3387b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CC_STATE_POINTERS * restrict values) 3388b8e80941Smrg{ 3389b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3390b8e80941Smrg 3391b8e80941Smrg dw[0] = 3392b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3393b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3394b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3395b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3396b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3397b8e80941Smrg 3398b8e80941Smrg dw[1] = 3399b8e80941Smrg __gen_uint(values->ColorCalcStatePointerValid, 0, 0) | 3400b8e80941Smrg __gen_offset(values->ColorCalcStatePointer, 6, 31); 3401b8e80941Smrg} 3402b8e80941Smrg 3403b8e80941Smrg#define GEN10_3DSTATE_CHROMA_KEY_length 4 3404b8e80941Smrg#define GEN10_3DSTATE_CHROMA_KEY_length_bias 2 3405b8e80941Smrg#define GEN10_3DSTATE_CHROMA_KEY_header \ 3406b8e80941Smrg .DWordLength = 2, \ 3407b8e80941Smrg ._3DCommandSubOpcode = 4, \ 3408b8e80941Smrg ._3DCommandOpcode = 1, \ 3409b8e80941Smrg .CommandSubType = 3, \ 3410b8e80941Smrg .CommandType = 3 3411b8e80941Smrg 3412b8e80941Smrgstruct GEN10_3DSTATE_CHROMA_KEY { 3413b8e80941Smrg uint32_t DWordLength; 3414b8e80941Smrg uint32_t _3DCommandSubOpcode; 3415b8e80941Smrg uint32_t _3DCommandOpcode; 3416b8e80941Smrg uint32_t CommandSubType; 3417b8e80941Smrg uint32_t CommandType; 3418b8e80941Smrg uint32_t ChromaKeyTableIndex; 3419b8e80941Smrg uint32_t ChromaKeyLowValue; 3420b8e80941Smrg uint32_t ChromaKeyHighValue; 3421b8e80941Smrg}; 3422b8e80941Smrg 3423b8e80941Smrgstatic inline void 3424b8e80941SmrgGEN10_3DSTATE_CHROMA_KEY_pack(__attribute__((unused)) __gen_user_data *data, 3425b8e80941Smrg __attribute__((unused)) void * restrict dst, 3426b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CHROMA_KEY * restrict values) 3427b8e80941Smrg{ 3428b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3429b8e80941Smrg 3430b8e80941Smrg dw[0] = 3431b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3432b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3433b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3434b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3435b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3436b8e80941Smrg 3437b8e80941Smrg dw[1] = 3438b8e80941Smrg __gen_uint(values->ChromaKeyTableIndex, 30, 31); 3439b8e80941Smrg 3440b8e80941Smrg dw[2] = 3441b8e80941Smrg __gen_uint(values->ChromaKeyLowValue, 0, 31); 3442b8e80941Smrg 3443b8e80941Smrg dw[3] = 3444b8e80941Smrg __gen_uint(values->ChromaKeyHighValue, 0, 31); 3445b8e80941Smrg} 3446b8e80941Smrg 3447b8e80941Smrg#define GEN10_3DSTATE_CLEAR_PARAMS_length 3 3448b8e80941Smrg#define GEN10_3DSTATE_CLEAR_PARAMS_length_bias 2 3449b8e80941Smrg#define GEN10_3DSTATE_CLEAR_PARAMS_header \ 3450b8e80941Smrg .DWordLength = 1, \ 3451b8e80941Smrg ._3DCommandSubOpcode = 4, \ 3452b8e80941Smrg ._3DCommandOpcode = 0, \ 3453b8e80941Smrg .CommandSubType = 3, \ 3454b8e80941Smrg .CommandType = 3 3455b8e80941Smrg 3456b8e80941Smrgstruct GEN10_3DSTATE_CLEAR_PARAMS { 3457b8e80941Smrg uint32_t DWordLength; 3458b8e80941Smrg uint32_t _3DCommandSubOpcode; 3459b8e80941Smrg uint32_t _3DCommandOpcode; 3460b8e80941Smrg uint32_t CommandSubType; 3461b8e80941Smrg uint32_t CommandType; 3462b8e80941Smrg float DepthClearValue; 3463b8e80941Smrg bool DepthClearValueValid; 3464b8e80941Smrg}; 3465b8e80941Smrg 3466b8e80941Smrgstatic inline void 3467b8e80941SmrgGEN10_3DSTATE_CLEAR_PARAMS_pack(__attribute__((unused)) __gen_user_data *data, 3468b8e80941Smrg __attribute__((unused)) void * restrict dst, 3469b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CLEAR_PARAMS * restrict values) 3470b8e80941Smrg{ 3471b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3472b8e80941Smrg 3473b8e80941Smrg dw[0] = 3474b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3475b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3476b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3477b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3478b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3479b8e80941Smrg 3480b8e80941Smrg dw[1] = 3481b8e80941Smrg __gen_float(values->DepthClearValue); 3482b8e80941Smrg 3483b8e80941Smrg dw[2] = 3484b8e80941Smrg __gen_uint(values->DepthClearValueValid, 0, 0); 3485b8e80941Smrg} 3486b8e80941Smrg 3487b8e80941Smrg#define GEN10_3DSTATE_CLIP_length 4 3488b8e80941Smrg#define GEN10_3DSTATE_CLIP_length_bias 2 3489b8e80941Smrg#define GEN10_3DSTATE_CLIP_header \ 3490b8e80941Smrg .DWordLength = 2, \ 3491b8e80941Smrg ._3DCommandSubOpcode = 18, \ 3492b8e80941Smrg ._3DCommandOpcode = 0, \ 3493b8e80941Smrg .CommandSubType = 3, \ 3494b8e80941Smrg .CommandType = 3 3495b8e80941Smrg 3496b8e80941Smrgstruct GEN10_3DSTATE_CLIP { 3497b8e80941Smrg uint32_t DWordLength; 3498b8e80941Smrg uint32_t _3DCommandSubOpcode; 3499b8e80941Smrg uint32_t _3DCommandOpcode; 3500b8e80941Smrg uint32_t CommandSubType; 3501b8e80941Smrg uint32_t CommandType; 3502b8e80941Smrg uint32_t UserClipDistanceCullTestEnableBitmask; 3503b8e80941Smrg bool StatisticsEnable; 3504b8e80941Smrg bool ForceClipMode; 3505b8e80941Smrg bool ForceUserClipDistanceClipTestEnableBitmask; 3506b8e80941Smrg bool EarlyCullEnable; 3507b8e80941Smrg uint32_t VertexSubPixelPrecisionSelect; 3508b8e80941Smrg#define _8Bit 0 3509b8e80941Smrg#define _4Bit 1 3510b8e80941Smrg bool ForceUserClipDistanceCullTestEnableBitmask; 3511b8e80941Smrg uint32_t TriangleFanProvokingVertexSelect; 3512b8e80941Smrg uint32_t LineStripListProvokingVertexSelect; 3513b8e80941Smrg uint32_t TriangleStripListProvokingVertexSelect; 3514b8e80941Smrg bool NonPerspectiveBarycentricEnable; 3515b8e80941Smrg bool PerspectiveDivideDisable; 3516b8e80941Smrg uint32_t ClipMode; 3517b8e80941Smrg#define CLIPMODE_NORMAL 0 3518b8e80941Smrg#define CLIPMODE_REJECT_ALL 3 3519b8e80941Smrg#define CLIPMODE_ACCEPT_ALL 4 3520b8e80941Smrg uint32_t UserClipDistanceClipTestEnableBitmask; 3521b8e80941Smrg bool GuardbandClipTestEnable; 3522b8e80941Smrg bool ViewportXYClipTestEnable; 3523b8e80941Smrg uint32_t APIMode; 3524b8e80941Smrg#define APIMODE_OGL 0 3525b8e80941Smrg#define APIMODE_D3D 1 3526b8e80941Smrg bool ClipEnable; 3527b8e80941Smrg uint32_t MaximumVPIndex; 3528b8e80941Smrg bool ForceZeroRTAIndexEnable; 3529b8e80941Smrg float MaximumPointWidth; 3530b8e80941Smrg float MinimumPointWidth; 3531b8e80941Smrg}; 3532b8e80941Smrg 3533b8e80941Smrgstatic inline void 3534b8e80941SmrgGEN10_3DSTATE_CLIP_pack(__attribute__((unused)) __gen_user_data *data, 3535b8e80941Smrg __attribute__((unused)) void * restrict dst, 3536b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CLIP * restrict values) 3537b8e80941Smrg{ 3538b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3539b8e80941Smrg 3540b8e80941Smrg dw[0] = 3541b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3542b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3543b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3544b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3545b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3546b8e80941Smrg 3547b8e80941Smrg dw[1] = 3548b8e80941Smrg __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 3549b8e80941Smrg __gen_uint(values->StatisticsEnable, 10, 10) | 3550b8e80941Smrg __gen_uint(values->ForceClipMode, 16, 16) | 3551b8e80941Smrg __gen_uint(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) | 3552b8e80941Smrg __gen_uint(values->EarlyCullEnable, 18, 18) | 3553b8e80941Smrg __gen_uint(values->VertexSubPixelPrecisionSelect, 19, 19) | 3554b8e80941Smrg __gen_uint(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20); 3555b8e80941Smrg 3556b8e80941Smrg dw[2] = 3557b8e80941Smrg __gen_uint(values->TriangleFanProvokingVertexSelect, 0, 1) | 3558b8e80941Smrg __gen_uint(values->LineStripListProvokingVertexSelect, 2, 3) | 3559b8e80941Smrg __gen_uint(values->TriangleStripListProvokingVertexSelect, 4, 5) | 3560b8e80941Smrg __gen_uint(values->NonPerspectiveBarycentricEnable, 8, 8) | 3561b8e80941Smrg __gen_uint(values->PerspectiveDivideDisable, 9, 9) | 3562b8e80941Smrg __gen_uint(values->ClipMode, 13, 15) | 3563b8e80941Smrg __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 16, 23) | 3564b8e80941Smrg __gen_uint(values->GuardbandClipTestEnable, 26, 26) | 3565b8e80941Smrg __gen_uint(values->ViewportXYClipTestEnable, 28, 28) | 3566b8e80941Smrg __gen_uint(values->APIMode, 30, 30) | 3567b8e80941Smrg __gen_uint(values->ClipEnable, 31, 31); 3568b8e80941Smrg 3569b8e80941Smrg dw[3] = 3570b8e80941Smrg __gen_uint(values->MaximumVPIndex, 0, 3) | 3571b8e80941Smrg __gen_uint(values->ForceZeroRTAIndexEnable, 5, 5) | 3572b8e80941Smrg __gen_ufixed(values->MaximumPointWidth, 6, 16, 3) | 3573b8e80941Smrg __gen_ufixed(values->MinimumPointWidth, 17, 27, 3); 3574b8e80941Smrg} 3575b8e80941Smrg 3576b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_DS_length 11 3577b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_DS_length_bias 2 3578b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_DS_header \ 3579b8e80941Smrg .DWordLength = 9, \ 3580b8e80941Smrg ._3DCommandSubOpcode = 26, \ 3581b8e80941Smrg ._3DCommandOpcode = 0, \ 3582b8e80941Smrg .CommandSubType = 3, \ 3583b8e80941Smrg .CommandType = 3 3584b8e80941Smrg 3585b8e80941Smrgstruct GEN10_3DSTATE_CONSTANT_DS { 3586b8e80941Smrg uint32_t DWordLength; 3587b8e80941Smrg uint32_t MOCS; 3588b8e80941Smrg uint32_t _3DCommandSubOpcode; 3589b8e80941Smrg uint32_t _3DCommandOpcode; 3590b8e80941Smrg uint32_t CommandSubType; 3591b8e80941Smrg uint32_t CommandType; 3592b8e80941Smrg struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3593b8e80941Smrg}; 3594b8e80941Smrg 3595b8e80941Smrgstatic inline void 3596b8e80941SmrgGEN10_3DSTATE_CONSTANT_DS_pack(__attribute__((unused)) __gen_user_data *data, 3597b8e80941Smrg __attribute__((unused)) void * restrict dst, 3598b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_DS * restrict values) 3599b8e80941Smrg{ 3600b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3601b8e80941Smrg 3602b8e80941Smrg dw[0] = 3603b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3604b8e80941Smrg __gen_uint(values->MOCS, 8, 14) | 3605b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3606b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3607b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3608b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3609b8e80941Smrg 3610b8e80941Smrg GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3611b8e80941Smrg} 3612b8e80941Smrg 3613b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_GS_length 11 3614b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_GS_length_bias 2 3615b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_GS_header \ 3616b8e80941Smrg .DWordLength = 9, \ 3617b8e80941Smrg ._3DCommandSubOpcode = 22, \ 3618b8e80941Smrg ._3DCommandOpcode = 0, \ 3619b8e80941Smrg .CommandSubType = 3, \ 3620b8e80941Smrg .CommandType = 3 3621b8e80941Smrg 3622b8e80941Smrgstruct GEN10_3DSTATE_CONSTANT_GS { 3623b8e80941Smrg uint32_t DWordLength; 3624b8e80941Smrg uint32_t MOCS; 3625b8e80941Smrg uint32_t _3DCommandSubOpcode; 3626b8e80941Smrg uint32_t _3DCommandOpcode; 3627b8e80941Smrg uint32_t CommandSubType; 3628b8e80941Smrg uint32_t CommandType; 3629b8e80941Smrg struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3630b8e80941Smrg}; 3631b8e80941Smrg 3632b8e80941Smrgstatic inline void 3633b8e80941SmrgGEN10_3DSTATE_CONSTANT_GS_pack(__attribute__((unused)) __gen_user_data *data, 3634b8e80941Smrg __attribute__((unused)) void * restrict dst, 3635b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_GS * restrict values) 3636b8e80941Smrg{ 3637b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3638b8e80941Smrg 3639b8e80941Smrg dw[0] = 3640b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3641b8e80941Smrg __gen_uint(values->MOCS, 8, 14) | 3642b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3643b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3644b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3645b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3646b8e80941Smrg 3647b8e80941Smrg GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3648b8e80941Smrg} 3649b8e80941Smrg 3650b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_HS_length 11 3651b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_HS_length_bias 2 3652b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_HS_header \ 3653b8e80941Smrg .DWordLength = 9, \ 3654b8e80941Smrg ._3DCommandSubOpcode = 25, \ 3655b8e80941Smrg ._3DCommandOpcode = 0, \ 3656b8e80941Smrg .CommandSubType = 3, \ 3657b8e80941Smrg .CommandType = 3 3658b8e80941Smrg 3659b8e80941Smrgstruct GEN10_3DSTATE_CONSTANT_HS { 3660b8e80941Smrg uint32_t DWordLength; 3661b8e80941Smrg uint32_t MOCS; 3662b8e80941Smrg uint32_t _3DCommandSubOpcode; 3663b8e80941Smrg uint32_t _3DCommandOpcode; 3664b8e80941Smrg uint32_t CommandSubType; 3665b8e80941Smrg uint32_t CommandType; 3666b8e80941Smrg struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3667b8e80941Smrg}; 3668b8e80941Smrg 3669b8e80941Smrgstatic inline void 3670b8e80941SmrgGEN10_3DSTATE_CONSTANT_HS_pack(__attribute__((unused)) __gen_user_data *data, 3671b8e80941Smrg __attribute__((unused)) void * restrict dst, 3672b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_HS * restrict values) 3673b8e80941Smrg{ 3674b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3675b8e80941Smrg 3676b8e80941Smrg dw[0] = 3677b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3678b8e80941Smrg __gen_uint(values->MOCS, 8, 14) | 3679b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3680b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3681b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3682b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3683b8e80941Smrg 3684b8e80941Smrg GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3685b8e80941Smrg} 3686b8e80941Smrg 3687b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_PS_length 11 3688b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_PS_length_bias 2 3689b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_PS_header \ 3690b8e80941Smrg .DWordLength = 9, \ 3691b8e80941Smrg ._3DCommandSubOpcode = 23, \ 3692b8e80941Smrg ._3DCommandOpcode = 0, \ 3693b8e80941Smrg .CommandSubType = 3, \ 3694b8e80941Smrg .CommandType = 3 3695b8e80941Smrg 3696b8e80941Smrgstruct GEN10_3DSTATE_CONSTANT_PS { 3697b8e80941Smrg uint32_t DWordLength; 3698b8e80941Smrg uint32_t MOCS; 3699b8e80941Smrg uint32_t DisableGatheratSetShaderHint; 3700b8e80941Smrg uint32_t _3DCommandSubOpcode; 3701b8e80941Smrg uint32_t _3DCommandOpcode; 3702b8e80941Smrg uint32_t CommandSubType; 3703b8e80941Smrg uint32_t CommandType; 3704b8e80941Smrg struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3705b8e80941Smrg}; 3706b8e80941Smrg 3707b8e80941Smrgstatic inline void 3708b8e80941SmrgGEN10_3DSTATE_CONSTANT_PS_pack(__attribute__((unused)) __gen_user_data *data, 3709b8e80941Smrg __attribute__((unused)) void * restrict dst, 3710b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_PS * restrict values) 3711b8e80941Smrg{ 3712b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3713b8e80941Smrg 3714b8e80941Smrg dw[0] = 3715b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3716b8e80941Smrg __gen_uint(values->MOCS, 8, 14) | 3717b8e80941Smrg __gen_uint(values->DisableGatheratSetShaderHint, 15, 15) | 3718b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3719b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3720b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3721b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3722b8e80941Smrg 3723b8e80941Smrg GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3724b8e80941Smrg} 3725b8e80941Smrg 3726b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_VS_length 11 3727b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_VS_length_bias 2 3728b8e80941Smrg#define GEN10_3DSTATE_CONSTANT_VS_header \ 3729b8e80941Smrg .DWordLength = 9, \ 3730b8e80941Smrg ._3DCommandSubOpcode = 21, \ 3731b8e80941Smrg ._3DCommandOpcode = 0, \ 3732b8e80941Smrg .CommandSubType = 3, \ 3733b8e80941Smrg .CommandType = 3 3734b8e80941Smrg 3735b8e80941Smrgstruct GEN10_3DSTATE_CONSTANT_VS { 3736b8e80941Smrg uint32_t DWordLength; 3737b8e80941Smrg uint32_t MOCS; 3738b8e80941Smrg uint32_t _3DCommandSubOpcode; 3739b8e80941Smrg uint32_t _3DCommandOpcode; 3740b8e80941Smrg uint32_t CommandSubType; 3741b8e80941Smrg uint32_t CommandType; 3742b8e80941Smrg struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3743b8e80941Smrg}; 3744b8e80941Smrg 3745b8e80941Smrgstatic inline void 3746b8e80941SmrgGEN10_3DSTATE_CONSTANT_VS_pack(__attribute__((unused)) __gen_user_data *data, 3747b8e80941Smrg __attribute__((unused)) void * restrict dst, 3748b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_VS * restrict values) 3749b8e80941Smrg{ 3750b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3751b8e80941Smrg 3752b8e80941Smrg dw[0] = 3753b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3754b8e80941Smrg __gen_uint(values->MOCS, 8, 14) | 3755b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3756b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3757b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3758b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3759b8e80941Smrg 3760b8e80941Smrg GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3761b8e80941Smrg} 3762b8e80941Smrg 3763b8e80941Smrg#define GEN10_3DSTATE_DEPTH_BUFFER_length 8 3764b8e80941Smrg#define GEN10_3DSTATE_DEPTH_BUFFER_length_bias 2 3765b8e80941Smrg#define GEN10_3DSTATE_DEPTH_BUFFER_header \ 3766b8e80941Smrg .DWordLength = 6, \ 3767b8e80941Smrg ._3DCommandSubOpcode = 5, \ 3768b8e80941Smrg ._3DCommandOpcode = 0, \ 3769b8e80941Smrg .CommandSubType = 3, \ 3770b8e80941Smrg .CommandType = 3 3771b8e80941Smrg 3772b8e80941Smrgstruct GEN10_3DSTATE_DEPTH_BUFFER { 3773b8e80941Smrg uint32_t DWordLength; 3774b8e80941Smrg uint32_t _3DCommandSubOpcode; 3775b8e80941Smrg uint32_t _3DCommandOpcode; 3776b8e80941Smrg uint32_t CommandSubType; 3777b8e80941Smrg uint32_t CommandType; 3778b8e80941Smrg uint32_t SurfacePitch; 3779b8e80941Smrg uint32_t SurfaceFormat; 3780b8e80941Smrg#define D32_FLOAT 1 3781b8e80941Smrg#define D24_UNORM_X8_UINT 3 3782b8e80941Smrg#define D16_UNORM 5 3783b8e80941Smrg bool HierarchicalDepthBufferEnable; 3784b8e80941Smrg bool StencilWriteEnable; 3785b8e80941Smrg bool DepthWriteEnable; 3786b8e80941Smrg uint32_t SurfaceType; 3787b8e80941Smrg#define SURFTYPE_2D 1 3788b8e80941Smrg#define SURFTYPE_CUBE 3 3789b8e80941Smrg#define SURFTYPE_NULL 7 3790b8e80941Smrg __gen_address_type SurfaceBaseAddress; 3791b8e80941Smrg uint32_t LOD; 3792b8e80941Smrg uint32_t Width; 3793b8e80941Smrg uint32_t Height; 3794b8e80941Smrg uint32_t MOCS; 3795b8e80941Smrg uint32_t MinimumArrayElement; 3796b8e80941Smrg uint32_t Depth; 3797b8e80941Smrg uint32_t MipTailStartLOD; 3798b8e80941Smrg uint32_t TiledResourceMode; 3799b8e80941Smrg#define NONE 0 3800b8e80941Smrg#define TILEYF 1 3801b8e80941Smrg#define TILEYS 2 3802b8e80941Smrg uint32_t SurfaceQPitch; 3803b8e80941Smrg uint32_t RenderTargetViewExtent; 3804b8e80941Smrg}; 3805b8e80941Smrg 3806b8e80941Smrgstatic inline void 3807b8e80941SmrgGEN10_3DSTATE_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 3808b8e80941Smrg __attribute__((unused)) void * restrict dst, 3809b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_DEPTH_BUFFER * restrict values) 3810b8e80941Smrg{ 3811b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3812b8e80941Smrg 3813b8e80941Smrg dw[0] = 3814b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3815b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3816b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3817b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3818b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3819b8e80941Smrg 3820b8e80941Smrg dw[1] = 3821b8e80941Smrg __gen_uint(values->SurfacePitch, 0, 17) | 3822b8e80941Smrg __gen_uint(values->SurfaceFormat, 18, 20) | 3823b8e80941Smrg __gen_uint(values->HierarchicalDepthBufferEnable, 22, 22) | 3824b8e80941Smrg __gen_uint(values->StencilWriteEnable, 27, 27) | 3825b8e80941Smrg __gen_uint(values->DepthWriteEnable, 28, 28) | 3826b8e80941Smrg __gen_uint(values->SurfaceType, 29, 31); 3827b8e80941Smrg 3828b8e80941Smrg const uint64_t v2_address = 3829b8e80941Smrg __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 3830b8e80941Smrg dw[2] = v2_address; 3831b8e80941Smrg dw[3] = v2_address >> 32; 3832b8e80941Smrg 3833b8e80941Smrg dw[4] = 3834b8e80941Smrg __gen_uint(values->LOD, 0, 3) | 3835b8e80941Smrg __gen_uint(values->Width, 4, 17) | 3836b8e80941Smrg __gen_uint(values->Height, 18, 31); 3837b8e80941Smrg 3838b8e80941Smrg dw[5] = 3839b8e80941Smrg __gen_uint(values->MOCS, 0, 6) | 3840b8e80941Smrg __gen_uint(values->MinimumArrayElement, 10, 20) | 3841b8e80941Smrg __gen_uint(values->Depth, 21, 31); 3842b8e80941Smrg 3843b8e80941Smrg dw[6] = 3844b8e80941Smrg __gen_uint(values->MipTailStartLOD, 26, 29) | 3845b8e80941Smrg __gen_uint(values->TiledResourceMode, 30, 31); 3846b8e80941Smrg 3847b8e80941Smrg dw[7] = 3848b8e80941Smrg __gen_uint(values->SurfaceQPitch, 0, 14) | 3849b8e80941Smrg __gen_uint(values->RenderTargetViewExtent, 21, 31); 3850b8e80941Smrg} 3851b8e80941Smrg 3852b8e80941Smrg#define GEN10_3DSTATE_DRAWING_RECTANGLE_length 4 3853b8e80941Smrg#define GEN10_3DSTATE_DRAWING_RECTANGLE_length_bias 2 3854b8e80941Smrg#define GEN10_3DSTATE_DRAWING_RECTANGLE_header \ 3855b8e80941Smrg .DWordLength = 2, \ 3856b8e80941Smrg ._3DCommandSubOpcode = 0, \ 3857b8e80941Smrg ._3DCommandOpcode = 1, \ 3858b8e80941Smrg .CommandSubType = 3, \ 3859b8e80941Smrg .CommandType = 3 3860b8e80941Smrg 3861b8e80941Smrgstruct GEN10_3DSTATE_DRAWING_RECTANGLE { 3862b8e80941Smrg uint32_t DWordLength; 3863b8e80941Smrg uint32_t CoreModeSelect; 3864b8e80941Smrg#define Legacy 0 3865b8e80941Smrg#define Core0Enabled 1 3866b8e80941Smrg#define Core1Enabled 2 3867b8e80941Smrg uint32_t _3DCommandSubOpcode; 3868b8e80941Smrg uint32_t _3DCommandOpcode; 3869b8e80941Smrg uint32_t CommandSubType; 3870b8e80941Smrg uint32_t CommandType; 3871b8e80941Smrg uint32_t ClippedDrawingRectangleXMin; 3872b8e80941Smrg uint32_t ClippedDrawingRectangleYMin; 3873b8e80941Smrg uint32_t ClippedDrawingRectangleXMax; 3874b8e80941Smrg uint32_t ClippedDrawingRectangleYMax; 3875b8e80941Smrg int32_t DrawingRectangleOriginX; 3876b8e80941Smrg int32_t DrawingRectangleOriginY; 3877b8e80941Smrg}; 3878b8e80941Smrg 3879b8e80941Smrgstatic inline void 3880b8e80941SmrgGEN10_3DSTATE_DRAWING_RECTANGLE_pack(__attribute__((unused)) __gen_user_data *data, 3881b8e80941Smrg __attribute__((unused)) void * restrict dst, 3882b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_DRAWING_RECTANGLE * restrict values) 3883b8e80941Smrg{ 3884b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3885b8e80941Smrg 3886b8e80941Smrg dw[0] = 3887b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3888b8e80941Smrg __gen_uint(values->CoreModeSelect, 14, 15) | 3889b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3890b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3891b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3892b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3893b8e80941Smrg 3894b8e80941Smrg dw[1] = 3895b8e80941Smrg __gen_uint(values->ClippedDrawingRectangleXMin, 0, 15) | 3896b8e80941Smrg __gen_uint(values->ClippedDrawingRectangleYMin, 16, 31); 3897b8e80941Smrg 3898b8e80941Smrg dw[2] = 3899b8e80941Smrg __gen_uint(values->ClippedDrawingRectangleXMax, 0, 15) | 3900b8e80941Smrg __gen_uint(values->ClippedDrawingRectangleYMax, 16, 31); 3901b8e80941Smrg 3902b8e80941Smrg dw[3] = 3903b8e80941Smrg __gen_sint(values->DrawingRectangleOriginX, 0, 15) | 3904b8e80941Smrg __gen_sint(values->DrawingRectangleOriginY, 16, 31); 3905b8e80941Smrg} 3906b8e80941Smrg 3907b8e80941Smrg#define GEN10_3DSTATE_DS_length 11 3908b8e80941Smrg#define GEN10_3DSTATE_DS_length_bias 2 3909b8e80941Smrg#define GEN10_3DSTATE_DS_header \ 3910b8e80941Smrg .DWordLength = 9, \ 3911b8e80941Smrg ._3DCommandSubOpcode = 29, \ 3912b8e80941Smrg ._3DCommandOpcode = 0, \ 3913b8e80941Smrg .CommandSubType = 3, \ 3914b8e80941Smrg .CommandType = 3 3915b8e80941Smrg 3916b8e80941Smrgstruct GEN10_3DSTATE_DS { 3917b8e80941Smrg uint32_t DWordLength; 3918b8e80941Smrg uint32_t _3DCommandSubOpcode; 3919b8e80941Smrg uint32_t _3DCommandOpcode; 3920b8e80941Smrg uint32_t CommandSubType; 3921b8e80941Smrg uint32_t CommandType; 3922b8e80941Smrg uint64_t KernelStartPointer; 3923b8e80941Smrg bool SoftwareExceptionEnable; 3924b8e80941Smrg bool IllegalOpcodeExceptionEnable; 3925b8e80941Smrg bool AccessesUAV; 3926b8e80941Smrg uint32_t FloatingPointMode; 3927b8e80941Smrg#define IEEE754 0 3928b8e80941Smrg#define Alternate 1 3929b8e80941Smrg uint32_t ThreadDispatchPriority; 3930b8e80941Smrg#define High 1 3931b8e80941Smrg uint32_t BindingTableEntryCount; 3932b8e80941Smrg uint32_t SamplerCount; 3933b8e80941Smrg#define NoSamplers 0 3934b8e80941Smrg#define _14Samplers 1 3935b8e80941Smrg#define _58Samplers 2 3936b8e80941Smrg#define _912Samplers 3 3937b8e80941Smrg#define _1316Samplers 4 3938b8e80941Smrg bool VectorMaskEnable; 3939b8e80941Smrg uint32_t PerThreadScratchSpace; 3940b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 3941b8e80941Smrg uint32_t PatchURBEntryReadOffset; 3942b8e80941Smrg uint32_t PatchURBEntryReadLength; 3943b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData; 3944b8e80941Smrg bool Enable; 3945b8e80941Smrg bool CacheDisable; 3946b8e80941Smrg bool ComputeWCoordinateEnable; 3947b8e80941Smrg uint32_t DispatchMode; 3948b8e80941Smrg#define DISPATCH_MODE_SIMD4X2 0 3949b8e80941Smrg#define DISPATCH_MODE_SIMD8_SINGLE_PATCH 1 3950b8e80941Smrg#define DISPATCH_MODE_SIMD8_SINGLE_OR_DUAL_PATCH 2 3951b8e80941Smrg bool StatisticsEnable; 3952b8e80941Smrg uint32_t MaximumNumberofThreads; 3953b8e80941Smrg uint32_t UserClipDistanceCullTestEnableBitmask; 3954b8e80941Smrg uint32_t UserClipDistanceClipTestEnableBitmask; 3955b8e80941Smrg uint32_t VertexURBEntryOutputLength; 3956b8e80941Smrg uint32_t VertexURBEntryOutputReadOffset; 3957b8e80941Smrg uint64_t DUAL_PATCHKernelStartPointer; 3958b8e80941Smrg}; 3959b8e80941Smrg 3960b8e80941Smrgstatic inline void 3961b8e80941SmrgGEN10_3DSTATE_DS_pack(__attribute__((unused)) __gen_user_data *data, 3962b8e80941Smrg __attribute__((unused)) void * restrict dst, 3963b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_DS * restrict values) 3964b8e80941Smrg{ 3965b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 3966b8e80941Smrg 3967b8e80941Smrg dw[0] = 3968b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 3969b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3970b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 3971b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 3972b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 3973b8e80941Smrg 3974b8e80941Smrg const uint64_t v1 = 3975b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 63); 3976b8e80941Smrg dw[1] = v1; 3977b8e80941Smrg dw[2] = v1 >> 32; 3978b8e80941Smrg 3979b8e80941Smrg dw[3] = 3980b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 3981b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 3982b8e80941Smrg __gen_uint(values->AccessesUAV, 14, 14) | 3983b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 3984b8e80941Smrg __gen_uint(values->ThreadDispatchPriority, 17, 17) | 3985b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 3986b8e80941Smrg __gen_uint(values->SamplerCount, 27, 29) | 3987b8e80941Smrg __gen_uint(values->VectorMaskEnable, 30, 30); 3988b8e80941Smrg 3989b8e80941Smrg const uint64_t v4 = 3990b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 3991b8e80941Smrg const uint64_t v4_address = 3992b8e80941Smrg __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 3993b8e80941Smrg dw[4] = v4_address; 3994b8e80941Smrg dw[5] = (v4_address >> 32) | (v4 >> 32); 3995b8e80941Smrg 3996b8e80941Smrg dw[6] = 3997b8e80941Smrg __gen_uint(values->PatchURBEntryReadOffset, 4, 9) | 3998b8e80941Smrg __gen_uint(values->PatchURBEntryReadLength, 11, 17) | 3999b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24); 4000b8e80941Smrg 4001b8e80941Smrg dw[7] = 4002b8e80941Smrg __gen_uint(values->Enable, 0, 0) | 4003b8e80941Smrg __gen_uint(values->CacheDisable, 1, 1) | 4004b8e80941Smrg __gen_uint(values->ComputeWCoordinateEnable, 2, 2) | 4005b8e80941Smrg __gen_uint(values->DispatchMode, 3, 4) | 4006b8e80941Smrg __gen_uint(values->StatisticsEnable, 10, 10) | 4007b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 21, 30); 4008b8e80941Smrg 4009b8e80941Smrg dw[8] = 4010b8e80941Smrg __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 4011b8e80941Smrg __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 4012b8e80941Smrg __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 4013b8e80941Smrg __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 4014b8e80941Smrg 4015b8e80941Smrg const uint64_t v9 = 4016b8e80941Smrg __gen_offset(values->DUAL_PATCHKernelStartPointer, 6, 63); 4017b8e80941Smrg dw[9] = v9; 4018b8e80941Smrg dw[10] = v9 >> 32; 4019b8e80941Smrg} 4020b8e80941Smrg 4021b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_DS_length_bias 2 4022b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_DS_header \ 4023b8e80941Smrg .DWordLength = 1, \ 4024b8e80941Smrg ._3DCommandSubOpcode = 55, \ 4025b8e80941Smrg ._3DCommandOpcode = 0, \ 4026b8e80941Smrg .CommandSubType = 3, \ 4027b8e80941Smrg .CommandType = 3 4028b8e80941Smrg 4029b8e80941Smrgstruct GEN10_3DSTATE_GATHER_CONSTANT_DS { 4030b8e80941Smrg uint32_t DWordLength; 4031b8e80941Smrg uint32_t _3DCommandSubOpcode; 4032b8e80941Smrg uint32_t _3DCommandOpcode; 4033b8e80941Smrg uint32_t CommandSubType; 4034b8e80941Smrg uint32_t CommandType; 4035b8e80941Smrg uint32_t UpdateGatherTableOnly; 4036b8e80941Smrg#define CommitGather 0 4037b8e80941Smrg#define NonCommitGather 1 4038b8e80941Smrg uint32_t ConstantBufferBindingTableBlock; 4039b8e80941Smrg uint32_t ConstantBufferValid; 4040b8e80941Smrg uint32_t OnDieTable; 4041b8e80941Smrg#define Load 0 4042b8e80941Smrg#define Read 1 4043b8e80941Smrg bool ConstantBufferDx9GenerateStall; 4044b8e80941Smrg uint64_t GatherBufferOffset; 4045b8e80941Smrg /* variable length fields follow */ 4046b8e80941Smrg}; 4047b8e80941Smrg 4048b8e80941Smrgstatic inline void 4049b8e80941SmrgGEN10_3DSTATE_GATHER_CONSTANT_DS_pack(__attribute__((unused)) __gen_user_data *data, 4050b8e80941Smrg __attribute__((unused)) void * restrict dst, 4051b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_DS * restrict values) 4052b8e80941Smrg{ 4053b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4054b8e80941Smrg 4055b8e80941Smrg dw[0] = 4056b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4057b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4058b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4059b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4060b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4061b8e80941Smrg 4062b8e80941Smrg dw[1] = 4063b8e80941Smrg __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4064b8e80941Smrg __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4065b8e80941Smrg __gen_uint(values->ConstantBufferValid, 16, 31); 4066b8e80941Smrg 4067b8e80941Smrg dw[2] = 4068b8e80941Smrg __gen_uint(values->OnDieTable, 3, 3) | 4069b8e80941Smrg __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4070b8e80941Smrg __gen_offset(values->GatherBufferOffset, 6, 22); 4071b8e80941Smrg} 4072b8e80941Smrg 4073b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_GS_length_bias 2 4074b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_GS_header \ 4075b8e80941Smrg .DWordLength = 1, \ 4076b8e80941Smrg ._3DCommandSubOpcode = 53, \ 4077b8e80941Smrg ._3DCommandOpcode = 0, \ 4078b8e80941Smrg .CommandSubType = 3, \ 4079b8e80941Smrg .CommandType = 3 4080b8e80941Smrg 4081b8e80941Smrgstruct GEN10_3DSTATE_GATHER_CONSTANT_GS { 4082b8e80941Smrg uint32_t DWordLength; 4083b8e80941Smrg uint32_t _3DCommandSubOpcode; 4084b8e80941Smrg uint32_t _3DCommandOpcode; 4085b8e80941Smrg uint32_t CommandSubType; 4086b8e80941Smrg uint32_t CommandType; 4087b8e80941Smrg uint32_t UpdateGatherTableOnly; 4088b8e80941Smrg#define CommitGather 0 4089b8e80941Smrg#define NonCommitGather 1 4090b8e80941Smrg uint32_t ConstantBufferBindingTableBlock; 4091b8e80941Smrg uint32_t ConstantBufferValid; 4092b8e80941Smrg uint32_t OnDieTable; 4093b8e80941Smrg#define Load 0 4094b8e80941Smrg#define Read 1 4095b8e80941Smrg bool ConstantBufferDx9GenerateStall; 4096b8e80941Smrg uint64_t GatherBufferOffset; 4097b8e80941Smrg /* variable length fields follow */ 4098b8e80941Smrg}; 4099b8e80941Smrg 4100b8e80941Smrgstatic inline void 4101b8e80941SmrgGEN10_3DSTATE_GATHER_CONSTANT_GS_pack(__attribute__((unused)) __gen_user_data *data, 4102b8e80941Smrg __attribute__((unused)) void * restrict dst, 4103b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_GS * restrict values) 4104b8e80941Smrg{ 4105b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4106b8e80941Smrg 4107b8e80941Smrg dw[0] = 4108b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4109b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4110b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4111b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4112b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4113b8e80941Smrg 4114b8e80941Smrg dw[1] = 4115b8e80941Smrg __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4116b8e80941Smrg __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4117b8e80941Smrg __gen_uint(values->ConstantBufferValid, 16, 31); 4118b8e80941Smrg 4119b8e80941Smrg dw[2] = 4120b8e80941Smrg __gen_uint(values->OnDieTable, 3, 3) | 4121b8e80941Smrg __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4122b8e80941Smrg __gen_offset(values->GatherBufferOffset, 6, 22); 4123b8e80941Smrg} 4124b8e80941Smrg 4125b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_HS_length_bias 2 4126b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_HS_header \ 4127b8e80941Smrg .DWordLength = 1, \ 4128b8e80941Smrg ._3DCommandSubOpcode = 54, \ 4129b8e80941Smrg ._3DCommandOpcode = 0, \ 4130b8e80941Smrg .CommandSubType = 3, \ 4131b8e80941Smrg .CommandType = 3 4132b8e80941Smrg 4133b8e80941Smrgstruct GEN10_3DSTATE_GATHER_CONSTANT_HS { 4134b8e80941Smrg uint32_t DWordLength; 4135b8e80941Smrg uint32_t _3DCommandSubOpcode; 4136b8e80941Smrg uint32_t _3DCommandOpcode; 4137b8e80941Smrg uint32_t CommandSubType; 4138b8e80941Smrg uint32_t CommandType; 4139b8e80941Smrg uint32_t UpdateGatherTableOnly; 4140b8e80941Smrg#define CommitGather 0 4141b8e80941Smrg#define NonCommitGather 1 4142b8e80941Smrg uint32_t ConstantBufferBindingTableBlock; 4143b8e80941Smrg uint32_t ConstantBufferValid; 4144b8e80941Smrg uint32_t OnDieTable; 4145b8e80941Smrg#define Load 0 4146b8e80941Smrg#define Read 1 4147b8e80941Smrg bool ConstantBufferDx9GenerateStall; 4148b8e80941Smrg uint64_t GatherBufferOffset; 4149b8e80941Smrg /* variable length fields follow */ 4150b8e80941Smrg}; 4151b8e80941Smrg 4152b8e80941Smrgstatic inline void 4153b8e80941SmrgGEN10_3DSTATE_GATHER_CONSTANT_HS_pack(__attribute__((unused)) __gen_user_data *data, 4154b8e80941Smrg __attribute__((unused)) void * restrict dst, 4155b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_HS * restrict values) 4156b8e80941Smrg{ 4157b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4158b8e80941Smrg 4159b8e80941Smrg dw[0] = 4160b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4161b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4162b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4163b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4164b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4165b8e80941Smrg 4166b8e80941Smrg dw[1] = 4167b8e80941Smrg __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4168b8e80941Smrg __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4169b8e80941Smrg __gen_uint(values->ConstantBufferValid, 16, 31); 4170b8e80941Smrg 4171b8e80941Smrg dw[2] = 4172b8e80941Smrg __gen_uint(values->OnDieTable, 3, 3) | 4173b8e80941Smrg __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4174b8e80941Smrg __gen_offset(values->GatherBufferOffset, 6, 22); 4175b8e80941Smrg} 4176b8e80941Smrg 4177b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_PS_length_bias 2 4178b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_PS_header \ 4179b8e80941Smrg .DWordLength = 1, \ 4180b8e80941Smrg ._3DCommandSubOpcode = 56, \ 4181b8e80941Smrg ._3DCommandOpcode = 0, \ 4182b8e80941Smrg .CommandSubType = 3, \ 4183b8e80941Smrg .CommandType = 3 4184b8e80941Smrg 4185b8e80941Smrgstruct GEN10_3DSTATE_GATHER_CONSTANT_PS { 4186b8e80941Smrg uint32_t DWordLength; 4187b8e80941Smrg uint32_t _3DCommandSubOpcode; 4188b8e80941Smrg uint32_t _3DCommandOpcode; 4189b8e80941Smrg uint32_t CommandSubType; 4190b8e80941Smrg uint32_t CommandType; 4191b8e80941Smrg bool DX9OnDieRegisterReadEnable; 4192b8e80941Smrg uint32_t UpdateGatherTableOnly; 4193b8e80941Smrg#define CommitGather 0 4194b8e80941Smrg#define NonCommitGather 1 4195b8e80941Smrg uint32_t ConstantBufferBindingTableBlock; 4196b8e80941Smrg uint32_t ConstantBufferValid; 4197b8e80941Smrg uint32_t OnDieTable; 4198b8e80941Smrg#define Load 0 4199b8e80941Smrg#define Read 1 4200b8e80941Smrg bool ConstantBufferDx9Enable; 4201b8e80941Smrg bool ConstantBufferDx9GenerateStall; 4202b8e80941Smrg uint64_t GatherBufferOffset; 4203b8e80941Smrg /* variable length fields follow */ 4204b8e80941Smrg}; 4205b8e80941Smrg 4206b8e80941Smrgstatic inline void 4207b8e80941SmrgGEN10_3DSTATE_GATHER_CONSTANT_PS_pack(__attribute__((unused)) __gen_user_data *data, 4208b8e80941Smrg __attribute__((unused)) void * restrict dst, 4209b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_PS * restrict values) 4210b8e80941Smrg{ 4211b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4212b8e80941Smrg 4213b8e80941Smrg dw[0] = 4214b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4215b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4216b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4217b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4218b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4219b8e80941Smrg 4220b8e80941Smrg dw[1] = 4221b8e80941Smrg __gen_uint(values->DX9OnDieRegisterReadEnable, 0, 0) | 4222b8e80941Smrg __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4223b8e80941Smrg __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4224b8e80941Smrg __gen_uint(values->ConstantBufferValid, 16, 31); 4225b8e80941Smrg 4226b8e80941Smrg dw[2] = 4227b8e80941Smrg __gen_uint(values->OnDieTable, 3, 3) | 4228b8e80941Smrg __gen_uint(values->ConstantBufferDx9Enable, 4, 4) | 4229b8e80941Smrg __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4230b8e80941Smrg __gen_offset(values->GatherBufferOffset, 6, 22); 4231b8e80941Smrg} 4232b8e80941Smrg 4233b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_VS_length_bias 2 4234b8e80941Smrg#define GEN10_3DSTATE_GATHER_CONSTANT_VS_header \ 4235b8e80941Smrg .DWordLength = 0, \ 4236b8e80941Smrg ._3DCommandSubOpcode = 52, \ 4237b8e80941Smrg ._3DCommandOpcode = 0, \ 4238b8e80941Smrg .CommandSubType = 3, \ 4239b8e80941Smrg .CommandType = 3 4240b8e80941Smrg 4241b8e80941Smrgstruct GEN10_3DSTATE_GATHER_CONSTANT_VS { 4242b8e80941Smrg uint32_t DWordLength; 4243b8e80941Smrg uint32_t _3DCommandSubOpcode; 4244b8e80941Smrg uint32_t _3DCommandOpcode; 4245b8e80941Smrg uint32_t CommandSubType; 4246b8e80941Smrg uint32_t CommandType; 4247b8e80941Smrg bool DX9OnDieRegisterReadEnable; 4248b8e80941Smrg uint32_t UpdateGatherTableOnly; 4249b8e80941Smrg#define CommitGather 0 4250b8e80941Smrg#define NonCommitGather 1 4251b8e80941Smrg uint32_t ConstantBufferBindingTableBlock; 4252b8e80941Smrg uint32_t ConstantBufferValid; 4253b8e80941Smrg uint32_t OnDieTable; 4254b8e80941Smrg#define Load 0 4255b8e80941Smrg#define Read 1 4256b8e80941Smrg bool ConstantBufferDx9Enable; 4257b8e80941Smrg bool ConstantBufferDx9GenerateStall; 4258b8e80941Smrg uint64_t GatherBufferOffset; 4259b8e80941Smrg /* variable length fields follow */ 4260b8e80941Smrg}; 4261b8e80941Smrg 4262b8e80941Smrgstatic inline void 4263b8e80941SmrgGEN10_3DSTATE_GATHER_CONSTANT_VS_pack(__attribute__((unused)) __gen_user_data *data, 4264b8e80941Smrg __attribute__((unused)) void * restrict dst, 4265b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_VS * restrict values) 4266b8e80941Smrg{ 4267b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4268b8e80941Smrg 4269b8e80941Smrg dw[0] = 4270b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4271b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4272b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4273b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4274b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4275b8e80941Smrg 4276b8e80941Smrg dw[1] = 4277b8e80941Smrg __gen_uint(values->DX9OnDieRegisterReadEnable, 0, 0) | 4278b8e80941Smrg __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4279b8e80941Smrg __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4280b8e80941Smrg __gen_uint(values->ConstantBufferValid, 16, 31); 4281b8e80941Smrg 4282b8e80941Smrg dw[2] = 4283b8e80941Smrg __gen_uint(values->OnDieTable, 3, 3) | 4284b8e80941Smrg __gen_uint(values->ConstantBufferDx9Enable, 4, 4) | 4285b8e80941Smrg __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4286b8e80941Smrg __gen_offset(values->GatherBufferOffset, 6, 22); 4287b8e80941Smrg} 4288b8e80941Smrg 4289b8e80941Smrg#define GEN10_3DSTATE_GATHER_POOL_ALLOC_length 4 4290b8e80941Smrg#define GEN10_3DSTATE_GATHER_POOL_ALLOC_length_bias 2 4291b8e80941Smrg#define GEN10_3DSTATE_GATHER_POOL_ALLOC_header \ 4292b8e80941Smrg .DWordLength = 2, \ 4293b8e80941Smrg ._3DCommandSubOpcode = 26, \ 4294b8e80941Smrg ._3DCommandOpcode = 1, \ 4295b8e80941Smrg .CommandSubType = 3, \ 4296b8e80941Smrg .CommandType = 3 4297b8e80941Smrg 4298b8e80941Smrgstruct GEN10_3DSTATE_GATHER_POOL_ALLOC { 4299b8e80941Smrg uint32_t DWordLength; 4300b8e80941Smrg uint32_t _3DCommandSubOpcode; 4301b8e80941Smrg uint32_t _3DCommandOpcode; 4302b8e80941Smrg uint32_t CommandSubType; 4303b8e80941Smrg uint32_t CommandType; 4304b8e80941Smrg uint32_t MOCS; 4305b8e80941Smrg bool GatherPoolEnable; 4306b8e80941Smrg __gen_address_type GatherPoolBaseAddress; 4307b8e80941Smrg uint32_t GatherPoolBufferSize; 4308b8e80941Smrg}; 4309b8e80941Smrg 4310b8e80941Smrgstatic inline void 4311b8e80941SmrgGEN10_3DSTATE_GATHER_POOL_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 4312b8e80941Smrg __attribute__((unused)) void * restrict dst, 4313b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_POOL_ALLOC * restrict values) 4314b8e80941Smrg{ 4315b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4316b8e80941Smrg 4317b8e80941Smrg dw[0] = 4318b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4319b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4320b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4321b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4322b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4323b8e80941Smrg 4324b8e80941Smrg const uint64_t v1 = 4325b8e80941Smrg __gen_uint(values->MOCS, 0, 6) | 4326b8e80941Smrg __gen_uint(values->GatherPoolEnable, 11, 11); 4327b8e80941Smrg const uint64_t v1_address = 4328b8e80941Smrg __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, v1); 4329b8e80941Smrg dw[1] = v1_address; 4330b8e80941Smrg dw[2] = (v1_address >> 32) | (v1 >> 32); 4331b8e80941Smrg 4332b8e80941Smrg dw[3] = 4333b8e80941Smrg __gen_uint(values->GatherPoolBufferSize, 12, 31); 4334b8e80941Smrg} 4335b8e80941Smrg 4336b8e80941Smrg#define GEN10_3DSTATE_GS_length 10 4337b8e80941Smrg#define GEN10_3DSTATE_GS_length_bias 2 4338b8e80941Smrg#define GEN10_3DSTATE_GS_header \ 4339b8e80941Smrg .DWordLength = 8, \ 4340b8e80941Smrg ._3DCommandSubOpcode = 17, \ 4341b8e80941Smrg ._3DCommandOpcode = 0, \ 4342b8e80941Smrg .CommandSubType = 3, \ 4343b8e80941Smrg .CommandType = 3 4344b8e80941Smrg 4345b8e80941Smrgstruct GEN10_3DSTATE_GS { 4346b8e80941Smrg uint32_t DWordLength; 4347b8e80941Smrg uint32_t _3DCommandSubOpcode; 4348b8e80941Smrg uint32_t _3DCommandOpcode; 4349b8e80941Smrg uint32_t CommandSubType; 4350b8e80941Smrg uint32_t CommandType; 4351b8e80941Smrg uint64_t KernelStartPointer; 4352b8e80941Smrg uint32_t ExpectedVertexCount; 4353b8e80941Smrg bool SoftwareExceptionEnable; 4354b8e80941Smrg bool MaskStackExceptionEnable; 4355b8e80941Smrg bool AccessesUAV; 4356b8e80941Smrg bool IllegalOpcodeExceptionEnable; 4357b8e80941Smrg uint32_t FloatingPointMode; 4358b8e80941Smrg#define IEEE754 0 4359b8e80941Smrg#define Alternate 1 4360b8e80941Smrg uint32_t ThreadDispatchPriority; 4361b8e80941Smrg#define High 1 4362b8e80941Smrg uint32_t BindingTableEntryCount; 4363b8e80941Smrg uint32_t SamplerCount; 4364b8e80941Smrg#define NoSamplers 0 4365b8e80941Smrg#define _14Samplers 1 4366b8e80941Smrg#define _58Samplers 2 4367b8e80941Smrg#define _912Samplers 3 4368b8e80941Smrg#define _1316Samplers 4 4369b8e80941Smrg bool VectorMaskEnable; 4370b8e80941Smrg bool SingleProgramFlow; 4371b8e80941Smrg uint32_t PerThreadScratchSpace; 4372b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 4373b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData; 4374b8e80941Smrg uint32_t VertexURBEntryReadOffset; 4375b8e80941Smrg bool IncludeVertexHandles; 4376b8e80941Smrg uint32_t VertexURBEntryReadLength; 4377b8e80941Smrg enum GEN10_3D_Prim_Topo_Type OutputTopology; 4378b8e80941Smrg uint32_t OutputVertexSize; 4379b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData54; 4380b8e80941Smrg bool Enable; 4381b8e80941Smrg bool DiscardAdjacency; 4382b8e80941Smrg uint32_t ReorderMode; 4383b8e80941Smrg#define LEADING 0 4384b8e80941Smrg#define TRAILING 1 4385b8e80941Smrg uint32_t Hint; 4386b8e80941Smrg bool IncludePrimitiveID; 4387b8e80941Smrg uint32_t InvocationsIncrementValue; 4388b8e80941Smrg bool StatisticsEnable; 4389b8e80941Smrg uint32_t DispatchMode; 4390b8e80941Smrg#define DISPATCH_MODE_DualInstance 1 4391b8e80941Smrg#define DISPATCH_MODE_DualObject 2 4392b8e80941Smrg#define DISPATCH_MODE_SIMD8 3 4393b8e80941Smrg uint32_t DefaultStreamId; 4394b8e80941Smrg uint32_t InstanceControl; 4395b8e80941Smrg uint32_t ControlDataHeaderSize; 4396b8e80941Smrg uint32_t MaximumNumberofThreads; 4397b8e80941Smrg uint32_t StaticOutputVertexCount; 4398b8e80941Smrg bool StaticOutput; 4399b8e80941Smrg uint32_t ControlDataFormat; 4400b8e80941Smrg#define CUT 0 4401b8e80941Smrg#define SID 1 4402b8e80941Smrg uint32_t UserClipDistanceCullTestEnableBitmask; 4403b8e80941Smrg uint32_t UserClipDistanceClipTestEnableBitmask; 4404b8e80941Smrg uint32_t VertexURBEntryOutputLength; 4405b8e80941Smrg uint32_t VertexURBEntryOutputReadOffset; 4406b8e80941Smrg}; 4407b8e80941Smrg 4408b8e80941Smrgstatic inline void 4409b8e80941SmrgGEN10_3DSTATE_GS_pack(__attribute__((unused)) __gen_user_data *data, 4410b8e80941Smrg __attribute__((unused)) void * restrict dst, 4411b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_GS * restrict values) 4412b8e80941Smrg{ 4413b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4414b8e80941Smrg 4415b8e80941Smrg dw[0] = 4416b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4417b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4418b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4419b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4420b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4421b8e80941Smrg 4422b8e80941Smrg const uint64_t v1 = 4423b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 63); 4424b8e80941Smrg dw[1] = v1; 4425b8e80941Smrg dw[2] = v1 >> 32; 4426b8e80941Smrg 4427b8e80941Smrg dw[3] = 4428b8e80941Smrg __gen_uint(values->ExpectedVertexCount, 0, 5) | 4429b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 4430b8e80941Smrg __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 4431b8e80941Smrg __gen_uint(values->AccessesUAV, 12, 12) | 4432b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 4433b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 4434b8e80941Smrg __gen_uint(values->ThreadDispatchPriority, 17, 17) | 4435b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 4436b8e80941Smrg __gen_uint(values->SamplerCount, 27, 29) | 4437b8e80941Smrg __gen_uint(values->VectorMaskEnable, 30, 30) | 4438b8e80941Smrg __gen_uint(values->SingleProgramFlow, 31, 31); 4439b8e80941Smrg 4440b8e80941Smrg const uint64_t v4 = 4441b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 4442b8e80941Smrg const uint64_t v4_address = 4443b8e80941Smrg __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 4444b8e80941Smrg dw[4] = v4_address; 4445b8e80941Smrg dw[5] = (v4_address >> 32) | (v4 >> 32); 4446b8e80941Smrg 4447b8e80941Smrg dw[6] = 4448b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3) | 4449b8e80941Smrg __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 4450b8e80941Smrg __gen_uint(values->IncludeVertexHandles, 10, 10) | 4451b8e80941Smrg __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 4452b8e80941Smrg __gen_uint(values->OutputTopology, 17, 22) | 4453b8e80941Smrg __gen_uint(values->OutputVertexSize, 23, 28) | 4454b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData54, 29, 30); 4455b8e80941Smrg 4456b8e80941Smrg dw[7] = 4457b8e80941Smrg __gen_uint(values->Enable, 0, 0) | 4458b8e80941Smrg __gen_uint(values->DiscardAdjacency, 1, 1) | 4459b8e80941Smrg __gen_uint(values->ReorderMode, 2, 2) | 4460b8e80941Smrg __gen_uint(values->Hint, 3, 3) | 4461b8e80941Smrg __gen_uint(values->IncludePrimitiveID, 4, 4) | 4462b8e80941Smrg __gen_uint(values->InvocationsIncrementValue, 5, 9) | 4463b8e80941Smrg __gen_uint(values->StatisticsEnable, 10, 10) | 4464b8e80941Smrg __gen_uint(values->DispatchMode, 11, 12) | 4465b8e80941Smrg __gen_uint(values->DefaultStreamId, 13, 14) | 4466b8e80941Smrg __gen_uint(values->InstanceControl, 15, 19) | 4467b8e80941Smrg __gen_uint(values->ControlDataHeaderSize, 20, 23); 4468b8e80941Smrg 4469b8e80941Smrg dw[8] = 4470b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 0, 8) | 4471b8e80941Smrg __gen_uint(values->StaticOutputVertexCount, 16, 26) | 4472b8e80941Smrg __gen_uint(values->StaticOutput, 30, 30) | 4473b8e80941Smrg __gen_uint(values->ControlDataFormat, 31, 31); 4474b8e80941Smrg 4475b8e80941Smrg dw[9] = 4476b8e80941Smrg __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 4477b8e80941Smrg __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 4478b8e80941Smrg __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 4479b8e80941Smrg __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 4480b8e80941Smrg} 4481b8e80941Smrg 4482b8e80941Smrg#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_length 5 4483b8e80941Smrg#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_length_bias 2 4484b8e80941Smrg#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_header \ 4485b8e80941Smrg .DWordLength = 3, \ 4486b8e80941Smrg ._3DCommandSubOpcode = 7, \ 4487b8e80941Smrg ._3DCommandOpcode = 0, \ 4488b8e80941Smrg .CommandSubType = 3, \ 4489b8e80941Smrg .CommandType = 3 4490b8e80941Smrg 4491b8e80941Smrgstruct GEN10_3DSTATE_HIER_DEPTH_BUFFER { 4492b8e80941Smrg uint32_t DWordLength; 4493b8e80941Smrg uint32_t _3DCommandSubOpcode; 4494b8e80941Smrg uint32_t _3DCommandOpcode; 4495b8e80941Smrg uint32_t CommandSubType; 4496b8e80941Smrg uint32_t CommandType; 4497b8e80941Smrg uint32_t SurfacePitch; 4498b8e80941Smrg uint32_t MOCS; 4499b8e80941Smrg __gen_address_type SurfaceBaseAddress; 4500b8e80941Smrg uint32_t SurfaceQPitch; 4501b8e80941Smrg}; 4502b8e80941Smrg 4503b8e80941Smrgstatic inline void 4504b8e80941SmrgGEN10_3DSTATE_HIER_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 4505b8e80941Smrg __attribute__((unused)) void * restrict dst, 4506b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_HIER_DEPTH_BUFFER * restrict values) 4507b8e80941Smrg{ 4508b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4509b8e80941Smrg 4510b8e80941Smrg dw[0] = 4511b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4512b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4513b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4514b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4515b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4516b8e80941Smrg 4517b8e80941Smrg dw[1] = 4518b8e80941Smrg __gen_uint(values->SurfacePitch, 0, 16) | 4519b8e80941Smrg __gen_uint(values->MOCS, 25, 31); 4520b8e80941Smrg 4521b8e80941Smrg const uint64_t v2_address = 4522b8e80941Smrg __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 4523b8e80941Smrg dw[2] = v2_address; 4524b8e80941Smrg dw[3] = v2_address >> 32; 4525b8e80941Smrg 4526b8e80941Smrg dw[4] = 4527b8e80941Smrg __gen_uint(values->SurfaceQPitch, 0, 14); 4528b8e80941Smrg} 4529b8e80941Smrg 4530b8e80941Smrg#define GEN10_3DSTATE_HS_length 9 4531b8e80941Smrg#define GEN10_3DSTATE_HS_length_bias 2 4532b8e80941Smrg#define GEN10_3DSTATE_HS_header \ 4533b8e80941Smrg .DWordLength = 7, \ 4534b8e80941Smrg ._3DCommandSubOpcode = 27, \ 4535b8e80941Smrg ._3DCommandOpcode = 0, \ 4536b8e80941Smrg .CommandSubType = 3, \ 4537b8e80941Smrg .CommandType = 3 4538b8e80941Smrg 4539b8e80941Smrgstruct GEN10_3DSTATE_HS { 4540b8e80941Smrg uint32_t DWordLength; 4541b8e80941Smrg uint32_t _3DCommandSubOpcode; 4542b8e80941Smrg uint32_t _3DCommandOpcode; 4543b8e80941Smrg uint32_t CommandSubType; 4544b8e80941Smrg uint32_t CommandType; 4545b8e80941Smrg bool SoftwareExceptionEnable; 4546b8e80941Smrg bool IllegalOpcodeExceptionEnable; 4547b8e80941Smrg uint32_t FloatingPointMode; 4548b8e80941Smrg#define IEEE754 0 4549b8e80941Smrg#define alternate 1 4550b8e80941Smrg uint32_t ThreadDispatchPriority; 4551b8e80941Smrg#define High 1 4552b8e80941Smrg uint32_t BindingTableEntryCount; 4553b8e80941Smrg uint32_t SamplerCount; 4554b8e80941Smrg#define NoSamplers 0 4555b8e80941Smrg#define _14Samplers 1 4556b8e80941Smrg#define _58Samplers 2 4557b8e80941Smrg#define _912Samplers 3 4558b8e80941Smrg#define _1316Samplers 4 4559b8e80941Smrg uint32_t InstanceCount; 4560b8e80941Smrg uint32_t MaximumNumberofThreads; 4561b8e80941Smrg bool StatisticsEnable; 4562b8e80941Smrg bool Enable; 4563b8e80941Smrg uint64_t KernelStartPointer; 4564b8e80941Smrg uint32_t PerThreadScratchSpace; 4565b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 4566b8e80941Smrg bool IncludePrimitiveID; 4567b8e80941Smrg uint32_t VertexURBEntryReadOffset; 4568b8e80941Smrg uint32_t VertexURBEntryReadLength; 4569b8e80941Smrg uint32_t DispatchMode; 4570b8e80941Smrg#define DISPATCH_MODE_SINGLE_PATCH 0 4571b8e80941Smrg#define DISPATCH_MODE_DUAL_PATCH 1 4572b8e80941Smrg#define DISPATCH_MODE__8_PATCH 2 4573b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData; 4574b8e80941Smrg bool IncludeVertexHandles; 4575b8e80941Smrg bool AccessesUAV; 4576b8e80941Smrg bool VectorMaskEnable; 4577b8e80941Smrg bool SingleProgramFlow; 4578b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData5; 4579b8e80941Smrg}; 4580b8e80941Smrg 4581b8e80941Smrgstatic inline void 4582b8e80941SmrgGEN10_3DSTATE_HS_pack(__attribute__((unused)) __gen_user_data *data, 4583b8e80941Smrg __attribute__((unused)) void * restrict dst, 4584b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_HS * restrict values) 4585b8e80941Smrg{ 4586b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4587b8e80941Smrg 4588b8e80941Smrg dw[0] = 4589b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4590b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4591b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4592b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4593b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4594b8e80941Smrg 4595b8e80941Smrg dw[1] = 4596b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 12, 12) | 4597b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 4598b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 4599b8e80941Smrg __gen_uint(values->ThreadDispatchPriority, 17, 17) | 4600b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 4601b8e80941Smrg __gen_uint(values->SamplerCount, 27, 29); 4602b8e80941Smrg 4603b8e80941Smrg dw[2] = 4604b8e80941Smrg __gen_uint(values->InstanceCount, 0, 3) | 4605b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 8, 16) | 4606b8e80941Smrg __gen_uint(values->StatisticsEnable, 29, 29) | 4607b8e80941Smrg __gen_uint(values->Enable, 31, 31); 4608b8e80941Smrg 4609b8e80941Smrg const uint64_t v3 = 4610b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 63); 4611b8e80941Smrg dw[3] = v3; 4612b8e80941Smrg dw[4] = v3 >> 32; 4613b8e80941Smrg 4614b8e80941Smrg const uint64_t v5 = 4615b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 4616b8e80941Smrg const uint64_t v5_address = 4617b8e80941Smrg __gen_combine_address(data, &dw[5], values->ScratchSpaceBasePointer, v5); 4618b8e80941Smrg dw[5] = v5_address; 4619b8e80941Smrg dw[6] = (v5_address >> 32) | (v5 >> 32); 4620b8e80941Smrg 4621b8e80941Smrg dw[7] = 4622b8e80941Smrg __gen_uint(values->IncludePrimitiveID, 0, 0) | 4623b8e80941Smrg __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 4624b8e80941Smrg __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 4625b8e80941Smrg __gen_uint(values->DispatchMode, 17, 18) | 4626b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData, 19, 23) | 4627b8e80941Smrg __gen_uint(values->IncludeVertexHandles, 24, 24) | 4628b8e80941Smrg __gen_uint(values->AccessesUAV, 25, 25) | 4629b8e80941Smrg __gen_uint(values->VectorMaskEnable, 26, 26) | 4630b8e80941Smrg __gen_uint(values->SingleProgramFlow, 27, 27) | 4631b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData5, 28, 28); 4632b8e80941Smrg 4633b8e80941Smrg dw[8] = 0; 4634b8e80941Smrg} 4635b8e80941Smrg 4636b8e80941Smrg#define GEN10_3DSTATE_INDEX_BUFFER_length 5 4637b8e80941Smrg#define GEN10_3DSTATE_INDEX_BUFFER_length_bias 2 4638b8e80941Smrg#define GEN10_3DSTATE_INDEX_BUFFER_header \ 4639b8e80941Smrg .DWordLength = 3, \ 4640b8e80941Smrg ._3DCommandSubOpcode = 10, \ 4641b8e80941Smrg ._3DCommandOpcode = 0, \ 4642b8e80941Smrg .CommandSubType = 3, \ 4643b8e80941Smrg .CommandType = 3 4644b8e80941Smrg 4645b8e80941Smrgstruct GEN10_3DSTATE_INDEX_BUFFER { 4646b8e80941Smrg uint32_t DWordLength; 4647b8e80941Smrg uint32_t _3DCommandSubOpcode; 4648b8e80941Smrg uint32_t _3DCommandOpcode; 4649b8e80941Smrg uint32_t CommandSubType; 4650b8e80941Smrg uint32_t CommandType; 4651b8e80941Smrg uint32_t MOCS; 4652b8e80941Smrg uint32_t IndexFormat; 4653b8e80941Smrg#define INDEX_BYTE 0 4654b8e80941Smrg#define INDEX_WORD 1 4655b8e80941Smrg#define INDEX_DWORD 2 4656b8e80941Smrg __gen_address_type BufferStartingAddress; 4657b8e80941Smrg uint32_t BufferSize; 4658b8e80941Smrg}; 4659b8e80941Smrg 4660b8e80941Smrgstatic inline void 4661b8e80941SmrgGEN10_3DSTATE_INDEX_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 4662b8e80941Smrg __attribute__((unused)) void * restrict dst, 4663b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_INDEX_BUFFER * restrict values) 4664b8e80941Smrg{ 4665b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4666b8e80941Smrg 4667b8e80941Smrg dw[0] = 4668b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4669b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4670b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4671b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4672b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4673b8e80941Smrg 4674b8e80941Smrg dw[1] = 4675b8e80941Smrg __gen_uint(values->MOCS, 0, 6) | 4676b8e80941Smrg __gen_uint(values->IndexFormat, 8, 9); 4677b8e80941Smrg 4678b8e80941Smrg const uint64_t v2_address = 4679b8e80941Smrg __gen_combine_address(data, &dw[2], values->BufferStartingAddress, 0); 4680b8e80941Smrg dw[2] = v2_address; 4681b8e80941Smrg dw[3] = v2_address >> 32; 4682b8e80941Smrg 4683b8e80941Smrg dw[4] = 4684b8e80941Smrg __gen_uint(values->BufferSize, 0, 31); 4685b8e80941Smrg} 4686b8e80941Smrg 4687b8e80941Smrg#define GEN10_3DSTATE_LINE_STIPPLE_length 3 4688b8e80941Smrg#define GEN10_3DSTATE_LINE_STIPPLE_length_bias 2 4689b8e80941Smrg#define GEN10_3DSTATE_LINE_STIPPLE_header \ 4690b8e80941Smrg .DWordLength = 1, \ 4691b8e80941Smrg ._3DCommandSubOpcode = 8, \ 4692b8e80941Smrg ._3DCommandOpcode = 1, \ 4693b8e80941Smrg .CommandSubType = 3, \ 4694b8e80941Smrg .CommandType = 3 4695b8e80941Smrg 4696b8e80941Smrgstruct GEN10_3DSTATE_LINE_STIPPLE { 4697b8e80941Smrg uint32_t DWordLength; 4698b8e80941Smrg uint32_t _3DCommandSubOpcode; 4699b8e80941Smrg uint32_t _3DCommandOpcode; 4700b8e80941Smrg uint32_t CommandSubType; 4701b8e80941Smrg uint32_t CommandType; 4702b8e80941Smrg uint32_t LineStipplePattern; 4703b8e80941Smrg uint32_t CurrentStippleIndex; 4704b8e80941Smrg uint32_t CurrentRepeatCounter; 4705b8e80941Smrg bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex; 4706b8e80941Smrg uint32_t LineStippleRepeatCount; 4707b8e80941Smrg float LineStippleInverseRepeatCount; 4708b8e80941Smrg}; 4709b8e80941Smrg 4710b8e80941Smrgstatic inline void 4711b8e80941SmrgGEN10_3DSTATE_LINE_STIPPLE_pack(__attribute__((unused)) __gen_user_data *data, 4712b8e80941Smrg __attribute__((unused)) void * restrict dst, 4713b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_LINE_STIPPLE * restrict values) 4714b8e80941Smrg{ 4715b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4716b8e80941Smrg 4717b8e80941Smrg dw[0] = 4718b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4719b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4720b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4721b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4722b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4723b8e80941Smrg 4724b8e80941Smrg dw[1] = 4725b8e80941Smrg __gen_uint(values->LineStipplePattern, 0, 15) | 4726b8e80941Smrg __gen_uint(values->CurrentStippleIndex, 16, 19) | 4727b8e80941Smrg __gen_uint(values->CurrentRepeatCounter, 21, 29) | 4728b8e80941Smrg __gen_uint(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31); 4729b8e80941Smrg 4730b8e80941Smrg dw[2] = 4731b8e80941Smrg __gen_uint(values->LineStippleRepeatCount, 0, 8) | 4732b8e80941Smrg __gen_ufixed(values->LineStippleInverseRepeatCount, 15, 31, 16); 4733b8e80941Smrg} 4734b8e80941Smrg 4735b8e80941Smrg#define GEN10_3DSTATE_MONOFILTER_SIZE_length 2 4736b8e80941Smrg#define GEN10_3DSTATE_MONOFILTER_SIZE_length_bias 2 4737b8e80941Smrg#define GEN10_3DSTATE_MONOFILTER_SIZE_header \ 4738b8e80941Smrg .DWordLength = 0, \ 4739b8e80941Smrg ._3DCommandSubOpcode = 17, \ 4740b8e80941Smrg ._3DCommandOpcode = 1, \ 4741b8e80941Smrg .CommandSubType = 3, \ 4742b8e80941Smrg .CommandType = 3 4743b8e80941Smrg 4744b8e80941Smrgstruct GEN10_3DSTATE_MONOFILTER_SIZE { 4745b8e80941Smrg uint32_t DWordLength; 4746b8e80941Smrg uint32_t _3DCommandSubOpcode; 4747b8e80941Smrg uint32_t _3DCommandOpcode; 4748b8e80941Smrg uint32_t CommandSubType; 4749b8e80941Smrg uint32_t CommandType; 4750b8e80941Smrg uint32_t MonochromeFilterHeight; 4751b8e80941Smrg uint32_t MonochromeFilterWidth; 4752b8e80941Smrg}; 4753b8e80941Smrg 4754b8e80941Smrgstatic inline void 4755b8e80941SmrgGEN10_3DSTATE_MONOFILTER_SIZE_pack(__attribute__((unused)) __gen_user_data *data, 4756b8e80941Smrg __attribute__((unused)) void * restrict dst, 4757b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_MONOFILTER_SIZE * restrict values) 4758b8e80941Smrg{ 4759b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4760b8e80941Smrg 4761b8e80941Smrg dw[0] = 4762b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4763b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4764b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4765b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4766b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4767b8e80941Smrg 4768b8e80941Smrg dw[1] = 4769b8e80941Smrg __gen_uint(values->MonochromeFilterHeight, 0, 2) | 4770b8e80941Smrg __gen_uint(values->MonochromeFilterWidth, 3, 5); 4771b8e80941Smrg} 4772b8e80941Smrg 4773b8e80941Smrg#define GEN10_3DSTATE_MULTISAMPLE_length 2 4774b8e80941Smrg#define GEN10_3DSTATE_MULTISAMPLE_length_bias 2 4775b8e80941Smrg#define GEN10_3DSTATE_MULTISAMPLE_header \ 4776b8e80941Smrg .DWordLength = 0, \ 4777b8e80941Smrg ._3DCommandSubOpcode = 13, \ 4778b8e80941Smrg ._3DCommandOpcode = 0, \ 4779b8e80941Smrg .CommandSubType = 3, \ 4780b8e80941Smrg .CommandType = 3 4781b8e80941Smrg 4782b8e80941Smrgstruct GEN10_3DSTATE_MULTISAMPLE { 4783b8e80941Smrg uint32_t DWordLength; 4784b8e80941Smrg uint32_t _3DCommandSubOpcode; 4785b8e80941Smrg uint32_t _3DCommandOpcode; 4786b8e80941Smrg uint32_t CommandSubType; 4787b8e80941Smrg uint32_t CommandType; 4788b8e80941Smrg uint32_t NumberofMultisamples; 4789b8e80941Smrg uint32_t PixelLocation; 4790b8e80941Smrg#define CENTER 0 4791b8e80941Smrg#define UL_CORNER 1 4792b8e80941Smrg bool PixelPositionOffsetEnable; 4793b8e80941Smrg}; 4794b8e80941Smrg 4795b8e80941Smrgstatic inline void 4796b8e80941SmrgGEN10_3DSTATE_MULTISAMPLE_pack(__attribute__((unused)) __gen_user_data *data, 4797b8e80941Smrg __attribute__((unused)) void * restrict dst, 4798b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_MULTISAMPLE * restrict values) 4799b8e80941Smrg{ 4800b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4801b8e80941Smrg 4802b8e80941Smrg dw[0] = 4803b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4804b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4805b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4806b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4807b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4808b8e80941Smrg 4809b8e80941Smrg dw[1] = 4810b8e80941Smrg __gen_uint(values->NumberofMultisamples, 1, 3) | 4811b8e80941Smrg __gen_uint(values->PixelLocation, 4, 4) | 4812b8e80941Smrg __gen_uint(values->PixelPositionOffsetEnable, 5, 5); 4813b8e80941Smrg} 4814b8e80941Smrg 4815b8e80941Smrg#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_length 2 4816b8e80941Smrg#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 2 4817b8e80941Smrg#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_header\ 4818b8e80941Smrg .DWordLength = 0, \ 4819b8e80941Smrg ._3DCommandSubOpcode = 6, \ 4820b8e80941Smrg ._3DCommandOpcode = 1, \ 4821b8e80941Smrg .CommandSubType = 3, \ 4822b8e80941Smrg .CommandType = 3 4823b8e80941Smrg 4824b8e80941Smrgstruct GEN10_3DSTATE_POLY_STIPPLE_OFFSET { 4825b8e80941Smrg uint32_t DWordLength; 4826b8e80941Smrg uint32_t _3DCommandSubOpcode; 4827b8e80941Smrg uint32_t _3DCommandOpcode; 4828b8e80941Smrg uint32_t CommandSubType; 4829b8e80941Smrg uint32_t CommandType; 4830b8e80941Smrg uint32_t PolygonStippleYOffset; 4831b8e80941Smrg uint32_t PolygonStippleXOffset; 4832b8e80941Smrg}; 4833b8e80941Smrg 4834b8e80941Smrgstatic inline void 4835b8e80941SmrgGEN10_3DSTATE_POLY_STIPPLE_OFFSET_pack(__attribute__((unused)) __gen_user_data *data, 4836b8e80941Smrg __attribute__((unused)) void * restrict dst, 4837b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_POLY_STIPPLE_OFFSET * restrict values) 4838b8e80941Smrg{ 4839b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4840b8e80941Smrg 4841b8e80941Smrg dw[0] = 4842b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4843b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4844b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4845b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4846b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4847b8e80941Smrg 4848b8e80941Smrg dw[1] = 4849b8e80941Smrg __gen_uint(values->PolygonStippleYOffset, 0, 4) | 4850b8e80941Smrg __gen_uint(values->PolygonStippleXOffset, 8, 12); 4851b8e80941Smrg} 4852b8e80941Smrg 4853b8e80941Smrg#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_length 33 4854b8e80941Smrg#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 2 4855b8e80941Smrg#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_header\ 4856b8e80941Smrg .DWordLength = 31, \ 4857b8e80941Smrg ._3DCommandSubOpcode = 7, \ 4858b8e80941Smrg ._3DCommandOpcode = 1, \ 4859b8e80941Smrg .CommandSubType = 3, \ 4860b8e80941Smrg .CommandType = 3 4861b8e80941Smrg 4862b8e80941Smrgstruct GEN10_3DSTATE_POLY_STIPPLE_PATTERN { 4863b8e80941Smrg uint32_t DWordLength; 4864b8e80941Smrg uint32_t _3DCommandSubOpcode; 4865b8e80941Smrg uint32_t _3DCommandOpcode; 4866b8e80941Smrg uint32_t CommandSubType; 4867b8e80941Smrg uint32_t CommandType; 4868b8e80941Smrg uint32_t PatternRow[32]; 4869b8e80941Smrg}; 4870b8e80941Smrg 4871b8e80941Smrgstatic inline void 4872b8e80941SmrgGEN10_3DSTATE_POLY_STIPPLE_PATTERN_pack(__attribute__((unused)) __gen_user_data *data, 4873b8e80941Smrg __attribute__((unused)) void * restrict dst, 4874b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_POLY_STIPPLE_PATTERN * restrict values) 4875b8e80941Smrg{ 4876b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 4877b8e80941Smrg 4878b8e80941Smrg dw[0] = 4879b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 4880b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4881b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 4882b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 4883b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 4884b8e80941Smrg 4885b8e80941Smrg dw[1] = 4886b8e80941Smrg __gen_uint(values->PatternRow[0], 0, 31); 4887b8e80941Smrg 4888b8e80941Smrg dw[2] = 4889b8e80941Smrg __gen_uint(values->PatternRow[1], 0, 31); 4890b8e80941Smrg 4891b8e80941Smrg dw[3] = 4892b8e80941Smrg __gen_uint(values->PatternRow[2], 0, 31); 4893b8e80941Smrg 4894b8e80941Smrg dw[4] = 4895b8e80941Smrg __gen_uint(values->PatternRow[3], 0, 31); 4896b8e80941Smrg 4897b8e80941Smrg dw[5] = 4898b8e80941Smrg __gen_uint(values->PatternRow[4], 0, 31); 4899b8e80941Smrg 4900b8e80941Smrg dw[6] = 4901b8e80941Smrg __gen_uint(values->PatternRow[5], 0, 31); 4902b8e80941Smrg 4903b8e80941Smrg dw[7] = 4904b8e80941Smrg __gen_uint(values->PatternRow[6], 0, 31); 4905b8e80941Smrg 4906b8e80941Smrg dw[8] = 4907b8e80941Smrg __gen_uint(values->PatternRow[7], 0, 31); 4908b8e80941Smrg 4909b8e80941Smrg dw[9] = 4910b8e80941Smrg __gen_uint(values->PatternRow[8], 0, 31); 4911b8e80941Smrg 4912b8e80941Smrg dw[10] = 4913b8e80941Smrg __gen_uint(values->PatternRow[9], 0, 31); 4914b8e80941Smrg 4915b8e80941Smrg dw[11] = 4916b8e80941Smrg __gen_uint(values->PatternRow[10], 0, 31); 4917b8e80941Smrg 4918b8e80941Smrg dw[12] = 4919b8e80941Smrg __gen_uint(values->PatternRow[11], 0, 31); 4920b8e80941Smrg 4921b8e80941Smrg dw[13] = 4922b8e80941Smrg __gen_uint(values->PatternRow[12], 0, 31); 4923b8e80941Smrg 4924b8e80941Smrg dw[14] = 4925b8e80941Smrg __gen_uint(values->PatternRow[13], 0, 31); 4926b8e80941Smrg 4927b8e80941Smrg dw[15] = 4928b8e80941Smrg __gen_uint(values->PatternRow[14], 0, 31); 4929b8e80941Smrg 4930b8e80941Smrg dw[16] = 4931b8e80941Smrg __gen_uint(values->PatternRow[15], 0, 31); 4932b8e80941Smrg 4933b8e80941Smrg dw[17] = 4934b8e80941Smrg __gen_uint(values->PatternRow[16], 0, 31); 4935b8e80941Smrg 4936b8e80941Smrg dw[18] = 4937b8e80941Smrg __gen_uint(values->PatternRow[17], 0, 31); 4938b8e80941Smrg 4939b8e80941Smrg dw[19] = 4940b8e80941Smrg __gen_uint(values->PatternRow[18], 0, 31); 4941b8e80941Smrg 4942b8e80941Smrg dw[20] = 4943b8e80941Smrg __gen_uint(values->PatternRow[19], 0, 31); 4944b8e80941Smrg 4945b8e80941Smrg dw[21] = 4946b8e80941Smrg __gen_uint(values->PatternRow[20], 0, 31); 4947b8e80941Smrg 4948b8e80941Smrg dw[22] = 4949b8e80941Smrg __gen_uint(values->PatternRow[21], 0, 31); 4950b8e80941Smrg 4951b8e80941Smrg dw[23] = 4952b8e80941Smrg __gen_uint(values->PatternRow[22], 0, 31); 4953b8e80941Smrg 4954b8e80941Smrg dw[24] = 4955b8e80941Smrg __gen_uint(values->PatternRow[23], 0, 31); 4956b8e80941Smrg 4957b8e80941Smrg dw[25] = 4958b8e80941Smrg __gen_uint(values->PatternRow[24], 0, 31); 4959b8e80941Smrg 4960b8e80941Smrg dw[26] = 4961b8e80941Smrg __gen_uint(values->PatternRow[25], 0, 31); 4962b8e80941Smrg 4963b8e80941Smrg dw[27] = 4964b8e80941Smrg __gen_uint(values->PatternRow[26], 0, 31); 4965b8e80941Smrg 4966b8e80941Smrg dw[28] = 4967b8e80941Smrg __gen_uint(values->PatternRow[27], 0, 31); 4968b8e80941Smrg 4969b8e80941Smrg dw[29] = 4970b8e80941Smrg __gen_uint(values->PatternRow[28], 0, 31); 4971b8e80941Smrg 4972b8e80941Smrg dw[30] = 4973b8e80941Smrg __gen_uint(values->PatternRow[29], 0, 31); 4974b8e80941Smrg 4975b8e80941Smrg dw[31] = 4976b8e80941Smrg __gen_uint(values->PatternRow[30], 0, 31); 4977b8e80941Smrg 4978b8e80941Smrg dw[32] = 4979b8e80941Smrg __gen_uint(values->PatternRow[31], 0, 31); 4980b8e80941Smrg} 4981b8e80941Smrg 4982b8e80941Smrg#define GEN10_3DSTATE_PS_length 12 4983b8e80941Smrg#define GEN10_3DSTATE_PS_length_bias 2 4984b8e80941Smrg#define GEN10_3DSTATE_PS_header \ 4985b8e80941Smrg .DWordLength = 10, \ 4986b8e80941Smrg ._3DCommandSubOpcode = 32, \ 4987b8e80941Smrg ._3DCommandOpcode = 0, \ 4988b8e80941Smrg .CommandSubType = 3, \ 4989b8e80941Smrg .CommandType = 3 4990b8e80941Smrg 4991b8e80941Smrgstruct GEN10_3DSTATE_PS { 4992b8e80941Smrg uint32_t DWordLength; 4993b8e80941Smrg uint32_t _3DCommandSubOpcode; 4994b8e80941Smrg uint32_t _3DCommandOpcode; 4995b8e80941Smrg uint32_t CommandSubType; 4996b8e80941Smrg uint32_t CommandType; 4997b8e80941Smrg uint64_t KernelStartPointer0; 4998b8e80941Smrg bool SoftwareExceptionEnable; 4999b8e80941Smrg bool MaskStackExceptionEnable; 5000b8e80941Smrg bool IllegalOpcodeExceptionEnable; 5001b8e80941Smrg uint32_t RoundingMode; 5002b8e80941Smrg#define RTNE 0 5003b8e80941Smrg#define RU 1 5004b8e80941Smrg#define RD 2 5005b8e80941Smrg#define RTZ 3 5006b8e80941Smrg uint32_t FloatingPointMode; 5007b8e80941Smrg#define IEEE754 0 5008b8e80941Smrg#define Alternate 1 5009b8e80941Smrg uint32_t ThreadDispatchPriority; 5010b8e80941Smrg#define High 1 5011b8e80941Smrg uint32_t BindingTableEntryCount; 5012b8e80941Smrg uint32_t SinglePrecisionDenormalMode; 5013b8e80941Smrg#define FlushedtoZero 0 5014b8e80941Smrg#define Retained 1 5015b8e80941Smrg uint32_t SamplerCount; 5016b8e80941Smrg#define NoSamplers 0 5017b8e80941Smrg#define _14Samplers 1 5018b8e80941Smrg#define _58Samplers 2 5019b8e80941Smrg#define _912Samplers 3 5020b8e80941Smrg#define _1316Samplers 4 5021b8e80941Smrg bool VectorMaskEnable; 5022b8e80941Smrg bool SingleProgramFlow; 5023b8e80941Smrg uint32_t PerThreadScratchSpace; 5024b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 5025b8e80941Smrg bool _8PixelDispatchEnable; 5026b8e80941Smrg bool _16PixelDispatchEnable; 5027b8e80941Smrg bool _32PixelDispatchEnable; 5028b8e80941Smrg uint32_t PositionXYOffsetSelect; 5029b8e80941Smrg#define POSOFFSET_NONE 0 5030b8e80941Smrg#define POSOFFSET_CENTROID 2 5031b8e80941Smrg#define POSOFFSET_SAMPLE 3 5032b8e80941Smrg uint32_t RenderTargetResolveType; 5033b8e80941Smrg#define RESOLVE_DISABLED 0 5034b8e80941Smrg#define RESOLVE_PARTIAL 1 5035b8e80941Smrg#define FAST_CLEAR_0 2 5036b8e80941Smrg#define RESOLVE_FULL 3 5037b8e80941Smrg bool RenderTargetFastClearEnable; 5038b8e80941Smrg bool PushConstantEnable; 5039b8e80941Smrg uint32_t MaximumNumberofThreadsPerPSD; 5040b8e80941Smrg uint32_t DispatchGRFStartRegisterForConstantSetupData2; 5041b8e80941Smrg uint32_t DispatchGRFStartRegisterForConstantSetupData1; 5042b8e80941Smrg uint32_t DispatchGRFStartRegisterForConstantSetupData0; 5043b8e80941Smrg uint64_t KernelStartPointer1; 5044b8e80941Smrg uint64_t KernelStartPointer2; 5045b8e80941Smrg}; 5046b8e80941Smrg 5047b8e80941Smrgstatic inline void 5048b8e80941SmrgGEN10_3DSTATE_PS_pack(__attribute__((unused)) __gen_user_data *data, 5049b8e80941Smrg __attribute__((unused)) void * restrict dst, 5050b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_PS * restrict values) 5051b8e80941Smrg{ 5052b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5053b8e80941Smrg 5054b8e80941Smrg dw[0] = 5055b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5056b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5057b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5058b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5059b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5060b8e80941Smrg 5061b8e80941Smrg const uint64_t v1 = 5062b8e80941Smrg __gen_offset(values->KernelStartPointer0, 6, 63); 5063b8e80941Smrg dw[1] = v1; 5064b8e80941Smrg dw[2] = v1 >> 32; 5065b8e80941Smrg 5066b8e80941Smrg dw[3] = 5067b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 5068b8e80941Smrg __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 5069b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 5070b8e80941Smrg __gen_uint(values->RoundingMode, 14, 15) | 5071b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 5072b8e80941Smrg __gen_uint(values->ThreadDispatchPriority, 17, 17) | 5073b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 5074b8e80941Smrg __gen_uint(values->SinglePrecisionDenormalMode, 26, 26) | 5075b8e80941Smrg __gen_uint(values->SamplerCount, 27, 29) | 5076b8e80941Smrg __gen_uint(values->VectorMaskEnable, 30, 30) | 5077b8e80941Smrg __gen_uint(values->SingleProgramFlow, 31, 31); 5078b8e80941Smrg 5079b8e80941Smrg const uint64_t v4 = 5080b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 5081b8e80941Smrg const uint64_t v4_address = 5082b8e80941Smrg __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 5083b8e80941Smrg dw[4] = v4_address; 5084b8e80941Smrg dw[5] = (v4_address >> 32) | (v4 >> 32); 5085b8e80941Smrg 5086b8e80941Smrg dw[6] = 5087b8e80941Smrg __gen_uint(values->_8PixelDispatchEnable, 0, 0) | 5088b8e80941Smrg __gen_uint(values->_16PixelDispatchEnable, 1, 1) | 5089b8e80941Smrg __gen_uint(values->_32PixelDispatchEnable, 2, 2) | 5090b8e80941Smrg __gen_uint(values->PositionXYOffsetSelect, 3, 4) | 5091b8e80941Smrg __gen_uint(values->RenderTargetResolveType, 6, 7) | 5092b8e80941Smrg __gen_uint(values->RenderTargetFastClearEnable, 8, 8) | 5093b8e80941Smrg __gen_uint(values->PushConstantEnable, 11, 11) | 5094b8e80941Smrg __gen_uint(values->MaximumNumberofThreadsPerPSD, 23, 31); 5095b8e80941Smrg 5096b8e80941Smrg dw[7] = 5097b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) | 5098b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) | 5099b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22); 5100b8e80941Smrg 5101b8e80941Smrg const uint64_t v8 = 5102b8e80941Smrg __gen_offset(values->KernelStartPointer1, 6, 63); 5103b8e80941Smrg dw[8] = v8; 5104b8e80941Smrg dw[9] = v8 >> 32; 5105b8e80941Smrg 5106b8e80941Smrg const uint64_t v10 = 5107b8e80941Smrg __gen_offset(values->KernelStartPointer2, 6, 63); 5108b8e80941Smrg dw[10] = v10; 5109b8e80941Smrg dw[11] = v10 >> 32; 5110b8e80941Smrg} 5111b8e80941Smrg 5112b8e80941Smrg#define GEN10_3DSTATE_PS_BLEND_length 2 5113b8e80941Smrg#define GEN10_3DSTATE_PS_BLEND_length_bias 2 5114b8e80941Smrg#define GEN10_3DSTATE_PS_BLEND_header \ 5115b8e80941Smrg .DWordLength = 0, \ 5116b8e80941Smrg ._3DCommandSubOpcode = 77, \ 5117b8e80941Smrg ._3DCommandOpcode = 0, \ 5118b8e80941Smrg .CommandSubType = 3, \ 5119b8e80941Smrg .CommandType = 3 5120b8e80941Smrg 5121b8e80941Smrgstruct GEN10_3DSTATE_PS_BLEND { 5122b8e80941Smrg uint32_t DWordLength; 5123b8e80941Smrg uint32_t _3DCommandSubOpcode; 5124b8e80941Smrg uint32_t _3DCommandOpcode; 5125b8e80941Smrg uint32_t CommandSubType; 5126b8e80941Smrg uint32_t CommandType; 5127b8e80941Smrg bool IndependentAlphaBlendEnable; 5128b8e80941Smrg bool AlphaTestEnable; 5129b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; 5130b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Factor SourceBlendFactor; 5131b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; 5132b8e80941Smrg enum GEN10_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; 5133b8e80941Smrg bool ColorBufferBlendEnable; 5134b8e80941Smrg bool HasWriteableRT; 5135b8e80941Smrg bool AlphaToCoverageEnable; 5136b8e80941Smrg}; 5137b8e80941Smrg 5138b8e80941Smrgstatic inline void 5139b8e80941SmrgGEN10_3DSTATE_PS_BLEND_pack(__attribute__((unused)) __gen_user_data *data, 5140b8e80941Smrg __attribute__((unused)) void * restrict dst, 5141b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_PS_BLEND * restrict values) 5142b8e80941Smrg{ 5143b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5144b8e80941Smrg 5145b8e80941Smrg dw[0] = 5146b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5147b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5148b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5149b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5150b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5151b8e80941Smrg 5152b8e80941Smrg dw[1] = 5153b8e80941Smrg __gen_uint(values->IndependentAlphaBlendEnable, 7, 7) | 5154b8e80941Smrg __gen_uint(values->AlphaTestEnable, 8, 8) | 5155b8e80941Smrg __gen_uint(values->DestinationBlendFactor, 9, 13) | 5156b8e80941Smrg __gen_uint(values->SourceBlendFactor, 14, 18) | 5157b8e80941Smrg __gen_uint(values->DestinationAlphaBlendFactor, 19, 23) | 5158b8e80941Smrg __gen_uint(values->SourceAlphaBlendFactor, 24, 28) | 5159b8e80941Smrg __gen_uint(values->ColorBufferBlendEnable, 29, 29) | 5160b8e80941Smrg __gen_uint(values->HasWriteableRT, 30, 30) | 5161b8e80941Smrg __gen_uint(values->AlphaToCoverageEnable, 31, 31); 5162b8e80941Smrg} 5163b8e80941Smrg 5164b8e80941Smrg#define GEN10_3DSTATE_PS_EXTRA_length 2 5165b8e80941Smrg#define GEN10_3DSTATE_PS_EXTRA_length_bias 2 5166b8e80941Smrg#define GEN10_3DSTATE_PS_EXTRA_header \ 5167b8e80941Smrg .DWordLength = 0, \ 5168b8e80941Smrg ._3DCommandSubOpcode = 79, \ 5169b8e80941Smrg ._3DCommandOpcode = 0, \ 5170b8e80941Smrg .CommandSubType = 3, \ 5171b8e80941Smrg .CommandType = 3 5172b8e80941Smrg 5173b8e80941Smrgstruct GEN10_3DSTATE_PS_EXTRA { 5174b8e80941Smrg uint32_t DWordLength; 5175b8e80941Smrg uint32_t _3DCommandSubOpcode; 5176b8e80941Smrg uint32_t _3DCommandOpcode; 5177b8e80941Smrg uint32_t CommandSubType; 5178b8e80941Smrg uint32_t CommandType; 5179b8e80941Smrg uint32_t InputCoverageMaskState; 5180b8e80941Smrg#define ICMS_NONE 0 5181b8e80941Smrg#define ICMS_NORMAL 1 5182b8e80941Smrg#define ICMS_INNER_CONSERVATIVE 2 5183b8e80941Smrg#define ICMS_DEPTH_COVERAGE 3 5184b8e80941Smrg bool PixelShaderHasUAV; 5185b8e80941Smrg bool PixelShaderPullsBary; 5186b8e80941Smrg bool PixelShaderComputesStencil; 5187b8e80941Smrg bool PixelShaderIsPerSample; 5188b8e80941Smrg bool PixelShaderDisablesAlphaToCoverage; 5189b8e80941Smrg bool AttributeEnable; 5190b8e80941Smrg bool SimplePSHint; 5191b8e80941Smrg bool PixelShaderRequiresSubpixelSampleOffsets; 5192b8e80941Smrg bool PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients; 5193b8e80941Smrg bool PixelShaderRequiresPerspectiveBaryPlaneCoefficients; 5194b8e80941Smrg bool PixelShaderRequiresSourceDepthandorWPlaneCoefficients; 5195b8e80941Smrg bool PixelShaderUsesSourceW; 5196b8e80941Smrg bool PixelShaderUsesSourceDepth; 5197b8e80941Smrg bool ForceComputedDepth; 5198b8e80941Smrg uint32_t PixelShaderComputedDepthMode; 5199b8e80941Smrg#define PSCDEPTH_OFF 0 5200b8e80941Smrg#define PSCDEPTH_ON 1 5201b8e80941Smrg#define PSCDEPTH_ON_GE 2 5202b8e80941Smrg#define PSCDEPTH_ON_LE 3 5203b8e80941Smrg bool PixelShaderKillsPixel; 5204b8e80941Smrg bool oMaskPresenttoRenderTarget; 5205b8e80941Smrg bool PixelShaderDoesnotwritetoRT; 5206b8e80941Smrg bool PixelShaderValid; 5207b8e80941Smrg}; 5208b8e80941Smrg 5209b8e80941Smrgstatic inline void 5210b8e80941SmrgGEN10_3DSTATE_PS_EXTRA_pack(__attribute__((unused)) __gen_user_data *data, 5211b8e80941Smrg __attribute__((unused)) void * restrict dst, 5212b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_PS_EXTRA * restrict values) 5213b8e80941Smrg{ 5214b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5215b8e80941Smrg 5216b8e80941Smrg dw[0] = 5217b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5218b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5219b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5220b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5221b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5222b8e80941Smrg 5223b8e80941Smrg dw[1] = 5224b8e80941Smrg __gen_uint(values->InputCoverageMaskState, 0, 1) | 5225b8e80941Smrg __gen_uint(values->PixelShaderHasUAV, 2, 2) | 5226b8e80941Smrg __gen_uint(values->PixelShaderPullsBary, 3, 3) | 5227b8e80941Smrg __gen_uint(values->PixelShaderComputesStencil, 5, 5) | 5228b8e80941Smrg __gen_uint(values->PixelShaderIsPerSample, 6, 6) | 5229b8e80941Smrg __gen_uint(values->PixelShaderDisablesAlphaToCoverage, 7, 7) | 5230b8e80941Smrg __gen_uint(values->AttributeEnable, 8, 8) | 5231b8e80941Smrg __gen_uint(values->SimplePSHint, 9, 9) | 5232b8e80941Smrg __gen_uint(values->PixelShaderRequiresSubpixelSampleOffsets, 18, 18) | 5233b8e80941Smrg __gen_uint(values->PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients, 19, 19) | 5234b8e80941Smrg __gen_uint(values->PixelShaderRequiresPerspectiveBaryPlaneCoefficients, 20, 20) | 5235b8e80941Smrg __gen_uint(values->PixelShaderRequiresSourceDepthandorWPlaneCoefficients, 21, 21) | 5236b8e80941Smrg __gen_uint(values->PixelShaderUsesSourceW, 23, 23) | 5237b8e80941Smrg __gen_uint(values->PixelShaderUsesSourceDepth, 24, 24) | 5238b8e80941Smrg __gen_uint(values->ForceComputedDepth, 25, 25) | 5239b8e80941Smrg __gen_uint(values->PixelShaderComputedDepthMode, 26, 27) | 5240b8e80941Smrg __gen_uint(values->PixelShaderKillsPixel, 28, 28) | 5241b8e80941Smrg __gen_uint(values->oMaskPresenttoRenderTarget, 29, 29) | 5242b8e80941Smrg __gen_uint(values->PixelShaderDoesnotwritetoRT, 30, 30) | 5243b8e80941Smrg __gen_uint(values->PixelShaderValid, 31, 31); 5244b8e80941Smrg} 5245b8e80941Smrg 5246b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2 5247b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 2 5248b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\ 5249b8e80941Smrg .DWordLength = 0, \ 5250b8e80941Smrg ._3DCommandSubOpcode = 20, \ 5251b8e80941Smrg ._3DCommandOpcode = 1, \ 5252b8e80941Smrg .CommandSubType = 3, \ 5253b8e80941Smrg .CommandType = 3 5254b8e80941Smrg 5255b8e80941Smrgstruct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS { 5256b8e80941Smrg uint32_t DWordLength; 5257b8e80941Smrg uint32_t _3DCommandSubOpcode; 5258b8e80941Smrg uint32_t _3DCommandOpcode; 5259b8e80941Smrg uint32_t CommandSubType; 5260b8e80941Smrg uint32_t CommandType; 5261b8e80941Smrg uint32_t ConstantBufferSize; 5262b8e80941Smrg uint32_t ConstantBufferOffset; 5263b8e80941Smrg}; 5264b8e80941Smrg 5265b8e80941Smrgstatic inline void 5266b8e80941SmrgGEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__attribute__((unused)) __gen_user_data *data, 5267b8e80941Smrg __attribute__((unused)) void * restrict dst, 5268b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values) 5269b8e80941Smrg{ 5270b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5271b8e80941Smrg 5272b8e80941Smrg dw[0] = 5273b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5274b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5275b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5276b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5277b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5278b8e80941Smrg 5279b8e80941Smrg dw[1] = 5280b8e80941Smrg __gen_uint(values->ConstantBufferSize, 0, 5) | 5281b8e80941Smrg __gen_uint(values->ConstantBufferOffset, 16, 20); 5282b8e80941Smrg} 5283b8e80941Smrg 5284b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2 5285b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 2 5286b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\ 5287b8e80941Smrg .DWordLength = 0, \ 5288b8e80941Smrg ._3DCommandSubOpcode = 21, \ 5289b8e80941Smrg ._3DCommandOpcode = 1, \ 5290b8e80941Smrg .CommandSubType = 3, \ 5291b8e80941Smrg .CommandType = 3 5292b8e80941Smrg 5293b8e80941Smrgstruct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS { 5294b8e80941Smrg uint32_t DWordLength; 5295b8e80941Smrg uint32_t _3DCommandSubOpcode; 5296b8e80941Smrg uint32_t _3DCommandOpcode; 5297b8e80941Smrg uint32_t CommandSubType; 5298b8e80941Smrg uint32_t CommandType; 5299b8e80941Smrg uint32_t ConstantBufferSize; 5300b8e80941Smrg uint32_t ConstantBufferOffset; 5301b8e80941Smrg}; 5302b8e80941Smrg 5303b8e80941Smrgstatic inline void 5304b8e80941SmrgGEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__attribute__((unused)) __gen_user_data *data, 5305b8e80941Smrg __attribute__((unused)) void * restrict dst, 5306b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values) 5307b8e80941Smrg{ 5308b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5309b8e80941Smrg 5310b8e80941Smrg dw[0] = 5311b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5312b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5313b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5314b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5315b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5316b8e80941Smrg 5317b8e80941Smrg dw[1] = 5318b8e80941Smrg __gen_uint(values->ConstantBufferSize, 0, 5) | 5319b8e80941Smrg __gen_uint(values->ConstantBufferOffset, 16, 20); 5320b8e80941Smrg} 5321b8e80941Smrg 5322b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2 5323b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 2 5324b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\ 5325b8e80941Smrg .DWordLength = 0, \ 5326b8e80941Smrg ._3DCommandSubOpcode = 19, \ 5327b8e80941Smrg ._3DCommandOpcode = 1, \ 5328b8e80941Smrg .CommandSubType = 3, \ 5329b8e80941Smrg .CommandType = 3 5330b8e80941Smrg 5331b8e80941Smrgstruct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS { 5332b8e80941Smrg uint32_t DWordLength; 5333b8e80941Smrg uint32_t _3DCommandSubOpcode; 5334b8e80941Smrg uint32_t _3DCommandOpcode; 5335b8e80941Smrg uint32_t CommandSubType; 5336b8e80941Smrg uint32_t CommandType; 5337b8e80941Smrg uint32_t ConstantBufferSize; 5338b8e80941Smrg uint32_t ConstantBufferOffset; 5339b8e80941Smrg}; 5340b8e80941Smrg 5341b8e80941Smrgstatic inline void 5342b8e80941SmrgGEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__attribute__((unused)) __gen_user_data *data, 5343b8e80941Smrg __attribute__((unused)) void * restrict dst, 5344b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values) 5345b8e80941Smrg{ 5346b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5347b8e80941Smrg 5348b8e80941Smrg dw[0] = 5349b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5350b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5351b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5352b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5353b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5354b8e80941Smrg 5355b8e80941Smrg dw[1] = 5356b8e80941Smrg __gen_uint(values->ConstantBufferSize, 0, 5) | 5357b8e80941Smrg __gen_uint(values->ConstantBufferOffset, 16, 20); 5358b8e80941Smrg} 5359b8e80941Smrg 5360b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2 5361b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 2 5362b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\ 5363b8e80941Smrg .DWordLength = 0, \ 5364b8e80941Smrg ._3DCommandSubOpcode = 22, \ 5365b8e80941Smrg ._3DCommandOpcode = 1, \ 5366b8e80941Smrg .CommandSubType = 3, \ 5367b8e80941Smrg .CommandType = 3 5368b8e80941Smrg 5369b8e80941Smrgstruct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS { 5370b8e80941Smrg uint32_t DWordLength; 5371b8e80941Smrg uint32_t _3DCommandSubOpcode; 5372b8e80941Smrg uint32_t _3DCommandOpcode; 5373b8e80941Smrg uint32_t CommandSubType; 5374b8e80941Smrg uint32_t CommandType; 5375b8e80941Smrg uint32_t ConstantBufferSize; 5376b8e80941Smrg uint32_t ConstantBufferOffset; 5377b8e80941Smrg}; 5378b8e80941Smrg 5379b8e80941Smrgstatic inline void 5380b8e80941SmrgGEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__attribute__((unused)) __gen_user_data *data, 5381b8e80941Smrg __attribute__((unused)) void * restrict dst, 5382b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values) 5383b8e80941Smrg{ 5384b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5385b8e80941Smrg 5386b8e80941Smrg dw[0] = 5387b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5388b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5389b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5390b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5391b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5392b8e80941Smrg 5393b8e80941Smrg dw[1] = 5394b8e80941Smrg __gen_uint(values->ConstantBufferSize, 0, 5) | 5395b8e80941Smrg __gen_uint(values->ConstantBufferOffset, 16, 20); 5396b8e80941Smrg} 5397b8e80941Smrg 5398b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2 5399b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 2 5400b8e80941Smrg#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\ 5401b8e80941Smrg .DWordLength = 0, \ 5402b8e80941Smrg ._3DCommandSubOpcode = 18, \ 5403b8e80941Smrg ._3DCommandOpcode = 1, \ 5404b8e80941Smrg .CommandSubType = 3, \ 5405b8e80941Smrg .CommandType = 3 5406b8e80941Smrg 5407b8e80941Smrgstruct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS { 5408b8e80941Smrg uint32_t DWordLength; 5409b8e80941Smrg uint32_t _3DCommandSubOpcode; 5410b8e80941Smrg uint32_t _3DCommandOpcode; 5411b8e80941Smrg uint32_t CommandSubType; 5412b8e80941Smrg uint32_t CommandType; 5413b8e80941Smrg uint32_t ConstantBufferSize; 5414b8e80941Smrg uint32_t ConstantBufferOffset; 5415b8e80941Smrg}; 5416b8e80941Smrg 5417b8e80941Smrgstatic inline void 5418b8e80941SmrgGEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__attribute__((unused)) __gen_user_data *data, 5419b8e80941Smrg __attribute__((unused)) void * restrict dst, 5420b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values) 5421b8e80941Smrg{ 5422b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5423b8e80941Smrg 5424b8e80941Smrg dw[0] = 5425b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5426b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5427b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5428b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5429b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5430b8e80941Smrg 5431b8e80941Smrg dw[1] = 5432b8e80941Smrg __gen_uint(values->ConstantBufferSize, 0, 5) | 5433b8e80941Smrg __gen_uint(values->ConstantBufferOffset, 16, 20); 5434b8e80941Smrg} 5435b8e80941Smrg 5436b8e80941Smrg#define GEN10_3DSTATE_RASTER_length 5 5437b8e80941Smrg#define GEN10_3DSTATE_RASTER_length_bias 2 5438b8e80941Smrg#define GEN10_3DSTATE_RASTER_header \ 5439b8e80941Smrg .DWordLength = 3, \ 5440b8e80941Smrg ._3DCommandSubOpcode = 80, \ 5441b8e80941Smrg ._3DCommandOpcode = 0, \ 5442b8e80941Smrg .CommandSubType = 3, \ 5443b8e80941Smrg .CommandType = 3 5444b8e80941Smrg 5445b8e80941Smrgstruct GEN10_3DSTATE_RASTER { 5446b8e80941Smrg uint32_t DWordLength; 5447b8e80941Smrg uint32_t _3DCommandSubOpcode; 5448b8e80941Smrg uint32_t _3DCommandOpcode; 5449b8e80941Smrg uint32_t CommandSubType; 5450b8e80941Smrg uint32_t CommandType; 5451b8e80941Smrg bool ViewportZNearClipTestEnable; 5452b8e80941Smrg bool ScissorRectangleEnable; 5453b8e80941Smrg bool AntialiasingEnable; 5454b8e80941Smrg uint32_t BackFaceFillMode; 5455b8e80941Smrg#define FILL_MODE_SOLID 0 5456b8e80941Smrg#define FILL_MODE_WIREFRAME 1 5457b8e80941Smrg#define FILL_MODE_POINT 2 5458b8e80941Smrg uint32_t FrontFaceFillMode; 5459b8e80941Smrg#define FILL_MODE_SOLID 0 5460b8e80941Smrg#define FILL_MODE_WIREFRAME 1 5461b8e80941Smrg#define FILL_MODE_POINT 2 5462b8e80941Smrg bool GlobalDepthOffsetEnablePoint; 5463b8e80941Smrg bool GlobalDepthOffsetEnableWireframe; 5464b8e80941Smrg bool GlobalDepthOffsetEnableSolid; 5465b8e80941Smrg uint32_t DXMultisampleRasterizationMode; 5466b8e80941Smrg#define MSRASTMODE_OFF_PIXEL 0 5467b8e80941Smrg#define MSRASTMODE_OFF_PATTERN 1 5468b8e80941Smrg#define MSRASTMODE_ON_PIXEL 2 5469b8e80941Smrg#define MSRASTMODE_ON_PATTERN 3 5470b8e80941Smrg bool DXMultisampleRasterizationEnable; 5471b8e80941Smrg bool SmoothPointEnable; 5472b8e80941Smrg uint32_t ForceMultisampling; 5473b8e80941Smrg uint32_t CullMode; 5474b8e80941Smrg#define CULLMODE_BOTH 0 5475b8e80941Smrg#define CULLMODE_NONE 1 5476b8e80941Smrg#define CULLMODE_FRONT 2 5477b8e80941Smrg#define CULLMODE_BACK 3 5478b8e80941Smrg uint32_t ForcedSampleCount; 5479b8e80941Smrg#define FSC_NUMRASTSAMPLES_0 0 5480b8e80941Smrg#define FSC_NUMRASTSAMPLES_1 1 5481b8e80941Smrg#define FSC_NUMRASTSAMPLES_2 2 5482b8e80941Smrg#define FSC_NUMRASTSAMPLES_4 3 5483b8e80941Smrg#define FSC_NUMRASTSAMPLES_8 4 5484b8e80941Smrg#define FSC_NUMRASTSAMPLES_16 5 5485b8e80941Smrg uint32_t FrontWinding; 5486b8e80941Smrg#define Clockwise 0 5487b8e80941Smrg#define CounterClockwise 1 5488b8e80941Smrg uint32_t APIMode; 5489b8e80941Smrg#define DX9OGL 0 5490b8e80941Smrg#define DX100 1 5491b8e80941Smrg#define DX101 2 5492b8e80941Smrg bool ConservativeRasterizationEnable; 5493b8e80941Smrg bool ViewportZFarClipTestEnable; 5494b8e80941Smrg float GlobalDepthOffsetConstant; 5495b8e80941Smrg float GlobalDepthOffsetScale; 5496b8e80941Smrg float GlobalDepthOffsetClamp; 5497b8e80941Smrg}; 5498b8e80941Smrg 5499b8e80941Smrgstatic inline void 5500b8e80941SmrgGEN10_3DSTATE_RASTER_pack(__attribute__((unused)) __gen_user_data *data, 5501b8e80941Smrg __attribute__((unused)) void * restrict dst, 5502b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_RASTER * restrict values) 5503b8e80941Smrg{ 5504b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5505b8e80941Smrg 5506b8e80941Smrg dw[0] = 5507b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5508b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5509b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5510b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5511b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5512b8e80941Smrg 5513b8e80941Smrg dw[1] = 5514b8e80941Smrg __gen_uint(values->ViewportZNearClipTestEnable, 0, 0) | 5515b8e80941Smrg __gen_uint(values->ScissorRectangleEnable, 1, 1) | 5516b8e80941Smrg __gen_uint(values->AntialiasingEnable, 2, 2) | 5517b8e80941Smrg __gen_uint(values->BackFaceFillMode, 3, 4) | 5518b8e80941Smrg __gen_uint(values->FrontFaceFillMode, 5, 6) | 5519b8e80941Smrg __gen_uint(values->GlobalDepthOffsetEnablePoint, 7, 7) | 5520b8e80941Smrg __gen_uint(values->GlobalDepthOffsetEnableWireframe, 8, 8) | 5521b8e80941Smrg __gen_uint(values->GlobalDepthOffsetEnableSolid, 9, 9) | 5522b8e80941Smrg __gen_uint(values->DXMultisampleRasterizationMode, 10, 11) | 5523b8e80941Smrg __gen_uint(values->DXMultisampleRasterizationEnable, 12, 12) | 5524b8e80941Smrg __gen_uint(values->SmoothPointEnable, 13, 13) | 5525b8e80941Smrg __gen_uint(values->ForceMultisampling, 14, 14) | 5526b8e80941Smrg __gen_uint(values->CullMode, 16, 17) | 5527b8e80941Smrg __gen_uint(values->ForcedSampleCount, 18, 20) | 5528b8e80941Smrg __gen_uint(values->FrontWinding, 21, 21) | 5529b8e80941Smrg __gen_uint(values->APIMode, 22, 23) | 5530b8e80941Smrg __gen_uint(values->ConservativeRasterizationEnable, 24, 24) | 5531b8e80941Smrg __gen_uint(values->ViewportZFarClipTestEnable, 26, 26); 5532b8e80941Smrg 5533b8e80941Smrg dw[2] = 5534b8e80941Smrg __gen_float(values->GlobalDepthOffsetConstant); 5535b8e80941Smrg 5536b8e80941Smrg dw[3] = 5537b8e80941Smrg __gen_float(values->GlobalDepthOffsetScale); 5538b8e80941Smrg 5539b8e80941Smrg dw[4] = 5540b8e80941Smrg __gen_float(values->GlobalDepthOffsetClamp); 5541b8e80941Smrg} 5542b8e80941Smrg 5543b8e80941Smrg#define GEN10_3DSTATE_RS_CONSTANT_POINTER_length 4 5544b8e80941Smrg#define GEN10_3DSTATE_RS_CONSTANT_POINTER_length_bias 2 5545b8e80941Smrg#define GEN10_3DSTATE_RS_CONSTANT_POINTER_header\ 5546b8e80941Smrg .DWordLength = 2, \ 5547b8e80941Smrg ._3DCommandSubOpcode = 84, \ 5548b8e80941Smrg ._3DCommandOpcode = 0, \ 5549b8e80941Smrg .CommandSubType = 3, \ 5550b8e80941Smrg .CommandType = 3 5551b8e80941Smrg 5552b8e80941Smrgstruct GEN10_3DSTATE_RS_CONSTANT_POINTER { 5553b8e80941Smrg uint32_t DWordLength; 5554b8e80941Smrg uint32_t _3DCommandSubOpcode; 5555b8e80941Smrg uint32_t _3DCommandOpcode; 5556b8e80941Smrg uint32_t CommandSubType; 5557b8e80941Smrg uint32_t CommandType; 5558b8e80941Smrg uint32_t OperationLoadorStore; 5559b8e80941Smrg#define RS_Store 0 5560b8e80941Smrg#define RS_Load 1 5561b8e80941Smrg uint32_t ShaderSelect; 5562b8e80941Smrg#define VS 0 5563b8e80941Smrg#define PS 4 5564b8e80941Smrg __gen_address_type GlobalConstantBufferAddress; 5565b8e80941Smrg __gen_address_type GlobalConstantBufferAddressHigh; 5566b8e80941Smrg}; 5567b8e80941Smrg 5568b8e80941Smrgstatic inline void 5569b8e80941SmrgGEN10_3DSTATE_RS_CONSTANT_POINTER_pack(__attribute__((unused)) __gen_user_data *data, 5570b8e80941Smrg __attribute__((unused)) void * restrict dst, 5571b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_RS_CONSTANT_POINTER * restrict values) 5572b8e80941Smrg{ 5573b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5574b8e80941Smrg 5575b8e80941Smrg dw[0] = 5576b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5577b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5578b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5579b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5580b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5581b8e80941Smrg 5582b8e80941Smrg dw[1] = 5583b8e80941Smrg __gen_uint(values->OperationLoadorStore, 12, 12) | 5584b8e80941Smrg __gen_uint(values->ShaderSelect, 28, 30); 5585b8e80941Smrg 5586b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->GlobalConstantBufferAddress, 0); 5587b8e80941Smrg 5588b8e80941Smrg dw[3] = __gen_combine_address(data, &dw[3], values->GlobalConstantBufferAddressHigh, 0); 5589b8e80941Smrg} 5590b8e80941Smrg 5591b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 2 5592b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_header\ 5593b8e80941Smrg ._3DCommandSubOpcode = 2, \ 5594b8e80941Smrg ._3DCommandOpcode = 1, \ 5595b8e80941Smrg .CommandSubType = 3, \ 5596b8e80941Smrg .CommandType = 3 5597b8e80941Smrg 5598b8e80941Smrgstruct GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0 { 5599b8e80941Smrg uint32_t DWordLength; 5600b8e80941Smrg uint32_t _3DCommandSubOpcode; 5601b8e80941Smrg uint32_t _3DCommandOpcode; 5602b8e80941Smrg uint32_t CommandSubType; 5603b8e80941Smrg uint32_t CommandType; 5604b8e80941Smrg /* variable length fields follow */ 5605b8e80941Smrg}; 5606b8e80941Smrg 5607b8e80941Smrgstatic inline void 5608b8e80941SmrgGEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__attribute__((unused)) __gen_user_data *data, 5609b8e80941Smrg __attribute__((unused)) void * restrict dst, 5610b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values) 5611b8e80941Smrg{ 5612b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5613b8e80941Smrg 5614b8e80941Smrg dw[0] = 5615b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5616b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5617b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5618b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5619b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5620b8e80941Smrg} 5621b8e80941Smrg 5622b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 2 5623b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_header\ 5624b8e80941Smrg .DWordLength = 0, \ 5625b8e80941Smrg ._3DCommandSubOpcode = 12, \ 5626b8e80941Smrg ._3DCommandOpcode = 1, \ 5627b8e80941Smrg .CommandSubType = 3, \ 5628b8e80941Smrg .CommandType = 3 5629b8e80941Smrg 5630b8e80941Smrgstruct GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1 { 5631b8e80941Smrg uint32_t DWordLength; 5632b8e80941Smrg uint32_t _3DCommandSubOpcode; 5633b8e80941Smrg uint32_t _3DCommandOpcode; 5634b8e80941Smrg uint32_t CommandSubType; 5635b8e80941Smrg uint32_t CommandType; 5636b8e80941Smrg /* variable length fields follow */ 5637b8e80941Smrg}; 5638b8e80941Smrg 5639b8e80941Smrgstatic inline void 5640b8e80941SmrgGEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__attribute__((unused)) __gen_user_data *data, 5641b8e80941Smrg __attribute__((unused)) void * restrict dst, 5642b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values) 5643b8e80941Smrg{ 5644b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5645b8e80941Smrg 5646b8e80941Smrg dw[0] = 5647b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5648b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5649b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5650b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5651b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5652b8e80941Smrg} 5653b8e80941Smrg 5654b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2 5655b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 2 5656b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\ 5657b8e80941Smrg .DWordLength = 0, \ 5658b8e80941Smrg ._3DCommandSubOpcode = 45, \ 5659b8e80941Smrg ._3DCommandOpcode = 0, \ 5660b8e80941Smrg .CommandSubType = 3, \ 5661b8e80941Smrg .CommandType = 3 5662b8e80941Smrg 5663b8e80941Smrgstruct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS { 5664b8e80941Smrg uint32_t DWordLength; 5665b8e80941Smrg uint32_t _3DCommandSubOpcode; 5666b8e80941Smrg uint32_t _3DCommandOpcode; 5667b8e80941Smrg uint32_t CommandSubType; 5668b8e80941Smrg uint32_t CommandType; 5669b8e80941Smrg uint64_t PointertoDSSamplerState; 5670b8e80941Smrg}; 5671b8e80941Smrg 5672b8e80941Smrgstatic inline void 5673b8e80941SmrgGEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__attribute__((unused)) __gen_user_data *data, 5674b8e80941Smrg __attribute__((unused)) void * restrict dst, 5675b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values) 5676b8e80941Smrg{ 5677b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5678b8e80941Smrg 5679b8e80941Smrg dw[0] = 5680b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5681b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5682b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5683b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5684b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5685b8e80941Smrg 5686b8e80941Smrg dw[1] = 5687b8e80941Smrg __gen_offset(values->PointertoDSSamplerState, 5, 31); 5688b8e80941Smrg} 5689b8e80941Smrg 5690b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2 5691b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 2 5692b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\ 5693b8e80941Smrg .DWordLength = 0, \ 5694b8e80941Smrg ._3DCommandSubOpcode = 46, \ 5695b8e80941Smrg ._3DCommandOpcode = 0, \ 5696b8e80941Smrg .CommandSubType = 3, \ 5697b8e80941Smrg .CommandType = 3 5698b8e80941Smrg 5699b8e80941Smrgstruct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS { 5700b8e80941Smrg uint32_t DWordLength; 5701b8e80941Smrg uint32_t _3DCommandSubOpcode; 5702b8e80941Smrg uint32_t _3DCommandOpcode; 5703b8e80941Smrg uint32_t CommandSubType; 5704b8e80941Smrg uint32_t CommandType; 5705b8e80941Smrg uint64_t PointertoGSSamplerState; 5706b8e80941Smrg}; 5707b8e80941Smrg 5708b8e80941Smrgstatic inline void 5709b8e80941SmrgGEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__attribute__((unused)) __gen_user_data *data, 5710b8e80941Smrg __attribute__((unused)) void * restrict dst, 5711b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values) 5712b8e80941Smrg{ 5713b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5714b8e80941Smrg 5715b8e80941Smrg dw[0] = 5716b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5717b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5718b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5719b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5720b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5721b8e80941Smrg 5722b8e80941Smrg dw[1] = 5723b8e80941Smrg __gen_offset(values->PointertoGSSamplerState, 5, 31); 5724b8e80941Smrg} 5725b8e80941Smrg 5726b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2 5727b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 2 5728b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\ 5729b8e80941Smrg .DWordLength = 0, \ 5730b8e80941Smrg ._3DCommandSubOpcode = 44, \ 5731b8e80941Smrg ._3DCommandOpcode = 0, \ 5732b8e80941Smrg .CommandSubType = 3, \ 5733b8e80941Smrg .CommandType = 3 5734b8e80941Smrg 5735b8e80941Smrgstruct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS { 5736b8e80941Smrg uint32_t DWordLength; 5737b8e80941Smrg uint32_t _3DCommandSubOpcode; 5738b8e80941Smrg uint32_t _3DCommandOpcode; 5739b8e80941Smrg uint32_t CommandSubType; 5740b8e80941Smrg uint32_t CommandType; 5741b8e80941Smrg uint64_t PointertoHSSamplerState; 5742b8e80941Smrg}; 5743b8e80941Smrg 5744b8e80941Smrgstatic inline void 5745b8e80941SmrgGEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__attribute__((unused)) __gen_user_data *data, 5746b8e80941Smrg __attribute__((unused)) void * restrict dst, 5747b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values) 5748b8e80941Smrg{ 5749b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5750b8e80941Smrg 5751b8e80941Smrg dw[0] = 5752b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5753b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5754b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5755b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5756b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5757b8e80941Smrg 5758b8e80941Smrg dw[1] = 5759b8e80941Smrg __gen_offset(values->PointertoHSSamplerState, 5, 31); 5760b8e80941Smrg} 5761b8e80941Smrg 5762b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2 5763b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 2 5764b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\ 5765b8e80941Smrg .DWordLength = 0, \ 5766b8e80941Smrg ._3DCommandSubOpcode = 47, \ 5767b8e80941Smrg ._3DCommandOpcode = 0, \ 5768b8e80941Smrg .CommandSubType = 3, \ 5769b8e80941Smrg .CommandType = 3 5770b8e80941Smrg 5771b8e80941Smrgstruct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS { 5772b8e80941Smrg uint32_t DWordLength; 5773b8e80941Smrg uint32_t _3DCommandSubOpcode; 5774b8e80941Smrg uint32_t _3DCommandOpcode; 5775b8e80941Smrg uint32_t CommandSubType; 5776b8e80941Smrg uint32_t CommandType; 5777b8e80941Smrg uint64_t PointertoPSSamplerState; 5778b8e80941Smrg}; 5779b8e80941Smrg 5780b8e80941Smrgstatic inline void 5781b8e80941SmrgGEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__attribute__((unused)) __gen_user_data *data, 5782b8e80941Smrg __attribute__((unused)) void * restrict dst, 5783b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values) 5784b8e80941Smrg{ 5785b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5786b8e80941Smrg 5787b8e80941Smrg dw[0] = 5788b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5789b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5790b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5791b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5792b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5793b8e80941Smrg 5794b8e80941Smrg dw[1] = 5795b8e80941Smrg __gen_offset(values->PointertoPSSamplerState, 5, 31); 5796b8e80941Smrg} 5797b8e80941Smrg 5798b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2 5799b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 2 5800b8e80941Smrg#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\ 5801b8e80941Smrg .DWordLength = 0, \ 5802b8e80941Smrg ._3DCommandSubOpcode = 43, \ 5803b8e80941Smrg ._3DCommandOpcode = 0, \ 5804b8e80941Smrg .CommandSubType = 3, \ 5805b8e80941Smrg .CommandType = 3 5806b8e80941Smrg 5807b8e80941Smrgstruct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS { 5808b8e80941Smrg uint32_t DWordLength; 5809b8e80941Smrg uint32_t _3DCommandSubOpcode; 5810b8e80941Smrg uint32_t _3DCommandOpcode; 5811b8e80941Smrg uint32_t CommandSubType; 5812b8e80941Smrg uint32_t CommandType; 5813b8e80941Smrg uint64_t PointertoVSSamplerState; 5814b8e80941Smrg}; 5815b8e80941Smrg 5816b8e80941Smrgstatic inline void 5817b8e80941SmrgGEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__attribute__((unused)) __gen_user_data *data, 5818b8e80941Smrg __attribute__((unused)) void * restrict dst, 5819b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values) 5820b8e80941Smrg{ 5821b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5822b8e80941Smrg 5823b8e80941Smrg dw[0] = 5824b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5825b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5826b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5827b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5828b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5829b8e80941Smrg 5830b8e80941Smrg dw[1] = 5831b8e80941Smrg __gen_offset(values->PointertoVSSamplerState, 5, 31); 5832b8e80941Smrg} 5833b8e80941Smrg 5834b8e80941Smrg#define GEN10_3DSTATE_SAMPLE_MASK_length 2 5835b8e80941Smrg#define GEN10_3DSTATE_SAMPLE_MASK_length_bias 2 5836b8e80941Smrg#define GEN10_3DSTATE_SAMPLE_MASK_header \ 5837b8e80941Smrg .DWordLength = 0, \ 5838b8e80941Smrg ._3DCommandSubOpcode = 24, \ 5839b8e80941Smrg ._3DCommandOpcode = 0, \ 5840b8e80941Smrg .CommandSubType = 3, \ 5841b8e80941Smrg .CommandType = 3 5842b8e80941Smrg 5843b8e80941Smrgstruct GEN10_3DSTATE_SAMPLE_MASK { 5844b8e80941Smrg uint32_t DWordLength; 5845b8e80941Smrg uint32_t _3DCommandSubOpcode; 5846b8e80941Smrg uint32_t _3DCommandOpcode; 5847b8e80941Smrg uint32_t CommandSubType; 5848b8e80941Smrg uint32_t CommandType; 5849b8e80941Smrg uint32_t SampleMask; 5850b8e80941Smrg}; 5851b8e80941Smrg 5852b8e80941Smrgstatic inline void 5853b8e80941SmrgGEN10_3DSTATE_SAMPLE_MASK_pack(__attribute__((unused)) __gen_user_data *data, 5854b8e80941Smrg __attribute__((unused)) void * restrict dst, 5855b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLE_MASK * restrict values) 5856b8e80941Smrg{ 5857b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5858b8e80941Smrg 5859b8e80941Smrg dw[0] = 5860b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5861b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5862b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5863b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5864b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5865b8e80941Smrg 5866b8e80941Smrg dw[1] = 5867b8e80941Smrg __gen_uint(values->SampleMask, 0, 15); 5868b8e80941Smrg} 5869b8e80941Smrg 5870b8e80941Smrg#define GEN10_3DSTATE_SAMPLE_PATTERN_length 9 5871b8e80941Smrg#define GEN10_3DSTATE_SAMPLE_PATTERN_length_bias 2 5872b8e80941Smrg#define GEN10_3DSTATE_SAMPLE_PATTERN_header \ 5873b8e80941Smrg .DWordLength = 7, \ 5874b8e80941Smrg ._3DCommandSubOpcode = 28, \ 5875b8e80941Smrg ._3DCommandOpcode = 1, \ 5876b8e80941Smrg .CommandSubType = 3, \ 5877b8e80941Smrg .CommandType = 3 5878b8e80941Smrg 5879b8e80941Smrgstruct GEN10_3DSTATE_SAMPLE_PATTERN { 5880b8e80941Smrg uint32_t DWordLength; 5881b8e80941Smrg uint32_t _3DCommandSubOpcode; 5882b8e80941Smrg uint32_t _3DCommandOpcode; 5883b8e80941Smrg uint32_t CommandSubType; 5884b8e80941Smrg uint32_t CommandType; 5885b8e80941Smrg float _16xSample0YOffset; 5886b8e80941Smrg float _16xSample0XOffset; 5887b8e80941Smrg float _16xSample1YOffset; 5888b8e80941Smrg float _16xSample1XOffset; 5889b8e80941Smrg float _16xSample2YOffset; 5890b8e80941Smrg float _16xSample2XOffset; 5891b8e80941Smrg float _16xSample3YOffset; 5892b8e80941Smrg float _16xSample3XOffset; 5893b8e80941Smrg float _16xSample4YOffset; 5894b8e80941Smrg float _16xSample4XOffset; 5895b8e80941Smrg float _16xSample5YOffset; 5896b8e80941Smrg float _16xSample5XOffset; 5897b8e80941Smrg float _16xSample6YOffset; 5898b8e80941Smrg float _16xSample6XOffset; 5899b8e80941Smrg float _16xSample7YOffset; 5900b8e80941Smrg float _16xSample7XOffset; 5901b8e80941Smrg float _16xSample8YOffset; 5902b8e80941Smrg float _16xSample8XOffset; 5903b8e80941Smrg float _16xSample9YOffset; 5904b8e80941Smrg float _16xSample9XOffset; 5905b8e80941Smrg float _16xSample10YOffset; 5906b8e80941Smrg float _16xSample10XOffset; 5907b8e80941Smrg float _16xSample11YOffset; 5908b8e80941Smrg float _16xSample11XOffset; 5909b8e80941Smrg float _16xSample12YOffset; 5910b8e80941Smrg float _16xSample12XOffset; 5911b8e80941Smrg float _16xSample13YOffset; 5912b8e80941Smrg float _16xSample13XOffset; 5913b8e80941Smrg float _16xSample14YOffset; 5914b8e80941Smrg float _16xSample14XOffset; 5915b8e80941Smrg float _16xSample15YOffset; 5916b8e80941Smrg float _16xSample15XOffset; 5917b8e80941Smrg float _8xSample4YOffset; 5918b8e80941Smrg float _8xSample4XOffset; 5919b8e80941Smrg float _8xSample5YOffset; 5920b8e80941Smrg float _8xSample5XOffset; 5921b8e80941Smrg float _8xSample6YOffset; 5922b8e80941Smrg float _8xSample6XOffset; 5923b8e80941Smrg float _8xSample7YOffset; 5924b8e80941Smrg float _8xSample7XOffset; 5925b8e80941Smrg float _8xSample0YOffset; 5926b8e80941Smrg float _8xSample0XOffset; 5927b8e80941Smrg float _8xSample1YOffset; 5928b8e80941Smrg float _8xSample1XOffset; 5929b8e80941Smrg float _8xSample2YOffset; 5930b8e80941Smrg float _8xSample2XOffset; 5931b8e80941Smrg float _8xSample3YOffset; 5932b8e80941Smrg float _8xSample3XOffset; 5933b8e80941Smrg float _4xSample0YOffset; 5934b8e80941Smrg float _4xSample0XOffset; 5935b8e80941Smrg float _4xSample1YOffset; 5936b8e80941Smrg float _4xSample1XOffset; 5937b8e80941Smrg float _4xSample2YOffset; 5938b8e80941Smrg float _4xSample2XOffset; 5939b8e80941Smrg float _4xSample3YOffset; 5940b8e80941Smrg float _4xSample3XOffset; 5941b8e80941Smrg float _2xSample0YOffset; 5942b8e80941Smrg float _2xSample0XOffset; 5943b8e80941Smrg float _2xSample1YOffset; 5944b8e80941Smrg float _2xSample1XOffset; 5945b8e80941Smrg float _1xSample0YOffset; 5946b8e80941Smrg float _1xSample0XOffset; 5947b8e80941Smrg}; 5948b8e80941Smrg 5949b8e80941Smrgstatic inline void 5950b8e80941SmrgGEN10_3DSTATE_SAMPLE_PATTERN_pack(__attribute__((unused)) __gen_user_data *data, 5951b8e80941Smrg __attribute__((unused)) void * restrict dst, 5952b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLE_PATTERN * restrict values) 5953b8e80941Smrg{ 5954b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 5955b8e80941Smrg 5956b8e80941Smrg dw[0] = 5957b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 5958b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5959b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 5960b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 5961b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 5962b8e80941Smrg 5963b8e80941Smrg dw[1] = 5964b8e80941Smrg __gen_ufixed(values->_16xSample0YOffset, 0, 3, 4) | 5965b8e80941Smrg __gen_ufixed(values->_16xSample0XOffset, 4, 7, 4) | 5966b8e80941Smrg __gen_ufixed(values->_16xSample1YOffset, 8, 11, 4) | 5967b8e80941Smrg __gen_ufixed(values->_16xSample1XOffset, 12, 15, 4) | 5968b8e80941Smrg __gen_ufixed(values->_16xSample2YOffset, 16, 19, 4) | 5969b8e80941Smrg __gen_ufixed(values->_16xSample2XOffset, 20, 23, 4) | 5970b8e80941Smrg __gen_ufixed(values->_16xSample3YOffset, 24, 27, 4) | 5971b8e80941Smrg __gen_ufixed(values->_16xSample3XOffset, 28, 31, 4); 5972b8e80941Smrg 5973b8e80941Smrg dw[2] = 5974b8e80941Smrg __gen_ufixed(values->_16xSample4YOffset, 0, 3, 4) | 5975b8e80941Smrg __gen_ufixed(values->_16xSample4XOffset, 4, 7, 4) | 5976b8e80941Smrg __gen_ufixed(values->_16xSample5YOffset, 8, 11, 4) | 5977b8e80941Smrg __gen_ufixed(values->_16xSample5XOffset, 12, 15, 4) | 5978b8e80941Smrg __gen_ufixed(values->_16xSample6YOffset, 16, 19, 4) | 5979b8e80941Smrg __gen_ufixed(values->_16xSample6XOffset, 20, 23, 4) | 5980b8e80941Smrg __gen_ufixed(values->_16xSample7YOffset, 24, 27, 4) | 5981b8e80941Smrg __gen_ufixed(values->_16xSample7XOffset, 28, 31, 4); 5982b8e80941Smrg 5983b8e80941Smrg dw[3] = 5984b8e80941Smrg __gen_ufixed(values->_16xSample8YOffset, 0, 3, 4) | 5985b8e80941Smrg __gen_ufixed(values->_16xSample8XOffset, 4, 7, 4) | 5986b8e80941Smrg __gen_ufixed(values->_16xSample9YOffset, 8, 11, 4) | 5987b8e80941Smrg __gen_ufixed(values->_16xSample9XOffset, 12, 15, 4) | 5988b8e80941Smrg __gen_ufixed(values->_16xSample10YOffset, 16, 19, 4) | 5989b8e80941Smrg __gen_ufixed(values->_16xSample10XOffset, 20, 23, 4) | 5990b8e80941Smrg __gen_ufixed(values->_16xSample11YOffset, 24, 27, 4) | 5991b8e80941Smrg __gen_ufixed(values->_16xSample11XOffset, 28, 31, 4); 5992b8e80941Smrg 5993b8e80941Smrg dw[4] = 5994b8e80941Smrg __gen_ufixed(values->_16xSample12YOffset, 0, 3, 4) | 5995b8e80941Smrg __gen_ufixed(values->_16xSample12XOffset, 4, 7, 4) | 5996b8e80941Smrg __gen_ufixed(values->_16xSample13YOffset, 8, 11, 4) | 5997b8e80941Smrg __gen_ufixed(values->_16xSample13XOffset, 12, 15, 4) | 5998b8e80941Smrg __gen_ufixed(values->_16xSample14YOffset, 16, 19, 4) | 5999b8e80941Smrg __gen_ufixed(values->_16xSample14XOffset, 20, 23, 4) | 6000b8e80941Smrg __gen_ufixed(values->_16xSample15YOffset, 24, 27, 4) | 6001b8e80941Smrg __gen_ufixed(values->_16xSample15XOffset, 28, 31, 4); 6002b8e80941Smrg 6003b8e80941Smrg dw[5] = 6004b8e80941Smrg __gen_ufixed(values->_8xSample4YOffset, 0, 3, 4) | 6005b8e80941Smrg __gen_ufixed(values->_8xSample4XOffset, 4, 7, 4) | 6006b8e80941Smrg __gen_ufixed(values->_8xSample5YOffset, 8, 11, 4) | 6007b8e80941Smrg __gen_ufixed(values->_8xSample5XOffset, 12, 15, 4) | 6008b8e80941Smrg __gen_ufixed(values->_8xSample6YOffset, 16, 19, 4) | 6009b8e80941Smrg __gen_ufixed(values->_8xSample6XOffset, 20, 23, 4) | 6010b8e80941Smrg __gen_ufixed(values->_8xSample7YOffset, 24, 27, 4) | 6011b8e80941Smrg __gen_ufixed(values->_8xSample7XOffset, 28, 31, 4); 6012b8e80941Smrg 6013b8e80941Smrg dw[6] = 6014b8e80941Smrg __gen_ufixed(values->_8xSample0YOffset, 0, 3, 4) | 6015b8e80941Smrg __gen_ufixed(values->_8xSample0XOffset, 4, 7, 4) | 6016b8e80941Smrg __gen_ufixed(values->_8xSample1YOffset, 8, 11, 4) | 6017b8e80941Smrg __gen_ufixed(values->_8xSample1XOffset, 12, 15, 4) | 6018b8e80941Smrg __gen_ufixed(values->_8xSample2YOffset, 16, 19, 4) | 6019b8e80941Smrg __gen_ufixed(values->_8xSample2XOffset, 20, 23, 4) | 6020b8e80941Smrg __gen_ufixed(values->_8xSample3YOffset, 24, 27, 4) | 6021b8e80941Smrg __gen_ufixed(values->_8xSample3XOffset, 28, 31, 4); 6022b8e80941Smrg 6023b8e80941Smrg dw[7] = 6024b8e80941Smrg __gen_ufixed(values->_4xSample0YOffset, 0, 3, 4) | 6025b8e80941Smrg __gen_ufixed(values->_4xSample0XOffset, 4, 7, 4) | 6026b8e80941Smrg __gen_ufixed(values->_4xSample1YOffset, 8, 11, 4) | 6027b8e80941Smrg __gen_ufixed(values->_4xSample1XOffset, 12, 15, 4) | 6028b8e80941Smrg __gen_ufixed(values->_4xSample2YOffset, 16, 19, 4) | 6029b8e80941Smrg __gen_ufixed(values->_4xSample2XOffset, 20, 23, 4) | 6030b8e80941Smrg __gen_ufixed(values->_4xSample3YOffset, 24, 27, 4) | 6031b8e80941Smrg __gen_ufixed(values->_4xSample3XOffset, 28, 31, 4); 6032b8e80941Smrg 6033b8e80941Smrg dw[8] = 6034b8e80941Smrg __gen_ufixed(values->_2xSample0YOffset, 0, 3, 4) | 6035b8e80941Smrg __gen_ufixed(values->_2xSample0XOffset, 4, 7, 4) | 6036b8e80941Smrg __gen_ufixed(values->_2xSample1YOffset, 8, 11, 4) | 6037b8e80941Smrg __gen_ufixed(values->_2xSample1XOffset, 12, 15, 4) | 6038b8e80941Smrg __gen_ufixed(values->_1xSample0YOffset, 16, 19, 4) | 6039b8e80941Smrg __gen_ufixed(values->_1xSample0XOffset, 20, 23, 4); 6040b8e80941Smrg} 6041b8e80941Smrg 6042b8e80941Smrg#define GEN10_3DSTATE_SBE_length 6 6043b8e80941Smrg#define GEN10_3DSTATE_SBE_length_bias 2 6044b8e80941Smrg#define GEN10_3DSTATE_SBE_header \ 6045b8e80941Smrg .DWordLength = 4, \ 6046b8e80941Smrg ._3DCommandSubOpcode = 31, \ 6047b8e80941Smrg ._3DCommandOpcode = 0, \ 6048b8e80941Smrg .CommandSubType = 3, \ 6049b8e80941Smrg .CommandType = 3 6050b8e80941Smrg 6051b8e80941Smrgstruct GEN10_3DSTATE_SBE { 6052b8e80941Smrg uint32_t DWordLength; 6053b8e80941Smrg uint32_t _3DCommandSubOpcode; 6054b8e80941Smrg uint32_t _3DCommandOpcode; 6055b8e80941Smrg uint32_t CommandSubType; 6056b8e80941Smrg uint32_t CommandType; 6057b8e80941Smrg uint32_t PrimitiveIDOverrideAttributeSelect; 6058b8e80941Smrg uint32_t VertexURBEntryReadOffset; 6059b8e80941Smrg uint32_t VertexURBEntryReadLength; 6060b8e80941Smrg bool PrimitiveIDOverrideComponentX; 6061b8e80941Smrg bool PrimitiveIDOverrideComponentY; 6062b8e80941Smrg bool PrimitiveIDOverrideComponentZ; 6063b8e80941Smrg bool PrimitiveIDOverrideComponentW; 6064b8e80941Smrg uint32_t PointSpriteTextureCoordinateOrigin; 6065b8e80941Smrg#define UPPERLEFT 0 6066b8e80941Smrg#define LOWERLEFT 1 6067b8e80941Smrg bool AttributeSwizzleEnable; 6068b8e80941Smrg uint32_t NumberofSFOutputAttributes; 6069b8e80941Smrg bool ForceVertexURBEntryReadOffset; 6070b8e80941Smrg bool ForceVertexURBEntryReadLength; 6071b8e80941Smrg uint32_t PointSpriteTextureCoordinateEnable; 6072b8e80941Smrg uint32_t ConstantInterpolationEnable; 6073b8e80941Smrg uint32_t AttributeActiveComponentFormat[32]; 6074b8e80941Smrg#define ACTIVE_COMPONENT_DISABLED 0 6075b8e80941Smrg#define ACTIVE_COMPONENT_XY 1 6076b8e80941Smrg#define ACTIVE_COMPONENT_XYZ 2 6077b8e80941Smrg#define ACTIVE_COMPONENT_XYZW 3 6078b8e80941Smrg}; 6079b8e80941Smrg 6080b8e80941Smrgstatic inline void 6081b8e80941SmrgGEN10_3DSTATE_SBE_pack(__attribute__((unused)) __gen_user_data *data, 6082b8e80941Smrg __attribute__((unused)) void * restrict dst, 6083b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SBE * restrict values) 6084b8e80941Smrg{ 6085b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6086b8e80941Smrg 6087b8e80941Smrg dw[0] = 6088b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6089b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6090b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6091b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6092b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6093b8e80941Smrg 6094b8e80941Smrg dw[1] = 6095b8e80941Smrg __gen_uint(values->PrimitiveIDOverrideAttributeSelect, 0, 4) | 6096b8e80941Smrg __gen_uint(values->VertexURBEntryReadOffset, 5, 10) | 6097b8e80941Smrg __gen_uint(values->VertexURBEntryReadLength, 11, 15) | 6098b8e80941Smrg __gen_uint(values->PrimitiveIDOverrideComponentX, 16, 16) | 6099b8e80941Smrg __gen_uint(values->PrimitiveIDOverrideComponentY, 17, 17) | 6100b8e80941Smrg __gen_uint(values->PrimitiveIDOverrideComponentZ, 18, 18) | 6101b8e80941Smrg __gen_uint(values->PrimitiveIDOverrideComponentW, 19, 19) | 6102b8e80941Smrg __gen_uint(values->PointSpriteTextureCoordinateOrigin, 20, 20) | 6103b8e80941Smrg __gen_uint(values->AttributeSwizzleEnable, 21, 21) | 6104b8e80941Smrg __gen_uint(values->NumberofSFOutputAttributes, 22, 27) | 6105b8e80941Smrg __gen_uint(values->ForceVertexURBEntryReadOffset, 28, 28) | 6106b8e80941Smrg __gen_uint(values->ForceVertexURBEntryReadLength, 29, 29); 6107b8e80941Smrg 6108b8e80941Smrg dw[2] = 6109b8e80941Smrg __gen_uint(values->PointSpriteTextureCoordinateEnable, 0, 31); 6110b8e80941Smrg 6111b8e80941Smrg dw[3] = 6112b8e80941Smrg __gen_uint(values->ConstantInterpolationEnable, 0, 31); 6113b8e80941Smrg 6114b8e80941Smrg dw[4] = 6115b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[0], 0, 1) | 6116b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[1], 2, 3) | 6117b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[2], 4, 5) | 6118b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[3], 6, 7) | 6119b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[4], 8, 9) | 6120b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[5], 10, 11) | 6121b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[6], 12, 13) | 6122b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[7], 14, 15) | 6123b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[8], 16, 17) | 6124b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[9], 18, 19) | 6125b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[10], 20, 21) | 6126b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[11], 22, 23) | 6127b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[12], 24, 25) | 6128b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[13], 26, 27) | 6129b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[14], 28, 29) | 6130b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[15], 30, 31); 6131b8e80941Smrg 6132b8e80941Smrg dw[5] = 6133b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[16], 0, 1) | 6134b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[17], 2, 3) | 6135b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[18], 4, 5) | 6136b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[19], 6, 7) | 6137b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[20], 8, 9) | 6138b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[21], 10, 11) | 6139b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[22], 12, 13) | 6140b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[23], 14, 15) | 6141b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[24], 16, 17) | 6142b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[25], 18, 19) | 6143b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[26], 20, 21) | 6144b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[27], 22, 23) | 6145b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[28], 24, 25) | 6146b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[29], 26, 27) | 6147b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[30], 28, 29) | 6148b8e80941Smrg __gen_uint(values->AttributeActiveComponentFormat[31], 30, 31); 6149b8e80941Smrg} 6150b8e80941Smrg 6151b8e80941Smrg#define GEN10_3DSTATE_SBE_SWIZ_length 11 6152b8e80941Smrg#define GEN10_3DSTATE_SBE_SWIZ_length_bias 2 6153b8e80941Smrg#define GEN10_3DSTATE_SBE_SWIZ_header \ 6154b8e80941Smrg .DWordLength = 9, \ 6155b8e80941Smrg ._3DCommandSubOpcode = 81, \ 6156b8e80941Smrg ._3DCommandOpcode = 0, \ 6157b8e80941Smrg .CommandSubType = 3, \ 6158b8e80941Smrg .CommandType = 3 6159b8e80941Smrg 6160b8e80941Smrgstruct GEN10_3DSTATE_SBE_SWIZ { 6161b8e80941Smrg uint32_t DWordLength; 6162b8e80941Smrg uint32_t _3DCommandSubOpcode; 6163b8e80941Smrg uint32_t _3DCommandOpcode; 6164b8e80941Smrg uint32_t CommandSubType; 6165b8e80941Smrg uint32_t CommandType; 6166b8e80941Smrg struct GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute[16]; 6167b8e80941Smrg uint32_t AttributeWrapShortestEnables[16]; 6168b8e80941Smrg}; 6169b8e80941Smrg 6170b8e80941Smrgstatic inline void 6171b8e80941SmrgGEN10_3DSTATE_SBE_SWIZ_pack(__attribute__((unused)) __gen_user_data *data, 6172b8e80941Smrg __attribute__((unused)) void * restrict dst, 6173b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SBE_SWIZ * restrict values) 6174b8e80941Smrg{ 6175b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6176b8e80941Smrg 6177b8e80941Smrg dw[0] = 6178b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6179b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6180b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6181b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6182b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6183b8e80941Smrg 6184b8e80941Smrg uint32_t v1_0; 6185b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v1_0, &values->Attribute[0]); 6186b8e80941Smrg 6187b8e80941Smrg uint32_t v1_1; 6188b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v1_1, &values->Attribute[1]); 6189b8e80941Smrg 6190b8e80941Smrg dw[1] = 6191b8e80941Smrg __gen_uint(v1_0, 0, 15) | 6192b8e80941Smrg __gen_uint(v1_1, 16, 31); 6193b8e80941Smrg 6194b8e80941Smrg uint32_t v2_0; 6195b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v2_0, &values->Attribute[2]); 6196b8e80941Smrg 6197b8e80941Smrg uint32_t v2_1; 6198b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v2_1, &values->Attribute[3]); 6199b8e80941Smrg 6200b8e80941Smrg dw[2] = 6201b8e80941Smrg __gen_uint(v2_0, 0, 15) | 6202b8e80941Smrg __gen_uint(v2_1, 16, 31); 6203b8e80941Smrg 6204b8e80941Smrg uint32_t v3_0; 6205b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v3_0, &values->Attribute[4]); 6206b8e80941Smrg 6207b8e80941Smrg uint32_t v3_1; 6208b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v3_1, &values->Attribute[5]); 6209b8e80941Smrg 6210b8e80941Smrg dw[3] = 6211b8e80941Smrg __gen_uint(v3_0, 0, 15) | 6212b8e80941Smrg __gen_uint(v3_1, 16, 31); 6213b8e80941Smrg 6214b8e80941Smrg uint32_t v4_0; 6215b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v4_0, &values->Attribute[6]); 6216b8e80941Smrg 6217b8e80941Smrg uint32_t v4_1; 6218b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v4_1, &values->Attribute[7]); 6219b8e80941Smrg 6220b8e80941Smrg dw[4] = 6221b8e80941Smrg __gen_uint(v4_0, 0, 15) | 6222b8e80941Smrg __gen_uint(v4_1, 16, 31); 6223b8e80941Smrg 6224b8e80941Smrg uint32_t v5_0; 6225b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v5_0, &values->Attribute[8]); 6226b8e80941Smrg 6227b8e80941Smrg uint32_t v5_1; 6228b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v5_1, &values->Attribute[9]); 6229b8e80941Smrg 6230b8e80941Smrg dw[5] = 6231b8e80941Smrg __gen_uint(v5_0, 0, 15) | 6232b8e80941Smrg __gen_uint(v5_1, 16, 31); 6233b8e80941Smrg 6234b8e80941Smrg uint32_t v6_0; 6235b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v6_0, &values->Attribute[10]); 6236b8e80941Smrg 6237b8e80941Smrg uint32_t v6_1; 6238b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v6_1, &values->Attribute[11]); 6239b8e80941Smrg 6240b8e80941Smrg dw[6] = 6241b8e80941Smrg __gen_uint(v6_0, 0, 15) | 6242b8e80941Smrg __gen_uint(v6_1, 16, 31); 6243b8e80941Smrg 6244b8e80941Smrg uint32_t v7_0; 6245b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v7_0, &values->Attribute[12]); 6246b8e80941Smrg 6247b8e80941Smrg uint32_t v7_1; 6248b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v7_1, &values->Attribute[13]); 6249b8e80941Smrg 6250b8e80941Smrg dw[7] = 6251b8e80941Smrg __gen_uint(v7_0, 0, 15) | 6252b8e80941Smrg __gen_uint(v7_1, 16, 31); 6253b8e80941Smrg 6254b8e80941Smrg uint32_t v8_0; 6255b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v8_0, &values->Attribute[14]); 6256b8e80941Smrg 6257b8e80941Smrg uint32_t v8_1; 6258b8e80941Smrg GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v8_1, &values->Attribute[15]); 6259b8e80941Smrg 6260b8e80941Smrg dw[8] = 6261b8e80941Smrg __gen_uint(v8_0, 0, 15) | 6262b8e80941Smrg __gen_uint(v8_1, 16, 31); 6263b8e80941Smrg 6264b8e80941Smrg dw[9] = 6265b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[0], 0, 3) | 6266b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[1], 4, 7) | 6267b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[2], 8, 11) | 6268b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[3], 12, 15) | 6269b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[4], 16, 19) | 6270b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[5], 20, 23) | 6271b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[6], 24, 27) | 6272b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[7], 28, 31); 6273b8e80941Smrg 6274b8e80941Smrg dw[10] = 6275b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[8], 0, 3) | 6276b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[9], 4, 7) | 6277b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[10], 8, 11) | 6278b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[11], 12, 15) | 6279b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[12], 16, 19) | 6280b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[13], 20, 23) | 6281b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[14], 24, 27) | 6282b8e80941Smrg __gen_uint(values->AttributeWrapShortestEnables[15], 28, 31); 6283b8e80941Smrg} 6284b8e80941Smrg 6285b8e80941Smrg#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_length 2 6286b8e80941Smrg#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 2 6287b8e80941Smrg#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_header\ 6288b8e80941Smrg .DWordLength = 0, \ 6289b8e80941Smrg ._3DCommandSubOpcode = 15, \ 6290b8e80941Smrg ._3DCommandOpcode = 0, \ 6291b8e80941Smrg .CommandSubType = 3, \ 6292b8e80941Smrg .CommandType = 3 6293b8e80941Smrg 6294b8e80941Smrgstruct GEN10_3DSTATE_SCISSOR_STATE_POINTERS { 6295b8e80941Smrg uint32_t DWordLength; 6296b8e80941Smrg uint32_t _3DCommandSubOpcode; 6297b8e80941Smrg uint32_t _3DCommandOpcode; 6298b8e80941Smrg uint32_t CommandSubType; 6299b8e80941Smrg uint32_t CommandType; 6300b8e80941Smrg uint64_t ScissorRectPointer; 6301b8e80941Smrg}; 6302b8e80941Smrg 6303b8e80941Smrgstatic inline void 6304b8e80941SmrgGEN10_3DSTATE_SCISSOR_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 6305b8e80941Smrg __attribute__((unused)) void * restrict dst, 6306b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SCISSOR_STATE_POINTERS * restrict values) 6307b8e80941Smrg{ 6308b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6309b8e80941Smrg 6310b8e80941Smrg dw[0] = 6311b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6312b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6313b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6314b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6315b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6316b8e80941Smrg 6317b8e80941Smrg dw[1] = 6318b8e80941Smrg __gen_offset(values->ScissorRectPointer, 5, 31); 6319b8e80941Smrg} 6320b8e80941Smrg 6321b8e80941Smrg#define GEN10_3DSTATE_SF_length 4 6322b8e80941Smrg#define GEN10_3DSTATE_SF_length_bias 2 6323b8e80941Smrg#define GEN10_3DSTATE_SF_header \ 6324b8e80941Smrg .DWordLength = 2, \ 6325b8e80941Smrg ._3DCommandSubOpcode = 19, \ 6326b8e80941Smrg ._3DCommandOpcode = 0, \ 6327b8e80941Smrg .CommandSubType = 3, \ 6328b8e80941Smrg .CommandType = 3 6329b8e80941Smrg 6330b8e80941Smrgstruct GEN10_3DSTATE_SF { 6331b8e80941Smrg uint32_t DWordLength; 6332b8e80941Smrg uint32_t _3DCommandSubOpcode; 6333b8e80941Smrg uint32_t _3DCommandOpcode; 6334b8e80941Smrg uint32_t CommandSubType; 6335b8e80941Smrg uint32_t CommandType; 6336b8e80941Smrg bool ViewportTransformEnable; 6337b8e80941Smrg bool StatisticsEnable; 6338b8e80941Smrg bool LegacyGlobalDepthBiasEnable; 6339b8e80941Smrg float LineWidth; 6340b8e80941Smrg uint32_t LineEndCapAntialiasingRegionWidth; 6341b8e80941Smrg#define _05pixels 0 6342b8e80941Smrg#define _10pixels 1 6343b8e80941Smrg#define _20pixels 2 6344b8e80941Smrg#define _40pixels 3 6345b8e80941Smrg float PointWidth; 6346b8e80941Smrg uint32_t PointWidthSource; 6347b8e80941Smrg#define Vertex 0 6348b8e80941Smrg#define State 1 6349b8e80941Smrg uint32_t VertexSubPixelPrecisionSelect; 6350b8e80941Smrg#define _8Bit 0 6351b8e80941Smrg#define _4Bit 1 6352b8e80941Smrg bool SmoothPointEnable; 6353b8e80941Smrg uint32_t AALineDistanceMode; 6354b8e80941Smrg#define AALINEDISTANCE_TRUE 1 6355b8e80941Smrg uint32_t TriangleFanProvokingVertexSelect; 6356b8e80941Smrg uint32_t LineStripListProvokingVertexSelect; 6357b8e80941Smrg uint32_t TriangleStripListProvokingVertexSelect; 6358b8e80941Smrg bool LastPixelEnable; 6359b8e80941Smrg}; 6360b8e80941Smrg 6361b8e80941Smrgstatic inline void 6362b8e80941SmrgGEN10_3DSTATE_SF_pack(__attribute__((unused)) __gen_user_data *data, 6363b8e80941Smrg __attribute__((unused)) void * restrict dst, 6364b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SF * restrict values) 6365b8e80941Smrg{ 6366b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6367b8e80941Smrg 6368b8e80941Smrg dw[0] = 6369b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6370b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6371b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6372b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6373b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6374b8e80941Smrg 6375b8e80941Smrg dw[1] = 6376b8e80941Smrg __gen_uint(values->ViewportTransformEnable, 1, 1) | 6377b8e80941Smrg __gen_uint(values->StatisticsEnable, 10, 10) | 6378b8e80941Smrg __gen_uint(values->LegacyGlobalDepthBiasEnable, 11, 11) | 6379b8e80941Smrg __gen_ufixed(values->LineWidth, 12, 29, 7); 6380b8e80941Smrg 6381b8e80941Smrg dw[2] = 6382b8e80941Smrg __gen_uint(values->LineEndCapAntialiasingRegionWidth, 16, 17); 6383b8e80941Smrg 6384b8e80941Smrg dw[3] = 6385b8e80941Smrg __gen_ufixed(values->PointWidth, 0, 10, 3) | 6386b8e80941Smrg __gen_uint(values->PointWidthSource, 11, 11) | 6387b8e80941Smrg __gen_uint(values->VertexSubPixelPrecisionSelect, 12, 12) | 6388b8e80941Smrg __gen_uint(values->SmoothPointEnable, 13, 13) | 6389b8e80941Smrg __gen_uint(values->AALineDistanceMode, 14, 14) | 6390b8e80941Smrg __gen_uint(values->TriangleFanProvokingVertexSelect, 25, 26) | 6391b8e80941Smrg __gen_uint(values->LineStripListProvokingVertexSelect, 27, 28) | 6392b8e80941Smrg __gen_uint(values->TriangleStripListProvokingVertexSelect, 29, 30) | 6393b8e80941Smrg __gen_uint(values->LastPixelEnable, 31, 31); 6394b8e80941Smrg} 6395b8e80941Smrg 6396b8e80941Smrg#define GEN10_3DSTATE_SO_BUFFER_length 8 6397b8e80941Smrg#define GEN10_3DSTATE_SO_BUFFER_length_bias 2 6398b8e80941Smrg#define GEN10_3DSTATE_SO_BUFFER_header \ 6399b8e80941Smrg .DWordLength = 6, \ 6400b8e80941Smrg ._3DCommandSubOpcode = 24, \ 6401b8e80941Smrg ._3DCommandOpcode = 1, \ 6402b8e80941Smrg .CommandSubType = 3, \ 6403b8e80941Smrg .CommandType = 3 6404b8e80941Smrg 6405b8e80941Smrgstruct GEN10_3DSTATE_SO_BUFFER { 6406b8e80941Smrg uint32_t DWordLength; 6407b8e80941Smrg uint32_t _3DCommandSubOpcode; 6408b8e80941Smrg uint32_t _3DCommandOpcode; 6409b8e80941Smrg uint32_t CommandSubType; 6410b8e80941Smrg uint32_t CommandType; 6411b8e80941Smrg bool StreamOutputBufferOffsetAddressEnable; 6412b8e80941Smrg bool StreamOffsetWriteEnable; 6413b8e80941Smrg uint32_t MOCS; 6414b8e80941Smrg uint32_t SOBufferIndex; 6415b8e80941Smrg bool SOBufferEnable; 6416b8e80941Smrg __gen_address_type SurfaceBaseAddress; 6417b8e80941Smrg uint32_t SurfaceSize; 6418b8e80941Smrg __gen_address_type StreamOutputBufferOffsetAddress; 6419b8e80941Smrg uint32_t StreamOffset; 6420b8e80941Smrg}; 6421b8e80941Smrg 6422b8e80941Smrgstatic inline void 6423b8e80941SmrgGEN10_3DSTATE_SO_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 6424b8e80941Smrg __attribute__((unused)) void * restrict dst, 6425b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SO_BUFFER * restrict values) 6426b8e80941Smrg{ 6427b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6428b8e80941Smrg 6429b8e80941Smrg dw[0] = 6430b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6431b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6432b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6433b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6434b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6435b8e80941Smrg 6436b8e80941Smrg dw[1] = 6437b8e80941Smrg __gen_uint(values->StreamOutputBufferOffsetAddressEnable, 20, 20) | 6438b8e80941Smrg __gen_uint(values->StreamOffsetWriteEnable, 21, 21) | 6439b8e80941Smrg __gen_uint(values->MOCS, 22, 28) | 6440b8e80941Smrg __gen_uint(values->SOBufferIndex, 29, 30) | 6441b8e80941Smrg __gen_uint(values->SOBufferEnable, 31, 31); 6442b8e80941Smrg 6443b8e80941Smrg const uint64_t v2_address = 6444b8e80941Smrg __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 6445b8e80941Smrg dw[2] = v2_address; 6446b8e80941Smrg dw[3] = v2_address >> 32; 6447b8e80941Smrg 6448b8e80941Smrg dw[4] = 6449b8e80941Smrg __gen_uint(values->SurfaceSize, 0, 29); 6450b8e80941Smrg 6451b8e80941Smrg const uint64_t v5_address = 6452b8e80941Smrg __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, 0); 6453b8e80941Smrg dw[5] = v5_address; 6454b8e80941Smrg dw[6] = v5_address >> 32; 6455b8e80941Smrg 6456b8e80941Smrg dw[7] = 6457b8e80941Smrg __gen_uint(values->StreamOffset, 0, 31); 6458b8e80941Smrg} 6459b8e80941Smrg 6460b8e80941Smrg#define GEN10_3DSTATE_SO_DECL_LIST_length_bias 2 6461b8e80941Smrg#define GEN10_3DSTATE_SO_DECL_LIST_header \ 6462b8e80941Smrg ._3DCommandSubOpcode = 23, \ 6463b8e80941Smrg ._3DCommandOpcode = 1, \ 6464b8e80941Smrg .CommandSubType = 3, \ 6465b8e80941Smrg .CommandType = 3 6466b8e80941Smrg 6467b8e80941Smrgstruct GEN10_3DSTATE_SO_DECL_LIST { 6468b8e80941Smrg uint32_t DWordLength; 6469b8e80941Smrg uint32_t _3DCommandSubOpcode; 6470b8e80941Smrg uint32_t _3DCommandOpcode; 6471b8e80941Smrg uint32_t CommandSubType; 6472b8e80941Smrg uint32_t CommandType; 6473b8e80941Smrg uint32_t StreamtoBufferSelects0; 6474b8e80941Smrg uint32_t StreamtoBufferSelects1; 6475b8e80941Smrg uint32_t StreamtoBufferSelects2; 6476b8e80941Smrg uint32_t StreamtoBufferSelects3; 6477b8e80941Smrg uint32_t NumEntries0; 6478b8e80941Smrg uint32_t NumEntries1; 6479b8e80941Smrg uint32_t NumEntries2; 6480b8e80941Smrg uint32_t NumEntries3; 6481b8e80941Smrg /* variable length fields follow */ 6482b8e80941Smrg}; 6483b8e80941Smrg 6484b8e80941Smrgstatic inline void 6485b8e80941SmrgGEN10_3DSTATE_SO_DECL_LIST_pack(__attribute__((unused)) __gen_user_data *data, 6486b8e80941Smrg __attribute__((unused)) void * restrict dst, 6487b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_SO_DECL_LIST * restrict values) 6488b8e80941Smrg{ 6489b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6490b8e80941Smrg 6491b8e80941Smrg dw[0] = 6492b8e80941Smrg __gen_uint(values->DWordLength, 0, 8) | 6493b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6494b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6495b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6496b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6497b8e80941Smrg 6498b8e80941Smrg dw[1] = 6499b8e80941Smrg __gen_uint(values->StreamtoBufferSelects0, 0, 3) | 6500b8e80941Smrg __gen_uint(values->StreamtoBufferSelects1, 4, 7) | 6501b8e80941Smrg __gen_uint(values->StreamtoBufferSelects2, 8, 11) | 6502b8e80941Smrg __gen_uint(values->StreamtoBufferSelects3, 12, 15); 6503b8e80941Smrg 6504b8e80941Smrg dw[2] = 6505b8e80941Smrg __gen_uint(values->NumEntries0, 0, 7) | 6506b8e80941Smrg __gen_uint(values->NumEntries1, 8, 15) | 6507b8e80941Smrg __gen_uint(values->NumEntries2, 16, 23) | 6508b8e80941Smrg __gen_uint(values->NumEntries3, 24, 31); 6509b8e80941Smrg} 6510b8e80941Smrg 6511b8e80941Smrg#define GEN10_3DSTATE_STENCIL_BUFFER_length 5 6512b8e80941Smrg#define GEN10_3DSTATE_STENCIL_BUFFER_length_bias 2 6513b8e80941Smrg#define GEN10_3DSTATE_STENCIL_BUFFER_header \ 6514b8e80941Smrg .DWordLength = 3, \ 6515b8e80941Smrg ._3DCommandSubOpcode = 6, \ 6516b8e80941Smrg ._3DCommandOpcode = 0, \ 6517b8e80941Smrg .CommandSubType = 3, \ 6518b8e80941Smrg .CommandType = 3 6519b8e80941Smrg 6520b8e80941Smrgstruct GEN10_3DSTATE_STENCIL_BUFFER { 6521b8e80941Smrg uint32_t DWordLength; 6522b8e80941Smrg uint32_t _3DCommandSubOpcode; 6523b8e80941Smrg uint32_t _3DCommandOpcode; 6524b8e80941Smrg uint32_t CommandSubType; 6525b8e80941Smrg uint32_t CommandType; 6526b8e80941Smrg uint32_t SurfacePitch; 6527b8e80941Smrg uint32_t MOCS; 6528b8e80941Smrg bool StencilBufferEnable; 6529b8e80941Smrg __gen_address_type SurfaceBaseAddress; 6530b8e80941Smrg uint32_t SurfaceQPitch; 6531b8e80941Smrg}; 6532b8e80941Smrg 6533b8e80941Smrgstatic inline void 6534b8e80941SmrgGEN10_3DSTATE_STENCIL_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 6535b8e80941Smrg __attribute__((unused)) void * restrict dst, 6536b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_STENCIL_BUFFER * restrict values) 6537b8e80941Smrg{ 6538b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6539b8e80941Smrg 6540b8e80941Smrg dw[0] = 6541b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6542b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6543b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6544b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6545b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6546b8e80941Smrg 6547b8e80941Smrg dw[1] = 6548b8e80941Smrg __gen_uint(values->SurfacePitch, 0, 16) | 6549b8e80941Smrg __gen_uint(values->MOCS, 22, 28) | 6550b8e80941Smrg __gen_uint(values->StencilBufferEnable, 31, 31); 6551b8e80941Smrg 6552b8e80941Smrg const uint64_t v2_address = 6553b8e80941Smrg __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 6554b8e80941Smrg dw[2] = v2_address; 6555b8e80941Smrg dw[3] = v2_address >> 32; 6556b8e80941Smrg 6557b8e80941Smrg dw[4] = 6558b8e80941Smrg __gen_uint(values->SurfaceQPitch, 0, 14); 6559b8e80941Smrg} 6560b8e80941Smrg 6561b8e80941Smrg#define GEN10_3DSTATE_STREAMOUT_length 5 6562b8e80941Smrg#define GEN10_3DSTATE_STREAMOUT_length_bias 2 6563b8e80941Smrg#define GEN10_3DSTATE_STREAMOUT_header \ 6564b8e80941Smrg .DWordLength = 3, \ 6565b8e80941Smrg ._3DCommandSubOpcode = 30, \ 6566b8e80941Smrg ._3DCommandOpcode = 0, \ 6567b8e80941Smrg .CommandSubType = 3, \ 6568b8e80941Smrg .CommandType = 3 6569b8e80941Smrg 6570b8e80941Smrgstruct GEN10_3DSTATE_STREAMOUT { 6571b8e80941Smrg uint32_t DWordLength; 6572b8e80941Smrg uint32_t _3DCommandSubOpcode; 6573b8e80941Smrg uint32_t _3DCommandOpcode; 6574b8e80941Smrg uint32_t CommandSubType; 6575b8e80941Smrg uint32_t CommandType; 6576b8e80941Smrg uint32_t ForceRendering; 6577b8e80941Smrg#define Resreved 1 6578b8e80941Smrg#define Force_Off 2 6579b8e80941Smrg#define Force_on 3 6580b8e80941Smrg bool SOStatisticsEnable; 6581b8e80941Smrg uint32_t ReorderMode; 6582b8e80941Smrg#define LEADING 0 6583b8e80941Smrg#define TRAILING 1 6584b8e80941Smrg uint32_t RenderStreamSelect; 6585b8e80941Smrg bool RenderingDisable; 6586b8e80941Smrg bool SOFunctionEnable; 6587b8e80941Smrg uint32_t Stream0VertexReadLength; 6588b8e80941Smrg uint32_t Stream0VertexReadOffset; 6589b8e80941Smrg uint32_t Stream1VertexReadLength; 6590b8e80941Smrg uint32_t Stream1VertexReadOffset; 6591b8e80941Smrg uint32_t Stream2VertexReadLength; 6592b8e80941Smrg uint32_t Stream2VertexReadOffset; 6593b8e80941Smrg uint32_t Stream3VertexReadLength; 6594b8e80941Smrg uint32_t Stream3VertexReadOffset; 6595b8e80941Smrg uint32_t Buffer0SurfacePitch; 6596b8e80941Smrg uint32_t Buffer1SurfacePitch; 6597b8e80941Smrg uint32_t Buffer2SurfacePitch; 6598b8e80941Smrg uint32_t Buffer3SurfacePitch; 6599b8e80941Smrg}; 6600b8e80941Smrg 6601b8e80941Smrgstatic inline void 6602b8e80941SmrgGEN10_3DSTATE_STREAMOUT_pack(__attribute__((unused)) __gen_user_data *data, 6603b8e80941Smrg __attribute__((unused)) void * restrict dst, 6604b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_STREAMOUT * restrict values) 6605b8e80941Smrg{ 6606b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6607b8e80941Smrg 6608b8e80941Smrg dw[0] = 6609b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6610b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6611b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6612b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6613b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6614b8e80941Smrg 6615b8e80941Smrg dw[1] = 6616b8e80941Smrg __gen_uint(values->ForceRendering, 23, 24) | 6617b8e80941Smrg __gen_uint(values->SOStatisticsEnable, 25, 25) | 6618b8e80941Smrg __gen_uint(values->ReorderMode, 26, 26) | 6619b8e80941Smrg __gen_uint(values->RenderStreamSelect, 27, 28) | 6620b8e80941Smrg __gen_uint(values->RenderingDisable, 30, 30) | 6621b8e80941Smrg __gen_uint(values->SOFunctionEnable, 31, 31); 6622b8e80941Smrg 6623b8e80941Smrg dw[2] = 6624b8e80941Smrg __gen_uint(values->Stream0VertexReadLength, 0, 4) | 6625b8e80941Smrg __gen_uint(values->Stream0VertexReadOffset, 5, 5) | 6626b8e80941Smrg __gen_uint(values->Stream1VertexReadLength, 8, 12) | 6627b8e80941Smrg __gen_uint(values->Stream1VertexReadOffset, 13, 13) | 6628b8e80941Smrg __gen_uint(values->Stream2VertexReadLength, 16, 20) | 6629b8e80941Smrg __gen_uint(values->Stream2VertexReadOffset, 21, 21) | 6630b8e80941Smrg __gen_uint(values->Stream3VertexReadLength, 24, 28) | 6631b8e80941Smrg __gen_uint(values->Stream3VertexReadOffset, 29, 29); 6632b8e80941Smrg 6633b8e80941Smrg dw[3] = 6634b8e80941Smrg __gen_uint(values->Buffer0SurfacePitch, 0, 11) | 6635b8e80941Smrg __gen_uint(values->Buffer1SurfacePitch, 16, 27); 6636b8e80941Smrg 6637b8e80941Smrg dw[4] = 6638b8e80941Smrg __gen_uint(values->Buffer2SurfacePitch, 0, 11) | 6639b8e80941Smrg __gen_uint(values->Buffer3SurfacePitch, 16, 27); 6640b8e80941Smrg} 6641b8e80941Smrg 6642b8e80941Smrg#define GEN10_3DSTATE_TE_length 4 6643b8e80941Smrg#define GEN10_3DSTATE_TE_length_bias 2 6644b8e80941Smrg#define GEN10_3DSTATE_TE_header \ 6645b8e80941Smrg .DWordLength = 2, \ 6646b8e80941Smrg ._3DCommandSubOpcode = 28, \ 6647b8e80941Smrg ._3DCommandOpcode = 0, \ 6648b8e80941Smrg .CommandSubType = 3, \ 6649b8e80941Smrg .CommandType = 3 6650b8e80941Smrg 6651b8e80941Smrgstruct GEN10_3DSTATE_TE { 6652b8e80941Smrg uint32_t DWordLength; 6653b8e80941Smrg uint32_t _3DCommandSubOpcode; 6654b8e80941Smrg uint32_t _3DCommandOpcode; 6655b8e80941Smrg uint32_t CommandSubType; 6656b8e80941Smrg uint32_t CommandType; 6657b8e80941Smrg bool TEEnable; 6658b8e80941Smrg uint32_t TEMode; 6659b8e80941Smrg#define HW_TESS 0 6660b8e80941Smrg uint32_t TEDomain; 6661b8e80941Smrg#define QUAD 0 6662b8e80941Smrg#define TRI 1 6663b8e80941Smrg#define ISOLINE 2 6664b8e80941Smrg uint32_t OutputTopology; 6665b8e80941Smrg#define OUTPUT_POINT 0 6666b8e80941Smrg#define OUTPUT_LINE 1 6667b8e80941Smrg#define OUTPUT_TRI_CW 2 6668b8e80941Smrg#define OUTPUT_TRI_CCW 3 6669b8e80941Smrg uint32_t Partitioning; 6670b8e80941Smrg#define INTEGER 0 6671b8e80941Smrg#define ODD_FRACTIONAL 1 6672b8e80941Smrg#define EVEN_FRACTIONAL 2 6673b8e80941Smrg float MaximumTessellationFactorOdd; 6674b8e80941Smrg float MaximumTessellationFactorNotOdd; 6675b8e80941Smrg}; 6676b8e80941Smrg 6677b8e80941Smrgstatic inline void 6678b8e80941SmrgGEN10_3DSTATE_TE_pack(__attribute__((unused)) __gen_user_data *data, 6679b8e80941Smrg __attribute__((unused)) void * restrict dst, 6680b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_TE * restrict values) 6681b8e80941Smrg{ 6682b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6683b8e80941Smrg 6684b8e80941Smrg dw[0] = 6685b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6686b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6687b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6688b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6689b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6690b8e80941Smrg 6691b8e80941Smrg dw[1] = 6692b8e80941Smrg __gen_uint(values->TEEnable, 0, 0) | 6693b8e80941Smrg __gen_uint(values->TEMode, 1, 2) | 6694b8e80941Smrg __gen_uint(values->TEDomain, 4, 5) | 6695b8e80941Smrg __gen_uint(values->OutputTopology, 8, 9) | 6696b8e80941Smrg __gen_uint(values->Partitioning, 12, 13); 6697b8e80941Smrg 6698b8e80941Smrg dw[2] = 6699b8e80941Smrg __gen_float(values->MaximumTessellationFactorOdd); 6700b8e80941Smrg 6701b8e80941Smrg dw[3] = 6702b8e80941Smrg __gen_float(values->MaximumTessellationFactorNotOdd); 6703b8e80941Smrg} 6704b8e80941Smrg 6705b8e80941Smrg#define GEN10_3DSTATE_URB_CLEAR_length 2 6706b8e80941Smrg#define GEN10_3DSTATE_URB_CLEAR_length_bias 2 6707b8e80941Smrg#define GEN10_3DSTATE_URB_CLEAR_header \ 6708b8e80941Smrg .DWordLength = 0, \ 6709b8e80941Smrg ._3DCommandSubOpcode = 29, \ 6710b8e80941Smrg ._3DCommandOpcode = 1, \ 6711b8e80941Smrg .CommandSubType = 3, \ 6712b8e80941Smrg .CommandType = 3 6713b8e80941Smrg 6714b8e80941Smrgstruct GEN10_3DSTATE_URB_CLEAR { 6715b8e80941Smrg uint32_t DWordLength; 6716b8e80941Smrg uint32_t _3DCommandSubOpcode; 6717b8e80941Smrg uint32_t _3DCommandOpcode; 6718b8e80941Smrg uint32_t CommandSubType; 6719b8e80941Smrg uint32_t CommandType; 6720b8e80941Smrg uint64_t URBAddress; 6721b8e80941Smrg uint32_t URBClearLength; 6722b8e80941Smrg}; 6723b8e80941Smrg 6724b8e80941Smrgstatic inline void 6725b8e80941SmrgGEN10_3DSTATE_URB_CLEAR_pack(__attribute__((unused)) __gen_user_data *data, 6726b8e80941Smrg __attribute__((unused)) void * restrict dst, 6727b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_URB_CLEAR * restrict values) 6728b8e80941Smrg{ 6729b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6730b8e80941Smrg 6731b8e80941Smrg dw[0] = 6732b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6733b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6734b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6735b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6736b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6737b8e80941Smrg 6738b8e80941Smrg dw[1] = 6739b8e80941Smrg __gen_offset(values->URBAddress, 0, 14) | 6740b8e80941Smrg __gen_uint(values->URBClearLength, 16, 29); 6741b8e80941Smrg} 6742b8e80941Smrg 6743b8e80941Smrg#define GEN10_3DSTATE_URB_DS_length 2 6744b8e80941Smrg#define GEN10_3DSTATE_URB_DS_length_bias 2 6745b8e80941Smrg#define GEN10_3DSTATE_URB_DS_header \ 6746b8e80941Smrg .DWordLength = 0, \ 6747b8e80941Smrg ._3DCommandSubOpcode = 50, \ 6748b8e80941Smrg ._3DCommandOpcode = 0, \ 6749b8e80941Smrg .CommandSubType = 3, \ 6750b8e80941Smrg .CommandType = 3 6751b8e80941Smrg 6752b8e80941Smrgstruct GEN10_3DSTATE_URB_DS { 6753b8e80941Smrg uint32_t DWordLength; 6754b8e80941Smrg uint32_t _3DCommandSubOpcode; 6755b8e80941Smrg uint32_t _3DCommandOpcode; 6756b8e80941Smrg uint32_t CommandSubType; 6757b8e80941Smrg uint32_t CommandType; 6758b8e80941Smrg uint32_t DSNumberofURBEntries; 6759b8e80941Smrg uint32_t DSURBEntryAllocationSize; 6760b8e80941Smrg uint32_t DSURBStartingAddress; 6761b8e80941Smrg}; 6762b8e80941Smrg 6763b8e80941Smrgstatic inline void 6764b8e80941SmrgGEN10_3DSTATE_URB_DS_pack(__attribute__((unused)) __gen_user_data *data, 6765b8e80941Smrg __attribute__((unused)) void * restrict dst, 6766b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_URB_DS * restrict values) 6767b8e80941Smrg{ 6768b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6769b8e80941Smrg 6770b8e80941Smrg dw[0] = 6771b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6772b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6773b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6774b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6775b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6776b8e80941Smrg 6777b8e80941Smrg dw[1] = 6778b8e80941Smrg __gen_uint(values->DSNumberofURBEntries, 0, 15) | 6779b8e80941Smrg __gen_uint(values->DSURBEntryAllocationSize, 16, 24) | 6780b8e80941Smrg __gen_uint(values->DSURBStartingAddress, 25, 31); 6781b8e80941Smrg} 6782b8e80941Smrg 6783b8e80941Smrg#define GEN10_3DSTATE_URB_GS_length 2 6784b8e80941Smrg#define GEN10_3DSTATE_URB_GS_length_bias 2 6785b8e80941Smrg#define GEN10_3DSTATE_URB_GS_header \ 6786b8e80941Smrg .DWordLength = 0, \ 6787b8e80941Smrg ._3DCommandSubOpcode = 51, \ 6788b8e80941Smrg ._3DCommandOpcode = 0, \ 6789b8e80941Smrg .CommandSubType = 3, \ 6790b8e80941Smrg .CommandType = 3 6791b8e80941Smrg 6792b8e80941Smrgstruct GEN10_3DSTATE_URB_GS { 6793b8e80941Smrg uint32_t DWordLength; 6794b8e80941Smrg uint32_t _3DCommandSubOpcode; 6795b8e80941Smrg uint32_t _3DCommandOpcode; 6796b8e80941Smrg uint32_t CommandSubType; 6797b8e80941Smrg uint32_t CommandType; 6798b8e80941Smrg uint32_t GSNumberofURBEntries; 6799b8e80941Smrg uint32_t GSURBEntryAllocationSize; 6800b8e80941Smrg uint32_t GSURBStartingAddress; 6801b8e80941Smrg}; 6802b8e80941Smrg 6803b8e80941Smrgstatic inline void 6804b8e80941SmrgGEN10_3DSTATE_URB_GS_pack(__attribute__((unused)) __gen_user_data *data, 6805b8e80941Smrg __attribute__((unused)) void * restrict dst, 6806b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_URB_GS * restrict values) 6807b8e80941Smrg{ 6808b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6809b8e80941Smrg 6810b8e80941Smrg dw[0] = 6811b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6812b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6813b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6814b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6815b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6816b8e80941Smrg 6817b8e80941Smrg dw[1] = 6818b8e80941Smrg __gen_uint(values->GSNumberofURBEntries, 0, 15) | 6819b8e80941Smrg __gen_uint(values->GSURBEntryAllocationSize, 16, 24) | 6820b8e80941Smrg __gen_uint(values->GSURBStartingAddress, 25, 31); 6821b8e80941Smrg} 6822b8e80941Smrg 6823b8e80941Smrg#define GEN10_3DSTATE_URB_HS_length 2 6824b8e80941Smrg#define GEN10_3DSTATE_URB_HS_length_bias 2 6825b8e80941Smrg#define GEN10_3DSTATE_URB_HS_header \ 6826b8e80941Smrg .DWordLength = 0, \ 6827b8e80941Smrg ._3DCommandSubOpcode = 49, \ 6828b8e80941Smrg ._3DCommandOpcode = 0, \ 6829b8e80941Smrg .CommandSubType = 3, \ 6830b8e80941Smrg .CommandType = 3 6831b8e80941Smrg 6832b8e80941Smrgstruct GEN10_3DSTATE_URB_HS { 6833b8e80941Smrg uint32_t DWordLength; 6834b8e80941Smrg uint32_t _3DCommandSubOpcode; 6835b8e80941Smrg uint32_t _3DCommandOpcode; 6836b8e80941Smrg uint32_t CommandSubType; 6837b8e80941Smrg uint32_t CommandType; 6838b8e80941Smrg uint32_t HSNumberofURBEntries; 6839b8e80941Smrg uint32_t HSURBEntryAllocationSize; 6840b8e80941Smrg uint32_t HSURBStartingAddress; 6841b8e80941Smrg}; 6842b8e80941Smrg 6843b8e80941Smrgstatic inline void 6844b8e80941SmrgGEN10_3DSTATE_URB_HS_pack(__attribute__((unused)) __gen_user_data *data, 6845b8e80941Smrg __attribute__((unused)) void * restrict dst, 6846b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_URB_HS * restrict values) 6847b8e80941Smrg{ 6848b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6849b8e80941Smrg 6850b8e80941Smrg dw[0] = 6851b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6852b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6853b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6854b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6855b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6856b8e80941Smrg 6857b8e80941Smrg dw[1] = 6858b8e80941Smrg __gen_uint(values->HSNumberofURBEntries, 0, 15) | 6859b8e80941Smrg __gen_uint(values->HSURBEntryAllocationSize, 16, 24) | 6860b8e80941Smrg __gen_uint(values->HSURBStartingAddress, 25, 31); 6861b8e80941Smrg} 6862b8e80941Smrg 6863b8e80941Smrg#define GEN10_3DSTATE_URB_VS_length 2 6864b8e80941Smrg#define GEN10_3DSTATE_URB_VS_length_bias 2 6865b8e80941Smrg#define GEN10_3DSTATE_URB_VS_header \ 6866b8e80941Smrg .DWordLength = 0, \ 6867b8e80941Smrg ._3DCommandSubOpcode = 48, \ 6868b8e80941Smrg ._3DCommandOpcode = 0, \ 6869b8e80941Smrg .CommandSubType = 3, \ 6870b8e80941Smrg .CommandType = 3 6871b8e80941Smrg 6872b8e80941Smrgstruct GEN10_3DSTATE_URB_VS { 6873b8e80941Smrg uint32_t DWordLength; 6874b8e80941Smrg uint32_t _3DCommandSubOpcode; 6875b8e80941Smrg uint32_t _3DCommandOpcode; 6876b8e80941Smrg uint32_t CommandSubType; 6877b8e80941Smrg uint32_t CommandType; 6878b8e80941Smrg uint32_t VSNumberofURBEntries; 6879b8e80941Smrg uint32_t VSURBEntryAllocationSize; 6880b8e80941Smrg uint32_t VSURBStartingAddress; 6881b8e80941Smrg}; 6882b8e80941Smrg 6883b8e80941Smrgstatic inline void 6884b8e80941SmrgGEN10_3DSTATE_URB_VS_pack(__attribute__((unused)) __gen_user_data *data, 6885b8e80941Smrg __attribute__((unused)) void * restrict dst, 6886b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_URB_VS * restrict values) 6887b8e80941Smrg{ 6888b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6889b8e80941Smrg 6890b8e80941Smrg dw[0] = 6891b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6892b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6893b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6894b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6895b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6896b8e80941Smrg 6897b8e80941Smrg dw[1] = 6898b8e80941Smrg __gen_uint(values->VSNumberofURBEntries, 0, 15) | 6899b8e80941Smrg __gen_uint(values->VSURBEntryAllocationSize, 16, 24) | 6900b8e80941Smrg __gen_uint(values->VSURBStartingAddress, 25, 31); 6901b8e80941Smrg} 6902b8e80941Smrg 6903b8e80941Smrg#define GEN10_3DSTATE_VERTEX_BUFFERS_length_bias 2 6904b8e80941Smrg#define GEN10_3DSTATE_VERTEX_BUFFERS_header \ 6905b8e80941Smrg .DWordLength = 3, \ 6906b8e80941Smrg ._3DCommandSubOpcode = 8, \ 6907b8e80941Smrg ._3DCommandOpcode = 0, \ 6908b8e80941Smrg .CommandSubType = 3, \ 6909b8e80941Smrg .CommandType = 3 6910b8e80941Smrg 6911b8e80941Smrgstruct GEN10_3DSTATE_VERTEX_BUFFERS { 6912b8e80941Smrg uint32_t DWordLength; 6913b8e80941Smrg uint32_t _3DCommandSubOpcode; 6914b8e80941Smrg uint32_t _3DCommandOpcode; 6915b8e80941Smrg uint32_t CommandSubType; 6916b8e80941Smrg uint32_t CommandType; 6917b8e80941Smrg /* variable length fields follow */ 6918b8e80941Smrg}; 6919b8e80941Smrg 6920b8e80941Smrgstatic inline void 6921b8e80941SmrgGEN10_3DSTATE_VERTEX_BUFFERS_pack(__attribute__((unused)) __gen_user_data *data, 6922b8e80941Smrg __attribute__((unused)) void * restrict dst, 6923b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VERTEX_BUFFERS * restrict values) 6924b8e80941Smrg{ 6925b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6926b8e80941Smrg 6927b8e80941Smrg dw[0] = 6928b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6929b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6930b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6931b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6932b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6933b8e80941Smrg} 6934b8e80941Smrg 6935b8e80941Smrg#define GEN10_3DSTATE_VERTEX_ELEMENTS_length_bias 2 6936b8e80941Smrg#define GEN10_3DSTATE_VERTEX_ELEMENTS_header \ 6937b8e80941Smrg .DWordLength = 1, \ 6938b8e80941Smrg ._3DCommandSubOpcode = 9, \ 6939b8e80941Smrg ._3DCommandOpcode = 0, \ 6940b8e80941Smrg .CommandSubType = 3, \ 6941b8e80941Smrg .CommandType = 3 6942b8e80941Smrg 6943b8e80941Smrgstruct GEN10_3DSTATE_VERTEX_ELEMENTS { 6944b8e80941Smrg uint32_t DWordLength; 6945b8e80941Smrg uint32_t _3DCommandSubOpcode; 6946b8e80941Smrg uint32_t _3DCommandOpcode; 6947b8e80941Smrg uint32_t CommandSubType; 6948b8e80941Smrg uint32_t CommandType; 6949b8e80941Smrg /* variable length fields follow */ 6950b8e80941Smrg}; 6951b8e80941Smrg 6952b8e80941Smrgstatic inline void 6953b8e80941SmrgGEN10_3DSTATE_VERTEX_ELEMENTS_pack(__attribute__((unused)) __gen_user_data *data, 6954b8e80941Smrg __attribute__((unused)) void * restrict dst, 6955b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VERTEX_ELEMENTS * restrict values) 6956b8e80941Smrg{ 6957b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6958b8e80941Smrg 6959b8e80941Smrg dw[0] = 6960b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6961b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6962b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 6963b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 6964b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 6965b8e80941Smrg} 6966b8e80941Smrg 6967b8e80941Smrg#define GEN10_3DSTATE_VF_length 2 6968b8e80941Smrg#define GEN10_3DSTATE_VF_length_bias 2 6969b8e80941Smrg#define GEN10_3DSTATE_VF_header \ 6970b8e80941Smrg .DWordLength = 0, \ 6971b8e80941Smrg ._3DCommandSubOpcode = 12, \ 6972b8e80941Smrg ._3DCommandOpcode = 0, \ 6973b8e80941Smrg .CommandSubType = 3, \ 6974b8e80941Smrg .CommandType = 3 6975b8e80941Smrg 6976b8e80941Smrgstruct GEN10_3DSTATE_VF { 6977b8e80941Smrg uint32_t DWordLength; 6978b8e80941Smrg bool IndexedDrawCutIndexEnable; 6979b8e80941Smrg bool ComponentPackingEnable; 6980b8e80941Smrg bool SequentialDrawCutIndexEnable; 6981b8e80941Smrg bool VertexIDOffsetEnable; 6982b8e80941Smrg uint32_t _3DCommandSubOpcode; 6983b8e80941Smrg uint32_t _3DCommandOpcode; 6984b8e80941Smrg uint32_t CommandSubType; 6985b8e80941Smrg uint32_t CommandType; 6986b8e80941Smrg uint32_t CutIndex; 6987b8e80941Smrg}; 6988b8e80941Smrg 6989b8e80941Smrgstatic inline void 6990b8e80941SmrgGEN10_3DSTATE_VF_pack(__attribute__((unused)) __gen_user_data *data, 6991b8e80941Smrg __attribute__((unused)) void * restrict dst, 6992b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VF * restrict values) 6993b8e80941Smrg{ 6994b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 6995b8e80941Smrg 6996b8e80941Smrg dw[0] = 6997b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 6998b8e80941Smrg __gen_uint(values->IndexedDrawCutIndexEnable, 8, 8) | 6999b8e80941Smrg __gen_uint(values->ComponentPackingEnable, 9, 9) | 7000b8e80941Smrg __gen_uint(values->SequentialDrawCutIndexEnable, 10, 10) | 7001b8e80941Smrg __gen_uint(values->VertexIDOffsetEnable, 11, 11) | 7002b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7003b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7004b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7005b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7006b8e80941Smrg 7007b8e80941Smrg dw[1] = 7008b8e80941Smrg __gen_uint(values->CutIndex, 0, 31); 7009b8e80941Smrg} 7010b8e80941Smrg 7011b8e80941Smrg#define GEN10_3DSTATE_VF_COMPONENT_PACKING_length 5 7012b8e80941Smrg#define GEN10_3DSTATE_VF_COMPONENT_PACKING_length_bias 2 7013b8e80941Smrg#define GEN10_3DSTATE_VF_COMPONENT_PACKING_header\ 7014b8e80941Smrg .DWordLength = 3, \ 7015b8e80941Smrg ._3DCommandSubOpcode = 85, \ 7016b8e80941Smrg ._3DCommandOpcode = 0, \ 7017b8e80941Smrg .CommandSubType = 3, \ 7018b8e80941Smrg .CommandType = 3 7019b8e80941Smrg 7020b8e80941Smrgstruct GEN10_3DSTATE_VF_COMPONENT_PACKING { 7021b8e80941Smrg uint32_t DWordLength; 7022b8e80941Smrg uint32_t _3DCommandSubOpcode; 7023b8e80941Smrg uint32_t _3DCommandOpcode; 7024b8e80941Smrg uint32_t CommandSubType; 7025b8e80941Smrg uint32_t CommandType; 7026b8e80941Smrg uint32_t VertexElement00Enables; 7027b8e80941Smrg uint32_t VertexElement01Enables; 7028b8e80941Smrg uint32_t VertexElement02Enables; 7029b8e80941Smrg uint32_t VertexElement03Enables; 7030b8e80941Smrg uint32_t VertexElement04Enables; 7031b8e80941Smrg uint32_t VertexElement05Enables; 7032b8e80941Smrg uint32_t VertexElement06Enables; 7033b8e80941Smrg uint32_t VertexElement07Enables; 7034b8e80941Smrg uint32_t VertexElement08Enables; 7035b8e80941Smrg uint32_t VertexElement09Enables; 7036b8e80941Smrg uint32_t VertexElement10Enables; 7037b8e80941Smrg uint32_t VertexElement11Enables; 7038b8e80941Smrg uint32_t VertexElement12Enables; 7039b8e80941Smrg uint32_t VertexElement13Enables; 7040b8e80941Smrg uint32_t VertexElement14Enables; 7041b8e80941Smrg uint32_t VertexElement15Enables; 7042b8e80941Smrg uint32_t VertexElement16Enables; 7043b8e80941Smrg uint32_t VertexElement17Enables; 7044b8e80941Smrg uint32_t VertexElement18Enables; 7045b8e80941Smrg uint32_t VertexElement19Enables; 7046b8e80941Smrg uint32_t VertexElement20Enables; 7047b8e80941Smrg uint32_t VertexElement21Enables; 7048b8e80941Smrg uint32_t VertexElement22Enables; 7049b8e80941Smrg uint32_t VertexElement23Enables; 7050b8e80941Smrg uint32_t VertexElement24Enables; 7051b8e80941Smrg uint32_t VertexElement25Enables; 7052b8e80941Smrg uint32_t VertexElement26Enables; 7053b8e80941Smrg uint32_t VertexElement27Enables; 7054b8e80941Smrg uint32_t VertexElement28Enables; 7055b8e80941Smrg uint32_t VertexElement29Enables; 7056b8e80941Smrg uint32_t VertexElement30Enables; 7057b8e80941Smrg uint32_t VertexElement31Enables; 7058b8e80941Smrg}; 7059b8e80941Smrg 7060b8e80941Smrgstatic inline void 7061b8e80941SmrgGEN10_3DSTATE_VF_COMPONENT_PACKING_pack(__attribute__((unused)) __gen_user_data *data, 7062b8e80941Smrg __attribute__((unused)) void * restrict dst, 7063b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VF_COMPONENT_PACKING * restrict values) 7064b8e80941Smrg{ 7065b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7066b8e80941Smrg 7067b8e80941Smrg dw[0] = 7068b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7069b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7070b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7071b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7072b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7073b8e80941Smrg 7074b8e80941Smrg dw[1] = 7075b8e80941Smrg __gen_uint(values->VertexElement00Enables, 0, 3) | 7076b8e80941Smrg __gen_uint(values->VertexElement01Enables, 4, 7) | 7077b8e80941Smrg __gen_uint(values->VertexElement02Enables, 8, 11) | 7078b8e80941Smrg __gen_uint(values->VertexElement03Enables, 12, 15) | 7079b8e80941Smrg __gen_uint(values->VertexElement04Enables, 16, 19) | 7080b8e80941Smrg __gen_uint(values->VertexElement05Enables, 20, 23) | 7081b8e80941Smrg __gen_uint(values->VertexElement06Enables, 24, 27) | 7082b8e80941Smrg __gen_uint(values->VertexElement07Enables, 28, 31); 7083b8e80941Smrg 7084b8e80941Smrg dw[2] = 7085b8e80941Smrg __gen_uint(values->VertexElement08Enables, 0, 3) | 7086b8e80941Smrg __gen_uint(values->VertexElement09Enables, 4, 7) | 7087b8e80941Smrg __gen_uint(values->VertexElement10Enables, 8, 11) | 7088b8e80941Smrg __gen_uint(values->VertexElement11Enables, 12, 15) | 7089b8e80941Smrg __gen_uint(values->VertexElement12Enables, 16, 19) | 7090b8e80941Smrg __gen_uint(values->VertexElement13Enables, 20, 23) | 7091b8e80941Smrg __gen_uint(values->VertexElement14Enables, 24, 27) | 7092b8e80941Smrg __gen_uint(values->VertexElement15Enables, 28, 31); 7093b8e80941Smrg 7094b8e80941Smrg dw[3] = 7095b8e80941Smrg __gen_uint(values->VertexElement16Enables, 0, 3) | 7096b8e80941Smrg __gen_uint(values->VertexElement17Enables, 4, 7) | 7097b8e80941Smrg __gen_uint(values->VertexElement18Enables, 8, 11) | 7098b8e80941Smrg __gen_uint(values->VertexElement19Enables, 12, 15) | 7099b8e80941Smrg __gen_uint(values->VertexElement20Enables, 16, 19) | 7100b8e80941Smrg __gen_uint(values->VertexElement21Enables, 20, 23) | 7101b8e80941Smrg __gen_uint(values->VertexElement22Enables, 24, 27) | 7102b8e80941Smrg __gen_uint(values->VertexElement23Enables, 28, 31); 7103b8e80941Smrg 7104b8e80941Smrg dw[4] = 7105b8e80941Smrg __gen_uint(values->VertexElement24Enables, 0, 3) | 7106b8e80941Smrg __gen_uint(values->VertexElement25Enables, 4, 7) | 7107b8e80941Smrg __gen_uint(values->VertexElement26Enables, 8, 11) | 7108b8e80941Smrg __gen_uint(values->VertexElement27Enables, 12, 15) | 7109b8e80941Smrg __gen_uint(values->VertexElement28Enables, 16, 19) | 7110b8e80941Smrg __gen_uint(values->VertexElement29Enables, 20, 23) | 7111b8e80941Smrg __gen_uint(values->VertexElement30Enables, 24, 27) | 7112b8e80941Smrg __gen_uint(values->VertexElement31Enables, 28, 31); 7113b8e80941Smrg} 7114b8e80941Smrg 7115b8e80941Smrg#define GEN10_3DSTATE_VF_INSTANCING_length 3 7116b8e80941Smrg#define GEN10_3DSTATE_VF_INSTANCING_length_bias 2 7117b8e80941Smrg#define GEN10_3DSTATE_VF_INSTANCING_header \ 7118b8e80941Smrg .DWordLength = 1, \ 7119b8e80941Smrg ._3DCommandSubOpcode = 73, \ 7120b8e80941Smrg ._3DCommandOpcode = 0, \ 7121b8e80941Smrg .CommandSubType = 3, \ 7122b8e80941Smrg .CommandType = 3 7123b8e80941Smrg 7124b8e80941Smrgstruct GEN10_3DSTATE_VF_INSTANCING { 7125b8e80941Smrg uint32_t DWordLength; 7126b8e80941Smrg uint32_t _3DCommandSubOpcode; 7127b8e80941Smrg uint32_t _3DCommandOpcode; 7128b8e80941Smrg uint32_t CommandSubType; 7129b8e80941Smrg uint32_t CommandType; 7130b8e80941Smrg uint32_t VertexElementIndex; 7131b8e80941Smrg bool InstancingEnable; 7132b8e80941Smrg uint32_t InstanceDataStepRate; 7133b8e80941Smrg}; 7134b8e80941Smrg 7135b8e80941Smrgstatic inline void 7136b8e80941SmrgGEN10_3DSTATE_VF_INSTANCING_pack(__attribute__((unused)) __gen_user_data *data, 7137b8e80941Smrg __attribute__((unused)) void * restrict dst, 7138b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VF_INSTANCING * restrict values) 7139b8e80941Smrg{ 7140b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7141b8e80941Smrg 7142b8e80941Smrg dw[0] = 7143b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7144b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7145b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7146b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7147b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7148b8e80941Smrg 7149b8e80941Smrg dw[1] = 7150b8e80941Smrg __gen_uint(values->VertexElementIndex, 0, 5) | 7151b8e80941Smrg __gen_uint(values->InstancingEnable, 8, 8); 7152b8e80941Smrg 7153b8e80941Smrg dw[2] = 7154b8e80941Smrg __gen_uint(values->InstanceDataStepRate, 0, 31); 7155b8e80941Smrg} 7156b8e80941Smrg 7157b8e80941Smrg#define GEN10_3DSTATE_VF_SGVS_length 2 7158b8e80941Smrg#define GEN10_3DSTATE_VF_SGVS_length_bias 2 7159b8e80941Smrg#define GEN10_3DSTATE_VF_SGVS_header \ 7160b8e80941Smrg .DWordLength = 0, \ 7161b8e80941Smrg ._3DCommandSubOpcode = 74, \ 7162b8e80941Smrg ._3DCommandOpcode = 0, \ 7163b8e80941Smrg .CommandSubType = 3, \ 7164b8e80941Smrg .CommandType = 3 7165b8e80941Smrg 7166b8e80941Smrgstruct GEN10_3DSTATE_VF_SGVS { 7167b8e80941Smrg uint32_t DWordLength; 7168b8e80941Smrg uint32_t _3DCommandSubOpcode; 7169b8e80941Smrg uint32_t _3DCommandOpcode; 7170b8e80941Smrg uint32_t CommandSubType; 7171b8e80941Smrg uint32_t CommandType; 7172b8e80941Smrg uint32_t VertexIDElementOffset; 7173b8e80941Smrg uint32_t VertexIDComponentNumber; 7174b8e80941Smrg#define COMP_0 0 7175b8e80941Smrg#define COMP_1 1 7176b8e80941Smrg#define COMP_2 2 7177b8e80941Smrg#define COMP_3 3 7178b8e80941Smrg bool VertexIDEnable; 7179b8e80941Smrg uint32_t InstanceIDElementOffset; 7180b8e80941Smrg uint32_t InstanceIDComponentNumber; 7181b8e80941Smrg#define COMP_0 0 7182b8e80941Smrg#define COMP_1 1 7183b8e80941Smrg#define COMP_2 2 7184b8e80941Smrg#define COMP_3 3 7185b8e80941Smrg bool InstanceIDEnable; 7186b8e80941Smrg}; 7187b8e80941Smrg 7188b8e80941Smrgstatic inline void 7189b8e80941SmrgGEN10_3DSTATE_VF_SGVS_pack(__attribute__((unused)) __gen_user_data *data, 7190b8e80941Smrg __attribute__((unused)) void * restrict dst, 7191b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VF_SGVS * restrict values) 7192b8e80941Smrg{ 7193b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7194b8e80941Smrg 7195b8e80941Smrg dw[0] = 7196b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7197b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7198b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7199b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7200b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7201b8e80941Smrg 7202b8e80941Smrg dw[1] = 7203b8e80941Smrg __gen_uint(values->VertexIDElementOffset, 0, 5) | 7204b8e80941Smrg __gen_uint(values->VertexIDComponentNumber, 13, 14) | 7205b8e80941Smrg __gen_uint(values->VertexIDEnable, 15, 15) | 7206b8e80941Smrg __gen_uint(values->InstanceIDElementOffset, 16, 21) | 7207b8e80941Smrg __gen_uint(values->InstanceIDComponentNumber, 29, 30) | 7208b8e80941Smrg __gen_uint(values->InstanceIDEnable, 31, 31); 7209b8e80941Smrg} 7210b8e80941Smrg 7211b8e80941Smrg#define GEN10_3DSTATE_VF_SGVS_2_length 3 7212b8e80941Smrg#define GEN10_3DSTATE_VF_SGVS_2_length_bias 2 7213b8e80941Smrg#define GEN10_3DSTATE_VF_SGVS_2_header \ 7214b8e80941Smrg .DWordLength = 1, \ 7215b8e80941Smrg ._3DCommandSubOpcode = 86, \ 7216b8e80941Smrg ._3DCommandOpcode = 0, \ 7217b8e80941Smrg .CommandSubType = 3, \ 7218b8e80941Smrg .CommandType = 3 7219b8e80941Smrg 7220b8e80941Smrgstruct GEN10_3DSTATE_VF_SGVS_2 { 7221b8e80941Smrg uint32_t DWordLength; 7222b8e80941Smrg uint32_t _3DCommandSubOpcode; 7223b8e80941Smrg uint32_t _3DCommandOpcode; 7224b8e80941Smrg uint32_t CommandSubType; 7225b8e80941Smrg uint32_t CommandType; 7226b8e80941Smrg uint32_t XP0ElementOffset; 7227b8e80941Smrg uint32_t XP0SourceSelect; 7228b8e80941Smrg#define VERTEX_LOCATION 1 7229b8e80941Smrg#define XP0_PARAMETER 0 7230b8e80941Smrg uint32_t XP0ComponentNumber; 7231b8e80941Smrg#define COMP_0 0 7232b8e80941Smrg#define COMP_1 1 7233b8e80941Smrg#define COMP_2 2 7234b8e80941Smrg#define COMP_3 3 7235b8e80941Smrg uint32_t XP0Enable; 7236b8e80941Smrg uint32_t XP1ElementOffset; 7237b8e80941Smrg uint32_t XP1SourceSelect; 7238b8e80941Smrg#define StartingInstanceLocation 1 7239b8e80941Smrg#define XP1_PARAMETER 0 7240b8e80941Smrg uint32_t XP1ComponentNumber; 7241b8e80941Smrg#define COMP_0 0 7242b8e80941Smrg#define COMP_1 1 7243b8e80941Smrg#define COMP_2 2 7244b8e80941Smrg#define COMP_3 3 7245b8e80941Smrg uint32_t XP1Enable; 7246b8e80941Smrg uint32_t XP2ElementOffset; 7247b8e80941Smrg uint32_t XP2ComponentNumber; 7248b8e80941Smrg#define COMP_0 0 7249b8e80941Smrg#define COMP_1 1 7250b8e80941Smrg#define COMP_2 2 7251b8e80941Smrg#define COMP_3 3 7252b8e80941Smrg uint32_t XP2Enable; 7253b8e80941Smrg}; 7254b8e80941Smrg 7255b8e80941Smrgstatic inline void 7256b8e80941SmrgGEN10_3DSTATE_VF_SGVS_2_pack(__attribute__((unused)) __gen_user_data *data, 7257b8e80941Smrg __attribute__((unused)) void * restrict dst, 7258b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VF_SGVS_2 * restrict values) 7259b8e80941Smrg{ 7260b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7261b8e80941Smrg 7262b8e80941Smrg dw[0] = 7263b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7264b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7265b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7266b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7267b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7268b8e80941Smrg 7269b8e80941Smrg dw[1] = 7270b8e80941Smrg __gen_uint(values->XP0ElementOffset, 0, 5) | 7271b8e80941Smrg __gen_uint(values->XP0SourceSelect, 12, 12) | 7272b8e80941Smrg __gen_uint(values->XP0ComponentNumber, 13, 14) | 7273b8e80941Smrg __gen_uint(values->XP0Enable, 15, 15) | 7274b8e80941Smrg __gen_uint(values->XP1ElementOffset, 16, 21) | 7275b8e80941Smrg __gen_uint(values->XP1SourceSelect, 28, 28) | 7276b8e80941Smrg __gen_uint(values->XP1ComponentNumber, 29, 30) | 7277b8e80941Smrg __gen_uint(values->XP1Enable, 31, 31); 7278b8e80941Smrg 7279b8e80941Smrg dw[2] = 7280b8e80941Smrg __gen_uint(values->XP2ElementOffset, 0, 5) | 7281b8e80941Smrg __gen_uint(values->XP2ComponentNumber, 13, 14) | 7282b8e80941Smrg __gen_uint(values->XP2Enable, 15, 15); 7283b8e80941Smrg} 7284b8e80941Smrg 7285b8e80941Smrg#define GEN10_3DSTATE_VF_STATISTICS_length 1 7286b8e80941Smrg#define GEN10_3DSTATE_VF_STATISTICS_length_bias 1 7287b8e80941Smrg#define GEN10_3DSTATE_VF_STATISTICS_header \ 7288b8e80941Smrg ._3DCommandSubOpcode = 11, \ 7289b8e80941Smrg ._3DCommandOpcode = 0, \ 7290b8e80941Smrg .CommandSubType = 1, \ 7291b8e80941Smrg .CommandType = 3 7292b8e80941Smrg 7293b8e80941Smrgstruct GEN10_3DSTATE_VF_STATISTICS { 7294b8e80941Smrg bool StatisticsEnable; 7295b8e80941Smrg uint32_t _3DCommandSubOpcode; 7296b8e80941Smrg uint32_t _3DCommandOpcode; 7297b8e80941Smrg uint32_t CommandSubType; 7298b8e80941Smrg uint32_t CommandType; 7299b8e80941Smrg}; 7300b8e80941Smrg 7301b8e80941Smrgstatic inline void 7302b8e80941SmrgGEN10_3DSTATE_VF_STATISTICS_pack(__attribute__((unused)) __gen_user_data *data, 7303b8e80941Smrg __attribute__((unused)) void * restrict dst, 7304b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VF_STATISTICS * restrict values) 7305b8e80941Smrg{ 7306b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7307b8e80941Smrg 7308b8e80941Smrg dw[0] = 7309b8e80941Smrg __gen_uint(values->StatisticsEnable, 0, 0) | 7310b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7311b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7312b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7313b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7314b8e80941Smrg} 7315b8e80941Smrg 7316b8e80941Smrg#define GEN10_3DSTATE_VF_TOPOLOGY_length 2 7317b8e80941Smrg#define GEN10_3DSTATE_VF_TOPOLOGY_length_bias 2 7318b8e80941Smrg#define GEN10_3DSTATE_VF_TOPOLOGY_header \ 7319b8e80941Smrg .DWordLength = 0, \ 7320b8e80941Smrg ._3DCommandSubOpcode = 75, \ 7321b8e80941Smrg ._3DCommandOpcode = 0, \ 7322b8e80941Smrg .CommandSubType = 3, \ 7323b8e80941Smrg .CommandType = 3 7324b8e80941Smrg 7325b8e80941Smrgstruct GEN10_3DSTATE_VF_TOPOLOGY { 7326b8e80941Smrg uint32_t DWordLength; 7327b8e80941Smrg uint32_t _3DCommandSubOpcode; 7328b8e80941Smrg uint32_t _3DCommandOpcode; 7329b8e80941Smrg uint32_t CommandSubType; 7330b8e80941Smrg uint32_t CommandType; 7331b8e80941Smrg enum GEN10_3D_Prim_Topo_Type PrimitiveTopologyType; 7332b8e80941Smrg}; 7333b8e80941Smrg 7334b8e80941Smrgstatic inline void 7335b8e80941SmrgGEN10_3DSTATE_VF_TOPOLOGY_pack(__attribute__((unused)) __gen_user_data *data, 7336b8e80941Smrg __attribute__((unused)) void * restrict dst, 7337b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VF_TOPOLOGY * restrict values) 7338b8e80941Smrg{ 7339b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7340b8e80941Smrg 7341b8e80941Smrg dw[0] = 7342b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7343b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7344b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7345b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7346b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7347b8e80941Smrg 7348b8e80941Smrg dw[1] = 7349b8e80941Smrg __gen_uint(values->PrimitiveTopologyType, 0, 5); 7350b8e80941Smrg} 7351b8e80941Smrg 7352b8e80941Smrg#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2 7353b8e80941Smrg#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 2 7354b8e80941Smrg#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\ 7355b8e80941Smrg .DWordLength = 0, \ 7356b8e80941Smrg ._3DCommandSubOpcode = 35, \ 7357b8e80941Smrg ._3DCommandOpcode = 0, \ 7358b8e80941Smrg .CommandSubType = 3, \ 7359b8e80941Smrg .CommandType = 3 7360b8e80941Smrg 7361b8e80941Smrgstruct GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC { 7362b8e80941Smrg uint32_t DWordLength; 7363b8e80941Smrg uint32_t _3DCommandSubOpcode; 7364b8e80941Smrg uint32_t _3DCommandOpcode; 7365b8e80941Smrg uint32_t CommandSubType; 7366b8e80941Smrg uint32_t CommandType; 7367b8e80941Smrg uint64_t CCViewportPointer; 7368b8e80941Smrg}; 7369b8e80941Smrg 7370b8e80941Smrgstatic inline void 7371b8e80941SmrgGEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__attribute__((unused)) __gen_user_data *data, 7372b8e80941Smrg __attribute__((unused)) void * restrict dst, 7373b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values) 7374b8e80941Smrg{ 7375b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7376b8e80941Smrg 7377b8e80941Smrg dw[0] = 7378b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7379b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7380b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7381b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7382b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7383b8e80941Smrg 7384b8e80941Smrg dw[1] = 7385b8e80941Smrg __gen_offset(values->CCViewportPointer, 5, 31); 7386b8e80941Smrg} 7387b8e80941Smrg 7388b8e80941Smrg#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2 7389b8e80941Smrg#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 2 7390b8e80941Smrg#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\ 7391b8e80941Smrg .DWordLength = 0, \ 7392b8e80941Smrg ._3DCommandSubOpcode = 33, \ 7393b8e80941Smrg ._3DCommandOpcode = 0, \ 7394b8e80941Smrg .CommandSubType = 3, \ 7395b8e80941Smrg .CommandType = 3 7396b8e80941Smrg 7397b8e80941Smrgstruct GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP { 7398b8e80941Smrg uint32_t DWordLength; 7399b8e80941Smrg uint32_t _3DCommandSubOpcode; 7400b8e80941Smrg uint32_t _3DCommandOpcode; 7401b8e80941Smrg uint32_t CommandSubType; 7402b8e80941Smrg uint32_t CommandType; 7403b8e80941Smrg uint64_t SFClipViewportPointer; 7404b8e80941Smrg}; 7405b8e80941Smrg 7406b8e80941Smrgstatic inline void 7407b8e80941SmrgGEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__attribute__((unused)) __gen_user_data *data, 7408b8e80941Smrg __attribute__((unused)) void * restrict dst, 7409b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values) 7410b8e80941Smrg{ 7411b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7412b8e80941Smrg 7413b8e80941Smrg dw[0] = 7414b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7415b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7416b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7417b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7418b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7419b8e80941Smrg 7420b8e80941Smrg dw[1] = 7421b8e80941Smrg __gen_offset(values->SFClipViewportPointer, 6, 31); 7422b8e80941Smrg} 7423b8e80941Smrg 7424b8e80941Smrg#define GEN10_3DSTATE_VS_length 9 7425b8e80941Smrg#define GEN10_3DSTATE_VS_length_bias 2 7426b8e80941Smrg#define GEN10_3DSTATE_VS_header \ 7427b8e80941Smrg .DWordLength = 7, \ 7428b8e80941Smrg ._3DCommandSubOpcode = 16, \ 7429b8e80941Smrg ._3DCommandOpcode = 0, \ 7430b8e80941Smrg .CommandSubType = 3, \ 7431b8e80941Smrg .CommandType = 3 7432b8e80941Smrg 7433b8e80941Smrgstruct GEN10_3DSTATE_VS { 7434b8e80941Smrg uint32_t DWordLength; 7435b8e80941Smrg uint32_t _3DCommandSubOpcode; 7436b8e80941Smrg uint32_t _3DCommandOpcode; 7437b8e80941Smrg uint32_t CommandSubType; 7438b8e80941Smrg uint32_t CommandType; 7439b8e80941Smrg uint64_t KernelStartPointer; 7440b8e80941Smrg bool SoftwareExceptionEnable; 7441b8e80941Smrg bool AccessesUAV; 7442b8e80941Smrg bool IllegalOpcodeExceptionEnable; 7443b8e80941Smrg uint32_t FloatingPointMode; 7444b8e80941Smrg#define IEEE754 0 7445b8e80941Smrg#define Alternate 1 7446b8e80941Smrg uint32_t ThreadDispatchPriority; 7447b8e80941Smrg#define High 1 7448b8e80941Smrg uint32_t BindingTableEntryCount; 7449b8e80941Smrg uint32_t SamplerCount; 7450b8e80941Smrg#define NoSamplers 0 7451b8e80941Smrg#define _14Samplers 1 7452b8e80941Smrg#define _58Samplers 2 7453b8e80941Smrg#define _912Samplers 3 7454b8e80941Smrg#define _1316Samplers 4 7455b8e80941Smrg bool VectorMaskEnable; 7456b8e80941Smrg bool SingleVertexDispatch; 7457b8e80941Smrg uint32_t PerThreadScratchSpace; 7458b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 7459b8e80941Smrg uint32_t VertexURBEntryReadOffset; 7460b8e80941Smrg uint32_t VertexURBEntryReadLength; 7461b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData; 7462b8e80941Smrg bool Enable; 7463b8e80941Smrg bool VertexCacheDisable; 7464b8e80941Smrg bool SIMD8DispatchEnable; 7465b8e80941Smrg bool SIMD8SingleInstanceDispatchEnable; 7466b8e80941Smrg bool StatisticsEnable; 7467b8e80941Smrg uint32_t MaximumNumberofThreads; 7468b8e80941Smrg uint32_t UserClipDistanceCullTestEnableBitmask; 7469b8e80941Smrg uint32_t UserClipDistanceClipTestEnableBitmask; 7470b8e80941Smrg uint32_t VertexURBEntryOutputLength; 7471b8e80941Smrg uint32_t VertexURBEntryOutputReadOffset; 7472b8e80941Smrg}; 7473b8e80941Smrg 7474b8e80941Smrgstatic inline void 7475b8e80941SmrgGEN10_3DSTATE_VS_pack(__attribute__((unused)) __gen_user_data *data, 7476b8e80941Smrg __attribute__((unused)) void * restrict dst, 7477b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_VS * restrict values) 7478b8e80941Smrg{ 7479b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7480b8e80941Smrg 7481b8e80941Smrg dw[0] = 7482b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7483b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7484b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7485b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7486b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7487b8e80941Smrg 7488b8e80941Smrg const uint64_t v1 = 7489b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 63); 7490b8e80941Smrg dw[1] = v1; 7491b8e80941Smrg dw[2] = v1 >> 32; 7492b8e80941Smrg 7493b8e80941Smrg dw[3] = 7494b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 7495b8e80941Smrg __gen_uint(values->AccessesUAV, 12, 12) | 7496b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 7497b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 7498b8e80941Smrg __gen_uint(values->ThreadDispatchPriority, 17, 17) | 7499b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 7500b8e80941Smrg __gen_uint(values->SamplerCount, 27, 29) | 7501b8e80941Smrg __gen_uint(values->VectorMaskEnable, 30, 30) | 7502b8e80941Smrg __gen_uint(values->SingleVertexDispatch, 31, 31); 7503b8e80941Smrg 7504b8e80941Smrg const uint64_t v4 = 7505b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 7506b8e80941Smrg const uint64_t v4_address = 7507b8e80941Smrg __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 7508b8e80941Smrg dw[4] = v4_address; 7509b8e80941Smrg dw[5] = (v4_address >> 32) | (v4 >> 32); 7510b8e80941Smrg 7511b8e80941Smrg dw[6] = 7512b8e80941Smrg __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 7513b8e80941Smrg __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 7514b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24); 7515b8e80941Smrg 7516b8e80941Smrg dw[7] = 7517b8e80941Smrg __gen_uint(values->Enable, 0, 0) | 7518b8e80941Smrg __gen_uint(values->VertexCacheDisable, 1, 1) | 7519b8e80941Smrg __gen_uint(values->SIMD8DispatchEnable, 2, 2) | 7520b8e80941Smrg __gen_uint(values->SIMD8SingleInstanceDispatchEnable, 9, 9) | 7521b8e80941Smrg __gen_uint(values->StatisticsEnable, 10, 10) | 7522b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 22, 31); 7523b8e80941Smrg 7524b8e80941Smrg dw[8] = 7525b8e80941Smrg __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 7526b8e80941Smrg __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 7527b8e80941Smrg __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 7528b8e80941Smrg __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 7529b8e80941Smrg} 7530b8e80941Smrg 7531b8e80941Smrg#define GEN10_3DSTATE_WM_length 2 7532b8e80941Smrg#define GEN10_3DSTATE_WM_length_bias 2 7533b8e80941Smrg#define GEN10_3DSTATE_WM_header \ 7534b8e80941Smrg .DWordLength = 0, \ 7535b8e80941Smrg ._3DCommandSubOpcode = 20, \ 7536b8e80941Smrg ._3DCommandOpcode = 0, \ 7537b8e80941Smrg .CommandSubType = 3, \ 7538b8e80941Smrg .CommandType = 3 7539b8e80941Smrg 7540b8e80941Smrgstruct GEN10_3DSTATE_WM { 7541b8e80941Smrg uint32_t DWordLength; 7542b8e80941Smrg uint32_t _3DCommandSubOpcode; 7543b8e80941Smrg uint32_t _3DCommandOpcode; 7544b8e80941Smrg uint32_t CommandSubType; 7545b8e80941Smrg uint32_t CommandType; 7546b8e80941Smrg uint32_t ForceKillPixelEnable; 7547b8e80941Smrg#define ForceOff 1 7548b8e80941Smrg#define ForceON 2 7549b8e80941Smrg uint32_t PointRasterizationRule; 7550b8e80941Smrg#define RASTRULE_UPPER_LEFT 0 7551b8e80941Smrg#define RASTRULE_UPPER_RIGHT 1 7552b8e80941Smrg bool LineStippleEnable; 7553b8e80941Smrg bool PolygonStippleEnable; 7554b8e80941Smrg uint32_t LineAntialiasingRegionWidth; 7555b8e80941Smrg#define _05pixels 0 7556b8e80941Smrg#define _10pixels 1 7557b8e80941Smrg#define _20pixels 2 7558b8e80941Smrg#define _40pixels 3 7559b8e80941Smrg uint32_t LineEndCapAntialiasingRegionWidth; 7560b8e80941Smrg#define _05pixels 0 7561b8e80941Smrg#define _10pixels 1 7562b8e80941Smrg#define _20pixels 2 7563b8e80941Smrg#define _40pixels 3 7564b8e80941Smrg uint32_t BarycentricInterpolationMode; 7565b8e80941Smrg#define BIM_PERSPECTIVE_PIXEL 1 7566b8e80941Smrg#define BIM_PERSPECTIVE_CENTROID 2 7567b8e80941Smrg#define BIM_PERSPECTIVE_SAMPLE 4 7568b8e80941Smrg#define BIM_LINEAR_PIXEL 8 7569b8e80941Smrg#define BIM_LINEAR_CENTROID 16 7570b8e80941Smrg#define BIM_LINEAR_SAMPLE 32 7571b8e80941Smrg uint32_t PositionZWInterpolationMode; 7572b8e80941Smrg#define INTERP_PIXEL 0 7573b8e80941Smrg#define INTERP_CENTROID 2 7574b8e80941Smrg#define INTERP_SAMPLE 3 7575b8e80941Smrg uint32_t ForceThreadDispatchEnable; 7576b8e80941Smrg#define ForceOff 1 7577b8e80941Smrg#define ForceON 2 7578b8e80941Smrg uint32_t EarlyDepthStencilControl; 7579b8e80941Smrg#define EDSC_NORMAL 0 7580b8e80941Smrg#define EDSC_PSEXEC 1 7581b8e80941Smrg#define EDSC_PREPS 2 7582b8e80941Smrg bool LegacyDiamondLineRasterization; 7583b8e80941Smrg bool LegacyHierarchicalDepthBufferResolveEnable; 7584b8e80941Smrg bool LegacyDepthBufferResolveEnable; 7585b8e80941Smrg bool LegacyDepthBufferClearEnable; 7586b8e80941Smrg bool StatisticsEnable; 7587b8e80941Smrg}; 7588b8e80941Smrg 7589b8e80941Smrgstatic inline void 7590b8e80941SmrgGEN10_3DSTATE_WM_pack(__attribute__((unused)) __gen_user_data *data, 7591b8e80941Smrg __attribute__((unused)) void * restrict dst, 7592b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_WM * restrict values) 7593b8e80941Smrg{ 7594b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7595b8e80941Smrg 7596b8e80941Smrg dw[0] = 7597b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7598b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7599b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7600b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7601b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7602b8e80941Smrg 7603b8e80941Smrg dw[1] = 7604b8e80941Smrg __gen_uint(values->ForceKillPixelEnable, 0, 1) | 7605b8e80941Smrg __gen_uint(values->PointRasterizationRule, 2, 2) | 7606b8e80941Smrg __gen_uint(values->LineStippleEnable, 3, 3) | 7607b8e80941Smrg __gen_uint(values->PolygonStippleEnable, 4, 4) | 7608b8e80941Smrg __gen_uint(values->LineAntialiasingRegionWidth, 6, 7) | 7609b8e80941Smrg __gen_uint(values->LineEndCapAntialiasingRegionWidth, 8, 9) | 7610b8e80941Smrg __gen_uint(values->BarycentricInterpolationMode, 11, 16) | 7611b8e80941Smrg __gen_uint(values->PositionZWInterpolationMode, 17, 18) | 7612b8e80941Smrg __gen_uint(values->ForceThreadDispatchEnable, 19, 20) | 7613b8e80941Smrg __gen_uint(values->EarlyDepthStencilControl, 21, 22) | 7614b8e80941Smrg __gen_uint(values->LegacyDiamondLineRasterization, 26, 26) | 7615b8e80941Smrg __gen_uint(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) | 7616b8e80941Smrg __gen_uint(values->LegacyDepthBufferResolveEnable, 28, 28) | 7617b8e80941Smrg __gen_uint(values->LegacyDepthBufferClearEnable, 30, 30) | 7618b8e80941Smrg __gen_uint(values->StatisticsEnable, 31, 31); 7619b8e80941Smrg} 7620b8e80941Smrg 7621b8e80941Smrg#define GEN10_3DSTATE_WM_CHROMAKEY_length 2 7622b8e80941Smrg#define GEN10_3DSTATE_WM_CHROMAKEY_length_bias 2 7623b8e80941Smrg#define GEN10_3DSTATE_WM_CHROMAKEY_header \ 7624b8e80941Smrg .DWordLength = 0, \ 7625b8e80941Smrg ._3DCommandSubOpcode = 76, \ 7626b8e80941Smrg ._3DCommandOpcode = 0, \ 7627b8e80941Smrg .CommandSubType = 3, \ 7628b8e80941Smrg .CommandType = 3 7629b8e80941Smrg 7630b8e80941Smrgstruct GEN10_3DSTATE_WM_CHROMAKEY { 7631b8e80941Smrg uint32_t DWordLength; 7632b8e80941Smrg uint32_t _3DCommandSubOpcode; 7633b8e80941Smrg uint32_t _3DCommandOpcode; 7634b8e80941Smrg uint32_t CommandSubType; 7635b8e80941Smrg uint32_t CommandType; 7636b8e80941Smrg bool ChromaKeyKillEnable; 7637b8e80941Smrg}; 7638b8e80941Smrg 7639b8e80941Smrgstatic inline void 7640b8e80941SmrgGEN10_3DSTATE_WM_CHROMAKEY_pack(__attribute__((unused)) __gen_user_data *data, 7641b8e80941Smrg __attribute__((unused)) void * restrict dst, 7642b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_WM_CHROMAKEY * restrict values) 7643b8e80941Smrg{ 7644b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7645b8e80941Smrg 7646b8e80941Smrg dw[0] = 7647b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7648b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7649b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7650b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7651b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7652b8e80941Smrg 7653b8e80941Smrg dw[1] = 7654b8e80941Smrg __gen_uint(values->ChromaKeyKillEnable, 31, 31); 7655b8e80941Smrg} 7656b8e80941Smrg 7657b8e80941Smrg#define GEN10_3DSTATE_WM_DEPTH_STENCIL_length 4 7658b8e80941Smrg#define GEN10_3DSTATE_WM_DEPTH_STENCIL_length_bias 2 7659b8e80941Smrg#define GEN10_3DSTATE_WM_DEPTH_STENCIL_header \ 7660b8e80941Smrg .DWordLength = 2, \ 7661b8e80941Smrg ._3DCommandSubOpcode = 78, \ 7662b8e80941Smrg ._3DCommandOpcode = 0, \ 7663b8e80941Smrg .CommandSubType = 3, \ 7664b8e80941Smrg .CommandType = 3 7665b8e80941Smrg 7666b8e80941Smrgstruct GEN10_3DSTATE_WM_DEPTH_STENCIL { 7667b8e80941Smrg uint32_t DWordLength; 7668b8e80941Smrg uint32_t _3DCommandSubOpcode; 7669b8e80941Smrg uint32_t _3DCommandOpcode; 7670b8e80941Smrg uint32_t CommandSubType; 7671b8e80941Smrg uint32_t CommandType; 7672b8e80941Smrg bool DepthBufferWriteEnable; 7673b8e80941Smrg bool DepthTestEnable; 7674b8e80941Smrg bool StencilBufferWriteEnable; 7675b8e80941Smrg bool StencilTestEnable; 7676b8e80941Smrg bool DoubleSidedStencilEnable; 7677b8e80941Smrg enum GEN10_3D_Compare_Function DepthTestFunction; 7678b8e80941Smrg enum GEN10_3D_Compare_Function StencilTestFunction; 7679b8e80941Smrg enum GEN10_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; 7680b8e80941Smrg enum GEN10_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; 7681b8e80941Smrg enum GEN10_3D_Stencil_Operation BackfaceStencilFailOp; 7682b8e80941Smrg enum GEN10_3D_Compare_Function BackfaceStencilTestFunction; 7683b8e80941Smrg enum GEN10_3D_Stencil_Operation StencilPassDepthPassOp; 7684b8e80941Smrg enum GEN10_3D_Stencil_Operation StencilPassDepthFailOp; 7685b8e80941Smrg enum GEN10_3D_Stencil_Operation StencilFailOp; 7686b8e80941Smrg uint32_t BackfaceStencilWriteMask; 7687b8e80941Smrg uint32_t BackfaceStencilTestMask; 7688b8e80941Smrg uint32_t StencilWriteMask; 7689b8e80941Smrg uint32_t StencilTestMask; 7690b8e80941Smrg uint32_t BackfaceStencilReferenceValue; 7691b8e80941Smrg uint32_t StencilReferenceValue; 7692b8e80941Smrg}; 7693b8e80941Smrg 7694b8e80941Smrgstatic inline void 7695b8e80941SmrgGEN10_3DSTATE_WM_DEPTH_STENCIL_pack(__attribute__((unused)) __gen_user_data *data, 7696b8e80941Smrg __attribute__((unused)) void * restrict dst, 7697b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_WM_DEPTH_STENCIL * restrict values) 7698b8e80941Smrg{ 7699b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7700b8e80941Smrg 7701b8e80941Smrg dw[0] = 7702b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7703b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7704b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7705b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7706b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7707b8e80941Smrg 7708b8e80941Smrg dw[1] = 7709b8e80941Smrg __gen_uint(values->DepthBufferWriteEnable, 0, 0) | 7710b8e80941Smrg __gen_uint(values->DepthTestEnable, 1, 1) | 7711b8e80941Smrg __gen_uint(values->StencilBufferWriteEnable, 2, 2) | 7712b8e80941Smrg __gen_uint(values->StencilTestEnable, 3, 3) | 7713b8e80941Smrg __gen_uint(values->DoubleSidedStencilEnable, 4, 4) | 7714b8e80941Smrg __gen_uint(values->DepthTestFunction, 5, 7) | 7715b8e80941Smrg __gen_uint(values->StencilTestFunction, 8, 10) | 7716b8e80941Smrg __gen_uint(values->BackfaceStencilPassDepthPassOp, 11, 13) | 7717b8e80941Smrg __gen_uint(values->BackfaceStencilPassDepthFailOp, 14, 16) | 7718b8e80941Smrg __gen_uint(values->BackfaceStencilFailOp, 17, 19) | 7719b8e80941Smrg __gen_uint(values->BackfaceStencilTestFunction, 20, 22) | 7720b8e80941Smrg __gen_uint(values->StencilPassDepthPassOp, 23, 25) | 7721b8e80941Smrg __gen_uint(values->StencilPassDepthFailOp, 26, 28) | 7722b8e80941Smrg __gen_uint(values->StencilFailOp, 29, 31); 7723b8e80941Smrg 7724b8e80941Smrg dw[2] = 7725b8e80941Smrg __gen_uint(values->BackfaceStencilWriteMask, 0, 7) | 7726b8e80941Smrg __gen_uint(values->BackfaceStencilTestMask, 8, 15) | 7727b8e80941Smrg __gen_uint(values->StencilWriteMask, 16, 23) | 7728b8e80941Smrg __gen_uint(values->StencilTestMask, 24, 31); 7729b8e80941Smrg 7730b8e80941Smrg dw[3] = 7731b8e80941Smrg __gen_uint(values->BackfaceStencilReferenceValue, 0, 7) | 7732b8e80941Smrg __gen_uint(values->StencilReferenceValue, 8, 15); 7733b8e80941Smrg} 7734b8e80941Smrg 7735b8e80941Smrg#define GEN10_3DSTATE_WM_HZ_OP_length 5 7736b8e80941Smrg#define GEN10_3DSTATE_WM_HZ_OP_length_bias 2 7737b8e80941Smrg#define GEN10_3DSTATE_WM_HZ_OP_header \ 7738b8e80941Smrg .DWordLength = 3, \ 7739b8e80941Smrg ._3DCommandSubOpcode = 82, \ 7740b8e80941Smrg ._3DCommandOpcode = 0, \ 7741b8e80941Smrg .CommandSubType = 3, \ 7742b8e80941Smrg .CommandType = 3 7743b8e80941Smrg 7744b8e80941Smrgstruct GEN10_3DSTATE_WM_HZ_OP { 7745b8e80941Smrg uint32_t DWordLength; 7746b8e80941Smrg uint32_t _3DCommandSubOpcode; 7747b8e80941Smrg uint32_t _3DCommandOpcode; 7748b8e80941Smrg uint32_t CommandSubType; 7749b8e80941Smrg uint32_t CommandType; 7750b8e80941Smrg uint32_t NumberofMultisamples; 7751b8e80941Smrg uint32_t StencilClearValue; 7752b8e80941Smrg bool FullSurfaceDepthandStencilClear; 7753b8e80941Smrg bool PixelPositionOffsetEnable; 7754b8e80941Smrg bool HierarchicalDepthBufferResolveEnable; 7755b8e80941Smrg bool DepthBufferResolveEnable; 7756b8e80941Smrg bool ScissorRectangleEnable; 7757b8e80941Smrg bool DepthBufferClearEnable; 7758b8e80941Smrg bool StencilBufferClearEnable; 7759b8e80941Smrg uint32_t ClearRectangleXMin; 7760b8e80941Smrg uint32_t ClearRectangleYMin; 7761b8e80941Smrg uint32_t ClearRectangleXMax; 7762b8e80941Smrg uint32_t ClearRectangleYMax; 7763b8e80941Smrg uint32_t SampleMask; 7764b8e80941Smrg}; 7765b8e80941Smrg 7766b8e80941Smrgstatic inline void 7767b8e80941SmrgGEN10_3DSTATE_WM_HZ_OP_pack(__attribute__((unused)) __gen_user_data *data, 7768b8e80941Smrg __attribute__((unused)) void * restrict dst, 7769b8e80941Smrg __attribute__((unused)) const struct GEN10_3DSTATE_WM_HZ_OP * restrict values) 7770b8e80941Smrg{ 7771b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7772b8e80941Smrg 7773b8e80941Smrg dw[0] = 7774b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7775b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7776b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 7777b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 7778b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7779b8e80941Smrg 7780b8e80941Smrg dw[1] = 7781b8e80941Smrg __gen_uint(values->NumberofMultisamples, 13, 15) | 7782b8e80941Smrg __gen_uint(values->StencilClearValue, 16, 23) | 7783b8e80941Smrg __gen_uint(values->FullSurfaceDepthandStencilClear, 25, 25) | 7784b8e80941Smrg __gen_uint(values->PixelPositionOffsetEnable, 26, 26) | 7785b8e80941Smrg __gen_uint(values->HierarchicalDepthBufferResolveEnable, 27, 27) | 7786b8e80941Smrg __gen_uint(values->DepthBufferResolveEnable, 28, 28) | 7787b8e80941Smrg __gen_uint(values->ScissorRectangleEnable, 29, 29) | 7788b8e80941Smrg __gen_uint(values->DepthBufferClearEnable, 30, 30) | 7789b8e80941Smrg __gen_uint(values->StencilBufferClearEnable, 31, 31); 7790b8e80941Smrg 7791b8e80941Smrg dw[2] = 7792b8e80941Smrg __gen_uint(values->ClearRectangleXMin, 0, 15) | 7793b8e80941Smrg __gen_uint(values->ClearRectangleYMin, 16, 31); 7794b8e80941Smrg 7795b8e80941Smrg dw[3] = 7796b8e80941Smrg __gen_uint(values->ClearRectangleXMax, 0, 15) | 7797b8e80941Smrg __gen_uint(values->ClearRectangleYMax, 16, 31); 7798b8e80941Smrg 7799b8e80941Smrg dw[4] = 7800b8e80941Smrg __gen_uint(values->SampleMask, 0, 15); 7801b8e80941Smrg} 7802b8e80941Smrg 7803b8e80941Smrg#define GEN10_GPGPU_WALKER_length 15 7804b8e80941Smrg#define GEN10_GPGPU_WALKER_length_bias 2 7805b8e80941Smrg#define GEN10_GPGPU_WALKER_header \ 7806b8e80941Smrg .DWordLength = 13, \ 7807b8e80941Smrg .SubOpcode = 5, \ 7808b8e80941Smrg .MediaCommandOpcode = 1, \ 7809b8e80941Smrg .Pipeline = 2, \ 7810b8e80941Smrg .CommandType = 3 7811b8e80941Smrg 7812b8e80941Smrgstruct GEN10_GPGPU_WALKER { 7813b8e80941Smrg uint32_t DWordLength; 7814b8e80941Smrg bool PredicateEnable; 7815b8e80941Smrg bool IndirectParameterEnable; 7816b8e80941Smrg uint32_t SubOpcode; 7817b8e80941Smrg uint32_t MediaCommandOpcode; 7818b8e80941Smrg uint32_t Pipeline; 7819b8e80941Smrg uint32_t CommandType; 7820b8e80941Smrg uint32_t InterfaceDescriptorOffset; 7821b8e80941Smrg uint32_t IndirectDataLength; 7822b8e80941Smrg uint64_t IndirectDataStartAddress; 7823b8e80941Smrg uint32_t ThreadWidthCounterMaximum; 7824b8e80941Smrg uint32_t ThreadHeightCounterMaximum; 7825b8e80941Smrg uint32_t ThreadDepthCounterMaximum; 7826b8e80941Smrg uint32_t SIMDSize; 7827b8e80941Smrg#define SIMD8 0 7828b8e80941Smrg#define SIMD16 1 7829b8e80941Smrg#define SIMD32 2 7830b8e80941Smrg uint32_t ThreadGroupIDStartingX; 7831b8e80941Smrg uint32_t ThreadGroupIDXDimension; 7832b8e80941Smrg uint32_t ThreadGroupIDStartingY; 7833b8e80941Smrg uint32_t ThreadGroupIDYDimension; 7834b8e80941Smrg uint32_t ThreadGroupIDStartingResumeZ; 7835b8e80941Smrg uint32_t ThreadGroupIDZDimension; 7836b8e80941Smrg uint32_t RightExecutionMask; 7837b8e80941Smrg uint32_t BottomExecutionMask; 7838b8e80941Smrg}; 7839b8e80941Smrg 7840b8e80941Smrgstatic inline void 7841b8e80941SmrgGEN10_GPGPU_WALKER_pack(__attribute__((unused)) __gen_user_data *data, 7842b8e80941Smrg __attribute__((unused)) void * restrict dst, 7843b8e80941Smrg __attribute__((unused)) const struct GEN10_GPGPU_WALKER * restrict values) 7844b8e80941Smrg{ 7845b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7846b8e80941Smrg 7847b8e80941Smrg dw[0] = 7848b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 7849b8e80941Smrg __gen_uint(values->PredicateEnable, 8, 8) | 7850b8e80941Smrg __gen_uint(values->IndirectParameterEnable, 10, 10) | 7851b8e80941Smrg __gen_uint(values->SubOpcode, 16, 23) | 7852b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 7853b8e80941Smrg __gen_uint(values->Pipeline, 27, 28) | 7854b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7855b8e80941Smrg 7856b8e80941Smrg dw[1] = 7857b8e80941Smrg __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 7858b8e80941Smrg 7859b8e80941Smrg dw[2] = 7860b8e80941Smrg __gen_uint(values->IndirectDataLength, 0, 16); 7861b8e80941Smrg 7862b8e80941Smrg dw[3] = 7863b8e80941Smrg __gen_offset(values->IndirectDataStartAddress, 6, 31); 7864b8e80941Smrg 7865b8e80941Smrg dw[4] = 7866b8e80941Smrg __gen_uint(values->ThreadWidthCounterMaximum, 0, 5) | 7867b8e80941Smrg __gen_uint(values->ThreadHeightCounterMaximum, 8, 13) | 7868b8e80941Smrg __gen_uint(values->ThreadDepthCounterMaximum, 16, 21) | 7869b8e80941Smrg __gen_uint(values->SIMDSize, 30, 31); 7870b8e80941Smrg 7871b8e80941Smrg dw[5] = 7872b8e80941Smrg __gen_uint(values->ThreadGroupIDStartingX, 0, 31); 7873b8e80941Smrg 7874b8e80941Smrg dw[6] = 0; 7875b8e80941Smrg 7876b8e80941Smrg dw[7] = 7877b8e80941Smrg __gen_uint(values->ThreadGroupIDXDimension, 0, 31); 7878b8e80941Smrg 7879b8e80941Smrg dw[8] = 7880b8e80941Smrg __gen_uint(values->ThreadGroupIDStartingY, 0, 31); 7881b8e80941Smrg 7882b8e80941Smrg dw[9] = 0; 7883b8e80941Smrg 7884b8e80941Smrg dw[10] = 7885b8e80941Smrg __gen_uint(values->ThreadGroupIDYDimension, 0, 31); 7886b8e80941Smrg 7887b8e80941Smrg dw[11] = 7888b8e80941Smrg __gen_uint(values->ThreadGroupIDStartingResumeZ, 0, 31); 7889b8e80941Smrg 7890b8e80941Smrg dw[12] = 7891b8e80941Smrg __gen_uint(values->ThreadGroupIDZDimension, 0, 31); 7892b8e80941Smrg 7893b8e80941Smrg dw[13] = 7894b8e80941Smrg __gen_uint(values->RightExecutionMask, 0, 31); 7895b8e80941Smrg 7896b8e80941Smrg dw[14] = 7897b8e80941Smrg __gen_uint(values->BottomExecutionMask, 0, 31); 7898b8e80941Smrg} 7899b8e80941Smrg 7900b8e80941Smrg#define GEN10_MEDIA_CURBE_LOAD_length 4 7901b8e80941Smrg#define GEN10_MEDIA_CURBE_LOAD_length_bias 2 7902b8e80941Smrg#define GEN10_MEDIA_CURBE_LOAD_header \ 7903b8e80941Smrg .DWordLength = 2, \ 7904b8e80941Smrg .SubOpcode = 1, \ 7905b8e80941Smrg .MediaCommandOpcode = 0, \ 7906b8e80941Smrg .Pipeline = 2, \ 7907b8e80941Smrg .CommandType = 3 7908b8e80941Smrg 7909b8e80941Smrgstruct GEN10_MEDIA_CURBE_LOAD { 7910b8e80941Smrg uint32_t DWordLength; 7911b8e80941Smrg uint32_t SubOpcode; 7912b8e80941Smrg uint32_t MediaCommandOpcode; 7913b8e80941Smrg uint32_t Pipeline; 7914b8e80941Smrg uint32_t CommandType; 7915b8e80941Smrg uint32_t CURBETotalDataLength; 7916b8e80941Smrg uint32_t CURBEDataStartAddress; 7917b8e80941Smrg}; 7918b8e80941Smrg 7919b8e80941Smrgstatic inline void 7920b8e80941SmrgGEN10_MEDIA_CURBE_LOAD_pack(__attribute__((unused)) __gen_user_data *data, 7921b8e80941Smrg __attribute__((unused)) void * restrict dst, 7922b8e80941Smrg __attribute__((unused)) const struct GEN10_MEDIA_CURBE_LOAD * restrict values) 7923b8e80941Smrg{ 7924b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7925b8e80941Smrg 7926b8e80941Smrg dw[0] = 7927b8e80941Smrg __gen_uint(values->DWordLength, 0, 15) | 7928b8e80941Smrg __gen_uint(values->SubOpcode, 16, 23) | 7929b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 7930b8e80941Smrg __gen_uint(values->Pipeline, 27, 28) | 7931b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7932b8e80941Smrg 7933b8e80941Smrg dw[1] = 0; 7934b8e80941Smrg 7935b8e80941Smrg dw[2] = 7936b8e80941Smrg __gen_uint(values->CURBETotalDataLength, 0, 16); 7937b8e80941Smrg 7938b8e80941Smrg dw[3] = 7939b8e80941Smrg __gen_uint(values->CURBEDataStartAddress, 0, 31); 7940b8e80941Smrg} 7941b8e80941Smrg 7942b8e80941Smrg#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4 7943b8e80941Smrg#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 2 7944b8e80941Smrg#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\ 7945b8e80941Smrg .DWordLength = 2, \ 7946b8e80941Smrg .SubOpcode = 2, \ 7947b8e80941Smrg .MediaCommandOpcode = 0, \ 7948b8e80941Smrg .Pipeline = 2, \ 7949b8e80941Smrg .CommandType = 3 7950b8e80941Smrg 7951b8e80941Smrgstruct GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD { 7952b8e80941Smrg uint32_t DWordLength; 7953b8e80941Smrg uint32_t SubOpcode; 7954b8e80941Smrg uint32_t MediaCommandOpcode; 7955b8e80941Smrg uint32_t Pipeline; 7956b8e80941Smrg uint32_t CommandType; 7957b8e80941Smrg uint32_t InterfaceDescriptorTotalLength; 7958b8e80941Smrg uint64_t InterfaceDescriptorDataStartAddress; 7959b8e80941Smrg}; 7960b8e80941Smrg 7961b8e80941Smrgstatic inline void 7962b8e80941SmrgGEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__attribute__((unused)) __gen_user_data *data, 7963b8e80941Smrg __attribute__((unused)) void * restrict dst, 7964b8e80941Smrg __attribute__((unused)) const struct GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values) 7965b8e80941Smrg{ 7966b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 7967b8e80941Smrg 7968b8e80941Smrg dw[0] = 7969b8e80941Smrg __gen_uint(values->DWordLength, 0, 15) | 7970b8e80941Smrg __gen_uint(values->SubOpcode, 16, 23) | 7971b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 7972b8e80941Smrg __gen_uint(values->Pipeline, 27, 28) | 7973b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 7974b8e80941Smrg 7975b8e80941Smrg dw[1] = 0; 7976b8e80941Smrg 7977b8e80941Smrg dw[2] = 7978b8e80941Smrg __gen_uint(values->InterfaceDescriptorTotalLength, 0, 16); 7979b8e80941Smrg 7980b8e80941Smrg dw[3] = 7981b8e80941Smrg __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31); 7982b8e80941Smrg} 7983b8e80941Smrg 7984b8e80941Smrg#define GEN10_MEDIA_OBJECT_length_bias 2 7985b8e80941Smrg#define GEN10_MEDIA_OBJECT_header \ 7986b8e80941Smrg .DWordLength = 4, \ 7987b8e80941Smrg .MediaCommandSubOpcode = 0, \ 7988b8e80941Smrg .MediaCommandOpcode = 1, \ 7989b8e80941Smrg .MediaCommandPipeline = 2, \ 7990b8e80941Smrg .CommandType = 3 7991b8e80941Smrg 7992b8e80941Smrgstruct GEN10_MEDIA_OBJECT { 7993b8e80941Smrg uint32_t DWordLength; 7994b8e80941Smrg uint32_t MediaCommandSubOpcode; 7995b8e80941Smrg uint32_t MediaCommandOpcode; 7996b8e80941Smrg uint32_t MediaCommandPipeline; 7997b8e80941Smrg uint32_t CommandType; 7998b8e80941Smrg uint32_t InterfaceDescriptorOffset; 7999b8e80941Smrg uint32_t IndirectDataLength; 8000b8e80941Smrg uint32_t SubSliceDestinationSelect; 8001b8e80941Smrg#define Subslice3 3 8002b8e80941Smrg#define SubSlice2 2 8003b8e80941Smrg#define SubSlice1 1 8004b8e80941Smrg#define SubSlice0 0 8005b8e80941Smrg uint32_t SliceDestinationSelect; 8006b8e80941Smrg#define Slice0 0 8007b8e80941Smrg#define Slice1 1 8008b8e80941Smrg#define Slice2 2 8009b8e80941Smrg uint32_t UseScoreboard; 8010b8e80941Smrg#define Notusingscoreboard 0 8011b8e80941Smrg#define Usingscoreboard 1 8012b8e80941Smrg uint32_t ForceDestination; 8013b8e80941Smrg uint32_t ThreadSynchronization; 8014b8e80941Smrg#define Nothreadsynchronization 0 8015b8e80941Smrg#define Threaddispatchissynchronizedbythespawnrootthreadmessage 1 8016b8e80941Smrg uint32_t SliceDestinationSelectMSBs; 8017b8e80941Smrg bool ChildrenPresent; 8018b8e80941Smrg __gen_address_type IndirectDataStartAddress; 8019b8e80941Smrg uint32_t ScoreboardX; 8020b8e80941Smrg uint32_t ScoredboardY; 8021b8e80941Smrg uint32_t ScoreboardMask; 8022b8e80941Smrg uint32_t ScoreboardColor; 8023b8e80941Smrg /* variable length fields follow */ 8024b8e80941Smrg}; 8025b8e80941Smrg 8026b8e80941Smrgstatic inline void 8027b8e80941SmrgGEN10_MEDIA_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 8028b8e80941Smrg __attribute__((unused)) void * restrict dst, 8029b8e80941Smrg __attribute__((unused)) const struct GEN10_MEDIA_OBJECT * restrict values) 8030b8e80941Smrg{ 8031b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8032b8e80941Smrg 8033b8e80941Smrg dw[0] = 8034b8e80941Smrg __gen_uint(values->DWordLength, 0, 14) | 8035b8e80941Smrg __gen_uint(values->MediaCommandSubOpcode, 16, 23) | 8036b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 8037b8e80941Smrg __gen_uint(values->MediaCommandPipeline, 27, 28) | 8038b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8039b8e80941Smrg 8040b8e80941Smrg dw[1] = 8041b8e80941Smrg __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8042b8e80941Smrg 8043b8e80941Smrg dw[2] = 8044b8e80941Smrg __gen_uint(values->IndirectDataLength, 0, 16) | 8045b8e80941Smrg __gen_uint(values->SubSliceDestinationSelect, 17, 18) | 8046b8e80941Smrg __gen_uint(values->SliceDestinationSelect, 19, 20) | 8047b8e80941Smrg __gen_uint(values->UseScoreboard, 21, 21) | 8048b8e80941Smrg __gen_uint(values->ForceDestination, 22, 22) | 8049b8e80941Smrg __gen_uint(values->ThreadSynchronization, 24, 24) | 8050b8e80941Smrg __gen_uint(values->SliceDestinationSelectMSBs, 25, 26) | 8051b8e80941Smrg __gen_uint(values->ChildrenPresent, 31, 31); 8052b8e80941Smrg 8053b8e80941Smrg dw[3] = __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, 0); 8054b8e80941Smrg 8055b8e80941Smrg dw[4] = 8056b8e80941Smrg __gen_uint(values->ScoreboardX, 0, 8) | 8057b8e80941Smrg __gen_uint(values->ScoredboardY, 16, 24); 8058b8e80941Smrg 8059b8e80941Smrg dw[5] = 8060b8e80941Smrg __gen_uint(values->ScoreboardMask, 0, 7) | 8061b8e80941Smrg __gen_uint(values->ScoreboardColor, 16, 19); 8062b8e80941Smrg} 8063b8e80941Smrg 8064b8e80941Smrg#define GEN10_MEDIA_OBJECT_GRPID_length_bias 2 8065b8e80941Smrg#define GEN10_MEDIA_OBJECT_GRPID_header \ 8066b8e80941Smrg .DWordLength = 5, \ 8067b8e80941Smrg .MediaCommandSubOpcode = 6, \ 8068b8e80941Smrg .MediaCommandOpcode = 1, \ 8069b8e80941Smrg .MediaCommandPipeline = 2, \ 8070b8e80941Smrg .CommandType = 3 8071b8e80941Smrg 8072b8e80941Smrgstruct GEN10_MEDIA_OBJECT_GRPID { 8073b8e80941Smrg uint32_t DWordLength; 8074b8e80941Smrg uint32_t MediaCommandSubOpcode; 8075b8e80941Smrg uint32_t MediaCommandOpcode; 8076b8e80941Smrg uint32_t MediaCommandPipeline; 8077b8e80941Smrg uint32_t CommandType; 8078b8e80941Smrg uint32_t InterfaceDescriptorOffset; 8079b8e80941Smrg uint32_t IndirectDataLength; 8080b8e80941Smrg uint32_t UseScoreboard; 8081b8e80941Smrg#define Notusingscoreboard 0 8082b8e80941Smrg#define Usingscoreboard 1 8083b8e80941Smrg uint32_t EndofThreadGroup; 8084b8e80941Smrg __gen_address_type IndirectDataStartAddress; 8085b8e80941Smrg uint32_t ScoreboardX; 8086b8e80941Smrg uint32_t ScoreboardY; 8087b8e80941Smrg uint32_t ScoreboardMask; 8088b8e80941Smrg uint32_t ScoreboardColor; 8089b8e80941Smrg uint32_t GroupID; 8090b8e80941Smrg /* variable length fields follow */ 8091b8e80941Smrg}; 8092b8e80941Smrg 8093b8e80941Smrgstatic inline void 8094b8e80941SmrgGEN10_MEDIA_OBJECT_GRPID_pack(__attribute__((unused)) __gen_user_data *data, 8095b8e80941Smrg __attribute__((unused)) void * restrict dst, 8096b8e80941Smrg __attribute__((unused)) const struct GEN10_MEDIA_OBJECT_GRPID * restrict values) 8097b8e80941Smrg{ 8098b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8099b8e80941Smrg 8100b8e80941Smrg dw[0] = 8101b8e80941Smrg __gen_uint(values->DWordLength, 0, 15) | 8102b8e80941Smrg __gen_uint(values->MediaCommandSubOpcode, 16, 23) | 8103b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 8104b8e80941Smrg __gen_uint(values->MediaCommandPipeline, 27, 28) | 8105b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8106b8e80941Smrg 8107b8e80941Smrg dw[1] = 8108b8e80941Smrg __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8109b8e80941Smrg 8110b8e80941Smrg dw[2] = 8111b8e80941Smrg __gen_uint(values->IndirectDataLength, 0, 16) | 8112b8e80941Smrg __gen_uint(values->UseScoreboard, 21, 21) | 8113b8e80941Smrg __gen_uint(values->EndofThreadGroup, 23, 23); 8114b8e80941Smrg 8115b8e80941Smrg dw[3] = __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, 0); 8116b8e80941Smrg 8117b8e80941Smrg dw[4] = 8118b8e80941Smrg __gen_uint(values->ScoreboardX, 0, 8) | 8119b8e80941Smrg __gen_uint(values->ScoreboardY, 16, 24); 8120b8e80941Smrg 8121b8e80941Smrg dw[5] = 8122b8e80941Smrg __gen_uint(values->ScoreboardMask, 0, 7) | 8123b8e80941Smrg __gen_uint(values->ScoreboardColor, 16, 19); 8124b8e80941Smrg 8125b8e80941Smrg dw[6] = 8126b8e80941Smrg __gen_uint(values->GroupID, 0, 31); 8127b8e80941Smrg} 8128b8e80941Smrg 8129b8e80941Smrg#define GEN10_MEDIA_OBJECT_PRT_length 16 8130b8e80941Smrg#define GEN10_MEDIA_OBJECT_PRT_length_bias 2 8131b8e80941Smrg#define GEN10_MEDIA_OBJECT_PRT_header \ 8132b8e80941Smrg .DWordLength = 14, \ 8133b8e80941Smrg .SubOpcode = 2, \ 8134b8e80941Smrg .MediaCommandOpcode = 1, \ 8135b8e80941Smrg .Pipeline = 2, \ 8136b8e80941Smrg .CommandType = 3 8137b8e80941Smrg 8138b8e80941Smrgstruct GEN10_MEDIA_OBJECT_PRT { 8139b8e80941Smrg uint32_t DWordLength; 8140b8e80941Smrg uint32_t SubOpcode; 8141b8e80941Smrg uint32_t MediaCommandOpcode; 8142b8e80941Smrg uint32_t Pipeline; 8143b8e80941Smrg uint32_t CommandType; 8144b8e80941Smrg uint32_t InterfaceDescriptorOffset; 8145b8e80941Smrg uint32_t PRT_FenceType; 8146b8e80941Smrg#define Rootthreadqueue 0 8147b8e80941Smrg#define VFEstateflush 1 8148b8e80941Smrg bool PRT_FenceNeeded; 8149b8e80941Smrg bool ChildrenPresent; 8150b8e80941Smrg uint32_t InlineData[12]; 8151b8e80941Smrg}; 8152b8e80941Smrg 8153b8e80941Smrgstatic inline void 8154b8e80941SmrgGEN10_MEDIA_OBJECT_PRT_pack(__attribute__((unused)) __gen_user_data *data, 8155b8e80941Smrg __attribute__((unused)) void * restrict dst, 8156b8e80941Smrg __attribute__((unused)) const struct GEN10_MEDIA_OBJECT_PRT * restrict values) 8157b8e80941Smrg{ 8158b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8159b8e80941Smrg 8160b8e80941Smrg dw[0] = 8161b8e80941Smrg __gen_uint(values->DWordLength, 0, 14) | 8162b8e80941Smrg __gen_uint(values->SubOpcode, 16, 23) | 8163b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 8164b8e80941Smrg __gen_uint(values->Pipeline, 27, 28) | 8165b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8166b8e80941Smrg 8167b8e80941Smrg dw[1] = 8168b8e80941Smrg __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8169b8e80941Smrg 8170b8e80941Smrg dw[2] = 8171b8e80941Smrg __gen_uint(values->PRT_FenceType, 22, 22) | 8172b8e80941Smrg __gen_uint(values->PRT_FenceNeeded, 23, 23) | 8173b8e80941Smrg __gen_uint(values->ChildrenPresent, 31, 31); 8174b8e80941Smrg 8175b8e80941Smrg dw[3] = 0; 8176b8e80941Smrg 8177b8e80941Smrg dw[4] = 8178b8e80941Smrg __gen_uint(values->InlineData[0], 0, 31); 8179b8e80941Smrg 8180b8e80941Smrg dw[5] = 8181b8e80941Smrg __gen_uint(values->InlineData[1], 0, 31); 8182b8e80941Smrg 8183b8e80941Smrg dw[6] = 8184b8e80941Smrg __gen_uint(values->InlineData[2], 0, 31); 8185b8e80941Smrg 8186b8e80941Smrg dw[7] = 8187b8e80941Smrg __gen_uint(values->InlineData[3], 0, 31); 8188b8e80941Smrg 8189b8e80941Smrg dw[8] = 8190b8e80941Smrg __gen_uint(values->InlineData[4], 0, 31); 8191b8e80941Smrg 8192b8e80941Smrg dw[9] = 8193b8e80941Smrg __gen_uint(values->InlineData[5], 0, 31); 8194b8e80941Smrg 8195b8e80941Smrg dw[10] = 8196b8e80941Smrg __gen_uint(values->InlineData[6], 0, 31); 8197b8e80941Smrg 8198b8e80941Smrg dw[11] = 8199b8e80941Smrg __gen_uint(values->InlineData[7], 0, 31); 8200b8e80941Smrg 8201b8e80941Smrg dw[12] = 8202b8e80941Smrg __gen_uint(values->InlineData[8], 0, 31); 8203b8e80941Smrg 8204b8e80941Smrg dw[13] = 8205b8e80941Smrg __gen_uint(values->InlineData[9], 0, 31); 8206b8e80941Smrg 8207b8e80941Smrg dw[14] = 8208b8e80941Smrg __gen_uint(values->InlineData[10], 0, 31); 8209b8e80941Smrg 8210b8e80941Smrg dw[15] = 8211b8e80941Smrg __gen_uint(values->InlineData[11], 0, 31); 8212b8e80941Smrg} 8213b8e80941Smrg 8214b8e80941Smrg#define GEN10_MEDIA_OBJECT_WALKER_length_bias 2 8215b8e80941Smrg#define GEN10_MEDIA_OBJECT_WALKER_header \ 8216b8e80941Smrg .DWordLength = 15, \ 8217b8e80941Smrg .SubOpcode = 3, \ 8218b8e80941Smrg .MediaCommandOpcode = 1, \ 8219b8e80941Smrg .Pipeline = 2, \ 8220b8e80941Smrg .CommandType = 3 8221b8e80941Smrg 8222b8e80941Smrgstruct GEN10_MEDIA_OBJECT_WALKER { 8223b8e80941Smrg uint32_t DWordLength; 8224b8e80941Smrg uint32_t SubOpcode; 8225b8e80941Smrg uint32_t MediaCommandOpcode; 8226b8e80941Smrg uint32_t Pipeline; 8227b8e80941Smrg uint32_t CommandType; 8228b8e80941Smrg uint32_t InterfaceDescriptorOffset; 8229b8e80941Smrg uint32_t IndirectDataLength; 8230b8e80941Smrg uint32_t UseScoreboard; 8231b8e80941Smrg#define Notusingscoreboard 0 8232b8e80941Smrg#define Usingscoreboard 1 8233b8e80941Smrg uint32_t MaskedDispatch; 8234b8e80941Smrg uint32_t ThreadSynchronization; 8235b8e80941Smrg#define Nothreadsynchronization 0 8236b8e80941Smrg#define Threaddispatchissynchronizedbythespawnrootthreadmessage 1 8237b8e80941Smrg uint32_t IndirectDataStartAddress; 8238b8e80941Smrg uint32_t ScoreboardMask; 8239b8e80941Smrg uint32_t GroupIDLoopSelect; 8240b8e80941Smrg#define No_Groups 0 8241b8e80941Smrg#define Color_Groups 1 8242b8e80941Smrg#define InnerLocal_Groups 2 8243b8e80941Smrg#define MidLocal_Groups 3 8244b8e80941Smrg#define OuterLocal_Groups 4 8245b8e80941Smrg#define InnerGlobal_Groups 5 8246b8e80941Smrg int32_t MidLoopUnitX; 8247b8e80941Smrg int32_t LocalMidLoopUnitY; 8248b8e80941Smrg uint32_t MiddleLoopExtraSteps; 8249b8e80941Smrg uint32_t ColorCountMinusOne; 8250b8e80941Smrg uint32_t LocalLoopExecCount; 8251b8e80941Smrg uint32_t GlobalLoopExecCount; 8252b8e80941Smrg uint32_t BlockResolutionX; 8253b8e80941Smrg uint32_t BlockResolutionY; 8254b8e80941Smrg uint32_t LocalStartX; 8255b8e80941Smrg uint32_t LocalStartY; 8256b8e80941Smrg int32_t LocalOuterLoopStrideX; 8257b8e80941Smrg int32_t LocalOuterLoopStrideY; 8258b8e80941Smrg int32_t LocalInnerLoopUnitX; 8259b8e80941Smrg int32_t LocalInnerLoopUnitY; 8260b8e80941Smrg uint32_t GlobalResolutionX; 8261b8e80941Smrg uint32_t GlobalResolutionY; 8262b8e80941Smrg int32_t GlobalStartX; 8263b8e80941Smrg int32_t GlobalStartY; 8264b8e80941Smrg int32_t GlobalOuterLoopStrideX; 8265b8e80941Smrg int32_t GlobalOuterLoopStrideY; 8266b8e80941Smrg int32_t GlobalInnerLoopUnitX; 8267b8e80941Smrg int32_t GlobalInnerLoopUnitY; 8268b8e80941Smrg /* variable length fields follow */ 8269b8e80941Smrg}; 8270b8e80941Smrg 8271b8e80941Smrgstatic inline void 8272b8e80941SmrgGEN10_MEDIA_OBJECT_WALKER_pack(__attribute__((unused)) __gen_user_data *data, 8273b8e80941Smrg __attribute__((unused)) void * restrict dst, 8274b8e80941Smrg __attribute__((unused)) const struct GEN10_MEDIA_OBJECT_WALKER * restrict values) 8275b8e80941Smrg{ 8276b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8277b8e80941Smrg 8278b8e80941Smrg dw[0] = 8279b8e80941Smrg __gen_uint(values->DWordLength, 0, 14) | 8280b8e80941Smrg __gen_uint(values->SubOpcode, 16, 23) | 8281b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 8282b8e80941Smrg __gen_uint(values->Pipeline, 27, 28) | 8283b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8284b8e80941Smrg 8285b8e80941Smrg dw[1] = 8286b8e80941Smrg __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8287b8e80941Smrg 8288b8e80941Smrg dw[2] = 8289b8e80941Smrg __gen_uint(values->IndirectDataLength, 0, 16) | 8290b8e80941Smrg __gen_uint(values->UseScoreboard, 21, 21) | 8291b8e80941Smrg __gen_uint(values->MaskedDispatch, 22, 23) | 8292b8e80941Smrg __gen_uint(values->ThreadSynchronization, 24, 24); 8293b8e80941Smrg 8294b8e80941Smrg dw[3] = 8295b8e80941Smrg __gen_uint(values->IndirectDataStartAddress, 0, 31); 8296b8e80941Smrg 8297b8e80941Smrg dw[4] = 0; 8298b8e80941Smrg 8299b8e80941Smrg dw[5] = 8300b8e80941Smrg __gen_uint(values->ScoreboardMask, 0, 7) | 8301b8e80941Smrg __gen_uint(values->GroupIDLoopSelect, 8, 31); 8302b8e80941Smrg 8303b8e80941Smrg dw[6] = 8304b8e80941Smrg __gen_sint(values->MidLoopUnitX, 8, 9) | 8305b8e80941Smrg __gen_sint(values->LocalMidLoopUnitY, 12, 13) | 8306b8e80941Smrg __gen_uint(values->MiddleLoopExtraSteps, 16, 20) | 8307b8e80941Smrg __gen_uint(values->ColorCountMinusOne, 24, 27); 8308b8e80941Smrg 8309b8e80941Smrg dw[7] = 8310b8e80941Smrg __gen_uint(values->LocalLoopExecCount, 0, 11) | 8311b8e80941Smrg __gen_uint(values->GlobalLoopExecCount, 16, 27); 8312b8e80941Smrg 8313b8e80941Smrg dw[8] = 8314b8e80941Smrg __gen_uint(values->BlockResolutionX, 0, 10) | 8315b8e80941Smrg __gen_uint(values->BlockResolutionY, 16, 26); 8316b8e80941Smrg 8317b8e80941Smrg dw[9] = 8318b8e80941Smrg __gen_uint(values->LocalStartX, 0, 10) | 8319b8e80941Smrg __gen_uint(values->LocalStartY, 16, 26); 8320b8e80941Smrg 8321b8e80941Smrg dw[10] = 0; 8322b8e80941Smrg 8323b8e80941Smrg dw[11] = 8324b8e80941Smrg __gen_sint(values->LocalOuterLoopStrideX, 0, 11) | 8325b8e80941Smrg __gen_sint(values->LocalOuterLoopStrideY, 16, 27); 8326b8e80941Smrg 8327b8e80941Smrg dw[12] = 8328b8e80941Smrg __gen_sint(values->LocalInnerLoopUnitX, 0, 11) | 8329b8e80941Smrg __gen_sint(values->LocalInnerLoopUnitY, 16, 27); 8330b8e80941Smrg 8331b8e80941Smrg dw[13] = 8332b8e80941Smrg __gen_uint(values->GlobalResolutionX, 0, 10) | 8333b8e80941Smrg __gen_uint(values->GlobalResolutionY, 16, 26); 8334b8e80941Smrg 8335b8e80941Smrg dw[14] = 8336b8e80941Smrg __gen_sint(values->GlobalStartX, 0, 11) | 8337b8e80941Smrg __gen_sint(values->GlobalStartY, 16, 27); 8338b8e80941Smrg 8339b8e80941Smrg dw[15] = 8340b8e80941Smrg __gen_sint(values->GlobalOuterLoopStrideX, 0, 11) | 8341b8e80941Smrg __gen_sint(values->GlobalOuterLoopStrideY, 16, 27); 8342b8e80941Smrg 8343b8e80941Smrg dw[16] = 8344b8e80941Smrg __gen_sint(values->GlobalInnerLoopUnitX, 0, 11) | 8345b8e80941Smrg __gen_sint(values->GlobalInnerLoopUnitY, 16, 27); 8346b8e80941Smrg} 8347b8e80941Smrg 8348b8e80941Smrg#define GEN10_MEDIA_STATE_FLUSH_length 2 8349b8e80941Smrg#define GEN10_MEDIA_STATE_FLUSH_length_bias 2 8350b8e80941Smrg#define GEN10_MEDIA_STATE_FLUSH_header \ 8351b8e80941Smrg .DWordLength = 0, \ 8352b8e80941Smrg .SubOpcode = 4, \ 8353b8e80941Smrg .MediaCommandOpcode = 0, \ 8354b8e80941Smrg .Pipeline = 2, \ 8355b8e80941Smrg .CommandType = 3 8356b8e80941Smrg 8357b8e80941Smrgstruct GEN10_MEDIA_STATE_FLUSH { 8358b8e80941Smrg uint32_t DWordLength; 8359b8e80941Smrg uint32_t SubOpcode; 8360b8e80941Smrg uint32_t MediaCommandOpcode; 8361b8e80941Smrg uint32_t Pipeline; 8362b8e80941Smrg uint32_t CommandType; 8363b8e80941Smrg uint32_t InterfaceDescriptorOffset; 8364b8e80941Smrg uint32_t WatermarkRequired; 8365b8e80941Smrg bool FlushtoGO; 8366b8e80941Smrg}; 8367b8e80941Smrg 8368b8e80941Smrgstatic inline void 8369b8e80941SmrgGEN10_MEDIA_STATE_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 8370b8e80941Smrg __attribute__((unused)) void * restrict dst, 8371b8e80941Smrg __attribute__((unused)) const struct GEN10_MEDIA_STATE_FLUSH * restrict values) 8372b8e80941Smrg{ 8373b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8374b8e80941Smrg 8375b8e80941Smrg dw[0] = 8376b8e80941Smrg __gen_uint(values->DWordLength, 0, 15) | 8377b8e80941Smrg __gen_uint(values->SubOpcode, 16, 23) | 8378b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 8379b8e80941Smrg __gen_uint(values->Pipeline, 27, 28) | 8380b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8381b8e80941Smrg 8382b8e80941Smrg dw[1] = 8383b8e80941Smrg __gen_uint(values->InterfaceDescriptorOffset, 0, 5) | 8384b8e80941Smrg __gen_uint(values->WatermarkRequired, 6, 6) | 8385b8e80941Smrg __gen_uint(values->FlushtoGO, 7, 7); 8386b8e80941Smrg} 8387b8e80941Smrg 8388b8e80941Smrg#define GEN10_MEDIA_VFE_STATE_length 9 8389b8e80941Smrg#define GEN10_MEDIA_VFE_STATE_length_bias 2 8390b8e80941Smrg#define GEN10_MEDIA_VFE_STATE_header \ 8391b8e80941Smrg .DWordLength = 7, \ 8392b8e80941Smrg .SubOpcode = 0, \ 8393b8e80941Smrg .MediaCommandOpcode = 0, \ 8394b8e80941Smrg .Pipeline = 2, \ 8395b8e80941Smrg .CommandType = 3 8396b8e80941Smrg 8397b8e80941Smrgstruct GEN10_MEDIA_VFE_STATE { 8398b8e80941Smrg uint32_t DWordLength; 8399b8e80941Smrg uint32_t SubOpcode; 8400b8e80941Smrg uint32_t MediaCommandOpcode; 8401b8e80941Smrg uint32_t Pipeline; 8402b8e80941Smrg uint32_t CommandType; 8403b8e80941Smrg uint32_t PerThreadScratchSpace; 8404b8e80941Smrg uint32_t StackSize; 8405b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 8406b8e80941Smrg uint32_t SLMBankSelectionPolicy; 8407b8e80941Smrg#define Legacy 0 8408b8e80941Smrg#define SLMLoadBalance 1 8409b8e80941Smrg uint32_t ThreadDispatchSelectionPolicy; 8410b8e80941Smrg#define Legacy 0 8411b8e80941Smrg#define Prefer1SS 1 8412b8e80941Smrg#define Prefer2SS 2 8413b8e80941Smrg#define LoadBalance 3 8414b8e80941Smrg uint32_t ResetGatewayTimer; 8415b8e80941Smrg#define Maintainingtheexistingtimestampstate 0 8416b8e80941Smrg#define Resettingrelativetimerandlatchingtheglobaltimestamp 1 8417b8e80941Smrg uint32_t NumberofURBEntries; 8418b8e80941Smrg uint32_t MaximumNumberofThreads; 8419b8e80941Smrg uint32_t SliceDisable; 8420b8e80941Smrg#define AllSubslicesEnabled 0 8421b8e80941Smrg#define OnlySlice0Enabled 1 8422b8e80941Smrg#define OnlySlice0Subslice0Enabled 3 8423b8e80941Smrg uint32_t CURBEAllocationSize; 8424b8e80941Smrg uint32_t URBEntryAllocationSize; 8425b8e80941Smrg uint32_t ScoreboardMask; 8426b8e80941Smrg uint32_t NumberofMediaObjectsperPreEmptionCheckpoint; 8427b8e80941Smrg uint32_t ScoreboardType; 8428b8e80941Smrg#define StallingScoreboard 0 8429b8e80941Smrg#define NonStallingScoreboard 1 8430b8e80941Smrg bool ScoreboardEnable; 8431b8e80941Smrg int32_t Scoreboard0DeltaX; 8432b8e80941Smrg int32_t Scoreboard0DeltaY; 8433b8e80941Smrg int32_t Scoreboard1DeltaX; 8434b8e80941Smrg int32_t Scoreboard1DeltaY; 8435b8e80941Smrg int32_t Scoreboard2DeltaX; 8436b8e80941Smrg int32_t Scoreboard2DeltaY; 8437b8e80941Smrg int32_t Scoreboard3DeltaX; 8438b8e80941Smrg int32_t Scoreboard3DeltaY; 8439b8e80941Smrg int32_t Scoreboard4DeltaX; 8440b8e80941Smrg int32_t Scoreboard4DeltaY; 8441b8e80941Smrg int32_t Scoreboard5DeltaX; 8442b8e80941Smrg int32_t Scoreboard5DeltaY; 8443b8e80941Smrg int32_t Scoreboard6DeltaX; 8444b8e80941Smrg int32_t Scoreboard6DeltaY; 8445b8e80941Smrg int32_t Scoreboard7DeltaX; 8446b8e80941Smrg int32_t Scoreboard7DeltaY; 8447b8e80941Smrg}; 8448b8e80941Smrg 8449b8e80941Smrgstatic inline void 8450b8e80941SmrgGEN10_MEDIA_VFE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 8451b8e80941Smrg __attribute__((unused)) void * restrict dst, 8452b8e80941Smrg __attribute__((unused)) const struct GEN10_MEDIA_VFE_STATE * restrict values) 8453b8e80941Smrg{ 8454b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8455b8e80941Smrg 8456b8e80941Smrg dw[0] = 8457b8e80941Smrg __gen_uint(values->DWordLength, 0, 15) | 8458b8e80941Smrg __gen_uint(values->SubOpcode, 16, 23) | 8459b8e80941Smrg __gen_uint(values->MediaCommandOpcode, 24, 26) | 8460b8e80941Smrg __gen_uint(values->Pipeline, 27, 28) | 8461b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8462b8e80941Smrg 8463b8e80941Smrg const uint64_t v1 = 8464b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3) | 8465b8e80941Smrg __gen_uint(values->StackSize, 4, 7); 8466b8e80941Smrg const uint64_t v1_address = 8467b8e80941Smrg __gen_combine_address(data, &dw[1], values->ScratchSpaceBasePointer, v1); 8468b8e80941Smrg dw[1] = v1_address; 8469b8e80941Smrg dw[2] = (v1_address >> 32) | (v1 >> 32); 8470b8e80941Smrg 8471b8e80941Smrg dw[3] = 8472b8e80941Smrg __gen_uint(values->SLMBankSelectionPolicy, 3, 3) | 8473b8e80941Smrg __gen_uint(values->ThreadDispatchSelectionPolicy, 4, 5) | 8474b8e80941Smrg __gen_uint(values->ResetGatewayTimer, 7, 7) | 8475b8e80941Smrg __gen_uint(values->NumberofURBEntries, 8, 15) | 8476b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 16, 31); 8477b8e80941Smrg 8478b8e80941Smrg dw[4] = 8479b8e80941Smrg __gen_uint(values->SliceDisable, 0, 1); 8480b8e80941Smrg 8481b8e80941Smrg dw[5] = 8482b8e80941Smrg __gen_uint(values->CURBEAllocationSize, 0, 15) | 8483b8e80941Smrg __gen_uint(values->URBEntryAllocationSize, 16, 31); 8484b8e80941Smrg 8485b8e80941Smrg dw[6] = 8486b8e80941Smrg __gen_uint(values->ScoreboardMask, 0, 7) | 8487b8e80941Smrg __gen_uint(values->NumberofMediaObjectsperPreEmptionCheckpoint, 8, 15) | 8488b8e80941Smrg __gen_uint(values->ScoreboardType, 30, 30) | 8489b8e80941Smrg __gen_uint(values->ScoreboardEnable, 31, 31); 8490b8e80941Smrg 8491b8e80941Smrg dw[7] = 8492b8e80941Smrg __gen_sint(values->Scoreboard0DeltaX, 0, 3) | 8493b8e80941Smrg __gen_sint(values->Scoreboard0DeltaY, 4, 7) | 8494b8e80941Smrg __gen_sint(values->Scoreboard1DeltaX, 8, 11) | 8495b8e80941Smrg __gen_sint(values->Scoreboard1DeltaY, 12, 15) | 8496b8e80941Smrg __gen_sint(values->Scoreboard2DeltaX, 16, 19) | 8497b8e80941Smrg __gen_sint(values->Scoreboard2DeltaY, 20, 23) | 8498b8e80941Smrg __gen_sint(values->Scoreboard3DeltaX, 24, 27) | 8499b8e80941Smrg __gen_sint(values->Scoreboard3DeltaY, 28, 31); 8500b8e80941Smrg 8501b8e80941Smrg dw[8] = 8502b8e80941Smrg __gen_sint(values->Scoreboard4DeltaX, 0, 3) | 8503b8e80941Smrg __gen_sint(values->Scoreboard4DeltaY, 4, 7) | 8504b8e80941Smrg __gen_sint(values->Scoreboard5DeltaX, 8, 11) | 8505b8e80941Smrg __gen_sint(values->Scoreboard5DeltaY, 12, 15) | 8506b8e80941Smrg __gen_sint(values->Scoreboard6DeltaX, 16, 19) | 8507b8e80941Smrg __gen_sint(values->Scoreboard6DeltaY, 20, 23) | 8508b8e80941Smrg __gen_sint(values->Scoreboard7DeltaX, 24, 27) | 8509b8e80941Smrg __gen_sint(values->Scoreboard7DeltaY, 28, 31); 8510b8e80941Smrg} 8511b8e80941Smrg 8512b8e80941Smrg#define GEN10_MI_ARB_CHECK_length 1 8513b8e80941Smrg#define GEN10_MI_ARB_CHECK_length_bias 1 8514b8e80941Smrg#define GEN10_MI_ARB_CHECK_header \ 8515b8e80941Smrg .MICommandOpcode = 5, \ 8516b8e80941Smrg .CommandType = 0 8517b8e80941Smrg 8518b8e80941Smrgstruct GEN10_MI_ARB_CHECK { 8519b8e80941Smrg uint32_t MICommandOpcode; 8520b8e80941Smrg uint32_t CommandType; 8521b8e80941Smrg}; 8522b8e80941Smrg 8523b8e80941Smrgstatic inline void 8524b8e80941SmrgGEN10_MI_ARB_CHECK_pack(__attribute__((unused)) __gen_user_data *data, 8525b8e80941Smrg __attribute__((unused)) void * restrict dst, 8526b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_ARB_CHECK * restrict values) 8527b8e80941Smrg{ 8528b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8529b8e80941Smrg 8530b8e80941Smrg dw[0] = 8531b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8532b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8533b8e80941Smrg} 8534b8e80941Smrg 8535b8e80941Smrg#define GEN10_MI_ARB_ON_OFF_length 1 8536b8e80941Smrg#define GEN10_MI_ARB_ON_OFF_length_bias 1 8537b8e80941Smrg#define GEN10_MI_ARB_ON_OFF_header \ 8538b8e80941Smrg .ArbitrationEnable = 1, \ 8539b8e80941Smrg .MICommandOpcode = 8, \ 8540b8e80941Smrg .CommandType = 0 8541b8e80941Smrg 8542b8e80941Smrgstruct GEN10_MI_ARB_ON_OFF { 8543b8e80941Smrg bool ArbitrationEnable; 8544b8e80941Smrg bool AllowLiteRestore; 8545b8e80941Smrg uint32_t MICommandOpcode; 8546b8e80941Smrg uint32_t CommandType; 8547b8e80941Smrg}; 8548b8e80941Smrg 8549b8e80941Smrgstatic inline void 8550b8e80941SmrgGEN10_MI_ARB_ON_OFF_pack(__attribute__((unused)) __gen_user_data *data, 8551b8e80941Smrg __attribute__((unused)) void * restrict dst, 8552b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_ARB_ON_OFF * restrict values) 8553b8e80941Smrg{ 8554b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8555b8e80941Smrg 8556b8e80941Smrg dw[0] = 8557b8e80941Smrg __gen_uint(values->ArbitrationEnable, 0, 0) | 8558b8e80941Smrg __gen_uint(values->AllowLiteRestore, 1, 1) | 8559b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8560b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8561b8e80941Smrg} 8562b8e80941Smrg 8563b8e80941Smrg#define GEN10_MI_ATOMIC_length 3 8564b8e80941Smrg#define GEN10_MI_ATOMIC_length_bias 2 8565b8e80941Smrg#define GEN10_MI_ATOMIC_header \ 8566b8e80941Smrg .DWordLength = 1, \ 8567b8e80941Smrg .MICommandOpcode = 47, \ 8568b8e80941Smrg .CommandType = 0 8569b8e80941Smrg 8570b8e80941Smrgstruct GEN10_MI_ATOMIC { 8571b8e80941Smrg uint32_t DWordLength; 8572b8e80941Smrg enum GEN10_Atomic_OPCODE ATOMICOPCODE; 8573b8e80941Smrg bool ReturnDataControl; 8574b8e80941Smrg bool CSSTALL; 8575b8e80941Smrg bool InlineData; 8576b8e80941Smrg uint32_t DataSize; 8577b8e80941Smrg#define MI_ATOMIC_DWORD 0 8578b8e80941Smrg#define MI_ATOMIC_QWORD 1 8579b8e80941Smrg#define MI_ATOMIC_OCTWORD 2 8580b8e80941Smrg#define MI_ATOMIC_RESERVED 3 8581b8e80941Smrg bool PostSyncOperation; 8582b8e80941Smrg uint32_t MemoryType; 8583b8e80941Smrg#define PerProcessGraphicsAddress 0 8584b8e80941Smrg#define GlobalGraphicsAddress 1 8585b8e80941Smrg uint32_t MICommandOpcode; 8586b8e80941Smrg uint32_t CommandType; 8587b8e80941Smrg __gen_address_type MemoryAddress; 8588b8e80941Smrg uint32_t Operand1DataDword0; 8589b8e80941Smrg uint32_t Operand2DataDword0; 8590b8e80941Smrg uint32_t Operand1DataDword1; 8591b8e80941Smrg uint32_t Operand2DataDword1; 8592b8e80941Smrg uint32_t Operand1DataDword2; 8593b8e80941Smrg uint32_t Operand2DataDword2; 8594b8e80941Smrg uint32_t Operand1DataDword3; 8595b8e80941Smrg uint32_t Operand2DataDword3; 8596b8e80941Smrg}; 8597b8e80941Smrg 8598b8e80941Smrgstatic inline void 8599b8e80941SmrgGEN10_MI_ATOMIC_pack(__attribute__((unused)) __gen_user_data *data, 8600b8e80941Smrg __attribute__((unused)) void * restrict dst, 8601b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_ATOMIC * restrict values) 8602b8e80941Smrg{ 8603b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8604b8e80941Smrg 8605b8e80941Smrg dw[0] = 8606b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 8607b8e80941Smrg __gen_uint(values->ATOMICOPCODE, 8, 15) | 8608b8e80941Smrg __gen_uint(values->ReturnDataControl, 16, 16) | 8609b8e80941Smrg __gen_uint(values->CSSTALL, 17, 17) | 8610b8e80941Smrg __gen_uint(values->InlineData, 18, 18) | 8611b8e80941Smrg __gen_uint(values->DataSize, 19, 20) | 8612b8e80941Smrg __gen_uint(values->PostSyncOperation, 21, 21) | 8613b8e80941Smrg __gen_uint(values->MemoryType, 22, 22) | 8614b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8615b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8616b8e80941Smrg 8617b8e80941Smrg const uint64_t v1_address = 8618b8e80941Smrg __gen_combine_address(data, &dw[1], values->MemoryAddress, 0); 8619b8e80941Smrg dw[1] = v1_address; 8620b8e80941Smrg dw[2] = v1_address >> 32; 8621b8e80941Smrg} 8622b8e80941Smrg 8623b8e80941Smrg#define GEN10_MI_BATCH_BUFFER_END_length 1 8624b8e80941Smrg#define GEN10_MI_BATCH_BUFFER_END_length_bias 1 8625b8e80941Smrg#define GEN10_MI_BATCH_BUFFER_END_header \ 8626b8e80941Smrg .MICommandOpcode = 10, \ 8627b8e80941Smrg .CommandType = 0 8628b8e80941Smrg 8629b8e80941Smrgstruct GEN10_MI_BATCH_BUFFER_END { 8630b8e80941Smrg bool EndContext; 8631b8e80941Smrg uint32_t MICommandOpcode; 8632b8e80941Smrg uint32_t CommandType; 8633b8e80941Smrg}; 8634b8e80941Smrg 8635b8e80941Smrgstatic inline void 8636b8e80941SmrgGEN10_MI_BATCH_BUFFER_END_pack(__attribute__((unused)) __gen_user_data *data, 8637b8e80941Smrg __attribute__((unused)) void * restrict dst, 8638b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_BATCH_BUFFER_END * restrict values) 8639b8e80941Smrg{ 8640b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8641b8e80941Smrg 8642b8e80941Smrg dw[0] = 8643b8e80941Smrg __gen_uint(values->EndContext, 0, 0) | 8644b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8645b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8646b8e80941Smrg} 8647b8e80941Smrg 8648b8e80941Smrg#define GEN10_MI_BATCH_BUFFER_START_length 3 8649b8e80941Smrg#define GEN10_MI_BATCH_BUFFER_START_length_bias 2 8650b8e80941Smrg#define GEN10_MI_BATCH_BUFFER_START_header \ 8651b8e80941Smrg .DWordLength = 1, \ 8652b8e80941Smrg .MICommandOpcode = 49, \ 8653b8e80941Smrg .CommandType = 0 8654b8e80941Smrg 8655b8e80941Smrgstruct GEN10_MI_BATCH_BUFFER_START { 8656b8e80941Smrg uint32_t DWordLength; 8657b8e80941Smrg uint32_t AddressSpaceIndicator; 8658b8e80941Smrg#define ASI_GGTT 0 8659b8e80941Smrg#define ASI_PPGTT 1 8660b8e80941Smrg bool ResourceStreamerEnable; 8661b8e80941Smrg bool PredicationEnable; 8662b8e80941Smrg bool AddOffsetEnable; 8663b8e80941Smrg uint32_t SecondLevelBatchBuffer; 8664b8e80941Smrg#define Firstlevelbatch 0 8665b8e80941Smrg#define Secondlevelbatch 1 8666b8e80941Smrg uint32_t MICommandOpcode; 8667b8e80941Smrg uint32_t CommandType; 8668b8e80941Smrg __gen_address_type BatchBufferStartAddress; 8669b8e80941Smrg}; 8670b8e80941Smrg 8671b8e80941Smrgstatic inline void 8672b8e80941SmrgGEN10_MI_BATCH_BUFFER_START_pack(__attribute__((unused)) __gen_user_data *data, 8673b8e80941Smrg __attribute__((unused)) void * restrict dst, 8674b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_BATCH_BUFFER_START * restrict values) 8675b8e80941Smrg{ 8676b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8677b8e80941Smrg 8678b8e80941Smrg dw[0] = 8679b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 8680b8e80941Smrg __gen_uint(values->AddressSpaceIndicator, 8, 8) | 8681b8e80941Smrg __gen_uint(values->ResourceStreamerEnable, 10, 10) | 8682b8e80941Smrg __gen_uint(values->PredicationEnable, 15, 15) | 8683b8e80941Smrg __gen_uint(values->AddOffsetEnable, 16, 16) | 8684b8e80941Smrg __gen_uint(values->SecondLevelBatchBuffer, 22, 22) | 8685b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8686b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8687b8e80941Smrg 8688b8e80941Smrg const uint64_t v1_address = 8689b8e80941Smrg __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, 0); 8690b8e80941Smrg dw[1] = v1_address; 8691b8e80941Smrg dw[2] = v1_address >> 32; 8692b8e80941Smrg} 8693b8e80941Smrg 8694b8e80941Smrg#define GEN10_MI_CLFLUSH_length_bias 2 8695b8e80941Smrg#define GEN10_MI_CLFLUSH_header \ 8696b8e80941Smrg .DWordLength = 1, \ 8697b8e80941Smrg .MICommandOpcode = 39, \ 8698b8e80941Smrg .CommandType = 0 8699b8e80941Smrg 8700b8e80941Smrgstruct GEN10_MI_CLFLUSH { 8701b8e80941Smrg uint32_t DWordLength; 8702b8e80941Smrg bool UseGlobalGTT; 8703b8e80941Smrg uint32_t MICommandOpcode; 8704b8e80941Smrg uint32_t CommandType; 8705b8e80941Smrg uint32_t StartingCachelineOffset; 8706b8e80941Smrg __gen_address_type PageBaseAddress; 8707b8e80941Smrg /* variable length fields follow */ 8708b8e80941Smrg}; 8709b8e80941Smrg 8710b8e80941Smrgstatic inline void 8711b8e80941SmrgGEN10_MI_CLFLUSH_pack(__attribute__((unused)) __gen_user_data *data, 8712b8e80941Smrg __attribute__((unused)) void * restrict dst, 8713b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_CLFLUSH * restrict values) 8714b8e80941Smrg{ 8715b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8716b8e80941Smrg 8717b8e80941Smrg dw[0] = 8718b8e80941Smrg __gen_uint(values->DWordLength, 0, 9) | 8719b8e80941Smrg __gen_uint(values->UseGlobalGTT, 22, 22) | 8720b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8721b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8722b8e80941Smrg 8723b8e80941Smrg const uint64_t v1 = 8724b8e80941Smrg __gen_uint(values->StartingCachelineOffset, 6, 11); 8725b8e80941Smrg const uint64_t v1_address = 8726b8e80941Smrg __gen_combine_address(data, &dw[1], values->PageBaseAddress, v1); 8727b8e80941Smrg dw[1] = v1_address; 8728b8e80941Smrg dw[2] = (v1_address >> 32) | (v1 >> 32); 8729b8e80941Smrg} 8730b8e80941Smrg 8731b8e80941Smrg#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_length 4 8732b8e80941Smrg#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 2 8733b8e80941Smrg#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_header\ 8734b8e80941Smrg .DWordLength = 2, \ 8735b8e80941Smrg .CompareSemaphore = 0, \ 8736b8e80941Smrg .MICommandOpcode = 54, \ 8737b8e80941Smrg .CommandType = 0 8738b8e80941Smrg 8739b8e80941Smrgstruct GEN10_MI_CONDITIONAL_BATCH_BUFFER_END { 8740b8e80941Smrg uint32_t DWordLength; 8741b8e80941Smrg uint32_t CompareMaskMode; 8742b8e80941Smrg#define CompareMaskModeDisabled 0 8743b8e80941Smrg#define CompareMaskModeEnabled 1 8744b8e80941Smrg uint32_t CompareSemaphore; 8745b8e80941Smrg bool UseGlobalGTT; 8746b8e80941Smrg uint32_t MICommandOpcode; 8747b8e80941Smrg uint32_t CommandType; 8748b8e80941Smrg uint32_t CompareDataDword; 8749b8e80941Smrg __gen_address_type CompareAddress; 8750b8e80941Smrg}; 8751b8e80941Smrg 8752b8e80941Smrgstatic inline void 8753b8e80941SmrgGEN10_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__attribute__((unused)) __gen_user_data *data, 8754b8e80941Smrg __attribute__((unused)) void * restrict dst, 8755b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values) 8756b8e80941Smrg{ 8757b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8758b8e80941Smrg 8759b8e80941Smrg dw[0] = 8760b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 8761b8e80941Smrg __gen_uint(values->CompareMaskMode, 19, 19) | 8762b8e80941Smrg __gen_uint(values->CompareSemaphore, 21, 21) | 8763b8e80941Smrg __gen_uint(values->UseGlobalGTT, 22, 22) | 8764b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8765b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8766b8e80941Smrg 8767b8e80941Smrg dw[1] = 8768b8e80941Smrg __gen_uint(values->CompareDataDword, 0, 31); 8769b8e80941Smrg 8770b8e80941Smrg const uint64_t v2_address = 8771b8e80941Smrg __gen_combine_address(data, &dw[2], values->CompareAddress, 0); 8772b8e80941Smrg dw[2] = v2_address; 8773b8e80941Smrg dw[3] = v2_address >> 32; 8774b8e80941Smrg} 8775b8e80941Smrg 8776b8e80941Smrg#define GEN10_MI_COPY_MEM_MEM_length 5 8777b8e80941Smrg#define GEN10_MI_COPY_MEM_MEM_length_bias 2 8778b8e80941Smrg#define GEN10_MI_COPY_MEM_MEM_header \ 8779b8e80941Smrg .DWordLength = 3, \ 8780b8e80941Smrg .MICommandOpcode = 46, \ 8781b8e80941Smrg .CommandType = 0 8782b8e80941Smrg 8783b8e80941Smrgstruct GEN10_MI_COPY_MEM_MEM { 8784b8e80941Smrg uint32_t DWordLength; 8785b8e80941Smrg bool UseGlobalGTTDestination; 8786b8e80941Smrg bool UseGlobalGTTSource; 8787b8e80941Smrg uint32_t MICommandOpcode; 8788b8e80941Smrg uint32_t CommandType; 8789b8e80941Smrg __gen_address_type DestinationMemoryAddress; 8790b8e80941Smrg __gen_address_type SourceMemoryAddress; 8791b8e80941Smrg}; 8792b8e80941Smrg 8793b8e80941Smrgstatic inline void 8794b8e80941SmrgGEN10_MI_COPY_MEM_MEM_pack(__attribute__((unused)) __gen_user_data *data, 8795b8e80941Smrg __attribute__((unused)) void * restrict dst, 8796b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_COPY_MEM_MEM * restrict values) 8797b8e80941Smrg{ 8798b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8799b8e80941Smrg 8800b8e80941Smrg dw[0] = 8801b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 8802b8e80941Smrg __gen_uint(values->UseGlobalGTTDestination, 21, 21) | 8803b8e80941Smrg __gen_uint(values->UseGlobalGTTSource, 22, 22) | 8804b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8805b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8806b8e80941Smrg 8807b8e80941Smrg const uint64_t v1_address = 8808b8e80941Smrg __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, 0); 8809b8e80941Smrg dw[1] = v1_address; 8810b8e80941Smrg dw[2] = v1_address >> 32; 8811b8e80941Smrg 8812b8e80941Smrg const uint64_t v3_address = 8813b8e80941Smrg __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, 0); 8814b8e80941Smrg dw[3] = v3_address; 8815b8e80941Smrg dw[4] = v3_address >> 32; 8816b8e80941Smrg} 8817b8e80941Smrg 8818b8e80941Smrg#define GEN10_MI_DISPLAY_FLIP_length 3 8819b8e80941Smrg#define GEN10_MI_DISPLAY_FLIP_length_bias 2 8820b8e80941Smrg#define GEN10_MI_DISPLAY_FLIP_header \ 8821b8e80941Smrg .DWordLength = 1, \ 8822b8e80941Smrg .MICommandOpcode = 20, \ 8823b8e80941Smrg .CommandType = 0 8824b8e80941Smrg 8825b8e80941Smrgstruct GEN10_MI_DISPLAY_FLIP { 8826b8e80941Smrg uint32_t DWordLength; 8827b8e80941Smrg uint32_t DisplayPlaneSelect; 8828b8e80941Smrg#define DisplayPlane1 0 8829b8e80941Smrg#define DisplayPlane2 1 8830b8e80941Smrg#define DisplayPlane3 2 8831b8e80941Smrg#define DisplayPlane4 4 8832b8e80941Smrg#define DisplayPlane5 5 8833b8e80941Smrg#define DisplayPlane6 6 8834b8e80941Smrg#define DisplayPlane7 7 8835b8e80941Smrg#define DisplayPlane8 8 8836b8e80941Smrg#define DisplayPlane9 9 8837b8e80941Smrg#define DisplayPlane10 10 8838b8e80941Smrg#define DisplayPlane11 11 8839b8e80941Smrg#define DisplayPlane12 12 8840b8e80941Smrg bool AsyncFlipIndicator; 8841b8e80941Smrg uint32_t MICommandOpcode; 8842b8e80941Smrg uint32_t CommandType; 8843b8e80941Smrg uint32_t TileParameter; 8844b8e80941Smrg uint32_t DisplayBufferPitch; 8845b8e80941Smrg bool Stereoscopic3DMode; 8846b8e80941Smrg uint32_t FlipType; 8847b8e80941Smrg#define SyncFlip 0 8848b8e80941Smrg#define AsyncFlip 1 8849b8e80941Smrg#define Stereo3DFlip 2 8850b8e80941Smrg uint32_t VRRMasterFlip; 8851b8e80941Smrg __gen_address_type DisplayBufferBaseAddress; 8852b8e80941Smrg __gen_address_type LeftEyeDisplayBufferBaseAddress; 8853b8e80941Smrg}; 8854b8e80941Smrg 8855b8e80941Smrgstatic inline void 8856b8e80941SmrgGEN10_MI_DISPLAY_FLIP_pack(__attribute__((unused)) __gen_user_data *data, 8857b8e80941Smrg __attribute__((unused)) void * restrict dst, 8858b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_DISPLAY_FLIP * restrict values) 8859b8e80941Smrg{ 8860b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8861b8e80941Smrg 8862b8e80941Smrg dw[0] = 8863b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 8864b8e80941Smrg __gen_uint(values->DisplayPlaneSelect, 8, 12) | 8865b8e80941Smrg __gen_uint(values->AsyncFlipIndicator, 22, 22) | 8866b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8867b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8868b8e80941Smrg 8869b8e80941Smrg dw[1] = 8870b8e80941Smrg __gen_uint(values->TileParameter, 0, 2) | 8871b8e80941Smrg __gen_uint(values->DisplayBufferPitch, 6, 15) | 8872b8e80941Smrg __gen_uint(values->Stereoscopic3DMode, 31, 31); 8873b8e80941Smrg 8874b8e80941Smrg const uint32_t v2 = 8875b8e80941Smrg __gen_uint(values->FlipType, 0, 1) | 8876b8e80941Smrg __gen_uint(values->VRRMasterFlip, 11, 11); 8877b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->DisplayBufferBaseAddress, v2); 8878b8e80941Smrg} 8879b8e80941Smrg 8880b8e80941Smrg#define GEN10_MI_FORCE_WAKEUP_length 2 8881b8e80941Smrg#define GEN10_MI_FORCE_WAKEUP_length_bias 2 8882b8e80941Smrg#define GEN10_MI_FORCE_WAKEUP_header \ 8883b8e80941Smrg .DWordLength = 0, \ 8884b8e80941Smrg .MICommandOpcode = 29, \ 8885b8e80941Smrg .CommandType = 0 8886b8e80941Smrg 8887b8e80941Smrgstruct GEN10_MI_FORCE_WAKEUP { 8888b8e80941Smrg uint32_t DWordLength; 8889b8e80941Smrg uint32_t MICommandOpcode; 8890b8e80941Smrg uint32_t CommandType; 8891b8e80941Smrg uint32_t ForceMediaAwake; 8892b8e80941Smrg uint32_t ForceRenderAwake; 8893b8e80941Smrg uint32_t MaskBits; 8894b8e80941Smrg}; 8895b8e80941Smrg 8896b8e80941Smrgstatic inline void 8897b8e80941SmrgGEN10_MI_FORCE_WAKEUP_pack(__attribute__((unused)) __gen_user_data *data, 8898b8e80941Smrg __attribute__((unused)) void * restrict dst, 8899b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_FORCE_WAKEUP * restrict values) 8900b8e80941Smrg{ 8901b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8902b8e80941Smrg 8903b8e80941Smrg dw[0] = 8904b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 8905b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8906b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8907b8e80941Smrg 8908b8e80941Smrg dw[1] = 8909b8e80941Smrg __gen_uint(values->ForceMediaAwake, 0, 0) | 8910b8e80941Smrg __gen_uint(values->ForceRenderAwake, 1, 1) | 8911b8e80941Smrg __gen_uint(values->MaskBits, 16, 31); 8912b8e80941Smrg} 8913b8e80941Smrg 8914b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_IMM_length 3 8915b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_IMM_length_bias 2 8916b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_IMM_header \ 8917b8e80941Smrg .DWordLength = 1, \ 8918b8e80941Smrg .MICommandOpcode = 34, \ 8919b8e80941Smrg .CommandType = 0 8920b8e80941Smrg 8921b8e80941Smrgstruct GEN10_MI_LOAD_REGISTER_IMM { 8922b8e80941Smrg uint32_t DWordLength; 8923b8e80941Smrg uint32_t ByteWriteDisables; 8924b8e80941Smrg uint32_t MICommandOpcode; 8925b8e80941Smrg uint32_t CommandType; 8926b8e80941Smrg uint64_t RegisterOffset; 8927b8e80941Smrg uint32_t DataDWord; 8928b8e80941Smrg /* variable length fields follow */ 8929b8e80941Smrg}; 8930b8e80941Smrg 8931b8e80941Smrgstatic inline void 8932b8e80941SmrgGEN10_MI_LOAD_REGISTER_IMM_pack(__attribute__((unused)) __gen_user_data *data, 8933b8e80941Smrg __attribute__((unused)) void * restrict dst, 8934b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_LOAD_REGISTER_IMM * restrict values) 8935b8e80941Smrg{ 8936b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8937b8e80941Smrg 8938b8e80941Smrg dw[0] = 8939b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 8940b8e80941Smrg __gen_uint(values->ByteWriteDisables, 8, 11) | 8941b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8942b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8943b8e80941Smrg 8944b8e80941Smrg dw[1] = 8945b8e80941Smrg __gen_offset(values->RegisterOffset, 2, 22); 8946b8e80941Smrg 8947b8e80941Smrg dw[2] = 8948b8e80941Smrg __gen_uint(values->DataDWord, 0, 31); 8949b8e80941Smrg} 8950b8e80941Smrg 8951b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_MEM_length 4 8952b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_MEM_length_bias 2 8953b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_MEM_header \ 8954b8e80941Smrg .DWordLength = 2, \ 8955b8e80941Smrg .MICommandOpcode = 41, \ 8956b8e80941Smrg .CommandType = 0 8957b8e80941Smrg 8958b8e80941Smrgstruct GEN10_MI_LOAD_REGISTER_MEM { 8959b8e80941Smrg uint32_t DWordLength; 8960b8e80941Smrg bool AsyncModeEnable; 8961b8e80941Smrg bool UseGlobalGTT; 8962b8e80941Smrg uint32_t MICommandOpcode; 8963b8e80941Smrg uint32_t CommandType; 8964b8e80941Smrg uint64_t RegisterAddress; 8965b8e80941Smrg __gen_address_type MemoryAddress; 8966b8e80941Smrg}; 8967b8e80941Smrg 8968b8e80941Smrgstatic inline void 8969b8e80941SmrgGEN10_MI_LOAD_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 8970b8e80941Smrg __attribute__((unused)) void * restrict dst, 8971b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_LOAD_REGISTER_MEM * restrict values) 8972b8e80941Smrg{ 8973b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 8974b8e80941Smrg 8975b8e80941Smrg dw[0] = 8976b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 8977b8e80941Smrg __gen_uint(values->AsyncModeEnable, 21, 21) | 8978b8e80941Smrg __gen_uint(values->UseGlobalGTT, 22, 22) | 8979b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 8980b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 8981b8e80941Smrg 8982b8e80941Smrg dw[1] = 8983b8e80941Smrg __gen_offset(values->RegisterAddress, 2, 22); 8984b8e80941Smrg 8985b8e80941Smrg const uint64_t v2_address = 8986b8e80941Smrg __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 8987b8e80941Smrg dw[2] = v2_address; 8988b8e80941Smrg dw[3] = v2_address >> 32; 8989b8e80941Smrg} 8990b8e80941Smrg 8991b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_REG_length 3 8992b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_REG_length_bias 2 8993b8e80941Smrg#define GEN10_MI_LOAD_REGISTER_REG_header \ 8994b8e80941Smrg .DWordLength = 1, \ 8995b8e80941Smrg .MICommandOpcode = 42, \ 8996b8e80941Smrg .CommandType = 0 8997b8e80941Smrg 8998b8e80941Smrgstruct GEN10_MI_LOAD_REGISTER_REG { 8999b8e80941Smrg uint32_t DWordLength; 9000b8e80941Smrg uint32_t MICommandOpcode; 9001b8e80941Smrg uint32_t CommandType; 9002b8e80941Smrg uint64_t SourceRegisterAddress; 9003b8e80941Smrg uint64_t DestinationRegisterAddress; 9004b8e80941Smrg}; 9005b8e80941Smrg 9006b8e80941Smrgstatic inline void 9007b8e80941SmrgGEN10_MI_LOAD_REGISTER_REG_pack(__attribute__((unused)) __gen_user_data *data, 9008b8e80941Smrg __attribute__((unused)) void * restrict dst, 9009b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_LOAD_REGISTER_REG * restrict values) 9010b8e80941Smrg{ 9011b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9012b8e80941Smrg 9013b8e80941Smrg dw[0] = 9014b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9015b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9016b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9017b8e80941Smrg 9018b8e80941Smrg dw[1] = 9019b8e80941Smrg __gen_offset(values->SourceRegisterAddress, 2, 22); 9020b8e80941Smrg 9021b8e80941Smrg dw[2] = 9022b8e80941Smrg __gen_offset(values->DestinationRegisterAddress, 2, 22); 9023b8e80941Smrg} 9024b8e80941Smrg 9025b8e80941Smrg#define GEN10_MI_LOAD_SCAN_LINES_EXCL_length 2 9026b8e80941Smrg#define GEN10_MI_LOAD_SCAN_LINES_EXCL_length_bias 2 9027b8e80941Smrg#define GEN10_MI_LOAD_SCAN_LINES_EXCL_header \ 9028b8e80941Smrg .DWordLength = 0, \ 9029b8e80941Smrg .MICommandOpcode = 19, \ 9030b8e80941Smrg .CommandType = 0 9031b8e80941Smrg 9032b8e80941Smrgstruct GEN10_MI_LOAD_SCAN_LINES_EXCL { 9033b8e80941Smrg uint32_t DWordLength; 9034b8e80941Smrg uint32_t DisplayPlaneSelect; 9035b8e80941Smrg#define DisplayPlaneA 0 9036b8e80941Smrg#define DisplayPlaneB 1 9037b8e80941Smrg#define DisplayPlaneC 4 9038b8e80941Smrg uint32_t MICommandOpcode; 9039b8e80941Smrg uint32_t CommandType; 9040b8e80941Smrg uint32_t EndScanLineNumber; 9041b8e80941Smrg uint32_t StartScanLineNumber; 9042b8e80941Smrg}; 9043b8e80941Smrg 9044b8e80941Smrgstatic inline void 9045b8e80941SmrgGEN10_MI_LOAD_SCAN_LINES_EXCL_pack(__attribute__((unused)) __gen_user_data *data, 9046b8e80941Smrg __attribute__((unused)) void * restrict dst, 9047b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_LOAD_SCAN_LINES_EXCL * restrict values) 9048b8e80941Smrg{ 9049b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9050b8e80941Smrg 9051b8e80941Smrg dw[0] = 9052b8e80941Smrg __gen_uint(values->DWordLength, 0, 5) | 9053b8e80941Smrg __gen_uint(values->DisplayPlaneSelect, 19, 21) | 9054b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9055b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9056b8e80941Smrg 9057b8e80941Smrg dw[1] = 9058b8e80941Smrg __gen_uint(values->EndScanLineNumber, 0, 12) | 9059b8e80941Smrg __gen_uint(values->StartScanLineNumber, 16, 28); 9060b8e80941Smrg} 9061b8e80941Smrg 9062b8e80941Smrg#define GEN10_MI_LOAD_SCAN_LINES_INCL_length 2 9063b8e80941Smrg#define GEN10_MI_LOAD_SCAN_LINES_INCL_length_bias 2 9064b8e80941Smrg#define GEN10_MI_LOAD_SCAN_LINES_INCL_header \ 9065b8e80941Smrg .DWordLength = 0, \ 9066b8e80941Smrg .MICommandOpcode = 18, \ 9067b8e80941Smrg .CommandType = 0 9068b8e80941Smrg 9069b8e80941Smrgstruct GEN10_MI_LOAD_SCAN_LINES_INCL { 9070b8e80941Smrg uint32_t DWordLength; 9071b8e80941Smrg uint32_t ScanLineEventDoneForward; 9072b8e80941Smrg uint32_t DisplayPlaneSelect; 9073b8e80941Smrg#define DisplayPlane1A 0 9074b8e80941Smrg#define DisplayPlane1B 1 9075b8e80941Smrg#define DisplayPlane1C 4 9076b8e80941Smrg uint32_t MICommandOpcode; 9077b8e80941Smrg uint32_t CommandType; 9078b8e80941Smrg uint32_t EndScanLineNumber; 9079b8e80941Smrg uint32_t StartScanLineNumber; 9080b8e80941Smrg}; 9081b8e80941Smrg 9082b8e80941Smrgstatic inline void 9083b8e80941SmrgGEN10_MI_LOAD_SCAN_LINES_INCL_pack(__attribute__((unused)) __gen_user_data *data, 9084b8e80941Smrg __attribute__((unused)) void * restrict dst, 9085b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_LOAD_SCAN_LINES_INCL * restrict values) 9086b8e80941Smrg{ 9087b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9088b8e80941Smrg 9089b8e80941Smrg dw[0] = 9090b8e80941Smrg __gen_uint(values->DWordLength, 0, 5) | 9091b8e80941Smrg __gen_uint(values->ScanLineEventDoneForward, 17, 18) | 9092b8e80941Smrg __gen_uint(values->DisplayPlaneSelect, 19, 21) | 9093b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9094b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9095b8e80941Smrg 9096b8e80941Smrg dw[1] = 9097b8e80941Smrg __gen_uint(values->EndScanLineNumber, 0, 12) | 9098b8e80941Smrg __gen_uint(values->StartScanLineNumber, 16, 28); 9099b8e80941Smrg} 9100b8e80941Smrg 9101b8e80941Smrg#define GEN10_MI_MATH_length_bias 2 9102b8e80941Smrg#define GEN10_MI_MATH_header \ 9103b8e80941Smrg .DWordLength = 0, \ 9104b8e80941Smrg .MICommandOpcode = 26, \ 9105b8e80941Smrg .CommandType = 0 9106b8e80941Smrg 9107b8e80941Smrgstruct GEN10_MI_MATH { 9108b8e80941Smrg uint32_t DWordLength; 9109b8e80941Smrg uint32_t MICommandOpcode; 9110b8e80941Smrg uint32_t CommandType; 9111b8e80941Smrg /* variable length fields follow */ 9112b8e80941Smrg}; 9113b8e80941Smrg 9114b8e80941Smrgstatic inline void 9115b8e80941SmrgGEN10_MI_MATH_pack(__attribute__((unused)) __gen_user_data *data, 9116b8e80941Smrg __attribute__((unused)) void * restrict dst, 9117b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_MATH * restrict values) 9118b8e80941Smrg{ 9119b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9120b8e80941Smrg 9121b8e80941Smrg dw[0] = 9122b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9123b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9124b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9125b8e80941Smrg} 9126b8e80941Smrg 9127b8e80941Smrg#define GEN10_MI_NOOP_length 1 9128b8e80941Smrg#define GEN10_MI_NOOP_length_bias 1 9129b8e80941Smrg#define GEN10_MI_NOOP_header \ 9130b8e80941Smrg .MICommandOpcode = 0, \ 9131b8e80941Smrg .CommandType = 0 9132b8e80941Smrg 9133b8e80941Smrgstruct GEN10_MI_NOOP { 9134b8e80941Smrg uint32_t IdentificationNumber; 9135b8e80941Smrg bool IdentificationNumberRegisterWriteEnable; 9136b8e80941Smrg uint32_t MICommandOpcode; 9137b8e80941Smrg uint32_t CommandType; 9138b8e80941Smrg}; 9139b8e80941Smrg 9140b8e80941Smrgstatic inline void 9141b8e80941SmrgGEN10_MI_NOOP_pack(__attribute__((unused)) __gen_user_data *data, 9142b8e80941Smrg __attribute__((unused)) void * restrict dst, 9143b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_NOOP * restrict values) 9144b8e80941Smrg{ 9145b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9146b8e80941Smrg 9147b8e80941Smrg dw[0] = 9148b8e80941Smrg __gen_uint(values->IdentificationNumber, 0, 21) | 9149b8e80941Smrg __gen_uint(values->IdentificationNumberRegisterWriteEnable, 22, 22) | 9150b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9151b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9152b8e80941Smrg} 9153b8e80941Smrg 9154b8e80941Smrg#define GEN10_MI_PREDICATE_length 1 9155b8e80941Smrg#define GEN10_MI_PREDICATE_length_bias 1 9156b8e80941Smrg#define GEN10_MI_PREDICATE_header \ 9157b8e80941Smrg .MICommandOpcode = 12, \ 9158b8e80941Smrg .CommandType = 0 9159b8e80941Smrg 9160b8e80941Smrgstruct GEN10_MI_PREDICATE { 9161b8e80941Smrg uint32_t CompareOperation; 9162b8e80941Smrg#define COMPARE_TRUE 0 9163b8e80941Smrg#define COMPARE_FALSE 1 9164b8e80941Smrg#define COMPARE_SRCS_EQUAL 2 9165b8e80941Smrg#define COMPARE_DELTAS_EQUAL 3 9166b8e80941Smrg uint32_t CombineOperation; 9167b8e80941Smrg#define COMBINE_SET 0 9168b8e80941Smrg#define COMBINE_AND 1 9169b8e80941Smrg#define COMBINE_OR 2 9170b8e80941Smrg#define COMBINE_XOR 3 9171b8e80941Smrg uint32_t LoadOperation; 9172b8e80941Smrg#define LOAD_KEEP 0 9173b8e80941Smrg#define LOAD_LOAD 2 9174b8e80941Smrg#define LOAD_LOADINV 3 9175b8e80941Smrg uint32_t MICommandOpcode; 9176b8e80941Smrg uint32_t CommandType; 9177b8e80941Smrg}; 9178b8e80941Smrg 9179b8e80941Smrgstatic inline void 9180b8e80941SmrgGEN10_MI_PREDICATE_pack(__attribute__((unused)) __gen_user_data *data, 9181b8e80941Smrg __attribute__((unused)) void * restrict dst, 9182b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_PREDICATE * restrict values) 9183b8e80941Smrg{ 9184b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9185b8e80941Smrg 9186b8e80941Smrg dw[0] = 9187b8e80941Smrg __gen_uint(values->CompareOperation, 0, 1) | 9188b8e80941Smrg __gen_uint(values->CombineOperation, 3, 4) | 9189b8e80941Smrg __gen_uint(values->LoadOperation, 6, 7) | 9190b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9191b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9192b8e80941Smrg} 9193b8e80941Smrg 9194b8e80941Smrg#define GEN10_MI_REPORT_HEAD_length 1 9195b8e80941Smrg#define GEN10_MI_REPORT_HEAD_length_bias 1 9196b8e80941Smrg#define GEN10_MI_REPORT_HEAD_header \ 9197b8e80941Smrg .MICommandOpcode = 7, \ 9198b8e80941Smrg .CommandType = 0 9199b8e80941Smrg 9200b8e80941Smrgstruct GEN10_MI_REPORT_HEAD { 9201b8e80941Smrg uint32_t MICommandOpcode; 9202b8e80941Smrg uint32_t CommandType; 9203b8e80941Smrg}; 9204b8e80941Smrg 9205b8e80941Smrgstatic inline void 9206b8e80941SmrgGEN10_MI_REPORT_HEAD_pack(__attribute__((unused)) __gen_user_data *data, 9207b8e80941Smrg __attribute__((unused)) void * restrict dst, 9208b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_REPORT_HEAD * restrict values) 9209b8e80941Smrg{ 9210b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9211b8e80941Smrg 9212b8e80941Smrg dw[0] = 9213b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9214b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9215b8e80941Smrg} 9216b8e80941Smrg 9217b8e80941Smrg#define GEN10_MI_REPORT_PERF_COUNT_length 4 9218b8e80941Smrg#define GEN10_MI_REPORT_PERF_COUNT_length_bias 2 9219b8e80941Smrg#define GEN10_MI_REPORT_PERF_COUNT_header \ 9220b8e80941Smrg .DWordLength = 2, \ 9221b8e80941Smrg .MICommandOpcode = 40, \ 9222b8e80941Smrg .CommandType = 0 9223b8e80941Smrg 9224b8e80941Smrgstruct GEN10_MI_REPORT_PERF_COUNT { 9225b8e80941Smrg uint32_t DWordLength; 9226b8e80941Smrg uint32_t MICommandOpcode; 9227b8e80941Smrg uint32_t CommandType; 9228b8e80941Smrg bool UseGlobalGTT; 9229b8e80941Smrg uint32_t CoreModeEnable; 9230b8e80941Smrg __gen_address_type MemoryAddress; 9231b8e80941Smrg uint32_t ReportID; 9232b8e80941Smrg}; 9233b8e80941Smrg 9234b8e80941Smrgstatic inline void 9235b8e80941SmrgGEN10_MI_REPORT_PERF_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 9236b8e80941Smrg __attribute__((unused)) void * restrict dst, 9237b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_REPORT_PERF_COUNT * restrict values) 9238b8e80941Smrg{ 9239b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9240b8e80941Smrg 9241b8e80941Smrg dw[0] = 9242b8e80941Smrg __gen_uint(values->DWordLength, 0, 5) | 9243b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9244b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9245b8e80941Smrg 9246b8e80941Smrg const uint64_t v1 = 9247b8e80941Smrg __gen_uint(values->UseGlobalGTT, 0, 0) | 9248b8e80941Smrg __gen_uint(values->CoreModeEnable, 4, 4); 9249b8e80941Smrg const uint64_t v1_address = 9250b8e80941Smrg __gen_combine_address(data, &dw[1], values->MemoryAddress, v1); 9251b8e80941Smrg dw[1] = v1_address; 9252b8e80941Smrg dw[2] = (v1_address >> 32) | (v1 >> 32); 9253b8e80941Smrg 9254b8e80941Smrg dw[3] = 9255b8e80941Smrg __gen_uint(values->ReportID, 0, 31); 9256b8e80941Smrg} 9257b8e80941Smrg 9258b8e80941Smrg#define GEN10_MI_RS_CONTEXT_length 1 9259b8e80941Smrg#define GEN10_MI_RS_CONTEXT_length_bias 1 9260b8e80941Smrg#define GEN10_MI_RS_CONTEXT_header \ 9261b8e80941Smrg .MICommandOpcode = 15, \ 9262b8e80941Smrg .CommandType = 0 9263b8e80941Smrg 9264b8e80941Smrgstruct GEN10_MI_RS_CONTEXT { 9265b8e80941Smrg uint32_t ResourceStreamerSave; 9266b8e80941Smrg#define RS_Restore 0 9267b8e80941Smrg#define RS_Save 1 9268b8e80941Smrg uint32_t MICommandOpcode; 9269b8e80941Smrg uint32_t CommandType; 9270b8e80941Smrg}; 9271b8e80941Smrg 9272b8e80941Smrgstatic inline void 9273b8e80941SmrgGEN10_MI_RS_CONTEXT_pack(__attribute__((unused)) __gen_user_data *data, 9274b8e80941Smrg __attribute__((unused)) void * restrict dst, 9275b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_RS_CONTEXT * restrict values) 9276b8e80941Smrg{ 9277b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9278b8e80941Smrg 9279b8e80941Smrg dw[0] = 9280b8e80941Smrg __gen_uint(values->ResourceStreamerSave, 0, 0) | 9281b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9282b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9283b8e80941Smrg} 9284b8e80941Smrg 9285b8e80941Smrg#define GEN10_MI_RS_CONTROL_length 1 9286b8e80941Smrg#define GEN10_MI_RS_CONTROL_length_bias 1 9287b8e80941Smrg#define GEN10_MI_RS_CONTROL_header \ 9288b8e80941Smrg .MICommandOpcode = 6, \ 9289b8e80941Smrg .CommandType = 0 9290b8e80941Smrg 9291b8e80941Smrgstruct GEN10_MI_RS_CONTROL { 9292b8e80941Smrg uint32_t ResourceStreamerControl; 9293b8e80941Smrg#define RS_Stop 0 9294b8e80941Smrg#define RS_Start 1 9295b8e80941Smrg uint32_t MICommandOpcode; 9296b8e80941Smrg uint32_t CommandType; 9297b8e80941Smrg}; 9298b8e80941Smrg 9299b8e80941Smrgstatic inline void 9300b8e80941SmrgGEN10_MI_RS_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 9301b8e80941Smrg __attribute__((unused)) void * restrict dst, 9302b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_RS_CONTROL * restrict values) 9303b8e80941Smrg{ 9304b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9305b8e80941Smrg 9306b8e80941Smrg dw[0] = 9307b8e80941Smrg __gen_uint(values->ResourceStreamerControl, 0, 0) | 9308b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9309b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9310b8e80941Smrg} 9311b8e80941Smrg 9312b8e80941Smrg#define GEN10_MI_RS_STORE_DATA_IMM_length 4 9313b8e80941Smrg#define GEN10_MI_RS_STORE_DATA_IMM_length_bias 2 9314b8e80941Smrg#define GEN10_MI_RS_STORE_DATA_IMM_header \ 9315b8e80941Smrg .DWordLength = 2, \ 9316b8e80941Smrg .MICommandOpcode = 43, \ 9317b8e80941Smrg .CommandType = 0 9318b8e80941Smrg 9319b8e80941Smrgstruct GEN10_MI_RS_STORE_DATA_IMM { 9320b8e80941Smrg uint32_t DWordLength; 9321b8e80941Smrg uint32_t MICommandOpcode; 9322b8e80941Smrg uint32_t CommandType; 9323b8e80941Smrg uint32_t CoreModeEnable; 9324b8e80941Smrg __gen_address_type DestinationAddress; 9325b8e80941Smrg uint32_t DataDWord0; 9326b8e80941Smrg}; 9327b8e80941Smrg 9328b8e80941Smrgstatic inline void 9329b8e80941SmrgGEN10_MI_RS_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 9330b8e80941Smrg __attribute__((unused)) void * restrict dst, 9331b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_RS_STORE_DATA_IMM * restrict values) 9332b8e80941Smrg{ 9333b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9334b8e80941Smrg 9335b8e80941Smrg dw[0] = 9336b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9337b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9338b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9339b8e80941Smrg 9340b8e80941Smrg const uint64_t v1 = 9341b8e80941Smrg __gen_uint(values->CoreModeEnable, 0, 0); 9342b8e80941Smrg const uint64_t v1_address = 9343b8e80941Smrg __gen_combine_address(data, &dw[1], values->DestinationAddress, v1); 9344b8e80941Smrg dw[1] = v1_address; 9345b8e80941Smrg dw[2] = (v1_address >> 32) | (v1 >> 32); 9346b8e80941Smrg 9347b8e80941Smrg dw[3] = 9348b8e80941Smrg __gen_uint(values->DataDWord0, 0, 31); 9349b8e80941Smrg} 9350b8e80941Smrg 9351b8e80941Smrg#define GEN10_MI_SEMAPHORE_SIGNAL_length 2 9352b8e80941Smrg#define GEN10_MI_SEMAPHORE_SIGNAL_length_bias 2 9353b8e80941Smrg#define GEN10_MI_SEMAPHORE_SIGNAL_header \ 9354b8e80941Smrg .DWordLength = 0, \ 9355b8e80941Smrg .MICommandOpcode = 27, \ 9356b8e80941Smrg .CommandType = 0 9357b8e80941Smrg 9358b8e80941Smrgstruct GEN10_MI_SEMAPHORE_SIGNAL { 9359b8e80941Smrg uint32_t DWordLength; 9360b8e80941Smrg uint32_t TargetEngineSelect; 9361b8e80941Smrg#define RCS 0 9362b8e80941Smrg#define VCS0 1 9363b8e80941Smrg#define BCS 2 9364b8e80941Smrg#define VECS 3 9365b8e80941Smrg#define VCS1 4 9366b8e80941Smrg bool PostSyncOperation; 9367b8e80941Smrg uint32_t MICommandOpcode; 9368b8e80941Smrg uint32_t CommandType; 9369b8e80941Smrg uint32_t TargetContextID; 9370b8e80941Smrg}; 9371b8e80941Smrg 9372b8e80941Smrgstatic inline void 9373b8e80941SmrgGEN10_MI_SEMAPHORE_SIGNAL_pack(__attribute__((unused)) __gen_user_data *data, 9374b8e80941Smrg __attribute__((unused)) void * restrict dst, 9375b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_SEMAPHORE_SIGNAL * restrict values) 9376b8e80941Smrg{ 9377b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9378b8e80941Smrg 9379b8e80941Smrg dw[0] = 9380b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9381b8e80941Smrg __gen_uint(values->TargetEngineSelect, 15, 17) | 9382b8e80941Smrg __gen_uint(values->PostSyncOperation, 21, 21) | 9383b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9384b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9385b8e80941Smrg 9386b8e80941Smrg dw[1] = 9387b8e80941Smrg __gen_uint(values->TargetContextID, 0, 31); 9388b8e80941Smrg} 9389b8e80941Smrg 9390b8e80941Smrg#define GEN10_MI_SEMAPHORE_WAIT_length 4 9391b8e80941Smrg#define GEN10_MI_SEMAPHORE_WAIT_length_bias 2 9392b8e80941Smrg#define GEN10_MI_SEMAPHORE_WAIT_header \ 9393b8e80941Smrg .DWordLength = 2, \ 9394b8e80941Smrg .MICommandOpcode = 28, \ 9395b8e80941Smrg .CommandType = 0 9396b8e80941Smrg 9397b8e80941Smrgstruct GEN10_MI_SEMAPHORE_WAIT { 9398b8e80941Smrg uint32_t DWordLength; 9399b8e80941Smrg uint32_t CompareOperation; 9400b8e80941Smrg#define COMPARE_SAD_GREATER_THAN_SDD 0 9401b8e80941Smrg#define COMPARE_SAD_GREATER_THAN_OR_EQUAL_SDD 1 9402b8e80941Smrg#define COMPARE_SAD_LESS_THAN_SDD 2 9403b8e80941Smrg#define COMPARE_SAD_LESS_THAN_OR_EQUAL_SDD 3 9404b8e80941Smrg#define COMPARE_SAD_EQUAL_SDD 4 9405b8e80941Smrg#define COMPARE_SAD_NOT_EQUAL_SDD 5 9406b8e80941Smrg uint32_t WaitMode; 9407b8e80941Smrg#define PollingMode 1 9408b8e80941Smrg#define SignalMode 0 9409b8e80941Smrg bool RegisterPollMode; 9410b8e80941Smrg uint32_t MemoryType; 9411b8e80941Smrg#define PerProcessGraphicsAddress 0 9412b8e80941Smrg#define GlobalGraphicsAddress 1 9413b8e80941Smrg uint32_t MICommandOpcode; 9414b8e80941Smrg uint32_t CommandType; 9415b8e80941Smrg uint32_t SemaphoreDataDword; 9416b8e80941Smrg __gen_address_type SemaphoreAddress; 9417b8e80941Smrg}; 9418b8e80941Smrg 9419b8e80941Smrgstatic inline void 9420b8e80941SmrgGEN10_MI_SEMAPHORE_WAIT_pack(__attribute__((unused)) __gen_user_data *data, 9421b8e80941Smrg __attribute__((unused)) void * restrict dst, 9422b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_SEMAPHORE_WAIT * restrict values) 9423b8e80941Smrg{ 9424b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9425b8e80941Smrg 9426b8e80941Smrg dw[0] = 9427b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9428b8e80941Smrg __gen_uint(values->CompareOperation, 12, 14) | 9429b8e80941Smrg __gen_uint(values->WaitMode, 15, 15) | 9430b8e80941Smrg __gen_uint(values->RegisterPollMode, 16, 16) | 9431b8e80941Smrg __gen_uint(values->MemoryType, 22, 22) | 9432b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9433b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9434b8e80941Smrg 9435b8e80941Smrg dw[1] = 9436b8e80941Smrg __gen_uint(values->SemaphoreDataDword, 0, 31); 9437b8e80941Smrg 9438b8e80941Smrg const uint64_t v2_address = 9439b8e80941Smrg __gen_combine_address(data, &dw[2], values->SemaphoreAddress, 0); 9440b8e80941Smrg dw[2] = v2_address; 9441b8e80941Smrg dw[3] = v2_address >> 32; 9442b8e80941Smrg} 9443b8e80941Smrg 9444b8e80941Smrg#define GEN10_MI_SET_CONTEXT_length 2 9445b8e80941Smrg#define GEN10_MI_SET_CONTEXT_length_bias 2 9446b8e80941Smrg#define GEN10_MI_SET_CONTEXT_header \ 9447b8e80941Smrg .DWordLength = 0, \ 9448b8e80941Smrg .MICommandOpcode = 24, \ 9449b8e80941Smrg .CommandType = 0 9450b8e80941Smrg 9451b8e80941Smrgstruct GEN10_MI_SET_CONTEXT { 9452b8e80941Smrg uint32_t DWordLength; 9453b8e80941Smrg uint32_t MICommandOpcode; 9454b8e80941Smrg uint32_t CommandType; 9455b8e80941Smrg uint32_t RestoreInhibit; 9456b8e80941Smrg uint32_t ForceRestore; 9457b8e80941Smrg bool ResourceStreamerStateRestoreEnable; 9458b8e80941Smrg bool ResourceStreamerStateSaveEnable; 9459b8e80941Smrg bool CoreModeEnable; 9460b8e80941Smrg uint32_t ReservedMustbe1; 9461b8e80941Smrg __gen_address_type LogicalContextAddress; 9462b8e80941Smrg}; 9463b8e80941Smrg 9464b8e80941Smrgstatic inline void 9465b8e80941SmrgGEN10_MI_SET_CONTEXT_pack(__attribute__((unused)) __gen_user_data *data, 9466b8e80941Smrg __attribute__((unused)) void * restrict dst, 9467b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_SET_CONTEXT * restrict values) 9468b8e80941Smrg{ 9469b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9470b8e80941Smrg 9471b8e80941Smrg dw[0] = 9472b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9473b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9474b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9475b8e80941Smrg 9476b8e80941Smrg const uint32_t v1 = 9477b8e80941Smrg __gen_uint(values->RestoreInhibit, 0, 0) | 9478b8e80941Smrg __gen_uint(values->ForceRestore, 1, 1) | 9479b8e80941Smrg __gen_uint(values->ResourceStreamerStateRestoreEnable, 2, 2) | 9480b8e80941Smrg __gen_uint(values->ResourceStreamerStateSaveEnable, 3, 3) | 9481b8e80941Smrg __gen_uint(values->CoreModeEnable, 4, 4) | 9482b8e80941Smrg __gen_uint(values->ReservedMustbe1, 8, 8); 9483b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->LogicalContextAddress, v1); 9484b8e80941Smrg} 9485b8e80941Smrg 9486b8e80941Smrg#define GEN10_MI_SET_PREDICATE_length 1 9487b8e80941Smrg#define GEN10_MI_SET_PREDICATE_length_bias 1 9488b8e80941Smrg#define GEN10_MI_SET_PREDICATE_header \ 9489b8e80941Smrg .MICommandOpcode = 1, \ 9490b8e80941Smrg .CommandType = 0 9491b8e80941Smrg 9492b8e80941Smrgstruct GEN10_MI_SET_PREDICATE { 9493b8e80941Smrg uint32_t PREDICATEENABLE; 9494b8e80941Smrg#define NOOPNever 0 9495b8e80941Smrg#define NOOPonResult2clear 1 9496b8e80941Smrg#define NOOPonResult2set 2 9497b8e80941Smrg#define NOOPonResultclear 3 9498b8e80941Smrg#define NOOPonResultset 4 9499b8e80941Smrg#define NOOPAlways 15 9500b8e80941Smrg uint32_t MICommandOpcode; 9501b8e80941Smrg uint32_t CommandType; 9502b8e80941Smrg}; 9503b8e80941Smrg 9504b8e80941Smrgstatic inline void 9505b8e80941SmrgGEN10_MI_SET_PREDICATE_pack(__attribute__((unused)) __gen_user_data *data, 9506b8e80941Smrg __attribute__((unused)) void * restrict dst, 9507b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_SET_PREDICATE * restrict values) 9508b8e80941Smrg{ 9509b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9510b8e80941Smrg 9511b8e80941Smrg dw[0] = 9512b8e80941Smrg __gen_uint(values->PREDICATEENABLE, 0, 3) | 9513b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9514b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9515b8e80941Smrg} 9516b8e80941Smrg 9517b8e80941Smrg#define GEN10_MI_STORE_DATA_IMM_length 4 9518b8e80941Smrg#define GEN10_MI_STORE_DATA_IMM_length_bias 2 9519b8e80941Smrg#define GEN10_MI_STORE_DATA_IMM_header \ 9520b8e80941Smrg .DWordLength = 2, \ 9521b8e80941Smrg .MICommandOpcode = 32, \ 9522b8e80941Smrg .CommandType = 0 9523b8e80941Smrg 9524b8e80941Smrgstruct GEN10_MI_STORE_DATA_IMM { 9525b8e80941Smrg uint32_t DWordLength; 9526b8e80941Smrg uint32_t StoreQword; 9527b8e80941Smrg bool UseGlobalGTT; 9528b8e80941Smrg uint32_t MICommandOpcode; 9529b8e80941Smrg uint32_t CommandType; 9530b8e80941Smrg uint32_t CoreModeEnable; 9531b8e80941Smrg __gen_address_type Address; 9532b8e80941Smrg uint64_t ImmediateData; 9533b8e80941Smrg}; 9534b8e80941Smrg 9535b8e80941Smrgstatic inline void 9536b8e80941SmrgGEN10_MI_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 9537b8e80941Smrg __attribute__((unused)) void * restrict dst, 9538b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_STORE_DATA_IMM * restrict values) 9539b8e80941Smrg{ 9540b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9541b8e80941Smrg 9542b8e80941Smrg dw[0] = 9543b8e80941Smrg __gen_uint(values->DWordLength, 0, 9) | 9544b8e80941Smrg __gen_uint(values->StoreQword, 21, 21) | 9545b8e80941Smrg __gen_uint(values->UseGlobalGTT, 22, 22) | 9546b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9547b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9548b8e80941Smrg 9549b8e80941Smrg const uint64_t v1 = 9550b8e80941Smrg __gen_uint(values->CoreModeEnable, 0, 0); 9551b8e80941Smrg const uint64_t v1_address = 9552b8e80941Smrg __gen_combine_address(data, &dw[1], values->Address, v1); 9553b8e80941Smrg dw[1] = v1_address; 9554b8e80941Smrg dw[2] = (v1_address >> 32) | (v1 >> 32); 9555b8e80941Smrg 9556b8e80941Smrg const uint64_t v3 = 9557b8e80941Smrg __gen_uint(values->ImmediateData, 0, 63); 9558b8e80941Smrg dw[3] = v3; 9559b8e80941Smrg dw[4] = v3 >> 32; 9560b8e80941Smrg} 9561b8e80941Smrg 9562b8e80941Smrg#define GEN10_MI_STORE_DATA_INDEX_length 3 9563b8e80941Smrg#define GEN10_MI_STORE_DATA_INDEX_length_bias 2 9564b8e80941Smrg#define GEN10_MI_STORE_DATA_INDEX_header \ 9565b8e80941Smrg .DWordLength = 1, \ 9566b8e80941Smrg .MICommandOpcode = 33, \ 9567b8e80941Smrg .CommandType = 0 9568b8e80941Smrg 9569b8e80941Smrgstruct GEN10_MI_STORE_DATA_INDEX { 9570b8e80941Smrg uint32_t DWordLength; 9571b8e80941Smrg uint32_t UsePerProcessHardwareStatusPage; 9572b8e80941Smrg uint32_t MICommandOpcode; 9573b8e80941Smrg uint32_t CommandType; 9574b8e80941Smrg uint32_t Offset; 9575b8e80941Smrg uint32_t DataDWord0; 9576b8e80941Smrg uint32_t DataDWord1; 9577b8e80941Smrg}; 9578b8e80941Smrg 9579b8e80941Smrgstatic inline void 9580b8e80941SmrgGEN10_MI_STORE_DATA_INDEX_pack(__attribute__((unused)) __gen_user_data *data, 9581b8e80941Smrg __attribute__((unused)) void * restrict dst, 9582b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_STORE_DATA_INDEX * restrict values) 9583b8e80941Smrg{ 9584b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9585b8e80941Smrg 9586b8e80941Smrg dw[0] = 9587b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9588b8e80941Smrg __gen_uint(values->UsePerProcessHardwareStatusPage, 21, 21) | 9589b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9590b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9591b8e80941Smrg 9592b8e80941Smrg dw[1] = 9593b8e80941Smrg __gen_uint(values->Offset, 2, 11); 9594b8e80941Smrg 9595b8e80941Smrg dw[2] = 9596b8e80941Smrg __gen_uint(values->DataDWord0, 0, 31); 9597b8e80941Smrg} 9598b8e80941Smrg 9599b8e80941Smrg#define GEN10_MI_STORE_REGISTER_MEM_length 4 9600b8e80941Smrg#define GEN10_MI_STORE_REGISTER_MEM_length_bias 2 9601b8e80941Smrg#define GEN10_MI_STORE_REGISTER_MEM_header \ 9602b8e80941Smrg .DWordLength = 2, \ 9603b8e80941Smrg .MICommandOpcode = 36, \ 9604b8e80941Smrg .CommandType = 0 9605b8e80941Smrg 9606b8e80941Smrgstruct GEN10_MI_STORE_REGISTER_MEM { 9607b8e80941Smrg uint32_t DWordLength; 9608b8e80941Smrg bool PredicateEnable; 9609b8e80941Smrg bool UseGlobalGTT; 9610b8e80941Smrg uint32_t MICommandOpcode; 9611b8e80941Smrg uint32_t CommandType; 9612b8e80941Smrg uint64_t RegisterAddress; 9613b8e80941Smrg __gen_address_type MemoryAddress; 9614b8e80941Smrg}; 9615b8e80941Smrg 9616b8e80941Smrgstatic inline void 9617b8e80941SmrgGEN10_MI_STORE_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 9618b8e80941Smrg __attribute__((unused)) void * restrict dst, 9619b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_STORE_REGISTER_MEM * restrict values) 9620b8e80941Smrg{ 9621b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9622b8e80941Smrg 9623b8e80941Smrg dw[0] = 9624b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9625b8e80941Smrg __gen_uint(values->PredicateEnable, 21, 21) | 9626b8e80941Smrg __gen_uint(values->UseGlobalGTT, 22, 22) | 9627b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9628b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9629b8e80941Smrg 9630b8e80941Smrg dw[1] = 9631b8e80941Smrg __gen_offset(values->RegisterAddress, 2, 22); 9632b8e80941Smrg 9633b8e80941Smrg const uint64_t v2_address = 9634b8e80941Smrg __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 9635b8e80941Smrg dw[2] = v2_address; 9636b8e80941Smrg dw[3] = v2_address >> 32; 9637b8e80941Smrg} 9638b8e80941Smrg 9639b8e80941Smrg#define GEN10_MI_SUSPEND_FLUSH_length 1 9640b8e80941Smrg#define GEN10_MI_SUSPEND_FLUSH_length_bias 1 9641b8e80941Smrg#define GEN10_MI_SUSPEND_FLUSH_header \ 9642b8e80941Smrg .MICommandOpcode = 11, \ 9643b8e80941Smrg .CommandType = 0 9644b8e80941Smrg 9645b8e80941Smrgstruct GEN10_MI_SUSPEND_FLUSH { 9646b8e80941Smrg bool SuspendFlush; 9647b8e80941Smrg uint32_t MICommandOpcode; 9648b8e80941Smrg uint32_t CommandType; 9649b8e80941Smrg}; 9650b8e80941Smrg 9651b8e80941Smrgstatic inline void 9652b8e80941SmrgGEN10_MI_SUSPEND_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 9653b8e80941Smrg __attribute__((unused)) void * restrict dst, 9654b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_SUSPEND_FLUSH * restrict values) 9655b8e80941Smrg{ 9656b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9657b8e80941Smrg 9658b8e80941Smrg dw[0] = 9659b8e80941Smrg __gen_uint(values->SuspendFlush, 0, 0) | 9660b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9661b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9662b8e80941Smrg} 9663b8e80941Smrg 9664b8e80941Smrg#define GEN10_MI_TOPOLOGY_FILTER_length 1 9665b8e80941Smrg#define GEN10_MI_TOPOLOGY_FILTER_length_bias 1 9666b8e80941Smrg#define GEN10_MI_TOPOLOGY_FILTER_header \ 9667b8e80941Smrg .MICommandOpcode = 13, \ 9668b8e80941Smrg .CommandType = 0 9669b8e80941Smrg 9670b8e80941Smrgstruct GEN10_MI_TOPOLOGY_FILTER { 9671b8e80941Smrg enum GEN10_3D_Prim_Topo_Type TopologyFilterValue; 9672b8e80941Smrg uint32_t MICommandOpcode; 9673b8e80941Smrg uint32_t CommandType; 9674b8e80941Smrg}; 9675b8e80941Smrg 9676b8e80941Smrgstatic inline void 9677b8e80941SmrgGEN10_MI_TOPOLOGY_FILTER_pack(__attribute__((unused)) __gen_user_data *data, 9678b8e80941Smrg __attribute__((unused)) void * restrict dst, 9679b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_TOPOLOGY_FILTER * restrict values) 9680b8e80941Smrg{ 9681b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9682b8e80941Smrg 9683b8e80941Smrg dw[0] = 9684b8e80941Smrg __gen_uint(values->TopologyFilterValue, 0, 5) | 9685b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9686b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9687b8e80941Smrg} 9688b8e80941Smrg 9689b8e80941Smrg#define GEN10_MI_UPDATE_GTT_length_bias 2 9690b8e80941Smrg#define GEN10_MI_UPDATE_GTT_header \ 9691b8e80941Smrg .DWordLength = 0, \ 9692b8e80941Smrg .MICommandOpcode = 35, \ 9693b8e80941Smrg .CommandType = 0 9694b8e80941Smrg 9695b8e80941Smrgstruct GEN10_MI_UPDATE_GTT { 9696b8e80941Smrg uint32_t DWordLength; 9697b8e80941Smrg uint32_t MICommandOpcode; 9698b8e80941Smrg uint32_t CommandType; 9699b8e80941Smrg __gen_address_type EntryAddress; 9700b8e80941Smrg /* variable length fields follow */ 9701b8e80941Smrg}; 9702b8e80941Smrg 9703b8e80941Smrgstatic inline void 9704b8e80941SmrgGEN10_MI_UPDATE_GTT_pack(__attribute__((unused)) __gen_user_data *data, 9705b8e80941Smrg __attribute__((unused)) void * restrict dst, 9706b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_UPDATE_GTT * restrict values) 9707b8e80941Smrg{ 9708b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9709b8e80941Smrg 9710b8e80941Smrg dw[0] = 9711b8e80941Smrg __gen_uint(values->DWordLength, 0, 9) | 9712b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9713b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9714b8e80941Smrg 9715b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->EntryAddress, 0); 9716b8e80941Smrg} 9717b8e80941Smrg 9718b8e80941Smrg#define GEN10_MI_USER_INTERRUPT_length 1 9719b8e80941Smrg#define GEN10_MI_USER_INTERRUPT_length_bias 1 9720b8e80941Smrg#define GEN10_MI_USER_INTERRUPT_header \ 9721b8e80941Smrg .MICommandOpcode = 2, \ 9722b8e80941Smrg .CommandType = 0 9723b8e80941Smrg 9724b8e80941Smrgstruct GEN10_MI_USER_INTERRUPT { 9725b8e80941Smrg uint32_t MICommandOpcode; 9726b8e80941Smrg uint32_t CommandType; 9727b8e80941Smrg}; 9728b8e80941Smrg 9729b8e80941Smrgstatic inline void 9730b8e80941SmrgGEN10_MI_USER_INTERRUPT_pack(__attribute__((unused)) __gen_user_data *data, 9731b8e80941Smrg __attribute__((unused)) void * restrict dst, 9732b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_USER_INTERRUPT * restrict values) 9733b8e80941Smrg{ 9734b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9735b8e80941Smrg 9736b8e80941Smrg dw[0] = 9737b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9738b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9739b8e80941Smrg} 9740b8e80941Smrg 9741b8e80941Smrg#define GEN10_MI_WAIT_FOR_EVENT_length 1 9742b8e80941Smrg#define GEN10_MI_WAIT_FOR_EVENT_length_bias 1 9743b8e80941Smrg#define GEN10_MI_WAIT_FOR_EVENT_header \ 9744b8e80941Smrg .MICommandOpcode = 3, \ 9745b8e80941Smrg .CommandType = 0 9746b8e80941Smrg 9747b8e80941Smrgstruct GEN10_MI_WAIT_FOR_EVENT { 9748b8e80941Smrg bool DisplayPlnae1AScanLineWaitEnable; 9749b8e80941Smrg bool DisplayPlane1FlipPendingWaitEnable; 9750b8e80941Smrg bool DisplayPlane4FlipPendingWaitEnable; 9751b8e80941Smrg bool DisplayPlane1AVerticalBlankWaitEnable; 9752b8e80941Smrg bool DisplayPlane7FlipPendingWaitEnable; 9753b8e80941Smrg bool DisplayPlane8FlipPendingWaitEnable; 9754b8e80941Smrg bool DisplayPlane1BScanLineWaitEnable; 9755b8e80941Smrg bool DisplayPlane2FlipPendingWaitEnable; 9756b8e80941Smrg bool DisplayPlane5FlipPendingWaitEnable; 9757b8e80941Smrg bool DisplayPlane1BVerticalBlankWaitEnable; 9758b8e80941Smrg bool DisplayPlane1CScanLineWaitEnable; 9759b8e80941Smrg bool DisplayPlane3FlipPendingWaitEnable; 9760b8e80941Smrg bool DisplayPlane9FlipPendingWaitEnable; 9761b8e80941Smrg bool DisplayPlane10FlipPendingWaitEnable; 9762b8e80941Smrg bool DisplayPlane11FlipPendingWaitEnable; 9763b8e80941Smrg bool DisplayPlane12FlipPendingWaitEnable; 9764b8e80941Smrg bool DisplayPlane6FlipPendingWaitEnable; 9765b8e80941Smrg bool DisplayPlane1CVerticalBlankWaitEnable; 9766b8e80941Smrg uint32_t MICommandOpcode; 9767b8e80941Smrg uint32_t CommandType; 9768b8e80941Smrg}; 9769b8e80941Smrg 9770b8e80941Smrgstatic inline void 9771b8e80941SmrgGEN10_MI_WAIT_FOR_EVENT_pack(__attribute__((unused)) __gen_user_data *data, 9772b8e80941Smrg __attribute__((unused)) void * restrict dst, 9773b8e80941Smrg __attribute__((unused)) const struct GEN10_MI_WAIT_FOR_EVENT * restrict values) 9774b8e80941Smrg{ 9775b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9776b8e80941Smrg 9777b8e80941Smrg dw[0] = 9778b8e80941Smrg __gen_uint(values->DisplayPlnae1AScanLineWaitEnable, 0, 0) | 9779b8e80941Smrg __gen_uint(values->DisplayPlane1FlipPendingWaitEnable, 1, 1) | 9780b8e80941Smrg __gen_uint(values->DisplayPlane4FlipPendingWaitEnable, 2, 2) | 9781b8e80941Smrg __gen_uint(values->DisplayPlane1AVerticalBlankWaitEnable, 3, 3) | 9782b8e80941Smrg __gen_uint(values->DisplayPlane7FlipPendingWaitEnable, 6, 6) | 9783b8e80941Smrg __gen_uint(values->DisplayPlane8FlipPendingWaitEnable, 7, 7) | 9784b8e80941Smrg __gen_uint(values->DisplayPlane1BScanLineWaitEnable, 8, 8) | 9785b8e80941Smrg __gen_uint(values->DisplayPlane2FlipPendingWaitEnable, 9, 9) | 9786b8e80941Smrg __gen_uint(values->DisplayPlane5FlipPendingWaitEnable, 10, 10) | 9787b8e80941Smrg __gen_uint(values->DisplayPlane1BVerticalBlankWaitEnable, 11, 11) | 9788b8e80941Smrg __gen_uint(values->DisplayPlane1CScanLineWaitEnable, 14, 14) | 9789b8e80941Smrg __gen_uint(values->DisplayPlane3FlipPendingWaitEnable, 15, 15) | 9790b8e80941Smrg __gen_uint(values->DisplayPlane9FlipPendingWaitEnable, 16, 16) | 9791b8e80941Smrg __gen_uint(values->DisplayPlane10FlipPendingWaitEnable, 17, 17) | 9792b8e80941Smrg __gen_uint(values->DisplayPlane11FlipPendingWaitEnable, 18, 18) | 9793b8e80941Smrg __gen_uint(values->DisplayPlane12FlipPendingWaitEnable, 19, 19) | 9794b8e80941Smrg __gen_uint(values->DisplayPlane6FlipPendingWaitEnable, 20, 20) | 9795b8e80941Smrg __gen_uint(values->DisplayPlane1CVerticalBlankWaitEnable, 21, 21) | 9796b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 9797b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9798b8e80941Smrg} 9799b8e80941Smrg 9800b8e80941Smrg#define GEN10_PIPELINE_SELECT_length 1 9801b8e80941Smrg#define GEN10_PIPELINE_SELECT_length_bias 1 9802b8e80941Smrg#define GEN10_PIPELINE_SELECT_header \ 9803b8e80941Smrg ._3DCommandSubOpcode = 4, \ 9804b8e80941Smrg ._3DCommandOpcode = 1, \ 9805b8e80941Smrg .CommandSubType = 1, \ 9806b8e80941Smrg .CommandType = 3 9807b8e80941Smrg 9808b8e80941Smrgstruct GEN10_PIPELINE_SELECT { 9809b8e80941Smrg uint32_t PipelineSelection; 9810b8e80941Smrg#define _3D 0 9811b8e80941Smrg#define Media 1 9812b8e80941Smrg#define GPGPU 2 9813b8e80941Smrg bool MediaSamplerDOPClockGateEnable; 9814b8e80941Smrg bool ForceMediaAwake; 9815b8e80941Smrg uint32_t MaskBits; 9816b8e80941Smrg uint32_t _3DCommandSubOpcode; 9817b8e80941Smrg uint32_t _3DCommandOpcode; 9818b8e80941Smrg uint32_t CommandSubType; 9819b8e80941Smrg uint32_t CommandType; 9820b8e80941Smrg}; 9821b8e80941Smrg 9822b8e80941Smrgstatic inline void 9823b8e80941SmrgGEN10_PIPELINE_SELECT_pack(__attribute__((unused)) __gen_user_data *data, 9824b8e80941Smrg __attribute__((unused)) void * restrict dst, 9825b8e80941Smrg __attribute__((unused)) const struct GEN10_PIPELINE_SELECT * restrict values) 9826b8e80941Smrg{ 9827b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9828b8e80941Smrg 9829b8e80941Smrg dw[0] = 9830b8e80941Smrg __gen_uint(values->PipelineSelection, 0, 1) | 9831b8e80941Smrg __gen_uint(values->MediaSamplerDOPClockGateEnable, 4, 4) | 9832b8e80941Smrg __gen_uint(values->ForceMediaAwake, 5, 5) | 9833b8e80941Smrg __gen_uint(values->MaskBits, 8, 15) | 9834b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 9835b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 9836b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 9837b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9838b8e80941Smrg} 9839b8e80941Smrg 9840b8e80941Smrg#define GEN10_PIPE_CONTROL_length 6 9841b8e80941Smrg#define GEN10_PIPE_CONTROL_length_bias 2 9842b8e80941Smrg#define GEN10_PIPE_CONTROL_header \ 9843b8e80941Smrg .DWordLength = 4, \ 9844b8e80941Smrg ._3DCommandSubOpcode = 0, \ 9845b8e80941Smrg ._3DCommandOpcode = 2, \ 9846b8e80941Smrg .CommandSubType = 3, \ 9847b8e80941Smrg .CommandType = 3 9848b8e80941Smrg 9849b8e80941Smrgstruct GEN10_PIPE_CONTROL { 9850b8e80941Smrg uint32_t DWordLength; 9851b8e80941Smrg uint32_t _3DCommandSubOpcode; 9852b8e80941Smrg uint32_t _3DCommandOpcode; 9853b8e80941Smrg uint32_t CommandSubType; 9854b8e80941Smrg uint32_t CommandType; 9855b8e80941Smrg bool DepthCacheFlushEnable; 9856b8e80941Smrg bool StallAtPixelScoreboard; 9857b8e80941Smrg bool StateCacheInvalidationEnable; 9858b8e80941Smrg bool ConstantCacheInvalidationEnable; 9859b8e80941Smrg bool VFCacheInvalidationEnable; 9860b8e80941Smrg bool DCFlushEnable; 9861b8e80941Smrg bool PipeControlFlushEnable; 9862b8e80941Smrg bool NotifyEnable; 9863b8e80941Smrg bool IndirectStatePointersDisable; 9864b8e80941Smrg bool TextureCacheInvalidationEnable; 9865b8e80941Smrg bool InstructionCacheInvalidateEnable; 9866b8e80941Smrg bool RenderTargetCacheFlushEnable; 9867b8e80941Smrg bool DepthStallEnable; 9868b8e80941Smrg uint32_t PostSyncOperation; 9869b8e80941Smrg#define NoWrite 0 9870b8e80941Smrg#define WriteImmediateData 1 9871b8e80941Smrg#define WritePSDepthCount 2 9872b8e80941Smrg#define WriteTimestamp 3 9873b8e80941Smrg bool GenericMediaStateClear; 9874b8e80941Smrg bool PSDSyncEnable; 9875b8e80941Smrg bool TLBInvalidate; 9876b8e80941Smrg bool GlobalSnapshotCountReset; 9877b8e80941Smrg bool CommandStreamerStallEnable; 9878b8e80941Smrg uint32_t StoreDataIndex; 9879b8e80941Smrg uint32_t LRIPostSyncOperation; 9880b8e80941Smrg#define NoLRIOperation 0 9881b8e80941Smrg#define MMIOWriteImmediateData 1 9882b8e80941Smrg uint32_t DestinationAddressType; 9883b8e80941Smrg#define DAT_PPGTT 0 9884b8e80941Smrg#define DAT_GGTT 1 9885b8e80941Smrg bool FlushLLC; 9886b8e80941Smrg __gen_address_type Address; 9887b8e80941Smrg uint64_t ImmediateData; 9888b8e80941Smrg}; 9889b8e80941Smrg 9890b8e80941Smrgstatic inline void 9891b8e80941SmrgGEN10_PIPE_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 9892b8e80941Smrg __attribute__((unused)) void * restrict dst, 9893b8e80941Smrg __attribute__((unused)) const struct GEN10_PIPE_CONTROL * restrict values) 9894b8e80941Smrg{ 9895b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9896b8e80941Smrg 9897b8e80941Smrg dw[0] = 9898b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9899b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 9900b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 9901b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 9902b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 9903b8e80941Smrg 9904b8e80941Smrg dw[1] = 9905b8e80941Smrg __gen_uint(values->DepthCacheFlushEnable, 0, 0) | 9906b8e80941Smrg __gen_uint(values->StallAtPixelScoreboard, 1, 1) | 9907b8e80941Smrg __gen_uint(values->StateCacheInvalidationEnable, 2, 2) | 9908b8e80941Smrg __gen_uint(values->ConstantCacheInvalidationEnable, 3, 3) | 9909b8e80941Smrg __gen_uint(values->VFCacheInvalidationEnable, 4, 4) | 9910b8e80941Smrg __gen_uint(values->DCFlushEnable, 5, 5) | 9911b8e80941Smrg __gen_uint(values->PipeControlFlushEnable, 7, 7) | 9912b8e80941Smrg __gen_uint(values->NotifyEnable, 8, 8) | 9913b8e80941Smrg __gen_uint(values->IndirectStatePointersDisable, 9, 9) | 9914b8e80941Smrg __gen_uint(values->TextureCacheInvalidationEnable, 10, 10) | 9915b8e80941Smrg __gen_uint(values->InstructionCacheInvalidateEnable, 11, 11) | 9916b8e80941Smrg __gen_uint(values->RenderTargetCacheFlushEnable, 12, 12) | 9917b8e80941Smrg __gen_uint(values->DepthStallEnable, 13, 13) | 9918b8e80941Smrg __gen_uint(values->PostSyncOperation, 14, 15) | 9919b8e80941Smrg __gen_uint(values->GenericMediaStateClear, 16, 16) | 9920b8e80941Smrg __gen_uint(values->PSDSyncEnable, 17, 17) | 9921b8e80941Smrg __gen_uint(values->TLBInvalidate, 18, 18) | 9922b8e80941Smrg __gen_uint(values->GlobalSnapshotCountReset, 19, 19) | 9923b8e80941Smrg __gen_uint(values->CommandStreamerStallEnable, 20, 20) | 9924b8e80941Smrg __gen_uint(values->StoreDataIndex, 21, 21) | 9925b8e80941Smrg __gen_uint(values->LRIPostSyncOperation, 23, 23) | 9926b8e80941Smrg __gen_uint(values->DestinationAddressType, 24, 24) | 9927b8e80941Smrg __gen_uint(values->FlushLLC, 26, 26); 9928b8e80941Smrg 9929b8e80941Smrg const uint64_t v2_address = 9930b8e80941Smrg __gen_combine_address(data, &dw[2], values->Address, 0); 9931b8e80941Smrg dw[2] = v2_address; 9932b8e80941Smrg dw[3] = v2_address >> 32; 9933b8e80941Smrg 9934b8e80941Smrg const uint64_t v4 = 9935b8e80941Smrg __gen_uint(values->ImmediateData, 0, 63); 9936b8e80941Smrg dw[4] = v4; 9937b8e80941Smrg dw[5] = v4 >> 32; 9938b8e80941Smrg} 9939b8e80941Smrg 9940b8e80941Smrg#define GEN10_STATE_BASE_ADDRESS_length 22 9941b8e80941Smrg#define GEN10_STATE_BASE_ADDRESS_length_bias 2 9942b8e80941Smrg#define GEN10_STATE_BASE_ADDRESS_header \ 9943b8e80941Smrg .DWordLength = 20, \ 9944b8e80941Smrg ._3DCommandSubOpcode = 1, \ 9945b8e80941Smrg ._3DCommandOpcode = 1, \ 9946b8e80941Smrg .CommandSubType = 0, \ 9947b8e80941Smrg .CommandType = 3 9948b8e80941Smrg 9949b8e80941Smrgstruct GEN10_STATE_BASE_ADDRESS { 9950b8e80941Smrg uint32_t DWordLength; 9951b8e80941Smrg uint32_t _3DCommandSubOpcode; 9952b8e80941Smrg uint32_t _3DCommandOpcode; 9953b8e80941Smrg uint32_t CommandSubType; 9954b8e80941Smrg uint32_t CommandType; 9955b8e80941Smrg bool GeneralStateBaseAddressModifyEnable; 9956b8e80941Smrg uint32_t GeneralStateMOCS; 9957b8e80941Smrg __gen_address_type GeneralStateBaseAddress; 9958b8e80941Smrg uint32_t StatelessDataPortAccessMOCS; 9959b8e80941Smrg bool SurfaceStateBaseAddressModifyEnable; 9960b8e80941Smrg uint32_t SurfaceStateMOCS; 9961b8e80941Smrg __gen_address_type SurfaceStateBaseAddress; 9962b8e80941Smrg bool DynamicStateBaseAddressModifyEnable; 9963b8e80941Smrg uint32_t DynamicStateMOCS; 9964b8e80941Smrg __gen_address_type DynamicStateBaseAddress; 9965b8e80941Smrg bool IndirectObjectBaseAddressModifyEnable; 9966b8e80941Smrg uint32_t IndirectObjectMOCS; 9967b8e80941Smrg __gen_address_type IndirectObjectBaseAddress; 9968b8e80941Smrg bool InstructionBaseAddressModifyEnable; 9969b8e80941Smrg uint32_t InstructionMOCS; 9970b8e80941Smrg __gen_address_type InstructionBaseAddress; 9971b8e80941Smrg bool GeneralStateBufferSizeModifyEnable; 9972b8e80941Smrg uint32_t GeneralStateBufferSize; 9973b8e80941Smrg bool DynamicStateBufferSizeModifyEnable; 9974b8e80941Smrg uint32_t DynamicStateBufferSize; 9975b8e80941Smrg bool IndirectObjectBufferSizeModifyEnable; 9976b8e80941Smrg uint32_t IndirectObjectBufferSize; 9977b8e80941Smrg bool InstructionBuffersizeModifyEnable; 9978b8e80941Smrg uint32_t InstructionBufferSize; 9979b8e80941Smrg bool BindlessSurfaceStateBaseAddressModifyEnable; 9980b8e80941Smrg uint32_t BindlessSurfaceStateMOCS; 9981b8e80941Smrg __gen_address_type BindlessSurfaceStateBaseAddress; 9982b8e80941Smrg uint32_t BindlessSurfaceStateSize; 9983b8e80941Smrg bool BindlessSamplerStateBaseAddressModifyEnable; 9984b8e80941Smrg uint32_t BindlessSamplerStateMOCS; 9985b8e80941Smrg __gen_address_type BindlessSamplerStateBaseAddress; 9986b8e80941Smrg uint32_t BindlessSamplerStateBufferSize; 9987b8e80941Smrg}; 9988b8e80941Smrg 9989b8e80941Smrgstatic inline void 9990b8e80941SmrgGEN10_STATE_BASE_ADDRESS_pack(__attribute__((unused)) __gen_user_data *data, 9991b8e80941Smrg __attribute__((unused)) void * restrict dst, 9992b8e80941Smrg __attribute__((unused)) const struct GEN10_STATE_BASE_ADDRESS * restrict values) 9993b8e80941Smrg{ 9994b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 9995b8e80941Smrg 9996b8e80941Smrg dw[0] = 9997b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 9998b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 9999b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 10000b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 10001b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 10002b8e80941Smrg 10003b8e80941Smrg const uint64_t v1 = 10004b8e80941Smrg __gen_uint(values->GeneralStateBaseAddressModifyEnable, 0, 0) | 10005b8e80941Smrg __gen_uint(values->GeneralStateMOCS, 4, 10); 10006b8e80941Smrg const uint64_t v1_address = 10007b8e80941Smrg __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, v1); 10008b8e80941Smrg dw[1] = v1_address; 10009b8e80941Smrg dw[2] = (v1_address >> 32) | (v1 >> 32); 10010b8e80941Smrg 10011b8e80941Smrg dw[3] = 10012b8e80941Smrg __gen_uint(values->StatelessDataPortAccessMOCS, 16, 22); 10013b8e80941Smrg 10014b8e80941Smrg const uint64_t v4 = 10015b8e80941Smrg __gen_uint(values->SurfaceStateBaseAddressModifyEnable, 0, 0) | 10016b8e80941Smrg __gen_uint(values->SurfaceStateMOCS, 4, 10); 10017b8e80941Smrg const uint64_t v4_address = 10018b8e80941Smrg __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, v4); 10019b8e80941Smrg dw[4] = v4_address; 10020b8e80941Smrg dw[5] = (v4_address >> 32) | (v4 >> 32); 10021b8e80941Smrg 10022b8e80941Smrg const uint64_t v6 = 10023b8e80941Smrg __gen_uint(values->DynamicStateBaseAddressModifyEnable, 0, 0) | 10024b8e80941Smrg __gen_uint(values->DynamicStateMOCS, 4, 10); 10025b8e80941Smrg const uint64_t v6_address = 10026b8e80941Smrg __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, v6); 10027b8e80941Smrg dw[6] = v6_address; 10028b8e80941Smrg dw[7] = (v6_address >> 32) | (v6 >> 32); 10029b8e80941Smrg 10030b8e80941Smrg const uint64_t v8 = 10031b8e80941Smrg __gen_uint(values->IndirectObjectBaseAddressModifyEnable, 0, 0) | 10032b8e80941Smrg __gen_uint(values->IndirectObjectMOCS, 4, 10); 10033b8e80941Smrg const uint64_t v8_address = 10034b8e80941Smrg __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, v8); 10035b8e80941Smrg dw[8] = v8_address; 10036b8e80941Smrg dw[9] = (v8_address >> 32) | (v8 >> 32); 10037b8e80941Smrg 10038b8e80941Smrg const uint64_t v10 = 10039b8e80941Smrg __gen_uint(values->InstructionBaseAddressModifyEnable, 0, 0) | 10040b8e80941Smrg __gen_uint(values->InstructionMOCS, 4, 10); 10041b8e80941Smrg const uint64_t v10_address = 10042b8e80941Smrg __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, v10); 10043b8e80941Smrg dw[10] = v10_address; 10044b8e80941Smrg dw[11] = (v10_address >> 32) | (v10 >> 32); 10045b8e80941Smrg 10046b8e80941Smrg dw[12] = 10047b8e80941Smrg __gen_uint(values->GeneralStateBufferSizeModifyEnable, 0, 0) | 10048b8e80941Smrg __gen_uint(values->GeneralStateBufferSize, 12, 31); 10049b8e80941Smrg 10050b8e80941Smrg dw[13] = 10051b8e80941Smrg __gen_uint(values->DynamicStateBufferSizeModifyEnable, 0, 0) | 10052b8e80941Smrg __gen_uint(values->DynamicStateBufferSize, 12, 31); 10053b8e80941Smrg 10054b8e80941Smrg dw[14] = 10055b8e80941Smrg __gen_uint(values->IndirectObjectBufferSizeModifyEnable, 0, 0) | 10056b8e80941Smrg __gen_uint(values->IndirectObjectBufferSize, 12, 31); 10057b8e80941Smrg 10058b8e80941Smrg dw[15] = 10059b8e80941Smrg __gen_uint(values->InstructionBuffersizeModifyEnable, 0, 0) | 10060b8e80941Smrg __gen_uint(values->InstructionBufferSize, 12, 31); 10061b8e80941Smrg 10062b8e80941Smrg const uint64_t v16 = 10063b8e80941Smrg __gen_uint(values->BindlessSurfaceStateBaseAddressModifyEnable, 0, 0) | 10064b8e80941Smrg __gen_uint(values->BindlessSurfaceStateMOCS, 4, 10); 10065b8e80941Smrg const uint64_t v16_address = 10066b8e80941Smrg __gen_combine_address(data, &dw[16], values->BindlessSurfaceStateBaseAddress, v16); 10067b8e80941Smrg dw[16] = v16_address; 10068b8e80941Smrg dw[17] = (v16_address >> 32) | (v16 >> 32); 10069b8e80941Smrg 10070b8e80941Smrg dw[18] = 10071b8e80941Smrg __gen_uint(values->BindlessSurfaceStateSize, 12, 31); 10072b8e80941Smrg 10073b8e80941Smrg const uint64_t v19 = 10074b8e80941Smrg __gen_uint(values->BindlessSamplerStateBaseAddressModifyEnable, 0, 0) | 10075b8e80941Smrg __gen_uint(values->BindlessSamplerStateMOCS, 4, 10); 10076b8e80941Smrg const uint64_t v19_address = 10077b8e80941Smrg __gen_combine_address(data, &dw[19], values->BindlessSamplerStateBaseAddress, v19); 10078b8e80941Smrg dw[19] = v19_address; 10079b8e80941Smrg dw[20] = (v19_address >> 32) | (v19 >> 32); 10080b8e80941Smrg 10081b8e80941Smrg dw[21] = 10082b8e80941Smrg __gen_uint(values->BindlessSamplerStateBufferSize, 12, 31); 10083b8e80941Smrg} 10084b8e80941Smrg 10085b8e80941Smrg#define GEN10_STATE_SIP_length 3 10086b8e80941Smrg#define GEN10_STATE_SIP_length_bias 2 10087b8e80941Smrg#define GEN10_STATE_SIP_header \ 10088b8e80941Smrg .DWordLength = 1, \ 10089b8e80941Smrg ._3DCommandSubOpcode = 2, \ 10090b8e80941Smrg ._3DCommandOpcode = 1, \ 10091b8e80941Smrg .CommandSubType = 0, \ 10092b8e80941Smrg .CommandType = 3 10093b8e80941Smrg 10094b8e80941Smrgstruct GEN10_STATE_SIP { 10095b8e80941Smrg uint32_t DWordLength; 10096b8e80941Smrg uint32_t _3DCommandSubOpcode; 10097b8e80941Smrg uint32_t _3DCommandOpcode; 10098b8e80941Smrg uint32_t CommandSubType; 10099b8e80941Smrg uint32_t CommandType; 10100b8e80941Smrg uint64_t SystemInstructionPointer; 10101b8e80941Smrg}; 10102b8e80941Smrg 10103b8e80941Smrgstatic inline void 10104b8e80941SmrgGEN10_STATE_SIP_pack(__attribute__((unused)) __gen_user_data *data, 10105b8e80941Smrg __attribute__((unused)) void * restrict dst, 10106b8e80941Smrg __attribute__((unused)) const struct GEN10_STATE_SIP * restrict values) 10107b8e80941Smrg{ 10108b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10109b8e80941Smrg 10110b8e80941Smrg dw[0] = 10111b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 10112b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 10113b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 10114b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 10115b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 10116b8e80941Smrg 10117b8e80941Smrg const uint64_t v1 = 10118b8e80941Smrg __gen_offset(values->SystemInstructionPointer, 4, 63); 10119b8e80941Smrg dw[1] = v1; 10120b8e80941Smrg dw[2] = v1 >> 32; 10121b8e80941Smrg} 10122b8e80941Smrg 10123b8e80941Smrg#define GEN10_BCS_INSTDONE_num 0x2206c 10124b8e80941Smrg#define GEN10_BCS_INSTDONE_length 1 10125b8e80941Smrgstruct GEN10_BCS_INSTDONE { 10126b8e80941Smrg bool RingEnable; 10127b8e80941Smrg bool BlitterIDLE; 10128b8e80941Smrg bool GABIDLE; 10129b8e80941Smrg bool BCSDone; 10130b8e80941Smrg}; 10131b8e80941Smrg 10132b8e80941Smrgstatic inline void 10133b8e80941SmrgGEN10_BCS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10134b8e80941Smrg __attribute__((unused)) void * restrict dst, 10135b8e80941Smrg __attribute__((unused)) const struct GEN10_BCS_INSTDONE * restrict values) 10136b8e80941Smrg{ 10137b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10138b8e80941Smrg 10139b8e80941Smrg dw[0] = 10140b8e80941Smrg __gen_uint(values->RingEnable, 0, 0) | 10141b8e80941Smrg __gen_uint(values->BlitterIDLE, 1, 1) | 10142b8e80941Smrg __gen_uint(values->GABIDLE, 2, 2) | 10143b8e80941Smrg __gen_uint(values->BCSDone, 3, 3); 10144b8e80941Smrg} 10145b8e80941Smrg 10146b8e80941Smrg#define GEN10_CACHE_MODE_0_num 0x7000 10147b8e80941Smrg#define GEN10_CACHE_MODE_0_length 1 10148b8e80941Smrgstruct GEN10_CACHE_MODE_0 { 10149b8e80941Smrg bool Nulltilefixdisable; 10150b8e80941Smrg bool Disableclockgatinginthepixelbackend; 10151b8e80941Smrg bool HierarchicalZRAWStallOptimizationDisable; 10152b8e80941Smrg bool RCCEvictionPolicy; 10153b8e80941Smrg bool STCPMAOptimizationEnable; 10154b8e80941Smrg uint32_t SamplerL2RequestArbitration; 10155b8e80941Smrg#define RoundRobin 0 10156b8e80941Smrg#define FetchareHighestPriority 1 10157b8e80941Smrg#define ConstantsareHighestPriority 2 10158b8e80941Smrg bool SamplerL2TLBPrefetchEnable; 10159b8e80941Smrg bool SamplerSetRemappingfor3DDisable; 10160b8e80941Smrg uint32_t MSAACompressionPlaneNumberThresholdforeLLC; 10161b8e80941Smrg bool SamplerL2Disable; 10162b8e80941Smrg bool NulltilefixdisableMask; 10163b8e80941Smrg bool DisableclockgatinginthepixelbackendMask; 10164b8e80941Smrg bool HierarchicalZRAWStallOptimizationDisableMask; 10165b8e80941Smrg bool RCCEvictionPolicyMask; 10166b8e80941Smrg bool STCPMAOptimizationEnableMask; 10167b8e80941Smrg uint32_t SamplerL2RequestArbitrationMask; 10168b8e80941Smrg bool SamplerL2TLBPrefetchEnableMask; 10169b8e80941Smrg bool SamplerSetRemappingfor3DDisableMask; 10170b8e80941Smrg uint32_t MSAACompressionPlaneNumberThresholdforeLLCMask; 10171b8e80941Smrg bool SamplerL2DisableMask; 10172b8e80941Smrg}; 10173b8e80941Smrg 10174b8e80941Smrgstatic inline void 10175b8e80941SmrgGEN10_CACHE_MODE_0_pack(__attribute__((unused)) __gen_user_data *data, 10176b8e80941Smrg __attribute__((unused)) void * restrict dst, 10177b8e80941Smrg __attribute__((unused)) const struct GEN10_CACHE_MODE_0 * restrict values) 10178b8e80941Smrg{ 10179b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10180b8e80941Smrg 10181b8e80941Smrg dw[0] = 10182b8e80941Smrg __gen_uint(values->Nulltilefixdisable, 0, 0) | 10183b8e80941Smrg __gen_uint(values->Disableclockgatinginthepixelbackend, 1, 1) | 10184b8e80941Smrg __gen_uint(values->HierarchicalZRAWStallOptimizationDisable, 2, 2) | 10185b8e80941Smrg __gen_uint(values->RCCEvictionPolicy, 4, 4) | 10186b8e80941Smrg __gen_uint(values->STCPMAOptimizationEnable, 5, 5) | 10187b8e80941Smrg __gen_uint(values->SamplerL2RequestArbitration, 6, 7) | 10188b8e80941Smrg __gen_uint(values->SamplerL2TLBPrefetchEnable, 9, 9) | 10189b8e80941Smrg __gen_uint(values->SamplerSetRemappingfor3DDisable, 11, 11) | 10190b8e80941Smrg __gen_uint(values->MSAACompressionPlaneNumberThresholdforeLLC, 12, 14) | 10191b8e80941Smrg __gen_uint(values->SamplerL2Disable, 15, 15) | 10192b8e80941Smrg __gen_uint(values->NulltilefixdisableMask, 16, 16) | 10193b8e80941Smrg __gen_uint(values->DisableclockgatinginthepixelbackendMask, 17, 17) | 10194b8e80941Smrg __gen_uint(values->HierarchicalZRAWStallOptimizationDisableMask, 18, 18) | 10195b8e80941Smrg __gen_uint(values->RCCEvictionPolicyMask, 20, 20) | 10196b8e80941Smrg __gen_uint(values->STCPMAOptimizationEnableMask, 21, 21) | 10197b8e80941Smrg __gen_uint(values->SamplerL2RequestArbitrationMask, 22, 23) | 10198b8e80941Smrg __gen_uint(values->SamplerL2TLBPrefetchEnableMask, 25, 25) | 10199b8e80941Smrg __gen_uint(values->SamplerSetRemappingfor3DDisableMask, 27, 27) | 10200b8e80941Smrg __gen_uint(values->MSAACompressionPlaneNumberThresholdforeLLCMask, 28, 30) | 10201b8e80941Smrg __gen_uint(values->SamplerL2DisableMask, 31, 31); 10202b8e80941Smrg} 10203b8e80941Smrg 10204b8e80941Smrg#define GEN10_CACHE_MODE_1_num 0x7004 10205b8e80941Smrg#define GEN10_CACHE_MODE_1_length 1 10206b8e80941Smrgstruct GEN10_CACHE_MODE_1 { 10207b8e80941Smrg bool PartialResolveDisableInVC; 10208b8e80941Smrg bool RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable; 10209b8e80941Smrg bool MCSCacheDisable; 10210b8e80941Smrg bool MSCRAWHazardAvoidanceBit; 10211b8e80941Smrg uint32_t NPEarlyZFailsDisable; 10212b8e80941Smrg bool BlendOptimizationFixDisable; 10213b8e80941Smrg bool ColorCompressionDisable; 10214b8e80941Smrg bool PartialResolveDisableInVCMask; 10215b8e80941Smrg bool RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask; 10216b8e80941Smrg bool MCSCacheDisableMask; 10217b8e80941Smrg bool MSCRAWHazardAvoidanceBitMask; 10218b8e80941Smrg bool NPEarlyZFailsDisableMask; 10219b8e80941Smrg bool BlendOptimizationFixDisableMask; 10220b8e80941Smrg bool ColorCompressionDisableMask; 10221b8e80941Smrg}; 10222b8e80941Smrg 10223b8e80941Smrgstatic inline void 10224b8e80941SmrgGEN10_CACHE_MODE_1_pack(__attribute__((unused)) __gen_user_data *data, 10225b8e80941Smrg __attribute__((unused)) void * restrict dst, 10226b8e80941Smrg __attribute__((unused)) const struct GEN10_CACHE_MODE_1 * restrict values) 10227b8e80941Smrg{ 10228b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10229b8e80941Smrg 10230b8e80941Smrg dw[0] = 10231b8e80941Smrg __gen_uint(values->PartialResolveDisableInVC, 1, 1) | 10232b8e80941Smrg __gen_uint(values->RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable, 3, 3) | 10233b8e80941Smrg __gen_uint(values->MCSCacheDisable, 5, 5) | 10234b8e80941Smrg __gen_uint(values->MSCRAWHazardAvoidanceBit, 9, 9) | 10235b8e80941Smrg __gen_uint(values->NPEarlyZFailsDisable, 13, 13) | 10236b8e80941Smrg __gen_uint(values->BlendOptimizationFixDisable, 14, 14) | 10237b8e80941Smrg __gen_uint(values->ColorCompressionDisable, 15, 15) | 10238b8e80941Smrg __gen_uint(values->PartialResolveDisableInVCMask, 17, 17) | 10239b8e80941Smrg __gen_uint(values->RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask, 19, 19) | 10240b8e80941Smrg __gen_uint(values->MCSCacheDisableMask, 21, 21) | 10241b8e80941Smrg __gen_uint(values->MSCRAWHazardAvoidanceBitMask, 25, 25) | 10242b8e80941Smrg __gen_uint(values->NPEarlyZFailsDisableMask, 29, 29) | 10243b8e80941Smrg __gen_uint(values->BlendOptimizationFixDisableMask, 30, 30) | 10244b8e80941Smrg __gen_uint(values->ColorCompressionDisableMask, 31, 31); 10245b8e80941Smrg} 10246b8e80941Smrg 10247b8e80941Smrg#define GEN10_CACHE_MODE_SS_num 0xe420 10248b8e80941Smrg#define GEN10_CACHE_MODE_SS_length 1 10249b8e80941Smrgstruct GEN10_CACHE_MODE_SS { 10250b8e80941Smrg bool InstructionLevel1CacheDisable; 10251b8e80941Smrg bool InstructionLevel1CacheandInFlightQueueDisable; 10252b8e80941Smrg bool FloatBlendOptimizationEnable; 10253b8e80941Smrg bool PerSampleBlendOptDisable; 10254b8e80941Smrg bool InstructionLevel1CacheDisableMask; 10255b8e80941Smrg bool InstructionLevel1CacheandInFlightQueueDisableMask; 10256b8e80941Smrg bool FloatBlendOptimizationEnableMask; 10257b8e80941Smrg bool PerSampleBlendOptDisableMask; 10258b8e80941Smrg}; 10259b8e80941Smrg 10260b8e80941Smrgstatic inline void 10261b8e80941SmrgGEN10_CACHE_MODE_SS_pack(__attribute__((unused)) __gen_user_data *data, 10262b8e80941Smrg __attribute__((unused)) void * restrict dst, 10263b8e80941Smrg __attribute__((unused)) const struct GEN10_CACHE_MODE_SS * restrict values) 10264b8e80941Smrg{ 10265b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10266b8e80941Smrg 10267b8e80941Smrg dw[0] = 10268b8e80941Smrg __gen_uint(values->InstructionLevel1CacheDisable, 0, 0) | 10269b8e80941Smrg __gen_uint(values->InstructionLevel1CacheandInFlightQueueDisable, 1, 1) | 10270b8e80941Smrg __gen_uint(values->FloatBlendOptimizationEnable, 4, 4) | 10271b8e80941Smrg __gen_uint(values->PerSampleBlendOptDisable, 11, 11) | 10272b8e80941Smrg __gen_uint(values->InstructionLevel1CacheDisableMask, 16, 16) | 10273b8e80941Smrg __gen_uint(values->InstructionLevel1CacheandInFlightQueueDisableMask, 17, 17) | 10274b8e80941Smrg __gen_uint(values->FloatBlendOptimizationEnableMask, 20, 20) | 10275b8e80941Smrg __gen_uint(values->PerSampleBlendOptDisableMask, 27, 27); 10276b8e80941Smrg} 10277b8e80941Smrg 10278b8e80941Smrg#define GEN10_CL_INVOCATION_COUNT_num 0x2338 10279b8e80941Smrg#define GEN10_CL_INVOCATION_COUNT_length 2 10280b8e80941Smrgstruct GEN10_CL_INVOCATION_COUNT { 10281b8e80941Smrg uint64_t CLInvocationCountReport; 10282b8e80941Smrg}; 10283b8e80941Smrg 10284b8e80941Smrgstatic inline void 10285b8e80941SmrgGEN10_CL_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10286b8e80941Smrg __attribute__((unused)) void * restrict dst, 10287b8e80941Smrg __attribute__((unused)) const struct GEN10_CL_INVOCATION_COUNT * restrict values) 10288b8e80941Smrg{ 10289b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10290b8e80941Smrg 10291b8e80941Smrg const uint64_t v0 = 10292b8e80941Smrg __gen_uint(values->CLInvocationCountReport, 0, 63); 10293b8e80941Smrg dw[0] = v0; 10294b8e80941Smrg dw[1] = v0 >> 32; 10295b8e80941Smrg} 10296b8e80941Smrg 10297b8e80941Smrg#define GEN10_CL_PRIMITIVES_COUNT_num 0x2340 10298b8e80941Smrg#define GEN10_CL_PRIMITIVES_COUNT_length 2 10299b8e80941Smrgstruct GEN10_CL_PRIMITIVES_COUNT { 10300b8e80941Smrg uint64_t CLPrimitivesCountReport; 10301b8e80941Smrg}; 10302b8e80941Smrg 10303b8e80941Smrgstatic inline void 10304b8e80941SmrgGEN10_CL_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10305b8e80941Smrg __attribute__((unused)) void * restrict dst, 10306b8e80941Smrg __attribute__((unused)) const struct GEN10_CL_PRIMITIVES_COUNT * restrict values) 10307b8e80941Smrg{ 10308b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10309b8e80941Smrg 10310b8e80941Smrg const uint64_t v0 = 10311b8e80941Smrg __gen_uint(values->CLPrimitivesCountReport, 0, 63); 10312b8e80941Smrg dw[0] = v0; 10313b8e80941Smrg dw[1] = v0 >> 32; 10314b8e80941Smrg} 10315b8e80941Smrg 10316b8e80941Smrg#define GEN10_CS_CHICKEN1_num 0x2580 10317b8e80941Smrg#define GEN10_CS_CHICKEN1_length 1 10318b8e80941Smrgstruct GEN10_CS_CHICKEN1 { 10319b8e80941Smrg uint32_t ReplayMode; 10320b8e80941Smrg#define MidcmdbufferPreemption 0 10321b8e80941Smrg#define ObjectLevelPreemption 1 10322b8e80941Smrg bool ReplayModeMask; 10323b8e80941Smrg}; 10324b8e80941Smrg 10325b8e80941Smrgstatic inline void 10326b8e80941SmrgGEN10_CS_CHICKEN1_pack(__attribute__((unused)) __gen_user_data *data, 10327b8e80941Smrg __attribute__((unused)) void * restrict dst, 10328b8e80941Smrg __attribute__((unused)) const struct GEN10_CS_CHICKEN1 * restrict values) 10329b8e80941Smrg{ 10330b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10331b8e80941Smrg 10332b8e80941Smrg dw[0] = 10333b8e80941Smrg __gen_uint(values->ReplayMode, 0, 0) | 10334b8e80941Smrg __gen_uint(values->ReplayModeMask, 16, 16); 10335b8e80941Smrg} 10336b8e80941Smrg 10337b8e80941Smrg#define GEN10_CS_DEBUG_MODE2_num 0x20d8 10338b8e80941Smrg#define GEN10_CS_DEBUG_MODE2_length 1 10339b8e80941Smrgstruct GEN10_CS_DEBUG_MODE2 { 10340b8e80941Smrg bool _3DRenderingInstructionDisable; 10341b8e80941Smrg bool MediaInstructionDisable; 10342b8e80941Smrg bool CONSTANT_BUFFERAddressOffsetDisable; 10343b8e80941Smrg bool _3DRenderingInstructionDisableMask; 10344b8e80941Smrg bool MediaInstructionDisableMask; 10345b8e80941Smrg bool CONSTANT_BUFFERAddressOffsetDisableMask; 10346b8e80941Smrg}; 10347b8e80941Smrg 10348b8e80941Smrgstatic inline void 10349b8e80941SmrgGEN10_CS_DEBUG_MODE2_pack(__attribute__((unused)) __gen_user_data *data, 10350b8e80941Smrg __attribute__((unused)) void * restrict dst, 10351b8e80941Smrg __attribute__((unused)) const struct GEN10_CS_DEBUG_MODE2 * restrict values) 10352b8e80941Smrg{ 10353b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10354b8e80941Smrg 10355b8e80941Smrg dw[0] = 10356b8e80941Smrg __gen_uint(values->_3DRenderingInstructionDisable, 0, 0) | 10357b8e80941Smrg __gen_uint(values->MediaInstructionDisable, 1, 1) | 10358b8e80941Smrg __gen_uint(values->CONSTANT_BUFFERAddressOffsetDisable, 4, 4) | 10359b8e80941Smrg __gen_uint(values->_3DRenderingInstructionDisableMask, 16, 16) | 10360b8e80941Smrg __gen_uint(values->MediaInstructionDisableMask, 17, 17) | 10361b8e80941Smrg __gen_uint(values->CONSTANT_BUFFERAddressOffsetDisableMask, 20, 20); 10362b8e80941Smrg} 10363b8e80941Smrg 10364b8e80941Smrg#define GEN10_CS_INVOCATION_COUNT_num 0x2290 10365b8e80941Smrg#define GEN10_CS_INVOCATION_COUNT_length 2 10366b8e80941Smrgstruct GEN10_CS_INVOCATION_COUNT { 10367b8e80941Smrg uint64_t CSInvocationCountReport; 10368b8e80941Smrg}; 10369b8e80941Smrg 10370b8e80941Smrgstatic inline void 10371b8e80941SmrgGEN10_CS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10372b8e80941Smrg __attribute__((unused)) void * restrict dst, 10373b8e80941Smrg __attribute__((unused)) const struct GEN10_CS_INVOCATION_COUNT * restrict values) 10374b8e80941Smrg{ 10375b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10376b8e80941Smrg 10377b8e80941Smrg const uint64_t v0 = 10378b8e80941Smrg __gen_uint(values->CSInvocationCountReport, 0, 63); 10379b8e80941Smrg dw[0] = v0; 10380b8e80941Smrg dw[1] = v0 >> 32; 10381b8e80941Smrg} 10382b8e80941Smrg 10383b8e80941Smrg#define GEN10_DS_INVOCATION_COUNT_num 0x2308 10384b8e80941Smrg#define GEN10_DS_INVOCATION_COUNT_length 2 10385b8e80941Smrgstruct GEN10_DS_INVOCATION_COUNT { 10386b8e80941Smrg uint64_t DSInvocationCountReport; 10387b8e80941Smrg}; 10388b8e80941Smrg 10389b8e80941Smrgstatic inline void 10390b8e80941SmrgGEN10_DS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10391b8e80941Smrg __attribute__((unused)) void * restrict dst, 10392b8e80941Smrg __attribute__((unused)) const struct GEN10_DS_INVOCATION_COUNT * restrict values) 10393b8e80941Smrg{ 10394b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10395b8e80941Smrg 10396b8e80941Smrg const uint64_t v0 = 10397b8e80941Smrg __gen_uint(values->DSInvocationCountReport, 0, 63); 10398b8e80941Smrg dw[0] = v0; 10399b8e80941Smrg dw[1] = v0 >> 32; 10400b8e80941Smrg} 10401b8e80941Smrg 10402b8e80941Smrg#define GEN10_GS_INVOCATION_COUNT_num 0x2328 10403b8e80941Smrg#define GEN10_GS_INVOCATION_COUNT_length 2 10404b8e80941Smrgstruct GEN10_GS_INVOCATION_COUNT { 10405b8e80941Smrg uint64_t GSInvocationCountReport; 10406b8e80941Smrg}; 10407b8e80941Smrg 10408b8e80941Smrgstatic inline void 10409b8e80941SmrgGEN10_GS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10410b8e80941Smrg __attribute__((unused)) void * restrict dst, 10411b8e80941Smrg __attribute__((unused)) const struct GEN10_GS_INVOCATION_COUNT * restrict values) 10412b8e80941Smrg{ 10413b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10414b8e80941Smrg 10415b8e80941Smrg const uint64_t v0 = 10416b8e80941Smrg __gen_uint(values->GSInvocationCountReport, 0, 63); 10417b8e80941Smrg dw[0] = v0; 10418b8e80941Smrg dw[1] = v0 >> 32; 10419b8e80941Smrg} 10420b8e80941Smrg 10421b8e80941Smrg#define GEN10_GS_PRIMITIVES_COUNT_num 0x2330 10422b8e80941Smrg#define GEN10_GS_PRIMITIVES_COUNT_length 2 10423b8e80941Smrgstruct GEN10_GS_PRIMITIVES_COUNT { 10424b8e80941Smrg uint64_t GSPrimitivesCountReport; 10425b8e80941Smrg}; 10426b8e80941Smrg 10427b8e80941Smrgstatic inline void 10428b8e80941SmrgGEN10_GS_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10429b8e80941Smrg __attribute__((unused)) void * restrict dst, 10430b8e80941Smrg __attribute__((unused)) const struct GEN10_GS_PRIMITIVES_COUNT * restrict values) 10431b8e80941Smrg{ 10432b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10433b8e80941Smrg 10434b8e80941Smrg const uint64_t v0 = 10435b8e80941Smrg __gen_uint(values->GSPrimitivesCountReport, 0, 63); 10436b8e80941Smrg dw[0] = v0; 10437b8e80941Smrg dw[1] = v0 >> 32; 10438b8e80941Smrg} 10439b8e80941Smrg 10440b8e80941Smrg#define GEN10_HS_INVOCATION_COUNT_num 0x2300 10441b8e80941Smrg#define GEN10_HS_INVOCATION_COUNT_length 2 10442b8e80941Smrgstruct GEN10_HS_INVOCATION_COUNT { 10443b8e80941Smrg uint64_t HSInvocationCountReport; 10444b8e80941Smrg}; 10445b8e80941Smrg 10446b8e80941Smrgstatic inline void 10447b8e80941SmrgGEN10_HS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10448b8e80941Smrg __attribute__((unused)) void * restrict dst, 10449b8e80941Smrg __attribute__((unused)) const struct GEN10_HS_INVOCATION_COUNT * restrict values) 10450b8e80941Smrg{ 10451b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10452b8e80941Smrg 10453b8e80941Smrg const uint64_t v0 = 10454b8e80941Smrg __gen_uint(values->HSInvocationCountReport, 0, 63); 10455b8e80941Smrg dw[0] = v0; 10456b8e80941Smrg dw[1] = v0 >> 32; 10457b8e80941Smrg} 10458b8e80941Smrg 10459b8e80941Smrg#define GEN10_IA_PRIMITIVES_COUNT_num 0x2318 10460b8e80941Smrg#define GEN10_IA_PRIMITIVES_COUNT_length 2 10461b8e80941Smrgstruct GEN10_IA_PRIMITIVES_COUNT { 10462b8e80941Smrg uint64_t IAPrimitivesCountReport; 10463b8e80941Smrg}; 10464b8e80941Smrg 10465b8e80941Smrgstatic inline void 10466b8e80941SmrgGEN10_IA_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10467b8e80941Smrg __attribute__((unused)) void * restrict dst, 10468b8e80941Smrg __attribute__((unused)) const struct GEN10_IA_PRIMITIVES_COUNT * restrict values) 10469b8e80941Smrg{ 10470b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10471b8e80941Smrg 10472b8e80941Smrg const uint64_t v0 = 10473b8e80941Smrg __gen_uint(values->IAPrimitivesCountReport, 0, 63); 10474b8e80941Smrg dw[0] = v0; 10475b8e80941Smrg dw[1] = v0 >> 32; 10476b8e80941Smrg} 10477b8e80941Smrg 10478b8e80941Smrg#define GEN10_IA_VERTICES_COUNT_num 0x2310 10479b8e80941Smrg#define GEN10_IA_VERTICES_COUNT_length 2 10480b8e80941Smrgstruct GEN10_IA_VERTICES_COUNT { 10481b8e80941Smrg uint64_t IAVerticesCountReport; 10482b8e80941Smrg}; 10483b8e80941Smrg 10484b8e80941Smrgstatic inline void 10485b8e80941SmrgGEN10_IA_VERTICES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10486b8e80941Smrg __attribute__((unused)) void * restrict dst, 10487b8e80941Smrg __attribute__((unused)) const struct GEN10_IA_VERTICES_COUNT * restrict values) 10488b8e80941Smrg{ 10489b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10490b8e80941Smrg 10491b8e80941Smrg const uint64_t v0 = 10492b8e80941Smrg __gen_uint(values->IAVerticesCountReport, 0, 63); 10493b8e80941Smrg dw[0] = v0; 10494b8e80941Smrg dw[1] = v0 >> 32; 10495b8e80941Smrg} 10496b8e80941Smrg 10497b8e80941Smrg#define GEN10_INSTDONE_1_num 0x206c 10498b8e80941Smrg#define GEN10_INSTDONE_1_length 1 10499b8e80941Smrgstruct GEN10_INSTDONE_1 { 10500b8e80941Smrg bool PRB0RingEnable; 10501b8e80941Smrg bool VFGDone; 10502b8e80941Smrg bool VSDone; 10503b8e80941Smrg bool HSDone; 10504b8e80941Smrg bool TEDone; 10505b8e80941Smrg bool DSDone; 10506b8e80941Smrg bool GSDone; 10507b8e80941Smrg bool SOLDone; 10508b8e80941Smrg bool CLDone; 10509b8e80941Smrg bool SFDone; 10510b8e80941Smrg bool TDGDone; 10511b8e80941Smrg bool URBMDone; 10512b8e80941Smrg bool SVGDone; 10513b8e80941Smrg bool GAFSDone; 10514b8e80941Smrg bool VFEDone; 10515b8e80941Smrg bool TSGDone; 10516b8e80941Smrg bool GAFMDone; 10517b8e80941Smrg bool GAMDone; 10518b8e80941Smrg bool RSDone; 10519b8e80941Smrg bool CSDone; 10520b8e80941Smrg bool SDEDone; 10521b8e80941Smrg bool RCCFBCCSDone; 10522b8e80941Smrg}; 10523b8e80941Smrg 10524b8e80941Smrgstatic inline void 10525b8e80941SmrgGEN10_INSTDONE_1_pack(__attribute__((unused)) __gen_user_data *data, 10526b8e80941Smrg __attribute__((unused)) void * restrict dst, 10527b8e80941Smrg __attribute__((unused)) const struct GEN10_INSTDONE_1 * restrict values) 10528b8e80941Smrg{ 10529b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10530b8e80941Smrg 10531b8e80941Smrg dw[0] = 10532b8e80941Smrg __gen_uint(values->PRB0RingEnable, 0, 0) | 10533b8e80941Smrg __gen_uint(values->VFGDone, 1, 1) | 10534b8e80941Smrg __gen_uint(values->VSDone, 2, 2) | 10535b8e80941Smrg __gen_uint(values->HSDone, 3, 3) | 10536b8e80941Smrg __gen_uint(values->TEDone, 4, 4) | 10537b8e80941Smrg __gen_uint(values->DSDone, 5, 5) | 10538b8e80941Smrg __gen_uint(values->GSDone, 6, 6) | 10539b8e80941Smrg __gen_uint(values->SOLDone, 7, 7) | 10540b8e80941Smrg __gen_uint(values->CLDone, 8, 8) | 10541b8e80941Smrg __gen_uint(values->SFDone, 9, 9) | 10542b8e80941Smrg __gen_uint(values->TDGDone, 12, 12) | 10543b8e80941Smrg __gen_uint(values->URBMDone, 13, 13) | 10544b8e80941Smrg __gen_uint(values->SVGDone, 14, 14) | 10545b8e80941Smrg __gen_uint(values->GAFSDone, 15, 15) | 10546b8e80941Smrg __gen_uint(values->VFEDone, 16, 16) | 10547b8e80941Smrg __gen_uint(values->TSGDone, 17, 17) | 10548b8e80941Smrg __gen_uint(values->GAFMDone, 18, 18) | 10549b8e80941Smrg __gen_uint(values->GAMDone, 19, 19) | 10550b8e80941Smrg __gen_uint(values->RSDone, 20, 20) | 10551b8e80941Smrg __gen_uint(values->CSDone, 21, 21) | 10552b8e80941Smrg __gen_uint(values->SDEDone, 22, 22) | 10553b8e80941Smrg __gen_uint(values->RCCFBCCSDone, 23, 23); 10554b8e80941Smrg} 10555b8e80941Smrg 10556b8e80941Smrg#define GEN10_L3CNTLREG_num 0x7034 10557b8e80941Smrg#define GEN10_L3CNTLREG_length 1 10558b8e80941Smrgstruct GEN10_L3CNTLREG { 10559b8e80941Smrg bool SLMEnable; 10560b8e80941Smrg uint32_t URBAllocation; 10561b8e80941Smrg uint32_t ROAllocation; 10562b8e80941Smrg uint32_t DCAllocation; 10563b8e80941Smrg uint32_t AllAllocation; 10564b8e80941Smrg}; 10565b8e80941Smrg 10566b8e80941Smrgstatic inline void 10567b8e80941SmrgGEN10_L3CNTLREG_pack(__attribute__((unused)) __gen_user_data *data, 10568b8e80941Smrg __attribute__((unused)) void * restrict dst, 10569b8e80941Smrg __attribute__((unused)) const struct GEN10_L3CNTLREG * restrict values) 10570b8e80941Smrg{ 10571b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10572b8e80941Smrg 10573b8e80941Smrg dw[0] = 10574b8e80941Smrg __gen_uint(values->SLMEnable, 0, 0) | 10575b8e80941Smrg __gen_uint(values->URBAllocation, 1, 7) | 10576b8e80941Smrg __gen_uint(values->ROAllocation, 11, 17) | 10577b8e80941Smrg __gen_uint(values->DCAllocation, 18, 24) | 10578b8e80941Smrg __gen_uint(values->AllAllocation, 25, 31); 10579b8e80941Smrg} 10580b8e80941Smrg 10581b8e80941Smrg#define GEN10_PS_INVOCATION_COUNT_num 0x2348 10582b8e80941Smrg#define GEN10_PS_INVOCATION_COUNT_length 2 10583b8e80941Smrgstruct GEN10_PS_INVOCATION_COUNT { 10584b8e80941Smrg uint64_t PSInvocationCountReport; 10585b8e80941Smrg}; 10586b8e80941Smrg 10587b8e80941Smrgstatic inline void 10588b8e80941SmrgGEN10_PS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10589b8e80941Smrg __attribute__((unused)) void * restrict dst, 10590b8e80941Smrg __attribute__((unused)) const struct GEN10_PS_INVOCATION_COUNT * restrict values) 10591b8e80941Smrg{ 10592b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10593b8e80941Smrg 10594b8e80941Smrg const uint64_t v0 = 10595b8e80941Smrg __gen_uint(values->PSInvocationCountReport, 0, 63); 10596b8e80941Smrg dw[0] = v0; 10597b8e80941Smrg dw[1] = v0 >> 32; 10598b8e80941Smrg} 10599b8e80941Smrg 10600b8e80941Smrg#define GEN10_ROW_INSTDONE_num 0xe164 10601b8e80941Smrg#define GEN10_ROW_INSTDONE_length 1 10602b8e80941Smrgstruct GEN10_ROW_INSTDONE { 10603b8e80941Smrg bool BCDone; 10604b8e80941Smrg bool PSDDone; 10605b8e80941Smrg bool DAPRDone; 10606b8e80941Smrg bool TDLDone; 10607b8e80941Smrg bool ICDone; 10608b8e80941Smrg bool MA0Done; 10609b8e80941Smrg bool EU00DoneSS0; 10610b8e80941Smrg bool EU01DoneSS0; 10611b8e80941Smrg bool EU02DoneSS0; 10612b8e80941Smrg bool EU03DoneSS0; 10613b8e80941Smrg bool EU10DoneSS0; 10614b8e80941Smrg bool EU11DoneSS0; 10615b8e80941Smrg bool EU12DoneSS0; 10616b8e80941Smrg bool EU13DoneSS0; 10617b8e80941Smrg bool MA1DoneSS0; 10618b8e80941Smrg}; 10619b8e80941Smrg 10620b8e80941Smrgstatic inline void 10621b8e80941SmrgGEN10_ROW_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10622b8e80941Smrg __attribute__((unused)) void * restrict dst, 10623b8e80941Smrg __attribute__((unused)) const struct GEN10_ROW_INSTDONE * restrict values) 10624b8e80941Smrg{ 10625b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10626b8e80941Smrg 10627b8e80941Smrg dw[0] = 10628b8e80941Smrg __gen_uint(values->BCDone, 0, 0) | 10629b8e80941Smrg __gen_uint(values->PSDDone, 1, 1) | 10630b8e80941Smrg __gen_uint(values->DAPRDone, 3, 3) | 10631b8e80941Smrg __gen_uint(values->TDLDone, 6, 6) | 10632b8e80941Smrg __gen_uint(values->ICDone, 12, 12) | 10633b8e80941Smrg __gen_uint(values->MA0Done, 15, 15) | 10634b8e80941Smrg __gen_uint(values->EU00DoneSS0, 16, 16) | 10635b8e80941Smrg __gen_uint(values->EU01DoneSS0, 17, 17) | 10636b8e80941Smrg __gen_uint(values->EU02DoneSS0, 18, 18) | 10637b8e80941Smrg __gen_uint(values->EU03DoneSS0, 19, 19) | 10638b8e80941Smrg __gen_uint(values->EU10DoneSS0, 21, 21) | 10639b8e80941Smrg __gen_uint(values->EU11DoneSS0, 22, 22) | 10640b8e80941Smrg __gen_uint(values->EU12DoneSS0, 23, 23) | 10641b8e80941Smrg __gen_uint(values->EU13DoneSS0, 24, 24) | 10642b8e80941Smrg __gen_uint(values->MA1DoneSS0, 26, 26); 10643b8e80941Smrg} 10644b8e80941Smrg 10645b8e80941Smrg#define GEN10_SAMPLER_INSTDONE_num 0xe160 10646b8e80941Smrg#define GEN10_SAMPLER_INSTDONE_length 1 10647b8e80941Smrgstruct GEN10_SAMPLER_INSTDONE { 10648b8e80941Smrg bool IMEDone; 10649b8e80941Smrg bool PL0Done; 10650b8e80941Smrg bool SO0Done; 10651b8e80941Smrg bool DG0Done; 10652b8e80941Smrg bool FT0Done; 10653b8e80941Smrg bool DM0Done; 10654b8e80941Smrg bool SCDone; 10655b8e80941Smrg bool FL0Done; 10656b8e80941Smrg bool QCDone; 10657b8e80941Smrg bool SVSMDone; 10658b8e80941Smrg bool SI0Done; 10659b8e80941Smrg bool MT0Done; 10660b8e80941Smrg bool AVSDone; 10661b8e80941Smrg bool IEFDone; 10662b8e80941Smrg bool CREDone; 10663b8e80941Smrg bool SVSM_ARB_SIFM; 10664b8e80941Smrg bool SVSMARB2; 10665b8e80941Smrg bool SVSMARB1; 10666b8e80941Smrg bool SVSMAdapter; 10667b8e80941Smrg bool BDMDone; 10668b8e80941Smrg}; 10669b8e80941Smrg 10670b8e80941Smrgstatic inline void 10671b8e80941SmrgGEN10_SAMPLER_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10672b8e80941Smrg __attribute__((unused)) void * restrict dst, 10673b8e80941Smrg __attribute__((unused)) const struct GEN10_SAMPLER_INSTDONE * restrict values) 10674b8e80941Smrg{ 10675b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10676b8e80941Smrg 10677b8e80941Smrg dw[0] = 10678b8e80941Smrg __gen_uint(values->IMEDone, 0, 0) | 10679b8e80941Smrg __gen_uint(values->PL0Done, 1, 1) | 10680b8e80941Smrg __gen_uint(values->SO0Done, 2, 2) | 10681b8e80941Smrg __gen_uint(values->DG0Done, 3, 3) | 10682b8e80941Smrg __gen_uint(values->FT0Done, 4, 4) | 10683b8e80941Smrg __gen_uint(values->DM0Done, 5, 5) | 10684b8e80941Smrg __gen_uint(values->SCDone, 6, 6) | 10685b8e80941Smrg __gen_uint(values->FL0Done, 7, 7) | 10686b8e80941Smrg __gen_uint(values->QCDone, 8, 8) | 10687b8e80941Smrg __gen_uint(values->SVSMDone, 9, 9) | 10688b8e80941Smrg __gen_uint(values->SI0Done, 10, 10) | 10689b8e80941Smrg __gen_uint(values->MT0Done, 11, 11) | 10690b8e80941Smrg __gen_uint(values->AVSDone, 12, 12) | 10691b8e80941Smrg __gen_uint(values->IEFDone, 13, 13) | 10692b8e80941Smrg __gen_uint(values->CREDone, 14, 14) | 10693b8e80941Smrg __gen_uint(values->SVSM_ARB_SIFM, 15, 15) | 10694b8e80941Smrg __gen_uint(values->SVSMARB2, 16, 16) | 10695b8e80941Smrg __gen_uint(values->SVSMARB1, 17, 17) | 10696b8e80941Smrg __gen_uint(values->SVSMAdapter, 18, 18) | 10697b8e80941Smrg __gen_uint(values->BDMDone, 19, 19); 10698b8e80941Smrg} 10699b8e80941Smrg 10700b8e80941Smrg#define GEN10_SC_INSTDONE_num 0x7100 10701b8e80941Smrg#define GEN10_SC_INSTDONE_length 1 10702b8e80941Smrgstruct GEN10_SC_INSTDONE { 10703b8e80941Smrg bool SVLDone; 10704b8e80941Smrg bool WMFEDone; 10705b8e80941Smrg bool WMBEDone; 10706b8e80941Smrg bool HIZDone; 10707b8e80941Smrg bool STCDone; 10708b8e80941Smrg bool IZDone; 10709b8e80941Smrg bool SBEDone; 10710b8e80941Smrg bool RCZDone; 10711b8e80941Smrg bool RCCDone; 10712b8e80941Smrg bool RCPBEDone; 10713b8e80941Smrg bool RCPFEDone; 10714b8e80941Smrg bool DAPBDone; 10715b8e80941Smrg bool DAPRBEDone; 10716b8e80941Smrg bool SARBDone; 10717b8e80941Smrg bool DC0Done; 10718b8e80941Smrg bool DC1Done; 10719b8e80941Smrg bool DC2Done; 10720b8e80941Smrg bool DC3Done; 10721b8e80941Smrg bool GW0Done; 10722b8e80941Smrg bool GW1Done; 10723b8e80941Smrg bool GW2Done; 10724b8e80941Smrg bool GW3Done; 10725b8e80941Smrg bool TDCDone; 10726b8e80941Smrg bool SFBEDone; 10727b8e80941Smrg}; 10728b8e80941Smrg 10729b8e80941Smrgstatic inline void 10730b8e80941SmrgGEN10_SC_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10731b8e80941Smrg __attribute__((unused)) void * restrict dst, 10732b8e80941Smrg __attribute__((unused)) const struct GEN10_SC_INSTDONE * restrict values) 10733b8e80941Smrg{ 10734b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10735b8e80941Smrg 10736b8e80941Smrg dw[0] = 10737b8e80941Smrg __gen_uint(values->SVLDone, 0, 0) | 10738b8e80941Smrg __gen_uint(values->WMFEDone, 1, 1) | 10739b8e80941Smrg __gen_uint(values->WMBEDone, 2, 2) | 10740b8e80941Smrg __gen_uint(values->HIZDone, 3, 3) | 10741b8e80941Smrg __gen_uint(values->STCDone, 4, 4) | 10742b8e80941Smrg __gen_uint(values->IZDone, 5, 5) | 10743b8e80941Smrg __gen_uint(values->SBEDone, 6, 6) | 10744b8e80941Smrg __gen_uint(values->RCZDone, 8, 8) | 10745b8e80941Smrg __gen_uint(values->RCCDone, 9, 9) | 10746b8e80941Smrg __gen_uint(values->RCPBEDone, 10, 10) | 10747b8e80941Smrg __gen_uint(values->RCPFEDone, 11, 11) | 10748b8e80941Smrg __gen_uint(values->DAPBDone, 12, 12) | 10749b8e80941Smrg __gen_uint(values->DAPRBEDone, 13, 13) | 10750b8e80941Smrg __gen_uint(values->SARBDone, 15, 15) | 10751b8e80941Smrg __gen_uint(values->DC0Done, 16, 16) | 10752b8e80941Smrg __gen_uint(values->DC1Done, 17, 17) | 10753b8e80941Smrg __gen_uint(values->DC2Done, 18, 18) | 10754b8e80941Smrg __gen_uint(values->DC3Done, 19, 19) | 10755b8e80941Smrg __gen_uint(values->GW0Done, 20, 20) | 10756b8e80941Smrg __gen_uint(values->GW1Done, 21, 21) | 10757b8e80941Smrg __gen_uint(values->GW2Done, 22, 22) | 10758b8e80941Smrg __gen_uint(values->GW3Done, 23, 23) | 10759b8e80941Smrg __gen_uint(values->TDCDone, 24, 24) | 10760b8e80941Smrg __gen_uint(values->SFBEDone, 25, 25); 10761b8e80941Smrg} 10762b8e80941Smrg 10763b8e80941Smrg#define GEN10_SO_NUM_PRIMS_WRITTEN0_num 0x5200 10764b8e80941Smrg#define GEN10_SO_NUM_PRIMS_WRITTEN0_length 2 10765b8e80941Smrgstruct GEN10_SO_NUM_PRIMS_WRITTEN0 { 10766b8e80941Smrg uint64_t NumPrimsWrittenCount; 10767b8e80941Smrg}; 10768b8e80941Smrg 10769b8e80941Smrgstatic inline void 10770b8e80941SmrgGEN10_SO_NUM_PRIMS_WRITTEN0_pack(__attribute__((unused)) __gen_user_data *data, 10771b8e80941Smrg __attribute__((unused)) void * restrict dst, 10772b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_NUM_PRIMS_WRITTEN0 * restrict values) 10773b8e80941Smrg{ 10774b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10775b8e80941Smrg 10776b8e80941Smrg const uint64_t v0 = 10777b8e80941Smrg __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10778b8e80941Smrg dw[0] = v0; 10779b8e80941Smrg dw[1] = v0 >> 32; 10780b8e80941Smrg} 10781b8e80941Smrg 10782b8e80941Smrg#define GEN10_SO_NUM_PRIMS_WRITTEN1_num 0x5208 10783b8e80941Smrg#define GEN10_SO_NUM_PRIMS_WRITTEN1_length 2 10784b8e80941Smrgstruct GEN10_SO_NUM_PRIMS_WRITTEN1 { 10785b8e80941Smrg uint64_t NumPrimsWrittenCount; 10786b8e80941Smrg}; 10787b8e80941Smrg 10788b8e80941Smrgstatic inline void 10789b8e80941SmrgGEN10_SO_NUM_PRIMS_WRITTEN1_pack(__attribute__((unused)) __gen_user_data *data, 10790b8e80941Smrg __attribute__((unused)) void * restrict dst, 10791b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_NUM_PRIMS_WRITTEN1 * restrict values) 10792b8e80941Smrg{ 10793b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10794b8e80941Smrg 10795b8e80941Smrg const uint64_t v0 = 10796b8e80941Smrg __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10797b8e80941Smrg dw[0] = v0; 10798b8e80941Smrg dw[1] = v0 >> 32; 10799b8e80941Smrg} 10800b8e80941Smrg 10801b8e80941Smrg#define GEN10_SO_NUM_PRIMS_WRITTEN2_num 0x5210 10802b8e80941Smrg#define GEN10_SO_NUM_PRIMS_WRITTEN2_length 2 10803b8e80941Smrgstruct GEN10_SO_NUM_PRIMS_WRITTEN2 { 10804b8e80941Smrg uint64_t NumPrimsWrittenCount; 10805b8e80941Smrg}; 10806b8e80941Smrg 10807b8e80941Smrgstatic inline void 10808b8e80941SmrgGEN10_SO_NUM_PRIMS_WRITTEN2_pack(__attribute__((unused)) __gen_user_data *data, 10809b8e80941Smrg __attribute__((unused)) void * restrict dst, 10810b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_NUM_PRIMS_WRITTEN2 * restrict values) 10811b8e80941Smrg{ 10812b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10813b8e80941Smrg 10814b8e80941Smrg const uint64_t v0 = 10815b8e80941Smrg __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10816b8e80941Smrg dw[0] = v0; 10817b8e80941Smrg dw[1] = v0 >> 32; 10818b8e80941Smrg} 10819b8e80941Smrg 10820b8e80941Smrg#define GEN10_SO_NUM_PRIMS_WRITTEN3_num 0x5218 10821b8e80941Smrg#define GEN10_SO_NUM_PRIMS_WRITTEN3_length 2 10822b8e80941Smrgstruct GEN10_SO_NUM_PRIMS_WRITTEN3 { 10823b8e80941Smrg uint64_t NumPrimsWrittenCount; 10824b8e80941Smrg}; 10825b8e80941Smrg 10826b8e80941Smrgstatic inline void 10827b8e80941SmrgGEN10_SO_NUM_PRIMS_WRITTEN3_pack(__attribute__((unused)) __gen_user_data *data, 10828b8e80941Smrg __attribute__((unused)) void * restrict dst, 10829b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_NUM_PRIMS_WRITTEN3 * restrict values) 10830b8e80941Smrg{ 10831b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10832b8e80941Smrg 10833b8e80941Smrg const uint64_t v0 = 10834b8e80941Smrg __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10835b8e80941Smrg dw[0] = v0; 10836b8e80941Smrg dw[1] = v0 >> 32; 10837b8e80941Smrg} 10838b8e80941Smrg 10839b8e80941Smrg#define GEN10_SO_PRIM_STORAGE_NEEDED0_num 0x5240 10840b8e80941Smrg#define GEN10_SO_PRIM_STORAGE_NEEDED0_length 2 10841b8e80941Smrgstruct GEN10_SO_PRIM_STORAGE_NEEDED0 { 10842b8e80941Smrg uint64_t PrimStorageNeededCount; 10843b8e80941Smrg}; 10844b8e80941Smrg 10845b8e80941Smrgstatic inline void 10846b8e80941SmrgGEN10_SO_PRIM_STORAGE_NEEDED0_pack(__attribute__((unused)) __gen_user_data *data, 10847b8e80941Smrg __attribute__((unused)) void * restrict dst, 10848b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_PRIM_STORAGE_NEEDED0 * restrict values) 10849b8e80941Smrg{ 10850b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10851b8e80941Smrg 10852b8e80941Smrg const uint64_t v0 = 10853b8e80941Smrg __gen_uint(values->PrimStorageNeededCount, 0, 63); 10854b8e80941Smrg dw[0] = v0; 10855b8e80941Smrg dw[1] = v0 >> 32; 10856b8e80941Smrg} 10857b8e80941Smrg 10858b8e80941Smrg#define GEN10_SO_PRIM_STORAGE_NEEDED1_num 0x5248 10859b8e80941Smrg#define GEN10_SO_PRIM_STORAGE_NEEDED1_length 2 10860b8e80941Smrgstruct GEN10_SO_PRIM_STORAGE_NEEDED1 { 10861b8e80941Smrg uint64_t PrimStorageNeededCount; 10862b8e80941Smrg}; 10863b8e80941Smrg 10864b8e80941Smrgstatic inline void 10865b8e80941SmrgGEN10_SO_PRIM_STORAGE_NEEDED1_pack(__attribute__((unused)) __gen_user_data *data, 10866b8e80941Smrg __attribute__((unused)) void * restrict dst, 10867b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_PRIM_STORAGE_NEEDED1 * restrict values) 10868b8e80941Smrg{ 10869b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10870b8e80941Smrg 10871b8e80941Smrg const uint64_t v0 = 10872b8e80941Smrg __gen_uint(values->PrimStorageNeededCount, 0, 63); 10873b8e80941Smrg dw[0] = v0; 10874b8e80941Smrg dw[1] = v0 >> 32; 10875b8e80941Smrg} 10876b8e80941Smrg 10877b8e80941Smrg#define GEN10_SO_PRIM_STORAGE_NEEDED2_num 0x5250 10878b8e80941Smrg#define GEN10_SO_PRIM_STORAGE_NEEDED2_length 2 10879b8e80941Smrgstruct GEN10_SO_PRIM_STORAGE_NEEDED2 { 10880b8e80941Smrg uint64_t PrimStorageNeededCount; 10881b8e80941Smrg}; 10882b8e80941Smrg 10883b8e80941Smrgstatic inline void 10884b8e80941SmrgGEN10_SO_PRIM_STORAGE_NEEDED2_pack(__attribute__((unused)) __gen_user_data *data, 10885b8e80941Smrg __attribute__((unused)) void * restrict dst, 10886b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_PRIM_STORAGE_NEEDED2 * restrict values) 10887b8e80941Smrg{ 10888b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10889b8e80941Smrg 10890b8e80941Smrg const uint64_t v0 = 10891b8e80941Smrg __gen_uint(values->PrimStorageNeededCount, 0, 63); 10892b8e80941Smrg dw[0] = v0; 10893b8e80941Smrg dw[1] = v0 >> 32; 10894b8e80941Smrg} 10895b8e80941Smrg 10896b8e80941Smrg#define GEN10_SO_PRIM_STORAGE_NEEDED3_num 0x5258 10897b8e80941Smrg#define GEN10_SO_PRIM_STORAGE_NEEDED3_length 2 10898b8e80941Smrgstruct GEN10_SO_PRIM_STORAGE_NEEDED3 { 10899b8e80941Smrg uint64_t PrimStorageNeededCount; 10900b8e80941Smrg}; 10901b8e80941Smrg 10902b8e80941Smrgstatic inline void 10903b8e80941SmrgGEN10_SO_PRIM_STORAGE_NEEDED3_pack(__attribute__((unused)) __gen_user_data *data, 10904b8e80941Smrg __attribute__((unused)) void * restrict dst, 10905b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_PRIM_STORAGE_NEEDED3 * restrict values) 10906b8e80941Smrg{ 10907b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10908b8e80941Smrg 10909b8e80941Smrg const uint64_t v0 = 10910b8e80941Smrg __gen_uint(values->PrimStorageNeededCount, 0, 63); 10911b8e80941Smrg dw[0] = v0; 10912b8e80941Smrg dw[1] = v0 >> 32; 10913b8e80941Smrg} 10914b8e80941Smrg 10915b8e80941Smrg#define GEN10_SO_WRITE_OFFSET0_num 0x5280 10916b8e80941Smrg#define GEN10_SO_WRITE_OFFSET0_length 1 10917b8e80941Smrgstruct GEN10_SO_WRITE_OFFSET0 { 10918b8e80941Smrg uint64_t WriteOffset; 10919b8e80941Smrg}; 10920b8e80941Smrg 10921b8e80941Smrgstatic inline void 10922b8e80941SmrgGEN10_SO_WRITE_OFFSET0_pack(__attribute__((unused)) __gen_user_data *data, 10923b8e80941Smrg __attribute__((unused)) void * restrict dst, 10924b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_WRITE_OFFSET0 * restrict values) 10925b8e80941Smrg{ 10926b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10927b8e80941Smrg 10928b8e80941Smrg dw[0] = 10929b8e80941Smrg __gen_offset(values->WriteOffset, 2, 31); 10930b8e80941Smrg} 10931b8e80941Smrg 10932b8e80941Smrg#define GEN10_SO_WRITE_OFFSET1_num 0x5284 10933b8e80941Smrg#define GEN10_SO_WRITE_OFFSET1_length 1 10934b8e80941Smrgstruct GEN10_SO_WRITE_OFFSET1 { 10935b8e80941Smrg uint64_t WriteOffset; 10936b8e80941Smrg}; 10937b8e80941Smrg 10938b8e80941Smrgstatic inline void 10939b8e80941SmrgGEN10_SO_WRITE_OFFSET1_pack(__attribute__((unused)) __gen_user_data *data, 10940b8e80941Smrg __attribute__((unused)) void * restrict dst, 10941b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_WRITE_OFFSET1 * restrict values) 10942b8e80941Smrg{ 10943b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10944b8e80941Smrg 10945b8e80941Smrg dw[0] = 10946b8e80941Smrg __gen_offset(values->WriteOffset, 2, 31); 10947b8e80941Smrg} 10948b8e80941Smrg 10949b8e80941Smrg#define GEN10_SO_WRITE_OFFSET2_num 0x5288 10950b8e80941Smrg#define GEN10_SO_WRITE_OFFSET2_length 1 10951b8e80941Smrgstruct GEN10_SO_WRITE_OFFSET2 { 10952b8e80941Smrg uint64_t WriteOffset; 10953b8e80941Smrg}; 10954b8e80941Smrg 10955b8e80941Smrgstatic inline void 10956b8e80941SmrgGEN10_SO_WRITE_OFFSET2_pack(__attribute__((unused)) __gen_user_data *data, 10957b8e80941Smrg __attribute__((unused)) void * restrict dst, 10958b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_WRITE_OFFSET2 * restrict values) 10959b8e80941Smrg{ 10960b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10961b8e80941Smrg 10962b8e80941Smrg dw[0] = 10963b8e80941Smrg __gen_offset(values->WriteOffset, 2, 31); 10964b8e80941Smrg} 10965b8e80941Smrg 10966b8e80941Smrg#define GEN10_SO_WRITE_OFFSET3_num 0x528c 10967b8e80941Smrg#define GEN10_SO_WRITE_OFFSET3_length 1 10968b8e80941Smrgstruct GEN10_SO_WRITE_OFFSET3 { 10969b8e80941Smrg uint64_t WriteOffset; 10970b8e80941Smrg}; 10971b8e80941Smrg 10972b8e80941Smrgstatic inline void 10973b8e80941SmrgGEN10_SO_WRITE_OFFSET3_pack(__attribute__((unused)) __gen_user_data *data, 10974b8e80941Smrg __attribute__((unused)) void * restrict dst, 10975b8e80941Smrg __attribute__((unused)) const struct GEN10_SO_WRITE_OFFSET3 * restrict values) 10976b8e80941Smrg{ 10977b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 10978b8e80941Smrg 10979b8e80941Smrg dw[0] = 10980b8e80941Smrg __gen_offset(values->WriteOffset, 2, 31); 10981b8e80941Smrg} 10982b8e80941Smrg 10983b8e80941Smrg#define GEN10_VCS_INSTDONE_num 0x1206c 10984b8e80941Smrg#define GEN10_VCS_INSTDONE_length 1 10985b8e80941Smrgstruct GEN10_VCS_INSTDONE { 10986b8e80941Smrg bool RingEnable; 10987b8e80941Smrg bool USBDone; 10988b8e80941Smrg bool QRCDone; 10989b8e80941Smrg bool SECDone; 10990b8e80941Smrg bool MPCDone; 10991b8e80941Smrg bool VFTDone; 10992b8e80941Smrg bool BSPDone; 10993b8e80941Smrg bool VLFDone; 10994b8e80941Smrg bool VOPDone; 10995b8e80941Smrg bool VMCDone; 10996b8e80941Smrg bool VIPDone; 10997b8e80941Smrg bool VITDone; 10998b8e80941Smrg bool VDSDone; 10999b8e80941Smrg bool VMXDone; 11000b8e80941Smrg bool VCPDone; 11001b8e80941Smrg bool VCDDone; 11002b8e80941Smrg bool VADDone; 11003b8e80941Smrg bool VMDDone; 11004b8e80941Smrg bool VISDone; 11005b8e80941Smrg bool VACDone; 11006b8e80941Smrg bool VAMDone; 11007b8e80941Smrg bool JPGDone; 11008b8e80941Smrg bool VBPDone; 11009b8e80941Smrg bool VHRDone; 11010b8e80941Smrg bool VCIDone; 11011b8e80941Smrg bool VCRDone; 11012b8e80941Smrg bool VINDone; 11013b8e80941Smrg bool VPRDone; 11014b8e80941Smrg bool VTQDone; 11015b8e80941Smrg bool Reserved; 11016b8e80941Smrg bool VCSDone; 11017b8e80941Smrg bool GACDone; 11018b8e80941Smrg}; 11019b8e80941Smrg 11020b8e80941Smrgstatic inline void 11021b8e80941SmrgGEN10_VCS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 11022b8e80941Smrg __attribute__((unused)) void * restrict dst, 11023b8e80941Smrg __attribute__((unused)) const struct GEN10_VCS_INSTDONE * restrict values) 11024b8e80941Smrg{ 11025b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 11026b8e80941Smrg 11027b8e80941Smrg dw[0] = 11028b8e80941Smrg __gen_uint(values->RingEnable, 0, 0) | 11029b8e80941Smrg __gen_uint(values->USBDone, 1, 1) | 11030b8e80941Smrg __gen_uint(values->QRCDone, 2, 2) | 11031b8e80941Smrg __gen_uint(values->SECDone, 3, 3) | 11032b8e80941Smrg __gen_uint(values->MPCDone, 4, 4) | 11033b8e80941Smrg __gen_uint(values->VFTDone, 5, 5) | 11034b8e80941Smrg __gen_uint(values->BSPDone, 6, 6) | 11035b8e80941Smrg __gen_uint(values->VLFDone, 7, 7) | 11036b8e80941Smrg __gen_uint(values->VOPDone, 8, 8) | 11037b8e80941Smrg __gen_uint(values->VMCDone, 9, 9) | 11038b8e80941Smrg __gen_uint(values->VIPDone, 10, 10) | 11039b8e80941Smrg __gen_uint(values->VITDone, 11, 11) | 11040b8e80941Smrg __gen_uint(values->VDSDone, 12, 12) | 11041b8e80941Smrg __gen_uint(values->VMXDone, 13, 13) | 11042b8e80941Smrg __gen_uint(values->VCPDone, 14, 14) | 11043b8e80941Smrg __gen_uint(values->VCDDone, 15, 15) | 11044b8e80941Smrg __gen_uint(values->VADDone, 16, 16) | 11045b8e80941Smrg __gen_uint(values->VMDDone, 17, 17) | 11046b8e80941Smrg __gen_uint(values->VISDone, 18, 18) | 11047b8e80941Smrg __gen_uint(values->VACDone, 19, 19) | 11048b8e80941Smrg __gen_uint(values->VAMDone, 20, 20) | 11049b8e80941Smrg __gen_uint(values->JPGDone, 21, 21) | 11050b8e80941Smrg __gen_uint(values->VBPDone, 22, 22) | 11051b8e80941Smrg __gen_uint(values->VHRDone, 23, 23) | 11052b8e80941Smrg __gen_uint(values->VCIDone, 24, 24) | 11053b8e80941Smrg __gen_uint(values->VCRDone, 25, 25) | 11054b8e80941Smrg __gen_uint(values->VINDone, 26, 26) | 11055b8e80941Smrg __gen_uint(values->VPRDone, 27, 27) | 11056b8e80941Smrg __gen_uint(values->VTQDone, 28, 28) | 11057b8e80941Smrg __gen_uint(values->Reserved, 29, 29) | 11058b8e80941Smrg __gen_uint(values->VCSDone, 30, 30) | 11059b8e80941Smrg __gen_uint(values->GACDone, 31, 31); 11060b8e80941Smrg} 11061b8e80941Smrg 11062b8e80941Smrg#define GEN10_VECS_INSTDONE_num 0x1a06c 11063b8e80941Smrg#define GEN10_VECS_INSTDONE_length 1 11064b8e80941Smrgstruct GEN10_VECS_INSTDONE { 11065b8e80941Smrg bool RingEnable; 11066b8e80941Smrg bool VECSDone; 11067b8e80941Smrg bool GAMDone; 11068b8e80941Smrg}; 11069b8e80941Smrg 11070b8e80941Smrgstatic inline void 11071b8e80941SmrgGEN10_VECS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 11072b8e80941Smrg __attribute__((unused)) void * restrict dst, 11073b8e80941Smrg __attribute__((unused)) const struct GEN10_VECS_INSTDONE * restrict values) 11074b8e80941Smrg{ 11075b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 11076b8e80941Smrg 11077b8e80941Smrg dw[0] = 11078b8e80941Smrg __gen_uint(values->RingEnable, 0, 0) | 11079b8e80941Smrg __gen_uint(values->VECSDone, 30, 30) | 11080b8e80941Smrg __gen_uint(values->GAMDone, 31, 31); 11081b8e80941Smrg} 11082b8e80941Smrg 11083b8e80941Smrg#define GEN10_VS_INVOCATION_COUNT_num 0x2320 11084b8e80941Smrg#define GEN10_VS_INVOCATION_COUNT_length 2 11085b8e80941Smrgstruct GEN10_VS_INVOCATION_COUNT { 11086b8e80941Smrg uint64_t VSInvocationCountReport; 11087b8e80941Smrg}; 11088b8e80941Smrg 11089b8e80941Smrgstatic inline void 11090b8e80941SmrgGEN10_VS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 11091b8e80941Smrg __attribute__((unused)) void * restrict dst, 11092b8e80941Smrg __attribute__((unused)) const struct GEN10_VS_INVOCATION_COUNT * restrict values) 11093b8e80941Smrg{ 11094b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 11095b8e80941Smrg 11096b8e80941Smrg const uint64_t v0 = 11097b8e80941Smrg __gen_uint(values->VSInvocationCountReport, 0, 63); 11098b8e80941Smrg dw[0] = v0; 11099b8e80941Smrg dw[1] = v0 >> 32; 11100b8e80941Smrg} 11101b8e80941Smrg 11102b8e80941Smrg#endif /* GEN10_PACK_H */ 11103