gen75_pack.h revision b8e80941
1/* 2 * Copyright (C) 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 25/* Instructions, enums and structures for HSW. 26 * 27 * This file has been generated, do not hand edit. 28 */ 29 30#ifndef GEN75_PACK_H 31#define GEN75_PACK_H 32 33#include <stdio.h> 34#include <stdint.h> 35#include <stdbool.h> 36#include <assert.h> 37#include <math.h> 38 39#ifndef __gen_validate_value 40#define __gen_validate_value(x) 41#endif 42 43#ifndef __gen_field_functions 44#define __gen_field_functions 45 46#ifdef NDEBUG 47#define NDEBUG_UNUSED __attribute__((unused)) 48#else 49#define NDEBUG_UNUSED 50#endif 51 52union __gen_value { 53 float f; 54 uint32_t dw; 55}; 56 57static inline uint64_t 58__gen_mbo(uint32_t start, uint32_t end) 59{ 60 return (~0ull >> (64 - (end - start + 1))) << start; 61} 62 63static inline uint64_t 64__gen_uint(uint64_t v, uint32_t start, NDEBUG_UNUSED uint32_t end) 65{ 66 __gen_validate_value(v); 67 68#ifndef NDEBUG 69 const int width = end - start + 1; 70 if (width < 64) { 71 const uint64_t max = (1ull << width) - 1; 72 assert(v <= max); 73 } 74#endif 75 76 return v << start; 77} 78 79static inline uint64_t 80__gen_sint(int64_t v, uint32_t start, uint32_t end) 81{ 82 const int width = end - start + 1; 83 84 __gen_validate_value(v); 85 86#ifndef NDEBUG 87 if (width < 64) { 88 const int64_t max = (1ll << (width - 1)) - 1; 89 const int64_t min = -(1ll << (width - 1)); 90 assert(min <= v && v <= max); 91 } 92#endif 93 94 const uint64_t mask = ~0ull >> (64 - width); 95 96 return (v & mask) << start; 97} 98 99static inline uint64_t 100__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end) 101{ 102 __gen_validate_value(v); 103#ifndef NDEBUG 104 uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; 105 106 assert((v & ~mask) == 0); 107#endif 108 109 return v; 110} 111 112static inline uint32_t 113__gen_float(float v) 114{ 115 __gen_validate_value(v); 116 return ((union __gen_value) { .f = (v) }).dw; 117} 118 119static inline uint64_t 120__gen_sfixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) 121{ 122 __gen_validate_value(v); 123 124 const float factor = (1 << fract_bits); 125 126#ifndef NDEBUG 127 const float max = ((1 << (end - start)) - 1) / factor; 128 const float min = -(1 << (end - start)) / factor; 129 assert(min <= v && v <= max); 130#endif 131 132 const int64_t int_val = llroundf(v * factor); 133 const uint64_t mask = ~0ull >> (64 - (end - start + 1)); 134 135 return (int_val & mask) << start; 136} 137 138static inline uint64_t 139__gen_ufixed(float v, uint32_t start, NDEBUG_UNUSED uint32_t end, uint32_t fract_bits) 140{ 141 __gen_validate_value(v); 142 143 const float factor = (1 << fract_bits); 144 145#ifndef NDEBUG 146 const float max = ((1 << (end - start + 1)) - 1) / factor; 147 const float min = 0.0f; 148 assert(min <= v && v <= max); 149#endif 150 151 const uint64_t uint_val = llroundf(v * factor); 152 153 return uint_val << start; 154} 155 156#ifndef __gen_address_type 157#error #define __gen_address_type before including this file 158#endif 159 160#ifndef __gen_user_data 161#error #define __gen_combine_address before including this file 162#endif 163 164#undef NDEBUG_UNUSED 165 166#endif 167 168 169enum GEN75_3D_Color_Buffer_Blend_Factor { 170 BLENDFACTOR_ONE = 1, 171 BLENDFACTOR_SRC_COLOR = 2, 172 BLENDFACTOR_SRC_ALPHA = 3, 173 BLENDFACTOR_DST_ALPHA = 4, 174 BLENDFACTOR_DST_COLOR = 5, 175 BLENDFACTOR_SRC_ALPHA_SATURATE = 6, 176 BLENDFACTOR_CONST_COLOR = 7, 177 BLENDFACTOR_CONST_ALPHA = 8, 178 BLENDFACTOR_SRC1_COLOR = 9, 179 BLENDFACTOR_SRC1_ALPHA = 10, 180 BLENDFACTOR_ZERO = 17, 181 BLENDFACTOR_INV_SRC_COLOR = 18, 182 BLENDFACTOR_INV_SRC_ALPHA = 19, 183 BLENDFACTOR_INV_DST_ALPHA = 20, 184 BLENDFACTOR_INV_DST_COLOR = 21, 185 BLENDFACTOR_INV_CONST_COLOR = 23, 186 BLENDFACTOR_INV_CONST_ALPHA = 24, 187 BLENDFACTOR_INV_SRC1_COLOR = 25, 188 BLENDFACTOR_INV_SRC1_ALPHA = 26, 189}; 190 191enum GEN75_3D_Color_Buffer_Blend_Function { 192 BLENDFUNCTION_ADD = 0, 193 BLENDFUNCTION_SUBTRACT = 1, 194 BLENDFUNCTION_REVERSE_SUBTRACT = 2, 195 BLENDFUNCTION_MIN = 3, 196 BLENDFUNCTION_MAX = 4, 197}; 198 199enum GEN75_3D_Compare_Function { 200 COMPAREFUNCTION_ALWAYS = 0, 201 COMPAREFUNCTION_NEVER = 1, 202 COMPAREFUNCTION_LESS = 2, 203 COMPAREFUNCTION_EQUAL = 3, 204 COMPAREFUNCTION_LEQUAL = 4, 205 COMPAREFUNCTION_GREATER = 5, 206 COMPAREFUNCTION_NOTEQUAL = 6, 207 COMPAREFUNCTION_GEQUAL = 7, 208}; 209 210enum GEN75_3D_Logic_Op_Function { 211 LOGICOP_CLEAR = 0, 212 LOGICOP_NOR = 1, 213 LOGICOP_AND_INVERTED = 2, 214 LOGICOP_COPY_INVERTED = 3, 215 LOGICOP_AND_REVERSE = 4, 216 LOGICOP_INVERT = 5, 217 LOGICOP_XOR = 6, 218 LOGICOP_NAND = 7, 219 LOGICOP_AND = 8, 220 LOGICOP_EQUIV = 9, 221 LOGICOP_NOOP = 10, 222 LOGICOP_OR_INVERTED = 11, 223 LOGICOP_COPY = 12, 224 LOGICOP_OR_REVERSE = 13, 225 LOGICOP_OR = 14, 226 LOGICOP_SET = 15, 227}; 228 229enum GEN75_3D_Prim_Topo_Type { 230 _3DPRIM_POINTLIST = 1, 231 _3DPRIM_LINELIST = 2, 232 _3DPRIM_LINESTRIP = 3, 233 _3DPRIM_TRILIST = 4, 234 _3DPRIM_TRISTRIP = 5, 235 _3DPRIM_TRIFAN = 6, 236 _3DPRIM_QUADLIST = 7, 237 _3DPRIM_QUADSTRIP = 8, 238 _3DPRIM_LINELIST_ADJ = 9, 239 _3DPRIM_LINESTRIP_ADJ = 10, 240 _3DPRIM_TRILIST_ADJ = 11, 241 _3DPRIM_TRISTRIP_ADJ = 12, 242 _3DPRIM_TRISTRIP_REVERSE = 13, 243 _3DPRIM_POLYGON = 14, 244 _3DPRIM_RECTLIST = 15, 245 _3DPRIM_LINELOOP = 16, 246 _3DPRIM_POINTLIST_BF = 17, 247 _3DPRIM_LINESTRIP_CONT = 18, 248 _3DPRIM_LINESTRIP_BF = 19, 249 _3DPRIM_LINESTRIP_CONT_BF = 20, 250 _3DPRIM_TRIFAN_NOSTIPPLE = 22, 251 _3DPRIM_PATCHLIST_1 = 32, 252 _3DPRIM_PATCHLIST_2 = 33, 253 _3DPRIM_PATCHLIST_3 = 34, 254 _3DPRIM_PATCHLIST_4 = 35, 255 _3DPRIM_PATCHLIST_5 = 36, 256 _3DPRIM_PATCHLIST_6 = 37, 257 _3DPRIM_PATCHLIST_7 = 38, 258 _3DPRIM_PATCHLIST_8 = 39, 259 _3DPRIM_PATCHLIST_9 = 40, 260 _3DPRIM_PATCHLIST_10 = 41, 261 _3DPRIM_PATCHLIST_11 = 42, 262 _3DPRIM_PATCHLIST_12 = 43, 263 _3DPRIM_PATCHLIST_13 = 44, 264 _3DPRIM_PATCHLIST_14 = 45, 265 _3DPRIM_PATCHLIST_15 = 46, 266 _3DPRIM_PATCHLIST_16 = 47, 267 _3DPRIM_PATCHLIST_17 = 48, 268 _3DPRIM_PATCHLIST_18 = 49, 269 _3DPRIM_PATCHLIST_19 = 50, 270 _3DPRIM_PATCHLIST_20 = 51, 271 _3DPRIM_PATCHLIST_21 = 52, 272 _3DPRIM_PATCHLIST_22 = 53, 273 _3DPRIM_PATCHLIST_23 = 54, 274 _3DPRIM_PATCHLIST_24 = 55, 275 _3DPRIM_PATCHLIST_25 = 56, 276 _3DPRIM_PATCHLIST_26 = 57, 277 _3DPRIM_PATCHLIST_27 = 58, 278 _3DPRIM_PATCHLIST_28 = 59, 279 _3DPRIM_PATCHLIST_29 = 60, 280 _3DPRIM_PATCHLIST_30 = 61, 281 _3DPRIM_PATCHLIST_31 = 62, 282 _3DPRIM_PATCHLIST_32 = 63, 283}; 284 285enum GEN75_3D_Stencil_Operation { 286 STENCILOP_KEEP = 0, 287 STENCILOP_ZERO = 1, 288 STENCILOP_REPLACE = 2, 289 STENCILOP_INCRSAT = 3, 290 STENCILOP_DECRSAT = 4, 291 STENCILOP_INCR = 5, 292 STENCILOP_DECR = 6, 293 STENCILOP_INVERT = 7, 294}; 295 296enum GEN75_3D_Vertex_Component_Control { 297 VFCOMP_NOSTORE = 0, 298 VFCOMP_STORE_SRC = 1, 299 VFCOMP_STORE_0 = 2, 300 VFCOMP_STORE_1_FP = 3, 301 VFCOMP_STORE_1_INT = 4, 302 VFCOMP_STORE_VID = 5, 303 VFCOMP_STORE_IID = 6, 304 VFCOMP_STORE_PID = 7, 305}; 306 307enum GEN75_ShaderChannelSelect { 308 SCS_ZERO = 0, 309 SCS_ONE = 1, 310 SCS_RED = 4, 311 SCS_GREEN = 5, 312 SCS_BLUE = 6, 313 SCS_ALPHA = 7, 314}; 315 316enum GEN75_TextureCoordinateMode { 317 TCM_WRAP = 0, 318 TCM_MIRROR = 1, 319 TCM_CLAMP = 2, 320 TCM_CUBE = 3, 321 TCM_CLAMP_BORDER = 4, 322 TCM_MIRROR_ONCE = 5, 323}; 324 325#define GEN75_3DSTATE_CONSTANT_BODY_length 6 326struct GEN75_3DSTATE_CONSTANT_BODY { 327 uint32_t ReadLength[4]; 328 uint32_t MOCS; 329 __gen_address_type Buffer[4]; 330}; 331 332static inline void 333GEN75_3DSTATE_CONSTANT_BODY_pack(__attribute__((unused)) __gen_user_data *data, 334 __attribute__((unused)) void * restrict dst, 335 __attribute__((unused)) const struct GEN75_3DSTATE_CONSTANT_BODY * restrict values) 336{ 337 uint32_t * restrict dw = (uint32_t * restrict) dst; 338 339 dw[0] = 340 __gen_uint(values->ReadLength[0], 0, 15) | 341 __gen_uint(values->ReadLength[1], 16, 31); 342 343 dw[1] = 344 __gen_uint(values->ReadLength[2], 0, 15) | 345 __gen_uint(values->ReadLength[3], 16, 31); 346 347 const uint32_t v2 = 348 __gen_uint(values->MOCS, 0, 4); 349 dw[2] = __gen_combine_address(data, &dw[2], values->Buffer[0], v2); 350 351 dw[3] = __gen_combine_address(data, &dw[3], values->Buffer[1], 0); 352 353 dw[4] = __gen_combine_address(data, &dw[4], values->Buffer[2], 0); 354 355 dw[5] = __gen_combine_address(data, &dw[5], values->Buffer[3], 0); 356} 357 358#define GEN75_BINDING_TABLE_EDIT_ENTRY_length 1 359struct GEN75_BINDING_TABLE_EDIT_ENTRY { 360 uint64_t SurfaceStatePointer; 361 uint32_t BindingTableIndex; 362}; 363 364static inline void 365GEN75_BINDING_TABLE_EDIT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 366 __attribute__((unused)) void * restrict dst, 367 __attribute__((unused)) const struct GEN75_BINDING_TABLE_EDIT_ENTRY * restrict values) 368{ 369 uint32_t * restrict dw = (uint32_t * restrict) dst; 370 371 dw[0] = 372 __gen_offset(values->SurfaceStatePointer, 0, 15) | 373 __gen_uint(values->BindingTableIndex, 16, 23); 374} 375 376#define GEN75_BINDING_TABLE_STATE_length 1 377struct GEN75_BINDING_TABLE_STATE { 378 uint64_t SurfaceStatePointer; 379}; 380 381static inline void 382GEN75_BINDING_TABLE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 383 __attribute__((unused)) void * restrict dst, 384 __attribute__((unused)) const struct GEN75_BINDING_TABLE_STATE * restrict values) 385{ 386 uint32_t * restrict dw = (uint32_t * restrict) dst; 387 388 dw[0] = 389 __gen_offset(values->SurfaceStatePointer, 5, 31); 390} 391 392#define GEN75_BLEND_STATE_ENTRY_length 2 393struct GEN75_BLEND_STATE_ENTRY { 394 enum GEN75_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; 395 enum GEN75_3D_Color_Buffer_Blend_Factor SourceBlendFactor; 396 enum GEN75_3D_Color_Buffer_Blend_Function ColorBlendFunction; 397 enum GEN75_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; 398 enum GEN75_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; 399 enum GEN75_3D_Color_Buffer_Blend_Function AlphaBlendFunction; 400 bool IndependentAlphaBlendEnable; 401 bool ColorBufferBlendEnable; 402 bool PostBlendColorClampEnable; 403 bool PreBlendColorClampEnable; 404 uint32_t ColorClampRange; 405#define COLORCLAMP_UNORM 0 406#define COLORCLAMP_SNORM 1 407#define COLORCLAMP_RTFORMAT 2 408 uint32_t YDitherOffset; 409 uint32_t XDitherOffset; 410 bool ColorDitherEnable; 411 enum GEN75_3D_Compare_Function AlphaTestFunction; 412 bool AlphaTestEnable; 413 enum GEN75_3D_Logic_Op_Function LogicOpFunction; 414 bool LogicOpEnable; 415 bool WriteDisableBlue; 416 bool WriteDisableGreen; 417 bool WriteDisableRed; 418 bool WriteDisableAlpha; 419 bool AlphaToCoverageDitherEnable; 420 bool AlphaToOneEnable; 421 bool AlphaToCoverageEnable; 422}; 423 424static inline void 425GEN75_BLEND_STATE_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 426 __attribute__((unused)) void * restrict dst, 427 __attribute__((unused)) const struct GEN75_BLEND_STATE_ENTRY * restrict values) 428{ 429 uint32_t * restrict dw = (uint32_t * restrict) dst; 430 431 dw[0] = 432 __gen_uint(values->DestinationBlendFactor, 0, 4) | 433 __gen_uint(values->SourceBlendFactor, 5, 9) | 434 __gen_uint(values->ColorBlendFunction, 11, 13) | 435 __gen_uint(values->DestinationAlphaBlendFactor, 15, 19) | 436 __gen_uint(values->SourceAlphaBlendFactor, 20, 24) | 437 __gen_uint(values->AlphaBlendFunction, 26, 28) | 438 __gen_uint(values->IndependentAlphaBlendEnable, 30, 30) | 439 __gen_uint(values->ColorBufferBlendEnable, 31, 31); 440 441 dw[1] = 442 __gen_uint(values->PostBlendColorClampEnable, 0, 0) | 443 __gen_uint(values->PreBlendColorClampEnable, 1, 1) | 444 __gen_uint(values->ColorClampRange, 2, 3) | 445 __gen_uint(values->YDitherOffset, 8, 9) | 446 __gen_uint(values->XDitherOffset, 10, 11) | 447 __gen_uint(values->ColorDitherEnable, 12, 12) | 448 __gen_uint(values->AlphaTestFunction, 13, 15) | 449 __gen_uint(values->AlphaTestEnable, 16, 16) | 450 __gen_uint(values->LogicOpFunction, 18, 21) | 451 __gen_uint(values->LogicOpEnable, 22, 22) | 452 __gen_uint(values->WriteDisableBlue, 24, 24) | 453 __gen_uint(values->WriteDisableGreen, 25, 25) | 454 __gen_uint(values->WriteDisableRed, 26, 26) | 455 __gen_uint(values->WriteDisableAlpha, 27, 27) | 456 __gen_uint(values->AlphaToCoverageDitherEnable, 29, 29) | 457 __gen_uint(values->AlphaToOneEnable, 30, 30) | 458 __gen_uint(values->AlphaToCoverageEnable, 31, 31); 459} 460 461#define GEN75_BLEND_STATE_length 0 462struct GEN75_BLEND_STATE { 463 /* variable length fields follow */ 464}; 465 466static inline void 467GEN75_BLEND_STATE_pack(__attribute__((unused)) __gen_user_data *data, 468 __attribute__((unused)) void * restrict dst, 469 __attribute__((unused)) const struct GEN75_BLEND_STATE * restrict values) 470{ 471} 472 473#define GEN75_CC_VIEWPORT_length 2 474struct GEN75_CC_VIEWPORT { 475 float MinimumDepth; 476 float MaximumDepth; 477}; 478 479static inline void 480GEN75_CC_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 481 __attribute__((unused)) void * restrict dst, 482 __attribute__((unused)) const struct GEN75_CC_VIEWPORT * restrict values) 483{ 484 uint32_t * restrict dw = (uint32_t * restrict) dst; 485 486 dw[0] = 487 __gen_float(values->MinimumDepth); 488 489 dw[1] = 490 __gen_float(values->MaximumDepth); 491} 492 493#define GEN75_COLOR_CALC_STATE_length 6 494struct GEN75_COLOR_CALC_STATE { 495 uint32_t AlphaTestFormat; 496#define ALPHATEST_UNORM8 0 497#define ALPHATEST_FLOAT32 1 498 bool RoundDisableFunctionDisable; 499 uint32_t BackfaceStencilReferenceValue; 500 uint32_t StencilReferenceValue; 501 uint32_t AlphaReferenceValueAsUNORM8; 502 float AlphaReferenceValueAsFLOAT32; 503 float BlendConstantColorRed; 504 float BlendConstantColorGreen; 505 float BlendConstantColorBlue; 506 float BlendConstantColorAlpha; 507}; 508 509static inline void 510GEN75_COLOR_CALC_STATE_pack(__attribute__((unused)) __gen_user_data *data, 511 __attribute__((unused)) void * restrict dst, 512 __attribute__((unused)) const struct GEN75_COLOR_CALC_STATE * restrict values) 513{ 514 uint32_t * restrict dw = (uint32_t * restrict) dst; 515 516 dw[0] = 517 __gen_uint(values->AlphaTestFormat, 0, 0) | 518 __gen_uint(values->RoundDisableFunctionDisable, 15, 15) | 519 __gen_uint(values->BackfaceStencilReferenceValue, 16, 23) | 520 __gen_uint(values->StencilReferenceValue, 24, 31); 521 522 dw[1] = 523 __gen_uint(values->AlphaReferenceValueAsUNORM8, 0, 31) | 524 __gen_float(values->AlphaReferenceValueAsFLOAT32); 525 526 dw[2] = 527 __gen_float(values->BlendConstantColorRed); 528 529 dw[3] = 530 __gen_float(values->BlendConstantColorGreen); 531 532 dw[4] = 533 __gen_float(values->BlendConstantColorBlue); 534 535 dw[5] = 536 __gen_float(values->BlendConstantColorAlpha); 537} 538 539#define GEN75_DEPTH_STENCIL_STATE_length 3 540struct GEN75_DEPTH_STENCIL_STATE { 541 enum GEN75_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; 542 enum GEN75_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; 543 enum GEN75_3D_Stencil_Operation BackfaceStencilFailOp; 544 enum GEN75_3D_Compare_Function BackfaceStencilTestFunction; 545 bool DoubleSidedStencilEnable; 546 bool StencilBufferWriteEnable; 547 enum GEN75_3D_Stencil_Operation StencilPassDepthPassOp; 548 enum GEN75_3D_Stencil_Operation StencilPassDepthFailOp; 549 enum GEN75_3D_Stencil_Operation StencilFailOp; 550 enum GEN75_3D_Compare_Function StencilTestFunction; 551 bool StencilTestEnable; 552 uint32_t BackfaceStencilWriteMask; 553 uint32_t BackfaceStencilTestMask; 554 uint32_t StencilWriteMask; 555 uint32_t StencilTestMask; 556 bool DepthBufferWriteEnable; 557 enum GEN75_3D_Compare_Function DepthTestFunction; 558 bool DepthTestEnable; 559}; 560 561static inline void 562GEN75_DEPTH_STENCIL_STATE_pack(__attribute__((unused)) __gen_user_data *data, 563 __attribute__((unused)) void * restrict dst, 564 __attribute__((unused)) const struct GEN75_DEPTH_STENCIL_STATE * restrict values) 565{ 566 uint32_t * restrict dw = (uint32_t * restrict) dst; 567 568 dw[0] = 569 __gen_uint(values->BackfaceStencilPassDepthPassOp, 3, 5) | 570 __gen_uint(values->BackfaceStencilPassDepthFailOp, 6, 8) | 571 __gen_uint(values->BackfaceStencilFailOp, 9, 11) | 572 __gen_uint(values->BackfaceStencilTestFunction, 12, 14) | 573 __gen_uint(values->DoubleSidedStencilEnable, 15, 15) | 574 __gen_uint(values->StencilBufferWriteEnable, 18, 18) | 575 __gen_uint(values->StencilPassDepthPassOp, 19, 21) | 576 __gen_uint(values->StencilPassDepthFailOp, 22, 24) | 577 __gen_uint(values->StencilFailOp, 25, 27) | 578 __gen_uint(values->StencilTestFunction, 28, 30) | 579 __gen_uint(values->StencilTestEnable, 31, 31); 580 581 dw[1] = 582 __gen_uint(values->BackfaceStencilWriteMask, 0, 7) | 583 __gen_uint(values->BackfaceStencilTestMask, 8, 15) | 584 __gen_uint(values->StencilWriteMask, 16, 23) | 585 __gen_uint(values->StencilTestMask, 24, 31); 586 587 dw[2] = 588 __gen_uint(values->DepthBufferWriteEnable, 26, 26) | 589 __gen_uint(values->DepthTestFunction, 27, 29) | 590 __gen_uint(values->DepthTestEnable, 31, 31); 591} 592 593#define GEN75_GATHER_CONSTANT_ENTRY_length 1 594struct GEN75_GATHER_CONSTANT_ENTRY { 595 uint32_t BindingTableIndexOffset; 596 uint32_t ChannelMask; 597 uint64_t ConstantBufferOffset; 598}; 599 600static inline void 601GEN75_GATHER_CONSTANT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 602 __attribute__((unused)) void * restrict dst, 603 __attribute__((unused)) const struct GEN75_GATHER_CONSTANT_ENTRY * restrict values) 604{ 605 uint32_t * restrict dw = (uint32_t * restrict) dst; 606 607 dw[0] = 608 __gen_uint(values->BindingTableIndexOffset, 0, 3) | 609 __gen_uint(values->ChannelMask, 4, 7) | 610 __gen_offset(values->ConstantBufferOffset, 8, 15); 611} 612 613#define GEN75_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_length 3 614struct GEN75_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT { 615 bool MBErrorConcealmentPSliceWeightPredictionDisable; 616 bool MBErrorConcealmentPSliceMotionVectorsOverrideDisable; 617 bool MBErrorConcealmentBSpatialWeightPredictionDisable; 618 bool MBErrorConcealmentBSpatialMotionVectorsOverrideDisable; 619 uint32_t MBErrorConcealmentBSpatialPredictionMode; 620 bool MBHeaderErrorHandling; 621 bool EntropyErrorHandling; 622 bool MPRErrorHandling; 623 bool BSDPrematureCompleteErrorHandling; 624 uint32_t ConcealmentPictureID; 625 bool MBErrorConcealmentBTemporalWeightPredictionDisable; 626 bool MBErrorConcealmentBTemporalMotionVectorsOverrideEnable; 627 uint32_t MBErrorConcealmentBTemporalPredictionMode; 628 bool IntraPredMode4x48x8LumaErrorControl; 629 uint32_t InitCurrentMBNumber; 630 uint32_t ConcealmentMethod; 631 uint32_t FirstMBBitOffset; 632 bool LastSlice; 633 bool EmulationPreventionBytePresent; 634 bool FixPrevMBSkipped; 635 uint32_t FirstMBByteOffsetofSliceDataorSliceHeader; 636 bool IntraPredictionErrorControl; 637 bool Intra8x84x4PredictionErrorConcealmentControl; 638 uint32_t BSliceTemporalInterConcealmentMode; 639 uint32_t BSliceSpatialInterConcealmentMode; 640 uint32_t BSliceInterDirectTypeConcealmentMode; 641 uint32_t BSliceConcealmentMode; 642#define IntraConcealment 1 643#define InterConcealment 0 644 uint32_t PSliceInterConcealmentMode; 645 uint32_t PSliceConcealmentMode; 646#define IntraConcealment 1 647#define InterConcealment 0 648 uint32_t ConcealmentReferencePictureFieldBit; 649 uint32_t ISliceConcealmentMode; 650#define IntraConcealment 1 651#define InterConcealment 0 652}; 653 654static inline void 655GEN75_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 656 __attribute__((unused)) void * restrict dst, 657 __attribute__((unused)) const struct GEN75_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT * restrict values) 658{ 659 uint32_t * restrict dw = (uint32_t * restrict) dst; 660 661 dw[0] = 662 __gen_uint(values->MBErrorConcealmentPSliceWeightPredictionDisable, 0, 0) | 663 __gen_uint(values->MBErrorConcealmentPSliceMotionVectorsOverrideDisable, 1, 1) | 664 __gen_uint(values->MBErrorConcealmentBSpatialWeightPredictionDisable, 3, 3) | 665 __gen_uint(values->MBErrorConcealmentBSpatialMotionVectorsOverrideDisable, 4, 4) | 666 __gen_uint(values->MBErrorConcealmentBSpatialPredictionMode, 6, 7) | 667 __gen_uint(values->MBHeaderErrorHandling, 8, 8) | 668 __gen_uint(values->EntropyErrorHandling, 10, 10) | 669 __gen_uint(values->MPRErrorHandling, 12, 12) | 670 __gen_uint(values->BSDPrematureCompleteErrorHandling, 14, 14) | 671 __gen_uint(values->ConcealmentPictureID, 16, 21) | 672 __gen_uint(values->MBErrorConcealmentBTemporalWeightPredictionDisable, 24, 24) | 673 __gen_uint(values->MBErrorConcealmentBTemporalMotionVectorsOverrideEnable, 25, 25) | 674 __gen_uint(values->MBErrorConcealmentBTemporalPredictionMode, 27, 28) | 675 __gen_uint(values->IntraPredMode4x48x8LumaErrorControl, 29, 29) | 676 __gen_uint(values->InitCurrentMBNumber, 30, 30) | 677 __gen_uint(values->ConcealmentMethod, 31, 31); 678 679 dw[1] = 680 __gen_uint(values->FirstMBBitOffset, 0, 2) | 681 __gen_uint(values->LastSlice, 3, 3) | 682 __gen_uint(values->EmulationPreventionBytePresent, 4, 4) | 683 __gen_uint(values->FixPrevMBSkipped, 7, 7) | 684 __gen_uint(values->FirstMBByteOffsetofSliceDataorSliceHeader, 16, 31); 685 686 dw[2] = 687 __gen_uint(values->IntraPredictionErrorControl, 0, 0) | 688 __gen_uint(values->Intra8x84x4PredictionErrorConcealmentControl, 1, 1) | 689 __gen_uint(values->BSliceTemporalInterConcealmentMode, 4, 6) | 690 __gen_uint(values->BSliceSpatialInterConcealmentMode, 8, 10) | 691 __gen_uint(values->BSliceInterDirectTypeConcealmentMode, 12, 13) | 692 __gen_uint(values->BSliceConcealmentMode, 15, 15) | 693 __gen_uint(values->PSliceInterConcealmentMode, 16, 18) | 694 __gen_uint(values->PSliceConcealmentMode, 23, 23) | 695 __gen_uint(values->ConcealmentReferencePictureFieldBit, 24, 29) | 696 __gen_uint(values->ISliceConcealmentMode, 31, 31); 697} 698 699#define GEN75_INTERFACE_DESCRIPTOR_DATA_length 8 700struct GEN75_INTERFACE_DESCRIPTOR_DATA { 701 uint64_t KernelStartPointer; 702 bool SoftwareExceptionEnable; 703 bool MaskStackExceptionEnable; 704 bool IllegalOpcodeExceptionEnable; 705 uint32_t FloatingPointMode; 706#define IEEE754 0 707#define Alternate 1 708 uint32_t ThreadPriority; 709#define NormalPriority 0 710#define HighPriority 1 711 bool SingleProgramFlow; 712 uint32_t SamplerCount; 713#define Nosamplersused 0 714#define Between1and4samplersused 1 715#define Between5and8samplersused 2 716#define Between9and12samplersused 3 717#define Between13and16samplersused 4 718 uint64_t SamplerStatePointer; 719 uint32_t BindingTableEntryCount; 720 uint64_t BindingTablePointer; 721 uint32_t ConstantURBEntryReadLength; 722 uint32_t NumberofThreadsinGPGPUThreadGroup; 723 uint32_t SharedLocalMemorySize; 724 bool BarrierEnable; 725 uint32_t RoundingMode; 726#define RTNE 0 727#define RU 1 728#define RD 2 729#define RTZ 3 730 uint32_t CrossThreadConstantDataReadLength; 731}; 732 733static inline void 734GEN75_INTERFACE_DESCRIPTOR_DATA_pack(__attribute__((unused)) __gen_user_data *data, 735 __attribute__((unused)) void * restrict dst, 736 __attribute__((unused)) const struct GEN75_INTERFACE_DESCRIPTOR_DATA * restrict values) 737{ 738 uint32_t * restrict dw = (uint32_t * restrict) dst; 739 740 dw[0] = 741 __gen_offset(values->KernelStartPointer, 6, 31); 742 743 dw[1] = 744 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 745 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 746 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 747 __gen_uint(values->FloatingPointMode, 16, 16) | 748 __gen_uint(values->ThreadPriority, 17, 17) | 749 __gen_uint(values->SingleProgramFlow, 18, 18); 750 751 dw[2] = 752 __gen_uint(values->SamplerCount, 2, 4) | 753 __gen_offset(values->SamplerStatePointer, 5, 31); 754 755 dw[3] = 756 __gen_uint(values->BindingTableEntryCount, 0, 4) | 757 __gen_offset(values->BindingTablePointer, 5, 15); 758 759 dw[4] = 760 __gen_uint(values->ConstantURBEntryReadLength, 16, 31); 761 762 dw[5] = 763 __gen_uint(values->NumberofThreadsinGPGPUThreadGroup, 0, 7) | 764 __gen_uint(values->SharedLocalMemorySize, 16, 20) | 765 __gen_uint(values->BarrierEnable, 21, 21) | 766 __gen_uint(values->RoundingMode, 22, 23); 767 768 dw[6] = 769 __gen_uint(values->CrossThreadConstantDataReadLength, 0, 7); 770 771 dw[7] = 0; 772} 773 774#define GEN75_MEMORY_OBJECT_CONTROL_STATE_length 1 775struct GEN75_MEMORY_OBJECT_CONTROL_STATE { 776 uint32_t L3CacheabilityControlL3CC; 777 uint32_t LLCeLLCCacheabilityControlLLCCC; 778}; 779 780static inline void 781GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(__attribute__((unused)) __gen_user_data *data, 782 __attribute__((unused)) void * restrict dst, 783 __attribute__((unused)) const struct GEN75_MEMORY_OBJECT_CONTROL_STATE * restrict values) 784{ 785 uint32_t * restrict dw = (uint32_t * restrict) dst; 786 787 dw[0] = 788 __gen_uint(values->L3CacheabilityControlL3CC, 0, 0) | 789 __gen_uint(values->LLCeLLCCacheabilityControlLLCCC, 1, 2); 790} 791 792#define GEN75_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_length 2 793struct GEN75_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION { 794 uint32_t FirstMBBitOffset; 795 bool LastMB; 796 bool LastPicSlice; 797 uint32_t SliceConcealmentType; 798 uint32_t SliceConcealmentOverride; 799 uint32_t MBCount; 800 uint32_t SliceVerticalPosition; 801 uint32_t SliceHorizontalPosition; 802 uint32_t NextSliceHorizontalPosition; 803 uint32_t NextSliceVerticalPosition; 804 uint32_t QuantizerScaleCode; 805}; 806 807static inline void 808GEN75_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_pack(__attribute__((unused)) __gen_user_data *data, 809 __attribute__((unused)) void * restrict dst, 810 __attribute__((unused)) const struct GEN75_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION * restrict values) 811{ 812 uint32_t * restrict dw = (uint32_t * restrict) dst; 813 814 dw[0] = 815 __gen_uint(values->FirstMBBitOffset, 0, 2) | 816 __gen_uint(values->LastMB, 3, 3) | 817 __gen_uint(values->LastPicSlice, 5, 5) | 818 __gen_uint(values->SliceConcealmentType, 6, 6) | 819 __gen_uint(values->SliceConcealmentOverride, 7, 7) | 820 __gen_uint(values->MBCount, 8, 15) | 821 __gen_uint(values->SliceVerticalPosition, 16, 23) | 822 __gen_uint(values->SliceHorizontalPosition, 24, 31); 823 824 dw[1] = 825 __gen_uint(values->NextSliceHorizontalPosition, 0, 7) | 826 __gen_uint(values->NextSliceVerticalPosition, 8, 16) | 827 __gen_uint(values->QuantizerScaleCode, 24, 28); 828} 829 830#define GEN75_MI_MATH_ALU_INSTRUCTION_length 1 831struct GEN75_MI_MATH_ALU_INSTRUCTION { 832 uint32_t Operand2; 833#define MI_ALU_REG0 0 834#define MI_ALU_REG1 1 835#define MI_ALU_REG2 2 836#define MI_ALU_REG3 3 837#define MI_ALU_REG4 4 838#define MI_ALU_REG5 5 839#define MI_ALU_REG6 6 840#define MI_ALU_REG7 7 841#define MI_ALU_REG8 8 842#define MI_ALU_REG9 9 843#define MI_ALU_REG10 10 844#define MI_ALU_REG11 11 845#define MI_ALU_REG12 12 846#define MI_ALU_REG13 13 847#define MI_ALU_REG14 14 848#define MI_ALU_REG15 15 849#define MI_ALU_SRCA 32 850#define MI_ALU_SRCB 33 851#define MI_ALU_ACCU 49 852#define MI_ALU_ZF 50 853#define MI_ALU_CF 51 854 uint32_t Operand1; 855#define MI_ALU_REG0 0 856#define MI_ALU_REG1 1 857#define MI_ALU_REG2 2 858#define MI_ALU_REG3 3 859#define MI_ALU_REG4 4 860#define MI_ALU_REG5 5 861#define MI_ALU_REG6 6 862#define MI_ALU_REG7 7 863#define MI_ALU_REG8 8 864#define MI_ALU_REG9 9 865#define MI_ALU_REG10 10 866#define MI_ALU_REG11 11 867#define MI_ALU_REG12 12 868#define MI_ALU_REG13 13 869#define MI_ALU_REG14 14 870#define MI_ALU_REG15 15 871#define MI_ALU_SRCA 32 872#define MI_ALU_SRCB 33 873#define MI_ALU_ACCU 49 874#define MI_ALU_ZF 50 875#define MI_ALU_CF 51 876 uint32_t ALUOpcode; 877#define MI_ALU_NOOP 0 878#define MI_ALU_LOAD 128 879#define MI_ALU_LOADINV 1152 880#define MI_ALU_LOAD0 129 881#define MI_ALU_LOAD1 1153 882#define MI_ALU_ADD 256 883#define MI_ALU_SUB 257 884#define MI_ALU_AND 258 885#define MI_ALU_OR 259 886#define MI_ALU_XOR 260 887#define MI_ALU_STORE 384 888#define MI_ALU_STOREINV 1408 889}; 890 891static inline void 892GEN75_MI_MATH_ALU_INSTRUCTION_pack(__attribute__((unused)) __gen_user_data *data, 893 __attribute__((unused)) void * restrict dst, 894 __attribute__((unused)) const struct GEN75_MI_MATH_ALU_INSTRUCTION * restrict values) 895{ 896 uint32_t * restrict dw = (uint32_t * restrict) dst; 897 898 dw[0] = 899 __gen_uint(values->Operand2, 0, 9) | 900 __gen_uint(values->Operand1, 10, 19) | 901 __gen_uint(values->ALUOpcode, 20, 31); 902} 903 904#define GEN75_PALETTE_ENTRY_length 1 905struct GEN75_PALETTE_ENTRY { 906 uint32_t Blue; 907 uint32_t Green; 908 uint32_t Red; 909 uint32_t Alpha; 910}; 911 912static inline void 913GEN75_PALETTE_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 914 __attribute__((unused)) void * restrict dst, 915 __attribute__((unused)) const struct GEN75_PALETTE_ENTRY * restrict values) 916{ 917 uint32_t * restrict dw = (uint32_t * restrict) dst; 918 919 dw[0] = 920 __gen_uint(values->Blue, 0, 7) | 921 __gen_uint(values->Green, 8, 15) | 922 __gen_uint(values->Red, 16, 23) | 923 __gen_uint(values->Alpha, 24, 31); 924} 925 926#define GEN75_RENDER_SURFACE_STATE_length 8 927struct GEN75_RENDER_SURFACE_STATE { 928 bool CubeFaceEnablePositiveZ; 929 bool CubeFaceEnableNegativeZ; 930 bool CubeFaceEnablePositiveY; 931 bool CubeFaceEnableNegativeY; 932 bool CubeFaceEnablePositiveX; 933 bool CubeFaceEnableNegativeX; 934 uint32_t MediaBoundaryPixelMode; 935#define NORMAL_MODE 0 936#define PROGRESSIVE_FRAME 2 937#define INTERLACED_FRAME 3 938 uint32_t RenderCacheReadWriteMode; 939 uint32_t SurfaceArraySpacing; 940#define ARYSPC_FULL 0 941#define ARYSPC_LOD0 1 942 uint32_t VerticalLineStrideOffset; 943 uint32_t VerticalLineStride; 944 uint32_t TileWalk; 945#define TILEWALK_XMAJOR 0 946#define TILEWALK_YMAJOR 1 947 bool TiledSurface; 948 uint32_t SurfaceHorizontalAlignment; 949#define HALIGN_4 0 950#define HALIGN_8 1 951 uint32_t SurfaceVerticalAlignment; 952#define VALIGN_2 0 953#define VALIGN_4 1 954 uint32_t SurfaceFormat; 955 bool SurfaceArray; 956 uint32_t SurfaceType; 957#define SURFTYPE_1D 0 958#define SURFTYPE_2D 1 959#define SURFTYPE_3D 2 960#define SURFTYPE_CUBE 3 961#define SURFTYPE_BUFFER 4 962#define SURFTYPE_STRBUF 5 963#define SURFTYPE_NULL 7 964 __gen_address_type SurfaceBaseAddress; 965 uint32_t Width; 966 uint32_t Height; 967 uint32_t SurfacePitch; 968 uint32_t IntegerSurfaceFormat; 969 uint32_t Depth; 970 uint32_t MultisamplePositionPaletteIndex; 971 uint32_t StrbufMinimumArrayElement; 972 uint32_t NumberofMultisamples; 973#define MULTISAMPLECOUNT_1 0 974#define MULTISAMPLECOUNT_4 2 975#define MULTISAMPLECOUNT_8 3 976 uint32_t MultisampledSurfaceStorageFormat; 977#define MSFMT_MSS 0 978#define MSFMT_DEPTH_STENCIL 1 979 uint32_t RenderTargetViewExtent; 980 uint32_t MinimumArrayElement; 981 uint32_t RenderTargetRotation; 982#define RTROTATE_0DEG 0 983#define RTROTATE_90DEG 1 984#define RTROTATE_270DEG 3 985 uint32_t MIPCountLOD; 986 uint32_t SurfaceMinLOD; 987 uint32_t MOCS; 988 uint32_t YOffset; 989 uint32_t XOffset; 990 bool MCSEnable; 991 uint32_t YOffsetforUVPlane; 992 bool AppendCounterEnable; 993 uint32_t AuxiliarySurfacePitch; 994 __gen_address_type AppendCounterAddress; 995 __gen_address_type AuxiliarySurfaceBaseAddress; 996 uint32_t XOffsetforUVPlane; 997 uint32_t ReservedMBZ; 998 float ResourceMinLOD; 999 enum GEN75_ShaderChannelSelect ShaderChannelSelectAlpha; 1000 enum GEN75_ShaderChannelSelect ShaderChannelSelectBlue; 1001 enum GEN75_ShaderChannelSelect ShaderChannelSelectGreen; 1002 enum GEN75_ShaderChannelSelect ShaderChannelSelectRed; 1003 uint32_t AlphaClearColor; 1004 uint32_t BlueClearColor; 1005 uint32_t GreenClearColor; 1006 uint32_t RedClearColor; 1007}; 1008 1009static inline void 1010GEN75_RENDER_SURFACE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1011 __attribute__((unused)) void * restrict dst, 1012 __attribute__((unused)) const struct GEN75_RENDER_SURFACE_STATE * restrict values) 1013{ 1014 uint32_t * restrict dw = (uint32_t * restrict) dst; 1015 1016 dw[0] = 1017 __gen_uint(values->CubeFaceEnablePositiveZ, 0, 0) | 1018 __gen_uint(values->CubeFaceEnableNegativeZ, 1, 1) | 1019 __gen_uint(values->CubeFaceEnablePositiveY, 2, 2) | 1020 __gen_uint(values->CubeFaceEnableNegativeY, 3, 3) | 1021 __gen_uint(values->CubeFaceEnablePositiveX, 4, 4) | 1022 __gen_uint(values->CubeFaceEnableNegativeX, 5, 5) | 1023 __gen_uint(values->MediaBoundaryPixelMode, 6, 7) | 1024 __gen_uint(values->RenderCacheReadWriteMode, 8, 8) | 1025 __gen_uint(values->SurfaceArraySpacing, 10, 10) | 1026 __gen_uint(values->VerticalLineStrideOffset, 11, 11) | 1027 __gen_uint(values->VerticalLineStride, 12, 12) | 1028 __gen_uint(values->TileWalk, 13, 13) | 1029 __gen_uint(values->TiledSurface, 14, 14) | 1030 __gen_uint(values->SurfaceHorizontalAlignment, 15, 15) | 1031 __gen_uint(values->SurfaceVerticalAlignment, 16, 17) | 1032 __gen_uint(values->SurfaceFormat, 18, 26) | 1033 __gen_uint(values->SurfaceArray, 28, 28) | 1034 __gen_uint(values->SurfaceType, 29, 31); 1035 1036 dw[1] = __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, 0); 1037 1038 dw[2] = 1039 __gen_uint(values->Width, 0, 13) | 1040 __gen_uint(values->Height, 16, 29); 1041 1042 dw[3] = 1043 __gen_uint(values->SurfacePitch, 0, 17) | 1044 __gen_uint(values->IntegerSurfaceFormat, 18, 20) | 1045 __gen_uint(values->Depth, 21, 31); 1046 1047 dw[4] = 1048 __gen_uint(values->MultisamplePositionPaletteIndex, 0, 2) | 1049 __gen_uint(values->StrbufMinimumArrayElement, 0, 26) | 1050 __gen_uint(values->NumberofMultisamples, 3, 5) | 1051 __gen_uint(values->MultisampledSurfaceStorageFormat, 6, 6) | 1052 __gen_uint(values->RenderTargetViewExtent, 7, 17) | 1053 __gen_uint(values->MinimumArrayElement, 18, 28) | 1054 __gen_uint(values->RenderTargetRotation, 29, 30); 1055 1056 dw[5] = 1057 __gen_uint(values->MIPCountLOD, 0, 3) | 1058 __gen_uint(values->SurfaceMinLOD, 4, 7) | 1059 __gen_uint(values->MOCS, 16, 19) | 1060 __gen_uint(values->YOffset, 20, 23) | 1061 __gen_uint(values->XOffset, 25, 31); 1062 1063 const uint32_t v6 = 1064 __gen_uint(values->MCSEnable, 0, 0) | 1065 __gen_uint(values->YOffsetforUVPlane, 0, 13) | 1066 __gen_uint(values->AppendCounterEnable, 1, 1) | 1067 __gen_uint(values->AuxiliarySurfacePitch, 3, 11) | 1068 __gen_uint(values->XOffsetforUVPlane, 16, 29) | 1069 __gen_uint(values->ReservedMBZ, 30, 31); 1070 dw[6] = __gen_combine_address(data, &dw[6], values->AuxiliarySurfaceBaseAddress, v6); 1071 1072 dw[7] = 1073 __gen_ufixed(values->ResourceMinLOD, 0, 11, 8) | 1074 __gen_uint(values->ShaderChannelSelectAlpha, 16, 18) | 1075 __gen_uint(values->ShaderChannelSelectBlue, 19, 21) | 1076 __gen_uint(values->ShaderChannelSelectGreen, 22, 24) | 1077 __gen_uint(values->ShaderChannelSelectRed, 25, 27) | 1078 __gen_uint(values->AlphaClearColor, 28, 28) | 1079 __gen_uint(values->BlueClearColor, 29, 29) | 1080 __gen_uint(values->GreenClearColor, 30, 30) | 1081 __gen_uint(values->RedClearColor, 31, 31); 1082} 1083 1084#define GEN75_SAMPLER_BORDER_COLOR_STATE_length 20 1085struct GEN75_SAMPLER_BORDER_COLOR_STATE { 1086 float BorderColorFloatRed; 1087 float BorderColorFloatGreen; 1088 float BorderColorFloatBlue; 1089 float BorderColorFloatAlpha; 1090 uint32_t BorderColor8bitRed; 1091 uint32_t BorderColor16bitRed; 1092 uint32_t BorderColor32bitRed; 1093 uint32_t BorderColor8bitGreen; 1094 uint32_t BorderColor8bitBlue; 1095 uint32_t BorderColor16bitGreen; 1096 uint32_t BorderColor8bitAlpha; 1097 uint32_t BorderColor32bitGreen; 1098 uint32_t BorderColor16bitBlue; 1099 uint32_t BorderColor32bitBlue; 1100 uint32_t BorderColor16bitAlpha; 1101 uint32_t BorderColor32bitAlpha; 1102}; 1103 1104static inline void 1105GEN75_SAMPLER_BORDER_COLOR_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1106 __attribute__((unused)) void * restrict dst, 1107 __attribute__((unused)) const struct GEN75_SAMPLER_BORDER_COLOR_STATE * restrict values) 1108{ 1109 uint32_t * restrict dw = (uint32_t * restrict) dst; 1110 1111 dw[0] = 1112 __gen_float(values->BorderColorFloatRed); 1113 1114 dw[1] = 1115 __gen_float(values->BorderColorFloatGreen); 1116 1117 dw[2] = 1118 __gen_float(values->BorderColorFloatBlue); 1119 1120 dw[3] = 1121 __gen_float(values->BorderColorFloatAlpha); 1122 1123 dw[4] = 0; 1124 1125 dw[5] = 0; 1126 1127 dw[6] = 0; 1128 1129 dw[7] = 0; 1130 1131 dw[8] = 0; 1132 1133 dw[9] = 0; 1134 1135 dw[10] = 0; 1136 1137 dw[11] = 0; 1138 1139 dw[12] = 0; 1140 1141 dw[13] = 0; 1142 1143 dw[14] = 0; 1144 1145 dw[15] = 0; 1146 1147 dw[16] = 1148 __gen_uint(values->BorderColor8bitRed, 0, 7) | 1149 __gen_uint(values->BorderColor16bitRed, 0, 15) | 1150 __gen_uint(values->BorderColor32bitRed, 0, 31) | 1151 __gen_uint(values->BorderColor8bitGreen, 8, 15) | 1152 __gen_uint(values->BorderColor8bitBlue, 16, 23) | 1153 __gen_uint(values->BorderColor16bitGreen, 16, 31) | 1154 __gen_uint(values->BorderColor8bitAlpha, 24, 31); 1155 1156 dw[17] = 1157 __gen_uint(values->BorderColor32bitGreen, 0, 31); 1158 1159 dw[18] = 1160 __gen_uint(values->BorderColor16bitBlue, 0, 15) | 1161 __gen_uint(values->BorderColor32bitBlue, 0, 31) | 1162 __gen_uint(values->BorderColor16bitAlpha, 16, 31); 1163 1164 dw[19] = 1165 __gen_uint(values->BorderColor32bitAlpha, 0, 31); 1166} 1167 1168#define GEN75_SAMPLER_STATE_length 4 1169struct GEN75_SAMPLER_STATE { 1170 uint32_t AnisotropicAlgorithm; 1171#define LEGACY 0 1172#define EWAApproximation 1 1173 float TextureLODBias; 1174 uint32_t MinModeFilter; 1175#define MAPFILTER_NEAREST 0 1176#define MAPFILTER_LINEAR 1 1177#define MAPFILTER_ANISOTROPIC 2 1178#define MAPFILTER_MONO 6 1179 uint32_t MagModeFilter; 1180#define MAPFILTER_NEAREST 0 1181#define MAPFILTER_LINEAR 1 1182#define MAPFILTER_ANISOTROPIC 2 1183#define MAPFILTER_MONO 6 1184 uint32_t MipModeFilter; 1185#define MIPFILTER_NONE 0 1186#define MIPFILTER_NEAREST 1 1187#define MIPFILTER_LINEAR 3 1188 float BaseMipLevel; 1189 uint32_t LODPreClampEnable; 1190#define CLAMP_ENABLE_OGL 1 1191 uint32_t TextureBorderColorMode; 1192#define DX10OGL 0 1193#define DX9 1 1194 bool SamplerDisable; 1195 uint32_t CubeSurfaceControlMode; 1196#define PROGRAMMED 0 1197#define OVERRIDE 1 1198 uint32_t ShadowFunction; 1199#define PREFILTEROPALWAYS 0 1200#define PREFILTEROPNEVER 1 1201#define PREFILTEROPLESS 2 1202#define PREFILTEROPEQUAL 3 1203#define PREFILTEROPLEQUAL 4 1204#define PREFILTEROPGREATER 5 1205#define PREFILTEROPNOTEQUAL 6 1206#define PREFILTEROPGEQUAL 7 1207 float MaxLOD; 1208 float MinLOD; 1209 uint64_t BorderColorPointer; 1210 enum GEN75_TextureCoordinateMode TCZAddressControlMode; 1211 enum GEN75_TextureCoordinateMode TCYAddressControlMode; 1212 enum GEN75_TextureCoordinateMode TCXAddressControlMode; 1213 bool NonnormalizedCoordinateEnable; 1214 uint32_t TrilinearFilterQuality; 1215#define FULL 0 1216#define TRIQUAL_HIGHMAG_CLAMP_MIPFILTER 1 1217#define MED 2 1218#define LOW 3 1219 bool RAddressMinFilterRoundingEnable; 1220 bool RAddressMagFilterRoundingEnable; 1221 bool VAddressMinFilterRoundingEnable; 1222 bool VAddressMagFilterRoundingEnable; 1223 bool UAddressMinFilterRoundingEnable; 1224 bool UAddressMagFilterRoundingEnable; 1225 uint32_t MaximumAnisotropy; 1226#define RATIO21 0 1227#define RATIO41 1 1228#define RATIO61 2 1229#define RATIO81 3 1230#define RATIO101 4 1231#define RATIO121 5 1232#define RATIO141 6 1233#define RATIO161 7 1234 uint32_t ChromaKeyMode; 1235#define KEYFILTER_KILL_ON_ANY_MATCH 0 1236#define KEYFILTER_REPLACE_BLACK 1 1237 uint32_t ChromaKeyIndex; 1238 bool ChromaKeyEnable; 1239}; 1240 1241static inline void 1242GEN75_SAMPLER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1243 __attribute__((unused)) void * restrict dst, 1244 __attribute__((unused)) const struct GEN75_SAMPLER_STATE * restrict values) 1245{ 1246 uint32_t * restrict dw = (uint32_t * restrict) dst; 1247 1248 dw[0] = 1249 __gen_uint(values->AnisotropicAlgorithm, 0, 0) | 1250 __gen_sfixed(values->TextureLODBias, 1, 13, 8) | 1251 __gen_uint(values->MinModeFilter, 14, 16) | 1252 __gen_uint(values->MagModeFilter, 17, 19) | 1253 __gen_uint(values->MipModeFilter, 20, 21) | 1254 __gen_ufixed(values->BaseMipLevel, 22, 26, 1) | 1255 __gen_uint(values->LODPreClampEnable, 28, 28) | 1256 __gen_uint(values->TextureBorderColorMode, 29, 29) | 1257 __gen_uint(values->SamplerDisable, 31, 31); 1258 1259 dw[1] = 1260 __gen_uint(values->CubeSurfaceControlMode, 0, 0) | 1261 __gen_uint(values->ShadowFunction, 1, 3) | 1262 __gen_ufixed(values->MaxLOD, 8, 19, 8) | 1263 __gen_ufixed(values->MinLOD, 20, 31, 8); 1264 1265 dw[2] = 1266 __gen_offset(values->BorderColorPointer, 5, 31); 1267 1268 dw[3] = 1269 __gen_uint(values->TCZAddressControlMode, 0, 2) | 1270 __gen_uint(values->TCYAddressControlMode, 3, 5) | 1271 __gen_uint(values->TCXAddressControlMode, 6, 8) | 1272 __gen_uint(values->NonnormalizedCoordinateEnable, 10, 10) | 1273 __gen_uint(values->TrilinearFilterQuality, 11, 12) | 1274 __gen_uint(values->RAddressMinFilterRoundingEnable, 13, 13) | 1275 __gen_uint(values->RAddressMagFilterRoundingEnable, 14, 14) | 1276 __gen_uint(values->VAddressMinFilterRoundingEnable, 15, 15) | 1277 __gen_uint(values->VAddressMagFilterRoundingEnable, 16, 16) | 1278 __gen_uint(values->UAddressMinFilterRoundingEnable, 17, 17) | 1279 __gen_uint(values->UAddressMagFilterRoundingEnable, 18, 18) | 1280 __gen_uint(values->MaximumAnisotropy, 19, 21) | 1281 __gen_uint(values->ChromaKeyMode, 22, 22) | 1282 __gen_uint(values->ChromaKeyIndex, 23, 24) | 1283 __gen_uint(values->ChromaKeyEnable, 25, 25); 1284} 1285 1286#define GEN75_SCISSOR_RECT_length 2 1287struct GEN75_SCISSOR_RECT { 1288 uint32_t ScissorRectangleXMin; 1289 uint32_t ScissorRectangleYMin; 1290 uint32_t ScissorRectangleXMax; 1291 uint32_t ScissorRectangleYMax; 1292}; 1293 1294static inline void 1295GEN75_SCISSOR_RECT_pack(__attribute__((unused)) __gen_user_data *data, 1296 __attribute__((unused)) void * restrict dst, 1297 __attribute__((unused)) const struct GEN75_SCISSOR_RECT * restrict values) 1298{ 1299 uint32_t * restrict dw = (uint32_t * restrict) dst; 1300 1301 dw[0] = 1302 __gen_uint(values->ScissorRectangleXMin, 0, 15) | 1303 __gen_uint(values->ScissorRectangleYMin, 16, 31); 1304 1305 dw[1] = 1306 __gen_uint(values->ScissorRectangleXMax, 0, 15) | 1307 __gen_uint(values->ScissorRectangleYMax, 16, 31); 1308} 1309 1310#define GEN75_SF_CLIP_VIEWPORT_length 16 1311struct GEN75_SF_CLIP_VIEWPORT { 1312 float ViewportMatrixElementm00; 1313 float ViewportMatrixElementm11; 1314 float ViewportMatrixElementm22; 1315 float ViewportMatrixElementm30; 1316 float ViewportMatrixElementm31; 1317 float ViewportMatrixElementm32; 1318 float XMinClipGuardband; 1319 float XMaxClipGuardband; 1320 float YMinClipGuardband; 1321 float YMaxClipGuardband; 1322}; 1323 1324static inline void 1325GEN75_SF_CLIP_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 1326 __attribute__((unused)) void * restrict dst, 1327 __attribute__((unused)) const struct GEN75_SF_CLIP_VIEWPORT * restrict values) 1328{ 1329 uint32_t * restrict dw = (uint32_t * restrict) dst; 1330 1331 dw[0] = 1332 __gen_float(values->ViewportMatrixElementm00); 1333 1334 dw[1] = 1335 __gen_float(values->ViewportMatrixElementm11); 1336 1337 dw[2] = 1338 __gen_float(values->ViewportMatrixElementm22); 1339 1340 dw[3] = 1341 __gen_float(values->ViewportMatrixElementm30); 1342 1343 dw[4] = 1344 __gen_float(values->ViewportMatrixElementm31); 1345 1346 dw[5] = 1347 __gen_float(values->ViewportMatrixElementm32); 1348 1349 dw[6] = 0; 1350 1351 dw[7] = 0; 1352 1353 dw[8] = 1354 __gen_float(values->XMinClipGuardband); 1355 1356 dw[9] = 1357 __gen_float(values->XMaxClipGuardband); 1358 1359 dw[10] = 1360 __gen_float(values->YMinClipGuardband); 1361 1362 dw[11] = 1363 __gen_float(values->YMaxClipGuardband); 1364 1365 dw[12] = 0; 1366 1367 dw[13] = 0; 1368 1369 dw[14] = 0; 1370 1371 dw[15] = 0; 1372} 1373 1374#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1 1375struct GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL { 1376 uint32_t SourceAttribute; 1377 uint32_t SwizzleSelect; 1378#define INPUTATTR 0 1379#define INPUTATTR_FACING 1 1380#define INPUTATTR_W 2 1381#define INPUTATTR_FACING_W 3 1382 uint32_t ConstantSource; 1383#define CONST_0000 0 1384#define CONST_0001_FLOAT 1 1385#define CONST_1111_FLOAT 2 1386#define PRIM_ID 3 1387 uint32_t SwizzleControlMode; 1388 bool ComponentOverrideX; 1389 bool ComponentOverrideY; 1390 bool ComponentOverrideZ; 1391 bool ComponentOverrideW; 1392}; 1393 1394static inline void 1395GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__attribute__((unused)) __gen_user_data *data, 1396 __attribute__((unused)) void * restrict dst, 1397 __attribute__((unused)) const struct GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values) 1398{ 1399 uint32_t * restrict dw = (uint32_t * restrict) dst; 1400 1401 dw[0] = 1402 __gen_uint(values->SourceAttribute, 0, 4) | 1403 __gen_uint(values->SwizzleSelect, 6, 7) | 1404 __gen_uint(values->ConstantSource, 9, 10) | 1405 __gen_uint(values->SwizzleControlMode, 11, 11) | 1406 __gen_uint(values->ComponentOverrideX, 12, 12) | 1407 __gen_uint(values->ComponentOverrideY, 13, 13) | 1408 __gen_uint(values->ComponentOverrideZ, 14, 14) | 1409 __gen_uint(values->ComponentOverrideW, 15, 15); 1410} 1411 1412#define GEN75_SO_DECL_length 1 1413struct GEN75_SO_DECL { 1414 uint32_t ComponentMask; 1415 uint32_t RegisterIndex; 1416 uint32_t HoleFlag; 1417 uint32_t OutputBufferSlot; 1418}; 1419 1420static inline void 1421GEN75_SO_DECL_pack(__attribute__((unused)) __gen_user_data *data, 1422 __attribute__((unused)) void * restrict dst, 1423 __attribute__((unused)) const struct GEN75_SO_DECL * restrict values) 1424{ 1425 uint32_t * restrict dw = (uint32_t * restrict) dst; 1426 1427 dw[0] = 1428 __gen_uint(values->ComponentMask, 0, 3) | 1429 __gen_uint(values->RegisterIndex, 4, 9) | 1430 __gen_uint(values->HoleFlag, 11, 11) | 1431 __gen_uint(values->OutputBufferSlot, 12, 13); 1432} 1433 1434#define GEN75_SO_DECL_ENTRY_length 2 1435struct GEN75_SO_DECL_ENTRY { 1436 struct GEN75_SO_DECL Stream0Decl; 1437 struct GEN75_SO_DECL Stream1Decl; 1438 struct GEN75_SO_DECL Stream2Decl; 1439 struct GEN75_SO_DECL Stream3Decl; 1440}; 1441 1442static inline void 1443GEN75_SO_DECL_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 1444 __attribute__((unused)) void * restrict dst, 1445 __attribute__((unused)) const struct GEN75_SO_DECL_ENTRY * restrict values) 1446{ 1447 uint32_t * restrict dw = (uint32_t * restrict) dst; 1448 1449 uint32_t v0_0; 1450 GEN75_SO_DECL_pack(data, &v0_0, &values->Stream0Decl); 1451 1452 uint32_t v0_1; 1453 GEN75_SO_DECL_pack(data, &v0_1, &values->Stream1Decl); 1454 1455 dw[0] = 1456 __gen_uint(v0_0, 0, 15) | 1457 __gen_uint(v0_1, 16, 31); 1458 1459 uint32_t v1_0; 1460 GEN75_SO_DECL_pack(data, &v1_0, &values->Stream2Decl); 1461 1462 uint32_t v1_1; 1463 GEN75_SO_DECL_pack(data, &v1_1, &values->Stream3Decl); 1464 1465 dw[1] = 1466 __gen_uint(v1_0, 0, 15) | 1467 __gen_uint(v1_1, 16, 31); 1468} 1469 1470#define GEN75_VERTEX_BUFFER_STATE_length 4 1471struct GEN75_VERTEX_BUFFER_STATE { 1472 uint32_t BufferPitch; 1473 bool VertexFetchInvalidate; 1474 bool NullVertexBuffer; 1475 bool AddressModifyEnable; 1476 uint32_t MOCS; 1477 uint32_t BufferAccessType; 1478#define VERTEXDATA 0 1479#define INSTANCEDATA 1 1480 uint32_t VertexBufferIndex; 1481 __gen_address_type BufferStartingAddress; 1482 __gen_address_type EndAddress; 1483 uint32_t InstanceDataStepRate; 1484}; 1485 1486static inline void 1487GEN75_VERTEX_BUFFER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1488 __attribute__((unused)) void * restrict dst, 1489 __attribute__((unused)) const struct GEN75_VERTEX_BUFFER_STATE * restrict values) 1490{ 1491 uint32_t * restrict dw = (uint32_t * restrict) dst; 1492 1493 dw[0] = 1494 __gen_uint(values->BufferPitch, 0, 11) | 1495 __gen_uint(values->VertexFetchInvalidate, 12, 12) | 1496 __gen_uint(values->NullVertexBuffer, 13, 13) | 1497 __gen_uint(values->AddressModifyEnable, 14, 14) | 1498 __gen_uint(values->MOCS, 16, 19) | 1499 __gen_uint(values->BufferAccessType, 20, 20) | 1500 __gen_uint(values->VertexBufferIndex, 26, 31); 1501 1502 dw[1] = __gen_combine_address(data, &dw[1], values->BufferStartingAddress, 0); 1503 1504 dw[2] = __gen_combine_address(data, &dw[2], values->EndAddress, 0); 1505 1506 dw[3] = 1507 __gen_uint(values->InstanceDataStepRate, 0, 31); 1508} 1509 1510#define GEN75_VERTEX_ELEMENT_STATE_length 2 1511struct GEN75_VERTEX_ELEMENT_STATE { 1512 uint32_t SourceElementOffset; 1513 bool EdgeFlagEnable; 1514 uint32_t SourceElementFormat; 1515 bool Valid; 1516 uint32_t VertexBufferIndex; 1517 enum GEN75_3D_Vertex_Component_Control Component3Control; 1518 enum GEN75_3D_Vertex_Component_Control Component2Control; 1519 enum GEN75_3D_Vertex_Component_Control Component1Control; 1520 enum GEN75_3D_Vertex_Component_Control Component0Control; 1521}; 1522 1523static inline void 1524GEN75_VERTEX_ELEMENT_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1525 __attribute__((unused)) void * restrict dst, 1526 __attribute__((unused)) const struct GEN75_VERTEX_ELEMENT_STATE * restrict values) 1527{ 1528 uint32_t * restrict dw = (uint32_t * restrict) dst; 1529 1530 dw[0] = 1531 __gen_uint(values->SourceElementOffset, 0, 11) | 1532 __gen_uint(values->EdgeFlagEnable, 15, 15) | 1533 __gen_uint(values->SourceElementFormat, 16, 24) | 1534 __gen_uint(values->Valid, 25, 25) | 1535 __gen_uint(values->VertexBufferIndex, 26, 31); 1536 1537 dw[1] = 1538 __gen_uint(values->Component3Control, 16, 18) | 1539 __gen_uint(values->Component2Control, 20, 22) | 1540 __gen_uint(values->Component1Control, 24, 26) | 1541 __gen_uint(values->Component0Control, 28, 30); 1542} 1543 1544#define GEN75_3DPRIMITIVE_length 7 1545#define GEN75_3DPRIMITIVE_length_bias 2 1546#define GEN75_3DPRIMITIVE_header \ 1547 .DWordLength = 5, \ 1548 ._3DCommandSubOpcode = 0, \ 1549 ._3DCommandOpcode = 3, \ 1550 .CommandSubType = 3, \ 1551 .CommandType = 3 1552 1553struct GEN75_3DPRIMITIVE { 1554 uint32_t DWordLength; 1555 bool PredicateEnable; 1556 bool UAVCoherencyRequired; 1557 bool IndirectParameterEnable; 1558 uint32_t _3DCommandSubOpcode; 1559 uint32_t _3DCommandOpcode; 1560 uint32_t CommandSubType; 1561 uint32_t CommandType; 1562 enum GEN75_3D_Prim_Topo_Type PrimitiveTopologyType; 1563 uint32_t VertexAccessType; 1564#define SEQUENTIAL 0 1565#define RANDOM 1 1566 bool EndOffsetEnable; 1567 uint32_t VertexCountPerInstance; 1568 uint32_t StartVertexLocation; 1569 uint32_t InstanceCount; 1570 uint32_t StartInstanceLocation; 1571 int32_t BaseVertexLocation; 1572}; 1573 1574static inline void 1575GEN75_3DPRIMITIVE_pack(__attribute__((unused)) __gen_user_data *data, 1576 __attribute__((unused)) void * restrict dst, 1577 __attribute__((unused)) const struct GEN75_3DPRIMITIVE * restrict values) 1578{ 1579 uint32_t * restrict dw = (uint32_t * restrict) dst; 1580 1581 dw[0] = 1582 __gen_uint(values->DWordLength, 0, 7) | 1583 __gen_uint(values->PredicateEnable, 8, 8) | 1584 __gen_uint(values->UAVCoherencyRequired, 9, 9) | 1585 __gen_uint(values->IndirectParameterEnable, 10, 10) | 1586 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1587 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1588 __gen_uint(values->CommandSubType, 27, 28) | 1589 __gen_uint(values->CommandType, 29, 31); 1590 1591 dw[1] = 1592 __gen_uint(values->PrimitiveTopologyType, 0, 5) | 1593 __gen_uint(values->VertexAccessType, 8, 8) | 1594 __gen_uint(values->EndOffsetEnable, 9, 9); 1595 1596 dw[2] = 1597 __gen_uint(values->VertexCountPerInstance, 0, 31); 1598 1599 dw[3] = 1600 __gen_uint(values->StartVertexLocation, 0, 31); 1601 1602 dw[4] = 1603 __gen_uint(values->InstanceCount, 0, 31); 1604 1605 dw[5] = 1606 __gen_uint(values->StartInstanceLocation, 0, 31); 1607 1608 dw[6] = 1609 __gen_sint(values->BaseVertexLocation, 0, 31); 1610} 1611 1612#define GEN75_3DSTATE_AA_LINE_PARAMETERS_length 3 1613#define GEN75_3DSTATE_AA_LINE_PARAMETERS_length_bias 2 1614#define GEN75_3DSTATE_AA_LINE_PARAMETERS_header \ 1615 .DWordLength = 1, \ 1616 ._3DCommandSubOpcode = 10, \ 1617 ._3DCommandOpcode = 1, \ 1618 .CommandSubType = 3, \ 1619 .CommandType = 3 1620 1621struct GEN75_3DSTATE_AA_LINE_PARAMETERS { 1622 uint32_t DWordLength; 1623 uint32_t _3DCommandSubOpcode; 1624 uint32_t _3DCommandOpcode; 1625 uint32_t CommandSubType; 1626 uint32_t CommandType; 1627 float AACoverageSlope; 1628 float AACoverageBias; 1629 float AACoverageEndCapSlope; 1630 float AACoverageEndCapBias; 1631}; 1632 1633static inline void 1634GEN75_3DSTATE_AA_LINE_PARAMETERS_pack(__attribute__((unused)) __gen_user_data *data, 1635 __attribute__((unused)) void * restrict dst, 1636 __attribute__((unused)) const struct GEN75_3DSTATE_AA_LINE_PARAMETERS * restrict values) 1637{ 1638 uint32_t * restrict dw = (uint32_t * restrict) dst; 1639 1640 dw[0] = 1641 __gen_uint(values->DWordLength, 0, 7) | 1642 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1643 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1644 __gen_uint(values->CommandSubType, 27, 28) | 1645 __gen_uint(values->CommandType, 29, 31); 1646 1647 dw[1] = 1648 __gen_ufixed(values->AACoverageSlope, 0, 7, 8) | 1649 __gen_ufixed(values->AACoverageBias, 16, 23, 8); 1650 1651 dw[2] = 1652 __gen_ufixed(values->AACoverageEndCapSlope, 0, 7, 8) | 1653 __gen_ufixed(values->AACoverageEndCapBias, 16, 23, 8); 1654} 1655 1656#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 2 1657#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_header\ 1658 .DWordLength = 0, \ 1659 ._3DCommandSubOpcode = 70, \ 1660 ._3DCommandOpcode = 0, \ 1661 .CommandSubType = 3, \ 1662 .CommandType = 3 1663 1664struct GEN75_3DSTATE_BINDING_TABLE_EDIT_DS { 1665 uint32_t DWordLength; 1666 uint32_t _3DCommandSubOpcode; 1667 uint32_t _3DCommandOpcode; 1668 uint32_t CommandSubType; 1669 uint32_t CommandType; 1670 uint32_t BindingTableEditTarget; 1671#define AllCores 3 1672#define Core1 2 1673#define Core0 1 1674 uint32_t BindingTableBlockClear; 1675 /* variable length fields follow */ 1676}; 1677 1678static inline void 1679GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__attribute__((unused)) __gen_user_data *data, 1680 __attribute__((unused)) void * restrict dst, 1681 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values) 1682{ 1683 uint32_t * restrict dw = (uint32_t * restrict) dst; 1684 1685 dw[0] = 1686 __gen_uint(values->DWordLength, 0, 8) | 1687 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1688 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1689 __gen_uint(values->CommandSubType, 27, 28) | 1690 __gen_uint(values->CommandType, 29, 31); 1691 1692 dw[1] = 1693 __gen_uint(values->BindingTableEditTarget, 0, 1) | 1694 __gen_uint(values->BindingTableBlockClear, 16, 31); 1695} 1696 1697#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 2 1698#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_header\ 1699 .DWordLength = 0, \ 1700 ._3DCommandSubOpcode = 68, \ 1701 ._3DCommandOpcode = 0, \ 1702 .CommandSubType = 3, \ 1703 .CommandType = 3 1704 1705struct GEN75_3DSTATE_BINDING_TABLE_EDIT_GS { 1706 uint32_t DWordLength; 1707 uint32_t _3DCommandSubOpcode; 1708 uint32_t _3DCommandOpcode; 1709 uint32_t CommandSubType; 1710 uint32_t CommandType; 1711 uint32_t BindingTableEditTarget; 1712#define AllCores 3 1713#define Core1 2 1714#define Core0 1 1715 uint32_t BindingTableBlockClear; 1716 /* variable length fields follow */ 1717}; 1718 1719static inline void 1720GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__attribute__((unused)) __gen_user_data *data, 1721 __attribute__((unused)) void * restrict dst, 1722 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values) 1723{ 1724 uint32_t * restrict dw = (uint32_t * restrict) dst; 1725 1726 dw[0] = 1727 __gen_uint(values->DWordLength, 0, 8) | 1728 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1729 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1730 __gen_uint(values->CommandSubType, 27, 28) | 1731 __gen_uint(values->CommandType, 29, 31); 1732 1733 dw[1] = 1734 __gen_uint(values->BindingTableEditTarget, 0, 1) | 1735 __gen_uint(values->BindingTableBlockClear, 16, 31); 1736} 1737 1738#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 2 1739#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_header\ 1740 .DWordLength = 0, \ 1741 ._3DCommandSubOpcode = 69, \ 1742 ._3DCommandOpcode = 0, \ 1743 .CommandSubType = 3, \ 1744 .CommandType = 3 1745 1746struct GEN75_3DSTATE_BINDING_TABLE_EDIT_HS { 1747 uint32_t DWordLength; 1748 uint32_t _3DCommandSubOpcode; 1749 uint32_t _3DCommandOpcode; 1750 uint32_t CommandSubType; 1751 uint32_t CommandType; 1752 uint32_t BindingTableEditTarget; 1753#define AllCores 3 1754#define Core1 2 1755#define Core0 1 1756 uint32_t BindingTableBlockClear; 1757 /* variable length fields follow */ 1758}; 1759 1760static inline void 1761GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__attribute__((unused)) __gen_user_data *data, 1762 __attribute__((unused)) void * restrict dst, 1763 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values) 1764{ 1765 uint32_t * restrict dw = (uint32_t * restrict) dst; 1766 1767 dw[0] = 1768 __gen_uint(values->DWordLength, 0, 8) | 1769 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1770 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1771 __gen_uint(values->CommandSubType, 27, 28) | 1772 __gen_uint(values->CommandType, 29, 31); 1773 1774 dw[1] = 1775 __gen_uint(values->BindingTableEditTarget, 0, 1) | 1776 __gen_uint(values->BindingTableBlockClear, 16, 31); 1777} 1778 1779#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 2 1780#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_header\ 1781 .DWordLength = 0, \ 1782 ._3DCommandSubOpcode = 71, \ 1783 ._3DCommandOpcode = 0, \ 1784 .CommandSubType = 3, \ 1785 .CommandType = 3 1786 1787struct GEN75_3DSTATE_BINDING_TABLE_EDIT_PS { 1788 uint32_t DWordLength; 1789 uint32_t _3DCommandSubOpcode; 1790 uint32_t _3DCommandOpcode; 1791 uint32_t CommandSubType; 1792 uint32_t CommandType; 1793 uint32_t BindingTableEditTarget; 1794#define AllCores 3 1795#define Core1 2 1796#define Core0 1 1797 uint32_t BindingTableBlockClear; 1798 /* variable length fields follow */ 1799}; 1800 1801static inline void 1802GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__attribute__((unused)) __gen_user_data *data, 1803 __attribute__((unused)) void * restrict dst, 1804 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values) 1805{ 1806 uint32_t * restrict dw = (uint32_t * restrict) dst; 1807 1808 dw[0] = 1809 __gen_uint(values->DWordLength, 0, 8) | 1810 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1811 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1812 __gen_uint(values->CommandSubType, 27, 28) | 1813 __gen_uint(values->CommandType, 29, 31); 1814 1815 dw[1] = 1816 __gen_uint(values->BindingTableEditTarget, 0, 1) | 1817 __gen_uint(values->BindingTableBlockClear, 16, 31); 1818} 1819 1820#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 2 1821#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_header\ 1822 .DWordLength = 0, \ 1823 ._3DCommandSubOpcode = 67, \ 1824 ._3DCommandOpcode = 0, \ 1825 .CommandSubType = 3, \ 1826 .CommandType = 3 1827 1828struct GEN75_3DSTATE_BINDING_TABLE_EDIT_VS { 1829 uint32_t DWordLength; 1830 uint32_t _3DCommandSubOpcode; 1831 uint32_t _3DCommandOpcode; 1832 uint32_t CommandSubType; 1833 uint32_t CommandType; 1834 uint32_t BindingTableEditTarget; 1835#define AllCores 3 1836#define Core1 2 1837#define Core0 1 1838 uint32_t BindingTableBlockClear; 1839 /* variable length fields follow */ 1840}; 1841 1842static inline void 1843GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__attribute__((unused)) __gen_user_data *data, 1844 __attribute__((unused)) void * restrict dst, 1845 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values) 1846{ 1847 uint32_t * restrict dw = (uint32_t * restrict) dst; 1848 1849 dw[0] = 1850 __gen_uint(values->DWordLength, 0, 8) | 1851 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1852 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1853 __gen_uint(values->CommandSubType, 27, 28) | 1854 __gen_uint(values->CommandType, 29, 31); 1855 1856 dw[1] = 1857 __gen_uint(values->BindingTableEditTarget, 0, 1) | 1858 __gen_uint(values->BindingTableBlockClear, 16, 31); 1859} 1860 1861#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2 1862#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 2 1863#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_header\ 1864 .DWordLength = 0, \ 1865 ._3DCommandSubOpcode = 40, \ 1866 ._3DCommandOpcode = 0, \ 1867 .CommandSubType = 3, \ 1868 .CommandType = 3 1869 1870struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS { 1871 uint32_t DWordLength; 1872 uint32_t _3DCommandSubOpcode; 1873 uint32_t _3DCommandOpcode; 1874 uint32_t CommandSubType; 1875 uint32_t CommandType; 1876 uint64_t PointertoDSBindingTable; 1877}; 1878 1879static inline void 1880GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__attribute__((unused)) __gen_user_data *data, 1881 __attribute__((unused)) void * restrict dst, 1882 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values) 1883{ 1884 uint32_t * restrict dw = (uint32_t * restrict) dst; 1885 1886 dw[0] = 1887 __gen_uint(values->DWordLength, 0, 7) | 1888 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1889 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1890 __gen_uint(values->CommandSubType, 27, 28) | 1891 __gen_uint(values->CommandType, 29, 31); 1892 1893 dw[1] = 1894 __gen_offset(values->PointertoDSBindingTable, 5, 15); 1895} 1896 1897#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2 1898#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 2 1899#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_header\ 1900 .DWordLength = 0, \ 1901 ._3DCommandSubOpcode = 41, \ 1902 ._3DCommandOpcode = 0, \ 1903 .CommandSubType = 3, \ 1904 .CommandType = 3 1905 1906struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS { 1907 uint32_t DWordLength; 1908 uint32_t _3DCommandSubOpcode; 1909 uint32_t _3DCommandOpcode; 1910 uint32_t CommandSubType; 1911 uint32_t CommandType; 1912 uint64_t PointertoGSBindingTable; 1913}; 1914 1915static inline void 1916GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__attribute__((unused)) __gen_user_data *data, 1917 __attribute__((unused)) void * restrict dst, 1918 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values) 1919{ 1920 uint32_t * restrict dw = (uint32_t * restrict) dst; 1921 1922 dw[0] = 1923 __gen_uint(values->DWordLength, 0, 7) | 1924 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1925 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1926 __gen_uint(values->CommandSubType, 27, 28) | 1927 __gen_uint(values->CommandType, 29, 31); 1928 1929 dw[1] = 1930 __gen_offset(values->PointertoGSBindingTable, 5, 15); 1931} 1932 1933#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2 1934#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 2 1935#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_header\ 1936 .DWordLength = 0, \ 1937 ._3DCommandSubOpcode = 39, \ 1938 ._3DCommandOpcode = 0, \ 1939 .CommandSubType = 3, \ 1940 .CommandType = 3 1941 1942struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS { 1943 uint32_t DWordLength; 1944 uint32_t _3DCommandSubOpcode; 1945 uint32_t _3DCommandOpcode; 1946 uint32_t CommandSubType; 1947 uint32_t CommandType; 1948 uint64_t PointertoHSBindingTable; 1949}; 1950 1951static inline void 1952GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__attribute__((unused)) __gen_user_data *data, 1953 __attribute__((unused)) void * restrict dst, 1954 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values) 1955{ 1956 uint32_t * restrict dw = (uint32_t * restrict) dst; 1957 1958 dw[0] = 1959 __gen_uint(values->DWordLength, 0, 7) | 1960 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1961 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1962 __gen_uint(values->CommandSubType, 27, 28) | 1963 __gen_uint(values->CommandType, 29, 31); 1964 1965 dw[1] = 1966 __gen_offset(values->PointertoHSBindingTable, 5, 15); 1967} 1968 1969#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2 1970#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 2 1971#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_header\ 1972 .DWordLength = 0, \ 1973 ._3DCommandSubOpcode = 42, \ 1974 ._3DCommandOpcode = 0, \ 1975 .CommandSubType = 3, \ 1976 .CommandType = 3 1977 1978struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS { 1979 uint32_t DWordLength; 1980 uint32_t _3DCommandSubOpcode; 1981 uint32_t _3DCommandOpcode; 1982 uint32_t CommandSubType; 1983 uint32_t CommandType; 1984 uint64_t PointertoPSBindingTable; 1985}; 1986 1987static inline void 1988GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__attribute__((unused)) __gen_user_data *data, 1989 __attribute__((unused)) void * restrict dst, 1990 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values) 1991{ 1992 uint32_t * restrict dw = (uint32_t * restrict) dst; 1993 1994 dw[0] = 1995 __gen_uint(values->DWordLength, 0, 7) | 1996 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1997 __gen_uint(values->_3DCommandOpcode, 24, 26) | 1998 __gen_uint(values->CommandSubType, 27, 28) | 1999 __gen_uint(values->CommandType, 29, 31); 2000 2001 dw[1] = 2002 __gen_offset(values->PointertoPSBindingTable, 5, 15); 2003} 2004 2005#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2 2006#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 2 2007#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_header\ 2008 .DWordLength = 0, \ 2009 ._3DCommandSubOpcode = 38, \ 2010 ._3DCommandOpcode = 0, \ 2011 .CommandSubType = 3, \ 2012 .CommandType = 3 2013 2014struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS { 2015 uint32_t DWordLength; 2016 uint32_t _3DCommandSubOpcode; 2017 uint32_t _3DCommandOpcode; 2018 uint32_t CommandSubType; 2019 uint32_t CommandType; 2020 uint64_t PointertoVSBindingTable; 2021}; 2022 2023static inline void 2024GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__attribute__((unused)) __gen_user_data *data, 2025 __attribute__((unused)) void * restrict dst, 2026 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values) 2027{ 2028 uint32_t * restrict dw = (uint32_t * restrict) dst; 2029 2030 dw[0] = 2031 __gen_uint(values->DWordLength, 0, 7) | 2032 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2033 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2034 __gen_uint(values->CommandSubType, 27, 28) | 2035 __gen_uint(values->CommandType, 29, 31); 2036 2037 dw[1] = 2038 __gen_offset(values->PointertoVSBindingTable, 5, 15); 2039} 2040 2041#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 3 2042#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 2 2043#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\ 2044 .DWordLength = 1, \ 2045 ._3DCommandSubOpcode = 25, \ 2046 ._3DCommandOpcode = 1, \ 2047 .CommandSubType = 3, \ 2048 .CommandType = 3 2049 2050struct GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC { 2051 uint32_t DWordLength; 2052 uint32_t _3DCommandSubOpcode; 2053 uint32_t _3DCommandOpcode; 2054 uint32_t CommandSubType; 2055 uint32_t CommandType; 2056 uint32_t MOCS; 2057 uint32_t BindingTablePoolEnable; 2058 __gen_address_type BindingTablePoolBaseAddress; 2059 __gen_address_type BindingTablePoolUpperBound; 2060}; 2061 2062static inline void 2063GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 2064 __attribute__((unused)) void * restrict dst, 2065 __attribute__((unused)) const struct GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values) 2066{ 2067 uint32_t * restrict dw = (uint32_t * restrict) dst; 2068 2069 dw[0] = 2070 __gen_uint(values->DWordLength, 0, 7) | 2071 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2072 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2073 __gen_uint(values->CommandSubType, 27, 28) | 2074 __gen_uint(values->CommandType, 29, 31); 2075 2076 const uint32_t v1 = 2077 __gen_uint(values->MOCS, 7, 10) | 2078 __gen_uint(values->BindingTablePoolEnable, 11, 11); 2079 dw[1] = __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, v1); 2080 2081 dw[2] = __gen_combine_address(data, &dw[2], values->BindingTablePoolUpperBound, 0); 2082} 2083 2084#define GEN75_3DSTATE_BLEND_STATE_POINTERS_length 2 2085#define GEN75_3DSTATE_BLEND_STATE_POINTERS_length_bias 2 2086#define GEN75_3DSTATE_BLEND_STATE_POINTERS_header\ 2087 .DWordLength = 0, \ 2088 ._3DCommandSubOpcode = 36, \ 2089 ._3DCommandOpcode = 0, \ 2090 .CommandSubType = 3, \ 2091 .CommandType = 3 2092 2093struct GEN75_3DSTATE_BLEND_STATE_POINTERS { 2094 uint32_t DWordLength; 2095 uint32_t _3DCommandSubOpcode; 2096 uint32_t _3DCommandOpcode; 2097 uint32_t CommandSubType; 2098 uint32_t CommandType; 2099 uint64_t BlendStatePointer; 2100}; 2101 2102static inline void 2103GEN75_3DSTATE_BLEND_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 2104 __attribute__((unused)) void * restrict dst, 2105 __attribute__((unused)) const struct GEN75_3DSTATE_BLEND_STATE_POINTERS * restrict values) 2106{ 2107 uint32_t * restrict dw = (uint32_t * restrict) dst; 2108 2109 dw[0] = 2110 __gen_uint(values->DWordLength, 0, 7) | 2111 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2112 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2113 __gen_uint(values->CommandSubType, 27, 28) | 2114 __gen_uint(values->CommandType, 29, 31); 2115 2116 dw[1] = 2117 __gen_mbo(0, 0) | 2118 __gen_offset(values->BlendStatePointer, 6, 31); 2119} 2120 2121#define GEN75_3DSTATE_CC_STATE_POINTERS_length 2 2122#define GEN75_3DSTATE_CC_STATE_POINTERS_length_bias 2 2123#define GEN75_3DSTATE_CC_STATE_POINTERS_header \ 2124 .DWordLength = 0, \ 2125 ._3DCommandSubOpcode = 14, \ 2126 ._3DCommandOpcode = 0, \ 2127 .CommandSubType = 3, \ 2128 .CommandType = 3 2129 2130struct GEN75_3DSTATE_CC_STATE_POINTERS { 2131 uint32_t DWordLength; 2132 uint32_t _3DCommandSubOpcode; 2133 uint32_t _3DCommandOpcode; 2134 uint32_t CommandSubType; 2135 uint32_t CommandType; 2136 uint64_t ColorCalcStatePointer; 2137}; 2138 2139static inline void 2140GEN75_3DSTATE_CC_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 2141 __attribute__((unused)) void * restrict dst, 2142 __attribute__((unused)) const struct GEN75_3DSTATE_CC_STATE_POINTERS * restrict values) 2143{ 2144 uint32_t * restrict dw = (uint32_t * restrict) dst; 2145 2146 dw[0] = 2147 __gen_uint(values->DWordLength, 0, 7) | 2148 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2149 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2150 __gen_uint(values->CommandSubType, 27, 28) | 2151 __gen_uint(values->CommandType, 29, 31); 2152 2153 dw[1] = 2154 __gen_mbo(0, 0) | 2155 __gen_offset(values->ColorCalcStatePointer, 6, 31); 2156} 2157 2158#define GEN75_3DSTATE_CHROMA_KEY_length 4 2159#define GEN75_3DSTATE_CHROMA_KEY_length_bias 2 2160#define GEN75_3DSTATE_CHROMA_KEY_header \ 2161 .DWordLength = 2, \ 2162 ._3DCommandSubOpcode = 4, \ 2163 ._3DCommandOpcode = 1, \ 2164 .CommandSubType = 3, \ 2165 .CommandType = 3 2166 2167struct GEN75_3DSTATE_CHROMA_KEY { 2168 uint32_t DWordLength; 2169 uint32_t _3DCommandSubOpcode; 2170 uint32_t _3DCommandOpcode; 2171 uint32_t CommandSubType; 2172 uint32_t CommandType; 2173 uint32_t ChromaKeyTableIndex; 2174 uint32_t ChromaKeyLowValue; 2175 uint32_t ChromaKeyHighValue; 2176}; 2177 2178static inline void 2179GEN75_3DSTATE_CHROMA_KEY_pack(__attribute__((unused)) __gen_user_data *data, 2180 __attribute__((unused)) void * restrict dst, 2181 __attribute__((unused)) const struct GEN75_3DSTATE_CHROMA_KEY * restrict values) 2182{ 2183 uint32_t * restrict dw = (uint32_t * restrict) dst; 2184 2185 dw[0] = 2186 __gen_uint(values->DWordLength, 0, 7) | 2187 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2188 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2189 __gen_uint(values->CommandSubType, 27, 28) | 2190 __gen_uint(values->CommandType, 29, 31); 2191 2192 dw[1] = 2193 __gen_uint(values->ChromaKeyTableIndex, 30, 31); 2194 2195 dw[2] = 2196 __gen_uint(values->ChromaKeyLowValue, 0, 31); 2197 2198 dw[3] = 2199 __gen_uint(values->ChromaKeyHighValue, 0, 31); 2200} 2201 2202#define GEN75_3DSTATE_CLEAR_PARAMS_length 3 2203#define GEN75_3DSTATE_CLEAR_PARAMS_length_bias 2 2204#define GEN75_3DSTATE_CLEAR_PARAMS_header \ 2205 .DWordLength = 1, \ 2206 ._3DCommandSubOpcode = 4, \ 2207 ._3DCommandOpcode = 0, \ 2208 .CommandSubType = 3, \ 2209 .CommandType = 3 2210 2211struct GEN75_3DSTATE_CLEAR_PARAMS { 2212 uint32_t DWordLength; 2213 uint32_t _3DCommandSubOpcode; 2214 uint32_t _3DCommandOpcode; 2215 uint32_t CommandSubType; 2216 uint32_t CommandType; 2217 uint32_t DepthClearValue; 2218 bool DepthClearValueValid; 2219}; 2220 2221static inline void 2222GEN75_3DSTATE_CLEAR_PARAMS_pack(__attribute__((unused)) __gen_user_data *data, 2223 __attribute__((unused)) void * restrict dst, 2224 __attribute__((unused)) const struct GEN75_3DSTATE_CLEAR_PARAMS * restrict values) 2225{ 2226 uint32_t * restrict dw = (uint32_t * restrict) dst; 2227 2228 dw[0] = 2229 __gen_uint(values->DWordLength, 0, 7) | 2230 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2231 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2232 __gen_uint(values->CommandSubType, 27, 28) | 2233 __gen_uint(values->CommandType, 29, 31); 2234 2235 dw[1] = 2236 __gen_uint(values->DepthClearValue, 0, 31); 2237 2238 dw[2] = 2239 __gen_uint(values->DepthClearValueValid, 0, 0); 2240} 2241 2242#define GEN75_3DSTATE_CLIP_length 4 2243#define GEN75_3DSTATE_CLIP_length_bias 2 2244#define GEN75_3DSTATE_CLIP_header \ 2245 .DWordLength = 2, \ 2246 ._3DCommandSubOpcode = 18, \ 2247 ._3DCommandOpcode = 0, \ 2248 .CommandSubType = 3, \ 2249 .CommandType = 3 2250 2251struct GEN75_3DSTATE_CLIP { 2252 uint32_t DWordLength; 2253 uint32_t _3DCommandSubOpcode; 2254 uint32_t _3DCommandOpcode; 2255 uint32_t CommandSubType; 2256 uint32_t CommandType; 2257 uint32_t UserClipDistanceCullTestEnableBitmask; 2258 bool StatisticsEnable; 2259 uint32_t CullMode; 2260#define CULLMODE_BOTH 0 2261#define CULLMODE_NONE 1 2262#define CULLMODE_FRONT 2 2263#define CULLMODE_BACK 3 2264 bool EarlyCullEnable; 2265 uint32_t VertexSubPixelPrecisionSelect; 2266 uint32_t FrontWinding; 2267 uint32_t TriangleFanProvokingVertexSelect; 2268#define Vertex0 0 2269#define Vertex1 1 2270#define Vertex2 2 2271 uint32_t LineStripListProvokingVertexSelect; 2272#define Vertex0 0 2273#define Vertex1 1 2274 uint32_t TriangleStripListProvokingVertexSelect; 2275#define Vertex0 0 2276#define Vertex1 1 2277#define Vertex2 2 2278 bool NonPerspectiveBarycentricEnable; 2279 bool PerspectiveDivideDisable; 2280 uint32_t ClipMode; 2281#define CLIPMODE_NORMAL 0 2282#define CLIPMODE_REJECT_ALL 3 2283#define CLIPMODE_ACCEPT_ALL 4 2284 uint32_t UserClipDistanceClipTestEnableBitmask; 2285 bool GuardbandClipTestEnable; 2286 bool ViewportZClipTestEnable; 2287 bool ViewportXYClipTestEnable; 2288 uint32_t APIMode; 2289#define APIMODE_OGL 0 2290#define APIMODE_D3D 1 2291 bool ClipEnable; 2292 uint32_t MaximumVPIndex; 2293 bool ForceZeroRTAIndexEnable; 2294 float MaximumPointWidth; 2295 float MinimumPointWidth; 2296}; 2297 2298static inline void 2299GEN75_3DSTATE_CLIP_pack(__attribute__((unused)) __gen_user_data *data, 2300 __attribute__((unused)) void * restrict dst, 2301 __attribute__((unused)) const struct GEN75_3DSTATE_CLIP * restrict values) 2302{ 2303 uint32_t * restrict dw = (uint32_t * restrict) dst; 2304 2305 dw[0] = 2306 __gen_uint(values->DWordLength, 0, 7) | 2307 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2308 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2309 __gen_uint(values->CommandSubType, 27, 28) | 2310 __gen_uint(values->CommandType, 29, 31); 2311 2312 dw[1] = 2313 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 2314 __gen_uint(values->StatisticsEnable, 10, 10) | 2315 __gen_uint(values->CullMode, 16, 17) | 2316 __gen_uint(values->EarlyCullEnable, 18, 18) | 2317 __gen_uint(values->VertexSubPixelPrecisionSelect, 19, 19) | 2318 __gen_uint(values->FrontWinding, 20, 20); 2319 2320 dw[2] = 2321 __gen_uint(values->TriangleFanProvokingVertexSelect, 0, 1) | 2322 __gen_uint(values->LineStripListProvokingVertexSelect, 2, 3) | 2323 __gen_uint(values->TriangleStripListProvokingVertexSelect, 4, 5) | 2324 __gen_uint(values->NonPerspectiveBarycentricEnable, 8, 8) | 2325 __gen_uint(values->PerspectiveDivideDisable, 9, 9) | 2326 __gen_uint(values->ClipMode, 13, 15) | 2327 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 16, 23) | 2328 __gen_uint(values->GuardbandClipTestEnable, 26, 26) | 2329 __gen_uint(values->ViewportZClipTestEnable, 27, 27) | 2330 __gen_uint(values->ViewportXYClipTestEnable, 28, 28) | 2331 __gen_uint(values->APIMode, 30, 30) | 2332 __gen_uint(values->ClipEnable, 31, 31); 2333 2334 dw[3] = 2335 __gen_uint(values->MaximumVPIndex, 0, 3) | 2336 __gen_uint(values->ForceZeroRTAIndexEnable, 5, 5) | 2337 __gen_ufixed(values->MaximumPointWidth, 6, 16, 3) | 2338 __gen_ufixed(values->MinimumPointWidth, 17, 27, 3); 2339} 2340 2341#define GEN75_3DSTATE_CONSTANT_DS_length 7 2342#define GEN75_3DSTATE_CONSTANT_DS_length_bias 2 2343#define GEN75_3DSTATE_CONSTANT_DS_header \ 2344 .DWordLength = 5, \ 2345 ._3DCommandSubOpcode = 26, \ 2346 ._3DCommandOpcode = 0, \ 2347 .CommandSubType = 3, \ 2348 .CommandType = 3 2349 2350struct GEN75_3DSTATE_CONSTANT_DS { 2351 uint32_t DWordLength; 2352 uint32_t _3DCommandSubOpcode; 2353 uint32_t _3DCommandOpcode; 2354 uint32_t CommandSubType; 2355 uint32_t CommandType; 2356 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody; 2357}; 2358 2359static inline void 2360GEN75_3DSTATE_CONSTANT_DS_pack(__attribute__((unused)) __gen_user_data *data, 2361 __attribute__((unused)) void * restrict dst, 2362 __attribute__((unused)) const struct GEN75_3DSTATE_CONSTANT_DS * restrict values) 2363{ 2364 uint32_t * restrict dw = (uint32_t * restrict) dst; 2365 2366 dw[0] = 2367 __gen_uint(values->DWordLength, 0, 7) | 2368 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2369 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2370 __gen_uint(values->CommandSubType, 27, 28) | 2371 __gen_uint(values->CommandType, 29, 31); 2372 2373 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 2374} 2375 2376#define GEN75_3DSTATE_CONSTANT_GS_length 7 2377#define GEN75_3DSTATE_CONSTANT_GS_length_bias 2 2378#define GEN75_3DSTATE_CONSTANT_GS_header \ 2379 .DWordLength = 5, \ 2380 ._3DCommandSubOpcode = 22, \ 2381 ._3DCommandOpcode = 0, \ 2382 .CommandSubType = 3, \ 2383 .CommandType = 3 2384 2385struct GEN75_3DSTATE_CONSTANT_GS { 2386 uint32_t DWordLength; 2387 uint32_t _3DCommandSubOpcode; 2388 uint32_t _3DCommandOpcode; 2389 uint32_t CommandSubType; 2390 uint32_t CommandType; 2391 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody; 2392}; 2393 2394static inline void 2395GEN75_3DSTATE_CONSTANT_GS_pack(__attribute__((unused)) __gen_user_data *data, 2396 __attribute__((unused)) void * restrict dst, 2397 __attribute__((unused)) const struct GEN75_3DSTATE_CONSTANT_GS * restrict values) 2398{ 2399 uint32_t * restrict dw = (uint32_t * restrict) dst; 2400 2401 dw[0] = 2402 __gen_uint(values->DWordLength, 0, 7) | 2403 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2404 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2405 __gen_uint(values->CommandSubType, 27, 28) | 2406 __gen_uint(values->CommandType, 29, 31); 2407 2408 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 2409} 2410 2411#define GEN75_3DSTATE_CONSTANT_HS_length 7 2412#define GEN75_3DSTATE_CONSTANT_HS_length_bias 2 2413#define GEN75_3DSTATE_CONSTANT_HS_header \ 2414 .DWordLength = 5, \ 2415 ._3DCommandSubOpcode = 25, \ 2416 ._3DCommandOpcode = 0, \ 2417 .CommandSubType = 3, \ 2418 .CommandType = 3 2419 2420struct GEN75_3DSTATE_CONSTANT_HS { 2421 uint32_t DWordLength; 2422 uint32_t _3DCommandSubOpcode; 2423 uint32_t _3DCommandOpcode; 2424 uint32_t CommandSubType; 2425 uint32_t CommandType; 2426 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody; 2427}; 2428 2429static inline void 2430GEN75_3DSTATE_CONSTANT_HS_pack(__attribute__((unused)) __gen_user_data *data, 2431 __attribute__((unused)) void * restrict dst, 2432 __attribute__((unused)) const struct GEN75_3DSTATE_CONSTANT_HS * restrict values) 2433{ 2434 uint32_t * restrict dw = (uint32_t * restrict) dst; 2435 2436 dw[0] = 2437 __gen_uint(values->DWordLength, 0, 7) | 2438 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2439 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2440 __gen_uint(values->CommandSubType, 27, 28) | 2441 __gen_uint(values->CommandType, 29, 31); 2442 2443 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 2444} 2445 2446#define GEN75_3DSTATE_CONSTANT_PS_length 7 2447#define GEN75_3DSTATE_CONSTANT_PS_length_bias 2 2448#define GEN75_3DSTATE_CONSTANT_PS_header \ 2449 .DWordLength = 5, \ 2450 ._3DCommandSubOpcode = 23, \ 2451 ._3DCommandOpcode = 0, \ 2452 .CommandSubType = 3, \ 2453 .CommandType = 3 2454 2455struct GEN75_3DSTATE_CONSTANT_PS { 2456 uint32_t DWordLength; 2457 uint32_t _3DCommandSubOpcode; 2458 uint32_t _3DCommandOpcode; 2459 uint32_t CommandSubType; 2460 uint32_t CommandType; 2461 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody; 2462}; 2463 2464static inline void 2465GEN75_3DSTATE_CONSTANT_PS_pack(__attribute__((unused)) __gen_user_data *data, 2466 __attribute__((unused)) void * restrict dst, 2467 __attribute__((unused)) const struct GEN75_3DSTATE_CONSTANT_PS * restrict values) 2468{ 2469 uint32_t * restrict dw = (uint32_t * restrict) dst; 2470 2471 dw[0] = 2472 __gen_uint(values->DWordLength, 0, 7) | 2473 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2474 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2475 __gen_uint(values->CommandSubType, 27, 28) | 2476 __gen_uint(values->CommandType, 29, 31); 2477 2478 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 2479} 2480 2481#define GEN75_3DSTATE_CONSTANT_VS_length 7 2482#define GEN75_3DSTATE_CONSTANT_VS_length_bias 2 2483#define GEN75_3DSTATE_CONSTANT_VS_header \ 2484 .DWordLength = 5, \ 2485 ._3DCommandSubOpcode = 21, \ 2486 ._3DCommandOpcode = 0, \ 2487 .CommandSubType = 3, \ 2488 .CommandType = 3 2489 2490struct GEN75_3DSTATE_CONSTANT_VS { 2491 uint32_t DWordLength; 2492 uint32_t _3DCommandSubOpcode; 2493 uint32_t _3DCommandOpcode; 2494 uint32_t CommandSubType; 2495 uint32_t CommandType; 2496 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody; 2497}; 2498 2499static inline void 2500GEN75_3DSTATE_CONSTANT_VS_pack(__attribute__((unused)) __gen_user_data *data, 2501 __attribute__((unused)) void * restrict dst, 2502 __attribute__((unused)) const struct GEN75_3DSTATE_CONSTANT_VS * restrict values) 2503{ 2504 uint32_t * restrict dw = (uint32_t * restrict) dst; 2505 2506 dw[0] = 2507 __gen_uint(values->DWordLength, 0, 7) | 2508 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2509 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2510 __gen_uint(values->CommandSubType, 27, 28) | 2511 __gen_uint(values->CommandType, 29, 31); 2512 2513 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 2514} 2515 2516#define GEN75_3DSTATE_DEPTH_BUFFER_length 7 2517#define GEN75_3DSTATE_DEPTH_BUFFER_length_bias 2 2518#define GEN75_3DSTATE_DEPTH_BUFFER_header \ 2519 .DWordLength = 5, \ 2520 ._3DCommandSubOpcode = 5, \ 2521 ._3DCommandOpcode = 0, \ 2522 .CommandSubType = 3, \ 2523 .CommandType = 3 2524 2525struct GEN75_3DSTATE_DEPTH_BUFFER { 2526 uint32_t DWordLength; 2527 uint32_t _3DCommandSubOpcode; 2528 uint32_t _3DCommandOpcode; 2529 uint32_t CommandSubType; 2530 uint32_t CommandType; 2531 uint32_t SurfacePitch; 2532 uint32_t SurfaceFormat; 2533#define D32_FLOAT 1 2534#define D24_UNORM_X8_UINT 3 2535#define D16_UNORM 5 2536 bool HierarchicalDepthBufferEnable; 2537 bool StencilWriteEnable; 2538 bool DepthWriteEnable; 2539 uint32_t SurfaceType; 2540#define SURFTYPE_1D 0 2541#define SURFTYPE_2D 1 2542#define SURFTYPE_3D 2 2543#define SURFTYPE_CUBE 3 2544#define SURFTYPE_NULL 7 2545 __gen_address_type SurfaceBaseAddress; 2546 uint32_t LOD; 2547 uint32_t Width; 2548 uint32_t Height; 2549 uint32_t MOCS; 2550 uint32_t MinimumArrayElement; 2551 uint32_t Depth; 2552#define SURFTYPE_CUBEmustbezero 0 2553 int32_t DepthCoordinateOffsetX; 2554 int32_t DepthCoordinateOffsetY; 2555 uint32_t RenderTargetViewExtent; 2556}; 2557 2558static inline void 2559GEN75_3DSTATE_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 2560 __attribute__((unused)) void * restrict dst, 2561 __attribute__((unused)) const struct GEN75_3DSTATE_DEPTH_BUFFER * restrict values) 2562{ 2563 uint32_t * restrict dw = (uint32_t * restrict) dst; 2564 2565 dw[0] = 2566 __gen_uint(values->DWordLength, 0, 7) | 2567 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2568 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2569 __gen_uint(values->CommandSubType, 27, 28) | 2570 __gen_uint(values->CommandType, 29, 31); 2571 2572 dw[1] = 2573 __gen_uint(values->SurfacePitch, 0, 17) | 2574 __gen_uint(values->SurfaceFormat, 18, 20) | 2575 __gen_uint(values->HierarchicalDepthBufferEnable, 22, 22) | 2576 __gen_uint(values->StencilWriteEnable, 27, 27) | 2577 __gen_uint(values->DepthWriteEnable, 28, 28) | 2578 __gen_uint(values->SurfaceType, 29, 31); 2579 2580 dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 2581 2582 dw[3] = 2583 __gen_uint(values->LOD, 0, 3) | 2584 __gen_uint(values->Width, 4, 17) | 2585 __gen_uint(values->Height, 18, 31); 2586 2587 dw[4] = 2588 __gen_uint(values->MOCS, 0, 3) | 2589 __gen_uint(values->MinimumArrayElement, 10, 20) | 2590 __gen_uint(values->Depth, 21, 31); 2591 2592 dw[5] = 2593 __gen_sint(values->DepthCoordinateOffsetX, 0, 15) | 2594 __gen_sint(values->DepthCoordinateOffsetY, 16, 31); 2595 2596 dw[6] = 2597 __gen_uint(values->RenderTargetViewExtent, 21, 31); 2598} 2599 2600#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 2 2601#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 2 2602#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\ 2603 .DWordLength = 0, \ 2604 ._3DCommandSubOpcode = 37, \ 2605 ._3DCommandOpcode = 0, \ 2606 .CommandSubType = 3, \ 2607 .CommandType = 3 2608 2609struct GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS { 2610 uint32_t DWordLength; 2611 uint32_t _3DCommandSubOpcode; 2612 uint32_t _3DCommandOpcode; 2613 uint32_t CommandSubType; 2614 uint32_t CommandType; 2615 uint64_t PointertoDEPTH_STENCIL_STATE; 2616}; 2617 2618static inline void 2619GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 2620 __attribute__((unused)) void * restrict dst, 2621 __attribute__((unused)) const struct GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS * restrict values) 2622{ 2623 uint32_t * restrict dw = (uint32_t * restrict) dst; 2624 2625 dw[0] = 2626 __gen_uint(values->DWordLength, 0, 7) | 2627 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2628 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2629 __gen_uint(values->CommandSubType, 27, 28) | 2630 __gen_uint(values->CommandType, 29, 31); 2631 2632 dw[1] = 2633 __gen_mbo(0, 0) | 2634 __gen_offset(values->PointertoDEPTH_STENCIL_STATE, 6, 31); 2635} 2636 2637#define GEN75_3DSTATE_DRAWING_RECTANGLE_length 4 2638#define GEN75_3DSTATE_DRAWING_RECTANGLE_length_bias 2 2639#define GEN75_3DSTATE_DRAWING_RECTANGLE_header \ 2640 .DWordLength = 2, \ 2641 ._3DCommandSubOpcode = 0, \ 2642 ._3DCommandOpcode = 1, \ 2643 .CommandSubType = 3, \ 2644 .CommandType = 3 2645 2646struct GEN75_3DSTATE_DRAWING_RECTANGLE { 2647 uint32_t DWordLength; 2648 uint32_t CoreModeSelect; 2649#define Legacy 0 2650#define Core0Enabled 1 2651#define Core1Enabled 2 2652 uint32_t _3DCommandSubOpcode; 2653 uint32_t _3DCommandOpcode; 2654 uint32_t CommandSubType; 2655 uint32_t CommandType; 2656 uint32_t ClippedDrawingRectangleXMin; 2657 uint32_t ClippedDrawingRectangleYMin; 2658 uint32_t ClippedDrawingRectangleXMax; 2659 uint32_t ClippedDrawingRectangleYMax; 2660 int32_t DrawingRectangleOriginX; 2661 int32_t DrawingRectangleOriginY; 2662}; 2663 2664static inline void 2665GEN75_3DSTATE_DRAWING_RECTANGLE_pack(__attribute__((unused)) __gen_user_data *data, 2666 __attribute__((unused)) void * restrict dst, 2667 __attribute__((unused)) const struct GEN75_3DSTATE_DRAWING_RECTANGLE * restrict values) 2668{ 2669 uint32_t * restrict dw = (uint32_t * restrict) dst; 2670 2671 dw[0] = 2672 __gen_uint(values->DWordLength, 0, 7) | 2673 __gen_uint(values->CoreModeSelect, 14, 15) | 2674 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2675 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2676 __gen_uint(values->CommandSubType, 27, 28) | 2677 __gen_uint(values->CommandType, 29, 31); 2678 2679 dw[1] = 2680 __gen_uint(values->ClippedDrawingRectangleXMin, 0, 15) | 2681 __gen_uint(values->ClippedDrawingRectangleYMin, 16, 31); 2682 2683 dw[2] = 2684 __gen_uint(values->ClippedDrawingRectangleXMax, 0, 15) | 2685 __gen_uint(values->ClippedDrawingRectangleYMax, 16, 31); 2686 2687 dw[3] = 2688 __gen_sint(values->DrawingRectangleOriginX, 0, 15) | 2689 __gen_sint(values->DrawingRectangleOriginY, 16, 31); 2690} 2691 2692#define GEN75_3DSTATE_DS_length 6 2693#define GEN75_3DSTATE_DS_length_bias 2 2694#define GEN75_3DSTATE_DS_header \ 2695 .DWordLength = 4, \ 2696 ._3DCommandSubOpcode = 29, \ 2697 ._3DCommandOpcode = 0, \ 2698 .CommandSubType = 3, \ 2699 .CommandType = 3 2700 2701struct GEN75_3DSTATE_DS { 2702 uint32_t DWordLength; 2703 uint32_t _3DCommandSubOpcode; 2704 uint32_t _3DCommandOpcode; 2705 uint32_t CommandSubType; 2706 uint32_t CommandType; 2707 uint64_t KernelStartPointer; 2708 bool SoftwareExceptionEnable; 2709 bool IllegalOpcodeExceptionEnable; 2710 bool AccessesUAV; 2711 uint32_t FloatingPointMode; 2712#define IEEE754 0 2713#define Alternate 1 2714 uint32_t ThreadDispatchPriority; 2715#define High 1 2716 uint32_t BindingTableEntryCount; 2717 uint32_t SamplerCount; 2718#define NoSamplers 0 2719#define _14Samplers 1 2720#define _58Samplers 2 2721#define _912Samplers 3 2722#define _1316Samplers 4 2723 bool VectorMaskEnable; 2724 uint32_t SingleDomainPointDispatch; 2725 uint32_t PerThreadScratchSpace; 2726 __gen_address_type ScratchSpaceBasePointer; 2727 uint32_t PatchURBEntryReadOffset; 2728 uint32_t PatchURBEntryReadLength; 2729 uint32_t DispatchGRFStartRegisterForURBData; 2730 bool Enable; 2731 bool DSCacheDisable; 2732 bool ComputeWCoordinateEnable; 2733 bool StatisticsEnable; 2734 uint32_t MaximumNumberofThreads; 2735}; 2736 2737static inline void 2738GEN75_3DSTATE_DS_pack(__attribute__((unused)) __gen_user_data *data, 2739 __attribute__((unused)) void * restrict dst, 2740 __attribute__((unused)) const struct GEN75_3DSTATE_DS * restrict values) 2741{ 2742 uint32_t * restrict dw = (uint32_t * restrict) dst; 2743 2744 dw[0] = 2745 __gen_uint(values->DWordLength, 0, 7) | 2746 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2747 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2748 __gen_uint(values->CommandSubType, 27, 28) | 2749 __gen_uint(values->CommandType, 29, 31); 2750 2751 dw[1] = 2752 __gen_offset(values->KernelStartPointer, 6, 31); 2753 2754 dw[2] = 2755 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 2756 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 2757 __gen_uint(values->AccessesUAV, 14, 14) | 2758 __gen_uint(values->FloatingPointMode, 16, 16) | 2759 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 2760 __gen_uint(values->BindingTableEntryCount, 18, 25) | 2761 __gen_uint(values->SamplerCount, 27, 29) | 2762 __gen_uint(values->VectorMaskEnable, 30, 30) | 2763 __gen_uint(values->SingleDomainPointDispatch, 31, 31); 2764 2765 const uint32_t v3 = 2766 __gen_uint(values->PerThreadScratchSpace, 0, 3); 2767 dw[3] = __gen_combine_address(data, &dw[3], values->ScratchSpaceBasePointer, v3); 2768 2769 dw[4] = 2770 __gen_uint(values->PatchURBEntryReadOffset, 4, 9) | 2771 __gen_uint(values->PatchURBEntryReadLength, 11, 17) | 2772 __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24); 2773 2774 dw[5] = 2775 __gen_uint(values->Enable, 0, 0) | 2776 __gen_uint(values->DSCacheDisable, 1, 1) | 2777 __gen_uint(values->ComputeWCoordinateEnable, 2, 2) | 2778 __gen_uint(values->StatisticsEnable, 10, 10) | 2779 __gen_uint(values->MaximumNumberofThreads, 21, 29); 2780} 2781 2782#define GEN75_3DSTATE_GATHER_CONSTANT_DS_length_bias 2 2783#define GEN75_3DSTATE_GATHER_CONSTANT_DS_header \ 2784 .DWordLength = 1, \ 2785 ._3DCommandSubOpcode = 55, \ 2786 ._3DCommandOpcode = 0, \ 2787 .CommandSubType = 3, \ 2788 .CommandType = 3 2789 2790struct GEN75_3DSTATE_GATHER_CONSTANT_DS { 2791 uint32_t DWordLength; 2792 uint32_t _3DCommandSubOpcode; 2793 uint32_t _3DCommandOpcode; 2794 uint32_t CommandSubType; 2795 uint32_t CommandType; 2796 uint32_t ConstantBufferBindingTableBlock; 2797 uint32_t ConstantBufferValid; 2798 uint64_t GatherBufferOffset; 2799 /* variable length fields follow */ 2800}; 2801 2802static inline void 2803GEN75_3DSTATE_GATHER_CONSTANT_DS_pack(__attribute__((unused)) __gen_user_data *data, 2804 __attribute__((unused)) void * restrict dst, 2805 __attribute__((unused)) const struct GEN75_3DSTATE_GATHER_CONSTANT_DS * restrict values) 2806{ 2807 uint32_t * restrict dw = (uint32_t * restrict) dst; 2808 2809 dw[0] = 2810 __gen_uint(values->DWordLength, 0, 7) | 2811 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2812 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2813 __gen_uint(values->CommandSubType, 27, 28) | 2814 __gen_uint(values->CommandType, 29, 31); 2815 2816 dw[1] = 2817 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 2818 __gen_uint(values->ConstantBufferValid, 16, 31); 2819 2820 dw[2] = 2821 __gen_offset(values->GatherBufferOffset, 6, 22); 2822} 2823 2824#define GEN75_3DSTATE_GATHER_CONSTANT_GS_length_bias 2 2825#define GEN75_3DSTATE_GATHER_CONSTANT_GS_header \ 2826 .DWordLength = 1, \ 2827 ._3DCommandSubOpcode = 53, \ 2828 ._3DCommandOpcode = 0, \ 2829 .CommandSubType = 3, \ 2830 .CommandType = 3 2831 2832struct GEN75_3DSTATE_GATHER_CONSTANT_GS { 2833 uint32_t DWordLength; 2834 uint32_t _3DCommandSubOpcode; 2835 uint32_t _3DCommandOpcode; 2836 uint32_t CommandSubType; 2837 uint32_t CommandType; 2838 uint32_t ConstantBufferBindingTableBlock; 2839 uint32_t ConstantBufferValid; 2840 uint64_t GatherBufferOffset; 2841 /* variable length fields follow */ 2842}; 2843 2844static inline void 2845GEN75_3DSTATE_GATHER_CONSTANT_GS_pack(__attribute__((unused)) __gen_user_data *data, 2846 __attribute__((unused)) void * restrict dst, 2847 __attribute__((unused)) const struct GEN75_3DSTATE_GATHER_CONSTANT_GS * restrict values) 2848{ 2849 uint32_t * restrict dw = (uint32_t * restrict) dst; 2850 2851 dw[0] = 2852 __gen_uint(values->DWordLength, 0, 7) | 2853 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2854 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2855 __gen_uint(values->CommandSubType, 27, 28) | 2856 __gen_uint(values->CommandType, 29, 31); 2857 2858 dw[1] = 2859 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 2860 __gen_uint(values->ConstantBufferValid, 16, 31); 2861 2862 dw[2] = 2863 __gen_offset(values->GatherBufferOffset, 6, 22); 2864} 2865 2866#define GEN75_3DSTATE_GATHER_CONSTANT_HS_length_bias 2 2867#define GEN75_3DSTATE_GATHER_CONSTANT_HS_header \ 2868 .DWordLength = 1, \ 2869 ._3DCommandSubOpcode = 54, \ 2870 ._3DCommandOpcode = 0, \ 2871 .CommandSubType = 3, \ 2872 .CommandType = 3 2873 2874struct GEN75_3DSTATE_GATHER_CONSTANT_HS { 2875 uint32_t DWordLength; 2876 uint32_t _3DCommandSubOpcode; 2877 uint32_t _3DCommandOpcode; 2878 uint32_t CommandSubType; 2879 uint32_t CommandType; 2880 uint32_t ConstantBufferBindingTableBlock; 2881 uint32_t ConstantBufferValid; 2882 uint64_t GatherBufferOffset; 2883 /* variable length fields follow */ 2884}; 2885 2886static inline void 2887GEN75_3DSTATE_GATHER_CONSTANT_HS_pack(__attribute__((unused)) __gen_user_data *data, 2888 __attribute__((unused)) void * restrict dst, 2889 __attribute__((unused)) const struct GEN75_3DSTATE_GATHER_CONSTANT_HS * restrict values) 2890{ 2891 uint32_t * restrict dw = (uint32_t * restrict) dst; 2892 2893 dw[0] = 2894 __gen_uint(values->DWordLength, 0, 7) | 2895 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2896 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2897 __gen_uint(values->CommandSubType, 27, 28) | 2898 __gen_uint(values->CommandType, 29, 31); 2899 2900 dw[1] = 2901 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 2902 __gen_uint(values->ConstantBufferValid, 16, 31); 2903 2904 dw[2] = 2905 __gen_offset(values->GatherBufferOffset, 6, 22); 2906} 2907 2908#define GEN75_3DSTATE_GATHER_CONSTANT_PS_length_bias 2 2909#define GEN75_3DSTATE_GATHER_CONSTANT_PS_header \ 2910 .DWordLength = 1, \ 2911 ._3DCommandSubOpcode = 56, \ 2912 ._3DCommandOpcode = 0, \ 2913 .CommandSubType = 3, \ 2914 .CommandType = 3 2915 2916struct GEN75_3DSTATE_GATHER_CONSTANT_PS { 2917 uint32_t DWordLength; 2918 uint32_t _3DCommandSubOpcode; 2919 uint32_t _3DCommandOpcode; 2920 uint32_t CommandSubType; 2921 uint32_t CommandType; 2922 uint32_t ConstantBufferBindingTableBlock; 2923 uint32_t ConstantBufferValid; 2924 bool ConstantBufferDx9Enable; 2925 uint64_t GatherBufferOffset; 2926 /* variable length fields follow */ 2927}; 2928 2929static inline void 2930GEN75_3DSTATE_GATHER_CONSTANT_PS_pack(__attribute__((unused)) __gen_user_data *data, 2931 __attribute__((unused)) void * restrict dst, 2932 __attribute__((unused)) const struct GEN75_3DSTATE_GATHER_CONSTANT_PS * restrict values) 2933{ 2934 uint32_t * restrict dw = (uint32_t * restrict) dst; 2935 2936 dw[0] = 2937 __gen_uint(values->DWordLength, 0, 7) | 2938 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2939 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2940 __gen_uint(values->CommandSubType, 27, 28) | 2941 __gen_uint(values->CommandType, 29, 31); 2942 2943 dw[1] = 2944 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 2945 __gen_uint(values->ConstantBufferValid, 16, 31); 2946 2947 dw[2] = 2948 __gen_uint(values->ConstantBufferDx9Enable, 4, 4) | 2949 __gen_offset(values->GatherBufferOffset, 6, 22); 2950} 2951 2952#define GEN75_3DSTATE_GATHER_CONSTANT_VS_length_bias 2 2953#define GEN75_3DSTATE_GATHER_CONSTANT_VS_header \ 2954 .DWordLength = 0, \ 2955 ._3DCommandSubOpcode = 52, \ 2956 ._3DCommandOpcode = 0, \ 2957 .CommandSubType = 3, \ 2958 .CommandType = 3 2959 2960struct GEN75_3DSTATE_GATHER_CONSTANT_VS { 2961 uint32_t DWordLength; 2962 uint32_t _3DCommandSubOpcode; 2963 uint32_t _3DCommandOpcode; 2964 uint32_t CommandSubType; 2965 uint32_t CommandType; 2966 uint32_t ConstantBufferBindingTableBlock; 2967 uint32_t ConstantBufferValid; 2968 bool ConstantBufferDx9Enable; 2969 uint64_t GatherBufferOffset; 2970 /* variable length fields follow */ 2971}; 2972 2973static inline void 2974GEN75_3DSTATE_GATHER_CONSTANT_VS_pack(__attribute__((unused)) __gen_user_data *data, 2975 __attribute__((unused)) void * restrict dst, 2976 __attribute__((unused)) const struct GEN75_3DSTATE_GATHER_CONSTANT_VS * restrict values) 2977{ 2978 uint32_t * restrict dw = (uint32_t * restrict) dst; 2979 2980 dw[0] = 2981 __gen_uint(values->DWordLength, 0, 7) | 2982 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2983 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2984 __gen_uint(values->CommandSubType, 27, 28) | 2985 __gen_uint(values->CommandType, 29, 31); 2986 2987 dw[1] = 2988 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 2989 __gen_uint(values->ConstantBufferValid, 16, 31); 2990 2991 dw[2] = 2992 __gen_uint(values->ConstantBufferDx9Enable, 4, 4) | 2993 __gen_offset(values->GatherBufferOffset, 6, 22); 2994} 2995 2996#define GEN75_3DSTATE_GATHER_POOL_ALLOC_length 3 2997#define GEN75_3DSTATE_GATHER_POOL_ALLOC_length_bias 2 2998#define GEN75_3DSTATE_GATHER_POOL_ALLOC_header \ 2999 .DWordLength = 1, \ 3000 ._3DCommandSubOpcode = 26, \ 3001 ._3DCommandOpcode = 1, \ 3002 .CommandSubType = 3, \ 3003 .CommandType = 3 3004 3005struct GEN75_3DSTATE_GATHER_POOL_ALLOC { 3006 uint32_t DWordLength; 3007 uint32_t _3DCommandSubOpcode; 3008 uint32_t _3DCommandOpcode; 3009 uint32_t CommandSubType; 3010 uint32_t CommandType; 3011 uint32_t MOCS; 3012 bool GatherPoolEnable; 3013 __gen_address_type GatherPoolBaseAddress; 3014 __gen_address_type GatherPoolUpperBound; 3015}; 3016 3017static inline void 3018GEN75_3DSTATE_GATHER_POOL_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 3019 __attribute__((unused)) void * restrict dst, 3020 __attribute__((unused)) const struct GEN75_3DSTATE_GATHER_POOL_ALLOC * restrict values) 3021{ 3022 uint32_t * restrict dw = (uint32_t * restrict) dst; 3023 3024 dw[0] = 3025 __gen_uint(values->DWordLength, 0, 7) | 3026 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3027 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3028 __gen_uint(values->CommandSubType, 27, 28) | 3029 __gen_uint(values->CommandType, 29, 31); 3030 3031 const uint32_t v1 = 3032 __gen_uint(values->MOCS, 0, 3) | 3033 __gen_mbo(4, 5) | 3034 __gen_uint(values->GatherPoolEnable, 11, 11); 3035 dw[1] = __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, v1); 3036 3037 dw[2] = __gen_combine_address(data, &dw[2], values->GatherPoolUpperBound, 0); 3038} 3039 3040#define GEN75_3DSTATE_GS_length 7 3041#define GEN75_3DSTATE_GS_length_bias 2 3042#define GEN75_3DSTATE_GS_header \ 3043 .DWordLength = 5, \ 3044 ._3DCommandSubOpcode = 17, \ 3045 ._3DCommandOpcode = 0, \ 3046 .CommandSubType = 3, \ 3047 .CommandType = 3 3048 3049struct GEN75_3DSTATE_GS { 3050 uint32_t DWordLength; 3051 uint32_t _3DCommandSubOpcode; 3052 uint32_t _3DCommandOpcode; 3053 uint32_t CommandSubType; 3054 uint32_t CommandType; 3055 uint64_t KernelStartPointer; 3056 bool SoftwareExceptionEnable; 3057 bool MaskStackExceptionEnable; 3058 uint32_t GSaccessesUAV; 3059 bool IllegalOpcodeExceptionEnable; 3060 uint32_t FloatingPointMode; 3061#define IEEE754 0 3062#define Alternate 1 3063 uint32_t ThreadPriority; 3064#define NormalPriority 0 3065#define HighPriority 1 3066 uint32_t BindingTableEntryCount; 3067 uint32_t SamplerCount; 3068#define NoSamplers 0 3069#define _14Samplers 1 3070#define _58Samplers 2 3071#define _912Samplers 3 3072#define _1316Samplers 4 3073 bool VectorMaskEnable; 3074 bool SingleProgramFlow; 3075 uint32_t PerThreadScratchSpace; 3076 __gen_address_type ScratchSpaceBasePointer; 3077 uint32_t DispatchGRFStartRegisterForURBData; 3078 uint32_t VertexURBEntryReadOffset; 3079 bool IncludeVertexHandles; 3080 uint32_t VertexURBEntryReadLength; 3081 enum GEN75_3D_Prim_Topo_Type OutputTopology; 3082 uint32_t OutputVertexSize; 3083 bool Enable; 3084 bool DiscardAdjacency; 3085 uint32_t ReorderMode; 3086#define LEADING 0 3087#define TRAILING 1 3088 uint32_t Hint; 3089 bool IncludePrimitiveID; 3090 uint32_t GSInvocationsIncrementValue; 3091 uint32_t StatisticsEnable; 3092 uint32_t DispatchMode; 3093#define DISPATCH_MODE_SINGLE 0 3094#define DISPATCH_MODE_DUAL_INSTANCE 1 3095#define DISPATCH_MODE_DUAL_OBJECT 2 3096 uint32_t DefaultStreamID; 3097 uint32_t InstanceControl; 3098 uint32_t ControlDataHeaderSize; 3099 uint32_t MaximumNumberofThreads; 3100 uint64_t SemaphoreHandle; 3101 uint32_t ControlDataFormat; 3102#define GSCTL_CUT 0 3103#define GSCTL_SID 1 3104}; 3105 3106static inline void 3107GEN75_3DSTATE_GS_pack(__attribute__((unused)) __gen_user_data *data, 3108 __attribute__((unused)) void * restrict dst, 3109 __attribute__((unused)) const struct GEN75_3DSTATE_GS * restrict values) 3110{ 3111 uint32_t * restrict dw = (uint32_t * restrict) dst; 3112 3113 dw[0] = 3114 __gen_uint(values->DWordLength, 0, 7) | 3115 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3116 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3117 __gen_uint(values->CommandSubType, 27, 28) | 3118 __gen_uint(values->CommandType, 29, 31); 3119 3120 dw[1] = 3121 __gen_offset(values->KernelStartPointer, 6, 31); 3122 3123 dw[2] = 3124 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 3125 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 3126 __gen_uint(values->GSaccessesUAV, 12, 12) | 3127 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 3128 __gen_uint(values->FloatingPointMode, 16, 16) | 3129 __gen_uint(values->ThreadPriority, 17, 17) | 3130 __gen_uint(values->BindingTableEntryCount, 18, 25) | 3131 __gen_uint(values->SamplerCount, 27, 29) | 3132 __gen_uint(values->VectorMaskEnable, 30, 30) | 3133 __gen_uint(values->SingleProgramFlow, 31, 31); 3134 3135 const uint32_t v3 = 3136 __gen_uint(values->PerThreadScratchSpace, 0, 3); 3137 dw[3] = __gen_combine_address(data, &dw[3], values->ScratchSpaceBasePointer, v3); 3138 3139 dw[4] = 3140 __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3) | 3141 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 3142 __gen_uint(values->IncludeVertexHandles, 10, 10) | 3143 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 3144 __gen_uint(values->OutputTopology, 17, 22) | 3145 __gen_uint(values->OutputVertexSize, 23, 28); 3146 3147 dw[5] = 3148 __gen_uint(values->Enable, 0, 0) | 3149 __gen_uint(values->DiscardAdjacency, 1, 1) | 3150 __gen_uint(values->ReorderMode, 2, 2) | 3151 __gen_uint(values->Hint, 3, 3) | 3152 __gen_uint(values->IncludePrimitiveID, 4, 4) | 3153 __gen_uint(values->GSInvocationsIncrementValue, 5, 9) | 3154 __gen_uint(values->StatisticsEnable, 10, 10) | 3155 __gen_uint(values->DispatchMode, 11, 12) | 3156 __gen_uint(values->DefaultStreamID, 13, 14) | 3157 __gen_uint(values->InstanceControl, 15, 19) | 3158 __gen_uint(values->ControlDataHeaderSize, 20, 23) | 3159 __gen_uint(values->MaximumNumberofThreads, 24, 31); 3160 3161 dw[6] = 3162 __gen_offset(values->SemaphoreHandle, 0, 12) | 3163 __gen_uint(values->ControlDataFormat, 31, 31); 3164} 3165 3166#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length 3 3167#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length_bias 2 3168#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_header \ 3169 .DWordLength = 1, \ 3170 ._3DCommandSubOpcode = 7, \ 3171 ._3DCommandOpcode = 0, \ 3172 .CommandSubType = 3, \ 3173 .CommandType = 3 3174 3175struct GEN75_3DSTATE_HIER_DEPTH_BUFFER { 3176 uint32_t DWordLength; 3177 uint32_t _3DCommandSubOpcode; 3178 uint32_t _3DCommandOpcode; 3179 uint32_t CommandSubType; 3180 uint32_t CommandType; 3181 uint32_t SurfacePitch; 3182 uint32_t MOCS; 3183 __gen_address_type SurfaceBaseAddress; 3184}; 3185 3186static inline void 3187GEN75_3DSTATE_HIER_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 3188 __attribute__((unused)) void * restrict dst, 3189 __attribute__((unused)) const struct GEN75_3DSTATE_HIER_DEPTH_BUFFER * restrict values) 3190{ 3191 uint32_t * restrict dw = (uint32_t * restrict) dst; 3192 3193 dw[0] = 3194 __gen_uint(values->DWordLength, 0, 7) | 3195 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3196 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3197 __gen_uint(values->CommandSubType, 27, 28) | 3198 __gen_uint(values->CommandType, 29, 31); 3199 3200 dw[1] = 3201 __gen_uint(values->SurfacePitch, 0, 16) | 3202 __gen_uint(values->MOCS, 25, 28); 3203 3204 dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 3205} 3206 3207#define GEN75_3DSTATE_HS_length 7 3208#define GEN75_3DSTATE_HS_length_bias 2 3209#define GEN75_3DSTATE_HS_header \ 3210 .DWordLength = 5, \ 3211 ._3DCommandSubOpcode = 27, \ 3212 ._3DCommandOpcode = 0, \ 3213 .CommandSubType = 3, \ 3214 .CommandType = 3 3215 3216struct GEN75_3DSTATE_HS { 3217 uint32_t DWordLength; 3218 uint32_t _3DCommandSubOpcode; 3219 uint32_t _3DCommandOpcode; 3220 uint32_t CommandSubType; 3221 uint32_t CommandType; 3222 uint32_t MaximumNumberofThreads; 3223 bool SoftwareExceptionEnable; 3224 bool IllegalOpcodeExceptionEnable; 3225 uint32_t FloatingPointMode; 3226#define IEEE754 0 3227#define Alternate 1 3228 uint32_t ThreadDispatchPriority; 3229#define High 1 3230 uint32_t BindingTableEntryCount; 3231 uint32_t SamplerCount; 3232#define NoSamplers 0 3233#define _14Samplers 1 3234#define _58Samplers 2 3235#define _912Samplers 3 3236#define _1316Samplers 4 3237 uint32_t InstanceCount; 3238 bool StatisticsEnable; 3239 bool Enable; 3240 uint64_t KernelStartPointer; 3241 uint32_t PerThreadScratchSpace; 3242 __gen_address_type ScratchSpaceBasePointer; 3243 uint32_t VertexURBEntryReadOffset; 3244 uint32_t VertexURBEntryReadLength; 3245 uint32_t DispatchGRFStartRegisterForURBData; 3246 bool IncludeVertexHandles; 3247 bool HSaccessesUAV; 3248 bool VectorMaskEnable; 3249 bool SingleProgramFlow; 3250 uint64_t SemaphoreHandle; 3251}; 3252 3253static inline void 3254GEN75_3DSTATE_HS_pack(__attribute__((unused)) __gen_user_data *data, 3255 __attribute__((unused)) void * restrict dst, 3256 __attribute__((unused)) const struct GEN75_3DSTATE_HS * restrict values) 3257{ 3258 uint32_t * restrict dw = (uint32_t * restrict) dst; 3259 3260 dw[0] = 3261 __gen_uint(values->DWordLength, 0, 7) | 3262 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3263 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3264 __gen_uint(values->CommandSubType, 27, 28) | 3265 __gen_uint(values->CommandType, 29, 31); 3266 3267 dw[1] = 3268 __gen_uint(values->MaximumNumberofThreads, 0, 7) | 3269 __gen_uint(values->SoftwareExceptionEnable, 12, 12) | 3270 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 3271 __gen_uint(values->FloatingPointMode, 16, 16) | 3272 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 3273 __gen_uint(values->BindingTableEntryCount, 18, 25) | 3274 __gen_uint(values->SamplerCount, 27, 29); 3275 3276 dw[2] = 3277 __gen_uint(values->InstanceCount, 0, 3) | 3278 __gen_uint(values->StatisticsEnable, 29, 29) | 3279 __gen_uint(values->Enable, 31, 31); 3280 3281 dw[3] = 3282 __gen_offset(values->KernelStartPointer, 6, 31); 3283 3284 const uint32_t v4 = 3285 __gen_uint(values->PerThreadScratchSpace, 0, 3); 3286 dw[4] = __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 3287 3288 dw[5] = 3289 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 3290 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 3291 __gen_uint(values->DispatchGRFStartRegisterForURBData, 19, 23) | 3292 __gen_uint(values->IncludeVertexHandles, 24, 24) | 3293 __gen_uint(values->HSaccessesUAV, 25, 25) | 3294 __gen_uint(values->VectorMaskEnable, 26, 26) | 3295 __gen_uint(values->SingleProgramFlow, 27, 27); 3296 3297 dw[6] = 3298 __gen_offset(values->SemaphoreHandle, 0, 12); 3299} 3300 3301#define GEN75_3DSTATE_INDEX_BUFFER_length 3 3302#define GEN75_3DSTATE_INDEX_BUFFER_length_bias 2 3303#define GEN75_3DSTATE_INDEX_BUFFER_header \ 3304 .DWordLength = 1, \ 3305 ._3DCommandSubOpcode = 10, \ 3306 ._3DCommandOpcode = 0, \ 3307 .CommandSubType = 3, \ 3308 .CommandType = 3 3309 3310struct GEN75_3DSTATE_INDEX_BUFFER { 3311 uint32_t DWordLength; 3312 uint32_t IndexFormat; 3313#define INDEX_BYTE 0 3314#define INDEX_WORD 1 3315#define INDEX_DWORD 2 3316 uint32_t MOCS; 3317 uint32_t _3DCommandSubOpcode; 3318 uint32_t _3DCommandOpcode; 3319 uint32_t CommandSubType; 3320 uint32_t CommandType; 3321 __gen_address_type BufferStartingAddress; 3322 __gen_address_type BufferEndingAddress; 3323}; 3324 3325static inline void 3326GEN75_3DSTATE_INDEX_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 3327 __attribute__((unused)) void * restrict dst, 3328 __attribute__((unused)) const struct GEN75_3DSTATE_INDEX_BUFFER * restrict values) 3329{ 3330 uint32_t * restrict dw = (uint32_t * restrict) dst; 3331 3332 dw[0] = 3333 __gen_uint(values->DWordLength, 0, 7) | 3334 __gen_uint(values->IndexFormat, 8, 9) | 3335 __gen_uint(values->MOCS, 12, 15) | 3336 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3337 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3338 __gen_uint(values->CommandSubType, 27, 28) | 3339 __gen_uint(values->CommandType, 29, 31); 3340 3341 dw[1] = __gen_combine_address(data, &dw[1], values->BufferStartingAddress, 0); 3342 3343 dw[2] = __gen_combine_address(data, &dw[2], values->BufferEndingAddress, 0); 3344} 3345 3346#define GEN75_3DSTATE_LINE_STIPPLE_length 3 3347#define GEN75_3DSTATE_LINE_STIPPLE_length_bias 2 3348#define GEN75_3DSTATE_LINE_STIPPLE_header \ 3349 .DWordLength = 1, \ 3350 ._3DCommandSubOpcode = 8, \ 3351 ._3DCommandOpcode = 1, \ 3352 .CommandSubType = 3, \ 3353 .CommandType = 3 3354 3355struct GEN75_3DSTATE_LINE_STIPPLE { 3356 uint32_t DWordLength; 3357 uint32_t _3DCommandSubOpcode; 3358 uint32_t _3DCommandOpcode; 3359 uint32_t CommandSubType; 3360 uint32_t CommandType; 3361 uint32_t LineStipplePattern; 3362 uint32_t CurrentStippleIndex; 3363 uint32_t CurrentRepeatCounter; 3364 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex; 3365 uint32_t LineStippleRepeatCount; 3366 float LineStippleInverseRepeatCount; 3367}; 3368 3369static inline void 3370GEN75_3DSTATE_LINE_STIPPLE_pack(__attribute__((unused)) __gen_user_data *data, 3371 __attribute__((unused)) void * restrict dst, 3372 __attribute__((unused)) const struct GEN75_3DSTATE_LINE_STIPPLE * restrict values) 3373{ 3374 uint32_t * restrict dw = (uint32_t * restrict) dst; 3375 3376 dw[0] = 3377 __gen_uint(values->DWordLength, 0, 7) | 3378 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3379 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3380 __gen_uint(values->CommandSubType, 27, 28) | 3381 __gen_uint(values->CommandType, 29, 31); 3382 3383 dw[1] = 3384 __gen_uint(values->LineStipplePattern, 0, 15) | 3385 __gen_uint(values->CurrentStippleIndex, 16, 19) | 3386 __gen_uint(values->CurrentRepeatCounter, 21, 29) | 3387 __gen_uint(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31); 3388 3389 dw[2] = 3390 __gen_uint(values->LineStippleRepeatCount, 0, 8) | 3391 __gen_ufixed(values->LineStippleInverseRepeatCount, 15, 31, 16); 3392} 3393 3394#define GEN75_3DSTATE_MONOFILTER_SIZE_length 2 3395#define GEN75_3DSTATE_MONOFILTER_SIZE_length_bias 2 3396#define GEN75_3DSTATE_MONOFILTER_SIZE_header \ 3397 .DWordLength = 0, \ 3398 ._3DCommandSubOpcode = 17, \ 3399 ._3DCommandOpcode = 1, \ 3400 .CommandSubType = 3, \ 3401 .CommandType = 3 3402 3403struct GEN75_3DSTATE_MONOFILTER_SIZE { 3404 uint32_t DWordLength; 3405 uint32_t _3DCommandSubOpcode; 3406 uint32_t _3DCommandOpcode; 3407 uint32_t CommandSubType; 3408 uint32_t CommandType; 3409 uint32_t MonochromeFilterHeight; 3410 uint32_t MonochromeFilterWidth; 3411}; 3412 3413static inline void 3414GEN75_3DSTATE_MONOFILTER_SIZE_pack(__attribute__((unused)) __gen_user_data *data, 3415 __attribute__((unused)) void * restrict dst, 3416 __attribute__((unused)) const struct GEN75_3DSTATE_MONOFILTER_SIZE * restrict values) 3417{ 3418 uint32_t * restrict dw = (uint32_t * restrict) dst; 3419 3420 dw[0] = 3421 __gen_uint(values->DWordLength, 0, 7) | 3422 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3423 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3424 __gen_uint(values->CommandSubType, 27, 28) | 3425 __gen_uint(values->CommandType, 29, 31); 3426 3427 dw[1] = 3428 __gen_uint(values->MonochromeFilterHeight, 0, 2) | 3429 __gen_uint(values->MonochromeFilterWidth, 3, 5); 3430} 3431 3432#define GEN75_3DSTATE_MULTISAMPLE_length 4 3433#define GEN75_3DSTATE_MULTISAMPLE_length_bias 2 3434#define GEN75_3DSTATE_MULTISAMPLE_header \ 3435 .DWordLength = 2, \ 3436 ._3DCommandSubOpcode = 13, \ 3437 ._3DCommandOpcode = 1, \ 3438 .CommandSubType = 3, \ 3439 .CommandType = 3 3440 3441struct GEN75_3DSTATE_MULTISAMPLE { 3442 uint32_t DWordLength; 3443 uint32_t _3DCommandSubOpcode; 3444 uint32_t _3DCommandOpcode; 3445 uint32_t CommandSubType; 3446 uint32_t CommandType; 3447 uint32_t NumberofMultisamples; 3448#define NUMSAMPLES_1 0 3449#define NUMSAMPLES_4 2 3450#define NUMSAMPLES_8 3 3451 uint32_t PixelLocation; 3452#define CENTER 0 3453#define UL_CORNER 1 3454 bool MultiSampleEnable; 3455 float Sample0YOffset; 3456 float Sample0XOffset; 3457 float Sample1YOffset; 3458 float Sample1XOffset; 3459 float Sample2YOffset; 3460 float Sample2XOffset; 3461 float Sample3YOffset; 3462 float Sample3XOffset; 3463 float Sample4YOffset; 3464 float Sample4XOffset; 3465 float Sample5YOffset; 3466 float Sample5XOffset; 3467 float Sample6YOffset; 3468 float Sample6XOffset; 3469 float Sample7YOffset; 3470 float Sample7XOffset; 3471}; 3472 3473static inline void 3474GEN75_3DSTATE_MULTISAMPLE_pack(__attribute__((unused)) __gen_user_data *data, 3475 __attribute__((unused)) void * restrict dst, 3476 __attribute__((unused)) const struct GEN75_3DSTATE_MULTISAMPLE * restrict values) 3477{ 3478 uint32_t * restrict dw = (uint32_t * restrict) dst; 3479 3480 dw[0] = 3481 __gen_uint(values->DWordLength, 0, 7) | 3482 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3483 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3484 __gen_uint(values->CommandSubType, 27, 28) | 3485 __gen_uint(values->CommandType, 29, 31); 3486 3487 dw[1] = 3488 __gen_uint(values->NumberofMultisamples, 1, 3) | 3489 __gen_uint(values->PixelLocation, 4, 4) | 3490 __gen_uint(values->MultiSampleEnable, 5, 5); 3491 3492 dw[2] = 3493 __gen_ufixed(values->Sample0YOffset, 0, 3, 4) | 3494 __gen_ufixed(values->Sample0XOffset, 4, 7, 4) | 3495 __gen_ufixed(values->Sample1YOffset, 8, 11, 4) | 3496 __gen_ufixed(values->Sample1XOffset, 12, 15, 4) | 3497 __gen_ufixed(values->Sample2YOffset, 16, 19, 4) | 3498 __gen_ufixed(values->Sample2XOffset, 20, 23, 4) | 3499 __gen_ufixed(values->Sample3YOffset, 24, 27, 4) | 3500 __gen_ufixed(values->Sample3XOffset, 28, 31, 4); 3501 3502 dw[3] = 3503 __gen_ufixed(values->Sample4YOffset, 0, 3, 4) | 3504 __gen_ufixed(values->Sample4XOffset, 4, 7, 4) | 3505 __gen_ufixed(values->Sample5YOffset, 8, 11, 4) | 3506 __gen_ufixed(values->Sample5XOffset, 12, 15, 4) | 3507 __gen_ufixed(values->Sample6YOffset, 16, 19, 4) | 3508 __gen_ufixed(values->Sample6XOffset, 20, 23, 4) | 3509 __gen_ufixed(values->Sample7YOffset, 24, 27, 4) | 3510 __gen_ufixed(values->Sample7XOffset, 28, 31, 4); 3511} 3512 3513#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length 2 3514#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 2 3515#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_header\ 3516 .DWordLength = 0, \ 3517 ._3DCommandSubOpcode = 6, \ 3518 ._3DCommandOpcode = 1, \ 3519 .CommandSubType = 3, \ 3520 .CommandType = 3 3521 3522struct GEN75_3DSTATE_POLY_STIPPLE_OFFSET { 3523 uint32_t DWordLength; 3524 uint32_t _3DCommandSubOpcode; 3525 uint32_t _3DCommandOpcode; 3526 uint32_t CommandSubType; 3527 uint32_t CommandType; 3528 uint32_t PolygonStippleYOffset; 3529 uint32_t PolygonStippleXOffset; 3530}; 3531 3532static inline void 3533GEN75_3DSTATE_POLY_STIPPLE_OFFSET_pack(__attribute__((unused)) __gen_user_data *data, 3534 __attribute__((unused)) void * restrict dst, 3535 __attribute__((unused)) const struct GEN75_3DSTATE_POLY_STIPPLE_OFFSET * restrict values) 3536{ 3537 uint32_t * restrict dw = (uint32_t * restrict) dst; 3538 3539 dw[0] = 3540 __gen_uint(values->DWordLength, 0, 7) | 3541 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3542 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3543 __gen_uint(values->CommandSubType, 27, 28) | 3544 __gen_uint(values->CommandType, 29, 31); 3545 3546 dw[1] = 3547 __gen_uint(values->PolygonStippleYOffset, 0, 4) | 3548 __gen_uint(values->PolygonStippleXOffset, 8, 12); 3549} 3550 3551#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length 33 3552#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 2 3553#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_header\ 3554 .DWordLength = 31, \ 3555 ._3DCommandSubOpcode = 7, \ 3556 ._3DCommandOpcode = 1, \ 3557 .CommandSubType = 3, \ 3558 .CommandType = 3 3559 3560struct GEN75_3DSTATE_POLY_STIPPLE_PATTERN { 3561 uint32_t DWordLength; 3562 uint32_t _3DCommandSubOpcode; 3563 uint32_t _3DCommandOpcode; 3564 uint32_t CommandSubType; 3565 uint32_t CommandType; 3566 uint32_t PatternRow[32]; 3567}; 3568 3569static inline void 3570GEN75_3DSTATE_POLY_STIPPLE_PATTERN_pack(__attribute__((unused)) __gen_user_data *data, 3571 __attribute__((unused)) void * restrict dst, 3572 __attribute__((unused)) const struct GEN75_3DSTATE_POLY_STIPPLE_PATTERN * restrict values) 3573{ 3574 uint32_t * restrict dw = (uint32_t * restrict) dst; 3575 3576 dw[0] = 3577 __gen_uint(values->DWordLength, 0, 7) | 3578 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3579 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3580 __gen_uint(values->CommandSubType, 27, 28) | 3581 __gen_uint(values->CommandType, 29, 31); 3582 3583 dw[1] = 3584 __gen_uint(values->PatternRow[0], 0, 31); 3585 3586 dw[2] = 3587 __gen_uint(values->PatternRow[1], 0, 31); 3588 3589 dw[3] = 3590 __gen_uint(values->PatternRow[2], 0, 31); 3591 3592 dw[4] = 3593 __gen_uint(values->PatternRow[3], 0, 31); 3594 3595 dw[5] = 3596 __gen_uint(values->PatternRow[4], 0, 31); 3597 3598 dw[6] = 3599 __gen_uint(values->PatternRow[5], 0, 31); 3600 3601 dw[7] = 3602 __gen_uint(values->PatternRow[6], 0, 31); 3603 3604 dw[8] = 3605 __gen_uint(values->PatternRow[7], 0, 31); 3606 3607 dw[9] = 3608 __gen_uint(values->PatternRow[8], 0, 31); 3609 3610 dw[10] = 3611 __gen_uint(values->PatternRow[9], 0, 31); 3612 3613 dw[11] = 3614 __gen_uint(values->PatternRow[10], 0, 31); 3615 3616 dw[12] = 3617 __gen_uint(values->PatternRow[11], 0, 31); 3618 3619 dw[13] = 3620 __gen_uint(values->PatternRow[12], 0, 31); 3621 3622 dw[14] = 3623 __gen_uint(values->PatternRow[13], 0, 31); 3624 3625 dw[15] = 3626 __gen_uint(values->PatternRow[14], 0, 31); 3627 3628 dw[16] = 3629 __gen_uint(values->PatternRow[15], 0, 31); 3630 3631 dw[17] = 3632 __gen_uint(values->PatternRow[16], 0, 31); 3633 3634 dw[18] = 3635 __gen_uint(values->PatternRow[17], 0, 31); 3636 3637 dw[19] = 3638 __gen_uint(values->PatternRow[18], 0, 31); 3639 3640 dw[20] = 3641 __gen_uint(values->PatternRow[19], 0, 31); 3642 3643 dw[21] = 3644 __gen_uint(values->PatternRow[20], 0, 31); 3645 3646 dw[22] = 3647 __gen_uint(values->PatternRow[21], 0, 31); 3648 3649 dw[23] = 3650 __gen_uint(values->PatternRow[22], 0, 31); 3651 3652 dw[24] = 3653 __gen_uint(values->PatternRow[23], 0, 31); 3654 3655 dw[25] = 3656 __gen_uint(values->PatternRow[24], 0, 31); 3657 3658 dw[26] = 3659 __gen_uint(values->PatternRow[25], 0, 31); 3660 3661 dw[27] = 3662 __gen_uint(values->PatternRow[26], 0, 31); 3663 3664 dw[28] = 3665 __gen_uint(values->PatternRow[27], 0, 31); 3666 3667 dw[29] = 3668 __gen_uint(values->PatternRow[28], 0, 31); 3669 3670 dw[30] = 3671 __gen_uint(values->PatternRow[29], 0, 31); 3672 3673 dw[31] = 3674 __gen_uint(values->PatternRow[30], 0, 31); 3675 3676 dw[32] = 3677 __gen_uint(values->PatternRow[31], 0, 31); 3678} 3679 3680#define GEN75_3DSTATE_PS_length 8 3681#define GEN75_3DSTATE_PS_length_bias 2 3682#define GEN75_3DSTATE_PS_header \ 3683 .DWordLength = 6, \ 3684 ._3DCommandSubOpcode = 32, \ 3685 ._3DCommandOpcode = 0, \ 3686 .CommandSubType = 3, \ 3687 .CommandType = 3 3688 3689struct GEN75_3DSTATE_PS { 3690 uint32_t DWordLength; 3691 uint32_t _3DCommandSubOpcode; 3692 uint32_t _3DCommandOpcode; 3693 uint32_t CommandSubType; 3694 uint32_t CommandType; 3695 uint64_t KernelStartPointer0; 3696 bool SoftwareExceptionEnable; 3697 bool MaskStackExceptionEnable; 3698 bool IllegalOpcodeExceptionEnable; 3699 uint32_t RoundingMode; 3700#define RTNE 0 3701#define RU 1 3702#define RD 2 3703#define RTZ 3 3704 uint32_t FloatingPointMode; 3705#define IEEE754 0 3706#define Alternate 1 3707 uint32_t ThreadPriority; 3708#define High 1 3709 uint32_t BindingTableEntryCount; 3710 uint32_t DenormalMode; 3711#define FTZ 0 3712#define RET 1 3713 uint32_t SamplerCount; 3714 bool VectorMaskEnable; 3715 bool SingleProgramFlow; 3716 uint32_t PerThreadScratchSpace; 3717 __gen_address_type ScratchSpaceBasePointer; 3718 bool _8PixelDispatchEnable; 3719 bool _16PixelDispatchEnable; 3720 bool _32PixelDispatchEnable; 3721 uint32_t PositionXYOffsetSelect; 3722#define POSOFFSET_NONE 0 3723#define POSOFFSET_CENTROID 2 3724#define POSOFFSET_SAMPLE 3 3725 bool PSAccessesUAV; 3726 bool RenderTargetResolveEnable; 3727 bool DualSourceBlendEnable; 3728 bool RenderTargetFastClearEnable; 3729 bool oMaskPresenttoRenderTarget; 3730 bool AttributeEnable; 3731 bool PushConstantEnable; 3732 uint32_t SampleMask; 3733 uint32_t MaximumNumberofThreads; 3734 uint32_t DispatchGRFStartRegisterForConstantSetupData2; 3735 uint32_t DispatchGRFStartRegisterForConstantSetupData1; 3736 uint32_t DispatchGRFStartRegisterForConstantSetupData0; 3737 uint64_t KernelStartPointer1; 3738 uint64_t KernelStartPointer2; 3739}; 3740 3741static inline void 3742GEN75_3DSTATE_PS_pack(__attribute__((unused)) __gen_user_data *data, 3743 __attribute__((unused)) void * restrict dst, 3744 __attribute__((unused)) const struct GEN75_3DSTATE_PS * restrict values) 3745{ 3746 uint32_t * restrict dw = (uint32_t * restrict) dst; 3747 3748 dw[0] = 3749 __gen_uint(values->DWordLength, 0, 7) | 3750 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3751 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3752 __gen_uint(values->CommandSubType, 27, 28) | 3753 __gen_uint(values->CommandType, 29, 31); 3754 3755 dw[1] = 3756 __gen_offset(values->KernelStartPointer0, 6, 31); 3757 3758 dw[2] = 3759 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 3760 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 3761 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 3762 __gen_uint(values->RoundingMode, 14, 15) | 3763 __gen_uint(values->FloatingPointMode, 16, 16) | 3764 __gen_uint(values->ThreadPriority, 17, 17) | 3765 __gen_uint(values->BindingTableEntryCount, 18, 25) | 3766 __gen_uint(values->DenormalMode, 26, 26) | 3767 __gen_uint(values->SamplerCount, 27, 29) | 3768 __gen_uint(values->VectorMaskEnable, 30, 30) | 3769 __gen_uint(values->SingleProgramFlow, 31, 31); 3770 3771 const uint32_t v3 = 3772 __gen_uint(values->PerThreadScratchSpace, 0, 3); 3773 dw[3] = __gen_combine_address(data, &dw[3], values->ScratchSpaceBasePointer, v3); 3774 3775 dw[4] = 3776 __gen_uint(values->_8PixelDispatchEnable, 0, 0) | 3777 __gen_uint(values->_16PixelDispatchEnable, 1, 1) | 3778 __gen_uint(values->_32PixelDispatchEnable, 2, 2) | 3779 __gen_uint(values->PositionXYOffsetSelect, 3, 4) | 3780 __gen_uint(values->PSAccessesUAV, 5, 5) | 3781 __gen_uint(values->RenderTargetResolveEnable, 6, 6) | 3782 __gen_uint(values->DualSourceBlendEnable, 7, 7) | 3783 __gen_uint(values->RenderTargetFastClearEnable, 8, 8) | 3784 __gen_uint(values->oMaskPresenttoRenderTarget, 9, 9) | 3785 __gen_uint(values->AttributeEnable, 10, 10) | 3786 __gen_uint(values->PushConstantEnable, 11, 11) | 3787 __gen_uint(values->SampleMask, 12, 19) | 3788 __gen_uint(values->MaximumNumberofThreads, 23, 31); 3789 3790 dw[5] = 3791 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) | 3792 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) | 3793 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22); 3794 3795 dw[6] = 3796 __gen_offset(values->KernelStartPointer1, 6, 31); 3797 3798 dw[7] = 3799 __gen_offset(values->KernelStartPointer2, 6, 31); 3800} 3801 3802#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2 3803#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 2 3804#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\ 3805 .DWordLength = 0, \ 3806 ._3DCommandSubOpcode = 20, \ 3807 ._3DCommandOpcode = 1, \ 3808 .CommandSubType = 3, \ 3809 .CommandType = 3 3810 3811struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS { 3812 uint32_t DWordLength; 3813 uint32_t _3DCommandSubOpcode; 3814 uint32_t _3DCommandOpcode; 3815 uint32_t CommandSubType; 3816 uint32_t CommandType; 3817 uint32_t ConstantBufferSize; 3818 uint32_t ConstantBufferOffset; 3819}; 3820 3821static inline void 3822GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__attribute__((unused)) __gen_user_data *data, 3823 __attribute__((unused)) void * restrict dst, 3824 __attribute__((unused)) const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values) 3825{ 3826 uint32_t * restrict dw = (uint32_t * restrict) dst; 3827 3828 dw[0] = 3829 __gen_uint(values->DWordLength, 0, 7) | 3830 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3831 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3832 __gen_uint(values->CommandSubType, 27, 28) | 3833 __gen_uint(values->CommandType, 29, 31); 3834 3835 dw[1] = 3836 __gen_uint(values->ConstantBufferSize, 0, 5) | 3837 __gen_uint(values->ConstantBufferOffset, 16, 20); 3838} 3839 3840#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2 3841#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 2 3842#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\ 3843 .DWordLength = 0, \ 3844 ._3DCommandSubOpcode = 21, \ 3845 ._3DCommandOpcode = 1, \ 3846 .CommandSubType = 3, \ 3847 .CommandType = 3 3848 3849struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS { 3850 uint32_t DWordLength; 3851 uint32_t _3DCommandSubOpcode; 3852 uint32_t _3DCommandOpcode; 3853 uint32_t CommandSubType; 3854 uint32_t CommandType; 3855 uint32_t ConstantBufferSize; 3856 uint32_t ConstantBufferOffset; 3857}; 3858 3859static inline void 3860GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__attribute__((unused)) __gen_user_data *data, 3861 __attribute__((unused)) void * restrict dst, 3862 __attribute__((unused)) const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values) 3863{ 3864 uint32_t * restrict dw = (uint32_t * restrict) dst; 3865 3866 dw[0] = 3867 __gen_uint(values->DWordLength, 0, 7) | 3868 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3869 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3870 __gen_uint(values->CommandSubType, 27, 28) | 3871 __gen_uint(values->CommandType, 29, 31); 3872 3873 dw[1] = 3874 __gen_uint(values->ConstantBufferSize, 0, 5) | 3875 __gen_uint(values->ConstantBufferOffset, 16, 20); 3876} 3877 3878#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2 3879#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 2 3880#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\ 3881 .DWordLength = 0, \ 3882 ._3DCommandSubOpcode = 19, \ 3883 ._3DCommandOpcode = 1, \ 3884 .CommandSubType = 3, \ 3885 .CommandType = 3 3886 3887struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS { 3888 uint32_t DWordLength; 3889 uint32_t _3DCommandSubOpcode; 3890 uint32_t _3DCommandOpcode; 3891 uint32_t CommandSubType; 3892 uint32_t CommandType; 3893 uint32_t ConstantBufferSize; 3894 uint32_t ConstantBufferOffset; 3895}; 3896 3897static inline void 3898GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__attribute__((unused)) __gen_user_data *data, 3899 __attribute__((unused)) void * restrict dst, 3900 __attribute__((unused)) const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values) 3901{ 3902 uint32_t * restrict dw = (uint32_t * restrict) dst; 3903 3904 dw[0] = 3905 __gen_uint(values->DWordLength, 0, 7) | 3906 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3907 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3908 __gen_uint(values->CommandSubType, 27, 28) | 3909 __gen_uint(values->CommandType, 29, 31); 3910 3911 dw[1] = 3912 __gen_uint(values->ConstantBufferSize, 0, 5) | 3913 __gen_uint(values->ConstantBufferOffset, 16, 20); 3914} 3915 3916#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2 3917#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 2 3918#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\ 3919 .DWordLength = 0, \ 3920 ._3DCommandSubOpcode = 22, \ 3921 ._3DCommandOpcode = 1, \ 3922 .CommandSubType = 3, \ 3923 .CommandType = 3 3924 3925struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS { 3926 uint32_t DWordLength; 3927 uint32_t _3DCommandSubOpcode; 3928 uint32_t _3DCommandOpcode; 3929 uint32_t CommandSubType; 3930 uint32_t CommandType; 3931 uint32_t ConstantBufferSize; 3932 uint32_t ConstantBufferOffset; 3933}; 3934 3935static inline void 3936GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__attribute__((unused)) __gen_user_data *data, 3937 __attribute__((unused)) void * restrict dst, 3938 __attribute__((unused)) const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values) 3939{ 3940 uint32_t * restrict dw = (uint32_t * restrict) dst; 3941 3942 dw[0] = 3943 __gen_uint(values->DWordLength, 0, 7) | 3944 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3945 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3946 __gen_uint(values->CommandSubType, 27, 28) | 3947 __gen_uint(values->CommandType, 29, 31); 3948 3949 dw[1] = 3950 __gen_uint(values->ConstantBufferSize, 0, 5) | 3951 __gen_uint(values->ConstantBufferOffset, 16, 20); 3952} 3953 3954#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2 3955#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 2 3956#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\ 3957 .DWordLength = 0, \ 3958 ._3DCommandSubOpcode = 18, \ 3959 ._3DCommandOpcode = 1, \ 3960 .CommandSubType = 3, \ 3961 .CommandType = 3 3962 3963struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS { 3964 uint32_t DWordLength; 3965 uint32_t _3DCommandSubOpcode; 3966 uint32_t _3DCommandOpcode; 3967 uint32_t CommandSubType; 3968 uint32_t CommandType; 3969 uint32_t ConstantBufferSize; 3970 uint32_t ConstantBufferOffset; 3971}; 3972 3973static inline void 3974GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__attribute__((unused)) __gen_user_data *data, 3975 __attribute__((unused)) void * restrict dst, 3976 __attribute__((unused)) const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values) 3977{ 3978 uint32_t * restrict dw = (uint32_t * restrict) dst; 3979 3980 dw[0] = 3981 __gen_uint(values->DWordLength, 0, 7) | 3982 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3983 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3984 __gen_uint(values->CommandSubType, 27, 28) | 3985 __gen_uint(values->CommandType, 29, 31); 3986 3987 dw[1] = 3988 __gen_uint(values->ConstantBufferSize, 0, 5) | 3989 __gen_uint(values->ConstantBufferOffset, 16, 20); 3990} 3991 3992#define GEN75_3DSTATE_RAST_MULTISAMPLE_length 6 3993#define GEN75_3DSTATE_RAST_MULTISAMPLE_length_bias 2 3994#define GEN75_3DSTATE_RAST_MULTISAMPLE_header \ 3995 .DWordLength = 4, \ 3996 ._3DCommandSubOpcode = 14, \ 3997 ._3DCommandOpcode = 1, \ 3998 .CommandSubType = 3, \ 3999 .CommandType = 3 4000 4001struct GEN75_3DSTATE_RAST_MULTISAMPLE { 4002 uint32_t DWordLength; 4003 uint32_t _3DCommandSubOpcode; 4004 uint32_t _3DCommandOpcode; 4005 uint32_t CommandSubType; 4006 uint32_t CommandType; 4007 uint32_t NumberofRasterizationMultisamples; 4008#define NRM_NUMRASTSAMPLES_1 0 4009#define NRM_NUMRASTSAMPLES_2 1 4010#define NRM_NUMRASTSAMPLES_4 2 4011#define NRM_NUMRASTSAMPLES_8 3 4012#define NRM_NUMRASTSAMPLES_16 4 4013 float Sample0YOffset; 4014 float Sample0XOffset; 4015 float Sample1YOffset; 4016 float Sample1XOffset; 4017 float Sample2YOffset; 4018 float Sample2XOffset; 4019 float Sample3YOffset; 4020 float Sample3XOffset; 4021 float Sample4YOffset; 4022 float Sample4XOffset; 4023 float Sample5YOffset; 4024 float Sample5XOffset; 4025 float Sample6YOffset; 4026 float Sample6XOffset; 4027 float Sample7YOffset; 4028 float Sample7XOffset; 4029 float Sample8YOffset; 4030 float Sample8XOffset; 4031 float Sample9YOffset; 4032 float Sample9XOffset; 4033 float Sample10YOffset; 4034 float Sample10XOffset; 4035 float Sample11YOffset; 4036 float Sample11XOffset; 4037 float Sample12YOffset; 4038 float Sample12XOffset; 4039 float Sample13YOffset; 4040 float Sample13XOffset; 4041 float Sample14YOffset; 4042 float Sample14XOffset; 4043 float Sample15YOffset; 4044 float Sample15XOffset; 4045}; 4046 4047static inline void 4048GEN75_3DSTATE_RAST_MULTISAMPLE_pack(__attribute__((unused)) __gen_user_data *data, 4049 __attribute__((unused)) void * restrict dst, 4050 __attribute__((unused)) const struct GEN75_3DSTATE_RAST_MULTISAMPLE * restrict values) 4051{ 4052 uint32_t * restrict dw = (uint32_t * restrict) dst; 4053 4054 dw[0] = 4055 __gen_uint(values->DWordLength, 0, 7) | 4056 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4057 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4058 __gen_uint(values->CommandSubType, 27, 28) | 4059 __gen_uint(values->CommandType, 29, 31); 4060 4061 dw[1] = 4062 __gen_uint(values->NumberofRasterizationMultisamples, 1, 3); 4063 4064 dw[2] = 4065 __gen_ufixed(values->Sample0YOffset, 0, 3, 4) | 4066 __gen_ufixed(values->Sample0XOffset, 4, 7, 4) | 4067 __gen_ufixed(values->Sample1YOffset, 8, 11, 4) | 4068 __gen_ufixed(values->Sample1XOffset, 12, 15, 4) | 4069 __gen_ufixed(values->Sample2YOffset, 16, 19, 4) | 4070 __gen_ufixed(values->Sample2XOffset, 20, 23, 4) | 4071 __gen_ufixed(values->Sample3YOffset, 24, 27, 4) | 4072 __gen_ufixed(values->Sample3XOffset, 28, 31, 4); 4073 4074 dw[3] = 4075 __gen_ufixed(values->Sample4YOffset, 0, 3, 4) | 4076 __gen_ufixed(values->Sample4XOffset, 4, 7, 4) | 4077 __gen_ufixed(values->Sample5YOffset, 8, 11, 4) | 4078 __gen_ufixed(values->Sample5XOffset, 12, 15, 4) | 4079 __gen_ufixed(values->Sample6YOffset, 16, 19, 4) | 4080 __gen_ufixed(values->Sample6XOffset, 20, 23, 4) | 4081 __gen_ufixed(values->Sample7YOffset, 24, 27, 4) | 4082 __gen_ufixed(values->Sample7XOffset, 28, 31, 4); 4083 4084 dw[4] = 4085 __gen_ufixed(values->Sample8YOffset, 0, 3, 4) | 4086 __gen_ufixed(values->Sample8XOffset, 4, 7, 4) | 4087 __gen_ufixed(values->Sample9YOffset, 8, 11, 4) | 4088 __gen_ufixed(values->Sample9XOffset, 12, 15, 4) | 4089 __gen_ufixed(values->Sample10YOffset, 16, 19, 4) | 4090 __gen_ufixed(values->Sample10XOffset, 20, 23, 4) | 4091 __gen_ufixed(values->Sample11YOffset, 24, 27, 4) | 4092 __gen_ufixed(values->Sample11XOffset, 28, 31, 4); 4093 4094 dw[5] = 4095 __gen_ufixed(values->Sample12YOffset, 0, 3, 4) | 4096 __gen_ufixed(values->Sample12XOffset, 4, 7, 4) | 4097 __gen_ufixed(values->Sample13YOffset, 8, 11, 4) | 4098 __gen_ufixed(values->Sample13XOffset, 12, 15, 4) | 4099 __gen_ufixed(values->Sample14YOffset, 16, 19, 4) | 4100 __gen_ufixed(values->Sample14XOffset, 20, 23, 4) | 4101 __gen_ufixed(values->Sample15YOffset, 24, 27, 4) | 4102 __gen_ufixed(values->Sample15XOffset, 28, 31, 4); 4103} 4104 4105#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 2 4106#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_header\ 4107 ._3DCommandSubOpcode = 2, \ 4108 ._3DCommandOpcode = 1, \ 4109 .CommandSubType = 3, \ 4110 .CommandType = 3 4111 4112struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0 { 4113 uint32_t DWordLength; 4114 uint32_t _3DCommandSubOpcode; 4115 uint32_t _3DCommandOpcode; 4116 uint32_t CommandSubType; 4117 uint32_t CommandType; 4118 /* variable length fields follow */ 4119}; 4120 4121static inline void 4122GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__attribute__((unused)) __gen_user_data *data, 4123 __attribute__((unused)) void * restrict dst, 4124 __attribute__((unused)) const struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values) 4125{ 4126 uint32_t * restrict dw = (uint32_t * restrict) dst; 4127 4128 dw[0] = 4129 __gen_uint(values->DWordLength, 0, 7) | 4130 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4131 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4132 __gen_uint(values->CommandSubType, 27, 28) | 4133 __gen_uint(values->CommandType, 29, 31); 4134} 4135 4136#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 2 4137#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_header\ 4138 .DWordLength = 0, \ 4139 ._3DCommandSubOpcode = 12, \ 4140 ._3DCommandOpcode = 1, \ 4141 .CommandSubType = 3, \ 4142 .CommandType = 3 4143 4144struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1 { 4145 uint32_t DWordLength; 4146 uint32_t _3DCommandSubOpcode; 4147 uint32_t _3DCommandOpcode; 4148 uint32_t CommandSubType; 4149 uint32_t CommandType; 4150 /* variable length fields follow */ 4151}; 4152 4153static inline void 4154GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__attribute__((unused)) __gen_user_data *data, 4155 __attribute__((unused)) void * restrict dst, 4156 __attribute__((unused)) const struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values) 4157{ 4158 uint32_t * restrict dw = (uint32_t * restrict) dst; 4159 4160 dw[0] = 4161 __gen_uint(values->DWordLength, 0, 7) | 4162 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4163 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4164 __gen_uint(values->CommandSubType, 27, 28) | 4165 __gen_uint(values->CommandType, 29, 31); 4166} 4167 4168#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2 4169#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 2 4170#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\ 4171 .DWordLength = 0, \ 4172 ._3DCommandSubOpcode = 45, \ 4173 ._3DCommandOpcode = 0, \ 4174 .CommandSubType = 3, \ 4175 .CommandType = 3 4176 4177struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS { 4178 uint32_t DWordLength; 4179 uint32_t _3DCommandSubOpcode; 4180 uint32_t _3DCommandOpcode; 4181 uint32_t CommandSubType; 4182 uint32_t CommandType; 4183 uint64_t PointertoDSSamplerState; 4184}; 4185 4186static inline void 4187GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__attribute__((unused)) __gen_user_data *data, 4188 __attribute__((unused)) void * restrict dst, 4189 __attribute__((unused)) const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values) 4190{ 4191 uint32_t * restrict dw = (uint32_t * restrict) dst; 4192 4193 dw[0] = 4194 __gen_uint(values->DWordLength, 0, 7) | 4195 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4196 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4197 __gen_uint(values->CommandSubType, 27, 28) | 4198 __gen_uint(values->CommandType, 29, 31); 4199 4200 dw[1] = 4201 __gen_offset(values->PointertoDSSamplerState, 5, 31); 4202} 4203 4204#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2 4205#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 2 4206#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\ 4207 .DWordLength = 0, \ 4208 ._3DCommandSubOpcode = 46, \ 4209 ._3DCommandOpcode = 0, \ 4210 .CommandSubType = 3, \ 4211 .CommandType = 3 4212 4213struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS { 4214 uint32_t DWordLength; 4215 uint32_t _3DCommandSubOpcode; 4216 uint32_t _3DCommandOpcode; 4217 uint32_t CommandSubType; 4218 uint32_t CommandType; 4219 uint64_t PointertoGSSamplerState; 4220}; 4221 4222static inline void 4223GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__attribute__((unused)) __gen_user_data *data, 4224 __attribute__((unused)) void * restrict dst, 4225 __attribute__((unused)) const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values) 4226{ 4227 uint32_t * restrict dw = (uint32_t * restrict) dst; 4228 4229 dw[0] = 4230 __gen_uint(values->DWordLength, 0, 7) | 4231 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4232 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4233 __gen_uint(values->CommandSubType, 27, 28) | 4234 __gen_uint(values->CommandType, 29, 31); 4235 4236 dw[1] = 4237 __gen_offset(values->PointertoGSSamplerState, 5, 31); 4238} 4239 4240#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2 4241#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 2 4242#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\ 4243 .DWordLength = 0, \ 4244 ._3DCommandSubOpcode = 44, \ 4245 ._3DCommandOpcode = 0, \ 4246 .CommandSubType = 3, \ 4247 .CommandType = 3 4248 4249struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS { 4250 uint32_t DWordLength; 4251 uint32_t _3DCommandSubOpcode; 4252 uint32_t _3DCommandOpcode; 4253 uint32_t CommandSubType; 4254 uint32_t CommandType; 4255 uint64_t PointertoHSSamplerState; 4256}; 4257 4258static inline void 4259GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__attribute__((unused)) __gen_user_data *data, 4260 __attribute__((unused)) void * restrict dst, 4261 __attribute__((unused)) const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values) 4262{ 4263 uint32_t * restrict dw = (uint32_t * restrict) dst; 4264 4265 dw[0] = 4266 __gen_uint(values->DWordLength, 0, 7) | 4267 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4268 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4269 __gen_uint(values->CommandSubType, 27, 28) | 4270 __gen_uint(values->CommandType, 29, 31); 4271 4272 dw[1] = 4273 __gen_offset(values->PointertoHSSamplerState, 5, 31); 4274} 4275 4276#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2 4277#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 2 4278#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\ 4279 .DWordLength = 0, \ 4280 ._3DCommandSubOpcode = 47, \ 4281 ._3DCommandOpcode = 0, \ 4282 .CommandSubType = 3, \ 4283 .CommandType = 3 4284 4285struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS { 4286 uint32_t DWordLength; 4287 uint32_t _3DCommandSubOpcode; 4288 uint32_t _3DCommandOpcode; 4289 uint32_t CommandSubType; 4290 uint32_t CommandType; 4291 uint64_t PointertoPSSamplerState; 4292}; 4293 4294static inline void 4295GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__attribute__((unused)) __gen_user_data *data, 4296 __attribute__((unused)) void * restrict dst, 4297 __attribute__((unused)) const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values) 4298{ 4299 uint32_t * restrict dw = (uint32_t * restrict) dst; 4300 4301 dw[0] = 4302 __gen_uint(values->DWordLength, 0, 7) | 4303 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4304 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4305 __gen_uint(values->CommandSubType, 27, 28) | 4306 __gen_uint(values->CommandType, 29, 31); 4307 4308 dw[1] = 4309 __gen_offset(values->PointertoPSSamplerState, 5, 31); 4310} 4311 4312#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2 4313#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 2 4314#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\ 4315 .DWordLength = 0, \ 4316 ._3DCommandSubOpcode = 43, \ 4317 ._3DCommandOpcode = 0, \ 4318 .CommandSubType = 3, \ 4319 .CommandType = 3 4320 4321struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS { 4322 uint32_t DWordLength; 4323 uint32_t _3DCommandSubOpcode; 4324 uint32_t _3DCommandOpcode; 4325 uint32_t CommandSubType; 4326 uint32_t CommandType; 4327 uint64_t PointertoVSSamplerState; 4328}; 4329 4330static inline void 4331GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__attribute__((unused)) __gen_user_data *data, 4332 __attribute__((unused)) void * restrict dst, 4333 __attribute__((unused)) const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values) 4334{ 4335 uint32_t * restrict dw = (uint32_t * restrict) dst; 4336 4337 dw[0] = 4338 __gen_uint(values->DWordLength, 0, 7) | 4339 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4340 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4341 __gen_uint(values->CommandSubType, 27, 28) | 4342 __gen_uint(values->CommandType, 29, 31); 4343 4344 dw[1] = 4345 __gen_offset(values->PointertoVSSamplerState, 5, 31); 4346} 4347 4348#define GEN75_3DSTATE_SAMPLE_MASK_length 2 4349#define GEN75_3DSTATE_SAMPLE_MASK_length_bias 2 4350#define GEN75_3DSTATE_SAMPLE_MASK_header \ 4351 .DWordLength = 0, \ 4352 ._3DCommandSubOpcode = 24, \ 4353 ._3DCommandOpcode = 0, \ 4354 .CommandSubType = 3, \ 4355 .CommandType = 3 4356 4357struct GEN75_3DSTATE_SAMPLE_MASK { 4358 uint32_t DWordLength; 4359 uint32_t _3DCommandSubOpcode; 4360 uint32_t _3DCommandOpcode; 4361 uint32_t CommandSubType; 4362 uint32_t CommandType; 4363 uint32_t SampleMask; 4364}; 4365 4366static inline void 4367GEN75_3DSTATE_SAMPLE_MASK_pack(__attribute__((unused)) __gen_user_data *data, 4368 __attribute__((unused)) void * restrict dst, 4369 __attribute__((unused)) const struct GEN75_3DSTATE_SAMPLE_MASK * restrict values) 4370{ 4371 uint32_t * restrict dw = (uint32_t * restrict) dst; 4372 4373 dw[0] = 4374 __gen_uint(values->DWordLength, 0, 7) | 4375 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4376 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4377 __gen_uint(values->CommandSubType, 27, 28) | 4378 __gen_uint(values->CommandType, 29, 31); 4379 4380 dw[1] = 4381 __gen_uint(values->SampleMask, 0, 7); 4382} 4383 4384#define GEN75_3DSTATE_SBE_length 14 4385#define GEN75_3DSTATE_SBE_length_bias 2 4386#define GEN75_3DSTATE_SBE_header \ 4387 .DWordLength = 12, \ 4388 ._3DCommandSubOpcode = 31, \ 4389 ._3DCommandOpcode = 0, \ 4390 .CommandSubType = 3, \ 4391 .CommandType = 3 4392 4393struct GEN75_3DSTATE_SBE { 4394 uint32_t DWordLength; 4395 uint32_t _3DCommandSubOpcode; 4396 uint32_t _3DCommandOpcode; 4397 uint32_t CommandSubType; 4398 uint32_t CommandType; 4399 uint32_t VertexURBEntryReadOffset; 4400 uint32_t VertexURBEntryReadLength; 4401 uint32_t PointSpriteTextureCoordinateOrigin; 4402#define UPPERLEFT 0 4403#define LOWERLEFT 1 4404 bool AttributeSwizzleEnable; 4405 uint32_t NumberofSFOutputAttributes; 4406 uint32_t AttributeSwizzleControlMode; 4407 struct GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute[16]; 4408 uint32_t PointSpriteTextureCoordinateEnable; 4409 uint32_t ConstantInterpolationEnable; 4410 uint32_t Attribute0WrapShortestEnables; 4411 uint32_t Attribute1WrapShortestEnables; 4412 uint32_t Attribute2WrapShortestEnables; 4413 uint32_t Attribute3WrapShortestEnables; 4414 uint32_t Attribute4WrapShortestEnables; 4415 uint32_t Attribute5WrapShortestEnables; 4416 uint32_t Attribute6WrapShortestEnables; 4417 uint32_t Attribute7WrapShortestEnables; 4418 uint32_t Attribute8WrapShortestEnables; 4419 uint32_t Attribute9WrapShortestEnables; 4420 uint32_t Attribute10WrapShortestEnables; 4421 uint32_t Attribute11WrapShortestEnables; 4422 uint32_t Attribute12WrapShortestEnables; 4423 uint32_t Attribute13WrapShortestEnables; 4424 uint32_t Attribute14WrapShortestEnables; 4425 uint32_t Attribute15WrapShortestEnables; 4426}; 4427 4428static inline void 4429GEN75_3DSTATE_SBE_pack(__attribute__((unused)) __gen_user_data *data, 4430 __attribute__((unused)) void * restrict dst, 4431 __attribute__((unused)) const struct GEN75_3DSTATE_SBE * restrict values) 4432{ 4433 uint32_t * restrict dw = (uint32_t * restrict) dst; 4434 4435 dw[0] = 4436 __gen_uint(values->DWordLength, 0, 7) | 4437 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4438 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4439 __gen_uint(values->CommandSubType, 27, 28) | 4440 __gen_uint(values->CommandType, 29, 31); 4441 4442 dw[1] = 4443 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 4444 __gen_uint(values->VertexURBEntryReadLength, 11, 15) | 4445 __gen_uint(values->PointSpriteTextureCoordinateOrigin, 20, 20) | 4446 __gen_uint(values->AttributeSwizzleEnable, 21, 21) | 4447 __gen_uint(values->NumberofSFOutputAttributes, 22, 27) | 4448 __gen_uint(values->AttributeSwizzleControlMode, 28, 28); 4449 4450 uint32_t v2_0; 4451 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v2_0, &values->Attribute[0]); 4452 4453 uint32_t v2_1; 4454 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v2_1, &values->Attribute[1]); 4455 4456 dw[2] = 4457 __gen_uint(v2_0, 0, 15) | 4458 __gen_uint(v2_1, 16, 31); 4459 4460 uint32_t v3_0; 4461 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v3_0, &values->Attribute[2]); 4462 4463 uint32_t v3_1; 4464 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v3_1, &values->Attribute[3]); 4465 4466 dw[3] = 4467 __gen_uint(v3_0, 0, 15) | 4468 __gen_uint(v3_1, 16, 31); 4469 4470 uint32_t v4_0; 4471 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v4_0, &values->Attribute[4]); 4472 4473 uint32_t v4_1; 4474 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v4_1, &values->Attribute[5]); 4475 4476 dw[4] = 4477 __gen_uint(v4_0, 0, 15) | 4478 __gen_uint(v4_1, 16, 31); 4479 4480 uint32_t v5_0; 4481 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v5_0, &values->Attribute[6]); 4482 4483 uint32_t v5_1; 4484 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v5_1, &values->Attribute[7]); 4485 4486 dw[5] = 4487 __gen_uint(v5_0, 0, 15) | 4488 __gen_uint(v5_1, 16, 31); 4489 4490 uint32_t v6_0; 4491 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v6_0, &values->Attribute[8]); 4492 4493 uint32_t v6_1; 4494 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v6_1, &values->Attribute[9]); 4495 4496 dw[6] = 4497 __gen_uint(v6_0, 0, 15) | 4498 __gen_uint(v6_1, 16, 31); 4499 4500 uint32_t v7_0; 4501 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v7_0, &values->Attribute[10]); 4502 4503 uint32_t v7_1; 4504 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v7_1, &values->Attribute[11]); 4505 4506 dw[7] = 4507 __gen_uint(v7_0, 0, 15) | 4508 __gen_uint(v7_1, 16, 31); 4509 4510 uint32_t v8_0; 4511 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v8_0, &values->Attribute[12]); 4512 4513 uint32_t v8_1; 4514 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v8_1, &values->Attribute[13]); 4515 4516 dw[8] = 4517 __gen_uint(v8_0, 0, 15) | 4518 __gen_uint(v8_1, 16, 31); 4519 4520 uint32_t v9_0; 4521 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v9_0, &values->Attribute[14]); 4522 4523 uint32_t v9_1; 4524 GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v9_1, &values->Attribute[15]); 4525 4526 dw[9] = 4527 __gen_uint(v9_0, 0, 15) | 4528 __gen_uint(v9_1, 16, 31); 4529 4530 dw[10] = 4531 __gen_uint(values->PointSpriteTextureCoordinateEnable, 0, 31); 4532 4533 dw[11] = 4534 __gen_uint(values->ConstantInterpolationEnable, 0, 31); 4535 4536 dw[12] = 4537 __gen_uint(values->Attribute0WrapShortestEnables, 0, 3) | 4538 __gen_uint(values->Attribute1WrapShortestEnables, 4, 7) | 4539 __gen_uint(values->Attribute2WrapShortestEnables, 8, 11) | 4540 __gen_uint(values->Attribute3WrapShortestEnables, 12, 15) | 4541 __gen_uint(values->Attribute4WrapShortestEnables, 16, 19) | 4542 __gen_uint(values->Attribute5WrapShortestEnables, 20, 23) | 4543 __gen_uint(values->Attribute6WrapShortestEnables, 24, 27) | 4544 __gen_uint(values->Attribute7WrapShortestEnables, 28, 31); 4545 4546 dw[13] = 4547 __gen_uint(values->Attribute8WrapShortestEnables, 0, 3) | 4548 __gen_uint(values->Attribute9WrapShortestEnables, 4, 7) | 4549 __gen_uint(values->Attribute10WrapShortestEnables, 8, 11) | 4550 __gen_uint(values->Attribute11WrapShortestEnables, 12, 15) | 4551 __gen_uint(values->Attribute12WrapShortestEnables, 16, 19) | 4552 __gen_uint(values->Attribute13WrapShortestEnables, 20, 23) | 4553 __gen_uint(values->Attribute14WrapShortestEnables, 24, 27) | 4554 __gen_uint(values->Attribute15WrapShortestEnables, 28, 31); 4555} 4556 4557#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length 2 4558#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 2 4559#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_header\ 4560 .DWordLength = 0, \ 4561 ._3DCommandSubOpcode = 15, \ 4562 ._3DCommandOpcode = 0, \ 4563 .CommandSubType = 3, \ 4564 .CommandType = 3 4565 4566struct GEN75_3DSTATE_SCISSOR_STATE_POINTERS { 4567 uint32_t DWordLength; 4568 uint32_t _3DCommandSubOpcode; 4569 uint32_t _3DCommandOpcode; 4570 uint32_t CommandSubType; 4571 uint32_t CommandType; 4572 uint64_t ScissorRectPointer; 4573}; 4574 4575static inline void 4576GEN75_3DSTATE_SCISSOR_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 4577 __attribute__((unused)) void * restrict dst, 4578 __attribute__((unused)) const struct GEN75_3DSTATE_SCISSOR_STATE_POINTERS * restrict values) 4579{ 4580 uint32_t * restrict dw = (uint32_t * restrict) dst; 4581 4582 dw[0] = 4583 __gen_uint(values->DWordLength, 0, 7) | 4584 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4585 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4586 __gen_uint(values->CommandSubType, 27, 28) | 4587 __gen_uint(values->CommandType, 29, 31); 4588 4589 dw[1] = 4590 __gen_offset(values->ScissorRectPointer, 5, 31); 4591} 4592 4593#define GEN75_3DSTATE_SF_length 7 4594#define GEN75_3DSTATE_SF_length_bias 2 4595#define GEN75_3DSTATE_SF_header \ 4596 .DWordLength = 5, \ 4597 ._3DCommandSubOpcode = 19, \ 4598 ._3DCommandOpcode = 0, \ 4599 .CommandSubType = 3, \ 4600 .CommandType = 3 4601 4602struct GEN75_3DSTATE_SF { 4603 uint32_t DWordLength; 4604 uint32_t _3DCommandSubOpcode; 4605 uint32_t _3DCommandOpcode; 4606 uint32_t CommandSubType; 4607 uint32_t CommandType; 4608 uint32_t FrontWinding; 4609 bool ViewportTransformEnable; 4610 uint32_t BackFaceFillMode; 4611#define FILL_MODE_SOLID 0 4612#define FILL_MODE_WIREFRAME 1 4613#define FILL_MODE_POINT 2 4614 uint32_t FrontFaceFillMode; 4615#define FILL_MODE_SOLID 0 4616#define FILL_MODE_WIREFRAME 1 4617#define FILL_MODE_POINT 2 4618 bool GlobalDepthOffsetEnablePoint; 4619 bool GlobalDepthOffsetEnableWireframe; 4620 bool GlobalDepthOffsetEnableSolid; 4621 bool StatisticsEnable; 4622 bool LegacyGlobalDepthBiasEnable; 4623 uint32_t DepthBufferSurfaceFormat; 4624#define D32_FLOAT_S8X24_UINT 0 4625#define D32_FLOAT 1 4626#define D24_UNORM_S8_UINT 2 4627#define D24_UNORM_X8_UINT 3 4628#define D16_UNORM 5 4629 uint32_t MultisampleRasterizationMode; 4630 bool RTIndependentRasterizationEnable; 4631 bool ScissorRectangleEnable; 4632 bool LineStippleEnable; 4633 uint32_t LineEndCapAntialiasingRegionWidth; 4634#define _05pixels 0 4635#define _10pixels 1 4636#define _20pixels 2 4637#define _40pixels 3 4638 float LineWidth; 4639 uint32_t CullMode; 4640#define CULLMODE_BOTH 0 4641#define CULLMODE_NONE 1 4642#define CULLMODE_FRONT 2 4643#define CULLMODE_BACK 3 4644 bool AntiAliasingEnable; 4645 float PointWidth; 4646 uint32_t PointWidthSource; 4647#define Vertex 0 4648#define State 1 4649 uint32_t VertexSubPixelPrecisionSelect; 4650#define _8Bit 0 4651#define _4Bit 1 4652 uint32_t AALineDistanceMode; 4653#define AALINEDISTANCE_TRUE 1 4654 uint32_t TriangleFanProvokingVertexSelect; 4655#define Vertex0 0 4656#define Vertex1 1 4657#define Vertex2 2 4658 uint32_t LineStripListProvokingVertexSelect; 4659 uint32_t TriangleStripListProvokingVertexSelect; 4660#define Vertex0 0 4661#define Vertex1 1 4662#define Vertex2 2 4663 bool LastPixelEnable; 4664 float GlobalDepthOffsetConstant; 4665 float GlobalDepthOffsetScale; 4666 float GlobalDepthOffsetClamp; 4667}; 4668 4669static inline void 4670GEN75_3DSTATE_SF_pack(__attribute__((unused)) __gen_user_data *data, 4671 __attribute__((unused)) void * restrict dst, 4672 __attribute__((unused)) const struct GEN75_3DSTATE_SF * restrict values) 4673{ 4674 uint32_t * restrict dw = (uint32_t * restrict) dst; 4675 4676 dw[0] = 4677 __gen_uint(values->DWordLength, 0, 7) | 4678 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4679 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4680 __gen_uint(values->CommandSubType, 27, 28) | 4681 __gen_uint(values->CommandType, 29, 31); 4682 4683 dw[1] = 4684 __gen_uint(values->FrontWinding, 0, 0) | 4685 __gen_uint(values->ViewportTransformEnable, 1, 1) | 4686 __gen_uint(values->BackFaceFillMode, 3, 4) | 4687 __gen_uint(values->FrontFaceFillMode, 5, 6) | 4688 __gen_uint(values->GlobalDepthOffsetEnablePoint, 7, 7) | 4689 __gen_uint(values->GlobalDepthOffsetEnableWireframe, 8, 8) | 4690 __gen_uint(values->GlobalDepthOffsetEnableSolid, 9, 9) | 4691 __gen_uint(values->StatisticsEnable, 10, 10) | 4692 __gen_uint(values->LegacyGlobalDepthBiasEnable, 11, 11) | 4693 __gen_uint(values->DepthBufferSurfaceFormat, 12, 14); 4694 4695 dw[2] = 4696 __gen_uint(values->MultisampleRasterizationMode, 8, 9) | 4697 __gen_uint(values->RTIndependentRasterizationEnable, 10, 10) | 4698 __gen_uint(values->ScissorRectangleEnable, 11, 11) | 4699 __gen_uint(values->LineStippleEnable, 14, 14) | 4700 __gen_uint(values->LineEndCapAntialiasingRegionWidth, 16, 17) | 4701 __gen_ufixed(values->LineWidth, 18, 27, 7) | 4702 __gen_uint(values->CullMode, 29, 30) | 4703 __gen_uint(values->AntiAliasingEnable, 31, 31); 4704 4705 dw[3] = 4706 __gen_ufixed(values->PointWidth, 0, 10, 3) | 4707 __gen_uint(values->PointWidthSource, 11, 11) | 4708 __gen_uint(values->VertexSubPixelPrecisionSelect, 12, 12) | 4709 __gen_uint(values->AALineDistanceMode, 14, 14) | 4710 __gen_uint(values->TriangleFanProvokingVertexSelect, 25, 26) | 4711 __gen_uint(values->LineStripListProvokingVertexSelect, 27, 28) | 4712 __gen_uint(values->TriangleStripListProvokingVertexSelect, 29, 30) | 4713 __gen_uint(values->LastPixelEnable, 31, 31); 4714 4715 dw[4] = 4716 __gen_float(values->GlobalDepthOffsetConstant); 4717 4718 dw[5] = 4719 __gen_float(values->GlobalDepthOffsetScale); 4720 4721 dw[6] = 4722 __gen_float(values->GlobalDepthOffsetClamp); 4723} 4724 4725#define GEN75_3DSTATE_SO_BUFFER_length 4 4726#define GEN75_3DSTATE_SO_BUFFER_length_bias 2 4727#define GEN75_3DSTATE_SO_BUFFER_header \ 4728 .DWordLength = 2, \ 4729 ._3DCommandSubOpcode = 24, \ 4730 ._3DCommandOpcode = 1, \ 4731 .CommandSubType = 3, \ 4732 .CommandType = 3 4733 4734struct GEN75_3DSTATE_SO_BUFFER { 4735 uint32_t DWordLength; 4736 uint32_t _3DCommandSubOpcode; 4737 uint32_t _3DCommandOpcode; 4738 uint32_t CommandSubType; 4739 uint32_t CommandType; 4740 uint32_t SurfacePitch; 4741 uint32_t MOCS; 4742 uint32_t SOBufferIndex; 4743 __gen_address_type SurfaceBaseAddress; 4744 __gen_address_type SurfaceEndAddress; 4745}; 4746 4747static inline void 4748GEN75_3DSTATE_SO_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 4749 __attribute__((unused)) void * restrict dst, 4750 __attribute__((unused)) const struct GEN75_3DSTATE_SO_BUFFER * restrict values) 4751{ 4752 uint32_t * restrict dw = (uint32_t * restrict) dst; 4753 4754 dw[0] = 4755 __gen_uint(values->DWordLength, 0, 7) | 4756 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4757 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4758 __gen_uint(values->CommandSubType, 27, 28) | 4759 __gen_uint(values->CommandType, 29, 31); 4760 4761 dw[1] = 4762 __gen_uint(values->SurfacePitch, 0, 11) | 4763 __gen_uint(values->MOCS, 25, 28) | 4764 __gen_uint(values->SOBufferIndex, 29, 30); 4765 4766 dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 4767 4768 dw[3] = __gen_combine_address(data, &dw[3], values->SurfaceEndAddress, 0); 4769} 4770 4771#define GEN75_3DSTATE_SO_DECL_LIST_length_bias 2 4772#define GEN75_3DSTATE_SO_DECL_LIST_header \ 4773 ._3DCommandSubOpcode = 23, \ 4774 ._3DCommandOpcode = 1, \ 4775 .CommandSubType = 3, \ 4776 .CommandType = 3 4777 4778struct GEN75_3DSTATE_SO_DECL_LIST { 4779 uint32_t DWordLength; 4780 uint32_t _3DCommandSubOpcode; 4781 uint32_t _3DCommandOpcode; 4782 uint32_t CommandSubType; 4783 uint32_t CommandType; 4784 uint32_t StreamtoBufferSelects0; 4785 uint32_t StreamtoBufferSelects1; 4786 uint32_t StreamtoBufferSelects2; 4787 uint32_t StreamtoBufferSelects3; 4788 uint32_t NumEntries0; 4789 uint32_t NumEntries1; 4790 uint32_t NumEntries2; 4791 uint32_t NumEntries3; 4792 /* variable length fields follow */ 4793}; 4794 4795static inline void 4796GEN75_3DSTATE_SO_DECL_LIST_pack(__attribute__((unused)) __gen_user_data *data, 4797 __attribute__((unused)) void * restrict dst, 4798 __attribute__((unused)) const struct GEN75_3DSTATE_SO_DECL_LIST * restrict values) 4799{ 4800 uint32_t * restrict dw = (uint32_t * restrict) dst; 4801 4802 dw[0] = 4803 __gen_uint(values->DWordLength, 0, 8) | 4804 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4805 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4806 __gen_uint(values->CommandSubType, 27, 28) | 4807 __gen_uint(values->CommandType, 29, 31); 4808 4809 dw[1] = 4810 __gen_uint(values->StreamtoBufferSelects0, 0, 3) | 4811 __gen_uint(values->StreamtoBufferSelects1, 4, 7) | 4812 __gen_uint(values->StreamtoBufferSelects2, 8, 11) | 4813 __gen_uint(values->StreamtoBufferSelects3, 12, 15); 4814 4815 dw[2] = 4816 __gen_uint(values->NumEntries0, 0, 7) | 4817 __gen_uint(values->NumEntries1, 8, 15) | 4818 __gen_uint(values->NumEntries2, 16, 23) | 4819 __gen_uint(values->NumEntries3, 24, 31); 4820} 4821 4822#define GEN75_3DSTATE_STENCIL_BUFFER_length 3 4823#define GEN75_3DSTATE_STENCIL_BUFFER_length_bias 2 4824#define GEN75_3DSTATE_STENCIL_BUFFER_header \ 4825 .DWordLength = 1, \ 4826 ._3DCommandSubOpcode = 6, \ 4827 ._3DCommandOpcode = 0, \ 4828 .CommandSubType = 3, \ 4829 .CommandType = 3 4830 4831struct GEN75_3DSTATE_STENCIL_BUFFER { 4832 uint32_t DWordLength; 4833 uint32_t _3DCommandSubOpcode; 4834 uint32_t _3DCommandOpcode; 4835 uint32_t CommandSubType; 4836 uint32_t CommandType; 4837 uint32_t SurfacePitch; 4838 uint32_t MOCS; 4839 bool StencilBufferEnable; 4840 __gen_address_type SurfaceBaseAddress; 4841}; 4842 4843static inline void 4844GEN75_3DSTATE_STENCIL_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 4845 __attribute__((unused)) void * restrict dst, 4846 __attribute__((unused)) const struct GEN75_3DSTATE_STENCIL_BUFFER * restrict values) 4847{ 4848 uint32_t * restrict dw = (uint32_t * restrict) dst; 4849 4850 dw[0] = 4851 __gen_uint(values->DWordLength, 0, 7) | 4852 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4853 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4854 __gen_uint(values->CommandSubType, 27, 28) | 4855 __gen_uint(values->CommandType, 29, 31); 4856 4857 dw[1] = 4858 __gen_uint(values->SurfacePitch, 0, 16) | 4859 __gen_uint(values->MOCS, 25, 28) | 4860 __gen_uint(values->StencilBufferEnable, 31, 31); 4861 4862 dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 4863} 4864 4865#define GEN75_3DSTATE_STREAMOUT_length 3 4866#define GEN75_3DSTATE_STREAMOUT_length_bias 2 4867#define GEN75_3DSTATE_STREAMOUT_header \ 4868 .DWordLength = 1, \ 4869 ._3DCommandSubOpcode = 30, \ 4870 ._3DCommandOpcode = 0, \ 4871 .CommandSubType = 3, \ 4872 .CommandType = 3 4873 4874struct GEN75_3DSTATE_STREAMOUT { 4875 uint32_t DWordLength; 4876 uint32_t _3DCommandSubOpcode; 4877 uint32_t _3DCommandOpcode; 4878 uint32_t CommandSubType; 4879 uint32_t CommandType; 4880 bool SOBufferEnable0; 4881 bool SOBufferEnable1; 4882 bool SOBufferEnable2; 4883 bool SOBufferEnable3; 4884 bool SOStatisticsEnable; 4885 uint32_t ReorderMode; 4886#define LEADING 0 4887#define TRAILING 1 4888 uint32_t RenderStreamSelect; 4889 bool RenderingDisable; 4890 bool SOFunctionEnable; 4891 uint32_t Stream0VertexReadLength; 4892 uint32_t Stream0VertexReadOffset; 4893 uint32_t Stream1VertexReadLength; 4894 uint32_t Stream1VertexReadOffset; 4895 uint32_t Stream2VertexReadLength; 4896 uint32_t Stream2VertexReadOffset; 4897 uint32_t Stream3VertexReadLength; 4898 uint32_t Stream3VertexReadOffset; 4899}; 4900 4901static inline void 4902GEN75_3DSTATE_STREAMOUT_pack(__attribute__((unused)) __gen_user_data *data, 4903 __attribute__((unused)) void * restrict dst, 4904 __attribute__((unused)) const struct GEN75_3DSTATE_STREAMOUT * restrict values) 4905{ 4906 uint32_t * restrict dw = (uint32_t * restrict) dst; 4907 4908 dw[0] = 4909 __gen_uint(values->DWordLength, 0, 7) | 4910 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4911 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4912 __gen_uint(values->CommandSubType, 27, 28) | 4913 __gen_uint(values->CommandType, 29, 31); 4914 4915 dw[1] = 4916 __gen_uint(values->SOBufferEnable0, 8, 8) | 4917 __gen_uint(values->SOBufferEnable1, 9, 9) | 4918 __gen_uint(values->SOBufferEnable2, 10, 10) | 4919 __gen_uint(values->SOBufferEnable3, 11, 11) | 4920 __gen_uint(values->SOStatisticsEnable, 25, 25) | 4921 __gen_uint(values->ReorderMode, 26, 26) | 4922 __gen_uint(values->RenderStreamSelect, 27, 28) | 4923 __gen_uint(values->RenderingDisable, 30, 30) | 4924 __gen_uint(values->SOFunctionEnable, 31, 31); 4925 4926 dw[2] = 4927 __gen_uint(values->Stream0VertexReadLength, 0, 4) | 4928 __gen_uint(values->Stream0VertexReadOffset, 5, 5) | 4929 __gen_uint(values->Stream1VertexReadLength, 8, 12) | 4930 __gen_uint(values->Stream1VertexReadOffset, 13, 13) | 4931 __gen_uint(values->Stream2VertexReadLength, 16, 20) | 4932 __gen_uint(values->Stream2VertexReadOffset, 21, 21) | 4933 __gen_uint(values->Stream3VertexReadLength, 24, 28) | 4934 __gen_uint(values->Stream3VertexReadOffset, 29, 29); 4935} 4936 4937#define GEN75_3DSTATE_TE_length 4 4938#define GEN75_3DSTATE_TE_length_bias 2 4939#define GEN75_3DSTATE_TE_header \ 4940 .DWordLength = 2, \ 4941 ._3DCommandSubOpcode = 28, \ 4942 ._3DCommandOpcode = 0, \ 4943 .CommandSubType = 3, \ 4944 .CommandType = 3 4945 4946struct GEN75_3DSTATE_TE { 4947 uint32_t DWordLength; 4948 uint32_t _3DCommandSubOpcode; 4949 uint32_t _3DCommandOpcode; 4950 uint32_t CommandSubType; 4951 uint32_t CommandType; 4952 bool TEEnable; 4953 uint32_t TEMode; 4954#define HW_TESS 0 4955#define SW_TESS 1 4956 uint32_t TEDomain; 4957#define QUAD 0 4958#define TRI 1 4959#define ISOLINE 2 4960 uint32_t OutputTopology; 4961#define OUTPUT_POINT 0 4962#define OUTPUT_LINE 1 4963#define OUTPUT_TRI_CW 2 4964#define OUTPUT_TRI_CCW 3 4965 uint32_t Partitioning; 4966#define INTEGER 0 4967#define ODD_FRACTIONAL 1 4968#define EVEN_FRACTIONAL 2 4969 float MaximumTessellationFactorOdd; 4970 float MaximumTessellationFactorNotOdd; 4971}; 4972 4973static inline void 4974GEN75_3DSTATE_TE_pack(__attribute__((unused)) __gen_user_data *data, 4975 __attribute__((unused)) void * restrict dst, 4976 __attribute__((unused)) const struct GEN75_3DSTATE_TE * restrict values) 4977{ 4978 uint32_t * restrict dw = (uint32_t * restrict) dst; 4979 4980 dw[0] = 4981 __gen_uint(values->DWordLength, 0, 7) | 4982 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4983 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4984 __gen_uint(values->CommandSubType, 27, 28) | 4985 __gen_uint(values->CommandType, 29, 31); 4986 4987 dw[1] = 4988 __gen_uint(values->TEEnable, 0, 0) | 4989 __gen_uint(values->TEMode, 1, 2) | 4990 __gen_uint(values->TEDomain, 4, 5) | 4991 __gen_uint(values->OutputTopology, 8, 9) | 4992 __gen_uint(values->Partitioning, 12, 13); 4993 4994 dw[2] = 4995 __gen_float(values->MaximumTessellationFactorOdd); 4996 4997 dw[3] = 4998 __gen_float(values->MaximumTessellationFactorNotOdd); 4999} 5000 5001#define GEN75_3DSTATE_URB_DS_length 2 5002#define GEN75_3DSTATE_URB_DS_length_bias 2 5003#define GEN75_3DSTATE_URB_DS_header \ 5004 .DWordLength = 0, \ 5005 ._3DCommandSubOpcode = 50, \ 5006 ._3DCommandOpcode = 0, \ 5007 .CommandSubType = 3, \ 5008 .CommandType = 3 5009 5010struct GEN75_3DSTATE_URB_DS { 5011 uint32_t DWordLength; 5012 uint32_t _3DCommandSubOpcode; 5013 uint32_t _3DCommandOpcode; 5014 uint32_t CommandSubType; 5015 uint32_t CommandType; 5016 uint32_t DSNumberofURBEntries; 5017 uint32_t DSURBEntryAllocationSize; 5018 uint32_t DSURBStartingAddress; 5019}; 5020 5021static inline void 5022GEN75_3DSTATE_URB_DS_pack(__attribute__((unused)) __gen_user_data *data, 5023 __attribute__((unused)) void * restrict dst, 5024 __attribute__((unused)) const struct GEN75_3DSTATE_URB_DS * restrict values) 5025{ 5026 uint32_t * restrict dw = (uint32_t * restrict) dst; 5027 5028 dw[0] = 5029 __gen_uint(values->DWordLength, 0, 7) | 5030 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5031 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5032 __gen_uint(values->CommandSubType, 27, 28) | 5033 __gen_uint(values->CommandType, 29, 31); 5034 5035 dw[1] = 5036 __gen_uint(values->DSNumberofURBEntries, 0, 15) | 5037 __gen_uint(values->DSURBEntryAllocationSize, 16, 24) | 5038 __gen_uint(values->DSURBStartingAddress, 25, 30); 5039} 5040 5041#define GEN75_3DSTATE_URB_GS_length 2 5042#define GEN75_3DSTATE_URB_GS_length_bias 2 5043#define GEN75_3DSTATE_URB_GS_header \ 5044 .DWordLength = 0, \ 5045 ._3DCommandSubOpcode = 51, \ 5046 ._3DCommandOpcode = 0, \ 5047 .CommandSubType = 3, \ 5048 .CommandType = 3 5049 5050struct GEN75_3DSTATE_URB_GS { 5051 uint32_t DWordLength; 5052 uint32_t _3DCommandSubOpcode; 5053 uint32_t _3DCommandOpcode; 5054 uint32_t CommandSubType; 5055 uint32_t CommandType; 5056 uint32_t GSNumberofURBEntries; 5057 uint32_t GSURBEntryAllocationSize; 5058 uint32_t GSURBStartingAddress; 5059}; 5060 5061static inline void 5062GEN75_3DSTATE_URB_GS_pack(__attribute__((unused)) __gen_user_data *data, 5063 __attribute__((unused)) void * restrict dst, 5064 __attribute__((unused)) const struct GEN75_3DSTATE_URB_GS * restrict values) 5065{ 5066 uint32_t * restrict dw = (uint32_t * restrict) dst; 5067 5068 dw[0] = 5069 __gen_uint(values->DWordLength, 0, 7) | 5070 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5071 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5072 __gen_uint(values->CommandSubType, 27, 28) | 5073 __gen_uint(values->CommandType, 29, 31); 5074 5075 dw[1] = 5076 __gen_uint(values->GSNumberofURBEntries, 0, 15) | 5077 __gen_uint(values->GSURBEntryAllocationSize, 16, 24) | 5078 __gen_uint(values->GSURBStartingAddress, 25, 30); 5079} 5080 5081#define GEN75_3DSTATE_URB_HS_length 2 5082#define GEN75_3DSTATE_URB_HS_length_bias 2 5083#define GEN75_3DSTATE_URB_HS_header \ 5084 .DWordLength = 0, \ 5085 ._3DCommandSubOpcode = 49, \ 5086 ._3DCommandOpcode = 0, \ 5087 .CommandSubType = 3, \ 5088 .CommandType = 3 5089 5090struct GEN75_3DSTATE_URB_HS { 5091 uint32_t DWordLength; 5092 uint32_t _3DCommandSubOpcode; 5093 uint32_t _3DCommandOpcode; 5094 uint32_t CommandSubType; 5095 uint32_t CommandType; 5096 uint32_t HSNumberofURBEntries; 5097 uint32_t HSURBEntryAllocationSize; 5098 uint32_t HSURBStartingAddress; 5099}; 5100 5101static inline void 5102GEN75_3DSTATE_URB_HS_pack(__attribute__((unused)) __gen_user_data *data, 5103 __attribute__((unused)) void * restrict dst, 5104 __attribute__((unused)) const struct GEN75_3DSTATE_URB_HS * restrict values) 5105{ 5106 uint32_t * restrict dw = (uint32_t * restrict) dst; 5107 5108 dw[0] = 5109 __gen_uint(values->DWordLength, 0, 7) | 5110 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5111 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5112 __gen_uint(values->CommandSubType, 27, 28) | 5113 __gen_uint(values->CommandType, 29, 31); 5114 5115 dw[1] = 5116 __gen_uint(values->HSNumberofURBEntries, 0, 15) | 5117 __gen_uint(values->HSURBEntryAllocationSize, 16, 24) | 5118 __gen_uint(values->HSURBStartingAddress, 25, 30); 5119} 5120 5121#define GEN75_3DSTATE_URB_VS_length 2 5122#define GEN75_3DSTATE_URB_VS_length_bias 2 5123#define GEN75_3DSTATE_URB_VS_header \ 5124 .DWordLength = 0, \ 5125 ._3DCommandSubOpcode = 48, \ 5126 ._3DCommandOpcode = 0, \ 5127 .CommandSubType = 3, \ 5128 .CommandType = 3 5129 5130struct GEN75_3DSTATE_URB_VS { 5131 uint32_t DWordLength; 5132 uint32_t _3DCommandSubOpcode; 5133 uint32_t _3DCommandOpcode; 5134 uint32_t CommandSubType; 5135 uint32_t CommandType; 5136 uint32_t VSNumberofURBEntries; 5137 uint32_t VSURBEntryAllocationSize; 5138 uint32_t VSURBStartingAddress; 5139}; 5140 5141static inline void 5142GEN75_3DSTATE_URB_VS_pack(__attribute__((unused)) __gen_user_data *data, 5143 __attribute__((unused)) void * restrict dst, 5144 __attribute__((unused)) const struct GEN75_3DSTATE_URB_VS * restrict values) 5145{ 5146 uint32_t * restrict dw = (uint32_t * restrict) dst; 5147 5148 dw[0] = 5149 __gen_uint(values->DWordLength, 0, 7) | 5150 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5151 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5152 __gen_uint(values->CommandSubType, 27, 28) | 5153 __gen_uint(values->CommandType, 29, 31); 5154 5155 dw[1] = 5156 __gen_uint(values->VSNumberofURBEntries, 0, 15) | 5157 __gen_uint(values->VSURBEntryAllocationSize, 16, 24) | 5158 __gen_uint(values->VSURBStartingAddress, 25, 30); 5159} 5160 5161#define GEN75_3DSTATE_VERTEX_BUFFERS_length_bias 2 5162#define GEN75_3DSTATE_VERTEX_BUFFERS_header \ 5163 .DWordLength = 3, \ 5164 ._3DCommandSubOpcode = 8, \ 5165 ._3DCommandOpcode = 0, \ 5166 .CommandSubType = 3, \ 5167 .CommandType = 3 5168 5169struct GEN75_3DSTATE_VERTEX_BUFFERS { 5170 uint32_t DWordLength; 5171 uint32_t _3DCommandSubOpcode; 5172 uint32_t _3DCommandOpcode; 5173 uint32_t CommandSubType; 5174 uint32_t CommandType; 5175 /* variable length fields follow */ 5176}; 5177 5178static inline void 5179GEN75_3DSTATE_VERTEX_BUFFERS_pack(__attribute__((unused)) __gen_user_data *data, 5180 __attribute__((unused)) void * restrict dst, 5181 __attribute__((unused)) const struct GEN75_3DSTATE_VERTEX_BUFFERS * restrict values) 5182{ 5183 uint32_t * restrict dw = (uint32_t * restrict) dst; 5184 5185 dw[0] = 5186 __gen_uint(values->DWordLength, 0, 7) | 5187 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5188 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5189 __gen_uint(values->CommandSubType, 27, 28) | 5190 __gen_uint(values->CommandType, 29, 31); 5191} 5192 5193#define GEN75_3DSTATE_VERTEX_ELEMENTS_length_bias 2 5194#define GEN75_3DSTATE_VERTEX_ELEMENTS_header \ 5195 .DWordLength = 1, \ 5196 ._3DCommandSubOpcode = 9, \ 5197 ._3DCommandOpcode = 0, \ 5198 .CommandSubType = 3, \ 5199 .CommandType = 3 5200 5201struct GEN75_3DSTATE_VERTEX_ELEMENTS { 5202 uint32_t DWordLength; 5203 uint32_t _3DCommandSubOpcode; 5204 uint32_t _3DCommandOpcode; 5205 uint32_t CommandSubType; 5206 uint32_t CommandType; 5207 /* variable length fields follow */ 5208}; 5209 5210static inline void 5211GEN75_3DSTATE_VERTEX_ELEMENTS_pack(__attribute__((unused)) __gen_user_data *data, 5212 __attribute__((unused)) void * restrict dst, 5213 __attribute__((unused)) const struct GEN75_3DSTATE_VERTEX_ELEMENTS * restrict values) 5214{ 5215 uint32_t * restrict dw = (uint32_t * restrict) dst; 5216 5217 dw[0] = 5218 __gen_uint(values->DWordLength, 0, 7) | 5219 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5220 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5221 __gen_uint(values->CommandSubType, 27, 28) | 5222 __gen_uint(values->CommandType, 29, 31); 5223} 5224 5225#define GEN75_3DSTATE_VF_length 2 5226#define GEN75_3DSTATE_VF_length_bias 2 5227#define GEN75_3DSTATE_VF_header \ 5228 .DWordLength = 0, \ 5229 ._3DCommandSubOpcode = 12, \ 5230 ._3DCommandOpcode = 0, \ 5231 .CommandSubType = 3, \ 5232 .CommandType = 3 5233 5234struct GEN75_3DSTATE_VF { 5235 uint32_t DWordLength; 5236 bool IndexedDrawCutIndexEnable; 5237 uint32_t _3DCommandSubOpcode; 5238 uint32_t _3DCommandOpcode; 5239 uint32_t CommandSubType; 5240 uint32_t CommandType; 5241 uint32_t CutIndex; 5242}; 5243 5244static inline void 5245GEN75_3DSTATE_VF_pack(__attribute__((unused)) __gen_user_data *data, 5246 __attribute__((unused)) void * restrict dst, 5247 __attribute__((unused)) const struct GEN75_3DSTATE_VF * restrict values) 5248{ 5249 uint32_t * restrict dw = (uint32_t * restrict) dst; 5250 5251 dw[0] = 5252 __gen_uint(values->DWordLength, 0, 7) | 5253 __gen_uint(values->IndexedDrawCutIndexEnable, 8, 8) | 5254 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5255 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5256 __gen_uint(values->CommandSubType, 27, 28) | 5257 __gen_uint(values->CommandType, 29, 31); 5258 5259 dw[1] = 5260 __gen_uint(values->CutIndex, 0, 31); 5261} 5262 5263#define GEN75_3DSTATE_VF_STATISTICS_length 1 5264#define GEN75_3DSTATE_VF_STATISTICS_length_bias 1 5265#define GEN75_3DSTATE_VF_STATISTICS_header \ 5266 ._3DCommandSubOpcode = 11, \ 5267 ._3DCommandOpcode = 0, \ 5268 .CommandSubType = 1, \ 5269 .CommandType = 3 5270 5271struct GEN75_3DSTATE_VF_STATISTICS { 5272 bool StatisticsEnable; 5273 uint32_t _3DCommandSubOpcode; 5274 uint32_t _3DCommandOpcode; 5275 uint32_t CommandSubType; 5276 uint32_t CommandType; 5277}; 5278 5279static inline void 5280GEN75_3DSTATE_VF_STATISTICS_pack(__attribute__((unused)) __gen_user_data *data, 5281 __attribute__((unused)) void * restrict dst, 5282 __attribute__((unused)) const struct GEN75_3DSTATE_VF_STATISTICS * restrict values) 5283{ 5284 uint32_t * restrict dw = (uint32_t * restrict) dst; 5285 5286 dw[0] = 5287 __gen_uint(values->StatisticsEnable, 0, 0) | 5288 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5289 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5290 __gen_uint(values->CommandSubType, 27, 28) | 5291 __gen_uint(values->CommandType, 29, 31); 5292} 5293 5294#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2 5295#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 2 5296#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\ 5297 .DWordLength = 0, \ 5298 ._3DCommandSubOpcode = 35, \ 5299 ._3DCommandOpcode = 0, \ 5300 .CommandSubType = 3, \ 5301 .CommandType = 3 5302 5303struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC { 5304 uint32_t DWordLength; 5305 uint32_t _3DCommandSubOpcode; 5306 uint32_t _3DCommandOpcode; 5307 uint32_t CommandSubType; 5308 uint32_t CommandType; 5309 uint64_t CCViewportPointer; 5310}; 5311 5312static inline void 5313GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__attribute__((unused)) __gen_user_data *data, 5314 __attribute__((unused)) void * restrict dst, 5315 __attribute__((unused)) const struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values) 5316{ 5317 uint32_t * restrict dw = (uint32_t * restrict) dst; 5318 5319 dw[0] = 5320 __gen_uint(values->DWordLength, 0, 7) | 5321 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5322 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5323 __gen_uint(values->CommandSubType, 27, 28) | 5324 __gen_uint(values->CommandType, 29, 31); 5325 5326 dw[1] = 5327 __gen_offset(values->CCViewportPointer, 5, 31); 5328} 5329 5330#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2 5331#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 2 5332#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\ 5333 .DWordLength = 0, \ 5334 ._3DCommandSubOpcode = 33, \ 5335 ._3DCommandOpcode = 0, \ 5336 .CommandSubType = 3, \ 5337 .CommandType = 3 5338 5339struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP { 5340 uint32_t DWordLength; 5341 uint32_t _3DCommandSubOpcode; 5342 uint32_t _3DCommandOpcode; 5343 uint32_t CommandSubType; 5344 uint32_t CommandType; 5345 uint64_t SFClipViewportPointer; 5346}; 5347 5348static inline void 5349GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__attribute__((unused)) __gen_user_data *data, 5350 __attribute__((unused)) void * restrict dst, 5351 __attribute__((unused)) const struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values) 5352{ 5353 uint32_t * restrict dw = (uint32_t * restrict) dst; 5354 5355 dw[0] = 5356 __gen_uint(values->DWordLength, 0, 7) | 5357 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5358 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5359 __gen_uint(values->CommandSubType, 27, 28) | 5360 __gen_uint(values->CommandType, 29, 31); 5361 5362 dw[1] = 5363 __gen_offset(values->SFClipViewportPointer, 6, 31); 5364} 5365 5366#define GEN75_3DSTATE_VS_length 6 5367#define GEN75_3DSTATE_VS_length_bias 2 5368#define GEN75_3DSTATE_VS_header \ 5369 .DWordLength = 4, \ 5370 ._3DCommandSubOpcode = 16, \ 5371 ._3DCommandOpcode = 0, \ 5372 .CommandSubType = 3, \ 5373 .CommandType = 3 5374 5375struct GEN75_3DSTATE_VS { 5376 uint32_t DWordLength; 5377 uint32_t _3DCommandSubOpcode; 5378 uint32_t _3DCommandOpcode; 5379 uint32_t CommandSubType; 5380 uint32_t CommandType; 5381 uint64_t KernelStartPointer; 5382 bool SoftwareExceptionEnable; 5383 bool VSaccessesUAV; 5384 bool IllegalOpcodeExceptionEnable; 5385 uint32_t FloatingPointMode; 5386#define IEEE754 0 5387#define Alternate 1 5388 uint32_t ThreadPriority; 5389#define NormalPriority 0 5390#define HighPriority 1 5391 uint32_t BindingTableEntryCount; 5392 uint32_t SamplerCount; 5393#define NoSamplers 0 5394#define _14Samplers 1 5395#define _58Samplers 2 5396#define _912Samplers 3 5397#define _1316Samplers 4 5398 bool VectorMaskEnable; 5399 bool SingleVertexDispatch; 5400 uint32_t PerThreadScratchSpace; 5401 __gen_address_type ScratchSpaceBasePointer; 5402 uint32_t VertexURBEntryReadOffset; 5403 uint32_t VertexURBEntryReadLength; 5404 uint32_t DispatchGRFStartRegisterForURBData; 5405 bool Enable; 5406 bool VertexCacheDisable; 5407 bool StatisticsEnable; 5408 uint32_t MaximumNumberofThreads; 5409}; 5410 5411static inline void 5412GEN75_3DSTATE_VS_pack(__attribute__((unused)) __gen_user_data *data, 5413 __attribute__((unused)) void * restrict dst, 5414 __attribute__((unused)) const struct GEN75_3DSTATE_VS * restrict values) 5415{ 5416 uint32_t * restrict dw = (uint32_t * restrict) dst; 5417 5418 dw[0] = 5419 __gen_uint(values->DWordLength, 0, 7) | 5420 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5421 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5422 __gen_uint(values->CommandSubType, 27, 28) | 5423 __gen_uint(values->CommandType, 29, 31); 5424 5425 dw[1] = 5426 __gen_offset(values->KernelStartPointer, 6, 31); 5427 5428 dw[2] = 5429 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 5430 __gen_uint(values->VSaccessesUAV, 12, 12) | 5431 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 5432 __gen_uint(values->FloatingPointMode, 16, 16) | 5433 __gen_uint(values->ThreadPriority, 17, 17) | 5434 __gen_uint(values->BindingTableEntryCount, 18, 25) | 5435 __gen_uint(values->SamplerCount, 27, 29) | 5436 __gen_uint(values->VectorMaskEnable, 30, 30) | 5437 __gen_uint(values->SingleVertexDispatch, 31, 31); 5438 5439 const uint32_t v3 = 5440 __gen_uint(values->PerThreadScratchSpace, 0, 3); 5441 dw[3] = __gen_combine_address(data, &dw[3], values->ScratchSpaceBasePointer, v3); 5442 5443 dw[4] = 5444 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 5445 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 5446 __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24); 5447 5448 dw[5] = 5449 __gen_uint(values->Enable, 0, 0) | 5450 __gen_uint(values->VertexCacheDisable, 1, 1) | 5451 __gen_uint(values->StatisticsEnable, 10, 10) | 5452 __gen_uint(values->MaximumNumberofThreads, 23, 31); 5453} 5454 5455#define GEN75_3DSTATE_WM_length 3 5456#define GEN75_3DSTATE_WM_length_bias 2 5457#define GEN75_3DSTATE_WM_header \ 5458 .DWordLength = 1, \ 5459 ._3DCommandSubOpcode = 20, \ 5460 ._3DCommandOpcode = 0, \ 5461 .CommandSubType = 3, \ 5462 .CommandType = 3 5463 5464struct GEN75_3DSTATE_WM { 5465 uint32_t DWordLength; 5466 uint32_t _3DCommandSubOpcode; 5467 uint32_t _3DCommandOpcode; 5468 uint32_t CommandSubType; 5469 uint32_t CommandType; 5470 uint32_t MultisampleRasterizationMode; 5471#define MSRASTMODE_OFF_PIXEL 0 5472#define MSRASTMODE_OFF_PATTERN 1 5473#define MSRASTMODE_ON_PIXEL 2 5474#define MSRASTMODE_ON_PATTERN 3 5475 uint32_t PointRasterizationRule; 5476#define RASTRULE_UPPER_LEFT 0 5477#define RASTRULE_UPPER_RIGHT 1 5478 bool LineStippleEnable; 5479 bool PolygonStippleEnable; 5480 bool RTIndependentRasterizationEnable; 5481 uint32_t LineAntialiasingRegionWidth; 5482#define _05pixels 0 5483#define _10pixels 1 5484#define _20pixels 2 5485#define _40pixels 3 5486 uint32_t LineEndCapAntialiasingRegionWidth; 5487 bool PixelShaderUsesInputCoverageMask; 5488 uint32_t BarycentricInterpolationMode; 5489#define BIM_PERSPECTIVE_PIXEL 1 5490#define BIM_PERSPECTIVE_CENTROID 2 5491#define BIM_PERSPECTIVE_SAMPLE 4 5492#define BIM_LINEAR_PIXEL 8 5493#define BIM_LINEAR_CENTROID 16 5494#define BIM_LINEAR_SAMPLE 32 5495 uint32_t PositionZWInterpolationMode; 5496#define INTERP_PIXEL 0 5497#define INTERP_CENTROID 2 5498#define INTERP_SAMPLE 3 5499 bool PixelShaderUsesSourceW; 5500 bool PixelShaderUsesSourceDepth; 5501 uint32_t EarlyDepthStencilControl; 5502#define EDSC_NORMAL 0 5503#define EDSC_PSEXEC 1 5504#define EDSC_PREPS 2 5505 uint32_t PixelShaderComputedDepthMode; 5506#define PSCDEPTH_OFF 0 5507#define PSCDEPTH_ON 1 5508#define PSCDEPTH_ON_GE 2 5509#define PSCDEPTH_ON_LE 3 5510 bool PixelShaderKillsPixel; 5511 bool LegacyDiamondLineRasterization; 5512 bool HierarchicalDepthBufferResolveEnable; 5513 bool DepthBufferResolveEnable; 5514 bool ThreadDispatchEnable; 5515 bool DepthBufferClear; 5516 bool StatisticsEnable; 5517 uint32_t PSUAVonly; 5518#define OFF 0 5519#define ON 1 5520 uint32_t MultisampleDispatchMode; 5521#define MSDISPMODE_PERSAMPLE 0 5522#define MSDISPMODE_PERPIXEL 1 5523}; 5524 5525static inline void 5526GEN75_3DSTATE_WM_pack(__attribute__((unused)) __gen_user_data *data, 5527 __attribute__((unused)) void * restrict dst, 5528 __attribute__((unused)) const struct GEN75_3DSTATE_WM * restrict values) 5529{ 5530 uint32_t * restrict dw = (uint32_t * restrict) dst; 5531 5532 dw[0] = 5533 __gen_uint(values->DWordLength, 0, 7) | 5534 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5535 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5536 __gen_uint(values->CommandSubType, 27, 28) | 5537 __gen_uint(values->CommandType, 29, 31); 5538 5539 dw[1] = 5540 __gen_uint(values->MultisampleRasterizationMode, 0, 1) | 5541 __gen_uint(values->PointRasterizationRule, 2, 2) | 5542 __gen_uint(values->LineStippleEnable, 3, 3) | 5543 __gen_uint(values->PolygonStippleEnable, 4, 4) | 5544 __gen_uint(values->RTIndependentRasterizationEnable, 5, 5) | 5545 __gen_uint(values->LineAntialiasingRegionWidth, 6, 7) | 5546 __gen_uint(values->LineEndCapAntialiasingRegionWidth, 8, 9) | 5547 __gen_uint(values->PixelShaderUsesInputCoverageMask, 10, 10) | 5548 __gen_uint(values->BarycentricInterpolationMode, 11, 16) | 5549 __gen_uint(values->PositionZWInterpolationMode, 17, 18) | 5550 __gen_uint(values->PixelShaderUsesSourceW, 19, 19) | 5551 __gen_uint(values->PixelShaderUsesSourceDepth, 20, 20) | 5552 __gen_uint(values->EarlyDepthStencilControl, 21, 22) | 5553 __gen_uint(values->PixelShaderComputedDepthMode, 23, 24) | 5554 __gen_uint(values->PixelShaderKillsPixel, 25, 25) | 5555 __gen_uint(values->LegacyDiamondLineRasterization, 26, 26) | 5556 __gen_uint(values->HierarchicalDepthBufferResolveEnable, 27, 27) | 5557 __gen_uint(values->DepthBufferResolveEnable, 28, 28) | 5558 __gen_uint(values->ThreadDispatchEnable, 29, 29) | 5559 __gen_uint(values->DepthBufferClear, 30, 30) | 5560 __gen_uint(values->StatisticsEnable, 31, 31); 5561 5562 dw[2] = 5563 __gen_uint(values->PSUAVonly, 30, 30) | 5564 __gen_uint(values->MultisampleDispatchMode, 31, 31); 5565} 5566 5567#define GEN75_GPGPU_CSR_BASE_ADDRESS_length 2 5568#define GEN75_GPGPU_CSR_BASE_ADDRESS_length_bias 2 5569#define GEN75_GPGPU_CSR_BASE_ADDRESS_header \ 5570 .DWordLength = 0, \ 5571 ._3DCommandSubOpcode = 4, \ 5572 ._3DCommandOpcode = 1, \ 5573 .CommandSubType = 0, \ 5574 .CommandType = 3 5575 5576struct GEN75_GPGPU_CSR_BASE_ADDRESS { 5577 uint32_t DWordLength; 5578 uint32_t _3DCommandSubOpcode; 5579 uint32_t _3DCommandOpcode; 5580 uint32_t CommandSubType; 5581 uint32_t CommandType; 5582 __gen_address_type GPGPUCSRBaseAddress; 5583}; 5584 5585static inline void 5586GEN75_GPGPU_CSR_BASE_ADDRESS_pack(__attribute__((unused)) __gen_user_data *data, 5587 __attribute__((unused)) void * restrict dst, 5588 __attribute__((unused)) const struct GEN75_GPGPU_CSR_BASE_ADDRESS * restrict values) 5589{ 5590 uint32_t * restrict dw = (uint32_t * restrict) dst; 5591 5592 dw[0] = 5593 __gen_uint(values->DWordLength, 0, 7) | 5594 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5595 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5596 __gen_uint(values->CommandSubType, 27, 28) | 5597 __gen_uint(values->CommandType, 29, 31); 5598 5599 dw[1] = __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddress, 0); 5600} 5601 5602#define GEN75_GPGPU_OBJECT_length 8 5603#define GEN75_GPGPU_OBJECT_length_bias 2 5604#define GEN75_GPGPU_OBJECT_header \ 5605 .DWordLength = 6, \ 5606 .SubOpcode = 4, \ 5607 .MediaCommandOpcode = 1, \ 5608 .Pipeline = 2, \ 5609 .CommandType = 3 5610 5611struct GEN75_GPGPU_OBJECT { 5612 uint32_t DWordLength; 5613 bool PredicateEnable; 5614 uint32_t SubOpcode; 5615 uint32_t MediaCommandOpcode; 5616 uint32_t Pipeline; 5617 uint32_t CommandType; 5618 uint32_t InterfaceDescriptorOffset; 5619 uint32_t SharedLocalMemoryFixedOffset; 5620 uint32_t IndirectDataLength; 5621 uint32_t HalfSliceDestinationSelect; 5622#define HalfSlice1 2 5623#define HalfSlice0 1 5624#define EitherHalfSlice 0 5625 uint32_t SliceDestinationSelect; 5626#define Slice0 0 5627#define Slice1 1 5628 uint32_t EndofThreadGroup; 5629 uint32_t SharedLocalMemoryOffset; 5630 uint64_t IndirectDataStartAddress; 5631 uint32_t ThreadGroupIDX; 5632 uint32_t ThreadGroupIDY; 5633 uint32_t ThreadGroupIDZ; 5634 uint32_t ExecutionMask; 5635}; 5636 5637static inline void 5638GEN75_GPGPU_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 5639 __attribute__((unused)) void * restrict dst, 5640 __attribute__((unused)) const struct GEN75_GPGPU_OBJECT * restrict values) 5641{ 5642 uint32_t * restrict dw = (uint32_t * restrict) dst; 5643 5644 dw[0] = 5645 __gen_uint(values->DWordLength, 0, 7) | 5646 __gen_uint(values->PredicateEnable, 8, 8) | 5647 __gen_uint(values->SubOpcode, 16, 23) | 5648 __gen_uint(values->MediaCommandOpcode, 24, 26) | 5649 __gen_uint(values->Pipeline, 27, 28) | 5650 __gen_uint(values->CommandType, 29, 31); 5651 5652 dw[1] = 5653 __gen_uint(values->InterfaceDescriptorOffset, 0, 5) | 5654 __gen_uint(values->SharedLocalMemoryFixedOffset, 7, 7); 5655 5656 dw[2] = 5657 __gen_uint(values->IndirectDataLength, 0, 16) | 5658 __gen_uint(values->HalfSliceDestinationSelect, 17, 18) | 5659 __gen_uint(values->SliceDestinationSelect, 19, 19) | 5660 __gen_uint(values->EndofThreadGroup, 24, 24) | 5661 __gen_uint(values->SharedLocalMemoryOffset, 28, 31); 5662 5663 dw[3] = 5664 __gen_offset(values->IndirectDataStartAddress, 0, 31); 5665 5666 dw[4] = 5667 __gen_uint(values->ThreadGroupIDX, 0, 31); 5668 5669 dw[5] = 5670 __gen_uint(values->ThreadGroupIDY, 0, 31); 5671 5672 dw[6] = 5673 __gen_uint(values->ThreadGroupIDZ, 0, 31); 5674 5675 dw[7] = 5676 __gen_uint(values->ExecutionMask, 0, 31); 5677} 5678 5679#define GEN75_GPGPU_WALKER_length 11 5680#define GEN75_GPGPU_WALKER_length_bias 2 5681#define GEN75_GPGPU_WALKER_header \ 5682 .DWordLength = 9, \ 5683 .SubOpcodeA = 5, \ 5684 .MediaCommandOpcode = 1, \ 5685 .Pipeline = 2, \ 5686 .CommandType = 3 5687 5688struct GEN75_GPGPU_WALKER { 5689 uint32_t DWordLength; 5690 bool PredicateEnable; 5691 bool IndirectParameterEnable; 5692 uint32_t SubOpcodeA; 5693 uint32_t MediaCommandOpcode; 5694 uint32_t Pipeline; 5695 uint32_t CommandType; 5696 uint32_t InterfaceDescriptorOffset; 5697 uint32_t ThreadWidthCounterMaximum; 5698 uint32_t ThreadHeightCounterMaximum; 5699 uint32_t ThreadDepthCounterMaximum; 5700 uint32_t SIMDSize; 5701#define SIMD8 0 5702#define SIMD16 1 5703#define SIMD32 2 5704 uint32_t ThreadGroupIDStartingX; 5705 uint32_t ThreadGroupIDXDimension; 5706 uint32_t ThreadGroupIDStartingY; 5707 uint32_t ThreadGroupIDYDimension; 5708 uint32_t ThreadGroupIDStartingZ; 5709 uint32_t ThreadGroupIDZDimension; 5710 uint32_t RightExecutionMask; 5711 uint32_t BottomExecutionMask; 5712}; 5713 5714static inline void 5715GEN75_GPGPU_WALKER_pack(__attribute__((unused)) __gen_user_data *data, 5716 __attribute__((unused)) void * restrict dst, 5717 __attribute__((unused)) const struct GEN75_GPGPU_WALKER * restrict values) 5718{ 5719 uint32_t * restrict dw = (uint32_t * restrict) dst; 5720 5721 dw[0] = 5722 __gen_uint(values->DWordLength, 0, 7) | 5723 __gen_uint(values->PredicateEnable, 8, 8) | 5724 __gen_uint(values->IndirectParameterEnable, 10, 10) | 5725 __gen_uint(values->SubOpcodeA, 16, 23) | 5726 __gen_uint(values->MediaCommandOpcode, 24, 26) | 5727 __gen_uint(values->Pipeline, 27, 28) | 5728 __gen_uint(values->CommandType, 29, 31); 5729 5730 dw[1] = 5731 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 5732 5733 dw[2] = 5734 __gen_uint(values->ThreadWidthCounterMaximum, 0, 5) | 5735 __gen_uint(values->ThreadHeightCounterMaximum, 8, 13) | 5736 __gen_uint(values->ThreadDepthCounterMaximum, 16, 21) | 5737 __gen_uint(values->SIMDSize, 30, 31); 5738 5739 dw[3] = 5740 __gen_uint(values->ThreadGroupIDStartingX, 0, 31); 5741 5742 dw[4] = 5743 __gen_uint(values->ThreadGroupIDXDimension, 0, 31); 5744 5745 dw[5] = 5746 __gen_uint(values->ThreadGroupIDStartingY, 0, 31); 5747 5748 dw[6] = 5749 __gen_uint(values->ThreadGroupIDYDimension, 0, 31); 5750 5751 dw[7] = 5752 __gen_uint(values->ThreadGroupIDStartingZ, 0, 31); 5753 5754 dw[8] = 5755 __gen_uint(values->ThreadGroupIDZDimension, 0, 31); 5756 5757 dw[9] = 5758 __gen_uint(values->RightExecutionMask, 0, 31); 5759 5760 dw[10] = 5761 __gen_uint(values->BottomExecutionMask, 0, 31); 5762} 5763 5764#define GEN75_MEDIA_CURBE_LOAD_length 4 5765#define GEN75_MEDIA_CURBE_LOAD_length_bias 2 5766#define GEN75_MEDIA_CURBE_LOAD_header \ 5767 .DWordLength = 2, \ 5768 .SubOpcode = 1, \ 5769 .MediaCommandOpcode = 0, \ 5770 .Pipeline = 2, \ 5771 .CommandType = 3 5772 5773struct GEN75_MEDIA_CURBE_LOAD { 5774 uint32_t DWordLength; 5775 uint32_t SubOpcode; 5776 uint32_t MediaCommandOpcode; 5777 uint32_t Pipeline; 5778 uint32_t CommandType; 5779 uint32_t CURBETotalDataLength; 5780 uint32_t CURBEDataStartAddress; 5781}; 5782 5783static inline void 5784GEN75_MEDIA_CURBE_LOAD_pack(__attribute__((unused)) __gen_user_data *data, 5785 __attribute__((unused)) void * restrict dst, 5786 __attribute__((unused)) const struct GEN75_MEDIA_CURBE_LOAD * restrict values) 5787{ 5788 uint32_t * restrict dw = (uint32_t * restrict) dst; 5789 5790 dw[0] = 5791 __gen_uint(values->DWordLength, 0, 15) | 5792 __gen_uint(values->SubOpcode, 16, 23) | 5793 __gen_uint(values->MediaCommandOpcode, 24, 26) | 5794 __gen_uint(values->Pipeline, 27, 28) | 5795 __gen_uint(values->CommandType, 29, 31); 5796 5797 dw[1] = 0; 5798 5799 dw[2] = 5800 __gen_uint(values->CURBETotalDataLength, 0, 16); 5801 5802 dw[3] = 5803 __gen_uint(values->CURBEDataStartAddress, 0, 31); 5804} 5805 5806#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4 5807#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 2 5808#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\ 5809 .DWordLength = 2, \ 5810 .SubOpcode = 2, \ 5811 .MediaCommandOpcode = 0, \ 5812 .Pipeline = 2, \ 5813 .CommandType = 3 5814 5815struct GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD { 5816 uint32_t DWordLength; 5817 uint32_t SubOpcode; 5818 uint32_t MediaCommandOpcode; 5819 uint32_t Pipeline; 5820 uint32_t CommandType; 5821 uint32_t InterfaceDescriptorTotalLength; 5822 uint64_t InterfaceDescriptorDataStartAddress; 5823}; 5824 5825static inline void 5826GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__attribute__((unused)) __gen_user_data *data, 5827 __attribute__((unused)) void * restrict dst, 5828 __attribute__((unused)) const struct GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values) 5829{ 5830 uint32_t * restrict dw = (uint32_t * restrict) dst; 5831 5832 dw[0] = 5833 __gen_uint(values->DWordLength, 0, 15) | 5834 __gen_uint(values->SubOpcode, 16, 23) | 5835 __gen_uint(values->MediaCommandOpcode, 24, 26) | 5836 __gen_uint(values->Pipeline, 27, 28) | 5837 __gen_uint(values->CommandType, 29, 31); 5838 5839 dw[1] = 0; 5840 5841 dw[2] = 5842 __gen_uint(values->InterfaceDescriptorTotalLength, 0, 16); 5843 5844 dw[3] = 5845 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31); 5846} 5847 5848#define GEN75_MEDIA_OBJECT_length_bias 2 5849#define GEN75_MEDIA_OBJECT_header \ 5850 .DWordLength = 4, \ 5851 .MediaCommandSubOpcode = 0, \ 5852 .MediaCommandOpcode = 1, \ 5853 .MediaCommandPipeline = 2, \ 5854 .CommandType = 3 5855 5856struct GEN75_MEDIA_OBJECT { 5857 uint32_t DWordLength; 5858 uint32_t MediaCommandSubOpcode; 5859 uint32_t MediaCommandOpcode; 5860 uint32_t MediaCommandPipeline; 5861 uint32_t CommandType; 5862 uint32_t InterfaceDescriptorOffset; 5863 uint32_t IndirectDataLength; 5864 uint32_t HalfSliceDestinationSelect; 5865#define HalfSlice1 2 5866#define HalfSlice0 1 5867#define Eitherhalfslice 0 5868 uint32_t SliceDestinationSelect; 5869#define Slice0 0 5870#define Slice1 1 5871#define EitherSlice 0 5872 uint32_t UseScoreboard; 5873#define Notusingscoreboard 0 5874#define Usingscoreboard 1 5875 uint32_t ThreadSynchronization; 5876#define Nothreadsynchronization 0 5877#define Threaddispatchissynchronizedbythespawnrootthreadmessage 1 5878 bool ChildrenPresent; 5879 __gen_address_type IndirectDataStartAddress; 5880 uint32_t ScoreboardX; 5881 uint32_t ScoredboardY; 5882 uint32_t ScoreboardMask; 5883 uint32_t ScoreboardColor; 5884 /* variable length fields follow */ 5885}; 5886 5887static inline void 5888GEN75_MEDIA_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 5889 __attribute__((unused)) void * restrict dst, 5890 __attribute__((unused)) const struct GEN75_MEDIA_OBJECT * restrict values) 5891{ 5892 uint32_t * restrict dw = (uint32_t * restrict) dst; 5893 5894 dw[0] = 5895 __gen_uint(values->DWordLength, 0, 15) | 5896 __gen_uint(values->MediaCommandSubOpcode, 16, 23) | 5897 __gen_uint(values->MediaCommandOpcode, 24, 26) | 5898 __gen_uint(values->MediaCommandPipeline, 27, 28) | 5899 __gen_uint(values->CommandType, 29, 31); 5900 5901 dw[1] = 5902 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 5903 5904 dw[2] = 5905 __gen_uint(values->IndirectDataLength, 0, 16) | 5906 __gen_uint(values->HalfSliceDestinationSelect, 17, 18) | 5907 __gen_uint(values->SliceDestinationSelect, 19, 19) | 5908 __gen_uint(values->UseScoreboard, 21, 21) | 5909 __gen_uint(values->ThreadSynchronization, 24, 24) | 5910 __gen_uint(values->ChildrenPresent, 31, 31); 5911 5912 dw[3] = __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, 0); 5913 5914 dw[4] = 5915 __gen_uint(values->ScoreboardX, 0, 8) | 5916 __gen_uint(values->ScoredboardY, 16, 24); 5917 5918 dw[5] = 5919 __gen_uint(values->ScoreboardMask, 0, 7) | 5920 __gen_uint(values->ScoreboardColor, 16, 19); 5921} 5922 5923#define GEN75_MEDIA_OBJECT_PRT_length 16 5924#define GEN75_MEDIA_OBJECT_PRT_length_bias 2 5925#define GEN75_MEDIA_OBJECT_PRT_header \ 5926 .DWordLength = 14, \ 5927 .SubOpcode = 2, \ 5928 .MediaCommandOpcode = 1, \ 5929 .Pipeline = 2, \ 5930 .CommandType = 3 5931 5932struct GEN75_MEDIA_OBJECT_PRT { 5933 uint32_t DWordLength; 5934 uint32_t SubOpcode; 5935 uint32_t MediaCommandOpcode; 5936 uint32_t Pipeline; 5937 uint32_t CommandType; 5938 uint32_t InterfaceDescriptorOffset; 5939 uint32_t PRT_FenceType; 5940#define Rootthreadqueue 0 5941#define VFEstateflush 1 5942 bool PRT_FenceNeeded; 5943 bool ChildrenPresent; 5944 uint32_t InlineData[12]; 5945}; 5946 5947static inline void 5948GEN75_MEDIA_OBJECT_PRT_pack(__attribute__((unused)) __gen_user_data *data, 5949 __attribute__((unused)) void * restrict dst, 5950 __attribute__((unused)) const struct GEN75_MEDIA_OBJECT_PRT * restrict values) 5951{ 5952 uint32_t * restrict dw = (uint32_t * restrict) dst; 5953 5954 dw[0] = 5955 __gen_uint(values->DWordLength, 0, 15) | 5956 __gen_uint(values->SubOpcode, 16, 23) | 5957 __gen_uint(values->MediaCommandOpcode, 24, 26) | 5958 __gen_uint(values->Pipeline, 27, 28) | 5959 __gen_uint(values->CommandType, 29, 31); 5960 5961 dw[1] = 5962 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 5963 5964 dw[2] = 5965 __gen_uint(values->PRT_FenceType, 22, 22) | 5966 __gen_uint(values->PRT_FenceNeeded, 23, 23) | 5967 __gen_uint(values->ChildrenPresent, 31, 31); 5968 5969 dw[3] = 0; 5970 5971 dw[4] = 5972 __gen_uint(values->InlineData[0], 0, 31); 5973 5974 dw[5] = 5975 __gen_uint(values->InlineData[1], 0, 31); 5976 5977 dw[6] = 5978 __gen_uint(values->InlineData[2], 0, 31); 5979 5980 dw[7] = 5981 __gen_uint(values->InlineData[3], 0, 31); 5982 5983 dw[8] = 5984 __gen_uint(values->InlineData[4], 0, 31); 5985 5986 dw[9] = 5987 __gen_uint(values->InlineData[5], 0, 31); 5988 5989 dw[10] = 5990 __gen_uint(values->InlineData[6], 0, 31); 5991 5992 dw[11] = 5993 __gen_uint(values->InlineData[7], 0, 31); 5994 5995 dw[12] = 5996 __gen_uint(values->InlineData[8], 0, 31); 5997 5998 dw[13] = 5999 __gen_uint(values->InlineData[9], 0, 31); 6000 6001 dw[14] = 6002 __gen_uint(values->InlineData[10], 0, 31); 6003 6004 dw[15] = 6005 __gen_uint(values->InlineData[11], 0, 31); 6006} 6007 6008#define GEN75_MEDIA_OBJECT_WALKER_length_bias 2 6009#define GEN75_MEDIA_OBJECT_WALKER_header \ 6010 .DWordLength = 15, \ 6011 .SubOpcode = 3, \ 6012 .MediaCommandOpcode = 1, \ 6013 .Pipeline = 2, \ 6014 .CommandType = 3 6015 6016struct GEN75_MEDIA_OBJECT_WALKER { 6017 uint32_t DWordLength; 6018 uint32_t SubOpcode; 6019 uint32_t MediaCommandOpcode; 6020 uint32_t Pipeline; 6021 uint32_t CommandType; 6022 uint32_t InterfaceDescriptorOffset; 6023 uint32_t IndirectDataLength; 6024 uint32_t UseScoreboard; 6025#define Notusingscoreboard 0 6026#define Usingscoreboard 1 6027 uint32_t ThreadSynchronization; 6028#define Nothreadsynchronization 0 6029#define Threaddispatchissynchronizedbythespawnrootthreadmessage 1 6030 uint32_t ChildrenPresent; 6031 uint64_t IndirectDataStartAddress; 6032 uint32_t ScoreboardMask; 6033 int32_t MidLoopUnitX; 6034 int32_t LocalMidLoopUnitY; 6035 uint32_t MiddleLoopExtraSteps; 6036 uint32_t ColorCountMinusOne; 6037 uint32_t QuadMode; 6038 uint32_t Repel; 6039 uint32_t DualMode; 6040 uint32_t LocalLoopExecCount; 6041 uint32_t GlobalLoopExecCount; 6042 uint32_t BlockResolutionX; 6043 uint32_t BlockResolutionY; 6044 uint32_t LocalStartX; 6045 uint32_t LocalStartY; 6046 int32_t LocalOuterLoopStrideX; 6047 int32_t LocalOuterLoopStrideY; 6048 int32_t LocalInnerLoopUnitX; 6049 int32_t LocalInnerLoopUnitY; 6050 uint32_t GlobalResolutionX; 6051 uint32_t GlobalResolutionY; 6052 int32_t GlobalStartX; 6053 int32_t GlobalStartY; 6054 int32_t GlobalOuterLoopStrideX; 6055 int32_t GlobalOuterLoopStrideY; 6056 int32_t GlobalInnerLoopUnitX; 6057 int32_t GlobalInnerLoopUnitY; 6058 /* variable length fields follow */ 6059}; 6060 6061static inline void 6062GEN75_MEDIA_OBJECT_WALKER_pack(__attribute__((unused)) __gen_user_data *data, 6063 __attribute__((unused)) void * restrict dst, 6064 __attribute__((unused)) const struct GEN75_MEDIA_OBJECT_WALKER * restrict values) 6065{ 6066 uint32_t * restrict dw = (uint32_t * restrict) dst; 6067 6068 dw[0] = 6069 __gen_uint(values->DWordLength, 0, 15) | 6070 __gen_uint(values->SubOpcode, 16, 23) | 6071 __gen_uint(values->MediaCommandOpcode, 24, 26) | 6072 __gen_uint(values->Pipeline, 27, 28) | 6073 __gen_uint(values->CommandType, 29, 31); 6074 6075 dw[1] = 6076 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 6077 6078 dw[2] = 6079 __gen_uint(values->IndirectDataLength, 0, 16) | 6080 __gen_uint(values->UseScoreboard, 21, 21) | 6081 __gen_uint(values->ThreadSynchronization, 24, 24) | 6082 __gen_uint(values->ChildrenPresent, 31, 31); 6083 6084 dw[3] = 6085 __gen_offset(values->IndirectDataStartAddress, 0, 31); 6086 6087 dw[4] = 0; 6088 6089 dw[5] = 6090 __gen_uint(values->ScoreboardMask, 0, 7); 6091 6092 dw[6] = 6093 __gen_sint(values->MidLoopUnitX, 8, 9) | 6094 __gen_sint(values->LocalMidLoopUnitY, 12, 13) | 6095 __gen_uint(values->MiddleLoopExtraSteps, 16, 20) | 6096 __gen_uint(values->ColorCountMinusOne, 24, 27) | 6097 __gen_uint(values->QuadMode, 29, 29) | 6098 __gen_uint(values->Repel, 30, 30) | 6099 __gen_uint(values->DualMode, 31, 31); 6100 6101 dw[7] = 6102 __gen_uint(values->LocalLoopExecCount, 0, 9) | 6103 __gen_uint(values->GlobalLoopExecCount, 16, 25); 6104 6105 dw[8] = 6106 __gen_uint(values->BlockResolutionX, 0, 8) | 6107 __gen_uint(values->BlockResolutionY, 16, 24); 6108 6109 dw[9] = 6110 __gen_uint(values->LocalStartX, 0, 8) | 6111 __gen_uint(values->LocalStartY, 16, 24); 6112 6113 dw[10] = 0; 6114 6115 dw[11] = 6116 __gen_sint(values->LocalOuterLoopStrideX, 0, 9) | 6117 __gen_sint(values->LocalOuterLoopStrideY, 16, 25); 6118 6119 dw[12] = 6120 __gen_sint(values->LocalInnerLoopUnitX, 0, 9) | 6121 __gen_sint(values->LocalInnerLoopUnitY, 16, 25); 6122 6123 dw[13] = 6124 __gen_uint(values->GlobalResolutionX, 0, 8) | 6125 __gen_uint(values->GlobalResolutionY, 16, 24); 6126 6127 dw[14] = 6128 __gen_sint(values->GlobalStartX, 0, 9) | 6129 __gen_sint(values->GlobalStartY, 16, 25); 6130 6131 dw[15] = 6132 __gen_sint(values->GlobalOuterLoopStrideX, 0, 9) | 6133 __gen_sint(values->GlobalOuterLoopStrideY, 16, 25); 6134 6135 dw[16] = 6136 __gen_sint(values->GlobalInnerLoopUnitX, 0, 9) | 6137 __gen_sint(values->GlobalInnerLoopUnitY, 16, 25); 6138} 6139 6140#define GEN75_MEDIA_STATE_FLUSH_length 2 6141#define GEN75_MEDIA_STATE_FLUSH_length_bias 2 6142#define GEN75_MEDIA_STATE_FLUSH_header \ 6143 .DWordLength = 0, \ 6144 .SubOpcode = 4, \ 6145 .MediaCommandOpcode = 0, \ 6146 .Pipeline = 2, \ 6147 .CommandType = 3 6148 6149struct GEN75_MEDIA_STATE_FLUSH { 6150 uint32_t DWordLength; 6151 uint32_t SubOpcode; 6152 uint32_t MediaCommandOpcode; 6153 uint32_t Pipeline; 6154 uint32_t CommandType; 6155 uint32_t InterfaceDescriptorOffset; 6156 uint32_t WatermarkRequired; 6157 bool FlushtoGO; 6158 bool DisablePreemption; 6159}; 6160 6161static inline void 6162GEN75_MEDIA_STATE_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 6163 __attribute__((unused)) void * restrict dst, 6164 __attribute__((unused)) const struct GEN75_MEDIA_STATE_FLUSH * restrict values) 6165{ 6166 uint32_t * restrict dw = (uint32_t * restrict) dst; 6167 6168 dw[0] = 6169 __gen_uint(values->DWordLength, 0, 15) | 6170 __gen_uint(values->SubOpcode, 16, 23) | 6171 __gen_uint(values->MediaCommandOpcode, 24, 26) | 6172 __gen_uint(values->Pipeline, 27, 28) | 6173 __gen_uint(values->CommandType, 29, 31); 6174 6175 dw[1] = 6176 __gen_uint(values->InterfaceDescriptorOffset, 0, 5) | 6177 __gen_uint(values->WatermarkRequired, 6, 6) | 6178 __gen_uint(values->FlushtoGO, 7, 7) | 6179 __gen_uint(values->DisablePreemption, 8, 8); 6180} 6181 6182#define GEN75_MEDIA_VFE_STATE_length 8 6183#define GEN75_MEDIA_VFE_STATE_length_bias 2 6184#define GEN75_MEDIA_VFE_STATE_header \ 6185 .DWordLength = 6, \ 6186 .SubOpcode = 0, \ 6187 .MediaCommandOpcode = 0, \ 6188 .Pipeline = 2, \ 6189 .CommandType = 3 6190 6191struct GEN75_MEDIA_VFE_STATE { 6192 uint32_t DWordLength; 6193 uint32_t SubOpcode; 6194 uint32_t MediaCommandOpcode; 6195 uint32_t Pipeline; 6196 uint32_t CommandType; 6197 uint32_t PerThreadScratchSpace; 6198 uint32_t StackSize; 6199 __gen_address_type ScratchSpaceBasePointer; 6200 uint32_t GPGPUMode; 6201 uint32_t BypassGatewayControl; 6202#define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0 6203#define BypassingOpenGatewayCloseGatewayprotocol 1 6204 uint32_t ResetGatewayTimer; 6205#define Maintainingtheexistingtimestampstate 0 6206#define Resettingrelativetimerandlatchingtheglobaltimestamp 1 6207 uint32_t NumberofURBEntries; 6208 uint32_t MaximumNumberofThreads; 6209 uint32_t HalfSliceDisable; 6210 uint32_t CURBEAllocationSize; 6211 uint32_t URBEntryAllocationSize; 6212 uint32_t ScoreboardMask; 6213 uint32_t ScoreboardType; 6214#define StallingScoreboard 0 6215#define NonStallingScoreboard 1 6216 uint32_t ScoreboardEnable; 6217#define Scoreboarddisabled 0 6218#define Scoreboardenabled 1 6219 int32_t Scoreboard0DeltaX; 6220 int32_t Scoreboard0DeltaY; 6221 int32_t Scoreboard1DeltaX; 6222 int32_t Scoreboard1DeltaY; 6223 int32_t Scoreboard2DeltaX; 6224 int32_t Scoreboard2DeltaY; 6225 int32_t Scoreboard3DeltaX; 6226 int32_t Scoreboard3DeltaY; 6227 int32_t Scoreboard4DeltaX; 6228 int32_t Scoreboard4DeltaY; 6229 int32_t Scoreboard5DeltaX; 6230 int32_t Scoreboard5DeltaY; 6231 int32_t Scoreboard6DeltaX; 6232 int32_t Scoreboard6DeltaY; 6233 int32_t Scoreboard7DeltaX; 6234 int32_t Scoreboard7DeltaY; 6235}; 6236 6237static inline void 6238GEN75_MEDIA_VFE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 6239 __attribute__((unused)) void * restrict dst, 6240 __attribute__((unused)) const struct GEN75_MEDIA_VFE_STATE * restrict values) 6241{ 6242 uint32_t * restrict dw = (uint32_t * restrict) dst; 6243 6244 dw[0] = 6245 __gen_uint(values->DWordLength, 0, 15) | 6246 __gen_uint(values->SubOpcode, 16, 23) | 6247 __gen_uint(values->MediaCommandOpcode, 24, 26) | 6248 __gen_uint(values->Pipeline, 27, 28) | 6249 __gen_uint(values->CommandType, 29, 31); 6250 6251 const uint32_t v1 = 6252 __gen_uint(values->PerThreadScratchSpace, 0, 3) | 6253 __gen_uint(values->StackSize, 4, 7); 6254 dw[1] = __gen_combine_address(data, &dw[1], values->ScratchSpaceBasePointer, v1); 6255 6256 dw[2] = 6257 __gen_uint(values->GPGPUMode, 2, 2) | 6258 __gen_uint(values->BypassGatewayControl, 6, 6) | 6259 __gen_uint(values->ResetGatewayTimer, 7, 7) | 6260 __gen_uint(values->NumberofURBEntries, 8, 15) | 6261 __gen_uint(values->MaximumNumberofThreads, 16, 31); 6262 6263 dw[3] = 6264 __gen_uint(values->HalfSliceDisable, 0, 1); 6265 6266 dw[4] = 6267 __gen_uint(values->CURBEAllocationSize, 0, 15) | 6268 __gen_uint(values->URBEntryAllocationSize, 16, 31); 6269 6270 dw[5] = 6271 __gen_uint(values->ScoreboardMask, 0, 7) | 6272 __gen_uint(values->ScoreboardType, 30, 30) | 6273 __gen_uint(values->ScoreboardEnable, 31, 31); 6274 6275 dw[6] = 6276 __gen_sint(values->Scoreboard0DeltaX, 0, 3) | 6277 __gen_sint(values->Scoreboard0DeltaY, 4, 7) | 6278 __gen_sint(values->Scoreboard1DeltaX, 8, 11) | 6279 __gen_sint(values->Scoreboard1DeltaY, 12, 15) | 6280 __gen_sint(values->Scoreboard2DeltaX, 16, 19) | 6281 __gen_sint(values->Scoreboard2DeltaY, 20, 23) | 6282 __gen_sint(values->Scoreboard3DeltaX, 24, 27) | 6283 __gen_sint(values->Scoreboard3DeltaY, 28, 31); 6284 6285 dw[7] = 6286 __gen_sint(values->Scoreboard4DeltaX, 0, 3) | 6287 __gen_sint(values->Scoreboard4DeltaY, 4, 7) | 6288 __gen_sint(values->Scoreboard5DeltaX, 8, 11) | 6289 __gen_sint(values->Scoreboard5DeltaY, 12, 15) | 6290 __gen_sint(values->Scoreboard6DeltaX, 16, 19) | 6291 __gen_sint(values->Scoreboard6DeltaY, 20, 23) | 6292 __gen_sint(values->Scoreboard7DeltaX, 24, 27) | 6293 __gen_sint(values->Scoreboard7DeltaY, 28, 31); 6294} 6295 6296#define GEN75_MI_ARB_CHECK_length 1 6297#define GEN75_MI_ARB_CHECK_length_bias 1 6298#define GEN75_MI_ARB_CHECK_header \ 6299 .MICommandOpcode = 5, \ 6300 .CommandType = 0 6301 6302struct GEN75_MI_ARB_CHECK { 6303 uint32_t MICommandOpcode; 6304 uint32_t CommandType; 6305}; 6306 6307static inline void 6308GEN75_MI_ARB_CHECK_pack(__attribute__((unused)) __gen_user_data *data, 6309 __attribute__((unused)) void * restrict dst, 6310 __attribute__((unused)) const struct GEN75_MI_ARB_CHECK * restrict values) 6311{ 6312 uint32_t * restrict dw = (uint32_t * restrict) dst; 6313 6314 dw[0] = 6315 __gen_uint(values->MICommandOpcode, 23, 28) | 6316 __gen_uint(values->CommandType, 29, 31); 6317} 6318 6319#define GEN75_MI_ARB_ON_OFF_length 1 6320#define GEN75_MI_ARB_ON_OFF_length_bias 1 6321#define GEN75_MI_ARB_ON_OFF_header \ 6322 .MICommandOpcode = 8, \ 6323 .CommandType = 0 6324 6325struct GEN75_MI_ARB_ON_OFF { 6326 bool ArbitrationEnable; 6327 uint32_t MICommandOpcode; 6328 uint32_t CommandType; 6329}; 6330 6331static inline void 6332GEN75_MI_ARB_ON_OFF_pack(__attribute__((unused)) __gen_user_data *data, 6333 __attribute__((unused)) void * restrict dst, 6334 __attribute__((unused)) const struct GEN75_MI_ARB_ON_OFF * restrict values) 6335{ 6336 uint32_t * restrict dw = (uint32_t * restrict) dst; 6337 6338 dw[0] = 6339 __gen_uint(values->ArbitrationEnable, 0, 0) | 6340 __gen_uint(values->MICommandOpcode, 23, 28) | 6341 __gen_uint(values->CommandType, 29, 31); 6342} 6343 6344#define GEN75_MI_BATCH_BUFFER_END_length 1 6345#define GEN75_MI_BATCH_BUFFER_END_length_bias 1 6346#define GEN75_MI_BATCH_BUFFER_END_header \ 6347 .MICommandOpcode = 10, \ 6348 .CommandType = 0 6349 6350struct GEN75_MI_BATCH_BUFFER_END { 6351 uint32_t MICommandOpcode; 6352 uint32_t CommandType; 6353}; 6354 6355static inline void 6356GEN75_MI_BATCH_BUFFER_END_pack(__attribute__((unused)) __gen_user_data *data, 6357 __attribute__((unused)) void * restrict dst, 6358 __attribute__((unused)) const struct GEN75_MI_BATCH_BUFFER_END * restrict values) 6359{ 6360 uint32_t * restrict dw = (uint32_t * restrict) dst; 6361 6362 dw[0] = 6363 __gen_uint(values->MICommandOpcode, 23, 28) | 6364 __gen_uint(values->CommandType, 29, 31); 6365} 6366 6367#define GEN75_MI_BATCH_BUFFER_START_length 2 6368#define GEN75_MI_BATCH_BUFFER_START_length_bias 2 6369#define GEN75_MI_BATCH_BUFFER_START_header \ 6370 .DWordLength = 0, \ 6371 .MICommandOpcode = 49, \ 6372 .CommandType = 0 6373 6374struct GEN75_MI_BATCH_BUFFER_START { 6375 uint32_t DWordLength; 6376 uint32_t AddressSpaceIndicator; 6377#define ASI_GGTT 0 6378#define ASI_PPGTT 1 6379 bool ResourceStreamerEnable; 6380 bool ClearCommandBufferEnable; 6381 bool NonPrivileged; 6382 bool PredicationEnable; 6383 bool AddOffsetEnable; 6384 uint32_t SecondLevelBatchBuffer; 6385#define Firstlevelbatch 0 6386#define Secondlevelbatch 1 6387 uint32_t MICommandOpcode; 6388 uint32_t CommandType; 6389 __gen_address_type BatchBufferStartAddress; 6390}; 6391 6392static inline void 6393GEN75_MI_BATCH_BUFFER_START_pack(__attribute__((unused)) __gen_user_data *data, 6394 __attribute__((unused)) void * restrict dst, 6395 __attribute__((unused)) const struct GEN75_MI_BATCH_BUFFER_START * restrict values) 6396{ 6397 uint32_t * restrict dw = (uint32_t * restrict) dst; 6398 6399 dw[0] = 6400 __gen_uint(values->DWordLength, 0, 7) | 6401 __gen_uint(values->AddressSpaceIndicator, 8, 8) | 6402 __gen_uint(values->ResourceStreamerEnable, 10, 10) | 6403 __gen_uint(values->ClearCommandBufferEnable, 11, 11) | 6404 __gen_uint(values->NonPrivileged, 13, 13) | 6405 __gen_uint(values->PredicationEnable, 15, 15) | 6406 __gen_uint(values->AddOffsetEnable, 16, 16) | 6407 __gen_uint(values->SecondLevelBatchBuffer, 22, 22) | 6408 __gen_uint(values->MICommandOpcode, 23, 28) | 6409 __gen_uint(values->CommandType, 29, 31); 6410 6411 dw[1] = __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, 0); 6412} 6413 6414#define GEN75_MI_CLFLUSH_length_bias 2 6415#define GEN75_MI_CLFLUSH_header \ 6416 .DWordLength = 1, \ 6417 .MICommandOpcode = 39, \ 6418 .CommandType = 0 6419 6420struct GEN75_MI_CLFLUSH { 6421 uint32_t DWordLength; 6422 bool UseGlobalGTT; 6423 uint32_t MICommandOpcode; 6424 uint32_t CommandType; 6425 uint32_t StartingCachelineOffset; 6426 __gen_address_type PageBaseAddress; 6427 __gen_address_type PageBaseAddressHigh; 6428 /* variable length fields follow */ 6429}; 6430 6431static inline void 6432GEN75_MI_CLFLUSH_pack(__attribute__((unused)) __gen_user_data *data, 6433 __attribute__((unused)) void * restrict dst, 6434 __attribute__((unused)) const struct GEN75_MI_CLFLUSH * restrict values) 6435{ 6436 uint32_t * restrict dw = (uint32_t * restrict) dst; 6437 6438 dw[0] = 6439 __gen_uint(values->DWordLength, 0, 9) | 6440 __gen_uint(values->UseGlobalGTT, 22, 22) | 6441 __gen_uint(values->MICommandOpcode, 23, 28) | 6442 __gen_uint(values->CommandType, 29, 31); 6443 6444 const uint32_t v1 = 6445 __gen_uint(values->StartingCachelineOffset, 6, 11); 6446 dw[1] = __gen_combine_address(data, &dw[1], values->PageBaseAddress, v1); 6447 6448 dw[2] = __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, 0); 6449} 6450 6451#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length 2 6452#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 2 6453#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_header\ 6454 .DWordLength = 0, \ 6455 .CompareSemaphore = 0, \ 6456 .MICommandOpcode = 54, \ 6457 .CommandType = 0 6458 6459struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END { 6460 uint32_t DWordLength; 6461 uint32_t CompareSemaphore; 6462 bool UseGlobalGTT; 6463 uint32_t MICommandOpcode; 6464 uint32_t CommandType; 6465 uint32_t CompareDataDword; 6466 __gen_address_type CompareAddress; 6467}; 6468 6469static inline void 6470GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__attribute__((unused)) __gen_user_data *data, 6471 __attribute__((unused)) void * restrict dst, 6472 __attribute__((unused)) const struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values) 6473{ 6474 uint32_t * restrict dw = (uint32_t * restrict) dst; 6475 6476 dw[0] = 6477 __gen_uint(values->DWordLength, 0, 7) | 6478 __gen_uint(values->CompareSemaphore, 21, 21) | 6479 __gen_uint(values->UseGlobalGTT, 22, 22) | 6480 __gen_uint(values->MICommandOpcode, 23, 28) | 6481 __gen_uint(values->CommandType, 29, 31); 6482 6483 dw[1] = 6484 __gen_uint(values->CompareDataDword, 0, 31); 6485} 6486 6487#define GEN75_MI_FLUSH_length 1 6488#define GEN75_MI_FLUSH_length_bias 1 6489#define GEN75_MI_FLUSH_header \ 6490 .MICommandOpcode = 4, \ 6491 .CommandType = 0 6492 6493struct GEN75_MI_FLUSH { 6494 uint32_t StateInstructionCacheInvalidate; 6495#define DontInvalidate 0 6496#define Invalidate 1 6497 uint32_t RenderCacheFlushInhibit; 6498#define Flush 0 6499#define DontFlush 1 6500 uint32_t GlobalSnapshotCountReset; 6501#define DontReset 0 6502#define Reset 1 6503 bool GenericMediaStateClear; 6504 bool IndirectStatePointersDisable; 6505 uint32_t MICommandOpcode; 6506 uint32_t CommandType; 6507}; 6508 6509static inline void 6510GEN75_MI_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 6511 __attribute__((unused)) void * restrict dst, 6512 __attribute__((unused)) const struct GEN75_MI_FLUSH * restrict values) 6513{ 6514 uint32_t * restrict dw = (uint32_t * restrict) dst; 6515 6516 dw[0] = 6517 __gen_uint(values->StateInstructionCacheInvalidate, 1, 1) | 6518 __gen_uint(values->RenderCacheFlushInhibit, 2, 2) | 6519 __gen_uint(values->GlobalSnapshotCountReset, 3, 3) | 6520 __gen_uint(values->GenericMediaStateClear, 4, 4) | 6521 __gen_uint(values->IndirectStatePointersDisable, 5, 5) | 6522 __gen_uint(values->MICommandOpcode, 23, 28) | 6523 __gen_uint(values->CommandType, 29, 31); 6524} 6525 6526#define GEN75_MI_LOAD_REGISTER_IMM_length 3 6527#define GEN75_MI_LOAD_REGISTER_IMM_length_bias 2 6528#define GEN75_MI_LOAD_REGISTER_IMM_header \ 6529 .DWordLength = 1, \ 6530 .MICommandOpcode = 34, \ 6531 .CommandType = 0 6532 6533struct GEN75_MI_LOAD_REGISTER_IMM { 6534 uint32_t DWordLength; 6535 uint32_t ByteWriteDisables; 6536 uint32_t MICommandOpcode; 6537 uint32_t CommandType; 6538 uint64_t RegisterOffset; 6539 uint32_t DataDWord; 6540 /* variable length fields follow */ 6541}; 6542 6543static inline void 6544GEN75_MI_LOAD_REGISTER_IMM_pack(__attribute__((unused)) __gen_user_data *data, 6545 __attribute__((unused)) void * restrict dst, 6546 __attribute__((unused)) const struct GEN75_MI_LOAD_REGISTER_IMM * restrict values) 6547{ 6548 uint32_t * restrict dw = (uint32_t * restrict) dst; 6549 6550 dw[0] = 6551 __gen_uint(values->DWordLength, 0, 7) | 6552 __gen_uint(values->ByteWriteDisables, 8, 11) | 6553 __gen_uint(values->MICommandOpcode, 23, 28) | 6554 __gen_uint(values->CommandType, 29, 31); 6555 6556 dw[1] = 6557 __gen_offset(values->RegisterOffset, 2, 22); 6558 6559 dw[2] = 6560 __gen_uint(values->DataDWord, 0, 31); 6561} 6562 6563#define GEN75_MI_LOAD_REGISTER_MEM_length 3 6564#define GEN75_MI_LOAD_REGISTER_MEM_length_bias 2 6565#define GEN75_MI_LOAD_REGISTER_MEM_header \ 6566 .DWordLength = 1, \ 6567 .MICommandOpcode = 41, \ 6568 .CommandType = 0 6569 6570struct GEN75_MI_LOAD_REGISTER_MEM { 6571 uint32_t DWordLength; 6572 bool AsyncModeEnable; 6573 bool UseGlobalGTT; 6574 uint32_t MICommandOpcode; 6575 uint32_t CommandType; 6576 uint64_t RegisterAddress; 6577 __gen_address_type MemoryAddress; 6578}; 6579 6580static inline void 6581GEN75_MI_LOAD_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 6582 __attribute__((unused)) void * restrict dst, 6583 __attribute__((unused)) const struct GEN75_MI_LOAD_REGISTER_MEM * restrict values) 6584{ 6585 uint32_t * restrict dw = (uint32_t * restrict) dst; 6586 6587 dw[0] = 6588 __gen_uint(values->DWordLength, 0, 7) | 6589 __gen_uint(values->AsyncModeEnable, 21, 21) | 6590 __gen_uint(values->UseGlobalGTT, 22, 22) | 6591 __gen_uint(values->MICommandOpcode, 23, 28) | 6592 __gen_uint(values->CommandType, 29, 31); 6593 6594 dw[1] = 6595 __gen_offset(values->RegisterAddress, 2, 22); 6596 6597 dw[2] = __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 6598} 6599 6600#define GEN75_MI_LOAD_REGISTER_REG_length 3 6601#define GEN75_MI_LOAD_REGISTER_REG_length_bias 2 6602#define GEN75_MI_LOAD_REGISTER_REG_header \ 6603 .DWordLength = 1, \ 6604 .MICommandOpcode = 42, \ 6605 .CommandType = 0 6606 6607struct GEN75_MI_LOAD_REGISTER_REG { 6608 uint32_t DWordLength; 6609 uint32_t MICommandOpcode; 6610 uint32_t CommandType; 6611 uint64_t SourceRegisterAddress; 6612 uint64_t DestinationRegisterAddress; 6613}; 6614 6615static inline void 6616GEN75_MI_LOAD_REGISTER_REG_pack(__attribute__((unused)) __gen_user_data *data, 6617 __attribute__((unused)) void * restrict dst, 6618 __attribute__((unused)) const struct GEN75_MI_LOAD_REGISTER_REG * restrict values) 6619{ 6620 uint32_t * restrict dw = (uint32_t * restrict) dst; 6621 6622 dw[0] = 6623 __gen_uint(values->DWordLength, 0, 7) | 6624 __gen_uint(values->MICommandOpcode, 23, 28) | 6625 __gen_uint(values->CommandType, 29, 31); 6626 6627 dw[1] = 6628 __gen_offset(values->SourceRegisterAddress, 2, 22); 6629 6630 dw[2] = 6631 __gen_offset(values->DestinationRegisterAddress, 2, 22); 6632} 6633 6634#define GEN75_MI_LOAD_SCAN_LINES_EXCL_length 2 6635#define GEN75_MI_LOAD_SCAN_LINES_EXCL_length_bias 2 6636#define GEN75_MI_LOAD_SCAN_LINES_EXCL_header \ 6637 .DWordLength = 0, \ 6638 .MICommandOpcode = 19, \ 6639 .CommandType = 0 6640 6641struct GEN75_MI_LOAD_SCAN_LINES_EXCL { 6642 uint32_t DWordLength; 6643 uint32_t DisplayPlaneSelect; 6644#define DisplayPlaneA 0 6645#define DisplayPlaneB 1 6646#define DisplayPlaneC 4 6647 uint32_t MICommandOpcode; 6648 uint32_t CommandType; 6649 uint32_t EndScanLineNumber; 6650 uint32_t StartScanLineNumber; 6651}; 6652 6653static inline void 6654GEN75_MI_LOAD_SCAN_LINES_EXCL_pack(__attribute__((unused)) __gen_user_data *data, 6655 __attribute__((unused)) void * restrict dst, 6656 __attribute__((unused)) const struct GEN75_MI_LOAD_SCAN_LINES_EXCL * restrict values) 6657{ 6658 uint32_t * restrict dw = (uint32_t * restrict) dst; 6659 6660 dw[0] = 6661 __gen_uint(values->DWordLength, 0, 5) | 6662 __gen_uint(values->DisplayPlaneSelect, 19, 21) | 6663 __gen_uint(values->MICommandOpcode, 23, 28) | 6664 __gen_uint(values->CommandType, 29, 31); 6665 6666 dw[1] = 6667 __gen_uint(values->EndScanLineNumber, 0, 12) | 6668 __gen_uint(values->StartScanLineNumber, 16, 28); 6669} 6670 6671#define GEN75_MI_LOAD_SCAN_LINES_INCL_length 2 6672#define GEN75_MI_LOAD_SCAN_LINES_INCL_length_bias 2 6673#define GEN75_MI_LOAD_SCAN_LINES_INCL_header \ 6674 .DWordLength = 0, \ 6675 .MICommandOpcode = 18, \ 6676 .CommandType = 0 6677 6678struct GEN75_MI_LOAD_SCAN_LINES_INCL { 6679 uint32_t DWordLength; 6680 uint32_t DisplayPlaneSelect; 6681#define DisplayPlaneA 0 6682#define DisplayPlaneB 1 6683#define DisplayPlaneC 4 6684 uint32_t MICommandOpcode; 6685 uint32_t CommandType; 6686 uint32_t EndScanLineNumber; 6687 uint32_t StartScanLineNumber; 6688}; 6689 6690static inline void 6691GEN75_MI_LOAD_SCAN_LINES_INCL_pack(__attribute__((unused)) __gen_user_data *data, 6692 __attribute__((unused)) void * restrict dst, 6693 __attribute__((unused)) const struct GEN75_MI_LOAD_SCAN_LINES_INCL * restrict values) 6694{ 6695 uint32_t * restrict dw = (uint32_t * restrict) dst; 6696 6697 dw[0] = 6698 __gen_uint(values->DWordLength, 0, 5) | 6699 __gen_uint(values->DisplayPlaneSelect, 19, 21) | 6700 __gen_uint(values->MICommandOpcode, 23, 28) | 6701 __gen_uint(values->CommandType, 29, 31); 6702 6703 dw[1] = 6704 __gen_uint(values->EndScanLineNumber, 0, 12) | 6705 __gen_uint(values->StartScanLineNumber, 16, 28); 6706} 6707 6708#define GEN75_MI_LOAD_URB_MEM_length 3 6709#define GEN75_MI_LOAD_URB_MEM_length_bias 2 6710#define GEN75_MI_LOAD_URB_MEM_header \ 6711 .DWordLength = 1, \ 6712 .MICommandOpcode = 44, \ 6713 .CommandType = 0 6714 6715struct GEN75_MI_LOAD_URB_MEM { 6716 uint32_t DWordLength; 6717 uint32_t MICommandOpcode; 6718 uint32_t CommandType; 6719 uint32_t URBAddress; 6720 __gen_address_type MemoryAddress; 6721}; 6722 6723static inline void 6724GEN75_MI_LOAD_URB_MEM_pack(__attribute__((unused)) __gen_user_data *data, 6725 __attribute__((unused)) void * restrict dst, 6726 __attribute__((unused)) const struct GEN75_MI_LOAD_URB_MEM * restrict values) 6727{ 6728 uint32_t * restrict dw = (uint32_t * restrict) dst; 6729 6730 dw[0] = 6731 __gen_uint(values->DWordLength, 0, 7) | 6732 __gen_uint(values->MICommandOpcode, 23, 28) | 6733 __gen_uint(values->CommandType, 29, 31); 6734 6735 dw[1] = 6736 __gen_uint(values->URBAddress, 2, 14); 6737 6738 dw[2] = __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 6739} 6740 6741#define GEN75_MI_MATH_length_bias 2 6742#define GEN75_MI_MATH_header \ 6743 .DWordLength = 0, \ 6744 .MICommandOpcode = 26, \ 6745 .CommandType = 0 6746 6747struct GEN75_MI_MATH { 6748 uint32_t DWordLength; 6749 uint32_t MICommandOpcode; 6750 uint32_t CommandType; 6751 /* variable length fields follow */ 6752}; 6753 6754static inline void 6755GEN75_MI_MATH_pack(__attribute__((unused)) __gen_user_data *data, 6756 __attribute__((unused)) void * restrict dst, 6757 __attribute__((unused)) const struct GEN75_MI_MATH * restrict values) 6758{ 6759 uint32_t * restrict dw = (uint32_t * restrict) dst; 6760 6761 dw[0] = 6762 __gen_uint(values->DWordLength, 0, 5) | 6763 __gen_uint(values->MICommandOpcode, 23, 28) | 6764 __gen_uint(values->CommandType, 29, 31); 6765} 6766 6767#define GEN75_MI_NOOP_length 1 6768#define GEN75_MI_NOOP_length_bias 1 6769#define GEN75_MI_NOOP_header \ 6770 .MICommandOpcode = 0, \ 6771 .CommandType = 0 6772 6773struct GEN75_MI_NOOP { 6774 uint32_t IdentificationNumber; 6775 bool IdentificationNumberRegisterWriteEnable; 6776 uint32_t MICommandOpcode; 6777 uint32_t CommandType; 6778}; 6779 6780static inline void 6781GEN75_MI_NOOP_pack(__attribute__((unused)) __gen_user_data *data, 6782 __attribute__((unused)) void * restrict dst, 6783 __attribute__((unused)) const struct GEN75_MI_NOOP * restrict values) 6784{ 6785 uint32_t * restrict dw = (uint32_t * restrict) dst; 6786 6787 dw[0] = 6788 __gen_uint(values->IdentificationNumber, 0, 21) | 6789 __gen_uint(values->IdentificationNumberRegisterWriteEnable, 22, 22) | 6790 __gen_uint(values->MICommandOpcode, 23, 28) | 6791 __gen_uint(values->CommandType, 29, 31); 6792} 6793 6794#define GEN75_MI_PREDICATE_length 1 6795#define GEN75_MI_PREDICATE_length_bias 1 6796#define GEN75_MI_PREDICATE_header \ 6797 .MICommandOpcode = 12, \ 6798 .CommandType = 0 6799 6800struct GEN75_MI_PREDICATE { 6801 uint32_t CompareOperation; 6802#define COMPARE_TRUE 0 6803#define COMPARE_FALSE 1 6804#define COMPARE_SRCS_EQUAL 2 6805#define COMPARE_DELTAS_EQUAL 3 6806 uint32_t CombineOperation; 6807#define COMBINE_SET 0 6808#define COMBINE_AND 1 6809#define COMBINE_OR 2 6810#define COMBINE_XOR 3 6811 uint32_t LoadOperation; 6812#define LOAD_KEEP 0 6813#define LOAD_LOAD 2 6814#define LOAD_LOADINV 3 6815 uint32_t MICommandOpcode; 6816 uint32_t CommandType; 6817}; 6818 6819static inline void 6820GEN75_MI_PREDICATE_pack(__attribute__((unused)) __gen_user_data *data, 6821 __attribute__((unused)) void * restrict dst, 6822 __attribute__((unused)) const struct GEN75_MI_PREDICATE * restrict values) 6823{ 6824 uint32_t * restrict dw = (uint32_t * restrict) dst; 6825 6826 dw[0] = 6827 __gen_uint(values->CompareOperation, 0, 1) | 6828 __gen_uint(values->CombineOperation, 3, 4) | 6829 __gen_uint(values->LoadOperation, 6, 7) | 6830 __gen_uint(values->MICommandOpcode, 23, 28) | 6831 __gen_uint(values->CommandType, 29, 31); 6832} 6833 6834#define GEN75_MI_REPORT_HEAD_length 1 6835#define GEN75_MI_REPORT_HEAD_length_bias 1 6836#define GEN75_MI_REPORT_HEAD_header \ 6837 .MICommandOpcode = 7, \ 6838 .CommandType = 0 6839 6840struct GEN75_MI_REPORT_HEAD { 6841 uint32_t MICommandOpcode; 6842 uint32_t CommandType; 6843}; 6844 6845static inline void 6846GEN75_MI_REPORT_HEAD_pack(__attribute__((unused)) __gen_user_data *data, 6847 __attribute__((unused)) void * restrict dst, 6848 __attribute__((unused)) const struct GEN75_MI_REPORT_HEAD * restrict values) 6849{ 6850 uint32_t * restrict dw = (uint32_t * restrict) dst; 6851 6852 dw[0] = 6853 __gen_uint(values->MICommandOpcode, 23, 28) | 6854 __gen_uint(values->CommandType, 29, 31); 6855} 6856 6857#define GEN75_MI_REPORT_PERF_COUNT_length 3 6858#define GEN75_MI_REPORT_PERF_COUNT_length_bias 2 6859#define GEN75_MI_REPORT_PERF_COUNT_header \ 6860 .DWordLength = 1, \ 6861 .MICommandOpcode = 40, \ 6862 .CommandType = 0 6863 6864struct GEN75_MI_REPORT_PERF_COUNT { 6865 uint32_t DWordLength; 6866 uint32_t MICommandOpcode; 6867 uint32_t CommandType; 6868 bool UseGlobalGTT; 6869 uint32_t CoreModeEnable; 6870 __gen_address_type MemoryAddress; 6871 uint32_t ReportID; 6872}; 6873 6874static inline void 6875GEN75_MI_REPORT_PERF_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 6876 __attribute__((unused)) void * restrict dst, 6877 __attribute__((unused)) const struct GEN75_MI_REPORT_PERF_COUNT * restrict values) 6878{ 6879 uint32_t * restrict dw = (uint32_t * restrict) dst; 6880 6881 dw[0] = 6882 __gen_uint(values->DWordLength, 0, 5) | 6883 __gen_uint(values->MICommandOpcode, 23, 28) | 6884 __gen_uint(values->CommandType, 29, 31); 6885 6886 const uint32_t v1 = 6887 __gen_uint(values->UseGlobalGTT, 0, 0) | 6888 __gen_uint(values->CoreModeEnable, 4, 4); 6889 dw[1] = __gen_combine_address(data, &dw[1], values->MemoryAddress, v1); 6890 6891 dw[2] = 6892 __gen_uint(values->ReportID, 0, 31); 6893} 6894 6895#define GEN75_MI_RS_CONTEXT_length 1 6896#define GEN75_MI_RS_CONTEXT_length_bias 1 6897#define GEN75_MI_RS_CONTEXT_header \ 6898 .MICommandOpcode = 15, \ 6899 .CommandType = 0 6900 6901struct GEN75_MI_RS_CONTEXT { 6902 uint32_t ResourceStreamerSave; 6903#define RS_Restore 0 6904#define RS_Save 1 6905 uint32_t MICommandOpcode; 6906 uint32_t CommandType; 6907}; 6908 6909static inline void 6910GEN75_MI_RS_CONTEXT_pack(__attribute__((unused)) __gen_user_data *data, 6911 __attribute__((unused)) void * restrict dst, 6912 __attribute__((unused)) const struct GEN75_MI_RS_CONTEXT * restrict values) 6913{ 6914 uint32_t * restrict dw = (uint32_t * restrict) dst; 6915 6916 dw[0] = 6917 __gen_uint(values->ResourceStreamerSave, 0, 0) | 6918 __gen_uint(values->MICommandOpcode, 23, 28) | 6919 __gen_uint(values->CommandType, 29, 31); 6920} 6921 6922#define GEN75_MI_RS_CONTROL_length 1 6923#define GEN75_MI_RS_CONTROL_length_bias 1 6924#define GEN75_MI_RS_CONTROL_header \ 6925 .MICommandOpcode = 6, \ 6926 .CommandType = 0 6927 6928struct GEN75_MI_RS_CONTROL { 6929 uint32_t ResourceStreamerControl; 6930#define RS_Stop 0 6931#define RS_Start 1 6932 uint32_t MICommandOpcode; 6933 uint32_t CommandType; 6934}; 6935 6936static inline void 6937GEN75_MI_RS_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 6938 __attribute__((unused)) void * restrict dst, 6939 __attribute__((unused)) const struct GEN75_MI_RS_CONTROL * restrict values) 6940{ 6941 uint32_t * restrict dw = (uint32_t * restrict) dst; 6942 6943 dw[0] = 6944 __gen_uint(values->ResourceStreamerControl, 0, 0) | 6945 __gen_uint(values->MICommandOpcode, 23, 28) | 6946 __gen_uint(values->CommandType, 29, 31); 6947} 6948 6949#define GEN75_MI_RS_STORE_DATA_IMM_length 4 6950#define GEN75_MI_RS_STORE_DATA_IMM_length_bias 2 6951#define GEN75_MI_RS_STORE_DATA_IMM_header \ 6952 .DWordLength = 2, \ 6953 .MICommandOpcode = 43, \ 6954 .CommandType = 0 6955 6956struct GEN75_MI_RS_STORE_DATA_IMM { 6957 uint32_t DWordLength; 6958 uint32_t MICommandOpcode; 6959 uint32_t CommandType; 6960 uint32_t CoreModeEnable; 6961 __gen_address_type DestinationAddress; 6962 uint32_t DataDWord0; 6963}; 6964 6965static inline void 6966GEN75_MI_RS_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 6967 __attribute__((unused)) void * restrict dst, 6968 __attribute__((unused)) const struct GEN75_MI_RS_STORE_DATA_IMM * restrict values) 6969{ 6970 uint32_t * restrict dw = (uint32_t * restrict) dst; 6971 6972 dw[0] = 6973 __gen_uint(values->DWordLength, 0, 7) | 6974 __gen_uint(values->MICommandOpcode, 23, 28) | 6975 __gen_uint(values->CommandType, 29, 31); 6976 6977 dw[1] = 0; 6978 6979 const uint32_t v2 = 6980 __gen_uint(values->CoreModeEnable, 0, 0); 6981 dw[2] = __gen_combine_address(data, &dw[2], values->DestinationAddress, v2); 6982 6983 dw[3] = 6984 __gen_uint(values->DataDWord0, 0, 31); 6985} 6986 6987#define GEN75_MI_SEMAPHORE_MBOX_length 3 6988#define GEN75_MI_SEMAPHORE_MBOX_length_bias 2 6989#define GEN75_MI_SEMAPHORE_MBOX_header \ 6990 .DWordLength = 1, \ 6991 .MICommandOpcode = 22, \ 6992 .CommandType = 0 6993 6994struct GEN75_MI_SEMAPHORE_MBOX { 6995 uint32_t DWordLength; 6996 uint32_t GeneralRegisterSelect; 6997 uint32_t RegisterSelect; 6998#define RVSYNC 0 6999#define RVESYNC 1 7000#define RBSYNC 2 7001#define UseGeneralRegisterSelect 3 7002 uint32_t MICommandOpcode; 7003 uint32_t CommandType; 7004 uint32_t SemaphoreDataDword; 7005}; 7006 7007static inline void 7008GEN75_MI_SEMAPHORE_MBOX_pack(__attribute__((unused)) __gen_user_data *data, 7009 __attribute__((unused)) void * restrict dst, 7010 __attribute__((unused)) const struct GEN75_MI_SEMAPHORE_MBOX * restrict values) 7011{ 7012 uint32_t * restrict dw = (uint32_t * restrict) dst; 7013 7014 dw[0] = 7015 __gen_uint(values->DWordLength, 0, 7) | 7016 __gen_uint(values->GeneralRegisterSelect, 8, 13) | 7017 __gen_uint(values->RegisterSelect, 16, 17) | 7018 __gen_uint(values->MICommandOpcode, 23, 28) | 7019 __gen_uint(values->CommandType, 29, 31); 7020 7021 dw[1] = 7022 __gen_uint(values->SemaphoreDataDword, 0, 31); 7023 7024 dw[2] = 0; 7025} 7026 7027#define GEN75_MI_SET_CONTEXT_length 2 7028#define GEN75_MI_SET_CONTEXT_length_bias 2 7029#define GEN75_MI_SET_CONTEXT_header \ 7030 .DWordLength = 0, \ 7031 .MICommandOpcode = 24, \ 7032 .CommandType = 0 7033 7034struct GEN75_MI_SET_CONTEXT { 7035 uint32_t DWordLength; 7036 uint32_t MICommandOpcode; 7037 uint32_t CommandType; 7038 uint32_t RestoreInhibit; 7039 uint32_t ForceRestore; 7040 bool ResourceStreamerStateRestoreEnable; 7041 bool ResourceStreamerStateSaveEnable; 7042 bool CoreModeEnable; 7043 uint32_t ReservedMustbe1; 7044 __gen_address_type LogicalContextAddress; 7045}; 7046 7047static inline void 7048GEN75_MI_SET_CONTEXT_pack(__attribute__((unused)) __gen_user_data *data, 7049 __attribute__((unused)) void * restrict dst, 7050 __attribute__((unused)) const struct GEN75_MI_SET_CONTEXT * restrict values) 7051{ 7052 uint32_t * restrict dw = (uint32_t * restrict) dst; 7053 7054 dw[0] = 7055 __gen_uint(values->DWordLength, 0, 7) | 7056 __gen_uint(values->MICommandOpcode, 23, 28) | 7057 __gen_uint(values->CommandType, 29, 31); 7058 7059 const uint32_t v1 = 7060 __gen_uint(values->RestoreInhibit, 0, 0) | 7061 __gen_uint(values->ForceRestore, 1, 1) | 7062 __gen_uint(values->ResourceStreamerStateRestoreEnable, 2, 2) | 7063 __gen_uint(values->ResourceStreamerStateSaveEnable, 3, 3) | 7064 __gen_uint(values->CoreModeEnable, 4, 4) | 7065 __gen_uint(values->ReservedMustbe1, 8, 8); 7066 dw[1] = __gen_combine_address(data, &dw[1], values->LogicalContextAddress, v1); 7067} 7068 7069#define GEN75_MI_SET_PREDICATE_length 1 7070#define GEN75_MI_SET_PREDICATE_length_bias 1 7071#define GEN75_MI_SET_PREDICATE_header \ 7072 .MICommandOpcode = 1, \ 7073 .CommandType = 0 7074 7075struct GEN75_MI_SET_PREDICATE { 7076 uint32_t PREDICATEENABLE; 7077 uint32_t MICommandOpcode; 7078 uint32_t CommandType; 7079}; 7080 7081static inline void 7082GEN75_MI_SET_PREDICATE_pack(__attribute__((unused)) __gen_user_data *data, 7083 __attribute__((unused)) void * restrict dst, 7084 __attribute__((unused)) const struct GEN75_MI_SET_PREDICATE * restrict values) 7085{ 7086 uint32_t * restrict dw = (uint32_t * restrict) dst; 7087 7088 dw[0] = 7089 __gen_uint(values->PREDICATEENABLE, 0, 1) | 7090 __gen_uint(values->MICommandOpcode, 23, 28) | 7091 __gen_uint(values->CommandType, 29, 31); 7092} 7093 7094#define GEN75_MI_STORE_DATA_IMM_length 4 7095#define GEN75_MI_STORE_DATA_IMM_length_bias 2 7096#define GEN75_MI_STORE_DATA_IMM_header \ 7097 .DWordLength = 2, \ 7098 .MICommandOpcode = 32, \ 7099 .CommandType = 0 7100 7101struct GEN75_MI_STORE_DATA_IMM { 7102 uint32_t DWordLength; 7103 bool UseGlobalGTT; 7104 uint32_t MICommandOpcode; 7105 uint32_t CommandType; 7106 uint32_t CoreModeEnable; 7107 __gen_address_type Address; 7108 uint64_t ImmediateData; 7109}; 7110 7111static inline void 7112GEN75_MI_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 7113 __attribute__((unused)) void * restrict dst, 7114 __attribute__((unused)) const struct GEN75_MI_STORE_DATA_IMM * restrict values) 7115{ 7116 uint32_t * restrict dw = (uint32_t * restrict) dst; 7117 7118 dw[0] = 7119 __gen_uint(values->DWordLength, 0, 5) | 7120 __gen_uint(values->UseGlobalGTT, 22, 22) | 7121 __gen_uint(values->MICommandOpcode, 23, 28) | 7122 __gen_uint(values->CommandType, 29, 31); 7123 7124 dw[1] = 0; 7125 7126 const uint32_t v2 = 7127 __gen_uint(values->CoreModeEnable, 0, 0); 7128 dw[2] = __gen_combine_address(data, &dw[2], values->Address, v2); 7129 7130 const uint64_t v3 = 7131 __gen_uint(values->ImmediateData, 0, 63); 7132 dw[3] = v3; 7133 dw[4] = v3 >> 32; 7134} 7135 7136#define GEN75_MI_STORE_DATA_INDEX_length 3 7137#define GEN75_MI_STORE_DATA_INDEX_length_bias 2 7138#define GEN75_MI_STORE_DATA_INDEX_header \ 7139 .DWordLength = 1, \ 7140 .MICommandOpcode = 33, \ 7141 .CommandType = 0 7142 7143struct GEN75_MI_STORE_DATA_INDEX { 7144 uint32_t DWordLength; 7145 uint32_t MICommandOpcode; 7146 uint32_t CommandType; 7147 uint32_t Offset; 7148 uint32_t DataDWord0; 7149 uint32_t DataDWord1; 7150}; 7151 7152static inline void 7153GEN75_MI_STORE_DATA_INDEX_pack(__attribute__((unused)) __gen_user_data *data, 7154 __attribute__((unused)) void * restrict dst, 7155 __attribute__((unused)) const struct GEN75_MI_STORE_DATA_INDEX * restrict values) 7156{ 7157 uint32_t * restrict dw = (uint32_t * restrict) dst; 7158 7159 dw[0] = 7160 __gen_uint(values->DWordLength, 0, 7) | 7161 __gen_uint(values->MICommandOpcode, 23, 28) | 7162 __gen_uint(values->CommandType, 29, 31); 7163 7164 dw[1] = 7165 __gen_uint(values->Offset, 2, 11); 7166 7167 dw[2] = 7168 __gen_uint(values->DataDWord0, 0, 31); 7169} 7170 7171#define GEN75_MI_STORE_REGISTER_MEM_length 3 7172#define GEN75_MI_STORE_REGISTER_MEM_length_bias 2 7173#define GEN75_MI_STORE_REGISTER_MEM_header \ 7174 .DWordLength = 1, \ 7175 .MICommandOpcode = 36, \ 7176 .CommandType = 0 7177 7178struct GEN75_MI_STORE_REGISTER_MEM { 7179 uint32_t DWordLength; 7180 bool PredicateEnable; 7181 bool UseGlobalGTT; 7182 uint32_t MICommandOpcode; 7183 uint32_t CommandType; 7184 uint64_t RegisterAddress; 7185 __gen_address_type MemoryAddress; 7186}; 7187 7188static inline void 7189GEN75_MI_STORE_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 7190 __attribute__((unused)) void * restrict dst, 7191 __attribute__((unused)) const struct GEN75_MI_STORE_REGISTER_MEM * restrict values) 7192{ 7193 uint32_t * restrict dw = (uint32_t * restrict) dst; 7194 7195 dw[0] = 7196 __gen_uint(values->DWordLength, 0, 7) | 7197 __gen_uint(values->PredicateEnable, 21, 21) | 7198 __gen_uint(values->UseGlobalGTT, 22, 22) | 7199 __gen_uint(values->MICommandOpcode, 23, 28) | 7200 __gen_uint(values->CommandType, 29, 31); 7201 7202 dw[1] = 7203 __gen_offset(values->RegisterAddress, 2, 22); 7204 7205 dw[2] = __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 7206} 7207 7208#define GEN75_MI_STORE_URB_MEM_length 3 7209#define GEN75_MI_STORE_URB_MEM_length_bias 2 7210#define GEN75_MI_STORE_URB_MEM_header \ 7211 .DWordLength = 1, \ 7212 .MICommandOpcode = 45, \ 7213 .CommandType = 0 7214 7215struct GEN75_MI_STORE_URB_MEM { 7216 uint32_t DWordLength; 7217 uint32_t MICommandOpcode; 7218 uint32_t CommandType; 7219 uint32_t URBAddress; 7220 __gen_address_type MemoryAddress; 7221}; 7222 7223static inline void 7224GEN75_MI_STORE_URB_MEM_pack(__attribute__((unused)) __gen_user_data *data, 7225 __attribute__((unused)) void * restrict dst, 7226 __attribute__((unused)) const struct GEN75_MI_STORE_URB_MEM * restrict values) 7227{ 7228 uint32_t * restrict dw = (uint32_t * restrict) dst; 7229 7230 dw[0] = 7231 __gen_uint(values->DWordLength, 0, 7) | 7232 __gen_uint(values->MICommandOpcode, 23, 28) | 7233 __gen_uint(values->CommandType, 29, 31); 7234 7235 dw[1] = 7236 __gen_uint(values->URBAddress, 2, 14); 7237 7238 dw[2] = __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 7239} 7240 7241#define GEN75_MI_SUSPEND_FLUSH_length 1 7242#define GEN75_MI_SUSPEND_FLUSH_length_bias 1 7243#define GEN75_MI_SUSPEND_FLUSH_header \ 7244 .MICommandOpcode = 11, \ 7245 .CommandType = 0 7246 7247struct GEN75_MI_SUSPEND_FLUSH { 7248 bool SuspendFlush; 7249 uint32_t MICommandOpcode; 7250 uint32_t CommandType; 7251}; 7252 7253static inline void 7254GEN75_MI_SUSPEND_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 7255 __attribute__((unused)) void * restrict dst, 7256 __attribute__((unused)) const struct GEN75_MI_SUSPEND_FLUSH * restrict values) 7257{ 7258 uint32_t * restrict dw = (uint32_t * restrict) dst; 7259 7260 dw[0] = 7261 __gen_uint(values->SuspendFlush, 0, 0) | 7262 __gen_uint(values->MICommandOpcode, 23, 28) | 7263 __gen_uint(values->CommandType, 29, 31); 7264} 7265 7266#define GEN75_MI_TOPOLOGY_FILTER_length 1 7267#define GEN75_MI_TOPOLOGY_FILTER_length_bias 1 7268#define GEN75_MI_TOPOLOGY_FILTER_header \ 7269 .MICommandOpcode = 13, \ 7270 .CommandType = 0 7271 7272struct GEN75_MI_TOPOLOGY_FILTER { 7273 enum GEN75_3D_Prim_Topo_Type TopologyFilterValue; 7274 uint32_t MICommandOpcode; 7275 uint32_t CommandType; 7276}; 7277 7278static inline void 7279GEN75_MI_TOPOLOGY_FILTER_pack(__attribute__((unused)) __gen_user_data *data, 7280 __attribute__((unused)) void * restrict dst, 7281 __attribute__((unused)) const struct GEN75_MI_TOPOLOGY_FILTER * restrict values) 7282{ 7283 uint32_t * restrict dw = (uint32_t * restrict) dst; 7284 7285 dw[0] = 7286 __gen_uint(values->TopologyFilterValue, 0, 5) | 7287 __gen_uint(values->MICommandOpcode, 23, 28) | 7288 __gen_uint(values->CommandType, 29, 31); 7289} 7290 7291#define GEN75_MI_URB_ATOMIC_ALLOC_length 1 7292#define GEN75_MI_URB_ATOMIC_ALLOC_length_bias 1 7293#define GEN75_MI_URB_ATOMIC_ALLOC_header \ 7294 .MICommandOpcode = 9, \ 7295 .CommandType = 0 7296 7297struct GEN75_MI_URB_ATOMIC_ALLOC { 7298 uint32_t URBAtomicStorageSize; 7299 uint32_t URBAtomicStorageOffset; 7300 uint32_t MICommandOpcode; 7301 uint32_t CommandType; 7302}; 7303 7304static inline void 7305GEN75_MI_URB_ATOMIC_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 7306 __attribute__((unused)) void * restrict dst, 7307 __attribute__((unused)) const struct GEN75_MI_URB_ATOMIC_ALLOC * restrict values) 7308{ 7309 uint32_t * restrict dw = (uint32_t * restrict) dst; 7310 7311 dw[0] = 7312 __gen_uint(values->URBAtomicStorageSize, 0, 8) | 7313 __gen_uint(values->URBAtomicStorageOffset, 12, 19) | 7314 __gen_uint(values->MICommandOpcode, 23, 28) | 7315 __gen_uint(values->CommandType, 29, 31); 7316} 7317 7318#define GEN75_MI_URB_CLEAR_length 2 7319#define GEN75_MI_URB_CLEAR_length_bias 2 7320#define GEN75_MI_URB_CLEAR_header \ 7321 .DWordLength = 0, \ 7322 .MICommandOpcode = 25, \ 7323 .CommandType = 0 7324 7325struct GEN75_MI_URB_CLEAR { 7326 uint32_t DWordLength; 7327 uint32_t MICommandOpcode; 7328 uint32_t CommandType; 7329 uint64_t URBAddress; 7330 uint32_t URBClearLength; 7331}; 7332 7333static inline void 7334GEN75_MI_URB_CLEAR_pack(__attribute__((unused)) __gen_user_data *data, 7335 __attribute__((unused)) void * restrict dst, 7336 __attribute__((unused)) const struct GEN75_MI_URB_CLEAR * restrict values) 7337{ 7338 uint32_t * restrict dw = (uint32_t * restrict) dst; 7339 7340 dw[0] = 7341 __gen_uint(values->DWordLength, 0, 7) | 7342 __gen_uint(values->MICommandOpcode, 23, 28) | 7343 __gen_uint(values->CommandType, 29, 31); 7344 7345 dw[1] = 7346 __gen_offset(values->URBAddress, 0, 14) | 7347 __gen_uint(values->URBClearLength, 16, 29); 7348} 7349 7350#define GEN75_MI_USER_INTERRUPT_length 1 7351#define GEN75_MI_USER_INTERRUPT_length_bias 1 7352#define GEN75_MI_USER_INTERRUPT_header \ 7353 .MICommandOpcode = 2, \ 7354 .CommandType = 0 7355 7356struct GEN75_MI_USER_INTERRUPT { 7357 uint32_t MICommandOpcode; 7358 uint32_t CommandType; 7359}; 7360 7361static inline void 7362GEN75_MI_USER_INTERRUPT_pack(__attribute__((unused)) __gen_user_data *data, 7363 __attribute__((unused)) void * restrict dst, 7364 __attribute__((unused)) const struct GEN75_MI_USER_INTERRUPT * restrict values) 7365{ 7366 uint32_t * restrict dw = (uint32_t * restrict) dst; 7367 7368 dw[0] = 7369 __gen_uint(values->MICommandOpcode, 23, 28) | 7370 __gen_uint(values->CommandType, 29, 31); 7371} 7372 7373#define GEN75_MI_WAIT_FOR_EVENT_length 1 7374#define GEN75_MI_WAIT_FOR_EVENT_length_bias 1 7375#define GEN75_MI_WAIT_FOR_EVENT_header \ 7376 .MICommandOpcode = 3, \ 7377 .CommandType = 0 7378 7379struct GEN75_MI_WAIT_FOR_EVENT { 7380 bool DisplayPipeAScanLineWaitEnable; 7381 bool DisplayPlaneAFlipPendingWaitEnable; 7382 bool DisplaySpriteAFlipPendingWaitEnable; 7383 bool DisplayPipeAVerticalBlankWaitEnable; 7384 bool DisplayPipeAHorizontalBlankWaitEnable; 7385 bool DisplayPipeBScanLineWaitEnable; 7386 bool DisplayPlaneBFlipPendingWaitEnable; 7387 bool DisplaySpriteBFlipPendingWaitEnable; 7388 bool DisplayPipeBVerticalBlankWaitEnable; 7389 bool DisplayPipeBHorizontalBlankWaitEnable; 7390 bool DisplayPipeCScanLineWaitEnable; 7391 bool DisplayPlaneCFlipPendingWaitEnable; 7392 uint32_t ConditionCodeWaitSelect; 7393#define Notenabled 0 7394 bool DisplaySpriteCFlipPendingWaitEnable; 7395 bool DisplayPipeCVerticalBlankWaitEnable; 7396 bool DisplayPipeCHorizontalBlankWaitEnable; 7397 uint32_t MICommandOpcode; 7398 uint32_t CommandType; 7399}; 7400 7401static inline void 7402GEN75_MI_WAIT_FOR_EVENT_pack(__attribute__((unused)) __gen_user_data *data, 7403 __attribute__((unused)) void * restrict dst, 7404 __attribute__((unused)) const struct GEN75_MI_WAIT_FOR_EVENT * restrict values) 7405{ 7406 uint32_t * restrict dw = (uint32_t * restrict) dst; 7407 7408 dw[0] = 7409 __gen_uint(values->DisplayPipeAScanLineWaitEnable, 0, 0) | 7410 __gen_uint(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) | 7411 __gen_uint(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) | 7412 __gen_uint(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) | 7413 __gen_uint(values->DisplayPipeAHorizontalBlankWaitEnable, 5, 5) | 7414 __gen_uint(values->DisplayPipeBScanLineWaitEnable, 8, 8) | 7415 __gen_uint(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) | 7416 __gen_uint(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) | 7417 __gen_uint(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) | 7418 __gen_uint(values->DisplayPipeBHorizontalBlankWaitEnable, 13, 13) | 7419 __gen_uint(values->DisplayPipeCScanLineWaitEnable, 14, 14) | 7420 __gen_uint(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) | 7421 __gen_uint(values->ConditionCodeWaitSelect, 16, 19) | 7422 __gen_uint(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) | 7423 __gen_uint(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) | 7424 __gen_uint(values->DisplayPipeCHorizontalBlankWaitEnable, 22, 22) | 7425 __gen_uint(values->MICommandOpcode, 23, 28) | 7426 __gen_uint(values->CommandType, 29, 31); 7427} 7428 7429#define GEN75_PIPELINE_SELECT_length 1 7430#define GEN75_PIPELINE_SELECT_length_bias 1 7431#define GEN75_PIPELINE_SELECT_header \ 7432 ._3DCommandSubOpcode = 4, \ 7433 ._3DCommandOpcode = 1, \ 7434 .CommandSubType = 1, \ 7435 .CommandType = 3 7436 7437struct GEN75_PIPELINE_SELECT { 7438 uint32_t PipelineSelection; 7439#define _3D 0 7440#define Media 1 7441#define GPGPU 2 7442 uint32_t _3DCommandSubOpcode; 7443 uint32_t _3DCommandOpcode; 7444 uint32_t CommandSubType; 7445 uint32_t CommandType; 7446}; 7447 7448static inline void 7449GEN75_PIPELINE_SELECT_pack(__attribute__((unused)) __gen_user_data *data, 7450 __attribute__((unused)) void * restrict dst, 7451 __attribute__((unused)) const struct GEN75_PIPELINE_SELECT * restrict values) 7452{ 7453 uint32_t * restrict dw = (uint32_t * restrict) dst; 7454 7455 dw[0] = 7456 __gen_uint(values->PipelineSelection, 0, 1) | 7457 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7458 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7459 __gen_uint(values->CommandSubType, 27, 28) | 7460 __gen_uint(values->CommandType, 29, 31); 7461} 7462 7463#define GEN75_PIPE_CONTROL_length 5 7464#define GEN75_PIPE_CONTROL_length_bias 2 7465#define GEN75_PIPE_CONTROL_header \ 7466 .DWordLength = 3, \ 7467 ._3DCommandSubOpcode = 0, \ 7468 ._3DCommandOpcode = 2, \ 7469 .CommandSubType = 3, \ 7470 .CommandType = 3 7471 7472struct GEN75_PIPE_CONTROL { 7473 uint32_t DWordLength; 7474 uint32_t _3DCommandSubOpcode; 7475 uint32_t _3DCommandOpcode; 7476 uint32_t CommandSubType; 7477 uint32_t CommandType; 7478 bool DepthCacheFlushEnable; 7479 bool StallAtPixelScoreboard; 7480 bool StateCacheInvalidationEnable; 7481 bool ConstantCacheInvalidationEnable; 7482 bool VFCacheInvalidationEnable; 7483 bool DCFlushEnable; 7484 bool PipeControlFlushEnable; 7485 bool NotifyEnable; 7486 bool IndirectStatePointersDisable; 7487 bool TextureCacheInvalidationEnable; 7488 bool InstructionCacheInvalidateEnable; 7489 bool RenderTargetCacheFlushEnable; 7490 bool DepthStallEnable; 7491 uint32_t PostSyncOperation; 7492#define NoWrite 0 7493#define WriteImmediateData 1 7494#define WritePSDepthCount 2 7495#define WriteTimestamp 3 7496 bool GenericMediaStateClear; 7497 bool TLBInvalidate; 7498 bool GlobalSnapshotCountReset; 7499 bool CommandStreamerStallEnable; 7500 uint32_t StoreDataIndex; 7501 uint32_t LRIPostSyncOperation; 7502#define NoLRIOperation 0 7503#define MMIOWriteImmediateData 1 7504 uint32_t DestinationAddressType; 7505#define DAT_PPGTT 0 7506#define DAT_GGTT 1 7507 __gen_address_type Address; 7508 uint64_t ImmediateData; 7509}; 7510 7511static inline void 7512GEN75_PIPE_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 7513 __attribute__((unused)) void * restrict dst, 7514 __attribute__((unused)) const struct GEN75_PIPE_CONTROL * restrict values) 7515{ 7516 uint32_t * restrict dw = (uint32_t * restrict) dst; 7517 7518 dw[0] = 7519 __gen_uint(values->DWordLength, 0, 7) | 7520 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7521 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7522 __gen_uint(values->CommandSubType, 27, 28) | 7523 __gen_uint(values->CommandType, 29, 31); 7524 7525 dw[1] = 7526 __gen_uint(values->DepthCacheFlushEnable, 0, 0) | 7527 __gen_uint(values->StallAtPixelScoreboard, 1, 1) | 7528 __gen_uint(values->StateCacheInvalidationEnable, 2, 2) | 7529 __gen_uint(values->ConstantCacheInvalidationEnable, 3, 3) | 7530 __gen_uint(values->VFCacheInvalidationEnable, 4, 4) | 7531 __gen_uint(values->DCFlushEnable, 5, 5) | 7532 __gen_uint(values->PipeControlFlushEnable, 7, 7) | 7533 __gen_uint(values->NotifyEnable, 8, 8) | 7534 __gen_uint(values->IndirectStatePointersDisable, 9, 9) | 7535 __gen_uint(values->TextureCacheInvalidationEnable, 10, 10) | 7536 __gen_uint(values->InstructionCacheInvalidateEnable, 11, 11) | 7537 __gen_uint(values->RenderTargetCacheFlushEnable, 12, 12) | 7538 __gen_uint(values->DepthStallEnable, 13, 13) | 7539 __gen_uint(values->PostSyncOperation, 14, 15) | 7540 __gen_uint(values->GenericMediaStateClear, 16, 16) | 7541 __gen_uint(values->TLBInvalidate, 18, 18) | 7542 __gen_uint(values->GlobalSnapshotCountReset, 19, 19) | 7543 __gen_uint(values->CommandStreamerStallEnable, 20, 20) | 7544 __gen_uint(values->StoreDataIndex, 21, 21) | 7545 __gen_uint(values->LRIPostSyncOperation, 23, 23) | 7546 __gen_uint(values->DestinationAddressType, 24, 24); 7547 7548 dw[2] = __gen_combine_address(data, &dw[2], values->Address, 0); 7549 7550 const uint64_t v3 = 7551 __gen_uint(values->ImmediateData, 0, 63); 7552 dw[3] = v3; 7553 dw[4] = v3 >> 32; 7554} 7555 7556#define GEN75_STATE_BASE_ADDRESS_length 10 7557#define GEN75_STATE_BASE_ADDRESS_length_bias 2 7558#define GEN75_STATE_BASE_ADDRESS_header \ 7559 .DWordLength = 8, \ 7560 ._3DCommandSubOpcode = 1, \ 7561 ._3DCommandOpcode = 1, \ 7562 .CommandSubType = 0, \ 7563 .CommandType = 3 7564 7565struct GEN75_STATE_BASE_ADDRESS { 7566 uint32_t DWordLength; 7567 uint32_t _3DCommandSubOpcode; 7568 uint32_t _3DCommandOpcode; 7569 uint32_t CommandSubType; 7570 uint32_t CommandType; 7571 bool GeneralStateBaseAddressModifyEnable; 7572 uint32_t StatelessDataPortAccessMOCS; 7573 uint32_t GeneralStateMOCS; 7574 __gen_address_type GeneralStateBaseAddress; 7575 bool SurfaceStateBaseAddressModifyEnable; 7576 uint32_t SurfaceStateMOCS; 7577 __gen_address_type SurfaceStateBaseAddress; 7578 bool DynamicStateBaseAddressModifyEnable; 7579 uint32_t DynamicStateMOCS; 7580 __gen_address_type DynamicStateBaseAddress; 7581 bool IndirectObjectBaseAddressModifyEnable; 7582 uint32_t IndirectObjectMOCS; 7583 __gen_address_type IndirectObjectBaseAddress; 7584 bool InstructionBaseAddressModifyEnable; 7585 uint32_t InstructionMOCS; 7586 __gen_address_type InstructionBaseAddress; 7587 bool GeneralStateAccessUpperBoundModifyEnable; 7588 __gen_address_type GeneralStateAccessUpperBound; 7589 bool DynamicStateAccessUpperBoundModifyEnable; 7590 __gen_address_type DynamicStateAccessUpperBound; 7591 bool IndirectObjectAccessUpperBoundModifyEnable; 7592 __gen_address_type IndirectObjectAccessUpperBound; 7593 bool InstructionAccessUpperBoundModifyEnable; 7594 __gen_address_type InstructionAccessUpperBound; 7595}; 7596 7597static inline void 7598GEN75_STATE_BASE_ADDRESS_pack(__attribute__((unused)) __gen_user_data *data, 7599 __attribute__((unused)) void * restrict dst, 7600 __attribute__((unused)) const struct GEN75_STATE_BASE_ADDRESS * restrict values) 7601{ 7602 uint32_t * restrict dw = (uint32_t * restrict) dst; 7603 7604 dw[0] = 7605 __gen_uint(values->DWordLength, 0, 7) | 7606 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7607 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7608 __gen_uint(values->CommandSubType, 27, 28) | 7609 __gen_uint(values->CommandType, 29, 31); 7610 7611 const uint32_t v1 = 7612 __gen_uint(values->GeneralStateBaseAddressModifyEnable, 0, 0) | 7613 __gen_uint(values->StatelessDataPortAccessMOCS, 4, 7) | 7614 __gen_uint(values->GeneralStateMOCS, 8, 11); 7615 dw[1] = __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, v1); 7616 7617 const uint32_t v2 = 7618 __gen_uint(values->SurfaceStateBaseAddressModifyEnable, 0, 0) | 7619 __gen_uint(values->SurfaceStateMOCS, 8, 11); 7620 dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, v2); 7621 7622 const uint32_t v3 = 7623 __gen_uint(values->DynamicStateBaseAddressModifyEnable, 0, 0) | 7624 __gen_uint(values->DynamicStateMOCS, 8, 11); 7625 dw[3] = __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, v3); 7626 7627 const uint32_t v4 = 7628 __gen_uint(values->IndirectObjectBaseAddressModifyEnable, 0, 0) | 7629 __gen_uint(values->IndirectObjectMOCS, 8, 11); 7630 dw[4] = __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, v4); 7631 7632 const uint32_t v5 = 7633 __gen_uint(values->InstructionBaseAddressModifyEnable, 0, 0) | 7634 __gen_uint(values->InstructionMOCS, 8, 11); 7635 dw[5] = __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, v5); 7636 7637 const uint32_t v6 = 7638 __gen_uint(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0); 7639 dw[6] = __gen_combine_address(data, &dw[6], values->GeneralStateAccessUpperBound, v6); 7640 7641 const uint32_t v7 = 7642 __gen_uint(values->DynamicStateAccessUpperBoundModifyEnable, 0, 0); 7643 dw[7] = __gen_combine_address(data, &dw[7], values->DynamicStateAccessUpperBound, v7); 7644 7645 const uint32_t v8 = 7646 __gen_uint(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0); 7647 dw[8] = __gen_combine_address(data, &dw[8], values->IndirectObjectAccessUpperBound, v8); 7648 7649 const uint32_t v9 = 7650 __gen_uint(values->InstructionAccessUpperBoundModifyEnable, 0, 0); 7651 dw[9] = __gen_combine_address(data, &dw[9], values->InstructionAccessUpperBound, v9); 7652} 7653 7654#define GEN75_STATE_PREFETCH_length 2 7655#define GEN75_STATE_PREFETCH_length_bias 2 7656#define GEN75_STATE_PREFETCH_header \ 7657 .DWordLength = 0, \ 7658 ._3DCommandSubOpcode = 3, \ 7659 ._3DCommandOpcode = 0, \ 7660 .CommandSubType = 0, \ 7661 .CommandType = 3 7662 7663struct GEN75_STATE_PREFETCH { 7664 uint32_t DWordLength; 7665 uint32_t _3DCommandSubOpcode; 7666 uint32_t _3DCommandOpcode; 7667 uint32_t CommandSubType; 7668 uint32_t CommandType; 7669 uint32_t PrefetchCount; 7670 __gen_address_type PrefetchPointer; 7671}; 7672 7673static inline void 7674GEN75_STATE_PREFETCH_pack(__attribute__((unused)) __gen_user_data *data, 7675 __attribute__((unused)) void * restrict dst, 7676 __attribute__((unused)) const struct GEN75_STATE_PREFETCH * restrict values) 7677{ 7678 uint32_t * restrict dw = (uint32_t * restrict) dst; 7679 7680 dw[0] = 7681 __gen_uint(values->DWordLength, 0, 7) | 7682 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7683 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7684 __gen_uint(values->CommandSubType, 27, 28) | 7685 __gen_uint(values->CommandType, 29, 31); 7686 7687 const uint32_t v1 = 7688 __gen_uint(values->PrefetchCount, 0, 2); 7689 dw[1] = __gen_combine_address(data, &dw[1], values->PrefetchPointer, v1); 7690} 7691 7692#define GEN75_STATE_SIP_length 2 7693#define GEN75_STATE_SIP_length_bias 2 7694#define GEN75_STATE_SIP_header \ 7695 .DWordLength = 0, \ 7696 ._3DCommandSubOpcode = 2, \ 7697 ._3DCommandOpcode = 1, \ 7698 .CommandSubType = 0, \ 7699 .CommandType = 3 7700 7701struct GEN75_STATE_SIP { 7702 uint32_t DWordLength; 7703 uint32_t _3DCommandSubOpcode; 7704 uint32_t _3DCommandOpcode; 7705 uint32_t CommandSubType; 7706 uint32_t CommandType; 7707 uint64_t SystemInstructionPointer; 7708}; 7709 7710static inline void 7711GEN75_STATE_SIP_pack(__attribute__((unused)) __gen_user_data *data, 7712 __attribute__((unused)) void * restrict dst, 7713 __attribute__((unused)) const struct GEN75_STATE_SIP * restrict values) 7714{ 7715 uint32_t * restrict dw = (uint32_t * restrict) dst; 7716 7717 dw[0] = 7718 __gen_uint(values->DWordLength, 0, 7) | 7719 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7720 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7721 __gen_uint(values->CommandSubType, 27, 28) | 7722 __gen_uint(values->CommandType, 29, 31); 7723 7724 dw[1] = 7725 __gen_offset(values->SystemInstructionPointer, 4, 31); 7726} 7727 7728#define GEN75_SWTESS_BASE_ADDRESS_length 2 7729#define GEN75_SWTESS_BASE_ADDRESS_length_bias 2 7730#define GEN75_SWTESS_BASE_ADDRESS_header \ 7731 .DWordLength = 0, \ 7732 ._3DCommandSubOpcode = 3, \ 7733 ._3DCommandOpcode = 1, \ 7734 .CommandSubType = 0, \ 7735 .CommandType = 3 7736 7737struct GEN75_SWTESS_BASE_ADDRESS { 7738 uint32_t DWordLength; 7739 uint32_t _3DCommandSubOpcode; 7740 uint32_t _3DCommandOpcode; 7741 uint32_t CommandSubType; 7742 uint32_t CommandType; 7743 uint32_t SWTessellationMOCS; 7744 __gen_address_type SWTessellationBaseAddress; 7745}; 7746 7747static inline void 7748GEN75_SWTESS_BASE_ADDRESS_pack(__attribute__((unused)) __gen_user_data *data, 7749 __attribute__((unused)) void * restrict dst, 7750 __attribute__((unused)) const struct GEN75_SWTESS_BASE_ADDRESS * restrict values) 7751{ 7752 uint32_t * restrict dw = (uint32_t * restrict) dst; 7753 7754 dw[0] = 7755 __gen_uint(values->DWordLength, 0, 7) | 7756 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7757 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7758 __gen_uint(values->CommandSubType, 27, 28) | 7759 __gen_uint(values->CommandType, 29, 31); 7760 7761 const uint32_t v1 = 7762 __gen_uint(values->SWTessellationMOCS, 8, 11); 7763 dw[1] = __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, v1); 7764} 7765 7766#define GEN75_BCS_FAULT_REG_num 0x4294 7767#define GEN75_BCS_FAULT_REG_length 1 7768struct GEN75_BCS_FAULT_REG { 7769 bool ValidBit; 7770 uint32_t FaultType; 7771#define PageFault 0 7772#define InvalidPDFault 1 7773#define UnloadedPDFault 2 7774#define InvalidandUnloadedPDfault 3 7775 uint32_t SRCIDofFault; 7776 uint32_t GTTSEL; 7777#define PPGTT 0 7778#define GGTT 1 7779 __gen_address_type VirtualAddressofFault; 7780}; 7781 7782static inline void 7783GEN75_BCS_FAULT_REG_pack(__attribute__((unused)) __gen_user_data *data, 7784 __attribute__((unused)) void * restrict dst, 7785 __attribute__((unused)) const struct GEN75_BCS_FAULT_REG * restrict values) 7786{ 7787 uint32_t * restrict dw = (uint32_t * restrict) dst; 7788 7789 const uint32_t v0 = 7790 __gen_uint(values->ValidBit, 0, 0) | 7791 __gen_uint(values->FaultType, 1, 2) | 7792 __gen_uint(values->SRCIDofFault, 3, 10) | 7793 __gen_uint(values->GTTSEL, 11, 11); 7794 dw[0] = __gen_combine_address(data, &dw[0], values->VirtualAddressofFault, v0); 7795} 7796 7797#define GEN75_BCS_INSTDONE_num 0x2206c 7798#define GEN75_BCS_INSTDONE_length 1 7799struct GEN75_BCS_INSTDONE { 7800 bool RingEnable; 7801 bool BlitterIDLE; 7802 bool GABIDLE; 7803 bool BCSDone; 7804}; 7805 7806static inline void 7807GEN75_BCS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 7808 __attribute__((unused)) void * restrict dst, 7809 __attribute__((unused)) const struct GEN75_BCS_INSTDONE * restrict values) 7810{ 7811 uint32_t * restrict dw = (uint32_t * restrict) dst; 7812 7813 dw[0] = 7814 __gen_uint(values->RingEnable, 0, 0) | 7815 __gen_uint(values->BlitterIDLE, 1, 1) | 7816 __gen_uint(values->GABIDLE, 2, 2) | 7817 __gen_uint(values->BCSDone, 3, 3); 7818} 7819 7820#define GEN75_BCS_RING_BUFFER_CTL_num 0x2203c 7821#define GEN75_BCS_RING_BUFFER_CTL_length 1 7822struct GEN75_BCS_RING_BUFFER_CTL { 7823 bool RingBufferEnable; 7824 uint32_t AutomaticReportHeadPointer; 7825#define MI_AUTOREPORT_OFF 0 7826#define MI_AUTOREPORT_64KB 1 7827#define MI_AUTOREPORT_4KB 2 7828#define MI_AUTOREPORT_128KB 3 7829 bool DisableRegisterAccesses; 7830 bool SemaphoreWait; 7831 bool RBWait; 7832 uint32_t BufferLengthinpages1; 7833}; 7834 7835static inline void 7836GEN75_BCS_RING_BUFFER_CTL_pack(__attribute__((unused)) __gen_user_data *data, 7837 __attribute__((unused)) void * restrict dst, 7838 __attribute__((unused)) const struct GEN75_BCS_RING_BUFFER_CTL * restrict values) 7839{ 7840 uint32_t * restrict dw = (uint32_t * restrict) dst; 7841 7842 dw[0] = 7843 __gen_uint(values->RingBufferEnable, 0, 0) | 7844 __gen_uint(values->AutomaticReportHeadPointer, 1, 2) | 7845 __gen_uint(values->DisableRegisterAccesses, 8, 8) | 7846 __gen_uint(values->SemaphoreWait, 10, 10) | 7847 __gen_uint(values->RBWait, 11, 11) | 7848 __gen_uint(values->BufferLengthinpages1, 12, 20); 7849} 7850 7851#define GEN75_CHICKEN3_num 0xe49c 7852#define GEN75_CHICKEN3_length 1 7853struct GEN75_CHICKEN3 { 7854 uint32_t L3AtomicDisable; 7855 uint32_t L3AtomicDisableMask; 7856}; 7857 7858static inline void 7859GEN75_CHICKEN3_pack(__attribute__((unused)) __gen_user_data *data, 7860 __attribute__((unused)) void * restrict dst, 7861 __attribute__((unused)) const struct GEN75_CHICKEN3 * restrict values) 7862{ 7863 uint32_t * restrict dw = (uint32_t * restrict) dst; 7864 7865 dw[0] = 7866 __gen_uint(values->L3AtomicDisable, 6, 6) | 7867 __gen_uint(values->L3AtomicDisableMask, 22, 22); 7868} 7869 7870#define GEN75_CL_INVOCATION_COUNT_num 0x2338 7871#define GEN75_CL_INVOCATION_COUNT_length 2 7872struct GEN75_CL_INVOCATION_COUNT { 7873 uint64_t CLInvocationCountReport; 7874}; 7875 7876static inline void 7877GEN75_CL_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 7878 __attribute__((unused)) void * restrict dst, 7879 __attribute__((unused)) const struct GEN75_CL_INVOCATION_COUNT * restrict values) 7880{ 7881 uint32_t * restrict dw = (uint32_t * restrict) dst; 7882 7883 const uint64_t v0 = 7884 __gen_uint(values->CLInvocationCountReport, 0, 63); 7885 dw[0] = v0; 7886 dw[1] = v0 >> 32; 7887} 7888 7889#define GEN75_CL_PRIMITIVES_COUNT_num 0x2340 7890#define GEN75_CL_PRIMITIVES_COUNT_length 2 7891struct GEN75_CL_PRIMITIVES_COUNT { 7892 uint64_t CLPrimitivesCountReport; 7893}; 7894 7895static inline void 7896GEN75_CL_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 7897 __attribute__((unused)) void * restrict dst, 7898 __attribute__((unused)) const struct GEN75_CL_PRIMITIVES_COUNT * restrict values) 7899{ 7900 uint32_t * restrict dw = (uint32_t * restrict) dst; 7901 7902 const uint64_t v0 = 7903 __gen_uint(values->CLPrimitivesCountReport, 0, 63); 7904 dw[0] = v0; 7905 dw[1] = v0 >> 32; 7906} 7907 7908#define GEN75_CS_INVOCATION_COUNT_num 0x2290 7909#define GEN75_CS_INVOCATION_COUNT_length 2 7910struct GEN75_CS_INVOCATION_COUNT { 7911 uint64_t CSInvocationCountReport; 7912}; 7913 7914static inline void 7915GEN75_CS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 7916 __attribute__((unused)) void * restrict dst, 7917 __attribute__((unused)) const struct GEN75_CS_INVOCATION_COUNT * restrict values) 7918{ 7919 uint32_t * restrict dw = (uint32_t * restrict) dst; 7920 7921 const uint64_t v0 = 7922 __gen_uint(values->CSInvocationCountReport, 0, 63); 7923 dw[0] = v0; 7924 dw[1] = v0 >> 32; 7925} 7926 7927#define GEN75_DS_INVOCATION_COUNT_num 0x2308 7928#define GEN75_DS_INVOCATION_COUNT_length 2 7929struct GEN75_DS_INVOCATION_COUNT { 7930 uint64_t DSInvocationCountReport; 7931}; 7932 7933static inline void 7934GEN75_DS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 7935 __attribute__((unused)) void * restrict dst, 7936 __attribute__((unused)) const struct GEN75_DS_INVOCATION_COUNT * restrict values) 7937{ 7938 uint32_t * restrict dw = (uint32_t * restrict) dst; 7939 7940 const uint64_t v0 = 7941 __gen_uint(values->DSInvocationCountReport, 0, 63); 7942 dw[0] = v0; 7943 dw[1] = v0 >> 32; 7944} 7945 7946#define GEN75_ERR_INT_num 0x44040 7947#define GEN75_ERR_INT_length 1 7948struct GEN75_ERR_INT { 7949 bool PrimaryAGTTFaultStatus; 7950 bool PrimaryBGTTFaultStatus; 7951 bool SpriteAGTTFaultStatus; 7952 bool SpriteBGTTFaultStatus; 7953 bool CursorAGTTFaultStatus; 7954 bool CursorBGTTFaultStatus; 7955 bool Invalidpagetableentrydata; 7956 bool InvalidGTTpagetableentry; 7957}; 7958 7959static inline void 7960GEN75_ERR_INT_pack(__attribute__((unused)) __gen_user_data *data, 7961 __attribute__((unused)) void * restrict dst, 7962 __attribute__((unused)) const struct GEN75_ERR_INT * restrict values) 7963{ 7964 uint32_t * restrict dw = (uint32_t * restrict) dst; 7965 7966 dw[0] = 7967 __gen_uint(values->PrimaryAGTTFaultStatus, 0, 0) | 7968 __gen_uint(values->PrimaryBGTTFaultStatus, 1, 1) | 7969 __gen_uint(values->SpriteAGTTFaultStatus, 2, 2) | 7970 __gen_uint(values->SpriteBGTTFaultStatus, 3, 3) | 7971 __gen_uint(values->CursorAGTTFaultStatus, 4, 4) | 7972 __gen_uint(values->CursorBGTTFaultStatus, 5, 5) | 7973 __gen_uint(values->Invalidpagetableentrydata, 6, 6) | 7974 __gen_uint(values->InvalidGTTpagetableentry, 7, 7); 7975} 7976 7977#define GEN75_GFX_ARB_ERROR_RPT_num 0x40a0 7978#define GEN75_GFX_ARB_ERROR_RPT_length 1 7979struct GEN75_GFX_ARB_ERROR_RPT { 7980 bool TLBPageFaultError; 7981 bool ContextPageFaultError; 7982 bool InvalidPageDirectoryentryerror; 7983 bool HardwareStatusPageFaultError; 7984 bool TLBPageVTDTranslationError; 7985 bool ContextPageVTDTranslationError; 7986 bool PageDirectoryEntryVTDTranslationError; 7987 bool HardwareStatusPageVTDTranslationError; 7988 bool UnloadedPDError; 7989 uint32_t PendingPageFaults; 7990}; 7991 7992static inline void 7993GEN75_GFX_ARB_ERROR_RPT_pack(__attribute__((unused)) __gen_user_data *data, 7994 __attribute__((unused)) void * restrict dst, 7995 __attribute__((unused)) const struct GEN75_GFX_ARB_ERROR_RPT * restrict values) 7996{ 7997 uint32_t * restrict dw = (uint32_t * restrict) dst; 7998 7999 dw[0] = 8000 __gen_uint(values->TLBPageFaultError, 0, 0) | 8001 __gen_uint(values->ContextPageFaultError, 1, 1) | 8002 __gen_uint(values->InvalidPageDirectoryentryerror, 2, 2) | 8003 __gen_uint(values->HardwareStatusPageFaultError, 3, 3) | 8004 __gen_uint(values->TLBPageVTDTranslationError, 4, 4) | 8005 __gen_uint(values->ContextPageVTDTranslationError, 5, 5) | 8006 __gen_uint(values->PageDirectoryEntryVTDTranslationError, 6, 6) | 8007 __gen_uint(values->HardwareStatusPageVTDTranslationError, 7, 7) | 8008 __gen_uint(values->UnloadedPDError, 8, 8) | 8009 __gen_uint(values->PendingPageFaults, 9, 15); 8010} 8011 8012#define GEN75_GS_INVOCATION_COUNT_num 0x2328 8013#define GEN75_GS_INVOCATION_COUNT_length 2 8014struct GEN75_GS_INVOCATION_COUNT { 8015 uint64_t GSInvocationCountReport; 8016}; 8017 8018static inline void 8019GEN75_GS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 8020 __attribute__((unused)) void * restrict dst, 8021 __attribute__((unused)) const struct GEN75_GS_INVOCATION_COUNT * restrict values) 8022{ 8023 uint32_t * restrict dw = (uint32_t * restrict) dst; 8024 8025 const uint64_t v0 = 8026 __gen_uint(values->GSInvocationCountReport, 0, 63); 8027 dw[0] = v0; 8028 dw[1] = v0 >> 32; 8029} 8030 8031#define GEN75_GS_PRIMITIVES_COUNT_num 0x2330 8032#define GEN75_GS_PRIMITIVES_COUNT_length 2 8033struct GEN75_GS_PRIMITIVES_COUNT { 8034 uint64_t GSPrimitivesCountReport; 8035}; 8036 8037static inline void 8038GEN75_GS_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 8039 __attribute__((unused)) void * restrict dst, 8040 __attribute__((unused)) const struct GEN75_GS_PRIMITIVES_COUNT * restrict values) 8041{ 8042 uint32_t * restrict dw = (uint32_t * restrict) dst; 8043 8044 const uint64_t v0 = 8045 __gen_uint(values->GSPrimitivesCountReport, 0, 63); 8046 dw[0] = v0; 8047 dw[1] = v0 >> 32; 8048} 8049 8050#define GEN75_HS_INVOCATION_COUNT_num 0x2300 8051#define GEN75_HS_INVOCATION_COUNT_length 2 8052struct GEN75_HS_INVOCATION_COUNT { 8053 uint64_t HSInvocationCountReport; 8054}; 8055 8056static inline void 8057GEN75_HS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 8058 __attribute__((unused)) void * restrict dst, 8059 __attribute__((unused)) const struct GEN75_HS_INVOCATION_COUNT * restrict values) 8060{ 8061 uint32_t * restrict dw = (uint32_t * restrict) dst; 8062 8063 const uint64_t v0 = 8064 __gen_uint(values->HSInvocationCountReport, 0, 63); 8065 dw[0] = v0; 8066 dw[1] = v0 >> 32; 8067} 8068 8069#define GEN75_IA_PRIMITIVES_COUNT_num 0x2318 8070#define GEN75_IA_PRIMITIVES_COUNT_length 2 8071struct GEN75_IA_PRIMITIVES_COUNT { 8072 uint64_t IAPrimitivesCountReport; 8073}; 8074 8075static inline void 8076GEN75_IA_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 8077 __attribute__((unused)) void * restrict dst, 8078 __attribute__((unused)) const struct GEN75_IA_PRIMITIVES_COUNT * restrict values) 8079{ 8080 uint32_t * restrict dw = (uint32_t * restrict) dst; 8081 8082 const uint64_t v0 = 8083 __gen_uint(values->IAPrimitivesCountReport, 0, 63); 8084 dw[0] = v0; 8085 dw[1] = v0 >> 32; 8086} 8087 8088#define GEN75_IA_VERTICES_COUNT_num 0x2310 8089#define GEN75_IA_VERTICES_COUNT_length 2 8090struct GEN75_IA_VERTICES_COUNT { 8091 uint64_t IAVerticesCountReport; 8092}; 8093 8094static inline void 8095GEN75_IA_VERTICES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 8096 __attribute__((unused)) void * restrict dst, 8097 __attribute__((unused)) const struct GEN75_IA_VERTICES_COUNT * restrict values) 8098{ 8099 uint32_t * restrict dw = (uint32_t * restrict) dst; 8100 8101 const uint64_t v0 = 8102 __gen_uint(values->IAVerticesCountReport, 0, 63); 8103 dw[0] = v0; 8104 dw[1] = v0 >> 32; 8105} 8106 8107#define GEN75_INSTDONE_1_num 0x206c 8108#define GEN75_INSTDONE_1_length 1 8109struct GEN75_INSTDONE_1 { 8110 bool PRB0RingEnable; 8111 bool VFGDone; 8112 bool VSDone; 8113 bool HSDone; 8114 bool TEDone; 8115 bool DSDone; 8116 bool GSDone; 8117 bool SOLDone; 8118 bool CLDone; 8119 bool SFDone; 8120 bool TDGDone; 8121 bool URBMDone; 8122 bool SVGDone; 8123 bool GAFSDone; 8124 bool VFEDone; 8125 bool TSGDone; 8126 bool GAFMDone; 8127 bool GAMDone; 8128 bool RSDone; 8129 bool CSDone; 8130 bool SDEDone; 8131 bool RCCFBCCSDone; 8132}; 8133 8134static inline void 8135GEN75_INSTDONE_1_pack(__attribute__((unused)) __gen_user_data *data, 8136 __attribute__((unused)) void * restrict dst, 8137 __attribute__((unused)) const struct GEN75_INSTDONE_1 * restrict values) 8138{ 8139 uint32_t * restrict dw = (uint32_t * restrict) dst; 8140 8141 dw[0] = 8142 __gen_uint(values->PRB0RingEnable, 0, 0) | 8143 __gen_uint(values->VFGDone, 1, 1) | 8144 __gen_uint(values->VSDone, 2, 2) | 8145 __gen_uint(values->HSDone, 3, 3) | 8146 __gen_uint(values->TEDone, 4, 4) | 8147 __gen_uint(values->DSDone, 5, 5) | 8148 __gen_uint(values->GSDone, 6, 6) | 8149 __gen_uint(values->SOLDone, 7, 7) | 8150 __gen_uint(values->CLDone, 8, 8) | 8151 __gen_uint(values->SFDone, 9, 9) | 8152 __gen_uint(values->TDGDone, 12, 12) | 8153 __gen_uint(values->URBMDone, 13, 13) | 8154 __gen_uint(values->SVGDone, 14, 14) | 8155 __gen_uint(values->GAFSDone, 15, 15) | 8156 __gen_uint(values->VFEDone, 16, 16) | 8157 __gen_uint(values->TSGDone, 17, 17) | 8158 __gen_uint(values->GAFMDone, 18, 18) | 8159 __gen_uint(values->GAMDone, 19, 19) | 8160 __gen_uint(values->RSDone, 20, 20) | 8161 __gen_uint(values->CSDone, 21, 21) | 8162 __gen_uint(values->SDEDone, 22, 22) | 8163 __gen_uint(values->RCCFBCCSDone, 23, 23); 8164} 8165 8166#define GEN75_INSTPM_num 0x20c0 8167#define GEN75_INSTPM_length 1 8168struct GEN75_INSTPM { 8169 bool _3DStateInstructionDisable; 8170 bool _3DRenderingInstructionDisable; 8171 bool MediaInstructionDisable; 8172 bool CONSTANT_BUFFERAddressOffsetDisable; 8173 bool _3DStateInstructionDisableMask; 8174 bool _3DRenderingInstructionDisableMask; 8175 bool MediaInstructionDisableMask; 8176 bool CONSTANT_BUFFERAddressOffsetDisableMask; 8177}; 8178 8179static inline void 8180GEN75_INSTPM_pack(__attribute__((unused)) __gen_user_data *data, 8181 __attribute__((unused)) void * restrict dst, 8182 __attribute__((unused)) const struct GEN75_INSTPM * restrict values) 8183{ 8184 uint32_t * restrict dw = (uint32_t * restrict) dst; 8185 8186 dw[0] = 8187 __gen_uint(values->_3DStateInstructionDisable, 1, 1) | 8188 __gen_uint(values->_3DRenderingInstructionDisable, 2, 2) | 8189 __gen_uint(values->MediaInstructionDisable, 3, 3) | 8190 __gen_uint(values->CONSTANT_BUFFERAddressOffsetDisable, 6, 6) | 8191 __gen_uint(values->_3DStateInstructionDisableMask, 17, 17) | 8192 __gen_uint(values->_3DRenderingInstructionDisableMask, 18, 18) | 8193 __gen_uint(values->MediaInstructionDisableMask, 19, 19) | 8194 __gen_uint(values->CONSTANT_BUFFERAddressOffsetDisableMask, 22, 22); 8195} 8196 8197#define GEN75_L3CNTLREG2_num 0xb020 8198#define GEN75_L3CNTLREG2_length 1 8199struct GEN75_L3CNTLREG2 { 8200 uint32_t SLMEnable; 8201 uint32_t URBAllocation; 8202 uint32_t URBLowBandwidth; 8203 uint32_t ROAllocation; 8204 uint32_t ROLowBandwidth; 8205 uint32_t DCAllocation; 8206 uint32_t DCLowBandwidth; 8207}; 8208 8209static inline void 8210GEN75_L3CNTLREG2_pack(__attribute__((unused)) __gen_user_data *data, 8211 __attribute__((unused)) void * restrict dst, 8212 __attribute__((unused)) const struct GEN75_L3CNTLREG2 * restrict values) 8213{ 8214 uint32_t * restrict dw = (uint32_t * restrict) dst; 8215 8216 dw[0] = 8217 __gen_uint(values->SLMEnable, 0, 0) | 8218 __gen_uint(values->URBAllocation, 1, 6) | 8219 __gen_uint(values->URBLowBandwidth, 7, 7) | 8220 __gen_uint(values->ROAllocation, 14, 19) | 8221 __gen_uint(values->ROLowBandwidth, 20, 20) | 8222 __gen_uint(values->DCAllocation, 21, 26) | 8223 __gen_uint(values->DCLowBandwidth, 27, 27); 8224} 8225 8226#define GEN75_L3CNTLREG3_num 0xb024 8227#define GEN75_L3CNTLREG3_length 1 8228struct GEN75_L3CNTLREG3 { 8229 uint32_t ISAllocation; 8230 uint32_t ISLowBandwidth; 8231 uint32_t CAllocation; 8232 uint32_t CLowBandwidth; 8233 uint32_t TAllocation; 8234 uint32_t TLowBandwidth; 8235}; 8236 8237static inline void 8238GEN75_L3CNTLREG3_pack(__attribute__((unused)) __gen_user_data *data, 8239 __attribute__((unused)) void * restrict dst, 8240 __attribute__((unused)) const struct GEN75_L3CNTLREG3 * restrict values) 8241{ 8242 uint32_t * restrict dw = (uint32_t * restrict) dst; 8243 8244 dw[0] = 8245 __gen_uint(values->ISAllocation, 1, 6) | 8246 __gen_uint(values->ISLowBandwidth, 7, 7) | 8247 __gen_uint(values->CAllocation, 8, 13) | 8248 __gen_uint(values->CLowBandwidth, 14, 14) | 8249 __gen_uint(values->TAllocation, 15, 20) | 8250 __gen_uint(values->TLowBandwidth, 21, 21); 8251} 8252 8253#define GEN75_L3SQCREG1_num 0xb010 8254#define GEN75_L3SQCREG1_length 1 8255struct GEN75_L3SQCREG1 { 8256 uint32_t ConvertDC_UC; 8257 uint32_t ConvertIS_UC; 8258 uint32_t ConvertC_UC; 8259 uint32_t ConvertT_UC; 8260}; 8261 8262static inline void 8263GEN75_L3SQCREG1_pack(__attribute__((unused)) __gen_user_data *data, 8264 __attribute__((unused)) void * restrict dst, 8265 __attribute__((unused)) const struct GEN75_L3SQCREG1 * restrict values) 8266{ 8267 uint32_t * restrict dw = (uint32_t * restrict) dst; 8268 8269 dw[0] = 8270 __gen_uint(values->ConvertDC_UC, 24, 24) | 8271 __gen_uint(values->ConvertIS_UC, 25, 25) | 8272 __gen_uint(values->ConvertC_UC, 26, 26) | 8273 __gen_uint(values->ConvertT_UC, 27, 27); 8274} 8275 8276#define GEN75_PS_INVOCATION_COUNT_num 0x2348 8277#define GEN75_PS_INVOCATION_COUNT_length 2 8278struct GEN75_PS_INVOCATION_COUNT { 8279 uint64_t PSInvocationCountReport; 8280}; 8281 8282static inline void 8283GEN75_PS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 8284 __attribute__((unused)) void * restrict dst, 8285 __attribute__((unused)) const struct GEN75_PS_INVOCATION_COUNT * restrict values) 8286{ 8287 uint32_t * restrict dw = (uint32_t * restrict) dst; 8288 8289 const uint64_t v0 = 8290 __gen_uint(values->PSInvocationCountReport, 0, 63); 8291 dw[0] = v0; 8292 dw[1] = v0 >> 32; 8293} 8294 8295#define GEN75_RCS_FAULT_REG_num 0x4094 8296#define GEN75_RCS_FAULT_REG_length 1 8297struct GEN75_RCS_FAULT_REG { 8298 bool ValidBit; 8299 uint32_t FaultType; 8300#define PageFault 0 8301#define InvalidPDFault 1 8302#define UnloadedPDFault 2 8303#define InvalidandUnloadedPDfault 3 8304 uint32_t SRCIDofFault; 8305 uint32_t GTTSEL; 8306#define PPGTT 0 8307#define GGTT 1 8308 __gen_address_type VirtualAddressofFault; 8309}; 8310 8311static inline void 8312GEN75_RCS_FAULT_REG_pack(__attribute__((unused)) __gen_user_data *data, 8313 __attribute__((unused)) void * restrict dst, 8314 __attribute__((unused)) const struct GEN75_RCS_FAULT_REG * restrict values) 8315{ 8316 uint32_t * restrict dw = (uint32_t * restrict) dst; 8317 8318 const uint32_t v0 = 8319 __gen_uint(values->ValidBit, 0, 0) | 8320 __gen_uint(values->FaultType, 1, 2) | 8321 __gen_uint(values->SRCIDofFault, 3, 10) | 8322 __gen_uint(values->GTTSEL, 11, 11); 8323 dw[0] = __gen_combine_address(data, &dw[0], values->VirtualAddressofFault, v0); 8324} 8325 8326#define GEN75_RCS_RING_BUFFER_CTL_num 0x203c 8327#define GEN75_RCS_RING_BUFFER_CTL_length 1 8328struct GEN75_RCS_RING_BUFFER_CTL { 8329 bool RingBufferEnable; 8330 uint32_t AutomaticReportHeadPointer; 8331#define MI_AUTOREPORT_OFF 0 8332#define MI_AUTOREPORT_64KBMI_AUTOREPORT_4KB 1 8333#define MI_AUTOREPORT_128KB 3 8334 bool SemaphoreWait; 8335 bool RBWait; 8336 uint32_t BufferLengthinpages1; 8337}; 8338 8339static inline void 8340GEN75_RCS_RING_BUFFER_CTL_pack(__attribute__((unused)) __gen_user_data *data, 8341 __attribute__((unused)) void * restrict dst, 8342 __attribute__((unused)) const struct GEN75_RCS_RING_BUFFER_CTL * restrict values) 8343{ 8344 uint32_t * restrict dw = (uint32_t * restrict) dst; 8345 8346 dw[0] = 8347 __gen_uint(values->RingBufferEnable, 0, 0) | 8348 __gen_uint(values->AutomaticReportHeadPointer, 1, 2) | 8349 __gen_uint(values->SemaphoreWait, 10, 10) | 8350 __gen_uint(values->RBWait, 11, 11) | 8351 __gen_uint(values->BufferLengthinpages1, 12, 20); 8352} 8353 8354#define GEN75_ROW_INSTDONE_num 0xe164 8355#define GEN75_ROW_INSTDONE_length 1 8356struct GEN75_ROW_INSTDONE { 8357 bool BCDone; 8358 bool PSDDone; 8359 bool DCDone; 8360 bool DAPRDone; 8361 bool TDLDone; 8362 bool GWDone; 8363 bool ICDone; 8364 bool MA0Done; 8365 bool EU00DoneSS0; 8366 bool EU01DoneSS0; 8367 bool EU02DoneSS0; 8368 bool EU03DoneSS0; 8369 bool EU04DoneSS0; 8370 bool EU10DoneSS0; 8371 bool EU11DoneSS0; 8372 bool EU12DoneSS0; 8373 bool EU13DoneSS0; 8374 bool EU14DoneSS0; 8375 bool MA1DoneSS0; 8376}; 8377 8378static inline void 8379GEN75_ROW_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 8380 __attribute__((unused)) void * restrict dst, 8381 __attribute__((unused)) const struct GEN75_ROW_INSTDONE * restrict values) 8382{ 8383 uint32_t * restrict dw = (uint32_t * restrict) dst; 8384 8385 dw[0] = 8386 __gen_uint(values->BCDone, 0, 0) | 8387 __gen_uint(values->PSDDone, 1, 1) | 8388 __gen_uint(values->DCDone, 2, 2) | 8389 __gen_uint(values->DAPRDone, 3, 3) | 8390 __gen_uint(values->TDLDone, 6, 6) | 8391 __gen_uint(values->GWDone, 8, 8) | 8392 __gen_uint(values->ICDone, 12, 12) | 8393 __gen_uint(values->MA0Done, 15, 15) | 8394 __gen_uint(values->EU00DoneSS0, 16, 16) | 8395 __gen_uint(values->EU01DoneSS0, 17, 17) | 8396 __gen_uint(values->EU02DoneSS0, 18, 18) | 8397 __gen_uint(values->EU03DoneSS0, 19, 19) | 8398 __gen_uint(values->EU04DoneSS0, 20, 20) | 8399 __gen_uint(values->EU10DoneSS0, 21, 21) | 8400 __gen_uint(values->EU11DoneSS0, 22, 22) | 8401 __gen_uint(values->EU12DoneSS0, 23, 23) | 8402 __gen_uint(values->EU13DoneSS0, 24, 24) | 8403 __gen_uint(values->EU14DoneSS0, 25, 25) | 8404 __gen_uint(values->MA1DoneSS0, 26, 26); 8405} 8406 8407#define GEN75_SAMPLER_INSTDONE_num 0xe160 8408#define GEN75_SAMPLER_INSTDONE_length 1 8409struct GEN75_SAMPLER_INSTDONE { 8410 bool IMEDone; 8411 bool PL0Done; 8412 bool SO0Done; 8413 bool DG0Done; 8414 bool FT0Done; 8415 bool DM0Done; 8416 bool SCDone; 8417 bool FL0Done; 8418 bool QCDone; 8419 bool SVSMDone; 8420 bool SI0Done; 8421 bool MT0Done; 8422 bool AVSDone; 8423 bool IEFDone; 8424 bool CREDone; 8425 bool SVSMARB3; 8426 bool SVSMARB2; 8427 bool SVSMARB1; 8428 bool SVSMAdapter; 8429 bool FT1Done; 8430 bool DM1Done; 8431 bool MT1Done; 8432}; 8433 8434static inline void 8435GEN75_SAMPLER_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 8436 __attribute__((unused)) void * restrict dst, 8437 __attribute__((unused)) const struct GEN75_SAMPLER_INSTDONE * restrict values) 8438{ 8439 uint32_t * restrict dw = (uint32_t * restrict) dst; 8440 8441 dw[0] = 8442 __gen_uint(values->IMEDone, 0, 0) | 8443 __gen_uint(values->PL0Done, 1, 1) | 8444 __gen_uint(values->SO0Done, 2, 2) | 8445 __gen_uint(values->DG0Done, 3, 3) | 8446 __gen_uint(values->FT0Done, 4, 4) | 8447 __gen_uint(values->DM0Done, 5, 5) | 8448 __gen_uint(values->SCDone, 6, 6) | 8449 __gen_uint(values->FL0Done, 7, 7) | 8450 __gen_uint(values->QCDone, 8, 8) | 8451 __gen_uint(values->SVSMDone, 9, 9) | 8452 __gen_uint(values->SI0Done, 10, 10) | 8453 __gen_uint(values->MT0Done, 11, 11) | 8454 __gen_uint(values->AVSDone, 12, 12) | 8455 __gen_uint(values->IEFDone, 13, 13) | 8456 __gen_uint(values->CREDone, 14, 14) | 8457 __gen_uint(values->SVSMARB3, 15, 15) | 8458 __gen_uint(values->SVSMARB2, 16, 16) | 8459 __gen_uint(values->SVSMARB1, 17, 17) | 8460 __gen_uint(values->SVSMAdapter, 18, 18) | 8461 __gen_uint(values->FT1Done, 19, 19) | 8462 __gen_uint(values->DM1Done, 20, 20) | 8463 __gen_uint(values->MT1Done, 21, 21); 8464} 8465 8466#define GEN75_SCRATCH1_num 0xb038 8467#define GEN75_SCRATCH1_length 1 8468struct GEN75_SCRATCH1 { 8469 uint32_t L3AtomicDisable; 8470}; 8471 8472static inline void 8473GEN75_SCRATCH1_pack(__attribute__((unused)) __gen_user_data *data, 8474 __attribute__((unused)) void * restrict dst, 8475 __attribute__((unused)) const struct GEN75_SCRATCH1 * restrict values) 8476{ 8477 uint32_t * restrict dw = (uint32_t * restrict) dst; 8478 8479 dw[0] = 8480 __gen_uint(values->L3AtomicDisable, 27, 27); 8481} 8482 8483#define GEN75_SC_INSTDONE_num 0x7100 8484#define GEN75_SC_INSTDONE_length 1 8485struct GEN75_SC_INSTDONE { 8486 bool SVLDone; 8487 bool WMFEDone; 8488 bool WMBEDone; 8489 bool HIZDone; 8490 bool STCDone; 8491 bool IZDone; 8492 bool SBEDone; 8493 bool RCZDone; 8494 bool RCCDone; 8495 bool RCPBEDone; 8496 bool RCPFEDone; 8497 bool DAPBDone; 8498 bool DAPRBEDone; 8499 bool SARBDone; 8500}; 8501 8502static inline void 8503GEN75_SC_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 8504 __attribute__((unused)) void * restrict dst, 8505 __attribute__((unused)) const struct GEN75_SC_INSTDONE * restrict values) 8506{ 8507 uint32_t * restrict dw = (uint32_t * restrict) dst; 8508 8509 dw[0] = 8510 __gen_uint(values->SVLDone, 0, 0) | 8511 __gen_uint(values->WMFEDone, 1, 1) | 8512 __gen_uint(values->WMBEDone, 2, 2) | 8513 __gen_uint(values->HIZDone, 3, 3) | 8514 __gen_uint(values->STCDone, 4, 4) | 8515 __gen_uint(values->IZDone, 5, 5) | 8516 __gen_uint(values->SBEDone, 6, 6) | 8517 __gen_uint(values->RCZDone, 8, 8) | 8518 __gen_uint(values->RCCDone, 9, 9) | 8519 __gen_uint(values->RCPBEDone, 10, 10) | 8520 __gen_uint(values->RCPFEDone, 11, 11) | 8521 __gen_uint(values->DAPBDone, 12, 12) | 8522 __gen_uint(values->DAPRBEDone, 13, 13) | 8523 __gen_uint(values->SARBDone, 15, 15); 8524} 8525 8526#define GEN75_SO_NUM_PRIMS_WRITTEN0_num 0x5200 8527#define GEN75_SO_NUM_PRIMS_WRITTEN0_length 2 8528struct GEN75_SO_NUM_PRIMS_WRITTEN0 { 8529 uint64_t NumPrimsWrittenCount; 8530}; 8531 8532static inline void 8533GEN75_SO_NUM_PRIMS_WRITTEN0_pack(__attribute__((unused)) __gen_user_data *data, 8534 __attribute__((unused)) void * restrict dst, 8535 __attribute__((unused)) const struct GEN75_SO_NUM_PRIMS_WRITTEN0 * restrict values) 8536{ 8537 uint32_t * restrict dw = (uint32_t * restrict) dst; 8538 8539 const uint64_t v0 = 8540 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 8541 dw[0] = v0; 8542 dw[1] = v0 >> 32; 8543} 8544 8545#define GEN75_SO_NUM_PRIMS_WRITTEN1_num 0x5208 8546#define GEN75_SO_NUM_PRIMS_WRITTEN1_length 2 8547struct GEN75_SO_NUM_PRIMS_WRITTEN1 { 8548 uint64_t NumPrimsWrittenCount; 8549}; 8550 8551static inline void 8552GEN75_SO_NUM_PRIMS_WRITTEN1_pack(__attribute__((unused)) __gen_user_data *data, 8553 __attribute__((unused)) void * restrict dst, 8554 __attribute__((unused)) const struct GEN75_SO_NUM_PRIMS_WRITTEN1 * restrict values) 8555{ 8556 uint32_t * restrict dw = (uint32_t * restrict) dst; 8557 8558 const uint64_t v0 = 8559 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 8560 dw[0] = v0; 8561 dw[1] = v0 >> 32; 8562} 8563 8564#define GEN75_SO_NUM_PRIMS_WRITTEN2_num 0x5210 8565#define GEN75_SO_NUM_PRIMS_WRITTEN2_length 2 8566struct GEN75_SO_NUM_PRIMS_WRITTEN2 { 8567 uint64_t NumPrimsWrittenCount; 8568}; 8569 8570static inline void 8571GEN75_SO_NUM_PRIMS_WRITTEN2_pack(__attribute__((unused)) __gen_user_data *data, 8572 __attribute__((unused)) void * restrict dst, 8573 __attribute__((unused)) const struct GEN75_SO_NUM_PRIMS_WRITTEN2 * restrict values) 8574{ 8575 uint32_t * restrict dw = (uint32_t * restrict) dst; 8576 8577 const uint64_t v0 = 8578 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 8579 dw[0] = v0; 8580 dw[1] = v0 >> 32; 8581} 8582 8583#define GEN75_SO_NUM_PRIMS_WRITTEN3_num 0x5218 8584#define GEN75_SO_NUM_PRIMS_WRITTEN3_length 2 8585struct GEN75_SO_NUM_PRIMS_WRITTEN3 { 8586 uint64_t NumPrimsWrittenCount; 8587}; 8588 8589static inline void 8590GEN75_SO_NUM_PRIMS_WRITTEN3_pack(__attribute__((unused)) __gen_user_data *data, 8591 __attribute__((unused)) void * restrict dst, 8592 __attribute__((unused)) const struct GEN75_SO_NUM_PRIMS_WRITTEN3 * restrict values) 8593{ 8594 uint32_t * restrict dw = (uint32_t * restrict) dst; 8595 8596 const uint64_t v0 = 8597 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 8598 dw[0] = v0; 8599 dw[1] = v0 >> 32; 8600} 8601 8602#define GEN75_SO_PRIM_STORAGE_NEEDED0_num 0x5240 8603#define GEN75_SO_PRIM_STORAGE_NEEDED0_length 2 8604struct GEN75_SO_PRIM_STORAGE_NEEDED0 { 8605 uint64_t PrimStorageNeededCount; 8606}; 8607 8608static inline void 8609GEN75_SO_PRIM_STORAGE_NEEDED0_pack(__attribute__((unused)) __gen_user_data *data, 8610 __attribute__((unused)) void * restrict dst, 8611 __attribute__((unused)) const struct GEN75_SO_PRIM_STORAGE_NEEDED0 * restrict values) 8612{ 8613 uint32_t * restrict dw = (uint32_t * restrict) dst; 8614 8615 const uint64_t v0 = 8616 __gen_uint(values->PrimStorageNeededCount, 0, 63); 8617 dw[0] = v0; 8618 dw[1] = v0 >> 32; 8619} 8620 8621#define GEN75_SO_PRIM_STORAGE_NEEDED1_num 0x5248 8622#define GEN75_SO_PRIM_STORAGE_NEEDED1_length 2 8623struct GEN75_SO_PRIM_STORAGE_NEEDED1 { 8624 uint64_t PrimStorageNeededCount; 8625}; 8626 8627static inline void 8628GEN75_SO_PRIM_STORAGE_NEEDED1_pack(__attribute__((unused)) __gen_user_data *data, 8629 __attribute__((unused)) void * restrict dst, 8630 __attribute__((unused)) const struct GEN75_SO_PRIM_STORAGE_NEEDED1 * restrict values) 8631{ 8632 uint32_t * restrict dw = (uint32_t * restrict) dst; 8633 8634 const uint64_t v0 = 8635 __gen_uint(values->PrimStorageNeededCount, 0, 63); 8636 dw[0] = v0; 8637 dw[1] = v0 >> 32; 8638} 8639 8640#define GEN75_SO_PRIM_STORAGE_NEEDED2_num 0x5250 8641#define GEN75_SO_PRIM_STORAGE_NEEDED2_length 2 8642struct GEN75_SO_PRIM_STORAGE_NEEDED2 { 8643 uint64_t PrimStorageNeededCount; 8644}; 8645 8646static inline void 8647GEN75_SO_PRIM_STORAGE_NEEDED2_pack(__attribute__((unused)) __gen_user_data *data, 8648 __attribute__((unused)) void * restrict dst, 8649 __attribute__((unused)) const struct GEN75_SO_PRIM_STORAGE_NEEDED2 * restrict values) 8650{ 8651 uint32_t * restrict dw = (uint32_t * restrict) dst; 8652 8653 const uint64_t v0 = 8654 __gen_uint(values->PrimStorageNeededCount, 0, 63); 8655 dw[0] = v0; 8656 dw[1] = v0 >> 32; 8657} 8658 8659#define GEN75_SO_PRIM_STORAGE_NEEDED3_num 0x5258 8660#define GEN75_SO_PRIM_STORAGE_NEEDED3_length 2 8661struct GEN75_SO_PRIM_STORAGE_NEEDED3 { 8662 uint64_t PrimStorageNeededCount; 8663}; 8664 8665static inline void 8666GEN75_SO_PRIM_STORAGE_NEEDED3_pack(__attribute__((unused)) __gen_user_data *data, 8667 __attribute__((unused)) void * restrict dst, 8668 __attribute__((unused)) const struct GEN75_SO_PRIM_STORAGE_NEEDED3 * restrict values) 8669{ 8670 uint32_t * restrict dw = (uint32_t * restrict) dst; 8671 8672 const uint64_t v0 = 8673 __gen_uint(values->PrimStorageNeededCount, 0, 63); 8674 dw[0] = v0; 8675 dw[1] = v0 >> 32; 8676} 8677 8678#define GEN75_SO_WRITE_OFFSET0_num 0x5280 8679#define GEN75_SO_WRITE_OFFSET0_length 1 8680struct GEN75_SO_WRITE_OFFSET0 { 8681 uint64_t WriteOffset; 8682}; 8683 8684static inline void 8685GEN75_SO_WRITE_OFFSET0_pack(__attribute__((unused)) __gen_user_data *data, 8686 __attribute__((unused)) void * restrict dst, 8687 __attribute__((unused)) const struct GEN75_SO_WRITE_OFFSET0 * restrict values) 8688{ 8689 uint32_t * restrict dw = (uint32_t * restrict) dst; 8690 8691 dw[0] = 8692 __gen_offset(values->WriteOffset, 2, 31); 8693} 8694 8695#define GEN75_SO_WRITE_OFFSET1_num 0x5284 8696#define GEN75_SO_WRITE_OFFSET1_length 1 8697struct GEN75_SO_WRITE_OFFSET1 { 8698 uint64_t WriteOffset; 8699}; 8700 8701static inline void 8702GEN75_SO_WRITE_OFFSET1_pack(__attribute__((unused)) __gen_user_data *data, 8703 __attribute__((unused)) void * restrict dst, 8704 __attribute__((unused)) const struct GEN75_SO_WRITE_OFFSET1 * restrict values) 8705{ 8706 uint32_t * restrict dw = (uint32_t * restrict) dst; 8707 8708 dw[0] = 8709 __gen_offset(values->WriteOffset, 2, 31); 8710} 8711 8712#define GEN75_SO_WRITE_OFFSET2_num 0x5288 8713#define GEN75_SO_WRITE_OFFSET2_length 1 8714struct GEN75_SO_WRITE_OFFSET2 { 8715 uint64_t WriteOffset; 8716}; 8717 8718static inline void 8719GEN75_SO_WRITE_OFFSET2_pack(__attribute__((unused)) __gen_user_data *data, 8720 __attribute__((unused)) void * restrict dst, 8721 __attribute__((unused)) const struct GEN75_SO_WRITE_OFFSET2 * restrict values) 8722{ 8723 uint32_t * restrict dw = (uint32_t * restrict) dst; 8724 8725 dw[0] = 8726 __gen_offset(values->WriteOffset, 2, 31); 8727} 8728 8729#define GEN75_SO_WRITE_OFFSET3_num 0x528c 8730#define GEN75_SO_WRITE_OFFSET3_length 1 8731struct GEN75_SO_WRITE_OFFSET3 { 8732 uint64_t WriteOffset; 8733}; 8734 8735static inline void 8736GEN75_SO_WRITE_OFFSET3_pack(__attribute__((unused)) __gen_user_data *data, 8737 __attribute__((unused)) void * restrict dst, 8738 __attribute__((unused)) const struct GEN75_SO_WRITE_OFFSET3 * restrict values) 8739{ 8740 uint32_t * restrict dw = (uint32_t * restrict) dst; 8741 8742 dw[0] = 8743 __gen_offset(values->WriteOffset, 2, 31); 8744} 8745 8746#define GEN75_VCS_FAULT_REG_num 0x4194 8747#define GEN75_VCS_FAULT_REG_length 1 8748struct GEN75_VCS_FAULT_REG { 8749 bool ValidBit; 8750 uint32_t FaultType; 8751#define PageFault 0 8752#define InvalidPDFault 1 8753#define UnloadedPDFault 2 8754#define InvalidandUnloadedPDfault 3 8755 uint32_t SRCIDofFault; 8756 uint32_t GTTSEL; 8757#define PPGTT 0 8758#define GGTT 1 8759 __gen_address_type VirtualAddressofFault; 8760}; 8761 8762static inline void 8763GEN75_VCS_FAULT_REG_pack(__attribute__((unused)) __gen_user_data *data, 8764 __attribute__((unused)) void * restrict dst, 8765 __attribute__((unused)) const struct GEN75_VCS_FAULT_REG * restrict values) 8766{ 8767 uint32_t * restrict dw = (uint32_t * restrict) dst; 8768 8769 const uint32_t v0 = 8770 __gen_uint(values->ValidBit, 0, 0) | 8771 __gen_uint(values->FaultType, 1, 2) | 8772 __gen_uint(values->SRCIDofFault, 3, 10) | 8773 __gen_uint(values->GTTSEL, 11, 11); 8774 dw[0] = __gen_combine_address(data, &dw[0], values->VirtualAddressofFault, v0); 8775} 8776 8777#define GEN75_VCS_INSTDONE_num 0x1206c 8778#define GEN75_VCS_INSTDONE_length 1 8779struct GEN75_VCS_INSTDONE { 8780 bool RingEnable; 8781 uint32_t USBDone; 8782 uint32_t QRCDone; 8783 uint32_t SECDone; 8784 uint32_t MPCDone; 8785 uint32_t VFTDone; 8786 uint32_t BSPDone; 8787 uint32_t VLFDone; 8788 uint32_t VOPDone; 8789 uint32_t VMCDone; 8790 uint32_t VIPDone; 8791 uint32_t VITDone; 8792 uint32_t VDSDone; 8793 uint32_t VMXDone; 8794 uint32_t VCPDone; 8795 uint32_t VCDDone; 8796 uint32_t VADDone; 8797 uint32_t VMDDone; 8798 uint32_t VISDone; 8799 uint32_t VACDone; 8800 uint32_t VAMDone; 8801 uint32_t JPGDone; 8802 uint32_t VBPDone; 8803 uint32_t VHRDone; 8804 uint32_t VCIDone; 8805 uint32_t VCRDone; 8806 uint32_t VINDone; 8807 uint32_t VPRDone; 8808 uint32_t VTQDone; 8809 uint32_t Reserved; 8810 uint32_t VCSDone; 8811 uint32_t GACDone; 8812}; 8813 8814static inline void 8815GEN75_VCS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 8816 __attribute__((unused)) void * restrict dst, 8817 __attribute__((unused)) const struct GEN75_VCS_INSTDONE * restrict values) 8818{ 8819 uint32_t * restrict dw = (uint32_t * restrict) dst; 8820 8821 dw[0] = 8822 __gen_uint(values->RingEnable, 0, 0) | 8823 __gen_uint(values->USBDone, 1, 1) | 8824 __gen_uint(values->QRCDone, 2, 2) | 8825 __gen_uint(values->SECDone, 3, 3) | 8826 __gen_uint(values->MPCDone, 4, 4) | 8827 __gen_uint(values->VFTDone, 5, 5) | 8828 __gen_uint(values->BSPDone, 6, 6) | 8829 __gen_uint(values->VLFDone, 7, 7) | 8830 __gen_uint(values->VOPDone, 8, 8) | 8831 __gen_uint(values->VMCDone, 9, 9) | 8832 __gen_uint(values->VIPDone, 10, 10) | 8833 __gen_uint(values->VITDone, 11, 11) | 8834 __gen_uint(values->VDSDone, 12, 12) | 8835 __gen_uint(values->VMXDone, 13, 13) | 8836 __gen_uint(values->VCPDone, 14, 14) | 8837 __gen_uint(values->VCDDone, 15, 15) | 8838 __gen_uint(values->VADDone, 16, 16) | 8839 __gen_uint(values->VMDDone, 17, 17) | 8840 __gen_uint(values->VISDone, 18, 18) | 8841 __gen_uint(values->VACDone, 19, 19) | 8842 __gen_uint(values->VAMDone, 20, 20) | 8843 __gen_uint(values->JPGDone, 21, 21) | 8844 __gen_uint(values->VBPDone, 22, 22) | 8845 __gen_uint(values->VHRDone, 23, 23) | 8846 __gen_uint(values->VCIDone, 24, 24) | 8847 __gen_uint(values->VCRDone, 25, 25) | 8848 __gen_uint(values->VINDone, 26, 26) | 8849 __gen_uint(values->VPRDone, 27, 27) | 8850 __gen_uint(values->VTQDone, 28, 28) | 8851 __gen_uint(values->Reserved, 29, 29) | 8852 __gen_uint(values->VCSDone, 30, 30) | 8853 __gen_uint(values->GACDone, 31, 31); 8854} 8855 8856#define GEN75_VCS_RING_BUFFER_CTL_num 0x1203c 8857#define GEN75_VCS_RING_BUFFER_CTL_length 1 8858struct GEN75_VCS_RING_BUFFER_CTL { 8859 bool RingBufferEnable; 8860 uint32_t AutomaticReportHeadPointer; 8861#define MI_AUTOREPORT_OFF 0 8862#define MI_AUTOREPORT_64KB 1 8863#define MI_AUTOREPORT_4KB 2 8864#define MI_AUTOREPORT_128KB 3 8865 bool DisableRegisterAccesses; 8866 bool SemaphoreWait; 8867 bool RBWait; 8868 uint32_t BufferLengthinpages1; 8869}; 8870 8871static inline void 8872GEN75_VCS_RING_BUFFER_CTL_pack(__attribute__((unused)) __gen_user_data *data, 8873 __attribute__((unused)) void * restrict dst, 8874 __attribute__((unused)) const struct GEN75_VCS_RING_BUFFER_CTL * restrict values) 8875{ 8876 uint32_t * restrict dw = (uint32_t * restrict) dst; 8877 8878 dw[0] = 8879 __gen_uint(values->RingBufferEnable, 0, 0) | 8880 __gen_uint(values->AutomaticReportHeadPointer, 1, 2) | 8881 __gen_uint(values->DisableRegisterAccesses, 8, 8) | 8882 __gen_uint(values->SemaphoreWait, 10, 10) | 8883 __gen_uint(values->RBWait, 11, 11) | 8884 __gen_uint(values->BufferLengthinpages1, 12, 20); 8885} 8886 8887#define GEN75_VECS_FAULT_REG_num 0x4394 8888#define GEN75_VECS_FAULT_REG_length 1 8889struct GEN75_VECS_FAULT_REG { 8890 bool ValidBit; 8891 uint32_t FaultType; 8892#define PageFault 0 8893#define InvalidPDFault 1 8894#define UnloadedPDFault 2 8895#define InvalidandUnloadedPDfault 3 8896 uint32_t SRCIDofFault; 8897 uint32_t GTTSEL; 8898#define PPGTT 0 8899#define GGTT 1 8900 __gen_address_type VirtualAddressofFault; 8901}; 8902 8903static inline void 8904GEN75_VECS_FAULT_REG_pack(__attribute__((unused)) __gen_user_data *data, 8905 __attribute__((unused)) void * restrict dst, 8906 __attribute__((unused)) const struct GEN75_VECS_FAULT_REG * restrict values) 8907{ 8908 uint32_t * restrict dw = (uint32_t * restrict) dst; 8909 8910 const uint32_t v0 = 8911 __gen_uint(values->ValidBit, 0, 0) | 8912 __gen_uint(values->FaultType, 1, 2) | 8913 __gen_uint(values->SRCIDofFault, 3, 10) | 8914 __gen_uint(values->GTTSEL, 11, 11); 8915 dw[0] = __gen_combine_address(data, &dw[0], values->VirtualAddressofFault, v0); 8916} 8917 8918#define GEN75_VECS_INSTDONE_num 0x1a06c 8919#define GEN75_VECS_INSTDONE_length 1 8920struct GEN75_VECS_INSTDONE { 8921 bool RingEnable; 8922 uint32_t VECSDone; 8923 uint32_t GAMDone; 8924}; 8925 8926static inline void 8927GEN75_VECS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 8928 __attribute__((unused)) void * restrict dst, 8929 __attribute__((unused)) const struct GEN75_VECS_INSTDONE * restrict values) 8930{ 8931 uint32_t * restrict dw = (uint32_t * restrict) dst; 8932 8933 dw[0] = 8934 __gen_uint(values->RingEnable, 0, 0) | 8935 __gen_uint(values->VECSDone, 30, 30) | 8936 __gen_uint(values->GAMDone, 31, 31); 8937} 8938 8939#define GEN75_VECS_RING_BUFFER_CTL_num 0x1a03c 8940#define GEN75_VECS_RING_BUFFER_CTL_length 1 8941struct GEN75_VECS_RING_BUFFER_CTL { 8942 bool RingBufferEnable; 8943 uint32_t AutomaticReportHeadPointer; 8944#define MI_AUTOREPORT_OFF 0 8945#define MI_AUTOREPORT_64KB 1 8946#define MI_AUTOREPORT_4KB 2 8947#define MI_AUTOREPORT_128KB 3 8948 bool DisableRegisterAccesses; 8949 bool SemaphoreWait; 8950 bool RBWait; 8951 uint32_t BufferLengthinpages1; 8952}; 8953 8954static inline void 8955GEN75_VECS_RING_BUFFER_CTL_pack(__attribute__((unused)) __gen_user_data *data, 8956 __attribute__((unused)) void * restrict dst, 8957 __attribute__((unused)) const struct GEN75_VECS_RING_BUFFER_CTL * restrict values) 8958{ 8959 uint32_t * restrict dw = (uint32_t * restrict) dst; 8960 8961 dw[0] = 8962 __gen_uint(values->RingBufferEnable, 0, 0) | 8963 __gen_uint(values->AutomaticReportHeadPointer, 1, 2) | 8964 __gen_uint(values->DisableRegisterAccesses, 8, 8) | 8965 __gen_uint(values->SemaphoreWait, 10, 10) | 8966 __gen_uint(values->RBWait, 11, 11) | 8967 __gen_uint(values->BufferLengthinpages1, 12, 20); 8968} 8969 8970#define GEN75_VS_INVOCATION_COUNT_num 0x2320 8971#define GEN75_VS_INVOCATION_COUNT_length 2 8972struct GEN75_VS_INVOCATION_COUNT { 8973 uint64_t VSInvocationCountReport; 8974}; 8975 8976static inline void 8977GEN75_VS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 8978 __attribute__((unused)) void * restrict dst, 8979 __attribute__((unused)) const struct GEN75_VS_INVOCATION_COUNT * restrict values) 8980{ 8981 uint32_t * restrict dw = (uint32_t * restrict) dst; 8982 8983 const uint64_t v0 = 8984 __gen_uint(values->VSInvocationCountReport, 0, 63); 8985 dw[0] = v0; 8986 dw[1] = v0 >> 32; 8987} 8988 8989#endif /* GEN75_PACK_H */ 8990