17.0.2.rst revision 7ec681f3
17ec681f3SmrgMesa 17.0.2 Release Notes / March 20, 2017 27ec681f3Smrg========================================== 37ec681f3Smrg 47ec681f3SmrgMesa 17.0.2 is a bug fix release which fixes bugs found since the 17.0.1 57ec681f3Smrgrelease. 67ec681f3Smrg 77ec681f3SmrgMesa 17.0.2 implements the OpenGL 4.5 API, but the version reported by 87ec681f3SmrgglGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / 97ec681f3SmrgglGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being 107ec681f3Smrgused. Some drivers don't support all the features required in OpenGL 117ec681f3Smrg4.5. OpenGL 4.5 is **only** available if requested at context creation 127ec681f3Smrgbecause compatibility contexts are not supported. 137ec681f3Smrg 147ec681f3SmrgSHA256 checksums 157ec681f3Smrg---------------- 167ec681f3Smrg 177ec681f3Smrg:: 187ec681f3Smrg 197ec681f3Smrg 2e0f41e7974ba7a36ca32bbeaf8ebcd65c8fd4d2dc9872f04d4becbd5e7a8cb5 mesa-17.0.2.tar.gz 207ec681f3Smrg f8f191f909e01e65de38d5bdea5fb057f21649a3aed20948be02348e77a689d4 mesa-17.0.2.tar.xz 217ec681f3Smrg 227ec681f3SmrgNew features 237ec681f3Smrg------------ 247ec681f3Smrg 257ec681f3SmrgNone 267ec681f3Smrg 277ec681f3SmrgBug fixes 287ec681f3Smrg--------- 297ec681f3Smrg 307ec681f3Smrg- `Bug 68504 <https://bugs.freedesktop.org/show_bug.cgi?id=68504>`__ - 317ec681f3Smrg 9.2-rc1 workaround for clover build failure on ppc/altivec: cannot 327ec681f3Smrg convert 'bool' to '__vector(4) \__bool int' in return 337ec681f3Smrg- `Bug 97988 <https://bugs.freedesktop.org/show_bug.cgi?id=97988>`__ - 347ec681f3Smrg [radeonsi] playing back videos with VDPAU exhibits 357ec681f3Smrg deinterlacing/anti-aliasing issues not visible with VA-API 367ec681f3Smrg- `Bug 99484 <https://bugs.freedesktop.org/show_bug.cgi?id=99484>`__ - 377ec681f3Smrg Crusader Kings 2 - Loading bars, siege bars, morale bars, etc. do not 387ec681f3Smrg render correctly 397ec681f3Smrg- `Bug 99715 <https://bugs.freedesktop.org/show_bug.cgi?id=99715>`__ - 407ec681f3Smrg Don't print: "Note: Buggy applications may crash, if they do please 417ec681f3Smrg report to vendor" 427ec681f3Smrg- `Bug 100049 <https://bugs.freedesktop.org/show_bug.cgi?id=100049>`__ 437ec681f3Smrg - "ralloc: Make sure ralloc() allocations match malloc()'s 447ec681f3Smrg alignment." causes seg fault in 32bit build 457ec681f3Smrg 467ec681f3SmrgChanges 477ec681f3Smrg------- 487ec681f3Smrg 497ec681f3SmrgAlex Smith (3): 507ec681f3Smrg 517ec681f3Smrg- radv: Emit pending flushes before executing a secondary command 527ec681f3Smrg buffer 537ec681f3Smrg- radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBuffer 547ec681f3Smrg- radv/ac: Fix shared memory offset calculation 557ec681f3Smrg 567ec681f3SmrgBas Nieuwenhuizen (3): 577ec681f3Smrg 587ec681f3Smrg- radv: Disable HTILE for textures with multiple layers/levels. 597ec681f3Smrg- radv: Emit cache flushes before CP DMA. 607ec681f3Smrg- Revert "radv: Emit cache flushes before CP DMA." 617ec681f3Smrg 627ec681f3SmrgDave Airlie (3): 637ec681f3Smrg 647ec681f3Smrg- radv: drop Z24 support. 657ec681f3Smrg- radv: disable mip point pre clamping. 667ec681f3Smrg- radv: setup llvm target data layout 677ec681f3Smrg 687ec681f3SmrgEmil Velikov (4): 697ec681f3Smrg 707ec681f3Smrg- docs: add sha256 checksums for 17.0.1 717ec681f3Smrg- cherry-ignore: add the swizzle blorp_clear fix 727ec681f3Smrg- i965: move brw_define.h ifndef guard to the top 737ec681f3Smrg- Update version to 17.0.2 747ec681f3Smrg 757ec681f3SmrgFredrik Höglund (2): 767ec681f3Smrg 777ec681f3Smrg- radv: fix the dynamic buffer index in vkCmdBindDescriptorSets 787ec681f3Smrg- radv/ac: fix multiple descriptor sets with dynamic buffers 797ec681f3Smrg 807ec681f3SmrgGregory Hainaut (1): 817ec681f3Smrg 827ec681f3Smrg- glapi: fix typo in count_scale 837ec681f3Smrg 847ec681f3SmrgIlia Mirkin (2): 857ec681f3Smrg 867ec681f3Smrg- nvc0: take extra pushbuf space into account for pushbuf_space calls 877ec681f3Smrg- nvc0: increase alignment to 256 for texture buffers on fermi 887ec681f3Smrg 897ec681f3SmrgJacob Lifshay (1): 907ec681f3Smrg 917ec681f3Smrg- vulkan/wsi: Improve the DRI3 error message 927ec681f3Smrg 937ec681f3SmrgJames Legg (1): 947ec681f3Smrg 957ec681f3Smrg- radv: Fix using more than 4 bound descriptor sets 967ec681f3Smrg 977ec681f3SmrgJason Ekstrand (7): 987ec681f3Smrg 997ec681f3Smrg- anv/blorp/clear_subpass: Only set surface clear color for fast clears 1007ec681f3Smrg- anv: Accurately advertise dynamic descriptor limits 1017ec681f3Smrg- anv: Stall before fast-clear operations 1027ec681f3Smrg- anv: Properly handle destroying NULL devices and instances 1037ec681f3Smrg- anv/blorp: Turn off AUX after doing a CCS_D resolve 1047ec681f3Smrg- anv/blorp: Only set a clear color for resolves if fast-cleared 1057ec681f3Smrg- nir/intrinsics: Make load_barycentric_input take a 2-component coor 1067ec681f3Smrg 1077ec681f3SmrgJonas Pfeil (1): 1087ec681f3Smrg 1097ec681f3Smrg- ralloc: Make sure ralloc() allocations match malloc()'s alignment. 1107ec681f3Smrg 1117ec681f3SmrgKenneth Graunke (1): 1127ec681f3Smrg 1137ec681f3Smrg- egl: Ensure ResetNotificationStrategy matches for shared contexts. 1147ec681f3Smrg 1157ec681f3SmrgMarek Olšák (3): 1167ec681f3Smrg 1177ec681f3Smrg- st/mesa: reset sample_mask, min_sample, and render_condition for PBO 1187ec681f3Smrg ops 1197ec681f3Smrg- st/mesa: set blend state for PBO readbacks 1207ec681f3Smrg- radeonsi: mark all bound shader buffer ranges as initialized 1217ec681f3Smrg 1227ec681f3SmrgMatt Turner (1): 1237ec681f3Smrg 1247ec681f3Smrg- clover: Work around build failure with AltiVec. 1257ec681f3Smrg 1267ec681f3SmrgNanley Chery (2): 1277ec681f3Smrg 1287ec681f3Smrg- anv/pass: Avoid accessing attachment array out of bounds 1297ec681f3Smrg- anv/image: Remove extra dependency on HiZ-specific variable 1307ec681f3Smrg 1317ec681f3SmrgNicolai Hähnle (2): 1327ec681f3Smrg 1337ec681f3Smrg- st/glsl_to_tgsi: avoid iterating past the head of the instruction 1347ec681f3Smrg list 1357ec681f3Smrg- st/mesa: inform the driver of framebuffer changes before compute 1367ec681f3Smrg dispatches 1377ec681f3Smrg 1387ec681f3SmrgRobert Foss (1): 1397ec681f3Smrg 1407ec681f3Smrg- mesa: Avoid read of uninitialized variable 1417ec681f3Smrg 1427ec681f3SmrgSamuel Iglesias Gonsálvez (5): 1437ec681f3Smrg 1447ec681f3Smrg- i965/fs: mark last DF uniform array element as 64 bit live one 1457ec681f3Smrg- i965/fs: detect different bit size accesses to uniforms to push them 1467ec681f3Smrg in proper locations 1477ec681f3Smrg- i965/fs: fix indirect load DF uniforms on BSW/BXT 1487ec681f3Smrg- i965/fs: fix source type when emitting MOV_INDIRECT to read ICP 1497ec681f3Smrg handles 1507ec681f3Smrg- i965/fs: emit MOV_INDIRECT with the source with the right register 1517ec681f3Smrg type 1527ec681f3Smrg 1537ec681f3SmrgSamuel Pitoiset (1): 1547ec681f3Smrg 1557ec681f3Smrg- radeonsi: disable sinking common instructions down to the end block 156