17ec681f3SmrgMesa 20.1.0 Release Notes / 2020-05-27
27ec681f3Smrg======================================
37ec681f3Smrg
47ec681f3SmrgMesa 20.1.0 is a new development release. People who are concerned with
57ec681f3Smrgstability and reliability should stick with a previous release or wait
67ec681f3Smrgfor Mesa 20.1.1.
77ec681f3Smrg
87ec681f3SmrgMesa 20.1.0 implements the OpenGL 4.6 API, but the version reported by
97ec681f3SmrgglGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
107ec681f3SmrgglGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being
117ec681f3Smrgused. Some drivers don't support all the features required in OpenGL
127ec681f3Smrg4.6. OpenGL 4.6 is **only** available if requested at context creation.
137ec681f3SmrgCompatibility contexts may report a lower version depending on each
147ec681f3Smrgdriver.
157ec681f3Smrg
167ec681f3SmrgMesa 20.1.0 implements the Vulkan 1.2 API, but the version reported by
177ec681f3Smrgthe apiVersion property of the VkPhysicalDeviceProperties struct depends
187ec681f3Smrgon the particular driver being used.
197ec681f3Smrg
207ec681f3SmrgSHA256 checksum
217ec681f3Smrg---------------
227ec681f3Smrg
237ec681f3Smrg::
247ec681f3Smrg
257ec681f3Smrg   2109055d7660514fc4c1bcd861bcba9db00c026119ae222720111732dba27c83  mesa-20.1.0.tar.xz
267ec681f3Smrg
277ec681f3SmrgNew features
287ec681f3Smrg------------
297ec681f3Smrg
307ec681f3Smrg-  GL_ARB_compute_variable_group_size on i965.
317ec681f3Smrg-  GL_EXT_depth_bounds_test on Iris.
327ec681f3Smrg-  GL_EXT_texture_shadow_lod on radeonsi, nvc0.
337ec681f3Smrg-  GL_NV_alpha_to_coverage_dither_control on radeonsi
347ec681f3Smrg-  GL_NV_copy_image on all gallium drivers.
357ec681f3Smrg-  GL_NV_pixel_buffer_object on all gallium drivers, i915, i965, swrast.
367ec681f3Smrg-  GL_NV_viewport_array2 on nvc0 (GM200+).
377ec681f3Smrg-  GL_NV_viewport_swizzle on nvc0 (GM200+).
387ec681f3Smrg-  VK_AMD_memory_overallocation_behavior on RADV.
397ec681f3Smrg-  VK_KHR_shader_non_semantic_info on Intel, RADV.
407ec681f3Smrg-  GL_EXT_draw_instanced on gles2
417ec681f3Smrg-  VK_KHR_8bit_storage for ACO on GFX8+
427ec681f3Smrg-  VK_KHR_16bit_storage for ACO on GFX8+ (storageInputOutput16 is still
437ec681f3Smrg   unsupported)
447ec681f3Smrg-  shaderInt16 for ACO on GFX9+
457ec681f3Smrg-  VK_KHR_shader_float16_int8 for ACO on GFX8+ (shaderFloat16 is still
467ec681f3Smrg   unsupported)
477ec681f3Smrg-  VK_EXT_robustness2 on Intel, RADV.
487ec681f3Smrg-  Add Rocket Lake (RKL) support on anvil and iris.
497ec681f3Smrg
507ec681f3SmrgBug fixes
517ec681f3Smrg---------
527ec681f3Smrg
537ec681f3Smrg-  Reproduceable i915 gpu hang Intel Iris Plus Graphics (Ice Lake 8x8
547ec681f3Smrg   GT2)
557ec681f3Smrg-  glsl: regression affecting shader compilation time
567ec681f3Smrg-  freedreno: glamor issue with x11 desktops
577ec681f3Smrg-  [gles3] supertuxkart: some textures are incorrect
587ec681f3Smrg-  Double lock in fbobject.c
597ec681f3Smrg-  [bisected] Steam crashes when newest Iris built with LTO
607ec681f3Smrg-  i965/vec4: opt_cse_local cause the out of bound array access
617ec681f3Smrg-  NIR: Regression on shader using 8/16-bit integers
627ec681f3Smrg-  lp_bld_intr.c:70:16: error: use of undeclared identifier
637ec681f3Smrg   'LLVMFixedVectorTypeKind'; did you mean 'LLVMVectorTypeKind'?
647ec681f3Smrg-  Deadlock in anv_timelines_wait()
657ec681f3Smrg-  post_version.py does not work with release candidates
667ec681f3Smrg-  post_version.py does not work with release candidates
677ec681f3Smrg-  radv regression on android
687ec681f3Smrg-  src\util\meson.build:294:4: ERROR: Program or command 'winepath' not
697ec681f3Smrg   found or not executable
707ec681f3Smrg-  debug builds are massively broken on Windows
717ec681f3Smrg-  heavy glitches on amd ryzen 5 since version 20.x
727ec681f3Smrg-  zink asserts with 32-bit boolean
737ec681f3Smrg-  Dirt: Showdown bad performance and broken rendering with enabled
747ec681f3Smrg   advanced lightning
757ec681f3Smrg-  gravit & Firefox WebGL broken since
767ec681f3Smrg   3dc2ccc14c0e035368fea6ae3cce8c481f3c4ad2 "ac/surface: replace
777ec681f3Smrg   RADEON_SURF_OPTIMIZE_FOR_SPACE with !FORCE_SWIZZLE_MODE"
787ec681f3Smrg-  mesa 20.0.5 causing kitty to crash
797ec681f3Smrg-  radeonsi: "Torchlight II" trace showing regression on mesa-20.0.6
807ec681f3Smrg   [bisected]
817ec681f3Smrg-  [RADV/LLVM/ACO/Regression] After mesa commit
827ec681f3Smrg   a3dc7fffbb7be0f1b2ac478b16d3acc5662dff66 all games stucks at start
837ec681f3Smrg-  Android building error after commit 2ab45f41
847ec681f3Smrg-  iris: Crash when trying to capture window in OBS Studio
857ec681f3Smrg-  Properly annotate control flow convergence points
867ec681f3Smrg-  intel/compiler: Register coalesce doesn't move conditional modifiers
877ec681f3Smrg-  [bisected] [iris] mpv under wayland: failed to import supplied
887ec681f3Smrg   dmabufs: Unsupported buffer format 808669784
897ec681f3Smrg-  [Bisected][Iris] piglit.spec.!opengl 1_1.max-texture-size crashes on
907ec681f3Smrg   x32 platform
917ec681f3Smrg-  anv : android deqp assert
927ec681f3Smrg   dEQP-VK.api.external.memory.android_hardware_buffer.dedicated.image#export_import_bind_bind
937ec681f3Smrg-  GL cts gtf30.GL3Tests.sgis_texture_lod.sgis_texture_lod_basic_getter
947ec681f3Smrg   failure
957ec681f3Smrg-  freedreno/a6xx: texture cache vs realloc_bo()
967ec681f3Smrg-  [Bisected]
977ec681f3Smrg   dEQP-VK.subgroups.ballot_mask.ext_shader_subgroup_ballot.\* failures
987ec681f3Smrg-  dEQP-VK.subgroups.size_control.compute.\* crashes on HSW and TGL
997ec681f3Smrg-  zink: framebuffer and pipeline caches accumulate due to
1007ec681f3Smrg   zink_create_surface()
1017ec681f3Smrg-  FTBFS due to LLVM commit 2dea3f129878 (LLVMVectorTypeKind is gone)
1027ec681f3Smrg-  [r600/Turks] 20.0.2: modesetting/radeon driver SIGABRT at loading X
1037ec681f3Smrg   (kernel 5.5.10, ppc64)
1047ec681f3Smrg-  piglit spec.!opengl 1.0.gl-1.0-fpexceptions crash on Iris
1057ec681f3Smrg-  ci: Update the Wine version
1067ec681f3Smrg-  SPIR-V: Failure in dEQP-VK.graphicsfuzz.control-flow-switch
1077ec681f3Smrg-  SPIR-V: OpConvertUToPtr from spec constant fails to compile
1087ec681f3Smrg-  ACO: Regression: Texture corruption
1097ec681f3Smrg-  radv: Reading ViewportIndex in fragment shader returns garbage
1107ec681f3Smrg-  piglit
1117ec681f3Smrg   spec.arb_gpu_shader_fp64.execution.arb_gpu_shader_fp64-vs-non-uniform-control-flow-ssbo
1127ec681f3Smrg   crash on Iris
1137ec681f3Smrg-  piglit
1147ec681f3Smrg   spec/arb_gpu_shader_fp64/execution/built-in-functions/vs-sign-neg-abs.shader_test
1157ec681f3Smrg   failure on IVB
1167ec681f3Smrg-  [ANV] gfxbench Aztec Ruins misrenders on gen11+
1177ec681f3Smrg-  glxinfo cmd crashed
1187ec681f3Smrg-  radeonsi: GL_LINES rendering is affected by GL_POINT_SPRITE
1197ec681f3Smrg-  nir: nir_lower_returns can't handle nested loops
1207ec681f3Smrg-  Graphic artifacts with Mesa 20.0.4 on intel HD 510 GPU
1217ec681f3Smrg-  [Iris] [Bisected] Some KHR-GL46.arrays_of_arrays_gl. tests are
1227ec681f3Smrg   failing
1237ec681f3Smrg-  Mesa 20 regression makes Lightsprint demos crash
1247ec681f3Smrg-  metro redux games crash upon loading certain levels on amdgpu
1257ec681f3Smrg-  dri_common.h:58:8: error: unknown type name '__GLXDRIdrawable'
1267ec681f3Smrg-  Graphical glitches on Intel Graphics when Xorg started on Iris driver
1277ec681f3Smrg-  GL/GLES test crashes on G33/i915 platforms
1287ec681f3Smrg-  GL/GLES test crashes on G33/i915 platforms
1297ec681f3Smrg-  GL/GLES test crashes on G33/i915 platforms
1307ec681f3Smrg-  SIGSEGV src/compiler/glsl/ast_function.cpp:53
1317ec681f3Smrg-  manywin aborts with "i965: Failed to submit batchbuffer: Invalid
1327ec681f3Smrg   argument"
1337ec681f3Smrg-  manywin aborts with "i965: Failed to submit batchbuffer: Invalid
1347ec681f3Smrg   argument"
1357ec681f3Smrg-  manywin aborts with "i965: Failed to submit batchbuffer: Invalid
1367ec681f3Smrg   argument"
1377ec681f3Smrg-  manywin aborts with "i965: Failed to submit batchbuffer: Invalid
1387ec681f3Smrg   argument"
1397ec681f3Smrg-  v3d: transform feedback issue
1407ec681f3Smrg-  radv: Enable TC-compat HTILE in VK_IMAGE_LAYOUT_GENERAL.
1417ec681f3Smrg-  radv:
1427ec681f3Smrg   dEQP-VK.binding_model.descriptorset_random.sets4.noarray.ubolimitlow.sbolimitlow.imglimitlow.noiub.comp.noia.0
1437ec681f3Smrg   segfault
1447ec681f3Smrg-  radv: RAVEN fails
1457ec681f3Smrg   dEQP-VK.pipeline.timestamp.misc_tests.reset_query_before_copy
1467ec681f3Smrg-  buffer overflow in nouveau driver on mesa 20.0.2
1477ec681f3Smrg-  xmlconfig sha1 code has overflow and possible bug
1487ec681f3Smrg-  enable storageBuffer16BitAccess feature in radv for SI and CIK
1497ec681f3Smrg-  Build Fails with Clang Shared Library
1507ec681f3Smrg-  Thousands of 32 bit regressions in VulkanCTS and GL test suites due
1517ec681f3Smrg   to handling of cross-invocation
1527ec681f3Smrg-  anv: isl assert when running dEQP-VK.geometry.layered.3d.*.readback
1537ec681f3Smrg-  Weston drm-backend.so seems to fail with Mesa master and
1547ec681f3Smrg   LIBGL_ALWAYS_SOFTWARE=1
1557ec681f3Smrg-  freedreno/turnip: Don't request pixlodenable when we don't use it
1567ec681f3Smrg-  VulkanCTS uniform_buffer_block_geom spins forever
1577ec681f3Smrg-  freedreno: dEQP-GLES3.functional.fbo.msaa.4_samples.r16f flakiness in
1587ec681f3Smrg   CI
1597ec681f3Smrg-  src\util\meson.build:291:4: ERROR: Program or command 'winepath' not
1607ec681f3Smrg   found or not executable
1617ec681f3Smrg-  RADV: flickering textures in Q.U.B.E. 2 through Proton
1627ec681f3Smrg-  Missing ENDBR in entry_x86-64_tls.h, entry_x86_tls.h and
1637ec681f3Smrg   entry_x86_tsd.h
1647ec681f3Smrg-  [regression][bisected] Android build test fails:
1657ec681f3Smrg   marshal_generated.c', missing and no known rule to make it
1667ec681f3Smrg-  Missing ENDBR in rtasm_x86sse.c
1677ec681f3Smrg-  src/intel/tools/aubinator_viewer.cpp:383:52: error: format ‘%lx’
1687ec681f3Smrg   expects argument of type ‘long unsigned int’, but argument 5 has type
1697ec681f3Smrg   ‘uint64_t {aka long long unsigned int}’ [-Werror=format=]
1707ec681f3Smrg-  src/compiler/glsl/ast_to_hir.cpp:2134: ir_rvalue\*
1717ec681f3Smrg   ast_expression::do_hir(exec_list*, \_mesa_glsl_parse_state*, bool):
1727ec681f3Smrg   Assertion \`result != NULL \|\| !needs_rvalue' failed.
1737ec681f3Smrg-  process_test fails on macOS
1747ec681f3Smrg-  Vulkan Overlay is blinking
1757ec681f3Smrg-  Regression: 9d64ad2fe79 broke Rocket League
1767ec681f3Smrg-  GameMaker games (Memoranda and Undertale) + amdgpu — Segmentation
1777ec681f3Smrg   fault on launch
1787ec681f3Smrg-  Civilization VI - Animated leader characters small black squares
1797ec681f3Smrg   artifacts
1807ec681f3Smrg-  [ACO] Reliable crash with RPCS3 that is not present with LLVM
1817ec681f3Smrg-  [RADV] vkCmdBindTransformFeedbackBuffersEXT pSizes optional parameter
1827ec681f3Smrg   not handled
1837ec681f3Smrg-  [RadeonSI] - Curse of the Dead Gods (1123770) - Lighting is not
1847ec681f3Smrg   rendering correctly.
1857ec681f3Smrg-  soft-fp64: \__fsat64 incorrectly returns NaN for a NaN input. It
1867ec681f3Smrg   should return zero.
1877ec681f3Smrg-  Hang when using glWaitSync with multithreaded shared GL contexts
1887ec681f3Smrg-  RPCS3 / Persona 5 - Performance regression [RADV / Navi]
1897ec681f3Smrg-  [ANV] Rendering corruption in Shadow of the Tomb Raider
1907ec681f3Smrg-  src/compiler/glsl/glcpp/glcpp-parse.y:1297: \_token_print: Assertion
1917ec681f3Smrg   \`!"Error: Don't know how to print token."' failed.
1927ec681f3Smrg-  [CTS] dEQP-VK.descriptor_indexing.\* fails on RADV/LLVM
1937ec681f3Smrg-  Unigine Valley failure / assert
1947ec681f3Smrg-  [Gen9/icl] [Bisected] [Regression]
1957ec681f3Smrg   dEQP-GLES3.functional.shaders.loops.short_circuit.do_while_fragment
1967ec681f3Smrg   fail
1977ec681f3Smrg-  [RadeonSI][gfx10/navi] Kerbal Space Program crash: si_draw_vbo:
1987ec681f3Smrg   Assertion \`0' failed
1997ec681f3Smrg-  Budget Cuts hits VK_AMD_shader_fragment_mask assert
2007ec681f3Smrg-  Follow-up from "i965/blorp: Don't resolve HiZ unless we're
2017ec681f3Smrg   reinterpreting"
2027ec681f3Smrg-  crash in vc4_write_uniforms with shaders involving YUV textures
2037ec681f3Smrg-  Corrupted output with vaapi 10 bit -> 8 bit transcoding on AMD RAVEN
2047ec681f3Smrg-  tessellator.cpp:78:7: error: 'fmin' is missing exception
2057ec681f3Smrg   specification 'noexcept'
2067ec681f3Smrg-  Please add Raspberry Pi 4 to features.txt
2077ec681f3Smrg-  Build failure with bison 2.3.
2087ec681f3Smrg-  Mesa build fails on 32 bit architecture
2097ec681f3Smrg-  Mesa build fails on 32 bit architecture
2107ec681f3Smrg-  Incorrect rendering with vaapi + uyvy422
2117ec681f3Smrg-  V3D/Broadcom (Raspberry Pi 4) - GLES 3.1 - GL_EXT_texture_norm16
2127ec681f3Smrg   advertised, but not usable
2137ec681f3Smrg-  mesa-20.0.0/src/amd/compiler/aco_instruction_selection.cpp:7221:55:
2147ec681f3Smrg   style: Same expression on both sides of '&&
2157ec681f3Smrg-  i965 assertion failure in fallback_rgbx_to_rgba
2167ec681f3Smrg-  vaapi bob deinterlacer produces wrong output height on AMD
2177ec681f3Smrg-  Compute copies do not handle SUBSAMPLED formats
2187ec681f3Smrg-  Please document RADV_TEX_ANISO variable in envvars.html
2197ec681f3Smrg-  unexpected CI failure
2207ec681f3Smrg-  Multiple glapi_mapi_tmp.h
2217ec681f3Smrg-  drisw crashes on calling NULL putImage on EGL surfaceless platform
2227ec681f3Smrg   (pbuffer EGLSurface)
2237ec681f3Smrg-  VRAM leak with vuilkan external memory + opengl memory objects
2247ec681f3Smrg-  [radeonsi][vaapi][bisected] invalid VASurfaceID when playing
2257ec681f3Smrg   interlaced DVB stream in Kodi
2267ec681f3Smrg-  [RADV] GPU hangs while the cutscene plays in the game Assassin's
2277ec681f3Smrg   Creed Origins
2287ec681f3Smrg-  ACO: The Elder Scrolls Online crashes on startup (Navi)
2297ec681f3Smrg-  Broken rendering of glxgears on S/390 architecture (64bit, BigEndian)
2307ec681f3Smrg-  aco: sun flickering with Assassins Creeds Origins
2317ec681f3Smrg-  !1896 broke ext_image_dma_buf_import piglit tests with radeonsi
2327ec681f3Smrg-  aco: wrong geometry with Assassins Creed Origins on GFX6
2337ec681f3Smrg-  valgrind errors since commit a8ec4082a41
2347ec681f3Smrg-  src/broadcom/qpu/qpu_pack.c:962:25: error: implicit declaration of
2357ec681f3Smrg   function 'ffs' is invalid in C99
2367ec681f3Smrg   [-Werror,-Wimplicit-function-declaration] mux_b =
2377ec681f3Smrg   ffs(desc->mux_b_mask) - 1;
2387ec681f3Smrg-  X fails to start with amdgpu and Mesa 20.1 on Fedora
2397ec681f3Smrg-  GPU hangs in Factorio on Radeon RX 5700 XT (MSI GAMING X)
2407ec681f3Smrg-  OSMesa osmesa_choose_format returns a format not supported by
2417ec681f3Smrg   st_new_renderbuffer_fb
2427ec681f3Smrg-  Build error with VS on WIN
2437ec681f3Smrg-  Using EGL_KHR_surfaceless_context causes spurious "libEGL warning:
2447ec681f3Smrg   FIXME: egl/x11 doesn't support front buffer rendering."
2457ec681f3Smrg-  !3460 broke texsubimage test with piglit on zink+anv
2467ec681f3Smrg-  VERSION needs to be bumped for trunk master
2477ec681f3Smrg-  The screen is black when using ACO
2487ec681f3Smrg
2497ec681f3SmrgChanges
2507ec681f3Smrg-------
2517ec681f3Smrg
2527ec681f3SmrgAbhishek Kumar (1):
2537ec681f3Smrg
2547ec681f3Smrg-  anv/android: fix assert in anv_import_ahw_memory
2557ec681f3Smrg
2567ec681f3SmrgAdam Jackson (1):
2577ec681f3Smrg
2587ec681f3Smrg-  gallium: enable EGL_EXT_image_dma_buf_import_modifiers
2597ec681f3Smrg   unconditionally
2607ec681f3Smrg
2617ec681f3SmrgAlbert Astals Cid (5):
2627ec681f3Smrg
2637ec681f3Smrg-  cube_face_coord: Use fabsf instead of fabs since we know it's floats
2647ec681f3Smrg-  cube_face_index: Use fabsf instead of fabs since we know it's floats
2657ec681f3Smrg-  aco: Minor optimization in spill_ctx constructor
2667ec681f3Smrg-  aco: pass vars by const &
2677ec681f3Smrg-  Fix promotion of floats to doubles
2687ec681f3Smrg
2697ec681f3SmrgAlejandro Piñeiro (7):
2707ec681f3Smrg
2717ec681f3Smrg-  docs/features: add v3d driver
2727ec681f3Smrg-  nir/linker: remove reference to just SPIR-V linking
2737ec681f3Smrg-  v3d/tex: don't configure tmu config 1 if not needed
2747ec681f3Smrg-  v3d/tex: Configuration Parameter 1 can be only skipped if P2 can be
2757ec681f3Smrg   skipped too
2767ec681f3Smrg-  v3d/packet: fixing TMU_Config_Parameter_2 definition
2777ec681f3Smrg-  nir: add nir_tex_instr_need_sampler helper
2787ec681f3Smrg-  v3d: support for textureQueryLOD
2797ec681f3Smrg
2807ec681f3SmrgAlexandros Frantzis (3):
2817ec681f3Smrg
2827ec681f3Smrg-  gitlab-ci: Automated testing with OpenGL traces
2837ec681f3Smrg-  gitlab-ci: Fix traces caching in tracie
2847ec681f3Smrg-  gitlab-ci: Check the Mesa version used for tracie tests
2857ec681f3Smrg
2867ec681f3SmrgAlyssa Rosenzweig (505):
2877ec681f3Smrg
2887ec681f3Smrg-  pan/midgard: Break out one-src read_components
2897ec681f3Smrg-  pan/midgard: Implement mixed-type constant packing
2907ec681f3Smrg-  panfrost: Avoid overlapping copy
2917ec681f3Smrg-  pan/midgard: Check for null consts
2927ec681f3Smrg-  pan/midgard: Remove unused variable
2937ec681f3Smrg-  panfrost: Use size0 when calculating the offset to a depth level
2947ec681f3Smrg-  pan/midgard: Fix scheduling issue with csel + render target reference
2957ec681f3Smrg-  panfrost: Simplify swizzle translation
2967ec681f3Smrg-  panfrost: Update comment about magic number relating to barriers
2977ec681f3Smrg-  panfrost: Ensure compute shader_meta is zeroed
2987ec681f3Smrg-  panfrost: Identify mali_shared_memory structure
2997ec681f3Smrg-  panfrost: Unify bifrost_scratchpad with mali_shared_memory
3007ec681f3Smrg-  panfrost: Rename bifrost_framebuffer->mali_framebuffer
3017ec681f3Smrg-  panfrost: Rename unknown2_8 to padding
3027ec681f3Smrg-  panfrost: Allocate RAM backing of shared memory
3037ec681f3Smrg-  pan/midgard: Track pressure when scheduling ld/st
3047ec681f3Smrg-  pan/midgard: Fix missing prefixes
3057ec681f3Smrg-  pan/midgard: Fix swizzles harder
3067ec681f3Smrg-  pan/midgard: Implement barriers
3077ec681f3Smrg-  pan/midgard: Allow jumping out of a shader
3087ec681f3Smrg-  pan/midgard: Fix 32/64 mixed swizzle packing
3097ec681f3Smrg-  pan/midgard: Use dummy tag for empty shaders
3107ec681f3Smrg-  pan/midgard: Improve barrier disassembly
3117ec681f3Smrg-  pan/midgard: Overhaul tag handling
3127ec681f3Smrg-  pan/midgard: Imply next tags
3137ec681f3Smrg-  pan/midgard: Infer tags entirely
3147ec681f3Smrg-  pan/midgard: Set xyzx swizzle for load_compute_arg
3157ec681f3Smrg-  pan/midgard: Identify stack barrier flag
3167ec681f3Smrg-  pan/midgard: Don't crash with constants on unknown ops
3177ec681f3Smrg-  pan/midgard: Use fprintf instead of printf for constants
3187ec681f3Smrg-  pan/decode: Remove extraneous newline
3197ec681f3Smrg-  pan/decode: Add \`minimal\` mode
3207ec681f3Smrg-  pan/decode: Cleanup pandecode_jc
3217ec681f3Smrg-  panfrost: Implement PAN_DBG_SYNC with pandecode/minimal
3227ec681f3Smrg-  panfrost: Print synced traces to stderr
3237ec681f3Smrg-  panfrost: Rewrite scoreboarding routines
3247ec681f3Smrg-  panfrost: Update scoreboarding notes
3257ec681f3Smrg-  panfrost: Cleanup transfer_map
3267ec681f3Smrg-  panfrost: Avoid reading GPU memory when packing vertices
3277ec681f3Smrg-  panfrost: Debitfieldize mali_uniform_buffer_meta
3287ec681f3Smrg-  panfrost: Remove enum panfrost_memory_layout
3297ec681f3Smrg-  panfrost: Remove dirty tracking
3307ec681f3Smrg-  panfrost: Remove old comment
3317ec681f3Smrg-  panfrost: Remove old hack
3327ec681f3Smrg-  panfrost: Remove flush_frontbuffer
3337ec681f3Smrg-  pan/midgard: Identify clamp(x, -1.0, 1.0) flag
3347ec681f3Smrg-  panfrost: Move checksum routines to root panfrost
3357ec681f3Smrg-  panfrost: Move pan_afbc.c to root
3367ec681f3Smrg-  panfrost: Move format translation to root
3377ec681f3Smrg-  panfrost: Rewrite texture descriptor creation logic
3387ec681f3Smrg-  nir: Add SSBO->global lowering pass
3397ec681f3Smrg-  pan/midgard: Lower SSBOs in NIR
3407ec681f3Smrg-  pan/midgard: Implement nir_intrinsic_get_buffer_size
3417ec681f3Smrg-  pan/midgard: Implement load/store_shared
3427ec681f3Smrg-  panfrost: Combine get_index_buffer with bound computation
3437ec681f3Smrg-  panfrost: Implement index buffer cache
3447ec681f3Smrg-  pan/decode: Dump scratchpad size if present
3457ec681f3Smrg-  pan/midgard: Don't spill near a branch
3467ec681f3Smrg-  panfrost: Fix gl_VertexID/InstanceID
3477ec681f3Smrg-  panfrost: Fix padded_vertex_count generation
3487ec681f3Smrg-  panfrost: Update spilling comment framebuffer->shared
3497ec681f3Smrg-  panfrost: Don't set shared->unk0
3507ec681f3Smrg-  panfrost: Fix param getting
3517ec681f3Smrg-  panfrost: Default to 256 threads for TLS
3527ec681f3Smrg-  panfrost: Reserve an extra page for spilling
3537ec681f3Smrg-  panfrost: Simplify stack shift calculation
3547ec681f3Smrg-  panfrost: Expose PIPE_CAP_PRIMITIVE_RESTART
3557ec681f3Smrg-  panfrost: Add PAN_MESA_DEBUG=gles3 option
3567ec681f3Smrg-  panfrost: Increase SSBO/image limit from 4->8
3577ec681f3Smrg-  pan/midgard: Allow inverted inverted ops
3587ec681f3Smrg-  pan/midgard: Allow fusing inverted sources for inverted ops
3597ec681f3Smrg-  pan/midgard: Partially fix 64-bit swizzle alignment
3607ec681f3Smrg-  pan/midgard: Extract nir_ssa_index helper
3617ec681f3Smrg-  pan/midgard: Add LDST_ADDRESS property
3627ec681f3Smrg-  pan/midgard: Fix load/store argument sizing
3637ec681f3Smrg-  pan/midgard: Round up bytemasks when promoting uniforms
3647ec681f3Smrg-  pan/midgard: Force address alignment
3657ec681f3Smrg-  pan/midgard: Add address analysis framework
3667ec681f3Smrg-  pan/midgard: Use address analysis for globals, etc
3677ec681f3Smrg-  pan/decode: Calm an assert to a pandecode error
3687ec681f3Smrg-  pan/decode: Restore bifrost sample_locations
3697ec681f3Smrg-  pan/decode: Fix tiler weights printing
3707ec681f3Smrg-  pan/decode: Skip analysis for Bifrost tiler structures
3717ec681f3Smrg-  pan/bi: Add discard ops
3727ec681f3Smrg-  pan/bi: Add ICMP.GL.NEQ op
3737ec681f3Smrg-  pan/bi: Move notes on FMA opcodes from disassembler
3747ec681f3Smrg-  pan/bi: Introduce CSEL4 class
3757ec681f3Smrg-  pan/bi: Move notes on ADD ops to notes file
3767ec681f3Smrg-  pan/bi: Decode FMA_SHIFT properly
3777ec681f3Smrg-  pan/bi: Add v4i8 mode to FMA_SHIFT
3787ec681f3Smrg-  pan/bi: Identify extended FMA opcodes
3797ec681f3Smrg-  pan/bi: Decode ADD_SHIFT properly
3807ec681f3Smrg-  pan/bi: Combine LOAD_VARYING_ADDRESS instructions by type
3817ec681f3Smrg-  pan/bi: Squash LD_ATTR ops together
3827ec681f3Smrg-  pan/bi: Structify FMA_FADD
3837ec681f3Smrg-  pan/bi: Move some definitions from disasm to bifrost.h
3847ec681f3Smrg-  panfrost: Add note about preloaded varyings
3857ec681f3Smrg-  pan/bi: Gut old compiler
3867ec681f3Smrg-  pan/bi: Stub out new compiler
3877ec681f3Smrg-  pan/bi: Add the control flow graph
3887ec681f3Smrg-  pan/bi: Add src/dest fields to bifrost_instruction
3897ec681f3Smrg-  pan/bi: Add class properties
3907ec681f3Smrg-  pan/bi: Add modifiers to bi_instruction
3917ec681f3Smrg-  pan/bi: Add BI_GENERIC property
3927ec681f3Smrg-  pan/bi: Factor out enum bifrost_minmax_mode
3937ec681f3Smrg-  pan/bi: Add a bifrost_roundmode field
3947ec681f3Smrg-  pan/bi: Add bifrost_minmax_mode field
3957ec681f3Smrg-  pan/bi: Add bi_load structure
3967ec681f3Smrg-  pan/bi: Pull out bifrost_load_var
3977ec681f3Smrg-  pan/bi: Add bi_load_vary structure
3987ec681f3Smrg-  pan/bi: Add PAN_SCHED\_\* flags
3997ec681f3Smrg-  pan/bi: Add bi_clause, bi_bundle abstractions
4007ec681f3Smrg-  pan/bi: Add dest_type field to bifrost_instruction
4017ec681f3Smrg-  pan/bi: Add special indices
4027ec681f3Smrg-  pan/bi: Add constant field to bi_instruction
4037ec681f3Smrg-  pan/bi: Add class-specific ops
4047ec681f3Smrg-  pan/bi: Add clause header fields to bi_clause
4057ec681f3Smrg-  pan/bi: Clarify special op scheduling
4067ec681f3Smrg-  pan/bi: Add swizzles
4077ec681f3Smrg-  pan/bi: Add source type for conversions
4087ec681f3Smrg-  pan/bi: Add EXTRACT, MAKE_VEC synthetic ops
4097ec681f3Smrg-  pan/bi: Add constants to bi_clause
4107ec681f3Smrg-  pan/bi: Add pred/successors to build CFG
4117ec681f3Smrg-  pan/bi: Extract bifrost_branch structure
4127ec681f3Smrg-  pan/bi: Add bi_branch data
4137ec681f3Smrg-  pan/bi: Add CSEL condition
4147ec681f3Smrg-  pan/bi: Add high-latency property for classes
4157ec681f3Smrg-  pan/bi: Add quirks system
4167ec681f3Smrg-  pan/bi: Add IR iteration macros
4177ec681f3Smrg-  pan/bi: Move some print routines out of the disasm
4187ec681f3Smrg-  pan/bi: Add BIR manipulation routines to bir.c
4197ec681f3Smrg-  pan/bi: Move bi_interp_mode_name to bi_print
4207ec681f3Smrg-  pan/bi: Add bi_instruction printing
4217ec681f3Smrg-  pan/bi: Add bi_print_bundle for printing bi_bundle
4227ec681f3Smrg-  pan/bi: Add bi_print_clause
4237ec681f3Smrg-  pan/bi: Add bi_print_block
4247ec681f3Smrg-  pan/bi: Add bi_print_shader
4257ec681f3Smrg-  pan/bi: Lower and optimize NIR
4267ec681f3Smrg-  pan/bi: Walk through the NIR control flow graph
4277ec681f3Smrg-  pan/bi: Improve block printing
4287ec681f3Smrg-  pan/bi: Don't print types for unconditional branches
4297ec681f3Smrg-  pan/bi: Print branch target
4307ec681f3Smrg-  pan/bi: Add instruction emit/remove helpers
4317ec681f3Smrg-  pan/bi: Call nir_lower_io_to_temporaries in cmdline
4327ec681f3Smrg-  pan/bi: Add support for if-else blocks
4337ec681f3Smrg-  pan/bi: Handle loops when ingesting CFG
4347ec681f3Smrg-  pan/bi: Handle jumps (breaks, continues)
4357ec681f3Smrg-  pan/bi: Fix destination printing
4367ec681f3Smrg-  pan/bi: Implement nir_intrsinic_load_interpolated_input
4377ec681f3Smrg-  pan/bi: Add blend_location to IR for BI_BLEND
4387ec681f3Smrg-  pan/bi: Add bi_schedule_barrier helper
4397ec681f3Smrg-  pan/bi: Implement store_output for fragment shaders
4407ec681f3Smrg-  pan/bi: Implement load_input for vertex shaders
4417ec681f3Smrg-  pan/bi: Add helpers for creating temporaries
4427ec681f3Smrg-  pan/bi: Implement store_vary for vertex shaders
4437ec681f3Smrg-  pan/bi: Add preliminary LOAD_UNIFORM implementation
4447ec681f3Smrg-  pan/bi: Implement load_const
4457ec681f3Smrg-  pan/bi: Add dummy scheduler
4467ec681f3Smrg-  pan/bi: Rename next-wait to simply 'wait'
4477ec681f3Smrg-  pan/bi: Fix Android.mk
4487ec681f3Smrg-  panfrost: Move mir_to_bytemask to common code
4497ec681f3Smrg-  pan/bi: Generalize swizzles to avoid extracts
4507ec681f3Smrg-  pan/bi: Introduce writemasks
4517ec681f3Smrg-  pan/bi: Remove bi_load
4527ec681f3Smrg-  pan/bi: Lower vec\* to writemasks in NIR
4537ec681f3Smrg-  pan/bi: Add initial handling of ALU ops
4547ec681f3Smrg-  pan/bi: Allow inlining constants
4557ec681f3Smrg-  pan/bi: Implement fsat as mov.sat
4567ec681f3Smrg-  pan/bi: Add a bunch of ALU ops
4577ec681f3Smrg-  pan/bi: Add BI_SPECIAL\_\* enum
4587ec681f3Smrg-  pan/bi: Handle special ops in NIR->BIR
4597ec681f3Smrg-  pan/bi: Implement fabs, fneg as fmov with mods
4607ec681f3Smrg-  pan/bi: Disable lower_sub
4617ec681f3Smrg-  pan/bi: Add isub op
4627ec681f3Smrg-  pan/bi: Import algebraic pass from midgard
4637ec681f3Smrg-  pan/bi: Implement nir_op_bcsel
4647ec681f3Smrg-  pan/bi: Lower b2f to bcsel
4657ec681f3Smrg-  pan/bi: Specify comparison op for BI_CMP
4667ec681f3Smrg-  pan/bi: Print source types unconditionally
4677ec681f3Smrg-  pan/bi: Implement comparison opcodes via BI_CMP
4687ec681f3Smrg-  panfrost: Promote midgard_program to panfrost/util
4697ec681f3Smrg-  pan/midgard: Remove unused iterators
4707ec681f3Smrg-  pan/midgard: Adjust sysval-related prototypes
4717ec681f3Smrg-  pan/midgard: Remove indexing dependency of sysvals
4727ec681f3Smrg-  pan/midgard: Decontextualize midgard_nir_assign_sysval_body
4737ec681f3Smrg-  pan/midgard: Remove dest_override sysval argument
4747ec681f3Smrg-  panfrost: Move Midgard sysval code to common Panfrost
4757ec681f3Smrg-  pan/bi: Switch to panfrost_program
4767ec681f3Smrg-  pan/bi: Implement sysvals
4777ec681f3Smrg-  pan/midgard: Localize \`visited\` tracking
4787ec681f3Smrg-  pan/midgard: Decontextualize liveness analysis core
4797ec681f3Smrg-  pan/midgard: Sync midgard_block field names with Bifrost
4807ec681f3Smrg-  pan/midgard: Subclass midgard_block from pan_block
4817ec681f3Smrg-  panfrost: Move liveness analysis to root panfrost/
4827ec681f3Smrg-  panfrost: Sync Midgard/Bifrost control flow
4837ec681f3Smrg-  pan/bi: Paste over bi_has_arg
4847ec681f3Smrg-  pan/bi: Add bi_bytemask_of_read_components helpers
4857ec681f3Smrg-  pan/bi: Add bi_next/prev_op helpers
4867ec681f3Smrg-  pan/bi: Add bi_max_temp helper
4877ec681f3Smrg-  pan/bi: Add liveness analysis pass
4887ec681f3Smrg-  pan/bi: Add dead code elimination pass
4897ec681f3Smrg-  pan/bi: Implement nir_op_ffma
4907ec681f3Smrg-  pan/bi: Fix swizzle for second argument to ST_VARY
4917ec681f3Smrg-  panfrost: Move lcra to panfrost/util
4927ec681f3Smrg-  pan/midgard: Remove incorrect comment in RA
4937ec681f3Smrg-  pan/bi: Minor fixes in iteration macros
4947ec681f3Smrg-  pan/bi: Fix vector handling of readmasks
4957ec681f3Smrg-  pan/bi: Fix missing src_types
4967ec681f3Smrg-  pan/bi: Add register allocator
4977ec681f3Smrg-  pan/bi: Interpret register allocation results
4987ec681f3Smrg-  pan/bi: Setup initial clause packing
4997ec681f3Smrg-  pan/bi: Sketch out instruction word packing
5007ec681f3Smrg-  pan/bi: Add packing for register control field
5017ec681f3Smrg-  pan/bi: Pack register fields
5027ec681f3Smrg-  pan/bi: Add missing \__attribute__((packed))
5037ec681f3Smrg-  pan/bi: Assign registers to ports
5047ec681f3Smrg-  pan/bi: Route through first_instruction field
5057ec681f3Smrg-  pan/bi: Model 3-bit Bifrost srcs in IR
5067ec681f3Smrg-  pan/bi: Add struct bifrost_fma_fma
5077ec681f3Smrg-  pan/bi: Pack BI_FMA ops
5087ec681f3Smrg-  pan/bi: Pack fadd32
5097ec681f3Smrg-  pan/bi: List ADD classes in bi_pack_add
5107ec681f3Smrg-  pan/bi: Generalize bi_get_src a bit
5117ec681f3Smrg-  pan/bi: Pass second src for load_vary ops
5127ec681f3Smrg-  pan/bi: Emit load_vary ops
5137ec681f3Smrg-  pan/bi: Skip over data registers in port assignment
5147ec681f3Smrg-  pan/bi: Route through clause header
5157ec681f3Smrg-  pan/bi: Pretty-print clause types in disassembler
5167ec681f3Smrg-  pan/bi: Don't hide SCHED_ADD inside HI_LATENCY
5177ec681f3Smrg-  pan/bi: Track clause types during scheduling
5187ec681f3Smrg-  pan/bi: Flesh out ATEST in IR
5197ec681f3Smrg-  pan/bi: Add ATEST packing
5207ec681f3Smrg-  pan/bi: Flesh out BI_BLEND
5217ec681f3Smrg-  pan/bi: Pack BI_BLEND
5227ec681f3Smrg-  pan/bi: Implement FMA/MOV without modifiers
5237ec681f3Smrg-  pan/bi: Add bi_emit_before helper
5247ec681f3Smrg-  pan/bi: Add move lowering pass
5257ec681f3Smrg-  pan/bi: Pack a constant quadword
5267ec681f3Smrg-  pan/bi: Document constant related errata(?)
5277ec681f3Smrg-  pan/bi: Index out constants in instructions
5287ec681f3Smrg-  pan/bi: Include UBO index for sysval reads
5297ec681f3Smrg-  pan/bi: Add bi_load32_components helper
5307ec681f3Smrg-  pan/bi: Pack ld_ubo ops
5317ec681f3Smrg-  pan/bi: Pack ld_var_addr
5327ec681f3Smrg-  pan/bi: Flesh out st_vary IR
5337ec681f3Smrg-  pan/bi: Generalize data register setting
5347ec681f3Smrg-  pan/bi: Add store_channels property
5357ec681f3Smrg-  pan/bi: Pack st_vary
5367ec681f3Smrg-  pan/bi: Pack LD_ATTR
5377ec681f3Smrg-  pan/bi: Lower bool to ints
5387ec681f3Smrg-  pan/bi: Remove hacks for 1-bit booleans in IR
5397ec681f3Smrg-  pan/bi: Add \`soft\` NIR->BIR condition translation
5407ec681f3Smrg-  pan/bi: Implement csel fusing
5417ec681f3Smrg-  pan/bi: Respect shift when printing immediates
5427ec681f3Smrg-  pan/bi: Use bi_lookup_immediate when packing
5437ec681f3Smrg-  pan/bi: Default csel to "!= 0" mode
5447ec681f3Smrg-  pan/bi: Pack csel4 opcodes
5457ec681f3Smrg-  pan/bi: Ingest vecN directly (again)
5467ec681f3Smrg-  pan/bi: Lower combines to rewrites for scalars
5477ec681f3Smrg-  pan/bi: Rewrite aligned vectors as well
5487ec681f3Smrg-  panfrost: Split panfrost_device from panfrost_screen
5497ec681f3Smrg-  panfrost: Isolate panfrost_bo_access_for_stage to pan_cmdstream.c
5507ec681f3Smrg-  panfrost: Inline reference counting routines
5517ec681f3Smrg-  panfrost: Move pan_bo to root panfrost
5527ec681f3Smrg-  pan/bit: Link standalone compiler with en/decoder
5537ec681f3Smrg-  panfrost: Move device open/close to root panfrost
5547ec681f3Smrg-  pan/bit: Open up the device
5557ec681f3Smrg-  panfrost: Stub out G31/G52 quirks
5567ec681f3Smrg-  pan/bit: Submit a WRITE_VALUE job as a sanity check
5577ec681f3Smrg-  pan/bit: Begin generating a vertex job
5587ec681f3Smrg-  pan/bi: Fix overzealous write barriers
5597ec681f3Smrg-  pan/bi: Fix off-by-one in scoreboarding packing
5607ec681f3Smrg-  pan/bi: Enable precision lowering in standalone compiler
5617ec681f3Smrg-  panfrost: Enable PIPE_SHADER_CAP_FP16 on Bifrost
5627ec681f3Smrg-  pan/bi: Handle f2f\* opcodes
5637ec681f3Smrg-  pan/bi: Ignore swizzle in unwritten component
5647ec681f3Smrg-  pan/bi: Finish FMA structures
5657ec681f3Smrg-  pan/bi: Fix missing type for fmul
5667ec681f3Smrg-  pan/bi: Add FMA16 packing
5677ec681f3Smrg-  pan/bi: Pack outmod and roundmode with FMA
5687ec681f3Smrg-  pan/bi: Expand out FMA conversion opcodes
5697ec681f3Smrg-  pan/bi: Enumerate conversions
5707ec681f3Smrg-  pan/bi: Handle standard FMA conversions
5717ec681f3Smrg-  pan/bi: Add bifrost_fma_2src generic
5727ec681f3Smrg-  pan/bi: Add one-source f32->f16 op
5737ec681f3Smrg-  pan/bi: Assert out i16 related converts for now
5747ec681f3Smrg-  pan/bi: Handle round opcodes in frontend
5757ec681f3Smrg-  pan/bi: Add v2f16 versions of rounding ops
5767ec681f3Smrg-  pan/bi: Structify fadd/min/max16
5777ec681f3Smrg-  pan/bi: Handle core faddminmax16 packing
5787ec681f3Smrg-  pan/bi: Handle abs packing for fp16/FMA add/min
5797ec681f3Smrg-  pan/bi: Handle fp16/abs scheduling restriction
5807ec681f3Smrg-  pan/bi: Fix handling of constants with COMBINE
5817ec681f3Smrg-  pan/bit: Add \`run\` mode to the cmdline
5827ec681f3Smrg-  pan/bit: Wire through I/O
5837ec681f3Smrg-  pan/bi: Fix writes_component for VECTOR
5847ec681f3Smrg-  pan/bi: Use STAGE srcs for scheduler nops
5857ec681f3Smrg-  pan/bi: Don't set the back-to-back bit yet
5867ec681f3Smrg-  pan/bi: Add cmdline option for verbose disassembly
5877ec681f3Smrg-  pan/bi: Fix unused port swapping
5887ec681f3Smrg-  pan/bi: Handle fmov class ops
5897ec681f3Smrg-  pan/bi: Fix outmod/roundmode flip
5907ec681f3Smrg-  pan/bi: Export bi_class_name
5917ec681f3Smrg-  pan/bi: Fix duplicated source in ADD.v2f16
5927ec681f3Smrg-  pan/bi: Fix negation in ADD.v2f16
5937ec681f3Smrg-  pan/bi: Don't gobble zero ports
5947ec681f3Smrg-  pan/bi: Allow BI_FMA to take mods
5957ec681f3Smrg-  pan/bi: Handle BIFROST_FIRST_WRITE_FMA_P2_READ_P3
5967ec681f3Smrg-  pan/bi: Add helper to debug port assignment
5977ec681f3Smrg-  pan/bi: Match CSEL argument order with hw
5987ec681f3Smrg-  pan/bit: Stub out BIR interpreter
5997ec681f3Smrg-  pan/bit: Handle read/write
6007ec681f3Smrg-  pan/bit: Add preliminary FMA/ADD/MOV implementations
6017ec681f3Smrg-  pan/bit: Implement outmods
6027ec681f3Smrg-  pan/bit: Implement floating source mods
6037ec681f3Smrg-  pan/bit: Add packing test framework
6047ec681f3Smrg-  pan/bit: Add helper for generating floating mod tests
6057ec681f3Smrg-  pan/bit: Add verbose printing for tests
6067ec681f3Smrg-  pan/bit: Add 16-bit fmod tests
6077ec681f3Smrg-  pan/bit: Add FMA tests
6087ec681f3Smrg-  pan/bit: Add CSEL to interpreter
6097ec681f3Smrg-  pan/bit: Add csel tests
6107ec681f3Smrg-  pan/bit: Make run more useful
6117ec681f3Smrg-  pan/bit: Add mode to run unit tests
6127ec681f3Smrg-  pan/bi: Remove nontrivial SPECIAL ops
6137ec681f3Smrg-  pan/bi: Add 32-bit \_FAST packing
6147ec681f3Smrg-  pan/bi: Add fp16 support for frcp/frsq
6157ec681f3Smrg-  pan/bit: Add special op interpreting
6167ec681f3Smrg-  pan/bit: Add special unit test
6177ec681f3Smrg-  pan/bi: Implement min/max on FMA
6187ec681f3Smrg-  pan/bi: Structify ADD unit add/min/max
6197ec681f3Smrg-  pan/bi: Add ADD add/min/max fp32 packing
6207ec681f3Smrg-  pan/bi: Set BI_MODS for MINMAX
6217ec681f3Smrg-  pan/bi: Fix incorrect abs flip in fma/fadd16
6227ec681f3Smrg-  pan/bi: Force ADD scheduling for MINMAX
6237ec681f3Smrg-  pan/bit: Unify test frontends
6247ec681f3Smrg-  pan/bit: Add min/max support to interpreter
6257ec681f3Smrg-  pan/bit: Enable more debug for \`run\`
6267ec681f3Smrg-  pan/bit: Add fmin/max16 tests
6277ec681f3Smrg-  pan/bit: Wire up add/add op+test
6287ec681f3Smrg-  panfrost: Add IS_BIFROST quirk
6297ec681f3Smrg-  panfrost: Populate bifrost-specific structs within mali_shader_meta
6307ec681f3Smrg-  panfrost: Staticize a few cmdstream functions
6317ec681f3Smrg-  panfrost: Unify vertex/tiler structures
6327ec681f3Smrg-  panfrost: Set mfbd.msaa.sample_locations on Bifrost
6337ec681f3Smrg-  panfrost: Call the Bifrost compiler on bi devices
6347ec681f3Smrg-  pan/bi: Fix nondeterministic register packing
6357ec681f3Smrg-  pan/midgard: Remove unused max_varying variable
6367ec681f3Smrg-  panfrost: Move varying linking to cmdstream
6377ec681f3Smrg-  panfrost: Move uniform_count to pan_assemble
6387ec681f3Smrg-  panfrost: Pass compiler-appropriate options
6397ec681f3Smrg-  pan/bi: Fix backwards registers ports
6407ec681f3Smrg-  panfrost: Fix BI_BLEND packing
6417ec681f3Smrg-  pan/bi: Let !b2b imply branch_cond
6427ec681f3Smrg-  pan/decode: Print Bifrost blend descriptor
6437ec681f3Smrg-  panfrost: Drop dependency on nonexistant write_value
6447ec681f3Smrg-  pan/bi: Lower fsqrt
6457ec681f3Smrg-  pan/midgard: Fix f2u naming confusion
6467ec681f3Smrg-  pan/bi: Set BI_ROUNDMODE for BI_CONVERT
6477ec681f3Smrg-  pan/bi: Fix incorrect swizzle packing assert
6487ec681f3Smrg-  pan/bi: Rewrite conversion packing
6497ec681f3Smrg-  pan/bi: ADD packing for CONVERT
6507ec681f3Smrg-  pan/bit: Add BI_CONVERT interpretation
6517ec681f3Smrg-  pan/bit: Add BI_CONVERT tests
6527ec681f3Smrg-  pan/bi: Add disasm for ADD.i8
6537ec681f3Smrg-  pan/bi: Disable FMA scheduling for CONVERT
6547ec681f3Smrg-  pan/bi: Add BI_TABLE for fast table accesses
6557ec681f3Smrg-  pan/bi: Add special op for exp2
6567ec681f3Smrg-  pan/bi: Add op for ADD_FREXPM
6577ec681f3Smrg-  pan/bi: Add FLOG2_U op to disassembler
6587ec681f3Smrg-  pan/bi: Add log_frexpe op to IR
6597ec681f3Smrg-  pan/bi: Add frexp_log packing
6607ec681f3Smrg-  pan/bi: Add bi_pack_fma_2src helper
6617ec681f3Smrg-  pan/bi: Pack ADD_FREXPM
6627ec681f3Smrg-  pan/bi: Add log2_help packing
6637ec681f3Smrg-  pan/bi: Add \_MSCALE flag for FMA/ADD
6647ec681f3Smrg-  pan/bi: Structify FMA_MSCALE
6657ec681f3Smrg-  pan/bi: Pack FMA_MSCALE
6667ec681f3Smrg-  pan/bi: Add fexp2_fast packing
6677ec681f3Smrg-  pan/bi: Split src/dest index printing
6687ec681f3Smrg-  pan/bi: Ensure CONSTANT srcs have types
6697ec681f3Smrg-  pan/bi: Fix bi_get_immediate with multiple imms
6707ec681f3Smrg-  pan/bi: Fix packing with multiple constants
6717ec681f3Smrg-  pan/bi: Fix packing with low-nibble-set on hi constant
6727ec681f3Smrg-  pan/bi: Fix lower_combine swizzle rewrite
6737ec681f3Smrg-  pan/bi: Add fexp2 implementation
6747ec681f3Smrg-  pan/bi: Implement flog2
6757ec681f3Smrg-  pan/bi: Fix vec2/3 handling
6767ec681f3Smrg-  pan/bi: Handle st_vary with <4 components
6777ec681f3Smrg-  pan/bi: Try to reuse constants in ALU
6787ec681f3Smrg-  pan/bi: Workaround constant packing errata
6797ec681f3Smrg-  pan/bi: Structify add and min/max fp16 ADD
6807ec681f3Smrg-  pan/bi: Pack ADD.v2f16
6817ec681f3Smrg-  pan/bi: Pack MAX.v2f16
6827ec681f3Smrg-  pan/bi: Dump extra bits for disasm
6837ec681f3Smrg-  pan/bi: Round constants to 32-bit
6847ec681f3Smrg-  pan/bi: Lower special ops to 32-bit
6857ec681f3Smrg-  pan/bit: Add FREXP interp support
6867ec681f3Smrg-  pan/bit: Add frexp_log test
6877ec681f3Smrg-  pan/bit: Add BI_REDUCE_FMA interp
6887ec681f3Smrg-  pan/bit: Add FMA_REDUCE test
6897ec681f3Smrg-  pan/bit: Add log2 helper interp
6907ec681f3Smrg-  pan/bit: Add BI_TABLE test
6917ec681f3Smrg-  pan/bit: \_MSCALE interp
6927ec681f3Smrg-  pan/bit: Add FMA_MSCALE test
6937ec681f3Smrg-  pan/bit: Add fexp2_fast interp
6947ec681f3Smrg-  pan/bit: Add fexp2_fast test
6957ec681f3Smrg-  pan/bit: Add constants test
6967ec681f3Smrg-  pan/bit: Add fp16 min/max tests
6977ec681f3Smrg-  pan/bi: Print tex_compact coordinates
6987ec681f3Smrg-  pan/bi: Document when dual-tex is triggered
6997ec681f3Smrg-  pan/bi: Disassemble f16 dual tex
7007ec681f3Smrg-  pan/bi: Structify TEX compact
7017ec681f3Smrg-  pan/bi: Include TEX_COMPACT f16 opcode
7027ec681f3Smrg-  pan/bi: Feed data register to BI_TEX
7037ec681f3Smrg-  pan/bi: Add normal/compact/dual switch to IR
7047ec681f3Smrg-  pan/bi: Stub out tex_compact logic
7057ec681f3Smrg-  pan/bi: Generate TEX_COMPACT instruction
7067ec681f3Smrg-  pan/bi: Pack TEX compact instructions
7077ec681f3Smrg-  pan/bi: Assert out multiple textures
7087ec681f3Smrg-  panfrost: Fix crashes with small BOs
7097ec681f3Smrg-  panfrost: Assert on unimplemented fragcoord etc
7107ec681f3Smrg-  panfrost: Set clear_color_[12] in the extra fb desc
7117ec681f3Smrg-  panfrost: Add tentative bifrost_texture_descriptor
7127ec681f3Smrg-  panfrost: decode textures and samplers on bifrost
7137ec681f3Smrg-  pan/decode: Remove is_zs weirdness
7147ec681f3Smrg-  panfrost: Identify texture layout field
7157ec681f3Smrg-  panfrost: The texture descriptor has a pointer to a trampoline
7167ec681f3Smrg-  pan/bi: Pack fp16 ATEST
7177ec681f3Smrg-  pan/bi: Passthrough type for ATEST
7187ec681f3Smrg-  pan/bi: Passthrough blend types
7197ec681f3Smrg-  pan/bi: Assign blend descriptor for BLEND op
7207ec681f3Smrg-  pan/bi: Add missing BI_VECTOR
7217ec681f3Smrg-  pan/bi: Fix ADD.v4i8 opcode
7227ec681f3Smrg-  pan/bi: Eliminate writemasks in the IR
7237ec681f3Smrg-  pan/bi: Rename BI_SWIZZLE to BI_SELECT
7247ec681f3Smrg-  pan/bi: Pack FMA SEL16
7257ec681f3Smrg-  pan/bi: Pack FMA SEL8
7267ec681f3Smrg-  pan/bi: Pack ADD SEL16
7277ec681f3Smrg-  pan/bi: Force BI_SELECT arguments scalar
7287ec681f3Smrg-  pan/bit: Interpret BI_SELECT
7297ec681f3Smrg-  pan/bit: Add SELECT tests
7307ec681f3Smrg-  pan/bi: Fix RA wrt 16-bit swizzles
7317ec681f3Smrg-  pan/bi: Implement 16-bit COMBINE lowering
7327ec681f3Smrg-  nir: Move nir_lower_mediump_outputs from ir3
7337ec681f3Smrg-  ir3: Use shared mediump output lowering
7347ec681f3Smrg-  pan/bi: Add bool->float opcodes
7357ec681f3Smrg-  pan/bi: Add CSEL.64 opcode
7367ec681f3Smrg-  pan/bi: Add some 8-bit compares
7377ec681f3Smrg-  pan/bi: Add 64-bit int compares
7387ec681f3Smrg-  pan/bi: Add FCMP.GL.v2f16 on ADD opcode
7397ec681f3Smrg-  pan/bi: Add CSEL.8 opcode
7407ec681f3Smrg-  pan/bi(t): Fix SELECT tests
7417ec681f3Smrg-  pan/bi: Deduplicate csel/cmp cond
7427ec681f3Smrg-  pan/bi: Remove bi_round_op
7437ec681f3Smrg-  pan/bi: Structify FMA FCMP
7447ec681f3Smrg-  pan/bi Strucitfy ADD FCMP 32
7457ec681f3Smrg-  pan/bi: Structify FMA FCMP16
7467ec681f3Smrg-  pan/bi: Structify ADD FCMP16
7477ec681f3Smrg-  pan/bi: Structify FMA ICMP 32
7487ec681f3Smrg-  pan/bi: Structify FMA ICMP 16
7497ec681f3Smrg-  pan/bi: Structify ADD ICMP 32
7507ec681f3Smrg-  pan/bi: Fix source mod testing for CMP
7517ec681f3Smrg-  pan/bi: Pack FMA 32 FCMP
7527ec681f3Smrg-  pan/bi: Factor out fp16 abs logic
7537ec681f3Smrg-  pan/bi: Pack fma.fcmp16
7547ec681f3Smrg-  pan/bi: Relax double-abs condition
7557ec681f3Smrg-  pan/bit: Prepare condition evaluation for vectors
7567ec681f3Smrg-  pan/bit: Interpret CMP
7577ec681f3Smrg-  pan/bi: Add initial fcmp test
7587ec681f3Smrg-  pan/bi: Add bitwise modifiers
7597ec681f3Smrg-  pan/bi: Pack BI_BITWISE
7607ec681f3Smrg-  pan/bi: Handle iand/ior/ixor in NIR->BIR
7617ec681f3Smrg-  pan/bit: Interpret BI_BITWISE
7627ec681f3Smrg-  pan/bit: Add BITWISE test
7637ec681f3Smrg-  panfrost: Fix BO reference counting
7647ec681f3Smrg-  panfrost: Move Bifrost IR indexing to common
7657ec681f3Smrg-  pan/bi: Use common IR indices
7667ec681f3Smrg-  pan/mdg: Remove nir_alu_src_index
7677ec681f3Smrg-  pan/mdg: Use PAN_IS_REG
7687ec681f3Smrg-  pan/mdg: SSA_FIXED_MINIMUM already covered by PAN_IS_REG
7697ec681f3Smrg-  pan/mdg: Don't break SSA
7707ec681f3Smrg-  pan/mdg: Remove goofy 16-bit comment
7717ec681f3Smrg-  pan/mdg: Remove old hack
7727ec681f3Smrg-  pan/mdg: Set lower_flrp16
7737ec681f3Smrg-  pan/bi: Share ALU type printing
7747ec681f3Smrg-  pan/mdg: Add type fields to IR
7757ec681f3Smrg-  pan/mdg: Track ALU src types
7767ec681f3Smrg-  pan/mdg: Track ALU dest type
7777ec681f3Smrg-  pan/mdg: Another goofy comment gone
7787ec681f3Smrg-  pan/mdg: Track a primary type for I/O
7797ec681f3Smrg-  pan/mdg: Denoise prints
7807ec681f3Smrg-  pan/mdg: Track v_mov type (force uint32 for now?)
7817ec681f3Smrg-  pan/mdg: Track texture types
7827ec681f3Smrg-  pan/mdg: Set texture full fields at pack time
7837ec681f3Smrg-  pan/mdg: Move sampler_type emission to pack time
7847ec681f3Smrg-  pan/mdg: Lower specials to 32-bit
7857ec681f3Smrg-  pan/mdg: Specialize swizzle to type
7867ec681f3Smrg-  pan/mdg: Always print the mask
7877ec681f3Smrg-  pan/mdg: Make some branch targets more explicit
7887ec681f3Smrg-  pan/mdg: Don't crash on unknown branch target
7897ec681f3Smrg-  pan/mdg: Pass through some types from scheduling
7907ec681f3Smrg-  pan/mdg: Move condense_writemask to disasm
7917ec681f3Smrg-  pan/mdg: Ensure fdot is scalar out in disasm
7927ec681f3Smrg-  pan/mdg: Replicate 16-bit swizzles
7937ec681f3Smrg
7947ec681f3SmrgAndreas Baierl (8):
7957ec681f3Smrg
7967ec681f3Smrg-  lima/parser: Fix RSW depth test parsing
7977ec681f3Smrg-  lima/parser: Extend AUX0 findings
7987ec681f3Smrg-  lima/parser: Change value name in RSW parser
7997ec681f3Smrg-  lima/parser: Extend rsw parsing showing strings instead of numbers
8007ec681f3Smrg-  gitlab-ci: lima: Add flaky tests to the skips list
8017ec681f3Smrg-  gitlab-ci: Enable the lima job again
8027ec681f3Smrg-  gitlab-ci: Add add a set of lima flakes
8037ec681f3Smrg-  lima: Add etc1 support
8047ec681f3Smrg
8057ec681f3SmrgAndres Gomez (27):
8067ec681f3Smrg
8077ec681f3Smrg-  tracie: correct typo
8087ec681f3Smrg-  gitlab-ci: add missing popd to the build-deqp-vk.sh script
8097ec681f3Smrg-  gitlab-ci: build gfxreconstruct into the Vulkan testing container
8107ec681f3Smrg-  gitlab-ci: build VulkanTools into the Vulkan testing container
8117ec681f3Smrg-  gitlab-ci: Change devices format to <api-vendor-deviceId>
8127ec681f3Smrg-  gitlab-ci: Add gfxreconstruct traces support
8137ec681f3Smrg-  gitlab-ci: Add jobs to be able to test Vulkan
8147ec681f3Smrg-  gitlab-ci: Fix indentation and dangerous "\" in the last multiline
8157ec681f3Smrg   line
8167ec681f3Smrg-  gitlab-ci: Remove unneeded python3-pilkit dependency
8177ec681f3Smrg-  gitlab-ci: Sort packages to install alphabetically
8187ec681f3Smrg-  gitlab-ci: add python3-requests to the test-vk container
8197ec681f3Smrg-  gitlab-ci/traces: Add Vulkan sample entries for POLARIS10
8207ec681f3Smrg-  gitlab-ci: Don't use buster-backports packages by default for
8217ec681f3Smrg   x86_test-vk
8227ec681f3Smrg-  gitlab-ci: add Wine, win64's apitrace and DXVK to the Vulkan testing
8237ec681f3Smrg   container
8247ec681f3Smrg-  gitlab-ci: add apitrace's DXGI traces support
8257ec681f3Smrg-  gitlab-ci: replay apitrace traces in headless mode
8267ec681f3Smrg-  gitlab-ci: add Wine and DXVK env variables to Vulkan's tracie runner
8277ec681f3Smrg-  gitlab-ci/traces: Add D3D11 sample entry for POLARIS10
8287ec681f3Smrg-  gitlab-ci: Vulkan tracie runner to return last command exit code
8297ec681f3Smrg-  gitlab-ci: protect usage of shell variables with double quotes
8307ec681f3Smrg-  gitlab-ci: make explicit tracie is gitlab specific
8317ec681f3Smrg-  gitlab-ci: adapt query_traces_yaml to gitlab specific changes
8327ec681f3Smrg-  gitlab-ci: install winehq-stable to get 5.0 instead of 4.0
8337ec681f3Smrg-  Revert "meson,ci: Disable sparse_array tests on windows"
8347ec681f3Smrg-  gitlab-ci: update tracie README after changes in main script
8357ec681f3Smrg-  gitlab-ci: create always the "results" directory with tracie
8367ec681f3Smrg-  gitlab-ci: correct tracie behavior with replay errors
8377ec681f3Smrg
8387ec681f3SmrgAndrii Simiklit (2):
8397ec681f3Smrg
8407ec681f3Smrg-  Revert "glx: convert glx_config_create_list to one big calloc"
8417ec681f3Smrg-  i965/vec4: Ignore swizzle of VGRF for use by var_range_end()
8427ec681f3Smrg
8437ec681f3SmrgAnuj Phogat (2):
8447ec681f3Smrg
8457ec681f3Smrg-  intel/gen12+: Reserve 4KB of URB space per bank for Compute Engine
8467ec681f3Smrg-  intel/gen12+: Set way_size_per_bank to 4
8477ec681f3Smrg
8487ec681f3SmrgArcady Goldmints-Orlov (7):
8497ec681f3Smrg
8507ec681f3Smrg-  compiler/nir: Add support for variable initialization from a pointer
8517ec681f3Smrg-  compiler/spirv: Add support for non-constant initializers
8527ec681f3Smrg-  Rename nir_lower_constant_initializers to
8537ec681f3Smrg   nir_lower_variable_initalizers
8547ec681f3Smrg-  spirv: Remove outdated SPIR-V decoration warnings
8557ec681f3Smrg-  nir: Lower returns correctly inside nested loops
8567ec681f3Smrg-  anv: increase minUniformBufferOffsetAlignment to 64
8577ec681f3Smrg-  intel/compiler: fix alignment assert in nir_emit_intrinsic
8587ec681f3Smrg
8597ec681f3SmrgAxel Davy (1):
8607ec681f3Smrg
8617ec681f3Smrg-  gallium/util: Fix leak in the live shader cache
8627ec681f3Smrg
8637ec681f3SmrgBas Nieuwenhuizen (29):
8647ec681f3Smrg
8657ec681f3Smrg-  radv: Allow non-dedicated linear images and buffer.
8667ec681f3Smrg-  radv: Do not set SX DISABLE bits for RB+ with unused surfaces.
8677ec681f3Smrg-  radv: Optimize emitting index buffer changes.
8687ec681f3Smrg-  radv: Do not redundantly set the RB+ regs on pipeline switch.
8697ec681f3Smrg-  radeonsi: Fix compute copies for subsampled formats.
8707ec681f3Smrg-  amd/llvm: Fix divergent descriptor indexing. (v3)
8717ec681f3Smrg-  amd/llvm: Fix divergent descriptor regressions with radeonsi.
8727ec681f3Smrg-  radv: Store 64-bit availability bools if requested.
8737ec681f3Smrg-  radv: Consider maximum sample distances for entire grid.
8747ec681f3Smrg-  radv: Whitespace fixup.
8757ec681f3Smrg-  radv: Use correct buffer count with variable descriptor set sizes.
8767ec681f3Smrg-  winsys/amdgpu: Retrieve WC flags from imported buffers.
8777ec681f3Smrg-  drm-uapi,radv,radeonsi: Add amdgpu_drm.h header.
8787ec681f3Smrg-  vulkan/wsi: Add callback to set ownership of buffer.
8797ec681f3Smrg-  radv: Add WSI buffers to BO list only if they can be used.
8807ec681f3Smrg-  st/dri: Set next in template instead of after creation. (v2)
8817ec681f3Smrg-  radeonsi: Count planes for imported textures.
8827ec681f3Smrg-  radv: Use actual memory type count for setting app-visible bitset.
8837ec681f3Smrg-  radv: Stop using memory type indices.
8847ec681f3Smrg-  radv/winsys: Add function to get domains/flags from fd.
8857ec681f3Smrg-  radv: Determine memory type for import based on fd.
8867ec681f3Smrg-  radv: Expose 4G element texel buffers.
8877ec681f3Smrg-  radv: Fix implicit sync with recent allocation changes.
8887ec681f3Smrg-  radv: Extend tiling flags to 64-bit.
8897ec681f3Smrg-  radv: Provide a better error for permission issues with priorities.
8907ec681f3Smrg-  radv/winsys: Remove extra sizeof multiply.
8917ec681f3Smrg-  radv: Handle failing to create .cache dir.
8927ec681f3Smrg-  radv: Do not close fd -1 when NULL-winsys creation fails.
8937ec681f3Smrg-  radv: Implement vkGetSwapchainGrallocUsage2ANDROID.
8947ec681f3Smrg
8957ec681f3SmrgBernd Kuhls (1):
8967ec681f3Smrg
8977ec681f3Smrg-  util/os_socket: Include unistd.h to fix build error
8987ec681f3Smrg
8997ec681f3SmrgBlaž Tomažič (1):
9007ec681f3Smrg
9017ec681f3Smrg-  radeonsi: Fix omitted flush when moving suballocated texture
9027ec681f3Smrg
9037ec681f3SmrgBoris Brezillon (45):
9047ec681f3Smrg
9057ec681f3Smrg-  pan/midgard: Add an enum to describe the render targets
9067ec681f3Smrg-  pan/midgard: Make sure we pass the right RT id to
9077ec681f3Smrg   emit_fragment_store()
9087ec681f3Smrg-  pan/midgard: Lower bitfield extract to shifts
9097ec681f3Smrg-  pan/midgard: Don't check 'branch && branch->writeout' twice in
9107ec681f3Smrg   mir_schedule_alu()
9117ec681f3Smrg-  pan/midgard: Stop leaking instruction objects in mir_schedule_alu()
9127ec681f3Smrg-  panfrost: Fix the damage box clamping logic
9137ec681f3Smrg-  pan/midgard: Turn Z/S stores into zs_output_pan intrinsics
9147ec681f3Smrg-  pan/midgard: Add nir_intrinsic_store_zs_output_pan support
9157ec681f3Smrg-  panfrost: Z24 variants should be sampled as R32UI
9167ec681f3Smrg-  panfrost: Add the MALI_WRITES_{Z,S} flags
9177ec681f3Smrg-  panfrost: Set the MALI_WRITES_{Z,S} flags when needed
9187ec681f3Smrg-  Revert "panfrost: Z24 variants should be sampled as R32UI"
9197ec681f3Smrg-  panfrost: Pass the sampler view format when creating a tex descriptor
9207ec681f3Smrg-  panfrost: Assign primitive_size.pointer only if writes_point_size()
9217ec681f3Smrg   returns true
9227ec681f3Smrg-  panfrost: Add an helper to retrieve the currently active shader state
9237ec681f3Smrg-  panfrost: Move the batch stack size adjustment out of
9247ec681f3Smrg   panfrost_queue_draw()
9257ec681f3Smrg-  panfrost: Move viewport desc emission out of panfrost_emit_for_draw()
9267ec681f3Smrg-  panfrost: Move the const buf emission logic out of
9277ec681f3Smrg   panfrost_emit_for_draw()
9287ec681f3Smrg-  panfrost: Move shared mem desc emission out of panfrost_launch_grid()
9297ec681f3Smrg-  panfrost: Dissociate shader meta patching from the desc emission
9307ec681f3Smrg-  panfrost: Move panfrost_attach_vt_framebuffer() to pan_cmdstream.c
9317ec681f3Smrg-  panfrost: Stop using panfrost_emit_for_draw() for compute jobs
9327ec681f3Smrg-  panfrost: Simplify panfrost_emit_for_draw() and make it private
9337ec681f3Smrg-  panfrost: Add an helper to update the occclusion query part of a
9347ec681f3Smrg   tiler job desc
9357ec681f3Smrg-  panfrost: Add an helper to update the rasterizer part of a tiler job
9367ec681f3Smrg   desc
9377ec681f3Smrg-  panfrost: Prepare things to get rid of panfrost_shader_state.tripipe
9387ec681f3Smrg-  panfrost: Prepare shader_meta descriptors at emission time
9397ec681f3Smrg-  panfrost: Add a panfrost_sampler_desc_init() helper
9407ec681f3Smrg-  panfrost: Move sampler/tex descs emission helpers to pan_cmdstream.c
9417ec681f3Smrg-  panfrost: Add an helper to emit a pair of vertex/tiler jobs
9427ec681f3Smrg-  panfrost: Drop initial mali_attr_meta.src_offset assignment
9437ec681f3Smrg-  panfrost: Ignore BO start addr when adjusting src_offset
9447ec681f3Smrg-  panfrost: Prepare attribute for builtins at state creation time
9457ec681f3Smrg-  panfrost: Emit attribute descriptors after patching the templates
9467ec681f3Smrg-  panfrost: Move the mali_attr.src_offset adjustment to a sub-function
9477ec681f3Smrg-  panfrost: Rename panfrost_stage_attributes()
9487ec681f3Smrg-  panfrost: Move streamout offset update out of panfrost_draw_vbo()
9497ec681f3Smrg-  panfrost: Move vertex/tiler payload initialization out of
9507ec681f3Smrg   panfrost_draw_vbo()
9517ec681f3Smrg-  panfrost: Inline panfrost_queue_draw() and panfrost_emit_for_draw()
9527ec681f3Smrg-  panfrost: Move panfrost_emit_vertex_data() to pan_cmdstream.c
9537ec681f3Smrg-  panfrost: Move panfrost_emit_varying_descriptor() to pan_cmdstream.c
9547ec681f3Smrg-  panfrost: Re-init the VT payloads at draw/launch_grid() time
9557ec681f3Smrg-  panfrost: Use ctx->active_prim in panfrost_writes_point_size()
9567ec681f3Smrg-  panfrost: Get rid of ctx->payloads[]
9577ec681f3Smrg-  vtn/opencl: add rint-support
9587ec681f3Smrg
9597ec681f3SmrgBrian Ho (17):
9607ec681f3Smrg
9617ec681f3Smrg-  turnip: Promote tu_cs_get_size/is_empty to header
9627ec681f3Smrg-  turnip: Execute main cs for secondary command buffers
9637ec681f3Smrg-  turnip: Advertise 8 bit subpixel precision
9647ec681f3Smrg-  ir3: Disable copy prop for immediate ldlw offsets
9657ec681f3Smrg-  turnip: Set has_gs in ir3_shader_key
9667ec681f3Smrg-  turnip: Emit geometry shader obj and related consts
9677ec681f3Smrg-  turnip: Configure VPC for geometry shaders
9687ec681f3Smrg-  turnip: Configure VFD_CONTROL with gsheader and primitiveid
9697ec681f3Smrg-  turnip: Set up REG_A6XX_SP_GS_CONFIG
9707ec681f3Smrg-  turnip: Selectively configure GRAS_LAYER_CNTL
9717ec681f3Smrg-  turnip: Update maxGeometryShaderInvocations to match blob
9727ec681f3Smrg-  turnip: Populate tu_pipeline.active_stages
9737ec681f3Smrg-  turnip: Enable geometry shaders for CP_DRAWs
9747ec681f3Smrg-  turnip: Enable geometryShader device feature
9757ec681f3Smrg-  turnip: Correctly set layer stride for 3D images
9767ec681f3Smrg-  turnip: Emit geometry shader descriptor consts
9777ec681f3Smrg-  freedreno/turnip: Update GRAS_LAYER_CNTL to GRAS_MAX_LAYER_INDEX
9787ec681f3Smrg
9797ec681f3SmrgCaio Marcelo de Oliveira Filho (46):
9807ec681f3Smrg
9817ec681f3Smrg-  anv: Advertise VK_KHR_shader_non_semantic_info
9827ec681f3Smrg-  radv: Advertise VK_KHR_shader_non_semantic_info
9837ec681f3Smrg-  intel/gen12: Take into account opcode when decoding SWSB
9847ec681f3Smrg-  spirv: Be consistent when checking for Shader/Kernel
9857ec681f3Smrg-  anv: Use intel_debug_flag_for_shader_stage()
9867ec681f3Smrg-  anv: Add pipe_state_for_stage() helper
9877ec681f3Smrg-  nir/builder: Add nir_scoped_memory_barrier()
9887ec681f3Smrg-  nir: Add the alias NIR_MEMORY_ACQ_REL
9897ec681f3Smrg-  nir/tests: Use nir_scoped_memory_barrier() helper
9907ec681f3Smrg-  nir, intel: Move use_scoped_memory_barrier to nir_options
9917ec681f3Smrg-  anv: Remove unused field xfb_used from anv_pipeline
9927ec681f3Smrg-  anv: Remove unused field \`urb.total_size\`
9937ec681f3Smrg-  nir: Don't skip a bit in nir_memory_semantics
9947ec681f3Smrg-  nir: Reorder nir_scopes so wider scope has larger numeric value
9957ec681f3Smrg-  nir: Add pass to combine adjacent scoped memory barriers
9967ec681f3Smrg-  intel/fs: Combine adjacent memory barriers
9977ec681f3Smrg-  anv: Add a new enum to identify the pipeline type
9987ec681f3Smrg-  anv: Use pipeline type to decide whether or not lower multiview
9997ec681f3Smrg-  anv: Use a dynamic array for storing executables in pipeline
10007ec681f3Smrg-  anv: Keep the shader stage in anv_shader_bin
10017ec681f3Smrg-  anv: Pass the right pipe_state to flush_descriptor_sets()
10027ec681f3Smrg-  anv: Remove redundant check in flush_descriptor_sets() helpers
10037ec681f3Smrg-  anv: Decouple flush_descriptor_sets() helpers from pipeline struct
10047ec681f3Smrg-  anv: Decouple flush_descriptor_sets() from pipeline struct
10057ec681f3Smrg-  anv: Use a separate field in the pipeline for compute shader
10067ec681f3Smrg-  anv: Split graphics and compute bits from anv_pipeline
10077ec681f3Smrg-  anv: Reduce compute pipeline batch_data size
10087ec681f3Smrg-  anv: Remove duplicate code in anv_cmd_buffer_bind_descriptor_set
10097ec681f3Smrg-  intel/blorp: Plumb the stage through blorp upload_shader
10107ec681f3Smrg-  mesa/main: Fix overflow in validation of DispatchComputeGroupSizeARB
10117ec681f3Smrg-  nir: Add per_view attribute to nir_variable
10127ec681f3Smrg-  intel/gen12: Add XML description for 3DSTATE_PRIMITIVE_REPLICATION
10137ec681f3Smrg-  intel/fs: Allow multiple slots for position
10147ec681f3Smrg-  anv/gen12: Lower VK_KHR_multiview using Primitive Replication
10157ec681f3Smrg-  intel/compiler: Replace cs_prog_data->push.total with a helper
10167ec681f3Smrg-  anv: Stop using cs_prog_data->threads
10177ec681f3Smrg-  iris: Stop using cs_prog_data->threads
10187ec681f3Smrg-  intel/compiler: Remove cs_prog_data->threads
10197ec681f3Smrg-  intel/fs,vec4: Properly account SENDs in IVB memory fence
10207ec681f3Smrg-  spirv: Fix propagation of OpVariable access flags
10217ec681f3Smrg-  spirv: Handle instruction aliases in vtn_gather_types
10227ec681f3Smrg-  spirv: Update the headers from latest Khronos master
10237ec681f3Smrg-  intel/fs: Allow FS_OPCODE_SCHEDULING_FENCE stall on registers
10247ec681f3Smrg-  intel/fs,vec4: Pull stall logic for memory fences up into the IR
10257ec681f3Smrg-  intel/fs: Only stall after sending all memory fence messages
10267ec681f3Smrg-  i965: Use correct constant for max_variable_local_size
10277ec681f3Smrg
10287ec681f3SmrgChad Versace (12):
10297ec681f3Smrg
10307ec681f3Smrg-  anv: Drop unused anv_image_get_surface_for_aspect_mask()
10317ec681f3Smrg-  anv: Rename param make_surface::dev to device
10327ec681f3Smrg-  anv: Delete anv_image::ccs_e_compatible
10337ec681f3Smrg-  anv: Clarify behavior of anv_image_aspect_to_plane()
10347ec681f3Smrg-  anv: Respect ISL_SURF_USAGE_DISABLE_AUX_BIT in make_surface()
10357ec681f3Smrg-  turnip: Add magic register values to tu_physical_device
10367ec681f3Smrg-  turnip: Add a618 support
10377ec681f3Smrg-  anv: Drop anv_image.c:get_surface()
10387ec681f3Smrg-  anv: Add anv_image_plane_needs_shadow_surface() (v2)
10397ec681f3Smrg-  anv: Refactor creation of aux surfaces (v2)
10407ec681f3Smrg-  anv: Flatten the logic add_aux_surface_if_supported (v3)
10417ec681f3Smrg-  anv: Use isl_drm_modifier_get_default_aux_state()
10427ec681f3Smrg
10437ec681f3SmrgChia-I Wu (2):
10447ec681f3Smrg
10457ec681f3Smrg-  egl/android: require ANDROID_native_fence_sync for buffer age
10467ec681f3Smrg-  egl/android: enable/disable KHR_partial_update correctly
10477ec681f3Smrg
10487ec681f3SmrgChris Lord (2):
10497ec681f3Smrg
10507ec681f3Smrg-  vc4: fix vc4_yuv_blit overwriting fragment constant buffer slot 0
10517ec681f3Smrg-  vc4: Fix query_dmabuf_modifiers mis-reporting external_only property
10527ec681f3Smrg
10537ec681f3SmrgChris Wilson (1):
10547ec681f3Smrg
10557ec681f3Smrg-  iris: Fix import sync-file into syncobj
10567ec681f3Smrg
10577ec681f3SmrgChristian Gmeiner (44):
10587ec681f3Smrg
10597ec681f3Smrg-  etnaviv: enable texture upload memory throttling
10607ec681f3Smrg-  etnaviv: update headers from rnndb
10617ec681f3Smrg-  etnaviv: fix alpha test on GC3000
10627ec681f3Smrg-  etnaviv: add etna_constbuf_state object
10637ec681f3Smrg-  etnaviv: ask kernel for max number of supported varyings
10647ec681f3Smrg-  etnaviv: update headers from rnndb
10657ec681f3Smrg-  etnaviv: increase number of supported varyings to 16
10667ec681f3Smrg-  etnaviv: implement emit_string_marker
10677ec681f3Smrg-  etnaviv: get rid of etna_spec in etna_context
10687ec681f3Smrg-  etnaviv: enable shareable shaders
10697ec681f3Smrg-  freedreno: calculate modified bit mask only once
10707ec681f3Smrg-  freedreno: simplify fd_set_shader_buffers(..)
10717ec681f3Smrg-  freedreno: ssbo: keep track if a buffer gets written
10727ec681f3Smrg-  freedreno: ssbo: mark resource read or written depending on usage
10737ec681f3Smrg-  etnaviv: get rid of SE_CLIP\_\*
10747ec681f3Smrg-  etnaviv: rework clippling calculation to be a derived state
10757ec681f3Smrg-  etnaviv: do the left shift by 16 at emit time
10767ec681f3Smrg-  etnaviv: get rid of struct compiled_scissor_state
10777ec681f3Smrg-  etnaviv: s/scissor_s/scissor
10787ec681f3Smrg-  etnaviv: compiled_framebuffer_state: get rid of SE_SCISSOR\_\*
10797ec681f3Smrg-  etnaviv: rename hw queries to acc queries
10807ec681f3Smrg-  etnaviv: rework etna_acc_sample_provider
10817ec681f3Smrg-  etnaviv: explicitly call resource_written(..)
10827ec681f3Smrg-  etnaviv: reset no_wait_cnt after triggered flush
10837ec681f3Smrg-  etnaviv: rework wait/flush logic
10847ec681f3Smrg-  etnaviv: extend acc query provider with supports(..) function
10857ec681f3Smrg-  etnaviv: make use of a fixed size array to track of all acc query
10867ec681f3Smrg   provider
10877ec681f3Smrg-  etnaviv: extend result(..) to return if data is ready
10887ec681f3Smrg-  etnaviv: extend acc sample provide with an allocate(..)
10897ec681f3Smrg-  etnaviv: move generic perfmon functionality into own file
10907ec681f3Smrg-  etnaviv: convert perfmon queries to acc queries
10917ec681f3Smrg-  etnaviv: drop redundant calls to etna_acc_query_suspend(..)
10927ec681f3Smrg-  etnaviv: change begin_query(..) to a void function
10937ec681f3Smrg-  etnaviv: remove the "active" member of queries
10947ec681f3Smrg-  etnaviv: anisotropic filtering is supported starting with HALTI0
10957ec681f3Smrg-  etnaviv: update headers from rnndb
10967ec681f3Smrg-  etnaviv: add anisotropic filter support
10977ec681f3Smrg-  docs/features: mark GL_ARB_texture_filter_anisotropic as done for
10987ec681f3Smrg   etnaviv
10997ec681f3Smrg-  etnaviv: drop default state for FE_HALTI5_ID_CONFIG
11007ec681f3Smrg-  etnaviv: call util_blitter_save_fragment_constant_buffer_slot(..)
11017ec681f3Smrg-  etnaviv: support for using generic blit path
11027ec681f3Smrg-  ci: bare-metal: power down device after tests
11037ec681f3Smrg-  etnaviv: fix SAMP_ANISOTROPY register value
11047ec681f3Smrg-  etnaviv: do not use int filter when anisotropic filtering is used
11057ec681f3Smrg
11067ec681f3SmrgChristopher Egert (1):
11077ec681f3Smrg
11087ec681f3Smrg-  radv: use util_float_to_half_rtz
11097ec681f3Smrg
11107ec681f3SmrgChristopher James Halse Rogers (1):
11117ec681f3Smrg
11127ec681f3Smrg-  egl/wayland: Fix zwp_linux_dmabuf usage
11137ec681f3Smrg
11147ec681f3SmrgConnor Abbott (55):
11157ec681f3Smrg
11167ec681f3Smrg-  freedreno: Fix CP_COND_REG_EXEC bit positions
11177ec681f3Smrg-  freedreno: Add CP_REG_WRITE documentation
11187ec681f3Smrg-  freedreno: Fix CP_COND_EXEC
11197ec681f3Smrg-  tu: Move vsc_data and vsc_data2 allocation into the device
11207ec681f3Smrg-  tu: Don't emit initial render target state in tile_load_ib
11217ec681f3Smrg-  tu: Properly set UBWC flags in RB_RENDER_CNTL
11227ec681f3Smrg-  tu/blit: Support blits in secondary cmdstreams
11237ec681f3Smrg-  tu: Support multisample image clears
11247ec681f3Smrg-  tu: Disable linear depth attachments
11257ec681f3Smrg-  tu: Sysmem rendering
11267ec681f3Smrg-  tu: Add helper for CP_COND_REG_EXEC
11277ec681f3Smrg-  tu: Handle vkCmdClearAttachments() with sysmem
11287ec681f3Smrg-  tu: Support resolve ops with sysmem rendering
11297ec681f3Smrg-  tu: Support input attachments with sysmem
11307ec681f3Smrg-  tu: Force sysmem with mipmapped non-aligned linear stores
11317ec681f3Smrg-  tu: Rewrite border color handling
11327ec681f3Smrg-  lima/gpir: Make lima_gpir_node_insert_child() useful
11337ec681f3Smrg-  lima/gpir: Optimize conditional break/continue
11347ec681f3Smrg-  lima/gpir: Optimize nots created from branch lowering
11357ec681f3Smrg-  tu: Fix border color with compute shaders
11367ec681f3Smrg-  freedreno/fdl: Add base_align
11377ec681f3Smrg-  tu: Return the correct alignment for images
11387ec681f3Smrg-  freedreno: Cleanup event names
11397ec681f3Smrg-  freedreno: Rename RB_DONE_TS
11407ec681f3Smrg-  tu: Dump out shader assembly when requested
11417ec681f3Smrg-  tu: ir3: Emit push constants directly
11427ec681f3Smrg-  freedreno/a6xx: Add UBO size field
11437ec681f3Smrg-  freedreno/a6xx: Add registers for the bindless model
11447ec681f3Smrg-  ir3: Add bindless instruction encoding
11457ec681f3Smrg-  ir3: Plumb through support for a1.x
11467ec681f3Smrg-  ir3: Also don't propagate immediate offset with LDC
11477ec681f3Smrg-  ir3: LDC also has a destination
11487ec681f3Smrg-  ir3: Plumb through bindless support
11497ec681f3Smrg-  ir3: Rewrite UBO push analysis to support bindless
11507ec681f3Smrg-  tu: Switch to the bindless descriptor model
11517ec681f3Smrg-  tu: Emit CP_LOAD_STATE6 for descriptors
11527ec681f3Smrg-  tu: Add missing code for immutable samplers
11537ec681f3Smrg-  tu: Implement descriptor set update templates
11547ec681f3Smrg-  ir3: Fix txs with bindless
11557ec681f3Smrg-  ir3: Fix LDC offset units
11567ec681f3Smrg-  ir3: Handle load_ubo_ir3 when promoting to constants
11577ec681f3Smrg-  tu: Align GMEM resolve blit scissor
11587ec681f3Smrg-  tu: Use tu_cs_add_entries() with non-render-pass secondaries
11597ec681f3Smrg-  ir3/ra: Fix off-by-one issues with live-range extension
11607ec681f3Smrg-  freedreno/a6xx: Expand various varying-count bitfields
11617ec681f3Smrg-  tu: Fix the advertised maxFragmentInputComponents
11627ec681f3Smrg-  ir3: Don't double-insert the first block
11637ec681f3Smrg-  ir3: Fix bug with shaders that only exit via discard
11647ec681f3Smrg-  freedreno/a6xx: Document PrimID passthrough registers
11657ec681f3Smrg-  ir3: Skip missing VS outputs in VS out map when linking
11667ec681f3Smrg-  tu: Implement PrimID passthrough
11677ec681f3Smrg-  freedreno/a6xx: Implement PrimID passthrough
11687ec681f3Smrg-  st/nir: Fix assigning PointCoord location with !PIPE_CAP_TEXCOORD
11697ec681f3Smrg-  ir3: Remove VARYING_SLOT_PNTC remapping hack
11707ec681f3Smrg-  tu: Don't invert point coords
11717ec681f3Smrg
11727ec681f3SmrgD Scott Phillips (6):
11737ec681f3Smrg
11747ec681f3Smrg-  intel/tools/aubinator_error_decode: read HW Context before other
11757ec681f3Smrg   batches
11767ec681f3Smrg-  intel/tools/aubinator_error_decode: Decode ring buffers from HEAD to
11777ec681f3Smrg   TAIL
11787ec681f3Smrg-  util/sparse_array: don't stomp head's counter on pop operations
11797ec681f3Smrg-  intel/fs: Update location of Render Target Array Index for gen12
11807ec681f3Smrg-  anv,iris: Fix input vertex max for tcs on gen12
11817ec681f3Smrg-  anv/gen11+: Disable object level preemption
11827ec681f3Smrg
11837ec681f3SmrgDaniel Schürmann (73):
11847ec681f3Smrg
11857ec681f3Smrg-  aco: fix image_atomic_cmp_swap
11867ec681f3Smrg-  nir: gather info whether a shader uses demote_to_helper
11877ec681f3Smrg-  nir: add pass to lower discard() to demote()
11887ec681f3Smrg-  amd/llvm: implement nir_intrinsic_demote(_if) and
11897ec681f3Smrg   nir_intrinsic_is_helper_invocation
11907ec681f3Smrg-  radeonsi: lower discard to demote when FS_CORRECT_DERIVS_AFTER_KILL
11917ec681f3Smrg   is enabled
11927ec681f3Smrg-  radv: use nir_lower_discard_to_demote to work around game bugs
11937ec681f3Smrg-  amd: join emit_kill() from radv and radeonsi in ac_nir_to_llvm
11947ec681f3Smrg-  nir: fix unpack_64_4x16 in lower_alu_to_scalar()
11957ec681f3Smrg-  aco: add comparison operators for PhysReg
11967ec681f3Smrg-  aco: add sub-dword regclasses
11977ec681f3Smrg-  aco: refactor regClass setup for subdword VGPRs
11987ec681f3Smrg-  aco: validate p_create_vector with subdword elements properly
11997ec681f3Smrg-  aco: validate register alignment of subdword operands and definitions
12007ec681f3Smrg-  aco: validate uninitialized operands
12017ec681f3Smrg-  aco: validate RA of subdword assignments
12027ec681f3Smrg-  aco: print subdword registers
12037ec681f3Smrg-  aco: fix Temp and assignment of renamed operands during RA
12047ec681f3Smrg-  aco: remove unnecessary reg_file.fill() operation in
12057ec681f3Smrg   get_reg_create_vector()
12067ec681f3Smrg-  aco: add notion of subdword registers to register allocator
12077ec681f3Smrg-  aco: create helper function to collect variables from register area
12087ec681f3Smrg-  aco: adapt register allocation for subdword registers
12097ec681f3Smrg-  aco: align subdword registers during RA when necessary
12107ec681f3Smrg-  aco: small refactoring of shuffle code lowering
12117ec681f3Smrg-  aco: add builder function for subdword copy()
12127ec681f3Smrg-  aco: lower subdword shuffles correctly.
12137ec681f3Smrg-  aco: don't propagate SGPRs into subdword PSEUDO instructions
12147ec681f3Smrg-  aco: don't assume split_vector(create_vector) has the same number of
12157ec681f3Smrg   elements when optimizing
12167ec681f3Smrg-  aco: don't vectorize 8/16bit load/store_ssbo
12177ec681f3Smrg-  aco: add missing conversion operations for small bitsizes
12187ec681f3Smrg-  aco: add byte_align_scalar() & trim_subdword_vector() helper
12197ec681f3Smrg   functions
12207ec681f3Smrg-  aco: prepare helper functions for subdword handling
12217ec681f3Smrg-  aco: implement vec2/3/4 with subdword operands
12227ec681f3Smrg-  aco: implement storagePushConstant8 & storagePushConstant16
12237ec681f3Smrg-  aco: implement 8bit/16bit load_buffer
12247ec681f3Smrg-  aco: implement 8bit/16bit store_ssbo
12257ec681f3Smrg-  aco: use MUBUF to load subdword SSBO
12267ec681f3Smrg-  aco: guarantee that Temp fits in 4 bytes
12277ec681f3Smrg-  aco: add explicit padding for all Instruction sub-structs
12287ec681f3Smrg-  aco: improve hashing for value numbering
12297ec681f3Smrg-  aco: improve register assignment when live-range splits are necessary
12307ec681f3Smrg-  aco: replace assignment hashmap by std::vector in register allocation
12317ec681f3Smrg-  aco: during RA only insert into renames table if a variable got
12327ec681f3Smrg   renamed
12337ec681f3Smrg-  aco: improve speed of live_var_analysis
12347ec681f3Smrg-  aco: refactor try_remove_trivial_phi() in RA
12357ec681f3Smrg-  aco: change some std::map to std::unordered_map in
12367ec681f3Smrg   register_allocation
12377ec681f3Smrg-  aco: change live_out variables to std::unordered_set
12387ec681f3Smrg-  aco: move all needed helper containers to ra_ctx
12397ec681f3Smrg-  aco: RA - move all std::function objects into proper functions
12407ec681f3Smrg-  aco: setup subdword regclasses for ssa_undef & load_const
12417ec681f3Smrg-  aco: ensure correct bit representation of subdword constants
12427ec681f3Smrg-  aco: don't constant-propagate into subdword PSEUDO instructions
12437ec681f3Smrg-  aco: lower subdword phis with SGPR operands
12447ec681f3Smrg-  aco: rename aco_lower_bool_phis() -> aco_lower_phis()
12457ec681f3Smrg-  aco: make some reg_file helpers private and fix their uses
12467ec681f3Smrg-  aco: fix p_extract_vector optimization in presence of unequally sized
12477ec681f3Smrg   vector operands
12487ec681f3Smrg-  aco: use v_subrev_f32 for fsub with an sgpr operand in src1
12497ec681f3Smrg-  aco: fix 64bit fsub
12507ec681f3Smrg-  aco: move src1 to vgpr instead of using VOP3 for VOP2 instructions
12517ec681f3Smrg   during isel
12527ec681f3Smrg-  aco: simplify operand handling in RA
12537ec681f3Smrg-  aco: refactor get_reg() to take Temp instead of RegClass
12547ec681f3Smrg-  aco: refactor get_reg() to also handle affinities
12557ec681f3Smrg-  aco: create pseudo dummy instruction in RA to be used for live-range
12567ec681f3Smrg   splits
12577ec681f3Smrg-  aco: create and use DefInfo struct in RA
12587ec681f3Smrg-  aco: use DefInfo in more places to simplify RA
12597ec681f3Smrg-  aco: move attempt to find strided register into get_reg_simple()
12607ec681f3Smrg-  aco: allocate full register for subdword definitions if HW doesn't
12617ec681f3Smrg   support it
12627ec681f3Smrg-  aco: don't create vector affinities for operands which are not killed
12637ec681f3Smrg   or are duplicates
12647ec681f3Smrg-  aco: refactor get_reg_simple() to return early on exact matches
12657ec681f3Smrg-  aco: stop get_reg_simple after reaching max_used_gpr
12667ec681f3Smrg-  aco: try to always find a register with stride for even sizes
12677ec681f3Smrg-  aco: use upper part of gap in register file if it is beneficial for
12687ec681f3Smrg   striding
12697ec681f3Smrg-  aco: coalesce v_mad's accumulator with definition's affinities
12707ec681f3Smrg-  aco: either copy-propagate or inline create_vector operands
12717ec681f3Smrg
12727ec681f3SmrgDaniel Stone (15):
12737ec681f3Smrg
12747ec681f3Smrg-  Revert "gitlab-ci: disable panfrost runners"
12757ec681f3Smrg-  egl/wayland: Don't invalidate buffers on no-op resize
12767ec681f3Smrg-  util/test: Use MAX_PATH on Windows
12777ec681f3Smrg-  CI: Add native Windows VS2019 build
12787ec681f3Smrg-  CI: Windows: Fix Docker tag argument inversion
12797ec681f3Smrg-  CI: Disable Panfrost Mali-T820 jobs
12807ec681f3Smrg-  CI: Avoid htz4 runner for VS2019
12817ec681f3Smrg-  meson: Add VS 4624 warning exclusion to remove piles of LLVM warnings
12827ec681f3Smrg-  CI: Re-enable Windows VS2019 builds
12837ec681f3Smrg-  EGL: Add eglSetDamageRegionKHR to GLVND dispatch list
12847ec681f3Smrg-  meson: Make shared-llvm into a tri-state boolean
12857ec681f3Smrg-  CI: Disable Windows/VS2019 builds
12867ec681f3Smrg-  Revert "CI: Disable Windows/VS2019 builds"
12877ec681f3Smrg-  ci/windows: Make Chocolatey installs more reliable
12887ec681f3Smrg-  CI: Disable Lima jobs due to lab unhealthiness
12897ec681f3Smrg
12907ec681f3SmrgDanylo Piliaiev (29):
12917ec681f3Smrg
12927ec681f3Smrg-  i965: Do not set front_buffer_dirty if there is no front buffer
12937ec681f3Smrg-  st/mesa: Handle the rest renderbuffer formats from OSMesa
12947ec681f3Smrg-  osmesa/tests: Cover OSMESA_RGB GL_UNSIGNED_BYTE case
12957ec681f3Smrg-  st/nir: Unify inputs_read/outputs_written before serializing NIR
12967ec681f3Smrg-  brw_nir: Cast bitshift to unsigned
12977ec681f3Smrg-  brw_fs: Avoid zero size vla
12987ec681f3Smrg-  intel/compiler: Do not qsort zero sized array
12997ec681f3Smrg-  intel/bufmgr: Cast bitshift to unsigned
13007ec681f3Smrg-  glsl/blob: Do not call memcpy if there is nothing to copy
13017ec681f3Smrg-  iris: Do not dereference nullptr with pipe_reference
13027ec681f3Smrg-  i965: Do not generate D16 B5G6R5_UNORM configs on gen < 8
13037ec681f3Smrg-  intel/tools: Fix compilation with UBSan
13047ec681f3Smrg-  glsl: do not crash if string literal is used outside of
13057ec681f3Smrg   #include/#line
13067ec681f3Smrg-  st/mesa: Fix signed integer overflow when using
13077ec681f3Smrg   util_throttle_memory_usage
13087ec681f3Smrg-  intel/aub_viewer: Fix format specifier for uint64_t
13097ec681f3Smrg-  nir: Fix breakage of foreach_list_typed_safe assumptions in loop
13107ec681f3Smrg   unrolling
13117ec681f3Smrg-  anv: Do not sample from 3d depth image with HiZ
13127ec681f3Smrg-  glsl/list: Fix undefined behaviour of foreach\_\* macros
13137ec681f3Smrg-  st/mesa: Update shader info of ffvp/ARB_vp after translation to NIR
13147ec681f3Smrg-  st/mesa: Re-assign vs in locations after updating nir info for
13157ec681f3Smrg   ffvp/ARB_vp
13167ec681f3Smrg-  spirv: Expand workaround for OpControlBarrier on old GLSLang
13177ec681f3Smrg-  st/mesa: Treat vertex inputs absent in inputMapping as zero in
13187ec681f3Smrg   mesa_to_tgsi
13197ec681f3Smrg-  iris/bufmgr: Check if iris_bo_gem_mmap failed
13207ec681f3Smrg-  i965: Fix out-of-bounds access to brw_stage_state::surf_offset
13217ec681f3Smrg-  anv: Translate relative timeout to absolute when calling
13227ec681f3Smrg   anv_timelines_wait
13237ec681f3Smrg-  anv: Fix deadlock in anv_timelines_wait
13247ec681f3Smrg-  meson: Disable GCC's dead store elimination for memory zeroing custom
13257ec681f3Smrg   new
13267ec681f3Smrg-  mesa: Fix double-lock of Shared->FrameBuffers and usage of wrong
13277ec681f3Smrg   mutex
13287ec681f3Smrg-  intel/fs: Work around dual-source blending hangs in combination with
13297ec681f3Smrg   SIMD16
13307ec681f3Smrg
13317ec681f3SmrgDave Airlie (69):
13327ec681f3Smrg
13337ec681f3Smrg-  llvmpipe/query: add support for indexed queries
13347ec681f3Smrg-  gallivm/swr: add stream_id to geom epilogue emit
13357ec681f3Smrg-  gallivm/nir: add support for multiple vertex streams
13367ec681f3Smrg-  draw: change geom shader output to an array of outputs.
13377ec681f3Smrg-  draw/gs: track emitted prims + verts per stream.
13387ec681f3Smrg-  draw: emit multiple streams to streamout.
13397ec681f3Smrg-  draw: don't emit vertex to streams with no outputs
13407ec681f3Smrg-  llvmpipe: advertise 4 vertex streams
13417ec681f3Smrg-  gallivm/s390: fix pass init order on s390 with llvm 8 (v2)
13427ec681f3Smrg-  ci: bump debian image and change llvm deps to 8
13437ec681f3Smrg-  dri: add another get shm variant.
13447ec681f3Smrg-  glx/drisw: add getImageShm2 path
13457ec681f3Smrg-  glx/drisw: return false if shmid == -1
13467ec681f3Smrg-  glx/drisw: fix shm put image fallback
13477ec681f3Smrg-  gallivm/tgsi: fix stream id regression
13487ec681f3Smrg-  gallivm/nir: fix integer divide SIGFPE
13497ec681f3Smrg-  gallivm/nir: handle mod 0 better.
13507ec681f3Smrg-  gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.
13517ec681f3Smrg-  gallivm/nir: split out 64-bit splitting code
13527ec681f3Smrg-  gallivm/nir: add support for tess system values
13537ec681f3Smrg-  gallivm/nir: align store_var param order with load_var
13547ec681f3Smrg-  gallivm/tgsi/swr: add mask vec to the tcs store
13557ec681f3Smrg-  gallivm/nir: add tessellation i/o support.
13567ec681f3Smrg-  draw: add JIT context/functions for tess stages.
13577ec681f3Smrg-  draw: add main tessellation code
13587ec681f3Smrg-  draw: hook up final bits of tessellation
13597ec681f3Smrg-  gallium/nir/tgsi: only scan fragment shader inputs for usage_mask
13607ec681f3Smrg-  llvmpipe: add support for tessellation shaders
13617ec681f3Smrg-  gallivm/tessellator: use private functions for min/max to avoid
13627ec681f3Smrg   namespace issues
13637ec681f3Smrg-  gallium: fix build with latest meson and gcc10
13647ec681f3Smrg-  gallivm/s3tc: split out dxt5 alpha code
13657ec681f3Smrg-  gallivm: add support for rgtc/latc fetches.
13667ec681f3Smrg-  gallium/llvmpipe: add an optimised 32-bit memset
13677ec681f3Smrg-  gallivm/rgtc: fix the truncation to 8-bit
13687ec681f3Smrg-  gallivm/rgtc: enable fast path for snorm types.
13697ec681f3Smrg-  Revert "gallivm: disable rgtc/latc SNORM accellerated fetches"
13707ec681f3Smrg-  llvmpipe: fixup context leaks.
13717ec681f3Smrg-  draw: collect tessellation invocations statistics
13727ec681f3Smrg-  llvmpipe: report tessellation shader statistics.
13737ec681f3Smrg-  llvmpipe/query: fix transform feedback overflow any queries.
13747ec681f3Smrg-  gallivm: fix left over shader vote debug
13757ec681f3Smrg-  gallivm/nir: lower implicit lod to tex.
13767ec681f3Smrg-  gallivm/draw: calloc prim id toavoid undef
13777ec681f3Smrg-  llvmpipe: fix no tokens detections.
13787ec681f3Smrg-  draw: fix tessellation stats query
13797ec681f3Smrg-  llvmpipe/setup: move line stats collection earlier.
13807ec681f3Smrg-  draw/cull: run pipeline for culled points.
13817ec681f3Smrg-  draw: fix user culling pipeline order. (v2)
13827ec681f3Smrg-  u_blitter: fix stencil blitting
13837ec681f3Smrg-  draw: free the NIR IR.
13847ec681f3Smrg-  draw/tess: free the NIR
13857ec681f3Smrg-  llvmpipe/nir: free the nir shader
13867ec681f3Smrg-  nir/linking: fix issue with two compact variables in a row. (v2)
13877ec681f3Smrg-  gallivm/nir: fix image store conversions
13887ec681f3Smrg-  gallivm/nir: add helper invocation support
13897ec681f3Smrg-  util/indirect: handle stride less than number of parameters.
13907ec681f3Smrg-  llvmpipe: bump max images to 16
13917ec681f3Smrg-  llvmpipe: fix ssbo alignment
13927ec681f3Smrg-  draw/tess: fix TES patch vertices in.
13937ec681f3Smrg-  llvmpipe: fix d32 unorm depth conversions.
13947ec681f3Smrg-  llvmpipe/setup: add point size clamping
13957ec681f3Smrg-  llvmpipe: enable stencil only formats. (v2)
13967ec681f3Smrg-  llvmpipe: clamp color storage for integer types.
13977ec681f3Smrg-  gallivm: fix stencil border
13987ec681f3Smrg-  vulkan: add initial device selection layer. (v6.1)
13997ec681f3Smrg-  ci: add llvmpipe paths to virgl rules
14007ec681f3Smrg-  draw/tess: free tessellation control shader i/o memory.
14017ec681f3Smrg-  llvmpipo/nir: free compute shader NIR
14027ec681f3Smrg-  llvmpipe: compute shaders work better with all the threads.
14037ec681f3Smrg
14047ec681f3SmrgDavid Stevens (1):
14057ec681f3Smrg
14067ec681f3Smrg-  egl/android: set window usage flags
14077ec681f3Smrg
14087ec681f3SmrgDenys (1):
14097ec681f3Smrg
14107ec681f3Smrg-  gitlab: add bug report template
14117ec681f3Smrg
14127ec681f3SmrgDominik Behr (1):
14137ec681f3Smrg
14147ec681f3Smrg-  meson: fix debug build on Android
14157ec681f3Smrg
14167ec681f3SmrgDrew Davenport (1):
14177ec681f3Smrg
14187ec681f3Smrg-  radv: Filter extensions not whitelisted for Android
14197ec681f3Smrg
14207ec681f3SmrgDuncan Hopkins (2):
14217ec681f3Smrg
14227ec681f3Smrg-  zink. Added storage CISto descriptor pool. Added storage in
14237ec681f3Smrg   descriptor pool for combined image samplers as well as uniform
14247ec681f3Smrg   buffers. Stops some shaders from running through a pools storage
14257ec681f3Smrg   faster than zinks internal tracking.
14267ec681f3Smrg-  zink: zero out zink_render_pass_state
14277ec681f3Smrg
14287ec681f3SmrgDylan Baker (48):
14297ec681f3Smrg
14307ec681f3Smrg-  docs/release-calendar: 20.0.0-rc1 has been released
14317ec681f3Smrg-  docs: Mark 20.0-rc2 as done
14327ec681f3Smrg-  docs: Add release notes for 19.3.4
14337ec681f3Smrg-  docs: Add SHA256 sum for 19.3.4
14347ec681f3Smrg-  docs: Mark 19.3.4 as done
14357ec681f3Smrg-  docs: Mark 20.0.0-rc3 as done
14367ec681f3Smrg-  Docs: Add 20.0.0 release notes
14377ec681f3Smrg-  docs: Update index, relnotes, and release-calendar for 20.0
14387ec681f3Smrg-  docs: Update stable process around using fixes: and gitlab
14397ec681f3Smrg-  docs/submittingpatches: Fix confusing typo + missing pronoun
14407ec681f3Smrg-  docs: Update release notes with current process
14417ec681f3Smrg-  bin/post_version.py: Update the release calendar as well
14427ec681f3Smrg-  bin/post_version.py: Pretty print the html
14437ec681f3Smrg-  bin/post_version.py: Make the git commit as well.
14447ec681f3Smrg-  docs: update releasing to cover updated post_version.py
14457ec681f3Smrg-  docs: add relnotes for 20.0.1
14467ec681f3Smrg-  docs: Add sha256sums for 20.0.1
14477ec681f3Smrg-  docs: update news, calendar, and link release notes for 20.0.1
14487ec681f3Smrg-  Docs: Add release notes for 20.0.2
14497ec681f3Smrg-  docs/relnotes: Add sha256 sums for 20.0.2
14507ec681f3Smrg-  docs: update calendar, add news item, and link releases notes for
14517ec681f3Smrg   20.0.2
14527ec681f3Smrg-  docs/release-calendar: Add calendar for 20.1 Release candidates
14537ec681f3Smrg-  bin/gen_release_notes.py: Fix version detection for .0 release
14547ec681f3Smrg-  bin/pick-ui: Add a new maintainer script for picking patches
14557ec681f3Smrg-  replace \_mesa_is_pow_two with util_is_power_of_two\_\*
14567ec681f3Smrg-  replace \_mesa_next_pow_two\_\* with util_next_power_of_two\_\*
14577ec681f3Smrg-  replace \_mesa_logbase2 with util_logbase2
14587ec681f3Smrg-  replace LOG2 with util_fast_log2
14597ec681f3Smrg-  u_math: add x86 optimized version of ifloor
14607ec681f3Smrg-  replace IFLOOR with util_ifloor
14617ec681f3Smrg-  Replace IROUND_POS with \_mesa_roundevenf
14627ec681f3Smrg-  mesa/main: remove unused IROUNDD
14637ec681f3Smrg-  replace IROUND with util functions
14647ec681f3Smrg-  move windows strtok_r define to u_string
14657ec681f3Smrg-  Replace IS_INF_OR_NAN with util_is_inf_or_nan
14667ec681f3Smrg-  replace malloc macros in imports.h with u_memory.h versions
14677ec681f3Smrg-  util: Add an aligned realloc function
14687ec681f3Smrg-  replace imports memory functions with utils memory functions
14697ec681f3Smrg-  mesa|mapi: replace \_mesa_[v]snprintf with [v]snprintf
14707ec681f3Smrg-  mesa: move ADD_POINTERS to macros.h
14717ec681f3Smrg-  dri/nouveau: replace assert with unreachable
14727ec681f3Smrg-  remove final imports.h and imports.c bits
14737ec681f3Smrg-  meson: update llvm dependency logic for meson 0.54.0
14747ec681f3Smrg-  docs: Add relnotes for 20.0.5
14757ec681f3Smrg-  docs: Add sha256 sums for 20.0.5
14767ec681f3Smrg-  docs: update calendar, add news item, and link releases notes for
14777ec681f3Smrg   20.0.5
14787ec681f3Smrg-  mesa: Follow OpenGL conversion rules for values that exceed storage
14797ec681f3Smrg   size
14807ec681f3Smrg-  tests: Make tests aware of meson test wrapper
14817ec681f3Smrg
14827ec681f3SmrgEdmondo Tommasina (1):
14837ec681f3Smrg
14847ec681f3Smrg-  radv/sqtt: fix RADV_THREAD_TRACE_BUFFER_SIZE spelling
14857ec681f3Smrg
14867ec681f3SmrgEduardo Lima Mitev (3):
14877ec681f3Smrg
14887ec681f3Smrg-  turnip/pipeline: Don't assume tu_shader is a valid object
14897ec681f3Smrg-  turnip: Instance can be NULL resolving 'GetInstanceProcAddr' entry
14907ec681f3Smrg   point
14917ec681f3Smrg-  anv/radv: Resolving 'GetInstanceProcAddr' should not require a valid
14927ec681f3Smrg   instance
14937ec681f3Smrg
14947ec681f3SmrgEli Schwartz (1):
14957ec681f3Smrg
14967ec681f3Smrg-  docs: fix typo in v20 release notes
14977ec681f3Smrg
14987ec681f3SmrgElie Tournier (3):
14997ec681f3Smrg
15007ec681f3Smrg-  spirv2nir: print nir shader if translation succed
15017ec681f3Smrg-  spirv2nir: Add kernel spirv support
15027ec681f3Smrg-  docs/features: Update virgl OpenGL 4.5 features GL_ARB_clip_control
15037ec681f3Smrg   and GL_KHR_robustness are now expose in the guest.
15047ec681f3Smrg
15057ec681f3SmrgEmil Velikov (11):
15067ec681f3Smrg
15077ec681f3Smrg-  meson: glx: drop with_glx == dri check
15087ec681f3Smrg-  glx: set the loader_logger early and for everyone
15097ec681f3Smrg-  egl/drm: reinstate (kms\_)swrast support
15107ec681f3Smrg-  Revert "egl/dri2: Don't dlclose() the driver on
15117ec681f3Smrg   dri2_load_driver_common failure"
15127ec681f3Smrg-  loader: use a maximum of 64 drmDevices
15137ec681f3Smrg-  loader: simplify loader_get_user_preferred_fd()
15147ec681f3Smrg-  loader: simplify codeflow in drm_get_pci_id_for_fd
15157ec681f3Smrg-  loader: move "using driver..." message to
15167ec681f3Smrg   loader_get_kernel_driver_name
15177ec681f3Smrg-  loader: fallback to kernel name, if PCI fails
15187ec681f3Smrg-  glx: omit loader_loader() for macOS
15197ec681f3Smrg-  egl: simplify client/platform extension handling
15207ec681f3Smrg
15217ec681f3SmrgEmmanuel Gil Peyrot (1):
15227ec681f3Smrg
15237ec681f3Smrg-  Expose EGL_KHR_platform\_\* when EXT is supported
15247ec681f3Smrg
15257ec681f3SmrgEric Anholt (144):
15267ec681f3Smrg
15277ec681f3Smrg-  gallium/osmesa: Fix a typo in the unit test's test names.
15287ec681f3Smrg-  gallium/osmesa: Fix MakeCurrent of non-8888 contexts.
15297ec681f3Smrg-  gallium/osmesa: Fill out other format tests.
15307ec681f3Smrg-  gallium/osmesa: Try to fix the test for big-endian.
15317ec681f3Smrg-  util: Make helper functions for pack/unpacking pixel rows.
15327ec681f3Smrg-  mesa/st: Use direct util_format_pack/unpack instead of u_tile.
15337ec681f3Smrg-  gallium/util: Remove pipe_get_tile_z/put_tile_z.
15347ec681f3Smrg-  softpipe: Drop the raw_to\* part of the tile cache interface.
15357ec681f3Smrg-  softpipe: Refactor pipe_get/put_tile_rgba\_\* paths.
15367ec681f3Smrg-  gallium: Add and use a helper for packing uc from a color_union.
15377ec681f3Smrg-  gallium: Refactor some single-pixel util_format_read/writes.
15387ec681f3Smrg-  util: Drop unpacking from int signed to unsigned and vice versa.
15397ec681f3Smrg-  freedreno: Move the layout debug under FD_MESA_DEBUG=layout.
15407ec681f3Smrg-  freedreno: Include the layer size in layout debug.
15417ec681f3Smrg-  freedreno: Rename the UBWC layer size field and store it as bytes.
15427ec681f3Smrg-  freedreno/a6xx: Disable the core layer-size setup.
15437ec681f3Smrg-  freedreno: Swap the whole resource layout in shadowing.
15447ec681f3Smrg-  freedreno: Blit all array levels when uncompressing UBWC.
15457ec681f3Smrg-  freedreno: Disable UBWC on Z24S8 if not TEXTURE_2D.
15467ec681f3Smrg-  freedreno: Allow UBWC on textures with multiple mipmap levels.
15477ec681f3Smrg-  mesa: Clean up some endianness adapters for shader image formats.
15487ec681f3Smrg-  intel/isl: Move iris's pipe-to-isl format function to isl.
15497ec681f3Smrg-  glsl,nir: Switch the enum representing shader image formats to
15507ec681f3Smrg   PIPE_FORMAT.
15517ec681f3Smrg-  mesa/st: Move the SYSTEM_VALUE -> TGSI_SEMANTIC map to
15527ec681f3Smrg   tgsi_from_mesa.
15537ec681f3Smrg-  nouveau: Reuse tgsi_get_sysval_semantic().
15547ec681f3Smrg-  nouveau: reuse tgsi_get_gl_frag_result_semantic().
15557ec681f3Smrg-  nouveau: Reuse tgsi_get_gl_varying_semantic().
15567ec681f3Smrg-  u_tile: Skip the packed temporary and just store tiles directly.
15577ec681f3Smrg-  ci: Disable a bunch of tests on freedreno a630.
15587ec681f3Smrg-  ci: Bump the GLES CTS version to 3.2.6.1.
15597ec681f3Smrg-  Revert "gallium: Fix big-endian addressing of non-bitmask array
15607ec681f3Smrg   formats."
15617ec681f3Smrg-  ci: Extend the a630 flake list to reduce spurious failures.
15627ec681f3Smrg-  radv: Squelch possibly-undefined warning
15637ec681f3Smrg-  llvmpipe: Fix real uninitialized use of "atype" for SEMANTIC_FACE
15647ec681f3Smrg-  llvmpipe: Silence "possibly uninitialized value" warning for
15657ec681f3Smrg   ssbo_limit.
15667ec681f3Smrg-  llvmpipe: Silence uninitialized variable warning about "chan"
15677ec681f3Smrg-  llvmpipe: Fix warning about uninitialized "op" in the NIR path.
15687ec681f3Smrg-  llvmpipe: Silence uninitialized variable warning about "vals"
15697ec681f3Smrg-  llvmpipe: Silence uninitialized variable warning about "scissor"
15707ec681f3Smrg-  llvmpipe: Fix another uninitialized value warning, on init_val.
15717ec681f3Smrg-  gallium: Only define PIPE_ALIGNSTACK on x86.
15727ec681f3Smrg-  ci: prepare-artifacts: Make the indent here match previously in the
15737ec681f3Smrg   file
15747ec681f3Smrg-  ci: Make sure that we have a proper shell prompt for LAVA.
15757ec681f3Smrg-  ci: Make LAVA job fails emit the full list of unexpected test
15767ec681f3Smrg   results.
15777ec681f3Smrg-  ci: Document how LAVA runners work.
15787ec681f3Smrg-  ci: Don't bother generating deqp junit results since we don't present
15797ec681f3Smrg   it.
15807ec681f3Smrg-  ci: Remove a useless filtering of the lava logs.
15817ec681f3Smrg-  nir: Rename gl_nir_lower_bindless_images.c in preparation for
15827ec681f3Smrg   extending it.
15837ec681f3Smrg-  nir: Make image lowering optionally handle the !bindless case as
15847ec681f3Smrg   well.
15857ec681f3Smrg-  gallium: Add a cap for enabling lowering of image load/store
15867ec681f3Smrg   intrinsics.
15877ec681f3Smrg-  v3d: Ask the state tracker to lower image accesses off of derefs.
15887ec681f3Smrg-  glsl: Factor out the sampler dim coordinate components switch
15897ec681f3Smrg   statement.
15907ec681f3Smrg-  spirv_to_nir: Reuse glsl_sampler_dim_coordinate_components().
15917ec681f3Smrg-  freedreno/ir3: Reuse glsl_get_sampler_dim_coordinate_components() in
15927ec681f3Smrg   tex_info.
15937ec681f3Smrg-  tgsi_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().
15947ec681f3Smrg-  prog_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().
15957ec681f3Smrg-  freedreno/ir3: Fix the arg to
15967ec681f3Smrg   ir3_get_num_components_for_image_format()
15977ec681f3Smrg-  nir: Move intel's intrinsic_image_coordinate_components() to core
15987ec681f3Smrg   nir.
15997ec681f3Smrg-  freedreno: Switch to using lowered image intrinsics.
16007ec681f3Smrg-  ci: Blacklist another freedreno flaky test.
16017ec681f3Smrg-  meson: Disable bison's -Wdeprecated since we still support old bison.
16027ec681f3Smrg-  turnip: Fix compiler warning about casting a nondispatchable handle.
16037ec681f3Smrg-  freedreno/computerator: Fix defined-but-not-used warnings from
16047ec681f3Smrg   lex/yacc.
16057ec681f3Smrg-  ci: Remove LLVM from ARM test drivers.
16067ec681f3Smrg-  ci: Stop disabling ACPI in the LAVA arm64 kernel build.
16077ec681f3Smrg-  ci: Shrink the arm64 kernel build a bit.
16087ec681f3Smrg-  ci: Include db410c support in the ARM container.
16097ec681f3Smrg-  aco: Fix signed-vs-unsigned warning.
16107ec681f3Smrg-  ci: Enable -Werror on meson-vulkan and meson-testing.
16117ec681f3Smrg-  ci: Switch testing on db410c over to LAVA.
16127ec681f3Smrg-  ci: Add a disabled-by-default job for GLES3 testing on db410c.
16137ec681f3Smrg-  ci: Flip db410c back to docker mode.
16147ec681f3Smrg-  ci: Print the renderer/version that our dEQP invocation is using.
16157ec681f3Smrg-  ci: Fix installation of firmware for db410c's nic.
16167ec681f3Smrg-  ci: Make a simple little bare-metal fastboot mode for db410c.
16177ec681f3Smrg-  glsl/tests: Catch mkdir errors to help explain when they happen.
16187ec681f3Smrg-  glsl/tests: Fix waiting for disk_cache_put() to finish.
16197ec681f3Smrg-  ci: Update the ci-templates commit.
16207ec681f3Smrg-  ci: Enable ccache in the container builds.
16217ec681f3Smrg-  ci: Enable ccaching of CMake builds as well.
16227ec681f3Smrg-  ci: Enable testing GLES2-3 on a530 (Dragonboard 820c).
16237ec681f3Smrg-  freedreno/a5xx: Fix min-vs-mag filtering decisions on non-mipmap tex.
16247ec681f3Smrg-  gallium/util: Switch util_float_to_half to \_mesa_float_to_half()'s
16257ec681f3Smrg   impl.
16267ec681f3Smrg-  ci: Ban the recent popular freedreno a630 flakes.
16277ec681f3Smrg-  ci: Disable tests that showed intermittent fails on a530 in day 1.
16287ec681f3Smrg-  ci: Only run the freedreno baremetal tests when freedreno/core
16297ec681f3Smrg   changes.
16307ec681f3Smrg-  freedreno: Switch to exposing only half-integer pixel centers.
16317ec681f3Smrg-  ci: Move db820c and db410c's gles3 tests to manual, like radv did.
16327ec681f3Smrg-  glsl: Restore the IsES flag on the shader when reading from cache.
16337ec681f3Smrg-  ci: Ban the recent popular freedreno a630 intermittent failure.
16347ec681f3Smrg-  freedreno: Remove always-true return from per-gen begin_query.
16357ec681f3Smrg-  freedreno: Remove the "active" member of queries.
16367ec681f3Smrg-  freedreno: Fix acc query handling in the presence of batch
16377ec681f3Smrg   reordering.
16387ec681f3Smrg-  freedreno: Associate the acc query bo with the batch.
16397ec681f3Smrg-  freedreno: Count blits in GL_TIME_ELAPSED and perf counter queries.
16407ec681f3Smrg-  freedreno/a6xx: Fix timestamp queries.
16417ec681f3Smrg-  freedreno: Rename "is_blit" to "is_discard_blit"
16427ec681f3Smrg-  freedreno: Fix detection of being in a blit for acc queries.
16437ec681f3Smrg-  freedreno: Work around UBWC flakiness.
16447ec681f3Smrg-  freedreno: Drop an unnecessary include marked "this should go away"
16457ec681f3Smrg-  freedreno/turnip: Use the NIR info to decide if we need helper
16467ec681f3Smrg   invocations.
16477ec681f3Smrg-  loader: Warn when we fail to open a device node due to permissions.
16487ec681f3Smrg-  ci: Consistently use -j4 across x86 build jobs and -j8 on ARM.
16497ec681f3Smrg-  freedreno/a6xx: Sink the per-level size temps inside the loop.
16507ec681f3Smrg-  freedreno/a6xx: Remove the "aligned_height" temporary.
16517ec681f3Smrg-  freedreno/a6xx: Drop the "alignment" layout temporary.
16527ec681f3Smrg-  freedreno: Add the outline of a test for a6xx texture layout.
16537ec681f3Smrg-  freedreno/a6xx: Set a level's pitch based on minified level0 pitch,
16547ec681f3Smrg   not width0.
16557ec681f3Smrg-  freedreno: Fix leak of binning shader variants.
16567ec681f3Smrg-  freedreno/ir3: Stop doing b2n on the SEL condition.
16577ec681f3Smrg-  freedreno/ir3: CSE the up/downconversion of SEL's cond's size.
16587ec681f3Smrg-  freedreno/a5xx+: Skip compiling the old gmem blit programs.
16597ec681f3Smrg-  freedreno/drm-shim: Add support for faking other adreno chips.
16607ec681f3Smrg-  freedreno/ir3: Drop handling FRAG_RESULT_DEPTH writing to .z
16617ec681f3Smrg-  freedreno: Introduce a "cpp_shift" value for cpp divs/muls.
16627ec681f3Smrg-  freedreno: Make the slice pitch be bytes, not pixels.
16637ec681f3Smrg-  drm-shim: Let the driver choose to overwrite the first render node.
16647ec681f3Smrg-  nir/lower_two_sided_color: Fix picking of new driver location.
16657ec681f3Smrg-  nir/lower_clip: Fix picking of unused driver locations.
16667ec681f3Smrg-  gallium: Fix setup of pstipple frag coord var.
16677ec681f3Smrg-  freedreno/ir3: Fix driver_location of the added vertex_flags varying.
16687ec681f3Smrg-  freedreno/ir3: Fix sizing of the inputs/outputs array.
16697ec681f3Smrg-  vc4: Use NIR shader's num_outputs for generating our new output.
16707ec681f3Smrg-  ci: Drop redundant freedreno stage specification.
16717ec681f3Smrg-  ci: Enable GLES3 testing on db410c/db820c (freedreno a306 and a530).
16727ec681f3Smrg-  freedreno: Fix derivatives without texturing on a3xx-a5xx.
16737ec681f3Smrg-  ci: Enable GLES 3.1 testing on db820c (a530).
16747ec681f3Smrg-  freedreno/ir3: Fix the disasm of half-float STG dests.
16757ec681f3Smrg-  freedreno/ir3: Print a space after nop counts, like qcom's disasm.
16767ec681f3Smrg-  freedreno/ir3: Add a unit test for our disassembler.
16777ec681f3Smrg-  freedreno/ir3: Convert remaining disasm src prints to reginfo.
16787ec681f3Smrg-  freedreno/ir3: Refactor out print_reg_src().
16797ec681f3Smrg-  freedreno/ir3: Add support for disasm of cat2 float32 immediates.
16807ec681f3Smrg-  ci: Enable --compact-display false on all dEQP runs.
16817ec681f3Smrg-  ci: Add sanity checking that dEQP gets the expected GL_RENDERER.
16827ec681f3Smrg-  freedreno: Fix calculation of the const buffer cmdstream size.
16837ec681f3Smrg-  ci: Allow namespacing of dEQP run results files.
16847ec681f3Smrg-  ci: Clean up some excessive use of pipes in dEQP results processing.
16857ec681f3Smrg-  ci/freedreno: Add a test run of a few driver options.
16867ec681f3Smrg-  util/ra: Sanity check that the driver selected a valid reg.
16877ec681f3Smrg-  util/ra: Sanity check that we're adding a valid reg to a class.
16887ec681f3Smrg-  util/ra: Use util_dynarray for the adjacency list.
16897ec681f3Smrg-  util/ra: Use util_dynarray for handling the conflict lists.
16907ec681f3Smrg-  util/ra: Improve ra_set_finalize() performance.
16917ec681f3Smrg
16927ec681f3SmrgEric Engestrom (58):
16937ec681f3Smrg
16947ec681f3Smrg-  VERSION: bump after 20.0 branch point
16957ec681f3Smrg-  egl: put full path to libEGL_mesa.so in GLVND json
16967ec681f3Smrg-  gitlab-ci: disable a630 tests as mesa-cheza is down
16977ec681f3Smrg-  util/os_socket: fix header unavailable on windows
16987ec681f3Smrg-  freedreno/perfcntrs: fix fd leak
16997ec681f3Smrg-  dri: delete gen-symbol-redefs.py
17007ec681f3Smrg-  util/disk_cache: check for write() failure in the zstd path
17017ec681f3Smrg-  meson: don't bother trying \`python2\`
17027ec681f3Smrg-  Revert "egl: put full path to libEGL_mesa.so in GLVND json"
17037ec681f3Smrg-  egl: directly access static members instead of using
17047ec681f3Smrg   \_egl{Get,Set}ConfigKey()
17057ec681f3Smrg-  meson: explicitly disallow unsupported build directory layout
17067ec681f3Smrg-  docs: fix typos in the release docs
17077ec681f3Smrg-  bin/gen_release_notes.py: fix commit list command
17087ec681f3Smrg-  gen_release_notes: fix vulkan version reported
17097ec681f3Smrg-  docs/relnotes/19.3: fix vulkan version reported
17107ec681f3Smrg-  docs/relnotes/20.0: fix vulkan version reported
17117ec681f3Smrg-  Revert "docs/relnotes/19.3: fix vulkan version reported"
17127ec681f3Smrg-  docs: trivial fix for html structure
17137ec681f3Smrg-  docs/releasing: add missing </li> tags
17147ec681f3Smrg-  docs: add release notes for 19.3.5
17157ec681f3Smrg-  docs: update calendar, add news item, and link releases notes for
17167ec681f3Smrg   19.3.5
17177ec681f3Smrg-  vulkan/wsi: fix cleanup when dup() fails
17187ec681f3Smrg-  gen_release_notes: fix version in "you should wait" message
17197ec681f3Smrg-  gen_release_notes: resolve ambiguity by renaming \`version\` to
17207ec681f3Smrg   \`previous_version\` and \`next_version\` to \`this_version\`
17217ec681f3Smrg-  meson: use existing variables in inc_common
17227ec681f3Smrg-  meson: inline \`inc_common\`
17237ec681f3Smrg-  vulkan: drop unused include directories
17247ec681f3Smrg-  intel: drop unused include directories
17257ec681f3Smrg-  scons: prune unused Makefile.sources
17267ec681f3Smrg-  docs: add release notes for 20.0.3
17277ec681f3Smrg-  docs/relnotes: add sha256sum for 20.0.3
17287ec681f3Smrg-  docs: update calendar, add news item, and link releases notes for
17297ec681f3Smrg   20.0.3
17307ec681f3Smrg-  docs: add release notes for 20.0.4
17317ec681f3Smrg-  docs/relnotes: add sha256sum for 20.0.4
17327ec681f3Smrg-  docs: update calendar, add news item, and link releases notes for
17337ec681f3Smrg   20.0.4
17347ec681f3Smrg-  glx: fix 630 times -Wlto-type-mismatch when building with LTO enabled
17357ec681f3Smrg-  glx: use anonymous namespace to avoid -Wodr issues when building with
17367ec681f3Smrg   LTO enabled
17377ec681f3Smrg-  pick-ui: auto-scroll the feedback window
17387ec681f3Smrg-  pick-ui: compute .pick_status.json path only once
17397ec681f3Smrg-  pick-ui: make .pick_status.json path relative to the git root instead
17407ec681f3Smrg   of the script
17417ec681f3Smrg-  pick-ui: show commit sha in the pick list
17427ec681f3Smrg-  VERSION: bump to 20.1.0-rc1
17437ec681f3Smrg-  .pick_status.json: Update to af55bdd05d94eda59ee1c9331a50045000da5db5
17447ec681f3Smrg-  .pick_status.json: Update to 57796946985de60204189426ca8eb7bbfa97c396
17457ec681f3Smrg-  .pick_status.json: Mark 3fac55ce0d066d767d6c6c8308f79d0c3e566ec0 as
17467ec681f3Smrg   denominated
17477ec681f3Smrg-  .pick_status.json: Update to 29da52128090a1ef8ef782188c0f67c7f5ec8d19
17487ec681f3Smrg-  VERSION: bump to 20.1.0-rc2
17497ec681f3Smrg-  .pick_status.json: Update to 772b15ad3227e08bb4e18932ac9ecf4c29271160
17507ec681f3Smrg-  .pick_status.json: Update to 56f955e4850035d915a2a87e2ebea7fa66ab5e19
17517ec681f3Smrg-  .pick_status.json: Update to c1c0cf7a66905e8d7ad506842a41b0ad0c5b10da
17527ec681f3Smrg-  VERSION: bump to 20.1.0-rc3
17537ec681f3Smrg-  .pick_status.json: Update to 5a6beb6a24aa084adfd6c57edd0a64f0a044611a
17547ec681f3Smrg-  post_version.py: fix branch name construction for release candidates
17557ec681f3Smrg-  post_version.py: invert \`is_point\` into \`is_first_release\` to
17567ec681f3Smrg   make its purpose clearer
17577ec681f3Smrg-  post_version.py: stop adding release candidates to the index and
17587ec681f3Smrg   relnotes
17597ec681f3Smrg-  VERSION: bump to 20.1.0-rc4
17607ec681f3Smrg-  .pick_status.json: Update to a91306677c613ba7511b764b3decc9db42b24de1
17617ec681f3Smrg-  tree-wide: fix deprecated GitLab URLs
17627ec681f3Smrg
17637ec681f3SmrgErik Faye-Lund (154):
17647ec681f3Smrg
17657ec681f3Smrg-  zink: enable texture-buffer objects
17667ec681f3Smrg-  zink: implement load_instance_id
17677ec681f3Smrg-  zink: implement support for derivative-control
17687ec681f3Smrg-  zink: be more careful about the mask-check
17697ec681f3Smrg-  zink: disallow depth-stencil blits with format-change
17707ec681f3Smrg-  st/mesa: use uint-result for sampling stencil buffers
17717ec681f3Smrg-  zink: lower away fdph
17727ec681f3Smrg-  zink: fixup sampler-usage
17737ec681f3Smrg-  zink: replace unset buffer with a dummy-buffer
17747ec681f3Smrg-  zink: emit blend-target index
17757ec681f3Smrg-  zink: only inspect dual-src limit if feature enabled
17767ec681f3Smrg-  Revert "nir: Add a couple trivial abs optimizations"
17777ec681f3Smrg-  zink: do not use SpvDimRect
17787ec681f3Smrg-  zink: fix binding-usage
17797ec681f3Smrg-  zink: do not report texture-samplers for unsupported stages
17807ec681f3Smrg-  zink/spirv: do not reinvent store_dest
17817ec681f3Smrg-  zink/spirv: prefer store_dest over store_dest_uint
17827ec681f3Smrg-  zink/spirv: rename functions a bit
17837ec681f3Smrg-  zink/spirv: unit_value -> raw_value
17847ec681f3Smrg-  zink/spirv: uint -> raw
17857ec681f3Smrg-  zink: do not convert bools to/from uint
17867ec681f3Smrg-  util: promote u_debug_memory.c to src/util
17877ec681f3Smrg-  util: move debug_memory_{begin,end} to os_memory_debug.h
17887ec681f3Smrg-  gallium/util: do not use debug_print_format
17897ec681f3Smrg-  gallium/util: remove unused debug_print_foo helpers
17907ec681f3Smrg-  zink/spirv: do not use bitwise operations on booleans
17917ec681f3Smrg-  pipebuffer: clean up cast-warnings
17927ec681f3Smrg-  rbug: clean up cast-warnings
17937ec681f3Smrg-  rbug: do not return void-value
17947ec681f3Smrg-  vtn/opencl: fully enable OpenCLstd_Clz
17957ec681f3Smrg-  compiler/nir: move build_exp helper into builtin-builder
17967ec681f3Smrg-  compiler/nir: move build_log helper into builtin-builder
17977ec681f3Smrg-  vtn/opencl: add native exp/log-support
17987ec681f3Smrg-  vtn/opencl: add native exp10/log10-support
17997ec681f3Smrg-  vtn/opencl: add native exp2/log2-support
18007ec681f3Smrg-  nv50: remove unused variable
18017ec681f3Smrg-  meson: disable some more warnings on msvc
18027ec681f3Smrg-  mesa/main: correct extension-checks for GL_BLACKHOLE_RENDER_INTEL
18037ec681f3Smrg-  mesa/main: clean-up extension-checks for point-sprites
18047ec681f3Smrg-  mesa/main: clean up extension-check for GL_VERTEX_PROGRAM
18057ec681f3Smrg-  mesa/main: clean up extension-check for GL_VERTEX_PROGRAM_TWO_SIDE
18067ec681f3Smrg-  mesa/main: clean up extension-check for GL_VERTEX_PROGRAM_POINT_SIZE
18077ec681f3Smrg-  mesa/main: clean up extension-check for GL_TEXTURE_RECTANGLE
18087ec681f3Smrg-  mesa/main: clean up extension-check for GL_STENCIL_TEST_TWO_SIDE
18097ec681f3Smrg-  mesa/main: clean up extension-check for GL_DEPTH_BOUNDS_TEST
18107ec681f3Smrg-  mesa/main: clean up extension-check for AMD_depth_clamp_separate
18117ec681f3Smrg-  mesa/main: clean up extension-check for GL_FRAGMENT_SHADER_ATI
18127ec681f3Smrg-  mesa/main: clean up extension-check for GL_TEXTURE_CUBE_MAP_SEAMLESS
18137ec681f3Smrg-  mesa/main: clean up extension-check for GL_RASTERIZER_DISCARD
18147ec681f3Smrg-  mesa/main: clean up extension-check for GL_TEXTURE_EXTERNAL
18157ec681f3Smrg-  mesa/main: remove unused macro
18167ec681f3Smrg-  wgl: drop pointless debug_printf
18177ec681f3Smrg-  wgl: drop unused member
18187ec681f3Smrg-  wgl: move screen-init to a helper
18197ec681f3Smrg-  wgl: do not create screen from DllMain
18207ec681f3Smrg-  st/dri: make sure software color-buffers are linear
18217ec681f3Smrg-  zink: be less picky about tiled resources
18227ec681f3Smrg-  .mailmap: add an alias for Alan Swanson
18237ec681f3Smrg-  .mailmap: add an alias for Alyssa Rosenzweig
18247ec681f3Smrg-  .mailmap: add an alias for Andrii Simiklit
18257ec681f3Smrg-  .mailmap: add an alias for Anuj Phogat
18267ec681f3Smrg-  .mailmap: add an alias for Axel Davy
18277ec681f3Smrg-  .mailmap: add an alias for Boris Brezillon
18287ec681f3Smrg-  .mailmap: add an alias for Bruce Cherniak
18297ec681f3Smrg-  .mailmap: update aliases for Carl-Philip Hänsch
18307ec681f3Smrg-  .mailmap: add an alias for Chad Versace
18317ec681f3Smrg-  .mailmap: add a couple of aliases for Chandu Babu Namburu
18327ec681f3Smrg-  .mailmap: add alias for Chenglei Ren
18337ec681f3Smrg-  .mailmap: add an alias for Christian Gmeiner
18347ec681f3Smrg-  .mailmap: add an alias for Christian Inci
18357ec681f3Smrg-  .mailmap: add a few aliases for Christoph Haag
18367ec681f3Smrg-  .mailmap: add an alias for Colin McDonald
18377ec681f3Smrg-  .mailmap: specify spelling for Constantine Kharlamov
18387ec681f3Smrg-  .mailmap: add an alias for Craig Stout
18397ec681f3Smrg-  .mailmap: add an alias for Daniel Schürmann
18407ec681f3Smrg-  .mailmap: add an alias for Danylo Piliaiev
18417ec681f3Smrg-  .mailmap: add an alias for Dave Airlie
18427ec681f3Smrg-  .mailmap: add an alias for Dylan Baker
18437ec681f3Smrg-  .mailmap: add a couple of aliases for Dylan Noblesmith
18447ec681f3Smrg-  .mailmap: add an alias for Emmanuel Gil Peyrot
18457ec681f3Smrg-  .mailmap: add an alias for Erik Faye-Lund
18467ec681f3Smrg-  .mailmap: specify spelling for Francesco Ansanelli
18477ec681f3Smrg-  .mailmap: specify spelling for Gurchetan Singh
18487ec681f3Smrg-  .mailmap: add an alias for Haihao Xiang
18497ec681f3Smrg-  .mailmap: add an alias for Harish Krupo
18507ec681f3Smrg-  .mailmap: specify spelling for Heinrich Fink
18517ec681f3Smrg-  .mailmap: specify spelling for Henri Verbeet
18527ec681f3Smrg-  .mailmap: add an alias for Igor Gnatenko
18537ec681f3Smrg-  .mailmap: add an alias for Illia Iorin
18547ec681f3Smrg-  .mailmap: specify spelling for James Zhu
18557ec681f3Smrg-  .mailmap: add an alias for Jan Beich
18567ec681f3Smrg-  .mailmap: clean up aliases for Jeremy Huddleston
18577ec681f3Smrg-  .mailmap: add an alias for Julien Isorce
18587ec681f3Smrg-  .mailmap: add a few aliases for Karol Herbst
18597ec681f3Smrg-  .mailmap: add a few aliases for Kevin Rogovin
18607ec681f3Smrg-  .mailmap: add a few aliases for Kristian Høgsberg
18617ec681f3Smrg-  .mailmap: add an alias for Lionel Landwerlin
18627ec681f3Smrg-  .mailmap: specify spelling for Liviu Prodea
18637ec681f3Smrg-  .mailmap: update aliases for Marc-André Lureau
18647ec681f3Smrg-  .mailmap: add alias for Matthias Groß
18657ec681f3Smrg-  .mailmap: add an alias for Neha Bhende
18667ec681f3Smrg-  .mailmap: add an alias for Neil Roberts
18677ec681f3Smrg-  .mailmap: specify spelling for Nian Wu
18687ec681f3Smrg-  .mailmap: add an alias for Nicholas Bishop
18697ec681f3Smrg-  .mailmap: update aliases for Nicolai Hähnle
18707ec681f3Smrg-  .mailmap: add an alias for Philipp Zabel
18717ec681f3Smrg-  .mailmap: update aliases for Pierre-Eric Pelloux-Prayer
18727ec681f3Smrg-  .mailmap: add an alias for Plamena Manolova
18737ec681f3Smrg-  .mailmap: add an alias for Qiang Yu
18747ec681f3Smrg-  .mailmap: specify spelling for Randy Xu
18757ec681f3Smrg-  .mailmap: add an alias for Renato Caldas
18767ec681f3Smrg-  .mailmap: add an alias for Rob Clark
18777ec681f3Smrg-  .mailmap: add an alias for Rodrigo Vivi
18787ec681f3Smrg-  .mailmap: add an alias for Samuel Li
18797ec681f3Smrg-  .mailmap: add an alias for Sergii Romantsov
18807ec681f3Smrg-  .mailmap: specify spelling for Sonny Jiang
18817ec681f3Smrg-  .mailmap: add a couple of aliases for Steinar H. Gunderson
18827ec681f3Smrg-  .mailmap: add a couple of aliases for Suresh Guttula
18837ec681f3Smrg-  .mailmap: add an alias for Thierry Reding
18847ec681f3Smrg-  .mailmap: add an alias for Timo Aaltonen
18857ec681f3Smrg-  .mailmap: add a couple of aliases for Timothy Arceri
18867ec681f3Smrg-  .mailmap: add an alias for Tim Wiederhake
18877ec681f3Smrg-  .mailmap: add an alias for Tom Stellard
18887ec681f3Smrg-  .mailmap: add an alias for Tomasz Figa
18897ec681f3Smrg-  .mailmap: add an alias for Topi Pohjolainen
18907ec681f3Smrg-  .mailmap: add an alias for Vadym Shovkoplias
18917ec681f3Smrg-  .mailmap: add an alias for Varad Gautam
18927ec681f3Smrg-  .mailmap: specify spelling for Vivek Kasireddy
18937ec681f3Smrg-  .mailmap: specify spelling for Wladimir J. van der Laan
18947ec681f3Smrg-  .mailmap: add an alias for Xavier Bouchoux
18957ec681f3Smrg-  .mailmap: add an alias for Yaakov Selkowitz
18967ec681f3Smrg-  .mailmap: add alias for Zhaowei Yuan
18977ec681f3Smrg-  .mailmap: add an alias for Zhongmin Wu
18987ec681f3Smrg-  meson: use override_options to change warning-level
18997ec681f3Smrg-  wgl: silence some cast-warnings
19007ec681f3Smrg-  util/tests: initialize variable
19017ec681f3Smrg-  mesa: fixup cast expression
19027ec681f3Smrg-  vbo: avoid including wingdi.h on win32
19037ec681f3Smrg-  meson: tell flex that we support c99
19047ec681f3Smrg-  gtest: Update to 1.10.0
19057ec681f3Smrg-  meson: do not disable incremental linking for debug-builds
19067ec681f3Smrg-  docs: remove outdated sentence
19077ec681f3Smrg-  mesa/gallium: do not use enum for bit-allocated member
19087ec681f3Smrg-  meson: correct windows-version define
19097ec681f3Smrg-  mesa/main: do not store unrecognized extensions in context
19107ec681f3Smrg-  mesa/main: do not pass context to one-time extension init
19117ec681f3Smrg-  mesa/main: do not init remap-table per api
19127ec681f3Smrg-  mesa/main: Do not pass context to one_time_init
19137ec681f3Smrg-  mesa/main: one_time_init() -> \_mesa_initialize()
19147ec681f3Smrg-  mesa/st: call \_mesa_initialize() early
19157ec681f3Smrg-  zink: lower b2b to b2i
19167ec681f3Smrg-  util/os_memory: never use os_memory_debug.h
19177ec681f3Smrg-  zink: implement i2b1
19187ec681f3Smrg-  zink: use general-layout when blitting to/from same resource
19197ec681f3Smrg
19207ec681f3SmrgFrancisco Jerez (57):
19217ec681f3Smrg
19227ec681f3Smrg-  intel/fs/cse: Make HALT instruction act as CSE barrier.
19237ec681f3Smrg-  intel/fs/gen7: Fix fs_inst::flags_written() for
19247ec681f3Smrg   SHADER_OPCODE_FIND_LIVE_CHANNEL.
19257ec681f3Smrg-  intel/fs: Add virtual instruction to load mask of live channels into
19267ec681f3Smrg   flag register.
19277ec681f3Smrg-  intel/fs/gen12: Workaround unwanted SEND execution due to broken
19287ec681f3Smrg   NoMask control flow.
19297ec681f3Smrg-  intel/fs/gen12: Fixup/simplify SWSB annotations of SIMD32 scratch
19307ec681f3Smrg   writes.
19317ec681f3Smrg-  intel/fs/gen12: Workaround data coherency issues due to broken NoMask
19327ec681f3Smrg   control flow.
19337ec681f3Smrg-  intel/fs: Set src0 alpha present bit in header when provided in
19347ec681f3Smrg   message payload.
19357ec681f3Smrg-  intel/fs/gen11: Work around dual-source blending hangs in combination
19367ec681f3Smrg   with SIMD32.
19377ec681f3Smrg-  intel/fs: Make sample_mask_reg() local to brw_fs.cpp and use it in
19387ec681f3Smrg   more places.
19397ec681f3Smrg-  intel/fs: Use helper for discard sample mask flag subregister number.
19407ec681f3Smrg-  intel/fs/gen7+: Swap sample mask flag register and FIND_LIVE_CHANNEL
19417ec681f3Smrg   temporary.
19427ec681f3Smrg-  intel/fs: Refactor predication on sample mask into helper function.
19437ec681f3Smrg-  intel/fs: Return consistent UW types from sample_mask_reg() in
19447ec681f3Smrg   fragment shaders.
19457ec681f3Smrg-  intel/fs/gen7+: Implement discard/demote for SIMD32 programs.
19467ec681f3Smrg-  intel/compiler: Move base IR definitions into a separate header file
19477ec681f3Smrg-  intel/compiler: Reverse inclusion dependency between brw_cfg.h and
19487ec681f3Smrg   brw_shader.h
19497ec681f3Smrg-  intel/compiler: Nest definition of live variables block_data
19507ec681f3Smrg   structures
19517ec681f3Smrg-  intel/compiler: Reverse inclusion dependency between
19527ec681f3Smrg   brw_fs_live_variables.h and brw_fs.h
19537ec681f3Smrg-  intel/compiler: Reverse inclusion dependency between
19547ec681f3Smrg   brw_vec4_live_variables.h and brw_vec4.h
19557ec681f3Smrg-  intel/compiler: Introduce simple IR analysis pass framework
19567ec681f3Smrg-  intel/compiler: Introduce backend_shader method to propagate IR
19577ec681f3Smrg   changes to analysis passes
19587ec681f3Smrg-  intel/compiler: Define more detailed analysis dependency classes
19597ec681f3Smrg-  intel/compiler: Pass detailed dependency classes to
19607ec681f3Smrg   invalidate_analysis()
19617ec681f3Smrg-  intel/compiler: Mark virtual_grf_interferes and vars_interfere as
19627ec681f3Smrg   const
19637ec681f3Smrg-  intel/compiler: Move all live interval analysis results into
19647ec681f3Smrg   fs_live_variables
19657ec681f3Smrg-  intel/compiler: Move all live interval analysis results into
19667ec681f3Smrg   vec4_live_variables
19677ec681f3Smrg-  intel/compiler: Restructure live intervals computation code
19687ec681f3Smrg-  intel/compiler: Pass single backend_shader argument to the
19697ec681f3Smrg   fs_live_variables constructor
19707ec681f3Smrg-  intel/compiler: Pass single backend_shader argument to the
19717ec681f3Smrg   vec4_live_variables constructor
19727ec681f3Smrg-  intel/compiler/fs: Add live interval validation pass
19737ec681f3Smrg-  intel/compiler/vec4: Add live interval validation pass
19747ec681f3Smrg-  intel/compiler/fs: Switch liveness analysis to IR analysis framework
19757ec681f3Smrg-  intel/compiler/vec4: Switch liveness analysis to IR analysis
19767ec681f3Smrg   framework
19777ec681f3Smrg-  intel/compiler: Drop invalidate_live_intervals()
19787ec681f3Smrg-  intel/compiler: Move idom tree calculation and related logic into
19797ec681f3Smrg   analysis object
19807ec681f3Smrg-  intel/compiler: Move dominance tree data structure into idom_tree
19817ec681f3Smrg   object
19827ec681f3Smrg-  entel/compiler: Simplify new_idom reduction in dominance tree
19837ec681f3Smrg   calculation
19847ec681f3Smrg-  intel/compiler: Move register pressure calculation into IR analysis
19857ec681f3Smrg   object
19867ec681f3Smrg-  intel/compiler: Calculate num_instructions in O(1) during register
19877ec681f3Smrg   pressure calculation
19887ec681f3Smrg-  intel/fs: Fix workaround for VxH indirect addressing bug under
19897ec681f3Smrg   control flow.
19907ec681f3Smrg-  intel/fs/gen12: Fix interaction of SWSB dependency combination with
19917ec681f3Smrg   EU fusion workaround.
19927ec681f3Smrg-  intel/fs/gen12: Fix hangs with per-sample SIMD32 fragment shader
19937ec681f3Smrg   dispatch.
19947ec681f3Smrg-  intel/fs/gen12: Work around dual-source blending hangs in combination
19957ec681f3Smrg   with SIMD32.
19967ec681f3Smrg-  intel/fs/gen12: Fix Render Target Read header setup for new thread
19977ec681f3Smrg   payload layout.
19987ec681f3Smrg-  intel/ir: Add missing initialization of backend_reg::offset during
19997ec681f3Smrg   construction.
20007ec681f3Smrg-  intel/fs: Rename half() helpers to quarter(), allow index up to 3.
20017ec681f3Smrg-  intel/fs: Fix constness of argument of
20027ec681f3Smrg   fs_instruction_scheduler::is_compressed().
20037ec681f3Smrg-  intel/fs: Replace fs_visitor::bank_conflict_cycles() with stand-alone
20047ec681f3Smrg   function.
20057ec681f3Smrg-  intel/vec4: Fix constness of vec4_instruction::reads_flag() and
20067ec681f3Smrg   ::writes_flag().
20077ec681f3Smrg-  intel/ir: Import shader performance analysis pass.
20087ec681f3Smrg-  intel/fs: Heap-allocate fs_visitors in brw_compile_fs().
20097ec681f3Smrg-  intel/fs: Implement performance analysis-based SIMD32 heuristic for
20107ec681f3Smrg   fragment shaders.
20117ec681f3Smrg-  intel/fs: Add INTEL_DEBUG=no32 debugging flag.
20127ec681f3Smrg-  intel/ir: Use brw::performance object instead of CFG cycle counts for
20137ec681f3Smrg   codegen stats.
20147ec681f3Smrg-  intel/ir: Pass block cycle count information explicitly to
20157ec681f3Smrg   disassembler.
20167ec681f3Smrg-  intel/ir: Remove scheduling-based cycle count estimates.
20177ec681f3Smrg-  intel/ir: Update performance analysis parameters for memory fence
20187ec681f3Smrg   codegen changes.
20197ec681f3Smrg
20207ec681f3SmrgFritz Koenig (3):
20217ec681f3Smrg
20227ec681f3Smrg-  Revert "gitlab-ci: disable a630 tests as mesa-cheza is down"
20237ec681f3Smrg-  Revert "gitlab-ci: disable a630 tests as mesa-cheza is down (again)"
20247ec681f3Smrg-  freedreno: allow FMT6_8_UNORM as a UBWC format
20257ec681f3Smrg
20267ec681f3SmrgGeorg Lehmann (3):
20277ec681f3Smrg
20287ec681f3Smrg-  Correctly wait in the fragment stage until all semaphores are
20297ec681f3Smrg   signaled
20307ec681f3Smrg-  Vulkan Overlay: Don't try to change the image layout to present twice
20317ec681f3Smrg-  Vulkan overlay: use the corresponding image index for each swapchain
20327ec681f3Smrg
20337ec681f3SmrgGert Wollny (63):
20347ec681f3Smrg
20357ec681f3Smrg-  r600: force new CF with TEX only if any texture value is written
20367ec681f3Smrg-  r600: Increase space for IO values to agree with
20377ec681f3Smrg   PIPE_MAX_SHADER_IN/OUTPUTS
20387ec681f3Smrg-  r600: Add NIR compiler options
20397ec681f3Smrg-  r600: Update state code to accept NIR shaders
20407ec681f3Smrg-  r600/sfn: Add a basic nir shader backend
20417ec681f3Smrg-  r600: enable NIR backend DEBUG flag for supported architectures
20427ec681f3Smrg-  r600/sfn: Add the VS in and FS out vectorization
20437ec681f3Smrg-  r600/sfn: Add the WaitAck instruction
20447ec681f3Smrg-  r600/sfn: add live range evaluation for the GPR
20457ec681f3Smrg-  r600/sfn: add register remapping
20467ec681f3Smrg-  r600/sfn: Add lowering arrays to scratch and according instructions
20477ec681f3Smrg-  r600/sfn: Add a load GDS result instruction
20487ec681f3Smrg-  r600/sfn: Add MemRingOut instructions
20497ec681f3Smrg-  r600/sfn: add emitVertex instructions
20507ec681f3Smrg-  r600/sfn: Add support for geometry shader
20517ec681f3Smrg-  r600/sfn: Add VS for TCS shader skeleton
20527ec681f3Smrg-  r600/sfn: Add compute shader skeleton
20537ec681f3Smrg-  r600/sfn: Add GDS instructions
20547ec681f3Smrg-  r600/sfn: Add lowering UBO access to r600 specific codes
20557ec681f3Smrg-  r600: Make sure LLVM is not used for DRAW
20567ec681f3Smrg-  r600/sfn: Add support for atomic instructions
20577ec681f3Smrg-  r600/sfn: Add support for SSBO load and store
20587ec681f3Smrg-  r600/sfn: Add .editorconfig file
20597ec681f3Smrg-  r600/sfn: Add some documentation
20607ec681f3Smrg-  r600/sfn: Avoid using dynamic_cast to identify type
20617ec681f3Smrg-  r600/sfn: Use static_cast when type is already known
20627ec681f3Smrg-  r600/sfn: Don't try to catch exceptions, the driver doesn't throw any
20637ec681f3Smrg-  gallium/tgsi_to_nir: Set nir_intrinsic_align_mul to 16 and offset to
20647ec681f3Smrg   0
20657ec681f3Smrg-  r600: Dump a few more variables when requested
20667ec681f3Smrg-  r600/sfn: Reduce array limit for scratch usage
20677ec681f3Smrg-  r600/sfn: Fix setting alignments when lowering UBOs
20687ec681f3Smrg-  r600/sfn: Implementing instructions blocks
20697ec681f3Smrg-  r600/nir: Pin interpolation results to channel
20707ec681f3Smrg-  r600/sfn: Fix null pointer deref in live range evalation
20717ec681f3Smrg-  r600/sfn: Handle b2b1 like it was a mov
20727ec681f3Smrg-  r600/sfn: Fix handling of GS inputs
20737ec681f3Smrg-  r600/sfn: Fix using the result of a fetch instruction in next fetch
20747ec681f3Smrg-  r600/sfn: Count only literals that are not inline to split
20757ec681f3Smrg   instruction groups
20767ec681f3Smrg-  r600/sfn: use new temp register allocation when loading single value
20777ec681f3Smrg   temporaries
20787ec681f3Smrg-  nir: Add r600 specific intrinsics for tesselation shader IO
20797ec681f3Smrg-  nir: Add umad24 and umul24 opcodes
20807ec681f3Smrg-  r600: Handle texcoord semantics in LDS index evaluation
20817ec681f3Smrg-  r600/sfn: simplify UBO lowering pass
20827ec681f3Smrg-  r600/sfn: Don't emit inline constants in the r600 IR
20837ec681f3Smrg-  r600/sfn: Add LDS IO instructions to r600 IR
20847ec681f3Smrg-  r600/sfn: Add LDS instruction to assembly conversion
20857ec681f3Smrg-  r600/sfn: Add TF write instruction
20867ec681f3Smrg-  r600/sfn: Add IR instruction to fetch the TESS parameters
20877ec681f3Smrg-  r600/sfn: Handle umul24 and umad24
20887ec681f3Smrg-  r600/sfn: Emit some LDS instructions
20897ec681f3Smrg-  r600/sfn: Move emission of barrier from compute shader to shader base
20907ec681f3Smrg-  r600/sfn: Add methods to valuepool to get a vector of values
20917ec681f3Smrg-  r600/sfn: Move some shader base methods to the public interface
20927ec681f3Smrg-  r600/sfn: extract class to handle the VS export to different stages
20937ec681f3Smrg-  r600/sfn: derive the GS from the vertex stage for a common interface
20947ec681f3Smrg-  r600/sfn: Handle LDS output in VS
20957ec681f3Smrg-  r600/sfn: Move removing of unused variables
20967ec681f3Smrg-  r600/sfn: Add lowering passes for Tesselation IO
20977ec681f3Smrg-  r600/sfn: Add tesselation shaders
20987ec681f3Smrg-  r600: Enable tesselation for NIR
20997ec681f3Smrg-  r600: Fix nir compiler options, i.e. don't lower IO to temps for TESS
21007ec681f3Smrg-  r600/sfn: Fix printing vertex fetch instruction flags
21017ec681f3Smrg-  r600: Fix duplicated subexpression in r600_asm.c
21027ec681f3Smrg
21037ec681f3SmrgGreg V (3):
21047ec681f3Smrg
21057ec681f3Smrg-  amd/addrlib: fix build on non-x86 platforms
21067ec681f3Smrg-  r600: add missing <array> include
21077ec681f3Smrg-  svga: fix build on FreeBSD
21087ec681f3Smrg
21097ec681f3SmrgH.J. Lu (2):
21107ec681f3Smrg
21117ec681f3Smrg-  x86_init_func_common: Add ENDBR at function entry
21127ec681f3Smrg-  x86: Add ENDBR at function entries
21137ec681f3Smrg
21147ec681f3SmrgHanno Böck (1):
21157ec681f3Smrg
21167ec681f3Smrg-  Properly check mmap return value
21177ec681f3Smrg
21187ec681f3SmrgHyunjun Ko (27):
21197ec681f3Smrg
21207ec681f3Smrg-  freedreno/ir3: fix printing half constant registers.
21217ec681f3Smrg-  freedreno/ir3: Add cat4 mediump opcodes
21227ec681f3Smrg-  freedreno/ir3: put the conversion back for half const to the right
21237ec681f3Smrg   place.
21247ec681f3Smrg-  freedreno/ir3: Fold const only when the type is float
21257ec681f3Smrg-  freedreno/ir3: Add new ir3 pass to fold out fp16 conversions
21267ec681f3Smrg-  nir: Add optimization for doing removing f16/f32 conversions
21277ec681f3Smrg-  freedreno/ir3: handle half registers for arrays during register
21287ec681f3Smrg   allocation.
21297ec681f3Smrg-  turnip: support indirect draw
21307ec681f3Smrg-  glsl: Handle fp16 unary operations when lowering matrix operations
21317ec681f3Smrg-  glsl/lower_instructions: Handle fp16 for MOD_TO_FLOOR
21327ec681f3Smrg-  turnip: Gather information for transform feedback
21337ec681f3Smrg-  turnip: Define structs for transform feedback
21347ec681f3Smrg-  turnip: Setup stream-output when linking program
21357ec681f3Smrg-  turnip: Implement stream-out emit and vkApis for transform feedback
21367ec681f3Smrg-  turnip: Implement an empty function vkCmdDrawIndirectByteCountEXT
21377ec681f3Smrg-  turnip: Enable VK_EXT_transform_feedback
21387ec681f3Smrg-  turnip: Add tu6_control struct.
21397ec681f3Smrg-  turnip: Fix wrong assignment of xfb output's offset.
21407ec681f3Smrg-  turnip: Do gathering xfb info after nir_remove_dead_variables
21417ec681f3Smrg-  freedreno: Enable mediump lowering
21427ec681f3Smrg-  freedreno/ir3: enable nir_opt_loop_unroll on a6xx
21437ec681f3Smrg-  nir: fix wrong assignment to buffer in xfb_varyings_info
21447ec681f3Smrg-  turnip: make the struct slot_value of queries get 2 values
21457ec681f3Smrg-  turnip: Implement and enable
21467ec681f3Smrg   VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
21477ec681f3Smrg-  turnip : Fix wrong offset calculation for xfb buffer.
21487ec681f3Smrg-  turnip: Skip unused regs when setting up streamout buffers
21497ec681f3Smrg-  turnip: Fix crashes when geometry shader constants aren't used
21507ec681f3Smrg
21517ec681f3SmrgIago Toral Quiroga (1):
21527ec681f3Smrg
21537ec681f3Smrg-  nir: add a bool bitsize lowering pass
21547ec681f3Smrg
21557ec681f3SmrgIan Romanick (62):
21567ec681f3Smrg
21577ec681f3Smrg-  intel/fs: Don't count integer instructions as being possibly coissue
21587ec681f3Smrg-  nir: Mark fmin and fmax as commutative and associative
21597ec681f3Smrg-  mesa/draw: Make sure all the unused fields are initialized to zero
21607ec681f3Smrg-  nir/search: Use larger type to hold linearized index
21617ec681f3Smrg-  intel/fs: Correctly handle multiply of fsign with a source modifier
21627ec681f3Smrg-  intel/fs: Do cmod prop again after scheduling
21637ec681f3Smrg-  intel/fs: Allow NOT instructions in conditional discard optimization
21647ec681f3Smrg-  intel/fs: Fix NULL destinations on 3-source instructions again after
21657ec681f3Smrg   late DCE
21667ec681f3Smrg-  nir/algebraic: Simplify logic to detect sign of an integer
21677ec681f3Smrg-  nir/algebraic: optimize ior(ine(a, 0), ine(b, 0)) to ine(ior(a, b),
21687ec681f3Smrg   0)
21697ec681f3Smrg-  nir/algebraic: Generalize some and-of-shift-right patterns [v2]
21707ec681f3Smrg-  nir/algebraic: Constant reassociation for bitwise operations too
21717ec681f3Smrg-  nir/algebraic: Simplify a contradiction that can occur in
21727ec681f3Smrg   \__flt64_nonnan
21737ec681f3Smrg-  soft-fp64/b2f: Reimplement using bitwise logic ops
21747ec681f3Smrg-  soft-fp64: Don't open-code umulExtended
21757ec681f3Smrg-  soft-fp64: Simplify \__countLeadingZeros32 function
21767ec681f3Smrg-  soft-fp64: Pick a single idiom for treating sign value as a Boolean
21777ec681f3Smrg-  soft-fp64: Store sign value as 0 or 0x80000000
21787ec681f3Smrg-  soft-fp64/fneg: Don't treat NaN specially
21797ec681f3Smrg-  soft-fp64/flt: Perform checks in a different order
21807ec681f3Smrg-  soft-fp64/fsat: Correctly handle NaN
21817ec681f3Smrg-  soft-fp64/fsat: Micro-optimize x < 0 test
21827ec681f3Smrg-  soft-fp64/fsat: Micro-optimize x >= 1 test
21837ec681f3Smrg-  soft-fp64: Relax the way NaN is propagated
21847ec681f3Smrg-  soft-fp64/ffloor: Simplify the >= 0 comparison
21857ec681f3Smrg-  soft-fp64: Optimize \__fmin64 and \__fmax64 by using different
21867ec681f3Smrg   evaluation order [v2]
21877ec681f3Smrg-  soft-fp64/fadd: Instead of tracking "b < a", track sign of the
21887ec681f3Smrg   difference
21897ec681f3Smrg-  soft-fp64/fadd: Massively split the live range of zFrac0 and zFrac1
21907ec681f3Smrg-  soft-fp64/fadd: Pick zero or non-zero result based on subtraction
21917ec681f3Smrg   result
21927ec681f3Smrg-  soft-fp64/fadd: Just let the subtraction happen when the result will
21937ec681f3Smrg   be zero
21947ec681f3Smrg-  soft-fp64/fadd: Delete a redundant condition check
21957ec681f3Smrg-  soft-fp64/fadd: Reformat after previous commit
21967ec681f3Smrg-  soft-fp64/fadd: Combine an if-statement into the preceeding
21977ec681f3Smrg   else-clause
21987ec681f3Smrg-  soft-fp64/fadd: Rename aFrac and bFrac variables
21997ec681f3Smrg-  soft-fp64/fadd: Use absolute value of expDiff
22007ec681f3Smrg-  soft-fp64/fadd: Move common code out of both branches of an
22017ec681f3Smrg   if-statement
22027ec681f3Smrg-  soft-fp64/fadd: Common code optimization for differing sign case
22037ec681f3Smrg-  soft-fp64: Split a block that was missing a cast on a comparison
22047ec681f3Smrg-  intel/vec4: Allow late copy propagation on vec4
22057ec681f3Smrg-  nir/algebraic: Change the default cursor location when replacing a
22067ec681f3Smrg   unary op
22077ec681f3Smrg-  nir/algebraic: Distribute source modifiers into instructions
22087ec681f3Smrg-  nir/algebraic: Use value range analysis to convert fmax to fsat
22097ec681f3Smrg-  nir/algebraic: Remove a redundant fabs pattern
22107ec681f3Smrg-  tnl: Don't dereference NULL obj pointer in bind_indices
22117ec681f3Smrg-  tnl: Don't dereference NULL obj pointer in replay_init
22127ec681f3Smrg-  tnl: Don't dereference NULL obj pointer in t_rebase_prims
22137ec681f3Smrg-  tnl: Silence unused parameter 'attrib' warning in
22147ec681f3Smrg   convert_half_to_float
22157ec681f3Smrg-  tnl: Silence unused parameter warnings in \_tnl_draw_prims
22167ec681f3Smrg-  tnl: Silence unused parameter warnings in dump_draw_info
22177ec681f3Smrg-  tnl: Silence unused parameter warnings in \_tnl_split_inplace
22187ec681f3Smrg-  tnl: Code formatting in t_draw.c
22197ec681f3Smrg-  tnl: Code formatting in t_rebase.c
22207ec681f3Smrg-  intel/compiler: Silence unused parameter warnings in vec4_tcs_visitor
22217ec681f3Smrg-  intel/compiler: Silence unused parameter warning in
22227ec681f3Smrg   fs_live_variables::setup_one_read
22237ec681f3Smrg-  intel/compiler: Silence unused parameter warning in
22247ec681f3Smrg   update_inst_scoreboard
22257ec681f3Smrg-  intel/compiler: Only GE and L modifiers are commutative for SEL
22267ec681f3Smrg-  intel/compiler: CSEL can do saturate
22277ec681f3Smrg-  intel/compiler: Fixup operands in fs_builder::emit() that takes array
22287ec681f3Smrg-  nir/algebraic: Detect some kinds of malformed variable names
22297ec681f3Smrg-  nir/algebraic: Require operands to iand be 32-bit
22307ec681f3Smrg-  nir/algebraic: Optimize ushr of pack_half, not ishr
22317ec681f3Smrg-  anv/tests: Don't rely on assert or changing NDEBUG in tests
22327ec681f3Smrg
22337ec681f3SmrgIcecream95 (16):
22347ec681f3Smrg
22357ec681f3Smrg-  panfrost: Fix non-debug builds
22367ec681f3Smrg-  panfrost: Inline panfrost_get_default_swizzle
22377ec681f3Smrg-  panfrost: LogicOp support
22387ec681f3Smrg-  nir: Allow nir_format conversions to work on 32-bit values
22397ec681f3Smrg-  panfrost: LogicOp fixes and non 8-bit format support
22407ec681f3Smrg-  mesa/format_utils: Add a fast-path for RGBA to BGRA
22417ec681f3Smrg-  panfrost: Extend the tiled store fast-path to loads
22427ec681f3Smrg-  panfrost: Mark 64-bit formats as unsupported
22437ec681f3Smrg-  panfrost: Add support for B5G5R5X1
22447ec681f3Smrg-  st/mesa: Fall back on R3G3B2 for R3_G3_B2
22457ec681f3Smrg-  panfrost: Add support for R3G3B2
22467ec681f3Smrg-  panfrost: Correctly identify format 0x4c
22477ec681f3Smrg-  pan/midgard: Fix a divide by zero in emit_alu_bundle
22487ec681f3Smrg-  panfrost: Fix GL_EXT_vertex_array_bgra
22497ec681f3Smrg-  panfrost: Enable PIPE_CAP_VERTEX_COLOR_UNCLAMPED
22507ec681f3Smrg-  panfrost: Fix background showing when using discard
22517ec681f3Smrg
22527ec681f3SmrgIcenowy Zheng (3):
22537ec681f3Smrg
22547ec681f3Smrg-  lima: remove its hash table entry when invalidating a resource
22557ec681f3Smrg-  lima: expose fragment shader derivatives capability
22567ec681f3Smrg-  lima: implement zsbuf reload
22577ec681f3Smrg
22587ec681f3SmrgIlia Mirkin (24):
22597ec681f3Smrg
22607ec681f3Smrg-  nv50: report max lod bias of 15.0
22617ec681f3Smrg-  gitlab-ci: disable panfrost runners
22627ec681f3Smrg-  mesa: fix \_mesa_draw_nonzero_divisor_bits to return nonzero divisors
22637ec681f3Smrg-  nv50,nvc0: add newly added PIPE_CAP's to list
22647ec681f3Smrg-  st/mesa: allow TXB2/TXL2 to work with cube array shadow textures
22657ec681f3Smrg-  nvc0: enable EXT_texture_shadow_lod
22667ec681f3Smrg-  st/vdpau: avoid asserting on new VDP_YCBCR\_\* formats
22677ec681f3Smrg-  st/vdpau: make query test for 2D support
22687ec681f3Smrg-  nv50: don't try to upload MSAA settings for BUFFER textures
22697ec681f3Smrg-  gallium: add viewport swizzling state and cap
22707ec681f3Smrg-  mesa: add GL_NV_viewport_swizzle support
22717ec681f3Smrg-  st/mesa: add NV_viewport_swizzle support
22727ec681f3Smrg-  nvc0: add NV_viewport_swizzle support for GM200+
22737ec681f3Smrg-  compiler: add VARYING_SLOT_VIEWPORT_MASK
22747ec681f3Smrg-  glsl: add NV_viewport_array2 support
22757ec681f3Smrg-  mesa: add NV_viewport_array2 enable, attach to glsl
22767ec681f3Smrg-  gallium: add TGSI_SEMANTIC_VIEWPORT_MASK
22777ec681f3Smrg-  gallium: add TGSI_PROPERTY_LAYER_VIEWPORT_RELATIVE
22787ec681f3Smrg-  gallium: add PIPE_CAP_VIEWPORT_MASK
22797ec681f3Smrg-  st/mesa: add support for GL_NV_viewport_array2
22807ec681f3Smrg-  nvc0: enable GL_NV_viewport_array2
22817ec681f3Smrg-  nv50,nvc0: update with latest caps
22827ec681f3Smrg-  docs: update for recently-added nvc0 features
22837ec681f3Smrg-  mesa: add interaction between compute derivatives and variable local
22847ec681f3Smrg   sizes
22857ec681f3Smrg
22867ec681f3SmrgIndrajit Kumar Das (4):
22877ec681f3Smrg
22887ec681f3Smrg-  glapi/copyimage: Implement CopyImageSubDataNV
22897ec681f3Smrg-  gallium: prepare framework for supporting
22907ec681f3Smrg   AlphaToCoverageDitherControlNV
22917ec681f3Smrg-  mesa: add support for AlphaToCoverageDitherControlNV
22927ec681f3Smrg-  radeonsi: enable support for AlphaToCoverageDitherControlNV
22937ec681f3Smrg
22947ec681f3SmrgIvan Molodetskikh (1):
22957ec681f3Smrg
22967ec681f3Smrg-  egl: allow INVALID format for linux_dmabuf
22977ec681f3Smrg
22987ec681f3SmrgJames Xiong (2):
22997ec681f3Smrg
23007ec681f3Smrg-  iris: handle the failure of converting unsupported yuv formats to isl
23017ec681f3Smrg-  gallium: let the pipe drivers decide the supported modifiers
23027ec681f3Smrg
23037ec681f3SmrgJames Zhu (1):
23047ec681f3Smrg
23057ec681f3Smrg-  radeonsi: fix Segmentation fault during vaapi enc test
23067ec681f3Smrg
23077ec681f3SmrgJan Palus (1):
23087ec681f3Smrg
23097ec681f3Smrg-  targets/opencl: fix build against LLVM>=10 with Polly support
23107ec681f3Smrg
23117ec681f3SmrgJan Vesely (2):
23127ec681f3Smrg
23137ec681f3Smrg-  clover: Use explicit conversion from llvm::StringRef to std::string
23147ec681f3Smrg-  clover: Check if the detected clang libraries are usable
23157ec681f3Smrg
23167ec681f3SmrgJan Zielinski (8):
23177ec681f3Smrg
23187ec681f3Smrg-  gallium/swr: Fix various asserts and security issues
23197ec681f3Smrg-  gallium/swr: fix corruptions in Unigine Heaven
23207ec681f3Smrg-  gallium/swr: use ElementCount type arguments for getSplat()
23217ec681f3Smrg-  gallium/gallivm: Remove workaround disabling AVX code for newer CPUs
23227ec681f3Smrg-  gallium/gallivm: fix compilation issues with llvm 11
23237ec681f3Smrg-  gallium/gallivm: remove unused header include for newer LLVM
23247ec681f3Smrg-  gallium/swr: Fix LLVM 11 compilation issues
23257ec681f3Smrg-  gallium/swr: Fix crashes and failures in vertex fetch
23267ec681f3Smrg
23277ec681f3SmrgJason Ekstrand (202):
23287ec681f3Smrg
23297ec681f3Smrg-  genxml: Add a new 3DSTATE_SF field on gen12
23307ec681f3Smrg-  anv,iris: Set 3DSTATE_SF::DerefBlockSize to per-poly on Gen12+
23317ec681f3Smrg-  intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11
23327ec681f3Smrg-  iris: Set SLMEnable based on the L3$ config
23337ec681f3Smrg-  iris: Store the L3$ configs in the screen
23347ec681f3Smrg-  iris: Use the URB size from the L3$ config
23357ec681f3Smrg-  i965: Re-emit l3 state before BLORP executes
23367ec681f3Smrg-  intel: Take a gen_l3_config in gen_get_urb_config
23377ec681f3Smrg-  intel/blorp: Always emit URB config on Gen7+
23387ec681f3Smrg-  iris: Consolodate URB emit
23397ec681f3Smrg-  anv: Emit URB setup earlier
23407ec681f3Smrg-  intel/common: Return the block size from get_urb_config
23417ec681f3Smrg-  intel/blorp: Plumb deref block size through to 3DSTATE_SF
23427ec681f3Smrg-  anv: Plumb deref block size through to 3DSTATE_SF
23437ec681f3Smrg-  iris: Plumb deref block size through to 3DSTATE_SF
23447ec681f3Smrg-  anv: Always fill out the AUX table even if CCS is disabled
23457ec681f3Smrg-  intel/eu/validate: Don't validate regions of sends
23467ec681f3Smrg-  intel/disasm: SEND has two sources on Gen12+
23477ec681f3Smrg-  intel/tools: Handle strides better when dumping buffers
23487ec681f3Smrg-  intel/fs: Write the address register with NoMask for MOV_INDIRECT
23497ec681f3Smrg-  anv/blorp: Use the correct size for vkCmdCopyBufferToImage
23507ec681f3Smrg-  anv: No-op submit and wait calls when no_hw is set
23517ec681f3Smrg-  anv: Reject modifiers on depth/stencil formats
23527ec681f3Smrg-  vulkan: Update the XML and headers to 1.2.133
23537ec681f3Smrg-  nir: Fix the nir_builder include path for nir_builtin_builder
23547ec681f3Smrg-  nir/builder: Return an integer from nir_get_texture_size
23557ec681f3Smrg-  intel/isl: Add isl_aux_info.c to Makefile.sources
23567ec681f3Smrg-  anv: Always enable the data cache
23577ec681f3Smrg-  nir: Drop nir_tex_instr::texture_array_size
23587ec681f3Smrg-  anv: Use the PIPE_CONTROL instead of bits for the CS stall W/A
23597ec681f3Smrg-  anv: Use a proper end-of-pipe sync instead of just CS stall
23607ec681f3Smrg-  anv: Do end-of-pipe sync around MCS/CCS ops instead of CS stall
23617ec681f3Smrg-  nir: Flush to zero with OOB low exponents in ldexp
23627ec681f3Smrg-  isl: Set 3DSTATE_DEPTH_BUFFER::Depth correctly for 3D surfaces
23637ec681f3Smrg-  iris: Allow HiZ on blit sources
23647ec681f3Smrg-  blorp: Write to depth/stencil images as depth/stencil when possible
23657ec681f3Smrg-  anv: Enable HiZ for VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
23667ec681f3Smrg-  iris: Enable CCS for copies from HiZ+CCS depth buffers
23677ec681f3Smrg-  iris: Enable HiZ and stencil CCS for blorp blit destinations
23687ec681f3Smrg-  iris: Don't skip fast depth clears if the color changed
23697ec681f3Smrg-  anv: Parse VkPhysicalDeviceFeatures2 in CreateDevice
23707ec681f3Smrg-  anv: Mark max_push_range UNUSED and simplify the code
23717ec681f3Smrg-  anv: Pass buffer addresses into emit_push_constant\*
23727ec681f3Smrg-  anv: Delete some pointless break statements
23737ec681f3Smrg-  anv: Align UBO sizes to 32B
23747ec681f3Smrg-  anv: Add an align_down_u32 helper
23757ec681f3Smrg-  anv: Bounds-check pushed UBOs when robustBufferAccess = true
23767ec681f3Smrg-  vulkan/wsi: Don't leak the FD when
23777ec681f3Smrg   GetImageDrmFormatModifierProperties fails
23787ec681f3Smrg-  vulkan/wsi: Return an error if dup() fails
23797ec681f3Smrg-  intel/isl: Clean up some aux surface logic
23807ec681f3Smrg-  intel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT
23817ec681f3Smrg-  intel/blorp: Allow HIZ_CCS_WT in copy sources
23827ec681f3Smrg-  iris: Use ISL_AUX_USAGE_HIZ_CCS_WT to indicate write-through HiZ
23837ec681f3Smrg-  intel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode
23847ec681f3Smrg-  intel/isl: Add a separate ISL_AUX_USAGE_STC_CCS
23857ec681f3Smrg-  intel/blorp: Allow STC_CCS in blit sources
23867ec681f3Smrg-  iris: Use ISL_AUX_USAGE_STC_CCS for stencil CCS
23877ec681f3Smrg-  intel: Require ISL_AUX_USAGE_STC_CCS for stencil CCS
23887ec681f3Smrg-  intel/isl: Set DepthStencilResource based on aux usage
23897ec681f3Smrg-  anv: Dump push ranges via VK_KHR_pipeline_executable_properties
23907ec681f3Smrg-  anv: Fix the comparison in an assert
23917ec681f3Smrg-  anv: Push UBO ranges relative to the start of the binding
23927ec681f3Smrg-  anv: Do an end-of-pipe sync before updating AUX table entries
23937ec681f3Smrg-  intel/isl: Don't align linear images to 64K on Gen12+
23947ec681f3Smrg-  intel/blorp: Add support for swizzling fast-clear colors
23957ec681f3Smrg-  anv: Swizzle fast-clear values
23967ec681f3Smrg-  intel/iris: Always initialize CCS to 0
23977ec681f3Smrg-  anv: Only add END_OF_PIPE_SYNC if we actually have AUX_INVAL
23987ec681f3Smrg-  util/sparse_array: Finish the sparse_array in the tests
23997ec681f3Smrg-  util/sparse_array: Add a node_size_log2 temporary
24007ec681f3Smrg-  meson,ci: Disable sparse_array tests on windows
24017ec681f3Smrg-  util/sparse_array: Stash the node level in the node pointer
24027ec681f3Smrg-  anv: Stop fetching the timestamp frequency ourselves
24037ec681f3Smrg-  intel/dump_gpu: Add an ensure_device_info helper
24047ec681f3Smrg-  intel/dump_gpu: Handle a bunch of getparam in the no-HW case
24057ec681f3Smrg-  intel/nir: Run copy-prop and DCE after lower_bool_to_int32
24067ec681f3Smrg-  nir: Add b2b opcodes
24077ec681f3Smrg-  aco: Implement b2b32 and b2b1
24087ec681f3Smrg-  nir: Use b2b opcodes for shared and constant memory
24097ec681f3Smrg-  nir: Insert b2b1s around booleans in nir_lower_to
24107ec681f3Smrg-  anv: Set alignments on descriptor and constant loads
24117ec681f3Smrg-  nir: Validate that memory load/store ops work on whole bytes
24127ec681f3Smrg-  nir: Set UBO alignments in lower_uniforms_to_ubo
24137ec681f3Smrg-  nir/opt_loop_unroll: Fix has_nested_loop handling
24147ec681f3Smrg-  nir/lower_int64: Lower 8 and 16-bit downcasts with nir_lower_mov64
24157ec681f3Smrg-  nir/algebraic: Add downcast-of-pack opts
24167ec681f3Smrg-  nir: Add a nir_op_is_vec helper
24177ec681f3Smrg-  nir: Copy propagate through vec8s and vec16s
24187ec681f3Smrg-  nir: Handle vec8/16 in bool_to_bitsize
24197ec681f3Smrg-  nir: Handle vec8/16 in gather_ssa_types
24207ec681f3Smrg-  nir: Handle vec8/16 in lower_phis_to_scalar
24217ec681f3Smrg-  nir: Handle vec8/16 in lower_regs_to_ssa
24227ec681f3Smrg-  nir: Handle vec8/16 in opt_split_alu_of_phi
24237ec681f3Smrg-  nir: Treat vec8/16 as select in opt_peephole_select
24247ec681f3Smrg-  nir: Handle vec8/16 in opt_undef_vecN
24257ec681f3Smrg-  nir: Handle vec8/16 in nir_shrink_array_vars
24267ec681f3Smrg-  anv: Account for the header in anv_state_stream_alloc
24277ec681f3Smrg-  anv/allocator: Use util_dynarray for blocks in anv_state_stream
24287ec681f3Smrg-  spirv: Implement OpCopyObject and OpCopyLogical as blind copies
24297ec681f3Smrg-  Revert "spirv: Implement OpCopyObject and OpCopyLogical as blind
24307ec681f3Smrg   copies"
24317ec681f3Smrg-  anv/image: Use align_u64 for image offsets
24327ec681f3Smrg-  nir/from_ssa: Only chain movs when a src is also a dest
24337ec681f3Smrg-  intel/fs: Choose memory message type based on bit size
24347ec681f3Smrg-  anv: Improve brw_nir_lower_mem_access_bit_sizes
24357ec681f3Smrg-  iris: Set alignments on cbuf0 and constant reads
24367ec681f3Smrg-  intel/nir: Lower memory access bit sizes later
24377ec681f3Smrg-  nir/load_store_vectorize: Fix shared atomic info
24387ec681f3Smrg-  nir/load_store_vectorize: Use nir_iadd_imm for offsets
24397ec681f3Smrg-  nir/load_store_vectorize: Add support for nir_var_mem_global
24407ec681f3Smrg-  intel/nir: Enable load/store vectorization
24417ec681f3Smrg-  spirv: Add a vtn_block() helper
24427ec681f3Smrg-  spirv: Add cast and loop helpers for vtn_cf_node
24437ec681f3Smrg-  spirv: Make vtn_case a vtn_cf_node
24447ec681f3Smrg-  spirv: Make vtn_function a vtn_cf_node
24457ec681f3Smrg-  spirv: Add a parent field to vtn_cf_node
24467ec681f3Smrg-  spirv: Rewrite CFG construction
24477ec681f3Smrg-  Revert "spirv: Rewrite CFG construction"
24487ec681f3Smrg-  nir: Assert memory loads are aligned
24497ec681f3Smrg-  anv: Advertise SEND count through
24507ec681f3Smrg   VK_EXT_pipeline_executable_properties
24517ec681f3Smrg-  anv: Fix UBO range detection in anv_nir_compute_push_layout
24527ec681f3Smrg-  nir: Add an alignment to nir_intrinsic_load_constant
24537ec681f3Smrg-  nir: Add some sanity assertions in opt_large_constants
24547ec681f3Smrg-  intel: Add \_const versions of prog_data cast helpers
24557ec681f3Smrg-  anv: Report correct SLM size
24567ec681f3Smrg-  intel/batch_decoder: Stop printing to stdout
24577ec681f3Smrg-  intel/cfg: Add first/last_block helpers
24587ec681f3Smrg-  anv: Emit pushed UBO bounds checking code in the back-end compiler
24597ec681f3Smrg-  intel/blorp: Delete an unused enum
24607ec681f3Smrg-  spirv: Handle OOB vector extract operations
24617ec681f3Smrg-  spirv,nir: Add a better vector_insert
24627ec681f3Smrg-  spirv: Error if OpCompositeInsert/Extract has OOB indices
24637ec681f3Smrg-  nir/builder: Handle any bit-size selector in nir_extract
24647ec681f3Smrg-  spirv: Call nir_builder directly for vector_extract
24657ec681f3Smrg-  spirv,nir: Move the SPIR-V vector insert code to NIR
24667ec681f3Smrg-  anv: Move vb_emit setup closer to where it's used in flush_state
24677ec681f3Smrg-  anv: Apply any needed PIPE_CONTROLs before emitting state
24687ec681f3Smrg-  nir/dominance: Better handle unreachable blocks
24697ec681f3Smrg-  nir/gcm: Loop over blocks in pin_instructions
24707ec681f3Smrg-  nir/gcm: Use an array for storing the early block
24717ec681f3Smrg-  nir/gcm: Move block choosing into a helper function
24727ec681f3Smrg-  nir/gcm: Add a real concept of "progress"
24737ec681f3Smrg-  nir/gcm: Delete dead instructions
24747ec681f3Smrg-  nir/gcm: Prefer the instruction's original block
24757ec681f3Smrg-  intel/fs: Rename block to scan_block in can_coalesce_vars
24767ec681f3Smrg-  intel/fs: Coalesce when the src live range is contained in the dst
24777ec681f3Smrg-  glsl: Hard-code noise to zero in builtin_functions.cpp
24787ec681f3Smrg-  nir: Delete the fnoise opcodes
24797ec681f3Smrg-  meta,i965: Rip GL_EXT_texture_multisample_blit_scaled support out of
24807ec681f3Smrg   meta
24817ec681f3Smrg-  spirv: Allow constants and NULLs in SpvOpConvertUToPtr
24827ec681f3Smrg-  anv: Properly handle all sizes of specialization constants
24837ec681f3Smrg-  radv: Properly handle all sizes of specialization constants
24847ec681f3Smrg-  turnip: Properly handle all sizes of specialization constants
24857ec681f3Smrg-  spirv: Use nir_const_value for spec constants
24867ec681f3Smrg-  nir/opt_deref: Remove certain sampler type casts
24877ec681f3Smrg-  spirv: Fix passing combined image/samplers through function calls
24887ec681f3Smrg-  anv: Drop an assert
24897ec681f3Smrg-  nir/lower_subgroups: Mask off unused bits in ballot ops
24907ec681f3Smrg-  anv: Add a vk_image_layout_to_usage_flags helper
24917ec681f3Smrg-  anv: Move vk_image_layout_is_read_only higher
24927ec681f3Smrg-  anv: Be more conservative about image view usage
24937ec681f3Smrg-  anv: Rework anv_layout_to_aux_state
24947ec681f3Smrg-  anv/blorp: Do less hard-coding of aux usages
24957ec681f3Smrg-  anv: Generalize some aux usage checks
24967ec681f3Smrg-  intel/blorp: Allow more HiZ usages in hiz_clear_depth_stencil
24977ec681f3Smrg-  anv: Simplify a case in layout_to_aux_usage
24987ec681f3Smrg-  anv/cmd_buffer: Move anv_image_init_aux_tt higher
24997ec681f3Smrg-  intel/isl: Delete a misleading comment
25007ec681f3Smrg-  intel/isl: Refactor isl_surf_get_ccs_surf
25017ec681f3Smrg-  anv: Add support for HiZ+CCS
25027ec681f3Smrg-  spirv: Rewrite CFG construction
25037ec681f3Smrg-  intel/devinfo: Compute the correct L3$ size for Gen12
25047ec681f3Smrg-  anv: Expose CS workgroup sizes based on a maximum of 64 threads
25057ec681f3Smrg-  anv: Return an error if allocating attachment memory fails
25067ec681f3Smrg-  anv: Add TRANSFER_SRC to pass usage not subpass usage
25077ec681f3Smrg-  anv: Stop filling out the clear color in compute_aux_usage
25087ec681f3Smrg-  anv: Assert surface states are valid
25097ec681f3Smrg-  anv: Use ANV_FROM_HANDLE for pInheritanceInfo fields
25107ec681f3Smrg-  anv: Mark images written in end_subpass
25117ec681f3Smrg-  anv: Split command buffer attachment setup in three
25127ec681f3Smrg-  anv: Allocate surface states per-subpass
25137ec681f3Smrg-  intel: Move swizzle_color_value from blorp to ISL
25147ec681f3Smrg-  anv: Disallow fast-clears which require format-reinterpretation
25157ec681f3Smrg-  anv: Stop allowing non-zero clear colors in input attachments
25167ec681f3Smrg-  anv: Refactor cmd_buffer_setup_attachments
25177ec681f3Smrg-  anv: Rework depth_stencil_attachment_compute_aux_usage
25187ec681f3Smrg-  anv: Split color_attachment_compute_aux_usage in two
25197ec681f3Smrg-  anv: Use anv_layout_to_aux_usage for color during render passes
25207ec681f3Smrg-  anv: Allow all clear colors for texturing on Gen11+
25217ec681f3Smrg-  vulkan: Update Vulkan XML and headers to 1.2.139
25227ec681f3Smrg-  nir/copy_prop_vars: Handle volatile better
25237ec681f3Smrg-  nir/copy_prop_vars: Report progress when deleting self-copies
25247ec681f3Smrg-  nir/dead_write_vars: Handle volatile
25257ec681f3Smrg-  nir/combine_stores: Handle volatile
25267ec681f3Smrg-  anv: Handle NULL descriptors
25277ec681f3Smrg-  anv: Handle null vertex buffer bindings
25287ec681f3Smrg-  anv: Claim VK_EXT_robustness2 support
25297ec681f3Smrg-  intel/fs: Don't delete coalesced MOVs if they have a cmod
25307ec681f3Smrg-  vulkan: Allow destroying NULL debug report callbacks
25317ec681f3Smrg-  anv:gpu_memcpy: Emit 3DSTATE_VF_INDEXING on Gen8+
25327ec681f3Smrg-  nir/lower_double_ops: Rework the if (progress) tree
25337ec681f3Smrg-  nir/opt_deref: Report progress if we remove a deref
25347ec681f3Smrg-  nir/copy_prop_vars: Record progress in more places
25357ec681f3Smrg
25367ec681f3SmrgJesse Natalie (3):
25377ec681f3Smrg
25387ec681f3Smrg-  wgl: add official gldrv.h header-file
25397ec681f3Smrg-  wgl: use gldrv.h instead of stw_icd.h
25407ec681f3Smrg-  util/ralloc: fix ralloc alignment on Win64
25417ec681f3Smrg
25427ec681f3SmrgJohn Stultz (7):
25437ec681f3Smrg
25447ec681f3Smrg-  freedreno: Add ir3_cf.c and ir3_delay.c to Makefile.sources
25457ec681f3Smrg-  panfrost: Move pan_afbc.c file to the the right Makefile.source file
25467ec681f3Smrg-  gallium: hud_context: Fix scalar initializer warning.
25477ec681f3Smrg-  Android.mk: Tweak MESA_ENABLE_LLVM checks
25487ec681f3Smrg-  etnaviv: Avoid shift overflow
25497ec681f3Smrg-  vc4_bufmgr: Remove duplicative VC definition
25507ec681f3Smrg-  r600: Fix build error in sfn_nir_lower_fs_out_to_vector.cpp
25517ec681f3Smrg
25527ec681f3SmrgJon Turney (1):
25537ec681f3Smrg
25547ec681f3Smrg-  Fix util/process test on Cygwin
25557ec681f3Smrg
25567ec681f3SmrgJonathan Marek (79):
25577ec681f3Smrg
25587ec681f3Smrg-  freedreno/a6xx: use single format enum
25597ec681f3Smrg-  freedreno/a6xx: fix Z24_UNORM_S8_UINT_AS_R8G8B8A8
25607ec681f3Smrg-  freedreno: name sysmem color/depth flush events
25617ec681f3Smrg-  freedreno/a6xx: document some unknown bits
25627ec681f3Smrg-  turnip: add option to force use of hw binning
25637ec681f3Smrg-  turnip: fix COND_EXEC reserved size in tu_query
25647ec681f3Smrg-  turnip: add tu_device pointer to tu_cs
25657ec681f3Smrg-  turnip: automatically reserve cmdstream space in emit_pkt4/emit_pkt7
25667ec681f3Smrg-  turnip: remove marker seqno
25677ec681f3Smrg-  turnip: make cond_exec helper easier to use
25687ec681f3Smrg-  turnip: move tile_load_ib/sysmem_clear_ib into draw_cs
25697ec681f3Smrg-  hud: add GALLIUM_HUD_SCALE
25707ec681f3Smrg-  turnip: enable sampleRateShading feature
25717ec681f3Smrg-  turnip: enable
25727ec681f3Smrg   fullDrawIndexUint32/independentBlend/dualSrcBlend/logicOp
25737ec681f3Smrg-  etnaviv: disable INT_FILTER for ASTC
25747ec681f3Smrg-  util/format: add missing BC4/BC5 vulkan formats
25757ec681f3Smrg-  turnip: rework format table to support r5g5b5a1_unorm/b5g5r5a1_unorm
25767ec681f3Smrg-  turnip: add r5g5b5a1_unorm/b5g5r5a1_unorm formats
25777ec681f3Smrg-  turnip: check the right alignment requirement on shader iova
25787ec681f3Smrg-  turnip: move some constant state to tu6_init_hw
25797ec681f3Smrg-  turnip: remove unecessary MRT_CONTROL fill
25807ec681f3Smrg-  turnip: minify image_view extent
25817ec681f3Smrg-  turnip: fix hw binning + render_area offset interaction
25827ec681f3Smrg-  turnip: fix srgb MRT
25837ec681f3Smrg-  turnip: don't hardcode gmem base for input attachment
25847ec681f3Smrg-  turnip: remove unnecessary fb size check
25857ec681f3Smrg-  turnip: fall back to sysmem when attachments don't fit into gmem
25867ec681f3Smrg-  turnip: increase array sizes in tu_descriptor_map
25877ec681f3Smrg-  turnip: improve binning pipe layout config
25887ec681f3Smrg-  turnip: fix tile->slot calculation
25897ec681f3Smrg-  etnaviv: nir: add compile_check_limits
25907ec681f3Smrg-  freedreno/registers: more GRAS_CL_CNTL bits, Z_CLAMP
25917ec681f3Smrg-  turnip: fix znear clipping
25927ec681f3Smrg-  turnip: implement depth clamp
25937ec681f3Smrg-  turnip: implement timestamp query
25947ec681f3Smrg-  turnip: fix compute shaders crashing after geometry shader change
25957ec681f3Smrg-  turnip: improve vertex input handling
25967ec681f3Smrg-  turnip: use buffer size instead of bo size for VFD_FETCH_SIZE
25977ec681f3Smrg-  freedreno/registers: add RB_CCU_CNTL bitfields
25987ec681f3Smrg-  freedreno/a6xx: set bypass RB_CCU_CNTL value for blitter
25997ec681f3Smrg-  turnip: RB_CCU_CNTL fixes
26007ec681f3Smrg-  turnip: split up gmem/tile alignment
26017ec681f3Smrg-  turnip: fix nir validate failure from push constant lowering
26027ec681f3Smrg-  turnip: disable 8x msaa
26037ec681f3Smrg-  turnip: save attachment samples in renderpass state
26047ec681f3Smrg-  turnip: use dirty bits for dynamic viewport/scissor state
26057ec681f3Smrg-  turnip: rework format helpers
26067ec681f3Smrg-  turnip: add vk_format_is_snorm/is_float
26077ec681f3Smrg-  turnip: new clear/blit implementation with shader path fallback
26087ec681f3Smrg-  freedreno/computerator: support nop prefix
26097ec681f3Smrg-  freedreno/computerator: support bindless sampler instructions
26107ec681f3Smrg-  freedreno/ir3: fix emit_tex_info split_dest
26117ec681f3Smrg-  freedreno/ir3: don't overwrite wrmask in ir3_SAM
26127ec681f3Smrg-  turnip: compute render_components/srgb_cntl at renderpass creation
26137ec681f3Smrg   time
26147ec681f3Smrg-  turnip: don't limit framebuffer size to image size
26157ec681f3Smrg-  turnip: image_view rework
26167ec681f3Smrg-  nir: add common convert_ycbcr for vulkan csc
26177ec681f3Smrg-  nir: convert_ycbcr: preserve alpha channel
26187ec681f3Smrg-  anv: use common nir_convert_ycbcr
26197ec681f3Smrg-  radv: use common nir_convert_ycbcr
26207ec681f3Smrg-  turnip: fix GMEM resolve in CmdNextSubpass
26217ec681f3Smrg-  turnip: disable depth test for S8_UINT attachment
26227ec681f3Smrg-  turnip: improve GMEM load/store logic
26237ec681f3Smrg-  turnip: enable VK_FORMAT_S8_UINT as stencil format
26247ec681f3Smrg-  turnip: set shader key msaa field
26257ec681f3Smrg-  turnip: implement VK_EXT_sample_locations
26267ec681f3Smrg-  turnip: implement VK_EXT_filter_cubic
26277ec681f3Smrg-  turnip: enable cube arrays
26287ec681f3Smrg-  turnip: implement VK_EXT_sampler_filter_minmax
26297ec681f3Smrg-  turnip: divide cube map depth by 6
26307ec681f3Smrg-  freedreno/ir3: fix 16-bit ssbo access
26317ec681f3Smrg-  freedreno/ir3: set even bit for f2f16_rtne
26327ec681f3Smrg-  freedreno/ir3: fix incorrect conversion folding
26337ec681f3Smrg-  turnip: remove unused RB_UNKNOWN_8E04_blit
26347ec681f3Smrg-  turnip: use RESOLVE_TS event
26357ec681f3Smrg-  turnip: add adreno 650
26367ec681f3Smrg-  nir: add pack_32_2x16_split/unpack_32_2x16_split lowering
26377ec681f3Smrg-  freedreno/ir3: run nir_lower_pack
26387ec681f3Smrg-  turnip: fix wrong substream size in parse_multisample_and_color_blend
26397ec681f3Smrg
26407ec681f3SmrgJordan Justen (6):
26417ec681f3Smrg
26427ec681f3Smrg-  intel/compiler: Restrict cs_threads to 64
26437ec681f3Smrg-  intel: Update TGL PCI strings
26447ec681f3Smrg-  intel: Add TGL PCI ID
26457ec681f3Smrg-  intel/dev: Split .num_subslices out of GEN12_FEATURES macro
26467ec681f3Smrg-  intel/dev: Add device info for RKL
26477ec681f3Smrg-  docs/relnotes/new_features.txt: Add RKL to 20.1 release notes
26487ec681f3Smrg
26497ec681f3SmrgJose Maria Casanova Crespo (5):
26507ec681f3Smrg
26517ec681f3Smrg-  broadcom: Fix implicit declaration of ffs for Android build
26527ec681f3Smrg-  v3d: Sync on last CS when non-compute stage uses resource written by
26537ec681f3Smrg   CS
26547ec681f3Smrg-  v3d: Primitive Counts Feedback needs an extra 32-bit padding.
26557ec681f3Smrg-  v3d: Fix swizzle in DXT3 and DXT5 formats
26567ec681f3Smrg-  v3d: Include supported DXT formats to enable s3tc/dxt extensions
26577ec681f3Smrg
26587ec681f3SmrgJoshua Ashton (3):
26597ec681f3Smrg
26607ec681f3Smrg-  radv: Use TRUNC_COORD on samplers
26617ec681f3Smrg-  radv: Pass logical device to si_emit_graphics
26627ec681f3Smrg-  radeonsi: Use TRUNC_COORD on samplers
26637ec681f3Smrg
26647ec681f3SmrgJosé Fonseca (4):
26657ec681f3Smrg
26667ec681f3Smrg-  meson: Avoid duplicate symbols.
26677ec681f3Smrg-  scons: Prune out unnecessary targets.
26687ec681f3Smrg-  gitlab-ci: Prune all SCons jobs except scons-win64, and allows
26697ec681f3Smrg   failures.
26707ec681f3Smrg-  appveyor: Remove Meson job.
26717ec681f3Smrg
26727ec681f3SmrgJuan A. Suarez Romero (6):
26737ec681f3Smrg
26747ec681f3Smrg-  nir/lower_double_ops: add note for lowering mod
26757ec681f3Smrg-  nir/lower_double_ops: relax lower mod()
26767ec681f3Smrg-  nir/algebraic: coalesce fmod lowering
26777ec681f3Smrg-  anv: use urb_setup_attribs in SBE
26787ec681f3Smrg-  intel/compiler: store the FS inputs in WM prog data
26797ec681f3Smrg-  anv/pipeline: allow more than 16 FS inputs
26807ec681f3Smrg
26817ec681f3SmrgKarol Herbst (18):
26827ec681f3Smrg
26837ec681f3Smrg-  clover: add trivial clCreateCommandQueueWithProperties implementation
26847ec681f3Smrg-  nir/lower_ssbo: handle atomics
26857ec681f3Smrg-  gallium: make handles of set_global_binding 64 bit
26867ec681f3Smrg-  Revert "gallium: make handles of set_global_binding 64 bit"
26877ec681f3Smrg-  nv50, nvc0: fix must_check warning of util_dynarray_resize_bytes
26887ec681f3Smrg-  clover: fix build with single library clang build
26897ec681f3Smrg-  gallium: add PIPE_CAP_SYSTEM_SVM
26907ec681f3Smrg-  clover: add stubs for SVM
26917ec681f3Smrg-  clover: implement CL_DEVICE_SVM_CAPABILITIES
26927ec681f3Smrg-  clover: implement clSetKernelArgSVMPointer
26937ec681f3Smrg-  clover: implement SVM functions for devices with fine grained system
26947ec681f3Smrg   SVM support
26957ec681f3Smrg-  clover: implement cl_arm_shared_virtual_memory
26967ec681f3Smrg-  clover: expose cl_arm_shared_virtual_memory for devices with SVM
26977ec681f3Smrg   support
26987ec681f3Smrg-  nvc0: enable ASTC and ETC on GM20B
26997ec681f3Smrg-  mesa: fix enum value of VIEWPORT_SWIZZLE_POSITIVE_W_NV
27007ec681f3Smrg-  gallium: initialize viewport swizzle in cso_set_viewport_dims
27017ec681f3Smrg-  Revert "nvc0: fix line width on GM20x+"
27027ec681f3Smrg-  st/mesa: properly guard fallback_copy_texsubimage aginst failed maps
27037ec681f3Smrg
27047ec681f3SmrgKenneth Graunke (14):
27057ec681f3Smrg
27067ec681f3Smrg-  intel/genxml: Drop "reserved" enum
27077ec681f3Smrg-  isl: Fix the android build.
27087ec681f3Smrg-  iris: Dump frame markers with INTEL_DEBUG=submit
27097ec681f3Smrg-  iris: Trim "../../src/gallium/drivers/iris/" out of debug dump
27107ec681f3Smrg   filenames
27117ec681f3Smrg-  iris: Make mocs an inline helper in iris_resource.h
27127ec681f3Smrg-  iris: Fix BLORP vertex buffers to respect ISL MOCS settings
27137ec681f3Smrg-  iris: Set MOCS for constant packets on Gen12+
27147ec681f3Smrg-  intel/compiler: Drop nir_lower_to_source_mods() and related handling.
27157ec681f3Smrg-  intel/compiler: Put back saturate on [iu]add_sat opcodes
27167ec681f3Smrg-  intel/compiler: Don't copy prop source mods into PICK_HIGH_32BIT
27177ec681f3Smrg-  intel/compiler: Delete abs/neg handling in fsign code
27187ec681f3Smrg-  intel/compiler: Don't create 64-bit src1 immediates in
27197ec681f3Smrg   opt_peephole_sel
27207ec681f3Smrg-  nir: Actually do load/store vectorization beyond vec2
27217ec681f3Smrg-  iris: Fix downcast of bound_vertex_buffers from uint64_t to int
27227ec681f3Smrg
27237ec681f3SmrgKonrad Dybcio (1):
27247ec681f3Smrg
27257ec681f3Smrg-  freedreno/a4xx: enable A405
27267ec681f3Smrg
27277ec681f3SmrgKristian Høgsberg (39):
27287ec681f3Smrg
27297ec681f3Smrg-  nir: Delete unused is_var_constant() helper
27307ec681f3Smrg-  nir: Make unroll pragma work on clang
27317ec681f3Smrg-  freedreno/fdperf: Cast away some ignored return values
27327ec681f3Smrg-  spirv/opencl: Cast opcode up front to avoid warnings
27337ec681f3Smrg-  glsl: Use 'using' to be explicit about visitor overloads
27347ec681f3Smrg-  nir: Remove always-true assert
27357ec681f3Smrg-  turnip: Be explicit about converting vk compare func to a6xx
27367ec681f3Smrg-  freedreno/a6xx: Add fd6_resource_screen_init()
27377ec681f3Smrg-  freedreno: Set up supported modifiers in fd*_resource_screen_init()
27387ec681f3Smrg-  freedreno: Add layout_resource_for_modifier screen vfunc
27397ec681f3Smrg-  freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED
27407ec681f3Smrg-  turnip: Drop explicit configure opt-in for turnip
27417ec681f3Smrg-  ci: Drop turnip opt-in option
27427ec681f3Smrg-  freedreno/ir3: Set IR3_REG_HALF flag on src as well in immediate MOV
27437ec681f3Smrg-  Mark a few static inline helpers with ASSERTED
27447ec681f3Smrg-  main/get: Converted type conversion macros to inline functions
27457ec681f3Smrg-  nir/types: Add glsl_float16_type() helper
27467ec681f3Smrg-  freedreno/ir3: Lower output precision
27477ec681f3Smrg-  Revert "glsl: Use a simpler formula for tanh"
27487ec681f3Smrg-  Revert "spirv: Use a simpler and more correct implementaiton of
27497ec681f3Smrg   tanh()"
27507ec681f3Smrg-  freedreno/ir3: Don't fold conversions into sign
27517ec681f3Smrg-  glsl: Add ir_constant constructor for fp16
27527ec681f3Smrg-  glsl: Add fp16 case for ir_triop_lrp optimization
27537ec681f3Smrg-  glsl: Implement constant propagation for fp16
27547ec681f3Smrg-  glsl: Expand fp16 to float before constant expression evaluation
27557ec681f3Smrg-  glsl: Add type queries for fp16+float and fp16+float+double
27567ec681f3Smrg-  glsl/lower_instructions: Handle fp16 for FDIV_TO_MUL_RCP
27577ec681f3Smrg-  radeonsi: Stop exposing PIPE_SHADER_CAP_FP16
27587ec681f3Smrg-  turnip: Add missing VKAPI_ATTR annotations
27597ec681f3Smrg-  turnip: Stub out VK_KHR_external_{fence,semaphore}_fd
27607ec681f3Smrg-  turnip: Make Android platform build
27617ec681f3Smrg-  turnip: Drop dep_llvm from dependencies
27627ec681f3Smrg-  freedreno/ir3: Fix sz vs class confusion
27637ec681f3Smrg-  freedreno/computerator: Decouple ir3 assembler
27647ec681f3Smrg-  freedreno/ir3: Move ir3 assembler to backend compiler
27657ec681f3Smrg-  freedreno/ir3: Parse, but ignore @in, @out and @tex headers
27667ec681f3Smrg-  freedreno/ir3: Reset lex line number when we start parsing
27677ec681f3Smrg-  freedreno/ir3: Print @tex write mask using 0x%x
27687ec681f3Smrg-  freedreno: Use the right amount of &'s
27697ec681f3Smrg
27707ec681f3SmrgKrzysztof Raszkowski (10):
27717ec681f3Smrg
27727ec681f3Smrg-  gallium/swr: fix gcc warnings
27737ec681f3Smrg-  gallium/swr: Fix gcc 4.8.5 compile error
27747ec681f3Smrg-  gallium/swr: Fix llvm11 compilation issues
27757ec681f3Smrg-  gallium/swr: simplify environmental variabled expansion code
27767ec681f3Smrg-  gallium/swr: fix rdtsc debug statistics mechanism
27777ec681f3Smrg-  gallium/swr: Fix min/max range index draw
27787ec681f3Smrg-  Revert "gallium/swr: Fix min/max range index draw"
27797ec681f3Smrg-  gallium/swr: Fix vcvtph2ps llvm intrinsic compile error
27807ec681f3Smrg-  gallium/swr: Fix array stride problem.
27817ec681f3Smrg-  gallium/swr: Re-enable scratch space for client-memory buffers
27827ec681f3Smrg
27837ec681f3SmrgLeandro Ribeiro (1):
27847ec681f3Smrg
27857ec681f3Smrg-  i965: remove duplicated comment
27867ec681f3Smrg
27877ec681f3SmrgLeo Liu (1):
27887ec681f3Smrg
27897ec681f3Smrg-  radeon/jpeg: fix the jpeg dt_pitch with YUYV format
27907ec681f3Smrg
27917ec681f3SmrgLepton Wu (1):
27927ec681f3Smrg
27937ec681f3Smrg-  virgl: Use ETC2 formats directly when possible.
27947ec681f3Smrg
27957ec681f3SmrgLionel Landwerlin (49):
27967ec681f3Smrg
27977ec681f3Smrg-  iris: implement gen12 post sync pipe control workaround
27987ec681f3Smrg-  anv: implement gen9 post sync pipe control workaround
27997ec681f3Smrg-  anv: implement gen12 post sync pipe control workaround
28007ec681f3Smrg-  anv: set MOCS on push constants
28017ec681f3Smrg-  mesa: add INTEL_blackhole_render
28027ec681f3Smrg-  i965: enable INTEL_blackhole_render
28037ec681f3Smrg-  st: add support for INTEL_blackhole_render
28047ec681f3Smrg-  iris: add support INTEL_blackhole_render
28057ec681f3Smrg-  intel/tools/aub_dump: move aub file initialization to maybe_init()
28067ec681f3Smrg-  intel/tools/aub_dump: fix crash when using the default legacy context
28077ec681f3Smrg-  intel/aub_dump: stub the waits when overriding the device
28087ec681f3Smrg-  intel/tools/dump_gpu: fix getparam values
28097ec681f3Smrg-  anv: stop storing prog param data into shader blobs
28107ec681f3Smrg-  intel/decoder: don't consider header fields past dword0
28117ec681f3Smrg-  isl: implement linear tiling row pitch requirement for display
28127ec681f3Smrg-  isl: properly filter supported display modifiers on Gen9+
28137ec681f3Smrg-  isl: only apply main surface ccs pitch constraint with CCS
28147ec681f3Smrg-  isl: drop min row pitch alignment when set by the driver
28157ec681f3Smrg-  intel: add new TGL pci ids
28167ec681f3Smrg-  i965/iris: fix crash when calling GetPerfQueryDataINTEL
28177ec681f3Smrg-  vulkan/overlay: Add a workaround semaphore for application presenting
28187ec681f3Smrg   without one
28197ec681f3Smrg-  intel/perf: move register definition to special file
28207ec681f3Smrg-  intel/perf: break GL query stuff away
28217ec681f3Smrg-  intel/perf: move mdapi query definitions to their own file
28227ec681f3Smrg-  intel/perf: document meaning of query field
28237ec681f3Smrg-  intel/perf: store the probed i915-perf version
28247ec681f3Smrg-  isl: set bpb for Y8_UNORM
28257ec681f3Smrg-  isl: don't warn in physical extent calculation for yuv formats
28267ec681f3Smrg-  intel/aub_viewer: fix access to freed memory
28277ec681f3Smrg-  drm-shim: return device platform as specified
28287ec681f3Smrg-  drm-shim: stub libdrm's use of realpath()
28297ec681f3Smrg-  iris: properly free resources on BO allocation failure
28307ec681f3Smrg-  iris: share buffer managers accross screens
28317ec681f3Smrg-  iris: make resources take a ref on the screen object
28327ec681f3Smrg-  i965: store DRM fd on intel_screen
28337ec681f3Smrg-  i965: share buffer managers across screens
28347ec681f3Smrg-  iris: drop cache coherent cpu mapping for external BO
28357ec681f3Smrg-  intel/perf: Enable MDAPI queries for Gen12
28367ec681f3Smrg-  anv: skip writing perfcntr in results on Gen12+
28377ec681f3Smrg-  util/sparse_free_list: manipulate node pointers using atomic
28387ec681f3Smrg   primitives
28397ec681f3Smrg-  iris: fail screen creation when kernel support is not there
28407ec681f3Smrg-  include/drm-uapi: bump headers
28417ec681f3Smrg-  intel/perf: store default sseu configuration
28427ec681f3Smrg-  intel/perf: specify sseu configuration when supported
28437ec681f3Smrg-  anv: force whole EU array to be powered for perf queries
28447ec681f3Smrg-  drm-shim: provide a valid fake syncobj handle at creation
28457ec681f3Smrg-  drm-shim: stub syncobj wait ioctl
28467ec681f3Smrg-  iris: don't assert on unfinished aux import in copy paths
28477ec681f3Smrg-  anv: don't expose VK_INTEL_performance_query without kernel support
28487ec681f3Smrg
28497ec681f3SmrgLiviu Prodea (2):
28507ec681f3Smrg
28517ec681f3Smrg-  scons/windows: Support build with LLVM 10.
28527ec681f3Smrg-  util: Make process_test path compatible with mingw native toolchains
28537ec681f3Smrg
28547ec681f3SmrgLouis-Francis Ratté-Boulianne (7):
28557ec681f3Smrg
28567ec681f3Smrg-  glsl/linker: add DisableTransformFeedbackPacking workaround
28577ec681f3Smrg-  glsl/linker: handle array/struct members for DisableXfbPacking
28587ec681f3Smrg-  glsl/linker: add xfb workaround for modified built-in variables
28597ec681f3Smrg-  gallium: add PIPE_CAP_PACKED_STREAM_OUTPUT
28607ec681f3Smrg-  gallium: add PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED
28617ec681f3Smrg-  gallium: add PIPE_CAP_PSIZ_CLAMPED
28627ec681f3Smrg-  panfrost: fix transform feedback
28637ec681f3Smrg
28647ec681f3SmrgLucas Stach (1):
28657ec681f3Smrg
28667ec681f3Smrg-  etnaviv: retarget transfer to render resource when necessary
28677ec681f3Smrg
28687ec681f3SmrgMarek Olšák (254):
28697ec681f3Smrg
28707ec681f3Smrg-  vbo: move GLvertexformat initialization into a template header file
28717ec681f3Smrg   for reuse
28727ec681f3Smrg-  vbo: use the template for noop GLvertexformat initialization
28737ec681f3Smrg-  vbo: use the template for save GLvertexformat initialization
28747ec681f3Smrg-  vbo: move reusable code from vbo_attrib_tmp.h into vbo_util.h
28757ec681f3Smrg-  mesa: implement missing display list functions while switching to the
28767ec681f3Smrg   template
28777ec681f3Smrg-  radeonsi: don't report that multi-plane formats are supported
28787ec681f3Smrg-  radeonsi: fix the DCC MSAA bug workaround
28797ec681f3Smrg-  radeonsi: don't update states for the DCC MSAA bug on GFX6-7
28807ec681f3Smrg-  glx: print FPS with 2 decimal places
28817ec681f3Smrg-  mesa: fix incorrect uses of FLUSH_CURRENT
28827ec681f3Smrg-  mesa: remove FLUSH_CURRENT calls that have no effect
28837ec681f3Smrg-  mesa: import PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET handling
28847ec681f3Smrg-  vbo: create the immediate mode buffer only in vbo_exec_vtx_map
28857ec681f3Smrg-  vbo: skip FlushMappedBufferRange for glBegin/End by using a
28867ec681f3Smrg   persistent mapping
28877ec681f3Smrg-  vbo: don't unmap persistent buffer mappings for glBegin/End
28887ec681f3Smrg-  vbo: remove immediate mode code that doesn't do anything and simplify
28897ec681f3Smrg   stuff
28907ec681f3Smrg-  vbo: interleave attrsz, attrtype, and active_sz in memory
28917ec681f3Smrg-  vbo: remove a funky recursive call in glBegin
28927ec681f3Smrg-  vbo: don't check ctx->NewState twice in glBegin
28937ec681f3Smrg-  vbo: keep the immediate mode buffer always mapped for simplicity
28947ec681f3Smrg-  vbo: don't set FLUSH_UPDATE_CURRENT for glVertex
28957ec681f3Smrg-  vbo: pass only either uint32_t or uint64_t into ATTR_UNION
28967ec681f3Smrg-  vbo: don't store glVertex values temporarily into exec
28977ec681f3Smrg-  vbo: optimize resizing vertex attributes during immediate mode
28987ec681f3Smrg-  vbo: fix resizing 64-bit vertex attributes
28997ec681f3Smrg-  vbo: use FlushVertices flags properly and clear NeedFlush correctly
29007ec681f3Smrg-  vbo: increase the size of the immediate mode buffer to decrease draw
29017ec681f3Smrg   count
29027ec681f3Smrg-  vbo: add/update unlikely statements in ATTR_UNION
29037ec681f3Smrg-  vbo: delay flagging FLUSH_STORED_VERTICES until glEnd
29047ec681f3Smrg-  vbo: also map the immediate mode buffer for read
29057ec681f3Smrg-  vbo: clean up resetting vertex attribs
29067ec681f3Smrg-  vbo: merge use_buffer_objects into vbo_CreateContext to skip the big
29077ec681f3Smrg   malloc
29087ec681f3Smrg-  í965: don't use \_mesa_prim::is_indirect
29097ec681f3Smrg-  mesa: remove unused \_mesa_prim::is_indirect
29107ec681f3Smrg-  mesa: don't use bitfields in \_mesa_prim
29117ec681f3Smrg-  st/mesa: optimize st_update_array with ALWAYSINLINE
29127ec681f3Smrg-  radeonsi: don't wait for shader compilation to finish when destroying
29137ec681f3Smrg   a context
29147ec681f3Smrg-  mesa: translate into gallium vertex formats in mesa/main
29157ec681f3Smrg-  mesa: remove unused \_mesa_draw_indirect
29167ec681f3Smrg-  st/mesa: always inline the code setting non-64bit vertex elements
29177ec681f3Smrg-  st/mesa: simplify determination whether a draw has user vertex
29187ec681f3Smrg   buffers
29197ec681f3Smrg-  st/mesa: simplify determination whether a draw needs min/max index
29207ec681f3Smrg-  st/mesa: change some loops from while to do..while in st_atom_array.c
29217ec681f3Smrg-  st/mesa: make st_setup_current static
29227ec681f3Smrg-  st/mesa: simplify releasing the current attrib buffer
29237ec681f3Smrg-  gallium/u_upload_mgr: reduce dereferences by adding buffer_size
29247ec681f3Smrg-  gallium/u_upload_mgr: don't do align twice in the u_upload_alloc fast
29257ec681f3Smrg   path
29267ec681f3Smrg-  gallium/u_vbuf: adjust the heuristic for unrolling indices
29277ec681f3Smrg-  gallium/cso_hash: inline a bunch of functions
29287ec681f3Smrg-  gallium/cso_hash: make cso_hash declared within structures instead of
29297ec681f3Smrg   alloc'd
29307ec681f3Smrg-  gallium/cso_hash: remove always constant variable nodeSize
29317ec681f3Smrg-  gallium/cso_hash: cosmetic changes, no behavior changes
29327ec681f3Smrg-  gallium/cso_hash: remove another layer of pointer indirection
29337ec681f3Smrg-  st/mesa: try to fix MSVC build failure due to ALWAYS_INLINE
29347ec681f3Smrg-  vbo: remove dead code in vbo_can_merge_prims
29357ec681f3Smrg-  vbo: remove redundant code in vbo_exec_fixup_vertex
29367ec681f3Smrg-  mesa: document \_mesa_prim::begin/end
29377ec681f3Smrg-  mesa: don't use memset in glDrawArrays
29387ec681f3Smrg-  mesa: fix immediate mode with tessellation and varying patch vertices
29397ec681f3Smrg-  gallium/util: remove unused u_surfaces.c/h
29407ec681f3Smrg-  util: remove the dependency on kcmp.h
29417ec681f3Smrg-  nir: fix gl_nir_lower_images for bindless images
29427ec681f3Smrg-  tgsi_to_nir: set num_images and num_samplers with holes correctly
29437ec681f3Smrg-  gallium/hash_table: consolidate hash tables with pointer keys
29447ec681f3Smrg-  gallium/hash_table: consolidate hash tables with FD keys
29457ec681f3Smrg-  gallium/hash_table: use the same callback signatures as
29467ec681f3Smrg   util/hash_table
29477ec681f3Smrg-  gallium/hash_table: turn it into a wrapper around util/hash_table
29487ec681f3Smrg-  gallium/hash_table: remove some function wrappers
29497ec681f3Smrg-  mesa: remove leftovers from ARB_shadow_ambient
29507ec681f3Smrg-  mesa: call FLUSH_VERTICES before updating CoordReplace
29517ec681f3Smrg-  i965: stop using "indirect" parameter from Driver.Draw (non-indirect)
29527ec681f3Smrg-  mesa: remove unused "indirect" parameter from Driver.Draw
29537ec681f3Smrg-  gallium/cso_hash: pack cso_node better
29547ec681f3Smrg-  gallium/cso_hash: inline struct cso_hash_data
29557ec681f3Smrg-  gallium: pass cso_velems_state into cso_context instead of
29567ec681f3Smrg   pipe_vertex_element
29577ec681f3Smrg-  gallium/u_threaded: fix uploading user indices with start != 0
29587ec681f3Smrg-  gallium/u_threaded: convert dividing by index_size to a bit shift
29597ec681f3Smrg-  mesa/i965: remove \_mesa_prim::indirect_offset
29607ec681f3Smrg-  mesa: remove redundant \_mesa_prim::is_indexed
29617ec681f3Smrg-  mesa: move num_instances and base_instance out of \_mesa_prim
29627ec681f3Smrg-  mesa: clean up glMultiDrawElements code, use alloca for small draw
29637ec681f3Smrg   count (v2)
29647ec681f3Smrg-  mesa: don't unroll glMultiDrawElements if one count is 0
29657ec681f3Smrg-  mesa: optimize glMultiDrawArrays, call Draw only once (v2)
29667ec681f3Smrg-  mesa: fix incorrect prim.begin/end for glMultiDrawElements
29677ec681f3Smrg-  nir: replace GCC unroll with an option that works on GCC < 8.0
29687ec681f3Smrg-  gallivm: fix 5 warnings
29697ec681f3Smrg-  nir: fix 5 warnings
29707ec681f3Smrg-  mesa: fix 11 warnings
29717ec681f3Smrg-  gallium/u_vbuf: silence a warning by using unreachable
29727ec681f3Smrg-  mesa: add index_size_shift = log2(index_size) into
29737ec681f3Smrg   \_mesa_index_buffer
29747ec681f3Smrg-  mesa: replace some index_size multiplications and divisions with
29757ec681f3Smrg   shifts
29767ec681f3Smrg-  vbo: don't look at the second draw's count when merging 2 glBegin/End
29777ec681f3Smrg   draws
29787ec681f3Smrg-  vbo: deduplicate copy_vertices functions
29797ec681f3Smrg-  vbo: clean up vbo_copy_vertices
29807ec681f3Smrg-  vbo: handle GS and tess primitive types when splitting Begin/End
29817ec681f3Smrg-  vbo: clean up conditional blocks in ATTR_UNION
29827ec681f3Smrg-  vbo: fold code from vbo_exec_fixup_vertex to
29837ec681f3Smrg   vbo_exec_wrap_upgrade_vertex
29847ec681f3Smrg-  Revert "mesa: check for z=0 in \_mesa_Vertex3dv()"
29857ec681f3Smrg-  mesa: remove \_mesa_index_buffer::index_size in favor of
29867ec681f3Smrg   index_size_shift
29877ec681f3Smrg-  mesa: optimize get_index_size
29887ec681f3Smrg-  mesa: deduplicate draw indirect functions
29897ec681f3Smrg-  vbo: merge more primitive types for glBegin/End (v2)
29907ec681f3Smrg-  vbo: merge draws even when begin==0 or end==0
29917ec681f3Smrg-  glthread: don't generate the sync fallback if the call size is not
29927ec681f3Smrg   variable
29937ec681f3Smrg-  glthread: don't prefix variable_data with const
29947ec681f3Smrg-  glthread: inline \_mesa_unmarshal_dispatch_cmd and convert the switch
29957ec681f3Smrg   to a table
29967ec681f3Smrg-  glthread: reduce pointer dereferences in glthread_unmarshal_batch
29977ec681f3Smrg-  glthread: use int instead of size_t where it's OK
29987ec681f3Smrg-  glthread: simplify repeated function sequences in marshal_generated.c
29997ec681f3Smrg-  glthread: don't insert \_mesa_post_marshal_hook into every function
30007ec681f3Smrg-  glthread: don't increment variable_data if it's the last
30017ec681f3Smrg   variable-size param
30027ec681f3Smrg-  glthread: add GL_DRAW_INDIRECT_BUFFER tracking and generator support
30037ec681f3Smrg-  glthread: add/update count and marshal fields for many GL functions
30047ec681f3Smrg-  glthread: handle complex pointer parameters and support GL functions
30057ec681f3Smrg   with strings
30067ec681f3Smrg-  glthread: check the size of all variable params and clean up the code
30077ec681f3Smrg-  glthread: replace custom ClearBuffer marshalling with generated one
30087ec681f3Smrg-  glthread: add support for TexParameteri and SamplerParameteri
30097ec681f3Smrg   functions
30107ec681f3Smrg-  glthread: add support for glFog, glLight, glLightModel, glTexEnv,
30117ec681f3Smrg   glTexGen
30127ec681f3Smrg-  glthread: add support for glClearNamedFramebuffer, glMaterial,
30137ec681f3Smrg   glPointParameter
30147ec681f3Smrg-  glthread: add support for glCallLists, glPatchParameterfv
30157ec681f3Smrg-  glthread: add support for glMemoryObjectParameteriv,
30167ec681f3Smrg   glSemaphoreParameterui64v
30177ec681f3Smrg-  glthread: don't insert an empty line after (void) cmd;
30187ec681f3Smrg-  glthread: add marshal_call_after and remove custom glFlush and
30197ec681f3Smrg   glEnable code
30207ec681f3Smrg-  glthread: track for each VAO whether the user has set a user pointer
30217ec681f3Smrg-  glthread: sync instead of disabling glthread for non-VBO pointers
30227ec681f3Smrg-  glthread: replace custom glBindBuffer marshalling with generated one
30237ec681f3Smrg-  glthread: merge glBufferData and glNamedBufferData into 1 set of
30247ec681f3Smrg   functions
30257ec681f3Smrg-  glthread: merge glBufferSubData and glNamedBufferSubData into 1 set
30267ec681f3Smrg   of functions
30277ec681f3Smrg-  glthread: add custom marshalling for glNamedBuffer(Sub)DataEXT
30287ec681f3Smrg-  glthread: fix a crash with incorrect glShaderSource parameters
30297ec681f3Smrg-  glthread: fall back if a param size is non-zero and a pointer param
30307ec681f3Smrg   is NULL
30317ec681f3Smrg-  radeonsi: add a bug workaround for NGG - LATE_ALLOC_GS
30327ec681f3Smrg-  ac: add a bug workaround for the 100% NGG culling case
30337ec681f3Smrg-  radeonsi: determine uses_bindless_samplers correctly
30347ec681f3Smrg-  st/mesa: flush the bitmap cache before st/dri and vbo flushes
30357ec681f3Smrg-  st/mesa: fix a possible crash with selection and feedback modes
30367ec681f3Smrg-  gallium/cso_context: remove cso_delete_xxx_shader helpers to fix the
30377ec681f3Smrg   live cache
30387ec681f3Smrg-  st/mesa: keep serialized NIR instead of nir_shader in st_program
30397ec681f3Smrg-  vbo: use vbo_exec_wrap_upgrade_vertex for glVertex in ATTR_UNION
30407ec681f3Smrg-  vbo: fix transitions from glVertexN to glVertexM where M < N
30417ec681f3Smrg-  vbo: fix vbo_copy_vertices for GL_PATCHES and adjacency primitive
30427ec681f3Smrg   types
30437ec681f3Smrg-  gallium: add PIPE_CAP_DRAW_INFO_START_WITH_USER_INDICES
30447ec681f3Smrg-  mesa: don't unroll glMultiDrawElements with user indices for gallium
30457ec681f3Smrg-  radeonsi/gfx10: cache metadata in L2 on small chips
30467ec681f3Smrg-  radeonsi: set better tessellation tunables on gfx9 and gfx10
30477ec681f3Smrg-  radeonsi: tune primitive binning for small chips
30487ec681f3Smrg-  ac: add radeon_info::use_late_alloc to control LATE_ALLOC globally
30497ec681f3Smrg-  ac: disable late alloc on small gfx10 chips
30507ec681f3Smrg-  gallium/u_threaded: don't sync the thread for all unsychronized
30517ec681f3Smrg   mappings
30527ec681f3Smrg-  gallium/u_vbuf: simplify the first if statement in
30537ec681f3Smrg   u_vbuf_upload_buffers
30547ec681f3Smrg-  ac: unify denorm setting enforcement
30557ec681f3Smrg-  ac: set new LLVM denormal flags
30567ec681f3Smrg-  ac: don't set old denormals flags with LLVM >= 11
30577ec681f3Smrg-  nir: fix clip/cull_distance_array_size in
30587ec681f3Smrg   nir_lower_clip_cull_distance_arrays
30597ec681f3Smrg-  mesa: use vbo_attrib_tmp.h to generate display list vertex attrib
30607ec681f3Smrg   functions
30617ec681f3Smrg-  mesa: remove redundant api_loopback functions
30627ec681f3Smrg-  glthread: align the batch buffer to 8 bytes for pointers and doubles
30637ec681f3Smrg   again
30647ec681f3Smrg-  glthread: enable display lists
30657ec681f3Smrg-  glthread: track VAOs created by CreateVertexArrays
30667ec681f3Smrg-  glthread: don't execute any custom VAO and BindBuffer code in the
30677ec681f3Smrg   Core profile
30687ec681f3Smrg-  glthread: remove debug_print_marshal function
30697ec681f3Smrg-  glthread: clean up debug_print_sync code
30707ec681f3Smrg-  glthread: don't declare unmarshal functions as inline
30717ec681f3Smrg-  winsys/radeon: change to 3-space indentation
30727ec681f3Smrg-  driconf: enable glthread for "From The Depths"
30737ec681f3Smrg-  glthread: remove \_mesa_post_marshal_hook, because it's not very
30747ec681f3Smrg   useful
30757ec681f3Smrg-  glthread: simplify printing safe_mul in gl_marshal.py
30767ec681f3Smrg-  glthread: autogenerate prototypes for custom-marshalled functions
30777ec681f3Smrg-  glthread: move buffer functions into glthread_bufferobj.c
30787ec681f3Smrg-  glthread: rename marshal.h/c to glthread_marshal.h and
30797ec681f3Smrg   glthread_shaderobj.c
30807ec681f3Smrg-  mesa: put gl_thread_state inside gl_context to remove pointer
30817ec681f3Smrg   indirection
30827ec681f3Smrg-  glthread: handle buffer unbinding via glDeleteBuffers
30837ec681f3Smrg-  glthread: rename non_vbo helper functions
30847ec681f3Smrg-  glthread: track which vertex array attribs are enabled
30857ec681f3Smrg-  glthread: ignore vertex arrays with user pointers if they're disabled
30867ec681f3Smrg-  glthread: remove the marshal_fail XML attribute
30877ec681f3Smrg-  vbo,gallium: make glBegin/End buffer size configurable by drivers
30887ec681f3Smrg-  ac: fix fast division
30897ec681f3Smrg-  st/mesa: fix use of uninitialized memory due to st_nir_lower_builtin
30907ec681f3Smrg-  glthread: inline SET_func and add -O1 to build
30917ec681f3Smrg   \_mesa_create_marshal_table faster
30927ec681f3Smrg-  glthread: declare marshal and unmarshal functions as non-static
30937ec681f3Smrg-  glthread: compile marshal_generated.c faster by breaking it up into 8
30947ec681f3Smrg   files
30957ec681f3Smrg-  nir: add and gather shader_info::writes_memory
30967ec681f3Smrg-  glsl_to_tgsi: set shader_info::writes_memory
30977ec681f3Smrg-  mesa: allow out-of-order drawing to optimize immediate mode if it's
30987ec681f3Smrg   safe
30997ec681f3Smrg-  radeonsi: enable full out-of-order drawing when
31007ec681f3Smrg   allow_draw_out_of_order is set
31017ec681f3Smrg-  mesa: try to fix the android build
31027ec681f3Smrg-  Move compiler.h and imports.h/c from src/mesa/main into src/util
31037ec681f3Smrg-  mesa: don't use <> for including internal headers
31047ec681f3Smrg-  util: stop including files from mesa/main
31057ec681f3Smrg-  radv: stop including files from mesa/main
31067ec681f3Smrg-  util: don't include p_defines.h and u_pointer.h from gallium
31077ec681f3Smrg-  util: remove duplicated MALLOC_STRUCT and CALLOC_STRUCT
31087ec681f3Smrg-  radeonsi: remove obsolete TODO comment related to compute-based
31097ec681f3Smrg   culling
31107ec681f3Smrg-  radeonsi: fix incorrect ordered_wave_id initilization for
31117ec681f3Smrg   compute-based culling
31127ec681f3Smrg-  radeonsi: set amdgpu-gds-size for mode == 2 of compute-based culling
31137ec681f3Smrg-  radeonsi: always create wait_mem_scratch for compute-based culling
31147ec681f3Smrg-  radeonsi: add num_vbos_in_user_sgprs into the shader cache key
31157ec681f3Smrg-  radeonsi/gfx10: don't use NGG culling if compute-based culling is
31167ec681f3Smrg   used
31177ec681f3Smrg-  radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based
31187ec681f3Smrg   culling
31197ec681f3Smrg-  radeonsi/gfx10: user correct ACQUIRE_MEM packet for compute-based
31207ec681f3Smrg   culling
31217ec681f3Smrg-  radeonsi/gfx10: fix the wave size for compute-based culling
31227ec681f3Smrg-  radeonsi/gfx10: fix descriptors and compute registers for
31237ec681f3Smrg   compute-based culling
31247ec681f3Smrg-  gallium/u_threaded: call the driver to pin threads to L3 immediately
31257ec681f3Smrg-  st/mesa: add environment variable pin_app_thread for faster glthread
31267ec681f3Smrg   on AMD Zen
31277ec681f3Smrg-  driconf: whilelist more games for glthread
31287ec681f3Smrg-  mesa: optimize initialization of new VAOs
31297ec681f3Smrg-  mesa: don't ever set NullBufferObj in gl_vertex_array_binding
31307ec681f3Smrg-  mesa: don't ever bind NullBufferObj for glBindBuffer targets
31317ec681f3Smrg-  mesa: don't ever bind NullBufferObj to glBindBuffer(Base,Range) slots
31327ec681f3Smrg-  mesa: remove NullBufferObj
31337ec681f3Smrg-  mesa: remove no longer needed \_mesa_is_bufferobj function
31347ec681f3Smrg-  mesa: precompute \_mesa_primitive_restart_index during state changes
31357ec681f3Smrg-  mesa: split \_mesa_primitive_restart_index into a function without
31367ec681f3Smrg   gl_context
31377ec681f3Smrg-  vbo: expose helper function vbo_get_minmax_index_mapped for glthread
31387ec681f3Smrg-  util: move and adjust the vertex upload heuristic equation from
31397ec681f3Smrg   u_vbuf
31407ec681f3Smrg-  st/mesa: fix a crash due to passing a draw vertex shader into the
31417ec681f3Smrg   driver
31427ec681f3Smrg-  ac: out-of-order rasterization is not supported on gfx10
31437ec681f3Smrg-  ac,radeonsi: simplify checking for Navi1x chips
31447ec681f3Smrg-  radeonsi: use pipe_blend_state::max_rt to update fewer blend
31457ec681f3Smrg   registers
31467ec681f3Smrg-  ac: force enable -structurizecfg-skip-uniform-regions for LLVM 11
31477ec681f3Smrg-  ac: update and document fast math flags used by radeonsi
31487ec681f3Smrg-  ac: generate FMA for inexact instructions for radeonsi
31497ec681f3Smrg-  ac: reassociate FP expressions for inexact instructions for radeonsi
31507ec681f3Smrg-  mesa: replace \_NEW_EVAL with vbo_exec_update_eval_maps
31517ec681f3Smrg-  mesa: reset primitive restart state in glClientAttribDefaultEXT
31527ec681f3Smrg-  mesa: remove exec="dynamic" from Draw functions that are not really
31537ec681f3Smrg   dynamic
31547ec681f3Smrg-  glthread: use 32-bit align instead of 64-bit ALIGN
31557ec681f3Smrg-  glthread: reduce dereferences of the next batch
31567ec681f3Smrg-  glthread: use GLenum16 in batch buffers to save space
31577ec681f3Smrg-  glthread: sort variables in marshal structures to pack them optimally
31587ec681f3Smrg-  gallium: add PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE for glthread
31597ec681f3Smrg-  mesa: add Const.BufferCreateMapUnsynchronizedThreadSafe &
31607ec681f3Smrg   MESA_MAP_THREAD_SAFE
31617ec681f3Smrg-  mesa: add offset_is_int32 param into \_mesa_bind_vertex_buffer for
31627ec681f3Smrg   glthread
31637ec681f3Smrg-  mesa: extend \_mesa_bind_vertex_buffer to take ownership of the
31647ec681f3Smrg   buffer reference
31657ec681f3Smrg-  mesa: replace GLenum target with gl_shader_stage in NewProgram
31667ec681f3Smrg-  ac/surface: rename micro tile mode enums like gfx10 uses them
31677ec681f3Smrg-  ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's
31687ec681f3Smrg   always set
31697ec681f3Smrg-  ac/surface: replace RADEON_SURF_OPTIMIZE_FOR_SPACE with
31707ec681f3Smrg   !FORCE_SWIZZLE_MODE
31717ec681f3Smrg-  ac/surface: match get_display_flag() with expectations for
31727ec681f3Smrg   is_displayable
31737ec681f3Smrg-  ac/surface: don't compute DCC if it's unsupported by DCN on gfx9+
31747ec681f3Smrg-  ac/surface: move non-displayable DCC to the end of the buffer
31757ec681f3Smrg-  ac/surface: add code for gfx10 displayable DCC
31767ec681f3Smrg-  ac/surface: validate that DCC is enabled correctly on gfx9+
31777ec681f3Smrg-  ac: enable displayable DCC on Navi12 & Navi14
31787ec681f3Smrg-  mesa: report GL_INVALID_OPERATION for invalid glTextureBuffer target
31797ec681f3Smrg-  st/mesa: expose more SPIR-V capabilities
31807ec681f3Smrg-  radeonsi: unify and align down the max SSBO/TBO/UBO buffer binding
31817ec681f3Smrg   size
31827ec681f3Smrg-  radeonsi: revert an accidental change in si_clear_buffer
31837ec681f3Smrg-  Revert "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume
31847ec681f3Smrg   it's always set"
31857ec681f3Smrg-  Revert "ac: reassociate FP expressions for inexact instructions for
31867ec681f3Smrg   radeonsi"
31877ec681f3Smrg-  ac/surface: fix MSAA crash with FORCE_SWIZZLE_MODE on gfx9
31887ec681f3Smrg-  radeonsi: fix compilation of monolithic PS
31897ec681f3Smrg-  radeonsi: don't expose 16xAA on chips with 1 RB due to an occlusion
31907ec681f3Smrg   query issue
31917ec681f3Smrg
31927ec681f3SmrgMarek Vasut (4):
31937ec681f3Smrg
31947ec681f3Smrg-  etnaviv: Destroy rsc->pending_ctx set in etna_resource_destroy()
31957ec681f3Smrg-  etnaviv: Emit PE.ALPHA_COLOR_EXT\* on GPUs with half-float support
31967ec681f3Smrg-  etnaviv: Fix depth stencil ops on GC880/GC2000
31977ec681f3Smrg-  etnaviv: Disable seamless cube map on GC880
31987ec681f3Smrg
31997ec681f3SmrgMark Janes (2):
32007ec681f3Smrg
32017ec681f3Smrg-  nir: check shader type before writing to shaderinfo.tess union
32027ec681f3Smrg-  nir: place aligned members after bitfields in shader_info.tess
32037ec681f3Smrg
32047ec681f3SmrgMark Menzynski (2):
32057ec681f3Smrg
32067ec681f3Smrg-  util/blob: Add overwrite function for uint8
32077ec681f3Smrg-  tgsi/util: Change boolean for bool
32087ec681f3Smrg
32097ec681f3SmrgMartin Fuzzey (3):
32107ec681f3Smrg
32117ec681f3Smrg-  freedreno: android: fix build failure on android due to python
32127ec681f3Smrg   version
32137ec681f3Smrg-  freedreno: android: add a6xx-pack.xml.h generation to android build
32147ec681f3Smrg-  freedreno: android: fix build of perfcounters.
32157ec681f3Smrg
32167ec681f3SmrgMathias Fröhlich (19):
32177ec681f3Smrg
32187ec681f3Smrg-  egl: Implement getImage/putImage on pbuffer swrast.
32197ec681f3Smrg-  mesa: Fix FLUSH_VERTICES in SubpixelPrecisionBiasNV.
32207ec681f3Smrg-  egl: Fix A2RGB10 platform_{device,surfaceless} PBuffer configs.
32217ec681f3Smrg-  egl: Factor out dri2_add_pbuffer_configs_for_visuals
32227ec681f3Smrg   {device,surfaceless}.
32237ec681f3Smrg-  mesa: Check for OpenGL state change before flushing vertices.
32247ec681f3Smrg-  mesa: Flush vertices before changing the OpenGL state.
32257ec681f3Smrg-  i965: Move down genX_upload_sbe in profiles.
32267ec681f3Smrg-  iris: Move down iris_emit_sbe_swiz in profiles.
32277ec681f3Smrg-  i965: Use 32 bit u_bit_scan for vertex attribute setup.
32287ec681f3Smrg-  i965: Use the VAOs binding information in array setup.
32297ec681f3Smrg-  i965: Test original vertex array pointer to skip array upload.
32307ec681f3Smrg-  i965: Split merge_inputs and clear_buffers.
32317ec681f3Smrg-  i965: Reorder workaround flags computation.
32327ec681f3Smrg-  i965: Remove glbinding from brw_vertex_element.
32337ec681f3Smrg-  mesa: Remove now unused \_mesa_draw_attrib_and_binding.
32347ec681f3Smrg-  mesa: Remove now unused \_mesa_draw_attrib.
32357ec681f3Smrg-  mesa: Provide gl_vertex_format accessors.
32367ec681f3Smrg-  i965: Make use of the vertex format functions in i965.
32377ec681f3Smrg-  i965: Use gl_vertex_format in brw_vertex_element.
32387ec681f3Smrg
32397ec681f3SmrgMatt Turner (11):
32407ec681f3Smrg
32417ec681f3Smrg-  intel/tools: Do not print type/qualifiers/name for c_literal
32427ec681f3Smrg-  intel/vec4: Make implied_mrf_writes() a vec4_instruction method
32437ec681f3Smrg-  intel/compiler: Remove unnecessary local variables
32447ec681f3Smrg-  intel/compiler: Make instructions_to_schedule a local variable
32457ec681f3Smrg-  intel/compiler: Mark some methods and parameters const
32467ec681f3Smrg-  intel/compiler: Mark visitor parameters to scheduler const
32477ec681f3Smrg-  intel/compiler: Pass backend_shader \* to cfg_t()
32487ec681f3Smrg-  intel/compiler: Pass shader_stats for each SIMD mode
32497ec681f3Smrg-  intel/compiler: Discount NOPs from instruction counts
32507ec681f3Smrg-  isl: Avoid EXPECT_DEATH in unit tests
32517ec681f3Smrg-  meson: Specify the maximum required libdrm in dri.pc
32527ec681f3Smrg
32537ec681f3SmrgMauro Rossi (5):
32547ec681f3Smrg
32557ec681f3Smrg-  android: gallium/auxiliary: fix "Unused source files" in tesselator
32567ec681f3Smrg-  android: aco: fix PIPE_FORMAT related building errors
32577ec681f3Smrg-  android: r600/sfn: fix includes and libmesa_nir dependency
32587ec681f3Smrg-  android: r600/sfn: Add GDS instructions
32597ec681f3Smrg-  android: aco: add various compiler statistics
32607ec681f3Smrg
32617ec681f3SmrgMichel Dänzer (33):
32627ec681f3Smrg
32637ec681f3Smrg-  gitlab-ci: Update to latest ci-templates HEAD
32647ec681f3Smrg-  gitlab-ci: Pass -j4 to make
32657ec681f3Smrg-  gitlab-ci: Merge ccache and libxml2-utils into main apt-get install
32667ec681f3Smrg-  gitlab-ci: Add ppc64el and s390x cross-build jobs
32677ec681f3Smrg-  gitlab-ci: Build radeonsi & RADV in the ppc64el job
32687ec681f3Smrg-  llvmpipe: Bump test timeout to 180 seconds
32697ec681f3Smrg-  gitlab-ci: Only use gstreamer runners for the s390x job for now
32707ec681f3Smrg-  gitlab-ci: Sort random failure softpipe skips
32717ec681f3Smrg-  gitlab-ci: Add three more dEQP-GLES31 tests to softpipe skips
32727ec681f3Smrg-  st/vdpau: Only call is_video_format_supported hook if needed
32737ec681f3Smrg-  winsys/amdgpu: Make local variable r signed
32747ec681f3Smrg-  util: Change os_same_file_description return type from bool to int
32757ec681f3Smrg-  gitlab-ci: Drop "test-" prefix from llvmpipe/softpipe job names
32767ec681f3Smrg-  gitlab-ci: Distribute jobs across more stages
32777ec681f3Smrg-  gitlab-ci: Always name artifacts archive after the job producing it
32787ec681f3Smrg-  gitlab-ci: Don't restrict ppc64el/s390x build jobs to gstreamer
32797ec681f3Smrg   runners
32807ec681f3Smrg-  gitlab-ci: Don't use buster-backports packages by default for
32817ec681f3Smrg   x86_build
32827ec681f3Smrg-  gitlab-ci: Fold scons-swr job into scons job
32837ec681f3Smrg-  gitlab-ci: Move classic driver testing to a new meson-classic job
32847ec681f3Smrg-  llvmpipe: Use uintptr_t for pointer values
32857ec681f3Smrg-  gitlab-ci: Enable more Gallium drivers in meson-i386 job
32867ec681f3Smrg-  gitlab-ci: Restrict s390x/ppc64el jobs to packet runners
32877ec681f3Smrg-  gitlab-ci: Update to current templates
32887ec681f3Smrg-  gitlab-ci: Rename "paths" YAML anchor to "all_paths"
32897ec681f3Smrg-  gitlab-ci/lava: Add needs: for container image to test jobs (again)
32907ec681f3Smrg-  gitlab-ci: Don't require triggering build/test jobs manually
32917ec681f3Smrg-  gitlab-ci: Run merge request pipelines automatically only for Marge
32927ec681f3Smrg   Bot
32937ec681f3Smrg-  gitlab-ci: Use all_paths in .test-manual rules
32947ec681f3Smrg-  gbm/dri: Propagate queryDmaBufModifiers return value
32957ec681f3Smrg-  amd/addrlib: Use enum instead of sparse chars to identify dimensions
32967ec681f3Smrg-  mesa: Skip 3-byte array formats in \_mesa_array_format_flip_channels
32977ec681f3Smrg-  Revert "ac,radeonsi: fix compilations issues with LLVM 11"
32987ec681f3Smrg-  Revert "gallium/gallivm: fix compilation issues with llvm 11"
32997ec681f3Smrg
33007ec681f3SmrgMike Blumenkrantz (6):
33017ec681f3Smrg
33027ec681f3Smrg-  zink: set UBO alignments in nir_intrinsic_load_uniform lowering
33037ec681f3Smrg-  zink: remove framebuffer cache
33047ec681f3Smrg-  zink: explicitly unref old fb object when setting new one
33057ec681f3Smrg-  iris: move iris_vtable to iris_screen
33067ec681f3Smrg-  gallium: add pipe cap for scissored clears and pass scissor state to
33077ec681f3Smrg   clear() hook
33087ec681f3Smrg-  iris: handle PIPE_CAP_CLEAR_SCISSORED
33097ec681f3Smrg
33107ec681f3SmrgNanley Chery (6):
33117ec681f3Smrg
33127ec681f3Smrg-  isl: Add a module which manages aux resolves
33137ec681f3Smrg-  iris: Use isl_aux_usage_has_fast_clear()
33147ec681f3Smrg-  iris: Use ISL's access preparation functions
33157ec681f3Smrg-  iris: Use isl_aux_state_transition_write()
33167ec681f3Smrg-  i965: Use ISL's access preparation functions
33177ec681f3Smrg-  i965: Use isl_aux_state_transition_write()
33187ec681f3Smrg
33197ec681f3SmrgNataraj Deshpande (1):
33207ec681f3Smrg
33217ec681f3Smrg-  dri_util: Update internal_format to GL_RGB8 for
33227ec681f3Smrg   MESA_FORMAT_R8G8B8X8_UNORM
33237ec681f3Smrg
33247ec681f3SmrgNeha Bhende (2):
33257ec681f3Smrg
33267ec681f3Smrg-  svga: fix size of format_conversion_table[]
33277ec681f3Smrg-  svga: Use pipe_shader_state_from_tgsi to set shader state
33287ec681f3Smrg
33297ec681f3SmrgNeil Armstrong (4):
33307ec681f3Smrg
33317ec681f3Smrg-  gitlab-ci/lava: fix handling of lava tags
33327ec681f3Smrg-  Revert "ci: Remove T820 from CI temporarily"
33337ec681f3Smrg-  gitlab-ci: add FILES_HOST_URL and move FILES_HOST_NAME into jobs
33347ec681f3Smrg-  gitlab-ci: re-enable mali400/450 and t820 jobs
33357ec681f3Smrg
33367ec681f3SmrgNeil Roberts (17):
33377ec681f3Smrg
33387ec681f3Smrg-  nir/opcodes: Add nir_op_f2fmp
33397ec681f3Smrg-  glsl: Add support for float16 types in the IR tree
33407ec681f3Smrg-  glsl: Add IR conversion ops for 16-bit float types
33417ec681f3Smrg-  glsl: Add b2f16 and f162b conversion operations
33427ec681f3Smrg-  glsl: Add ir_unop_f2fmp
33437ec681f3Smrg-  glsl/validate: Allow float16 in the expression tree
33447ec681f3Smrg-  glsl/lower_instructions: Use float16 constants when appropriate
33457ec681f3Smrg-  glsl/opt_minmax: Add support for float16
33467ec681f3Smrg-  glsl: Add a method to get precision from a deref instruction
33477ec681f3Smrg-  glsl/hierarchical_visitor: Call leave_callback on leaf nodes
33487ec681f3Smrg-  glsl: Add an IR lowering pass to convert mediump operations to 16-bit
33497ec681f3Smrg-  glsl/standalone: Add an option to lower the precision
33507ec681f3Smrg-  glsl: Add unit tests for the lower_precision pass
33517ec681f3Smrg-  freedreno/ir3: Lower bools to bitsize
33527ec681f3Smrg-  glsl: Inline builtins in a separate pass
33537ec681f3Smrg-  glsl/lower_precision: Lower builtins depending on arguments
33547ec681f3Smrg-  glsl/lower_precision: Use vector.back() instead of vector.end()[-1]
33557ec681f3Smrg
33567ec681f3SmrgPaulo Zanoni (8):
33577ec681f3Smrg
33587ec681f3Smrg-  intel: fix the gen 11 compute shader scratch IDs
33597ec681f3Smrg-  intel: fix the gen 12 compute shader scratch IDs
33607ec681f3Smrg-  intel/device: bdw_gt1 actually has 6 eus per subslice
33617ec681f3Smrg-  anv: multiply the scratch space by 4 on gen9-10 like iris and i965
33627ec681f3Smrg-  iris: remove hole from struct iris_bo
33637ec681f3Smrg-  iris: remove unnecessary forward declaration
33647ec681f3Smrg-  iris: remove useless bo->gtt_offset assignment
33657ec681f3Smrg-  iris: make BATCH_SZ smaller by BATCH_RESERVED bytes
33667ec681f3Smrg
33677ec681f3SmrgPeng Huang (1):
33687ec681f3Smrg
33697ec681f3Smrg-  radeonsi: make si_fence_server_signal flush pipe without work
33707ec681f3Smrg
33717ec681f3SmrgPierre Moreau (1):
33727ec681f3Smrg
33737ec681f3Smrg-  clover/nir: Check the result of spirv_to_nir
33747ec681f3Smrg
33757ec681f3SmrgPierre-Eric Pelloux-Prayer (44):
33767ec681f3Smrg
33777ec681f3Smrg-  radeonsi/ngg: add VGT_FLUSH when enabling fast launch
33787ec681f3Smrg-  radeonsi: test subsampled format in testdma
33797ec681f3Smrg-  format: add format_to_chroma_format
33807ec681f3Smrg-  gallium/video: remove pipe_video_buffer.chroma_format
33817ec681f3Smrg-  gallium/vl: add 4:2:2 support
33827ec681f3Smrg-  radeonsi: fix surf_pitch for subsampled surface
33837ec681f3Smrg-  st/va: enable 4:2:2 chroma format
33847ec681f3Smrg-  st/va: add support YUY2
33857ec681f3Smrg-  radeonsi: remove AMD_DEBUG=sisched option
33867ec681f3Smrg-  omx: fix build with gcc 10
33877ec681f3Smrg-  meson: enable -fno-common by default
33887ec681f3Smrg-  gitlab-ci: rules:changes to test on tested drivers changes
33897ec681f3Smrg-  vdpau: remove bogus assert
33907ec681f3Smrg-  st/mesa: disallow deferred flush if there are multiple contexts
33917ec681f3Smrg-  radeonsi: enable glsl_zero_init for Curse of the Dead Gods
33927ec681f3Smrg-  radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed
33937ec681f3Smrg-  util/os_file: extend os_read_file to return the file size
33947ec681f3Smrg-  util/u_process: add util_get_process_exec_path
33957ec681f3Smrg-  util/xmlconfig: add new sha1 application attribute
33967ec681f3Smrg-  radeonsi: enable workarounds for YoYo engine based games
33977ec681f3Smrg-  util/u_process: fix Windows build
33987ec681f3Smrg-  nir: update uses_demote flag in discard_to_demote pass
33997ec681f3Smrg-  ac: fix ac_build_is_helper_invocation when postponed_kill is null
34007ec681f3Smrg-  util: fix process_test path
34017ec681f3Smrg-  ddebug: add missing forward declaration
34027ec681f3Smrg-  radeon: fix includes
34037ec681f3Smrg-  radeonsi: switch to 3-spaces style
34047ec681f3Smrg-  radeon: switch to 3-spaces style
34057ec681f3Smrg-  gallium/util: let shader live cache users know if a hit occured
34067ec681f3Smrg-  radeonsi: dump shader stats when hitting the live cache
34077ec681f3Smrg-  util/xmlconfig: fix sha1 comparison code
34087ec681f3Smrg-  mesa: update pipeline when re-linking a program in use
34097ec681f3Smrg-  gallium/u_threaded: flush batch when hitting mapping limit
34107ec681f3Smrg-  radeonsi: use thread_context::bytes_mapped_limit
34117ec681f3Smrg-  radeonsi: don't assume ctx is always a threaded_context
34127ec681f3Smrg-  radeonsi: skip vs output optimizations for some outputs
34137ec681f3Smrg-  mesa: fix crash in find_value
34147ec681f3Smrg-  gallium/utils: silence strncpy warning
34157ec681f3Smrg-  st/omx: fix gcc warnings
34167ec681f3Smrg-  radeonsi: fix export count
34177ec681f3Smrg-  mesa: add gl_coontext::ForceIntegerTexNearest
34187ec681f3Smrg-  driconf: add force_integer_tex_nearest option
34197ec681f3Smrg-  radeonsi: don't print gs_copy_shader stats for shaderdb
34207ec681f3Smrg-  amd/addrlib: fix forgotten char -> enum conversions
34217ec681f3Smrg
34227ec681f3SmrgPlamena Manolova (2):
34237ec681f3Smrg
34247ec681f3Smrg-  intel/compiler: Add support for variable workgroup size
34257ec681f3Smrg-  i965: Implement ARB_compute_variable_group_size
34267ec681f3Smrg
34277ec681f3SmrgQiang Yu (35):
34287ec681f3Smrg
34297ec681f3Smrg-  lima: remove definition of lima_is_scanout
34307ec681f3Smrg-  lima: use util_copy_framebuffer_state
34317ec681f3Smrg-  lima: always add texture bo to submit
34327ec681f3Smrg-  lima: remove lima_ctx_buff_va submit flags (v2)
34337ec681f3Smrg-  lima: pass array as parameter to PLBU and VS command macros
34347ec681f3Smrg-  lima: delay add plb buffer to submit when flush
34357ec681f3Smrg-  lima: delay plbu head command generation to flush stage (v2)
34367ec681f3Smrg-  lima: add render target to submit by dirty buffer flags
34377ec681f3Smrg-  lima: add missing resolve check for damage and reload
34387ec681f3Smrg-  lima: move syncobj from lima_submit to lima_context
34397ec681f3Smrg-  lima: merge gp/pp submit
34407ec681f3Smrg-  lima: put hardware related info to lima_gpu.h
34417ec681f3Smrg-  lima: move flush code to lima_submit.c
34427ec681f3Smrg-  lima: pass submit parameter for functions in lima_submic.c (v2)
34437ec681f3Smrg-  lima: add lima_submit_create_stream_bo
34447ec681f3Smrg-  lima: adjust pp_stream to use lima_submit_create_stream_bo
34457ec681f3Smrg-  lima: use lima_submit_create_stream_bo for plbu/vs_cmd and pp_stack
34467ec681f3Smrg-  lima: add lima_submit_get
34477ec681f3Smrg-  lima: make lima_submit one time use drop data (v3)
34487ec681f3Smrg-  lima: track write submits of context (v3)
34497ec681f3Smrg-  lima: move plbu/vs_cmd_array into lima_submit
34507ec681f3Smrg-  lima: move resolve into lima_submit
34517ec681f3Smrg-  lima: move pp_max_stack_size to lima_submit
34527ec681f3Smrg-  lima: move damage_rect into lima_submit
34537ec681f3Smrg-  lima: move clear into submit (v2)
34547ec681f3Smrg-  lima: move framebuffer info to lima_submit
34557ec681f3Smrg-  lima: use per submit dump file
34567ec681f3Smrg-  lima: optinal flush submit in lima_clear
34577ec681f3Smrg-  lima: enable multi submit optimization
34587ec681f3Smrg-  lima: move dump check to macro for lima_dump_command_stream_print
34597ec681f3Smrg-  lima: rename lima_submit to lima_job
34607ec681f3Smrg-  lima: fix buffer import with offset
34617ec681f3Smrg-  lima: also check tiled and depth case when import
34627ec681f3Smrg-  lima: set offset when export resource
34637ec681f3Smrg-  panfrost: don't always build bifrost_compiler
34647ec681f3Smrg
34657ec681f3SmrgQuentin Glidic (1):
34667ec681f3Smrg
34677ec681f3Smrg-  meson: Use dependency.partial_dependency()
34687ec681f3Smrg
34697ec681f3SmrgRafael Antognolli (18):
34707ec681f3Smrg
34717ec681f3Smrg-  intel: Load the driver even if I915_PARAM_REVISION is not found.
34727ec681f3Smrg-  intel/tools: Update aubinator_error_decode.
34737ec681f3Smrg-  intel/blorp: Implement GEN:BUG:1605967699.
34747ec681f3Smrg-  iris: Apply the flushes when switching pipelines.
34757ec681f3Smrg-  anv: Wait for the GPU to be idle before invalidating the aux table.
34767ec681f3Smrg-  iris: Split aux map initialization from invalidation.
34777ec681f3Smrg-  iris: Wait for the GPU to be idle before invalidating the aux table.
34787ec681f3Smrg-  intel/isl: Implement D16_UNORM workarounds.
34797ec681f3Smrg-  intel/gen12+: Disable mid thread preemption.
34807ec681f3Smrg-  iris: Enable EXT_depth_bounds_test extension.
34817ec681f3Smrg-  drm-uapi: Update headers from Linux 5.7-rc1.
34827ec681f3Smrg-  i965/bufmgr: Factor out GEM_MMAP ioctl from mmap_cpu and mmap_wc.
34837ec681f3Smrg-  iris/bufmgr: Factor out GEM_MMAP ioctl from mmap_cpu and mmap_wc.
34847ec681f3Smrg-  i965/bufmgr: Add support for MMAP_OFFSET ioctl.
34857ec681f3Smrg-  iris/bufmgr: Add support for MMAP_OFFSET ioctl.
34867ec681f3Smrg-  anv: Add anv_device parameter to anv_gem_munmap.
34877ec681f3Smrg-  anv: Add support for new MMAP_OFFSET ioctl.
34887ec681f3Smrg-  anv: Enable HiZ on multi-layer depth buffers.
34897ec681f3Smrg
34907ec681f3SmrgRhys Perry (118):
34917ec681f3Smrg
34927ec681f3Smrg-  aco: fix gfx10_wave64_bpermute
34937ec681f3Smrg-  aco: gfx10_wave64_bpermute reduce op to print_ir
34947ec681f3Smrg-  aco: disable some instruction combining if it could change an exec
34957ec681f3Smrg   operand
34967ec681f3Smrg-  aco: improve SCC handling in some SALU combines
34977ec681f3Smrg-  nir: fix nir_const_value_as_uint bit size in load/store vectorizer
34987ec681f3Smrg   tests
34997ec681f3Smrg-  gitlab-ci: remove load_store_vectorizer from expected s390x test
35007ec681f3Smrg   failures
35017ec681f3Smrg-  aco: add RegisterFile
35027ec681f3Smrg-  aco: add some helpers for filling/testing register ranges
35037ec681f3Smrg-  aco: improve GFX9 1D ddx/ddy assertion
35047ec681f3Smrg-  spirv: improve creation of memory_barrier
35057ec681f3Smrg-  spirv: fix memory_barrier_tcs_patch emission
35067ec681f3Smrg-  aco: keep track of which events are used in a barrier
35077ec681f3Smrg-  aco: fix carry-out size for wave32 v_add_co_u32_e64
35087ec681f3Smrg-  aco: handle v_add_co_u32_e64 in parse_base_offset()
35097ec681f3Smrg-  aco: add new NOP insertion pass for GFX6-9
35107ec681f3Smrg-  aco: improve get_wait_states()
35117ec681f3Smrg-  aco: consider non-hazard writes in handle_raw_hazard_internal
35127ec681f3Smrg-  aco: improve control flow handling in GFX6-9 NOP pass
35137ec681f3Smrg-  aco: only reserve sgprs for vcc if it's used
35147ec681f3Smrg-  aco: fix uninitialized data error in waitcnt pass
35157ec681f3Smrg-  glsl/list: use uintptr_t for exec_node_data()'s subtraction
35167ec681f3Smrg-  aco: add helpers for moving instructions for scheduling
35177ec681f3Smrg-  aco: add helpers for ensuring correct ordering while scheduling
35187ec681f3Smrg-  aco: allow barriers to be skipped during scheduling
35197ec681f3Smrg-  aco: don't stop scheduling at exports
35207ec681f3Smrg-  aco: move some register demand helpers into aco_live_var_analysis.cpp
35217ec681f3Smrg-  aco: add a late kill flag
35227ec681f3Smrg-  aco: set late kill for v_interp_p1_f32 for some APUs
35237ec681f3Smrg-  aco: fix instruction encoding for LS VGPR init bug workaround
35247ec681f3Smrg-  aco: fix operand order for LS VGPR init bug workaround
35257ec681f3Smrg-  nir/gather_info: handle emit_vertex_with_counter
35267ec681f3Smrg-  radv: call nir_shader_gather_info again
35277ec681f3Smrg-  radv/winsys: set has_syncobj_wait_for_submit in the null winsys
35287ec681f3Smrg-  aco: set has_divergent_branch for discards in loops
35297ec681f3Smrg-  aco: handle missing second predecessors at merge block phis
35307ec681f3Smrg-  aco: handle when ACO adds new continue edges
35317ec681f3Smrg-  aco: skip NIR in unreachable merge blocks
35327ec681f3Smrg-  aco: improve check for unreachable loop continue blocks
35337ec681f3Smrg-  aco: emit IR in IF's merge block instead if the other side ends in a
35347ec681f3Smrg   jump
35357ec681f3Smrg-  aco: fix boolean undef regclass
35367ec681f3Smrg-  nir/gather_info: fix per-vertex handling in try_mask_partial_io
35377ec681f3Smrg-  aco: remove dead code in handle_operands()
35387ec681f3Smrg-  aco: implement 64-bit VGPR constant copies in handle_operands()
35397ec681f3Smrg-  aco: look at p_{extract,split}_vector's definitions in
35407ec681f3Smrg   pred_by_exec_mask()
35417ec681f3Smrg-  glsl: fix race in instance getters
35427ec681f3Smrg-  util/u_queue: fix race in total_jobs_size access
35437ec681f3Smrg-  radv: add code for exposing compiler statistics
35447ec681f3Smrg-  aco: add various compiler statistics
35457ec681f3Smrg-  aco: add vmem/smem score statistic
35467ec681f3Smrg-  radv, aco: collect statistics if requested but executables are not
35477ec681f3Smrg-  radv: fix null winsys gpu_info array
35487ec681f3Smrg-  aco: make PhysReg in units of bytes
35497ec681f3Smrg-  aco: add SDWA_instruction
35507ec681f3Smrg-  aco: print and validate opsel
35517ec681f3Smrg-  aco: add emission support for register-allocated sdwa sels
35527ec681f3Smrg-  aco: remove divergence check in sanitize_if()
35537ec681f3Smrg-  aco: zero-initialize Temp
35547ec681f3Smrg-  aco: improve vector optimization with sub-dword vectors
35557ec681f3Smrg-  aco: fix p_extract_vector validation
35567ec681f3Smrg-  aco: improve p_create_vector RA for sub-dword operands
35577ec681f3Smrg-  aco: clear moved operands in get_reg_create_vector()
35587ec681f3Smrg-  aco: fix 1D textureGrad() on GFX9
35597ec681f3Smrg-  aco: implement various 8/16-bit conversions
35607ec681f3Smrg-  aco: add missing scc clobber to nir_op_unpack_32_2x16_split_y
35617ec681f3Smrg-  aco: fix copy statistic for 64-bit vgpr constant copy
35627ec681f3Smrg-  aco: add VOP3P_instruction
35637ec681f3Smrg-  aco: implement sub-dword swaps
35647ec681f3Smrg-  aco: implement 64-bit sgpr swaps
35657ec681f3Smrg-  nir/lower_bit_size: fix lowering of shifts
35667ec681f3Smrg-  nir/lower_bit_size: fix lowering of {imul,umul}_high
35677ec681f3Smrg-  nir/algebraic: don't undo lowering of 8/16-bit comparisons to 32-bit
35687ec681f3Smrg-  aco: decrease the uses of other copy operations after
35697ec681f3Smrg   splitting/removing
35707ec681f3Smrg-  aco: copy-propagate p_create_vector copies of vectors
35717ec681f3Smrg-  aco: remove copy in load_input_from_temps()
35727ec681f3Smrg-  aco: move call to store_output_to_temps in store_ls_or_es_output
35737ec681f3Smrg   earlier
35747ec681f3Smrg-  aco: combine VALU and SALU into various VOP3 instructions
35757ec681f3Smrg-  aco: improve code for 32-bit isign
35767ec681f3Smrg-  aco: fix v_or(s_lshl) and v_add(s_lshl) optimizations
35777ec681f3Smrg-  aco: fix outdated label_vec from p_create_vector labelling
35787ec681f3Smrg-  radv: align buffer descriptor sizes to dword
35797ec681f3Smrg-  radv: allocate larger shader memory slabs if needed
35807ec681f3Smrg-  aco: be more careful about using SMEM for load_global
35817ec681f3Smrg-  aco: add and use RegClass::get() helper
35827ec681f3Smrg-  aco: add emit_load helper
35837ec681f3Smrg-  aco: refactor load_lds to use new helpers
35847ec681f3Smrg-  aco: use emit_load helper for VMEM/SMEM loads
35857ec681f3Smrg-  aco: add helpers for splitting stores
35867ec681f3Smrg-  aco: refactor store_lds() to use new helpers
35877ec681f3Smrg-  aco: refactor store_vmem_mubuf() to use new helpers
35887ec681f3Smrg-  aco: refactor visit_store_ssbo() to use new helpers
35897ec681f3Smrg-  aco: refactor visit_store_global() to use new helpers
35907ec681f3Smrg-  aco: refactor visit_store_scratch() to use new helpers
35917ec681f3Smrg-  aco: add and use get_buffer_store_op() helper
35927ec681f3Smrg-  aco: allow 8/16-bit shared loads
35937ec681f3Smrg-  aco: vectorize global loads/stores
35947ec681f3Smrg-  aco: handle undef p_create_vector operands in the optimizer
35957ec681f3Smrg-  aco: clobber scc in s_bfe_u32 in get_alu_src()
35967ec681f3Smrg-  aco: improve sub-dword emit_split_vector() with sgprs
35977ec681f3Smrg-  aco: lower 8/16-bit integer arithmetic
35987ec681f3Smrg-  radv/aco: enable 8/16-bit storage and int8/int16 on GFX8+
35997ec681f3Smrg-  aco: make RegisterFile::block() take a regclass
36007ec681f3Smrg-  aco: check alignment of non-subdword registers in get_reg_specified()
36017ec681f3Smrg-  aco: fix neighboring register check in get_reg_simple()
36027ec681f3Smrg-  aco: split self-intersecting copies instead of swapping
36037ec681f3Smrg-  aco: don't recurse in sub-dword get_reg_simple()
36047ec681f3Smrg-  aco: improve RA for uneven p_split_vector
36057ec681f3Smrg-  aco: add missing adjust_max_used_regs()
36067ec681f3Smrg-  aco: fix sub-dword out-of-bounds check in RA validator
36077ec681f3Smrg-  aco: fix sub-dword overwrite check in RA validator
36087ec681f3Smrg-  aco: add various GFX10 int16 opcodes
36097ec681f3Smrg-  aco: improve clamped integer addition disassembly workaround
36107ec681f3Smrg-  aco: fix vgpr nir_op_vecn with sgpr operands
36117ec681f3Smrg-  aco: consider blocks unreachable if they are in the logical cfg
36127ec681f3Smrg-  aco: remove use of f-strings
36137ec681f3Smrg-  aco: add message to static_assert
36147ec681f3Smrg-  nir: add missing group_memory_barrier handling
36157ec681f3Smrg-  nir/opt_if: run opt_peel_loop_initial_if after all other
36167ec681f3Smrg   optimizations
36177ec681f3Smrg-  nir: fix lowering to scratch with boolean access
36187ec681f3Smrg
36197ec681f3SmrgRob Clark (147):
36207ec681f3Smrg
36217ec681f3Smrg-  freedreno/drm: readonly cmdstream
36227ec681f3Smrg-  freedreno/ir3: shuffle a few ir3_register fields
36237ec681f3Smrg-  freedreno/ir3: cleanup after lower_locals_to_regs
36247ec681f3Smrg-  freedreno/ir3: fix crash when no non-input instructions
36257ec681f3Smrg-  freedreno/ir3: split out delay helpers
36267ec681f3Smrg-  freedreno/ir3: move nop padding to legalize
36277ec681f3Smrg-  freedreno/ir3: move block-scheduling into legalize
36287ec681f3Smrg-  freedreno/ir3: move atomic fixup after RA
36297ec681f3Smrg-  freedreno/ir3: a bit more optmsgs debug
36307ec681f3Smrg-  freedreno/ir3/ra: make use()/def() functions instead of macros
36317ec681f3Smrg-  freedreno/ir3: fix kill scheduling
36327ec681f3Smrg-  freedreno/ir3: post-RA sched pass
36337ec681f3Smrg-  freedreno/ir3: number instructions from one
36347ec681f3Smrg-  freedreno/ir3: add is_tex_or_prefetch()
36357ec681f3Smrg-  freedreno/ir3: don't precolor unused inputs
36367ec681f3Smrg-  freedreno/ir3: two pass register allocation
36377ec681f3Smrg-  freedreno/a6xx: fix lrz overflow
36387ec681f3Smrg-  freedreno/ir3: add RA sanity check
36397ec681f3Smrg-  freedreno/ir3: remove unused tex arg harder
36407ec681f3Smrg-  freedreno/ir3: create fragcoord instructions in input block
36417ec681f3Smrg-  freedreno/ir3: simplify split from collect
36427ec681f3Smrg-  freedreno/ir3: fix a dirty lie
36437ec681f3Smrg-  freedreno: allow ctx->batch to be NULL
36447ec681f3Smrg-  freedreno/ir3: fold const conversion into consumer
36457ec681f3Smrg-  freedreno: allow INVALID modifier
36467ec681f3Smrg-  freedreno/registers: teach gen_header.py about a3xx_regid
36477ec681f3Smrg-  freedreno/a6xx: few register updates
36487ec681f3Smrg-  freedreno: quiet INFO_MSG
36497ec681f3Smrg-  freedreno/registers: cleanup CP_SET_MARKER
36507ec681f3Smrg-  freedreno/computerator: import parser/lexer from fdre-a3xx
36517ec681f3Smrg-  freedreno/computerator: polish out some of the rust
36527ec681f3Smrg-  freedreno/computerator: rename prefix asm->ir3
36537ec681f3Smrg-  freedreno/ir3: allow block->predecessors to be null
36547ec681f3Smrg-  freedreno/computerator: add computerator
36557ec681f3Smrg-  freedreno/computerator: fix build dependency
36567ec681f3Smrg-  freedreno/ir3: remove from_tgsi
36577ec681f3Smrg-  freedreno/a6xx: remove unused param
36587ec681f3Smrg-  freedreno/a6xx: emit LRZ clear in sysmem too
36597ec681f3Smrg-  freedreno/a6xx: whitespace fix
36607ec681f3Smrg-  freedreno/a6xx: don't emit YIELD packet
36617ec681f3Smrg-  freedreno/a6xx: enable SKIP_IB2_ENABLE properly
36627ec681f3Smrg-  freedreno: honor FD_MESA_DEBUG=nogrow
36637ec681f3Smrg-  freedreno/ir3: remove regmask_set_if_not()
36647ec681f3Smrg-  freedreno/ir3: rewrite regmask to better support a6xx+
36657ec681f3Smrg-  freedreno/ir3: don't hide latency when there is none to hide
36667ec681f3Smrg-  freedreno/ir3: track half-precision live values
36677ec681f3Smrg-  freedreno/ir3: update SFU delay
36687ec681f3Smrg-  freedreno/ir3: fix crash with samgq workaround
36697ec681f3Smrg-  freedreno/ir3: don't precolor unassigned inputs
36707ec681f3Smrg-  freedreno/ir3: fix assert with getinfo
36717ec681f3Smrg-  freedreno/ir3: add assert
36727ec681f3Smrg-  nir/print: show variable precision
36737ec681f3Smrg-  freedreno/ir3: also lower lowp frag outputs
36747ec681f3Smrg-  freedreno/computerator: add hrsq/hlog2/hexp2
36757ec681f3Smrg-  freedreno/ir3: remove extra nops inserted in scheduler
36767ec681f3Smrg-  freedreno/ir3: add simplified stall estimation
36777ec681f3Smrg-  freedreno: fix FD_MESA_DEBUG=inorder
36787ec681f3Smrg-  util/ra: spiff out select_reg_callback
36797ec681f3Smrg-  util/ra: move NO_REG to header
36807ec681f3Smrg-  freedreno/ir3: split out has_latency_to_hide()
36817ec681f3Smrg-  freedreno/ir3: fix has_latency_to_hide
36827ec681f3Smrg-  freedreno/ir3: track register usage in first RA pass
36837ec681f3Smrg-  freedreno/ir3: round-robin RA
36847ec681f3Smrg-  freedreno/ir3: try to avoid syncs
36857ec681f3Smrg-  freedreno/computerator: add performance counter support
36867ec681f3Smrg-  freedreno/fdperf: set locale
36877ec681f3Smrg-  freedreno/a6xx: register update
36887ec681f3Smrg-  freedreno/ir3: small cleanup and comments
36897ec681f3Smrg-  freedreno/ir3: add bary_ij as src for meta:tex_prefetch
36907ec681f3Smrg-  freedreno/ir3: remove unused helper
36917ec681f3Smrg-  freedreno/ir3: fix bogus register footprint with tess/gs
36927ec681f3Smrg-  freedreno/ir3: reformat disasm output
36937ec681f3Smrg-  freedreno/ir3: convert debug bitfield to BITFIELD_BIT()
36947ec681f3Smrg-  freedreno/ir3/ra: add debug option for RA debug msgs
36957ec681f3Smrg-  freedreno/ir3/ra: split-up
36967ec681f3Smrg-  freedreno/ir3/ra: add helper to map name to instruction
36977ec681f3Smrg-  freedreno/ir3/ra: fix target register calculation
36987ec681f3Smrg-  freedreno/ir3/ra: add helper to map name to array
36997ec681f3Smrg-  freedreno/ir3/ra: drop extending output live-ranges
37007ec681f3Smrg-  freedreno/ir3/ra: add def/use iterators
37017ec681f3Smrg-  freedreno/ir3/ra: fix array liveranges
37027ec681f3Smrg-  freedreno/ir3/ra: compute register target from liveranges
37037ec681f3Smrg-  freedreno/ir3/ra: pick higher numbered scalars in first pass
37047ec681f3Smrg-  freedreno/ir3/ra: split building regs/classes and conflicts
37057ec681f3Smrg-  freedreno/ir3/ra: re-work a6xx merged register file conflicts
37067ec681f3Smrg-  gitlab-ci: disable vs2019 build
37077ec681f3Smrg-  freedreno: remove some obsolete debug options
37087ec681f3Smrg-  util: fix u_fifo_pop()
37097ec681f3Smrg-  freedreno: add logging infrastructure
37107ec681f3Smrg-  freedreno/a6xx: timestamp logging support
37117ec681f3Smrg-  freedreno: add some initial fd_log tracepoints
37127ec681f3Smrg-  freedreno/a6xx: add some more tracepoints
37137ec681f3Smrg-  freedreno/log: avoid duplicate ts's
37147ec681f3Smrg-  util: move ALIGN/ROUND_DOWN_TO to u_math.h
37157ec681f3Smrg-  freedreno/ir3: fix android build
37167ec681f3Smrg-  freedreno/log: fix build error
37177ec681f3Smrg-  nir: fix definition of imadsh_mix16 for vectors
37187ec681f3Smrg-  freedreno/ir3/cf: handle widening too
37197ec681f3Smrg-  freedreno/ir3: fixup cat3 32b vs 16b
37207ec681f3Smrg-  freedreno/ir3/cf: skip array load/store
37217ec681f3Smrg-  freedreno/ir3: add a pass to collect SSA uses
37227ec681f3Smrg-  freedreno/ir3/cf: use ssa-uses
37237ec681f3Smrg-  freedreno/a6xx: add some compute logging
37247ec681f3Smrg-  freedreno: fix missing locking
37257ec681f3Smrg-  freedreno/ir3: also precompile compute shaders for shaderdb
37267ec681f3Smrg-  freedreno: limit fp16 to frag and compute
37277ec681f3Smrg-  glsl: don't limit fp16 lowering to frag
37287ec681f3Smrg-  nir: add some swizzle helpers
37297ec681f3Smrg-  nir/lower_amul: fix slot calculation
37307ec681f3Smrg-  freedreno/log: android support
37317ec681f3Smrg-  freedreno/log: spiff out parser some more
37327ec681f3Smrg-  freedreno/log: better decoding for multiple chunks per batch
37337ec681f3Smrg-  freedreno/ir3: spiff out disasm a bit
37347ec681f3Smrg-  freedreno/ir3: make falsedep use's optional
37357ec681f3Smrg-  freedreno/ir3: simplify grouping pass
37367ec681f3Smrg-  freedreno/ir3: fix location of inserted mov's
37377ec681f3Smrg-  freedreno/ir3: new pre-RA scheduler
37387ec681f3Smrg-  freedreno/ir3/sched: awareness of partial liveness
37397ec681f3Smrg-  freedreno/ir3/postsched: remove some leftovers
37407ec681f3Smrg-  freedreno/ir3/postsched: avoid moving tex ahead of kill
37417ec681f3Smrg-  freedreno/ir3: add mov/cov stats
37427ec681f3Smrg-  freedreno/ir3/ra: handle array case for SFU select_reg opt
37437ec681f3Smrg-  freedreno/ir3: better cleanup when removing unused instructions
37447ec681f3Smrg-  freedreno/ir3: rename depth->dce
37457ec681f3Smrg-  freedreno/ir3/ra: cleanup some leftovers
37467ec681f3Smrg-  mesa: avoid redundant VBO updates
37477ec681f3Smrg-  mesa/st: avoid u_vbuf for GLES
37487ec681f3Smrg-  gallium: add # of MRT to blend state
37497ec681f3Smrg-  freedreno/computer: add script to test widening/narrowing
37507ec681f3Smrg-  freedreno/ir3/ra: remove unused variable
37517ec681f3Smrg-  freedreno/ir3/ra: use ir3_debug_print helper
37527ec681f3Smrg-  freedreno/ir3/ra: split out helper for array assignment
37537ec681f3Smrg-  freedreno/ir3/ra: only assign array base in first pass
37547ec681f3Smrg-  freedreno/a6xx+tu: rename VSC_DATA/VSC_DATA2
37557ec681f3Smrg-  freedreno: add helper to estimate # of bins per pipe
37567ec681f3Smrg-  freedreno/a6xx: pre-calculate expected vsc stream sizes
37577ec681f3Smrg-  freedreno/log-parser: support to read gzip'd logs
37587ec681f3Smrg-  freedreno: small whitespace fix
37597ec681f3Smrg-  freedreno: don't realloc idle bo's
37607ec681f3Smrg-  freedreno: mark more state dirty when rebinding resources
37617ec681f3Smrg-  freedreno: optimize rebind_resource()
37627ec681f3Smrg-  freedreno: rebind resource in all contexts
37637ec681f3Smrg-  freedreno: rebind_resource() \*before\* bo changes
37647ec681f3Smrg-  freedreno/a6xx: invalidate tex state cache entries on rebind
37657ec681f3Smrg-  freedreno: fix buffer import
37667ec681f3Smrg-  freedreno/ir3: fix indirect cb0 load_ubo lowering
37677ec681f3Smrg-  freedreno: clear last_fence after resource tracking
37687ec681f3Smrg
37697ec681f3SmrgRohan Garg (5):
37707ec681f3Smrg
37717ec681f3Smrg-  ci: Split out radv build-testing on arm64
37727ec681f3Smrg-  ci: Drop the git dependency in tracie
37737ec681f3Smrg-  tracie: Switch to using shutil.move for cross filesystem moves
37747ec681f3Smrg-  tracie: Print results in a machine readable format
37757ec681f3Smrg-  tracie: Reformat code to fix indentation
37767ec681f3Smrg
37777ec681f3SmrgRoland Scheidegger (7):
37787ec681f3Smrg
37797ec681f3Smrg-  gallivm: fix crash with bptc border color sampling
37807ec681f3Smrg-  gallivm: fix crash in emit_get_buffer_size
37817ec681f3Smrg-  gallivm: disable rgtc/latc SNORM accellerated fetches
37827ec681f3Smrg-  gallium/util: Add back (and rename) util_float_to_half implementation
37837ec681f3Smrg-  gallivm: fix rgtc2 format
37847ec681f3Smrg-  gallivm: switch the mask6/mask7 cases for signed rgtc formats
37857ec681f3Smrg-  gallivm: fix stream id fetch
37867ec681f3Smrg
37877ec681f3SmrgRoman Stratiienko (3):
37887ec681f3Smrg
37897ec681f3Smrg-  panfrost: Align Android makefiles with recent changes
37907ec681f3Smrg-  lima: Add missing source file to Android.mk
37917ec681f3Smrg-  panfrost: Align Android makefiles with recent changes
37927ec681f3Smrg
37937ec681f3SmrgSagar Ghuge (13):
37947ec681f3Smrg
37957ec681f3Smrg-  intel/isl: Move get_format_encoding function to isl
37967ec681f3Smrg-  intel/isl: Switch to R8_UNORM format for compatiblity
37977ec681f3Smrg-  intel/tools: Handle illegal instruction
37987ec681f3Smrg-  intel/tools: Handle STATE_REG in typed source operand
37997ec681f3Smrg-  intel/tools: Set correct address register file and number in i965_asm
38007ec681f3Smrg-  intel/tools: Add test for address register as source
38017ec681f3Smrg-  intel/tools: Add test for state register as source
38027ec681f3Smrg-  intel/tools: Print c_literals 4 byte wide
38037ec681f3Smrg-  intel/tools: Allow i965_disasm to disassemble c_literal input type
38047ec681f3Smrg-  intel/genxml: Add patch count threshold field on gen12
38057ec681f3Smrg-  intel/compiler: Track patch count threshold
38067ec681f3Smrg-  anv: Set patch count threshold in 3DSTATE_HS
38077ec681f3Smrg-  iris: Set patch count threshold in 3DSTATE_HS
38087ec681f3Smrg
38097ec681f3SmrgSamuel Iglesias Gonsálvez (2):
38107ec681f3Smrg
38117ec681f3Smrg-  radv: check buffer size in vkCreateBuffer()
38127ec681f3Smrg-  radv: set sparseAddressSpaceSize to RADV_MAX_MEMORY_ALLOCATION_SIZE
38137ec681f3Smrg
38147ec681f3SmrgSamuel Pitoiset (197):
38157ec681f3Smrg
38167ec681f3Smrg-  aco: fix MUBUF VS input loads when expanding vec3 to vec4 on GFX6
38177ec681f3Smrg-  aco: do not use ds_{read,write}2 on GFX6
38187ec681f3Smrg-  gitlab-ci: disable a630 tests as mesa-cheza is down (again)
38197ec681f3Smrg-  aco: fix waiting for scalar stores before "writing back" data on
38207ec681f3Smrg   GFX8-GFX9
38217ec681f3Smrg-  radv: make sure to not submit any IBs when RADV_FORCE_FAMILY is set
38227ec681f3Smrg-  radv: set the chip name to GCN-NOOP when RADV_FORCE_FAMILY is set
38237ec681f3Smrg-  aco: fix creating v_madak if v_mad_f32 has two sgpr literals
38247ec681f3Smrg-  nir: do not use De Morgan's Law rules for flt and fge
38257ec681f3Smrg-  radv: fix line width range and granularity
38267ec681f3Smrg-  radv: implement VK_EXT_line_rasterization
38277ec681f3Smrg-  radv: remove LLVM sicheduler enable for The Talos Principle
38287ec681f3Smrg-  radv: remove RADV_DEBUG=nosisched and RADV_PERFTEST=sisched
38297ec681f3Smrg-  radv: remove unused RADV_HASH_SHADER_IS_GEOM_COPY_SHADER
38307ec681f3Smrg-  radv: remove unnecessary RADV_DEBUG=nobatchchain option
38317ec681f3Smrg-  docs/new_features: empty the feature list for the 20.1 cycle
38327ec681f3Smrg-  radv: enable shaderStorageImageMultisample on GFX6-GFX7
38337ec681f3Smrg-  radv: enable VK_EXT_sampler_filter_minmax on GFX6
38347ec681f3Smrg-  radv: enable VK_NV_compute_shader_derivatives on GFX6-GFX7
38357ec681f3Smrg-  radv: add a comment about VK_AMD_mixed_attachment_samples on
38367ec681f3Smrg   GFX6-GFX7
38377ec681f3Smrg-  docs/envvars: document RADV_TEX_ANISO
38387ec681f3Smrg-  radv/winsys: add a new flag that requests zerovram allocations
38397ec681f3Smrg-  radv: use RADEON_FLAG_ZERO_VRAM when creating the trace BO
38407ec681f3Smrg-  radv: add the trace BO to the BO list at submit time
38417ec681f3Smrg-  radv: implement a dummy winsys for creating devices without AMDGPU
38427ec681f3Smrg-  ac,radeonsi: add ac_gpu_info::lds_size_per_cu
38437ec681f3Smrg-  ac: add more ac_gpu_info related shader fields
38447ec681f3Smrg-  radv/gfx10: adjust the number of simd per compute unit
38457ec681f3Smrg-  radv/gfx10: adjust SGPRs/VGPRs related info
38467ec681f3Smrg-  radv/gfx10: adjust the LDS size used to compute waves
38477ec681f3Smrg-  radv/gfx10: adjust the number of VGPRs used to compute waves
38487ec681f3Smrg-  radv: make use of ac_gpu_info::max_wave64_per_simd
38497ec681f3Smrg-  radv: fix creating null devices if KHR_display is enabled
38507ec681f3Smrg-  ac/llvm: fix 64-bit fmed3
38517ec681f3Smrg-  ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
38527ec681f3Smrg-  ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
38537ec681f3Smrg-  ac: add more fields to ac_gpu_info
38547ec681f3Smrg-  ac/registers: add definitions for thread trace
38557ec681f3Smrg-  radv: add a small helper that allows to submit internal CS
38567ec681f3Smrg-  radv: add initial SQ Thread Trace support for GFX9
38577ec681f3Smrg-  radv: emit thread trace markers after every draw/dispatch call
38587ec681f3Smrg-  radv: add initial SQTT files generation support
38597ec681f3Smrg-  radv: allow to capture SQTT traces with
38607ec681f3Smrg   RADV_THREAD_TRACE=<start_frame>
38617ec681f3Smrg-  radv: fix 32-bit build failure in radv_queue_internal_submit()
38627ec681f3Smrg-  radv: fix size of sqtt_file_chunk_asic_info on 32-bit system
38637ec681f3Smrg-  radv/rgp: adjust trace memory/shader clocks to fix frame duration
38647ec681f3Smrg-  radv/sqtt: do not assume that the number of shader engines is 4
38657ec681f3Smrg-  radv/sqtt: update SPI_CONFIG_CNTL.EXP_PRIORITY_ORDER value
38667ec681f3Smrg-  ac/registers: add definitions for thread trace on GFX10
38677ec681f3Smrg-  radv/sqtt: add support for GFX10
38687ec681f3Smrg-  radv: update entrypoints generation from ANV
38697ec681f3Smrg-  ac: rename lds_size_per_cu to lds_size_per_workgroup
38707ec681f3Smrg-  ac: rename vgpr_alloc_granularity to wave64_vgpr_alloc_granularity
38717ec681f3Smrg-  ac: rename min_vgpr_alloc to min_wave64_vgpr_alloc
38727ec681f3Smrg-  aco: fix image load/store with lod and 1D images
38737ec681f3Smrg-  gitlab-ci: build Fossilize in the test image for VK
38747ec681f3Smrg-  gitlab-ci: add Fossilize support to detect compiler regressions
38757ec681f3Smrg-  gitlab-ci: enable building the test image for VK unconditionally
38767ec681f3Smrg-  gitlab-ci: add a job that runs Fossilize on RADV/Polaris10
38777ec681f3Smrg-  radv/winsys: fix missing initializations of shader info in the null
38787ec681f3Smrg   device
38797ec681f3Smrg-  radv/sqtt: fix wrong check in radv_is_thread_trace_complete()
38807ec681f3Smrg-  radv/sqtt: tidy up radv_emit_thread_trace_{start,stop}
38817ec681f3Smrg-  radv/sqtt: add radv_copy_thread_trace_info_regs() helper
38827ec681f3Smrg-  ac/registers: adjust some definitions for thread trace on GFX8
38837ec681f3Smrg-  radv/sqtt: add support for GFX8
38847ec681f3Smrg-  radv/sqtt: abort if SQTT is used on GFX6-GFX7
38857ec681f3Smrg-  ac: add ac_gpu_info::cu_mask to store bitmask of compute units
38867ec681f3Smrg-  radv/rgp: report correct cu_mask info
38877ec681f3Smrg-  radv/rgp: report correct system ram size
38887ec681f3Smrg-  nir/lower_input_attachments: remove bogus assert in
38897ec681f3Smrg   try_lower_input_texop()
38907ec681f3Smrg-  radv/entrypoints: declare a driver internal layer for SQTT
38917ec681f3Smrg-  radv: use device entrypoints from the SQTT layer if enabled
38927ec681f3Smrg-  radv/sqtt: add a helper that emits thread trace userdata markers
38937ec681f3Smrg-  radv: initial implementation of the driver internal layer SQTT
38947ec681f3Smrg-  radv/sqtt: describe begin/end command buffers with user markers
38957ec681f3Smrg-  radv/sqtt: describe draw/dispatch and emit event markers
38967ec681f3Smrg-  radv/sqtt: describe render pass color/depthstencil clears
38977ec681f3Smrg-  radv/rgp: bump the instrumentation spec version to 1
38987ec681f3Smrg-  radv/sqtt: describe pipeline and wait events barriers
38997ec681f3Smrg-  gitlab-ci: add rules:changes for RADV
39007ec681f3Smrg-  radv: do not recursively begin/end render pass for meta operations
39017ec681f3Smrg-  radv: fix 32-bits build (again)
39027ec681f3Smrg-  gitlab-ci: build RADV in meson-i386 to avoid 32-bit build failures
39037ec681f3Smrg-  ac/llvm: add missing optimization barrier for 64-bit readlanes
39047ec681f3Smrg-  radv/sqtt: describe begin/end subpass barriers with user markers
39057ec681f3Smrg-  radv/sqtt: describe layout transitions with user markers
39067ec681f3Smrg-  radv/gfx10: cache metadata in L2 on small chips
39077ec681f3Smrg-  radv: use better tessellation tunables on GFX9+
39087ec681f3Smrg-  radv: tune primitive binning for small chips
39097ec681f3Smrg-  radv: rewrite late alloc computation
39107ec681f3Smrg-  radv: use ac_gpu_info::use_late_alloc
39117ec681f3Smrg-  radv: cleanup occurences of use_aco everywhere
39127ec681f3Smrg-  radv: remove radv_shader_variant::aco_used
39137ec681f3Smrg-  radv: remove unnecessary LLVM includes
39147ec681f3Smrg-  radv: add llvm_compiler_shader() helper
39157ec681f3Smrg-  gitlab-ci: remove useless 'patch' package in the VK test image
39167ec681f3Smrg-  gitlab-ci: allow deqp-runner to use the maximum number of jobs
39177ec681f3Smrg-  gitlab-ci: do not set the number of deqp-parallel jobs for RADV CTS
39187ec681f3Smrg-  gitlab-ci: bump Vulkan CTS to 1.2.1.0
39197ec681f3Smrg-  radv/sqtt: handle thread trace capture in sqtt_QueuePresentKHR()
39207ec681f3Smrg-  radv: only inject implicit subpass dependencies if necessary
39217ec681f3Smrg-  radv/gfx10: fix required subgroup size with
39227ec681f3Smrg   VK_EXT_subgroup_size_control
39237ec681f3Smrg-  radv/gfx10: fix required ballot size with
39247ec681f3Smrg   VK_EXT_subgroup_size_control
39257ec681f3Smrg-  radv: fix random depth range unrestricted failures due to a cache
39267ec681f3Smrg   issue
39277ec681f3Smrg-  radv: remove wrong assert that checks compute subgroup size
39287ec681f3Smrg-  radv: fix optional pSizes parameter when binding streamout buffers
39297ec681f3Smrg-  radv/winsys: fix wrong PCI ID for Vega10 in the null winsys
39307ec681f3Smrg-  radv/winsys: spoof some values for num_render_backends in the null
39317ec681f3Smrg   winsys
39327ec681f3Smrg-  gitlab-ci: compile fossils with both RADV compiler backends
39337ec681f3Smrg   (LLVM/ACO)
39347ec681f3Smrg-  gitlab-ci: compile fossils with more ASICs
39357ec681f3Smrg-  gitlab-ci: add a new stage for RADV CI
39367ec681f3Smrg-  gitlab-ci: add a bunch of new fossils from the Sascha Vulkan demos
39377ec681f3Smrg-  radv/llvm: fix subgroup shuffle for chips without bpermute
39387ec681f3Smrg-  radv: enable VK_KHR_8bit_storage on GFX6-GFX7
39397ec681f3Smrg-  ac/nir: use llvm.amdgcn.rcp for nir_op_frcp
39407ec681f3Smrg-  ac/nir: use llvm.amdgcn.rsq for nir_op_frsq
39417ec681f3Smrg-  ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()
39427ec681f3Smrg-  nir/algebraic: add fexp2(fmul(flog2(a), 0.5) -> fsqrt(a) optimization
39437ec681f3Smrg-  aco: only break SMEM clauses if XNACK is enabled (mostly APUs)
39447ec681f3Smrg-  aco: always optimize v_mad to v_madak in presence of literals
39457ec681f3Smrg-  ac/nir: split 8-bit load/store to global memory on GFX6
39467ec681f3Smrg-  ac/nir: split 8-bit SSBO stores on GFX6
39477ec681f3Smrg-  radv/llvm: enable 8-bit storage features on GFX6-GFX7
39487ec681f3Smrg-  ac/nir: split 16-bit load/store to global memory on GFX6
39497ec681f3Smrg-  ac/nir: split 16-bit SSBO stores on GFX6
39507ec681f3Smrg-  radv/llvm: enable 16-bit storage features on GFX6-GFX7
39517ec681f3Smrg-  radv: rename decompress/resummarize depth/stencil functions
39527ec681f3Smrg-  radv: rename extra graphics pipeline decompress/resummarize fields
39537ec681f3Smrg-  radv: cleanup creating the decompress/resummarize pipelines
39547ec681f3Smrg-  radv: remove radv_layout_has_htile() helper
39557ec681f3Smrg-  radv: enable lowering of GS intrinsics for the LLVM backend
39567ec681f3Smrg-  ac,radv: add ac_gpu_info::has_double_rate_fp16
39577ec681f3Smrg-  radv: only expose shaderFloat16 for chips with double rate fp16
39587ec681f3Smrg-  radv: only expose storageInputOutput16 for chips with double rate
39597ec681f3Smrg   fp16
39607ec681f3Smrg-  radv: only expose fp16 control features for chips with double rate
39617ec681f3Smrg   fp16
39627ec681f3Smrg-  radv: only enable TC-compat HTILE for images readable by a shader
39637ec681f3Smrg-  radv: allow TC-compat HTILE with GENERAL outside of render loops
39647ec681f3Smrg-  aco: implement 16-bit nir_op_frexp_sig/nir_op_frexp_exp
39657ec681f3Smrg-  aco: implement 16-bit nir_op_ffract
39667ec681f3Smrg-  aco: implement 16-bit nir_op_fexp2/nir_op_flog2
39677ec681f3Smrg-  aco: implement 16-bit nir_op_ftrunc/nir_op_fround_even
39687ec681f3Smrg-  aco: implement 16-bit nir_op_fsqrt/nir_op_frcp/nir_op_frsq
39697ec681f3Smrg-  aco: implement 16-bit nir_op_ffloor/nir_op_fceil
39707ec681f3Smrg-  aco: implement 16-bit nir_op_fmax/nir_op_fmin
39717ec681f3Smrg-  aco: implement 16-bit nir_op_fabs/nir_op_fneg
39727ec681f3Smrg-  aco: implement 16-bit nir_op_fsub/nir_op_fadd
39737ec681f3Smrg-  aco: implement 16-bit nir_op_fcos/nir_op_fsin
39747ec681f3Smrg-  aco: implement 16-bit nir_op_fmul
39757ec681f3Smrg-  aco: implement 16-bit nir_op_fsat
39767ec681f3Smrg-  aco: implement 16-bit nir_op_fsign
39777ec681f3Smrg-  aco: implement 16-bit nir_op_bcsel
39787ec681f3Smrg-  aco: implement 16-bit nir_op_f2i32/nir_op_f2u32
39797ec681f3Smrg-  aco: implement 16-bit nir_op_ldexp
39807ec681f3Smrg-  aco: implement 16-bit nir_op_fmax3/nir_op_fmin3/nir_op_fmed3
39817ec681f3Smrg-  aco: implement 16-bit comparisons
39827ec681f3Smrg-  aco: implement nir_op_b2f16/nir_op_i2f16/nir_op_u2f16
39837ec681f3Smrg-  aco: fix f2i64/f2u64 with sgprs if the exponent computation overflow
39847ec681f3Smrg-  aco: implement 16-bit nir_op_f2i64/nir_op_f2u64
39857ec681f3Smrg-  aco: fix nir_op_pack_32_2x16_split if one operand is a constant
39867ec681f3Smrg-  radv: add radeon_set_context_reg_rmw() helper
39877ec681f3Smrg-  radv: use RMW packets for updating the maximum sample distance
39887ec681f3Smrg-  aco: fix nir_op_frexp_exp with 16-bit floats and negative exponents
39897ec681f3Smrg-  radv/aco: do not advertise VK_KHR_shader_subgroup_extended_types
39907ec681f3Smrg-  aco: implement nir_op_f2i8/nir_op_f2u8
39917ec681f3Smrg-  aco: fix emitting stream output with tess eval shaders
39927ec681f3Smrg-  radv: do not abort with unknown/unimplemented descriptor types
39937ec681f3Smrg-  radv: fix geometry shader primitives query with ACO on GFX10
39947ec681f3Smrg-  radv: set missing SHARED_VGPR_CNT for NGG VS and ACO
39957ec681f3Smrg-  radv/llvm: fix exporting the viewport index if the fragment shader
39967ec681f3Smrg   needs it
39977ec681f3Smrg-  aco: fix exporting the viewport index if the fragment shader needs it
39987ec681f3Smrg-  nir/lower_int64: lower imin3/imax3/umin3/umax3/imed3/umed3
39997ec681f3Smrg-  nir/opt_algebraic: lower 64-bit fmin3/fmax3/fmed3
40007ec681f3Smrg-  gitlab-ci: add a list of excluded tests for RADV
40017ec681f3Smrg-  radv: make sure to export the viewport index if FS needs it
40027ec681f3Smrg-  radv: simplify checking for Navi1x chips
40037ec681f3Smrg-  radv: adjust the supported subgroup stages
40047ec681f3Smrg-  radv: fix robust_buffer_access if enabled via
40057ec681f3Smrg   VkPhysicalDeviceFeatures2
40067ec681f3Smrg-  gitlab-ci: add lists of expected failures for RADV CI
40077ec681f3Smrg-  ac,radeonsi: fix compilations issues with LLVM 11
40087ec681f3Smrg-  radv: do not expose GTT as device local memory mostly for APUs
40097ec681f3Smrg-  radv: enable FMASK for color attachments only
40107ec681f3Smrg-  radv: remove unused radv_device_memory::map_size field
40117ec681f3Smrg-  radv: track memory heaps usage if overallocation is explicitly
40127ec681f3Smrg   disallowed
40137ec681f3Smrg-  radv: advertise VK_AMD_memory_overallocation_behavior
40147ec681f3Smrg-  ac/llvm: fix nir_texop_texture_samples with NULL descriptors
40157ec681f3Smrg-  aco: fix nir_texop_texture_samples with NULL descriptors
40167ec681f3Smrg-  aco: fix adjusting the sample index with FMASK if value is negative
40177ec681f3Smrg-  radv: handle NULL descriptors
40187ec681f3Smrg-  radv: handle NULL vertex bindings
40197ec681f3Smrg-  radv: advertise VK_EXT_robustness2
40207ec681f3Smrg-  gitlab-ci: add a list of expected failures for FIJI with ACO
40217ec681f3Smrg-  ci: fix reporting the number of unexpected/flakes
40227ec681f3Smrg-  radv: report INITIALIZATION_FAILED when the amdgpu winsys init failed
40237ec681f3Smrg-  radv: don't report error with other vendor DRM devices
40247ec681f3Smrg-  aco: fix 64-bit trunc with negative exponents on GFX6
40257ec681f3Smrg-  radv: limit the Vulkan version to 1.1 for Android
40267ec681f3Smrg-  radv: handle different Vulkan API versions correctly
40277ec681f3Smrg-  radv: update the list of allowed Android extensions
40287ec681f3Smrg
40297ec681f3SmrgSatyajit Sahu (1):
40307ec681f3Smrg
40317ec681f3Smrg-  st/va: GetConfigAttributes: check profile and entrypoint combination
40327ec681f3Smrg
40337ec681f3SmrgSimon Ser (1):
40347ec681f3Smrg
40357ec681f3Smrg-  mesa: add support for NV_pixel_buffer_object
40367ec681f3Smrg
40377ec681f3SmrgSimon Zeni (1):
40387ec681f3Smrg
40397ec681f3Smrg-  mesa: enable GL_EXT_draw_instanced for gles2
40407ec681f3Smrg
40417ec681f3SmrgSonny Jiang (1):
40427ec681f3Smrg
40437ec681f3Smrg-  radeonsi: enable EXT_texture_shadow_lod
40447ec681f3Smrg
40457ec681f3SmrgSzymon Andrzejuk (1):
40467ec681f3Smrg
40477ec681f3Smrg-  virgl: Use align_free for align_malloc allocated buffer
40487ec681f3Smrg
40497ec681f3SmrgTapani Pälli (27):
40507ec681f3Smrg
40517ec681f3Smrg-  intel/vec4: fix valgrind errors with vf_values array
40527ec681f3Smrg-  glsl: fix a memory leak with resource_set
40537ec681f3Smrg-  iris: fix aux buf map failure in 32bits app on Android
40547ec681f3Smrg-  mesa: introduce boolean toggle for EXT_texture_norm16
40557ec681f3Smrg-  i965: toggle on EXT_texture_norm16
40567ec681f3Smrg-  mesa/st: toggle EXT_texture_norm16 based on format support
40577ec681f3Smrg-  mesa/st: fix formats required for EXT_texture_norm16
40587ec681f3Smrg-  nir: fix compilation warning on glsl_get_internal_ifc_packing
40597ec681f3Smrg-  iris: toggle on PIPE_CAP_MIXED_COLOR_DEPTH_BITS
40607ec681f3Smrg-  nir/glsl: gather bitmask of images used by program
40617ec681f3Smrg-  iris: use the images_used mask in resolve pass
40627ec681f3Smrg-  intel/compiler: detect if atomic load store operations are used
40637ec681f3Smrg-  iris: provide dummy iris_image_view_aux_usage
40647ec681f3Smrg-  iris: move existing image format fallback as a helper function
40657ec681f3Smrg-  iris: determine aux usage during predraw and state setup
40667ec681f3Smrg-  isl: allow compression for storage images on gen12+
40677ec681f3Smrg-  iris: allow compression conditionally for images on gen12
40687ec681f3Smrg-  glsl: set error_emitted true if type not ok for assignment
40697ec681f3Smrg-  mesa/st: unbind shader state before deleting it
40707ec681f3Smrg-  mesa/st: release variants for active programs before unref
40717ec681f3Smrg-  mesa: remove redudant check
40727ec681f3Smrg-  mesa: remove redudant assignment
40737ec681f3Smrg-  glsl: remove redudant assignment
40747ec681f3Smrg-  glsl: stop processing function parameters if error happened
40757ec681f3Smrg-  mesa/st: initialize all winsys_handle fields for memory objects
40767ec681f3Smrg-  anv: remove assert from GetImageMemoryRequirements[2]
40777ec681f3Smrg-  st/mesa: destroy only own program variants when program is released
40787ec681f3Smrg
40797ec681f3SmrgThomas Hellstrom (5):
40807ec681f3Smrg
40817ec681f3Smrg-  svga: Fix banded DMA upload
40827ec681f3Smrg-  svga, winsys/svga: Fix persistent memory discard maps
40837ec681f3Smrg-  svga: Treat forced coherent maps as maps of persistent memory
40847ec681f3Smrg-  gallium/pipebuffer: Use persistent maps for slabs
40857ec681f3Smrg-  winsys/svga: Optionally avoid caching buffer maps
40867ec681f3Smrg
40877ec681f3SmrgThong Thai (7):
40887ec681f3Smrg
40897ec681f3Smrg-  Revert "st/va: Convert interlaced NV12 to progressive"
40907ec681f3Smrg-  gallium/auxiliary/vl: fix bob compute shaders for deint yuv
40917ec681f3Smrg-  st/va: remove unneeded code
40927ec681f3Smrg-  st/va/postproc: reallocate interlaced destination buffer
40937ec681f3Smrg-  radeonsi: add 10-bit HEVC encode support for VCN2.0 devices
40947ec681f3Smrg-  radeon: add support for 10-bit HEVC encoding to VCN 2.0
40957ec681f3Smrg-  st/va: add check for P010 and P016 encode/decode support
40967ec681f3Smrg
40977ec681f3SmrgTimothy Arceri (51):
40987ec681f3Smrg
40997ec681f3Smrg-  glsl: fix gl_nir_set_uniform_initializers() for image arrays
41007ec681f3Smrg-  glsl: fix possible memory leak in nir uniform linker
41017ec681f3Smrg-  glsl: set the correct number of samplers in a shader
41027ec681f3Smrg-  glsl: set the correct number of images in a shader
41037ec681f3Smrg-  glsl: fix resizing of the uniform remap table
41047ec681f3Smrg-  glsl: reset next_image_index count for each shader stage
41057ec681f3Smrg-  glsl: fix sampler index calculation in nir linker
41067ec681f3Smrg-  glsl: add some error checks to the nir uniform linker
41077ec681f3Smrg-  glsl: move nir link uniforms struct defs earlier
41087ec681f3Smrg-  glsl: move add_parameter() earlier in nir link uniforms
41097ec681f3Smrg-  glsl: move get_next_index() earlier in nir link uniforms
41107ec681f3Smrg-  glsl: add name support to nir uniform linker
41117ec681f3Smrg-  glsl: correctly find block index when linking glsl with nir linker
41127ec681f3Smrg-  nir: add glsl_get_internal_ifc_packing() helper
41137ec681f3Smrg-  nir: add glsl_get_std140_base_alignment() helper
41147ec681f3Smrg-  nir: add glsl_get_std140_size() helper
41157ec681f3Smrg-  nir: add glsl_get_std430_base_alignment() helper
41167ec681f3Smrg-  nir: add glsl_get_std430_size() helper
41177ec681f3Smrg-  glsl: add std140 and std430 layouts to nir uniform linker
41187ec681f3Smrg-  glsl: correctly set explicit offsets for struct members
41197ec681f3Smrg-  glsl: find the base offset for block members from unnamed blocks
41207ec681f3Smrg-  glsl: nir linker fix setting of ssbo top level array
41217ec681f3Smrg-  glsl: set ShaderStorageBlocksWriteAccess in the nir linker
41227ec681f3Smrg-  glsl: add support for builtins to the nir uniform linker
41237ec681f3Smrg-  glsl: dont try to assign uniform storage for uniform blocks
41247ec681f3Smrg-  glsl: add subroutine support to nir linker
41257ec681f3Smrg-  glsl: fix varying packing for 64bit integers
41267ec681f3Smrg-  nir: fix packing of TCS varyings not read by the TES
41277ec681f3Smrg-  nir: fix crash in varying packing on interface mismatch
41287ec681f3Smrg-  glsl_to_nir: remove dead code
41297ec681f3Smrg-  radeonsi: don't lower constant arrays to uniforms in GLSL IR
41307ec681f3Smrg-  nir: make opt_if_loop_terminator() less strict
41317ec681f3Smrg-  nir: add matrix_layout to nir_variable data
41327ec681f3Smrg-  glsl: fix struct offsets in the nir uniform linker
41337ec681f3Smrg-  glsl: tidy up uniform storage value count code in NIR linker
41347ec681f3Smrg-  Revert "glsl: fix resizing of the uniform remap table"
41357ec681f3Smrg-  glsl: fix explicit locations for the glsl linker
41367ec681f3Smrg-  glsl: error check max user assignable uniform locations
41377ec681f3Smrg-  glsl: fix block index in NIR uniform linker
41387ec681f3Smrg-  glsl: pull mark_array_elements_referenced() out into common helper
41397ec681f3Smrg-  glsl: only set stage ref when uniforms referenced in stage
41407ec681f3Smrg-  nir/gcm: allow derivative dependent intrinisics to be moved earlier
41417ec681f3Smrg-  nir/gcm: be more conservative about moving instructions from loops
41427ec681f3Smrg-  nir/gcm: dont move movs unless we can replace them later with their
41437ec681f3Smrg   src
41447ec681f3Smrg-  glsl: add bindless support to nir uniform linker
41457ec681f3Smrg-  glsl: fix gl_nir_set_uniform_initializers() for bindless textures
41467ec681f3Smrg-  st/glsl_to_nir: make use of nir linker for linking uniforms
41477ec681f3Smrg-  glsl: some nir uniform linker fixes
41487ec681f3Smrg-  glsl: remove some duplicate code from the nir uniform linker
41497ec681f3Smrg-  glsl: stop cascading errors if process_parameters() fails
41507ec681f3Smrg-  glsl: fix slow linking of uniforms in the nir linker
41517ec681f3Smrg
41527ec681f3SmrgTimur Kristóf (90):
41537ec681f3Smrg
41547ec681f3Smrg-  aco/optimizer: Don't combine uniform bool s_and to s_andn2.
41557ec681f3Smrg-  radv: Move some helper functions to the radv_shader.h header file.
41567ec681f3Smrg-  aco: Extract setup_gs_variables into a separate function.
41577ec681f3Smrg-  aco: Setup tessellation control shader variables.
41587ec681f3Smrg-  aco: Implement load_tess_coord.
41597ec681f3Smrg-  aco: Implement load_primitive_id for tessellation shaders.
41607ec681f3Smrg-  aco: Implement load_patch_vertices_in.
41617ec681f3Smrg-  aco: Implement load_invocation_id for tessellation control shaders.
41627ec681f3Smrg-  aco: Implement control_barrier for tessellation control shaders.
41637ec681f3Smrg-  aco: Implement memory_barrier_tcs_patch.
41647ec681f3Smrg-  aco: Implement load_view_index for TCS and TES.
41657ec681f3Smrg-  aco: Setup correct HW stages when tessellation is used.
41667ec681f3Smrg-  aco: Use mesa shader stage when loading inputs.
41677ec681f3Smrg-  aco: Remove vertex_geometry_gs assertion from merged shaders.
41687ec681f3Smrg-  aco: Extract LDS alignment calculation to a separate function.
41697ec681f3Smrg-  aco: Remove esgs_itemsize from LDS alignment calculation.
41707ec681f3Smrg-  aco: Introduce new VMEM load/store helpers.
41717ec681f3Smrg-  aco: Introduce new helpers for calculating address offsets.
41727ec681f3Smrg-  aco: Refactor load_per_vertex_input in preparation for tessellation.
41737ec681f3Smrg-  aco: Refactor VS output stores in preparation for tessellation.
41747ec681f3Smrg-  aco: Slight fix to lds_store and lds_load.
41757ec681f3Smrg-  aco: Fix combining DS additions in the optimizer.
41767ec681f3Smrg-  aco: Implement tessellation control shader input/output.
41777ec681f3Smrg-  aco: Store VS outputs correctly when tessellation is used.
41787ec681f3Smrg-  aco: Fix LS VGPR init bug on affected hardware.
41797ec681f3Smrg-  radv: Enable ACO for tessellation control shaders.
41807ec681f3Smrg-  aco: Setup tessellation evaluation shader variables.
41817ec681f3Smrg-  aco: Use TES output info when TES runs on the VS stage.
41827ec681f3Smrg-  aco: Store TES outputs when TES runs on the HW VS stage.
41837ec681f3Smrg-  aco: Enable streamout when TES runs on the HW VS stage.
41847ec681f3Smrg-  aco: Implement loading TES inputs.
41857ec681f3Smrg-  radv: Enable ACO for TES when there is no GS.
41867ec681f3Smrg-  aco: Enable running TES as ES, including merged TES+GS.
41877ec681f3Smrg-  radv: Enable ACO on all stages.
41887ec681f3Smrg-  aco: Don't generate an if when the first part of a merged HS or GS is
41897ec681f3Smrg   empty.
41907ec681f3Smrg-  aco: Store tess factors in VMEM only at the end of the shader.
41917ec681f3Smrg-  aco: Only write TCS outputs to LDS when they are read by the TCS.
41927ec681f3Smrg-  aco: Don't store TCS outputs to LDS when we're sure that none are
41937ec681f3Smrg   read.
41947ec681f3Smrg-  nir: Add ability to lower non-const quad broadcasts to const ones.
41957ec681f3Smrg-  radv: Enable lowering dynamic quad broadcasts.
41967ec681f3Smrg-  radv: Enable subgroup shuffle on GFX10 when ACO is used.
41977ec681f3Smrg-  aco: Create null exports in instruction selection instead of
41987ec681f3Smrg   assembler.
41997ec681f3Smrg-  aco: Extract tcs_driver_location_matches_api_mask to separate
42007ec681f3Smrg   function.
42017ec681f3Smrg-  aco: Fix handling of tess factors.
42027ec681f3Smrg-  aco: Allow combining TCS output VMEM stores.
42037ec681f3Smrg-  aco: Allow combining LDS loads when loading tess factors.
42047ec681f3Smrg-  aco: Skip 2nd read of merged wave info when TCS in/out vertices are
42057ec681f3Smrg   equal.
42067ec681f3Smrg-  aco: Use more optimal sequence at the beginning of merged shaders.
42077ec681f3Smrg-  nir: Collect if shader uses cross-invocation or indirect I/O.
42087ec681f3Smrg-  aco: Treat outputs of the previous stage as inputs of the next stage.
42097ec681f3Smrg-  aco: Change isel inputs/outputs to a flat array.
42107ec681f3Smrg-  aco: Zero-fill undefined elements in create_vec_from_array.
42117ec681f3Smrg-  aco: Extract setup_tcs_info to a separate function.
42127ec681f3Smrg-  aco: Fix workgroup size calculation.
42137ec681f3Smrg-  aco: Extract store_output_to_temps into a separate function.
42147ec681f3Smrg-  aco: When LS and HS invocations are the same, pass LS outputs in
42157ec681f3Smrg   temps.
42167ec681f3Smrg-  aco: Don't store LS VS outputs to LDS when TCS doesn't need them.
42177ec681f3Smrg-  aco: Fix crash in insert_wait_states.
42187ec681f3Smrg-  aco: Extract uniform if handling to separate functions.
42197ec681f3Smrg-  aco: Print block_kind_export_end.
42207ec681f3Smrg-  aco: Extract merged_wave_info_to_mask to its own function.
42217ec681f3Smrg-  aco: Treat s_setprio as a scheduling barrier.
42227ec681f3Smrg-  aco/ngg: Add new stage for hw_ngg_gs.
42237ec681f3Smrg-  aco/ngg: Initialize exec mask for NGG VS and TES.
42247ec681f3Smrg-  aco/ngg: Fix exports for NGG VS and TES.
42257ec681f3Smrg-  aco/ngg: Setup NGG VS and TES stages.
42267ec681f3Smrg-  aco/ngg: Implement NGG VS and TES.
42277ec681f3Smrg-  aco/ngg: Schedule position exports of NGG VS/TES.
42287ec681f3Smrg-  aco/ngg: Run GS_ALLOC_REQ on priority 3 for NGG VS and TES.
42297ec681f3Smrg-  radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.
42307ec681f3Smrg-  aco: Print shader stage in aco_print_program.
42317ec681f3Smrg-  radv: Print shader stage before disassembly.
42327ec681f3Smrg-  radv: Add inputs read by TES to radv_shader_info.
42337ec681f3Smrg-  aco: Only store TCS outputs to VMEM when they are read by TES.
42347ec681f3Smrg-  aco: Increase barrier_count to 7 to include barrier_barrier.
42357ec681f3Smrg-  aco: Abort when RA can't find a register.
42367ec681f3Smrg-  aco: Const correctness for get_barrier_interaction.
42377ec681f3Smrg-  aco: Const correctness for aco_print_ir.
42387ec681f3Smrg-  aco: Use 24-bit multiplication in TCS I/O
42397ec681f3Smrg-  aco: Use 24-bit multiplication for NGG wave id and thread id.
42407ec681f3Smrg-  aco: Move s_setprio to correct place after the gs_alloc_req.
42417ec681f3Smrg-  radv: Refactor calculate_tess_lds_size and get_tcs_num_patches.
42427ec681f3Smrg-  aco: Use context variables instead of calculating TCS inputs/outputs.
42437ec681f3Smrg-  aco: Remember VS/TCS output driver locations.
42447ec681f3Smrg-  aco: Calculate workgroup size of legacy GS.
42457ec681f3Smrg-  aco: Set config->lds_size when TES or VS is running on HW ESGS.
42467ec681f3Smrg-  nir: Add new linking helper to set linked driver locations.
42477ec681f3Smrg-  radv: Use new linking helper to set default driver locations.
42487ec681f3Smrg-  aco: Use new default driver locations.
42497ec681f3Smrg-  radv: Use smaller esgs_itemsize for ACO.
42507ec681f3Smrg
42517ec681f3SmrgTobias Jakobi (1):
42527ec681f3Smrg
42537ec681f3Smrg-  meson: Link Gallium Nine with ld_args_build_id
42547ec681f3Smrg
42557ec681f3SmrgTomasz Pyra (1):
42567ec681f3Smrg
42577ec681f3Smrg-  gallium/swr: spin-lock performance improvement
42587ec681f3Smrg
42597ec681f3SmrgTomeu Vizoso (34):
42607ec681f3Smrg
42617ec681f3Smrg-  panfrost: Print intended field when decoding
42627ec681f3Smrg-  panfrost: Add more info to some assertions
42637ec681f3Smrg-  pan/midgard: Handle nir_intrinsic_load_barycentric_centroid
42647ec681f3Smrg-  panfrost: Use DBG macro to avoid noise in the console
42657ec681f3Smrg-  panfrost: Fix decoding of tiled 3D textures
42667ec681f3Smrg-  panfrost: Only clamp the LOD to disable mipmapping when needed
42677ec681f3Smrg-  gitlab-ci: Switch kernel for LAVA jobs to 5.5
42687ec681f3Smrg-  gitlab-ci: Disable the lima job for now
42697ec681f3Smrg-  gitlab-ci: Run GLES3 tests in dEQP on Panfrost
42707ec681f3Smrg-  panfrost: Remove some more prints to stdout
42717ec681f3Smrg-  gitlab-ci: Move to 5.5 kernel plus fixes for Panfrost
42727ec681f3Smrg-  gitlab-ci: Use PAN_MESA_DEBUG=gles3 for Panfrost
42737ec681f3Smrg-  gitlab-ci: Remove GLES3 test from Panfrost fails list
42747ec681f3Smrg-  gitlab-ci: Skip dEQP-GLES3.functional.shaders.derivate.\*
42757ec681f3Smrg-  gallium: Add forgotten docs for new CAPs related to transform
42767ec681f3Smrg   feedback
42777ec681f3Smrg-  gitlab-ci: Update renderdoc
42787ec681f3Smrg-  gitlab-ci: Use surfaceless platform also for apitrace
42797ec681f3Smrg-  gitlab-ci: Place files from the Mesa repo into the build tarball
42807ec681f3Smrg-  gitlab-ci: Serve files for LAVA via separate service
42817ec681f3Smrg-  gitlab-ci: Disable jobs for Collabora's LAVA lab
42827ec681f3Smrg-  Revert "gitlab-ci: Disable jobs for Collabora's LAVA lab"
42837ec681f3Smrg-  panfrost: Remove most usage of midgard_payload_vertex_tiler
42847ec681f3Smrg-  panfrost: Pass IS_BIFROST to pandecode_jc
42857ec681f3Smrg-  panfrost: Don't emit write_value jobs on Bifrost
42867ec681f3Smrg-  panfrost: On Bifrost, set the right tiler descriptor
42877ec681f3Smrg-  gitlab-ci: Test virgl driver
42887ec681f3Smrg-  panfrost: Clean up a bit the tiler structs for Bifrost
42897ec681f3Smrg-  panfrost: Emit sampler descriptor on bifrost
42907ec681f3Smrg-  panfrost: Emit texture descriptor on bifrost
42917ec681f3Smrg-  gitlab-ci: Update virglrenderer in the x86_test-gl image
42927ec681f3Smrg-  gitlab-ci: Allow test jobs to add options to the dEQP invocation
42937ec681f3Smrg-  gitlab-ci: Test OpenGL ES 3.1 on virgl
42947ec681f3Smrg-  gitlab-ci: Test Virgl with traces
42957ec681f3Smrg-  panfrost: Add Bifrost texture trampoline BO to batch
42967ec681f3Smrg
42977ec681f3SmrgUros Bizjak (1):
42987ec681f3Smrg
42997ec681f3Smrg-  doc: Update features.txt for r600 with misc supported features
43007ec681f3Smrg
43017ec681f3SmrgVasily Khoruzhick (19):
43027ec681f3Smrg
43037ec681f3Smrg-  lima: handle early-z and pixel kill better
43047ec681f3Smrg-  lima: implement PLB PP stream cache
43057ec681f3Smrg-  lima: add RGBA5551 and RGBA4444 formats
43067ec681f3Smrg-  lima: don't disable tiling if there's linear modifier in list
43077ec681f3Smrg-  lima: gpir: enforce instruction limit earlier
43087ec681f3Smrg-  panfrost: split index cache into shared part
43097ec681f3Smrg-  lima: enable minmax cache for index buffers
43107ec681f3Smrg-  lima: print gp uniforms if gp debug is enabled
43117ec681f3Smrg-  lima/gpir: improve disassembler output
43127ec681f3Smrg-  lima/gpir: print acc ops even if we have only one source
43137ec681f3Smrg-  lima/gpir: kill dead writes to regs in DCE
43147ec681f3Smrg-  lima/gpir: add better lowering for ftrunc
43157ec681f3Smrg-  lima/gpir: fix crash in schedule_insert_ready_list()
43167ec681f3Smrg-  lima: disable Z16 format
43177ec681f3Smrg-  lima: decode depth/stencil write bits in RSW
43187ec681f3Smrg-  lima: split pixel and texel format tables
43197ec681f3Smrg-  lima: add support for R and RG formats
43207ec681f3Smrg-  lima: Implement lima_texture_subdata
43217ec681f3Smrg-  lima: avoid situations when scissor minx > maxx or miny > maxy
43227ec681f3Smrg
43237ec681f3SmrgVeerabadhran (1):
43247ec681f3Smrg
43257ec681f3Smrg-  radeon/vce: Move global function pointer si_get_pic_param to local
43267ec681f3Smrg   encoder structure Multi gpu use case broken when the function was
43277ec681f3Smrg   global
43287ec681f3Smrg
43297ec681f3SmrgVilya Harvey (1):
43307ec681f3Smrg
43317ec681f3Smrg-  zink. Don't set incorrect sType in VkImportMemoryFdInfoKHR struct
43327ec681f3Smrg
43337ec681f3SmrgVinson Lee (16):
43347ec681f3Smrg
43357ec681f3Smrg-  swr: Fix build with GCC 10.
43367ec681f3Smrg-  lima: Fix build with GCC 10.
43377ec681f3Smrg-  swr: Fix GCC 4.9 checks.
43387ec681f3Smrg-  panfrost: Remove unused anonymous enum variables.
43397ec681f3Smrg-  meson: Enable -Wno-deprecated only for bison > 2.3.
43407ec681f3Smrg-  swr: Fix non-pod-varargs error.
43417ec681f3Smrg-  st/nine: Fix incompatible-pointer-types-discards-qualifiers errors.
43427ec681f3Smrg-  panfrost: Fix gnu-empty-initializer error.
43437ec681f3Smrg-  util/u_process: Add util_get_process_exec_path for macOS.
43447ec681f3Smrg-  mesa: Change \_mesa_exec_malloc argument type.
43457ec681f3Smrg-  gallivm: Add missing header for powf.
43467ec681f3Smrg-  swr/rasterizer: Use private functions for min/max to avoid namespace
43477ec681f3Smrg   issues.
43487ec681f3Smrg-  swr: Remove Byte Order Mark.
43497ec681f3Smrg-  r600/sfn: Initialize VertexStageExportForGS m_num_clip_dist member
43507ec681f3Smrg   variable.
43517ec681f3Smrg-  r600/sfn: Use correct setter method.
43527ec681f3Smrg-  freedreno: Add missing va_end.
43537ec681f3Smrg
43547ec681f3SmrgYevhenii Kolesnikov (1):
43557ec681f3Smrg
43567ec681f3Smrg-  intel/compiler: fix cmod propagation optimisations
43577ec681f3Smrg
43587ec681f3SmrgZhang, Boyuan (1):
43597ec681f3Smrg
43607ec681f3Smrg-  radeonsi: Add support for midstream bitrate change in encoder
43617ec681f3Smrg
43627ec681f3Smrgluc (1):
43637ec681f3Smrg
43647ec681f3Smrg-  zink: confused compilation macro usage for zink in target helpers.
4365