17ec681f3Smrg/* 27ec681f3Smrg * Copyright 2017 Advanced Micro Devices, Inc. 37ec681f3Smrg * 47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 57ec681f3Smrg * copy of this software and associated documentation files (the "Software"), 67ec681f3Smrg * to deal in the Software without restriction, including without limitation 77ec681f3Smrg * on the rights to use, copy, modify, merge, publish, distribute, sub 87ec681f3Smrg * license, and/or sell copies of the Software, and to permit persons to whom 97ec681f3Smrg * the Software is furnished to do so, subject to the following conditions: 107ec681f3Smrg * 117ec681f3Smrg * The above copyright notice and this permission notice (including the next 127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the 137ec681f3Smrg * Software. 147ec681f3Smrg * 157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 187ec681f3Smrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 197ec681f3Smrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 207ec681f3Smrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 217ec681f3Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE. 227ec681f3Smrg */ 237ec681f3Smrg 247ec681f3Smrg#ifndef AC_SHADER_ABI_H 257ec681f3Smrg#define AC_SHADER_ABI_H 267ec681f3Smrg 277ec681f3Smrg#include "ac_shader_args.h" 287ec681f3Smrg#include "compiler/shader_enums.h" 297ec681f3Smrg#include <llvm-c/Core.h> 307ec681f3Smrg 317ec681f3Smrg#include <assert.h> 327ec681f3Smrg 337ec681f3Smrg#define AC_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1) 347ec681f3Smrg 357ec681f3Smrg#define AC_MAX_INLINE_PUSH_CONSTS 8 367ec681f3Smrg 377ec681f3Smrgenum ac_descriptor_type 387ec681f3Smrg{ 397ec681f3Smrg AC_DESC_IMAGE, 407ec681f3Smrg AC_DESC_FMASK, 417ec681f3Smrg AC_DESC_SAMPLER, 427ec681f3Smrg AC_DESC_BUFFER, 437ec681f3Smrg AC_DESC_PLANE_0, 447ec681f3Smrg AC_DESC_PLANE_1, 457ec681f3Smrg AC_DESC_PLANE_2, 467ec681f3Smrg}; 477ec681f3Smrg 487ec681f3Smrg/* Document the shader ABI during compilation. This is what allows radeonsi and 497ec681f3Smrg * radv to share a compiler backend. 507ec681f3Smrg */ 517ec681f3Smrgstruct ac_shader_abi { 527ec681f3Smrg LLVMValueRef outputs[AC_LLVM_MAX_OUTPUTS * 4]; 537ec681f3Smrg 547ec681f3Smrg /* These input registers sometimes need to be fixed up. */ 557ec681f3Smrg LLVMValueRef vertex_id; 567ec681f3Smrg LLVMValueRef instance_id; 577ec681f3Smrg LLVMValueRef persp_centroid, linear_centroid; 587ec681f3Smrg LLVMValueRef color0, color1; 597ec681f3Smrg LLVMValueRef user_data; 607ec681f3Smrg 617ec681f3Smrg /* Varying -> attribute number mapping. Also NIR-only */ 627ec681f3Smrg unsigned fs_input_attr_indices[MAX_VARYING]; 637ec681f3Smrg 647ec681f3Smrg void (*export_vertex)(struct ac_shader_abi *abi); 657ec681f3Smrg 667ec681f3Smrg void (*emit_outputs)(struct ac_shader_abi *abi); 677ec681f3Smrg 687ec681f3Smrg void (*emit_vertex)(struct ac_shader_abi *abi, unsigned stream, LLVMValueRef *addrs); 697ec681f3Smrg 707ec681f3Smrg void (*emit_primitive)(struct ac_shader_abi *abi, unsigned stream); 717ec681f3Smrg 727ec681f3Smrg void (*emit_vertex_with_counter)(struct ac_shader_abi *abi, unsigned stream, 737ec681f3Smrg LLVMValueRef vertexidx, LLVMValueRef *addrs); 747ec681f3Smrg 757ec681f3Smrg LLVMValueRef (*load_inputs)(struct ac_shader_abi *abi, 767ec681f3Smrg unsigned driver_location, unsigned component, 777ec681f3Smrg unsigned num_components, unsigned vertex_index, 787ec681f3Smrg LLVMTypeRef type); 797ec681f3Smrg 807ec681f3Smrg LLVMValueRef (*load_tess_varyings)(struct ac_shader_abi *abi, LLVMTypeRef type, 817ec681f3Smrg LLVMValueRef vertex_index, LLVMValueRef param_index, 827ec681f3Smrg unsigned driver_location, unsigned component, 837ec681f3Smrg unsigned num_components, 847ec681f3Smrg bool load_inputs, bool vertex_index_is_invoc_id); 857ec681f3Smrg 867ec681f3Smrg void (*store_tcs_outputs)(struct ac_shader_abi *abi, 877ec681f3Smrg LLVMValueRef vertex_index, LLVMValueRef param_index, 887ec681f3Smrg LLVMValueRef src, unsigned writemask, 897ec681f3Smrg unsigned component, unsigned location, unsigned driver_location); 907ec681f3Smrg 917ec681f3Smrg LLVMValueRef (*load_patch_vertices_in)(struct ac_shader_abi *abi); 927ec681f3Smrg 937ec681f3Smrg LLVMValueRef (*load_ring_tess_offchip)(struct ac_shader_abi *abi); 947ec681f3Smrg 957ec681f3Smrg LLVMValueRef (*load_ring_tess_factors)(struct ac_shader_abi *abi); 967ec681f3Smrg 977ec681f3Smrg LLVMValueRef (*load_ring_esgs)(struct ac_shader_abi *abi); 987ec681f3Smrg 997ec681f3Smrg LLVMValueRef (*load_tess_level)(struct ac_shader_abi *abi, unsigned varying_id, 1007ec681f3Smrg bool load_default_state); 1017ec681f3Smrg 1027ec681f3Smrg LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, 1037ec681f3Smrg unsigned desc_set, unsigned binding, 1047ec681f3Smrg bool valid_binding, LLVMValueRef index); 1057ec681f3Smrg 1067ec681f3Smrg /** 1077ec681f3Smrg * Load the descriptor for the given buffer. 1087ec681f3Smrg * 1097ec681f3Smrg * \param buffer the buffer as presented in NIR: this is the descriptor 1107ec681f3Smrg * in Vulkan, and the buffer index in OpenGL/Gallium 1117ec681f3Smrg * \param write whether buffer contents will be written 1127ec681f3Smrg * \param non_uniform whether the buffer descriptor is not assumed to be uniform 1137ec681f3Smrg */ 1147ec681f3Smrg LLVMValueRef (*load_ssbo)(struct ac_shader_abi *abi, LLVMValueRef buffer, bool write, bool non_uniform); 1157ec681f3Smrg 1167ec681f3Smrg /** 1177ec681f3Smrg * Load a descriptor associated to a sampler. 1187ec681f3Smrg * 1197ec681f3Smrg * \param descriptor_set the descriptor set index (only for Vulkan) 1207ec681f3Smrg * \param base_index the base index of the sampler variable 1217ec681f3Smrg * \param constant_index constant part of an array index (or 0, if the 1227ec681f3Smrg * sampler variable is not an array) 1237ec681f3Smrg * \param index non-constant part of an array index (may be NULL) 1247ec681f3Smrg * \param desc_type the type of descriptor to load 1257ec681f3Smrg * \param image whether the descriptor is loaded for an image operation 1267ec681f3Smrg */ 1277ec681f3Smrg LLVMValueRef (*load_sampler_desc)(struct ac_shader_abi *abi, unsigned descriptor_set, 1287ec681f3Smrg unsigned base_index, unsigned constant_index, 1297ec681f3Smrg LLVMValueRef index, enum ac_descriptor_type desc_type, 1307ec681f3Smrg bool image, bool write, bool bindless); 1317ec681f3Smrg 1327ec681f3Smrg /** 1337ec681f3Smrg * Load a Vulkan-specific resource. 1347ec681f3Smrg * 1357ec681f3Smrg * \param index resource index 1367ec681f3Smrg * \param desc_set descriptor set 1377ec681f3Smrg * \param binding descriptor set binding 1387ec681f3Smrg */ 1397ec681f3Smrg LLVMValueRef (*load_resource)(struct ac_shader_abi *abi, LLVMValueRef index, unsigned desc_set, 1407ec681f3Smrg unsigned binding); 1417ec681f3Smrg 1427ec681f3Smrg LLVMValueRef (*load_sample_position)(struct ac_shader_abi *abi, LLVMValueRef sample_id); 1437ec681f3Smrg 1447ec681f3Smrg LLVMValueRef (*load_local_group_size)(struct ac_shader_abi *abi); 1457ec681f3Smrg 1467ec681f3Smrg LLVMValueRef (*load_sample_mask_in)(struct ac_shader_abi *abi); 1477ec681f3Smrg 1487ec681f3Smrg LLVMValueRef (*load_base_vertex)(struct ac_shader_abi *abi, bool non_indexed_is_zero); 1497ec681f3Smrg 1507ec681f3Smrg LLVMValueRef (*emit_fbfetch)(struct ac_shader_abi *abi); 1517ec681f3Smrg 1527ec681f3Smrg /* Whether to clamp the shadow reference value to [0,1]on GFX8. Radeonsi currently 1537ec681f3Smrg * uses it due to promoting D16 to D32, but radv needs it off. */ 1547ec681f3Smrg bool clamp_shadow_reference; 1557ec681f3Smrg bool interp_at_sample_force_center; 1567ec681f3Smrg 1577ec681f3Smrg /* Whether bounds checks are required */ 1587ec681f3Smrg bool robust_buffer_access; 1597ec681f3Smrg 1607ec681f3Smrg /* Check for Inf interpolation coeff */ 1617ec681f3Smrg bool kill_ps_if_inf_interp; 1627ec681f3Smrg 1637ec681f3Smrg /* Whether undef values must be converted to zero */ 1647ec681f3Smrg bool convert_undef_to_zero; 1657ec681f3Smrg 1667ec681f3Smrg /* Clamp div by 0 (so it won't produce NaN) */ 1677ec681f3Smrg bool clamp_div_by_zero; 1687ec681f3Smrg 1697ec681f3Smrg /* Whether gl_FragCoord.z should be adjusted for VRS due to a hw bug on 1707ec681f3Smrg * some GFX10.3 chips. 1717ec681f3Smrg */ 1727ec681f3Smrg bool adjust_frag_coord_z; 1737ec681f3Smrg}; 1747ec681f3Smrg 1757ec681f3Smrg#endif /* AC_SHADER_ABI_H */ 176