101e04c3fSmrg/*
201e04c3fSmrg * Copyright © 2016 Red Hat.
301e04c3fSmrg * Copyright © 2016 Bas Nieuwenhuizen
401e04c3fSmrg *
501e04c3fSmrg * based in part on anv driver which is:
601e04c3fSmrg * Copyright © 2015 Intel Corporation
701e04c3fSmrg *
801e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
901e04c3fSmrg * copy of this software and associated documentation files (the "Software"),
1001e04c3fSmrg * to deal in the Software without restriction, including without limitation
1101e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1201e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the
1301e04c3fSmrg * Software is furnished to do so, subject to the following conditions:
1401e04c3fSmrg *
1501e04c3fSmrg * The above copyright notice and this permission notice (including the next
1601e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the
1701e04c3fSmrg * Software.
1801e04c3fSmrg *
1901e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
2001e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
2101e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
2201e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
2301e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2401e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2501e04c3fSmrg * IN THE SOFTWARE.
2601e04c3fSmrg */
2701e04c3fSmrg#include "radv_private.h"
2801e04c3fSmrg
2901e04c3fSmrg#include "vk_util.h"
3001e04c3fSmrg
31ed98bd31Smayastatic void
327ec681f3Smrgradv_render_pass_add_subpass_dep(struct radv_render_pass *pass, const VkSubpassDependency2 *dep)
33ed98bd31Smaya{
347ec681f3Smrg   uint32_t src = dep->srcSubpass;
357ec681f3Smrg   uint32_t dst = dep->dstSubpass;
367ec681f3Smrg
377ec681f3Smrg   /* Ignore subpass self-dependencies as they allow the app to call
387ec681f3Smrg    * vkCmdPipelineBarrier() inside the render pass and the driver should
397ec681f3Smrg    * only do the barrier when called, not when starting the render pass.
407ec681f3Smrg    */
417ec681f3Smrg   if (src == dst)
427ec681f3Smrg      return;
437ec681f3Smrg
447ec681f3Smrg   /* Accumulate all ingoing external dependencies to the first subpass. */
457ec681f3Smrg   if (src == VK_SUBPASS_EXTERNAL)
467ec681f3Smrg      dst = 0;
477ec681f3Smrg
487ec681f3Smrg   if (dst == VK_SUBPASS_EXTERNAL) {
497ec681f3Smrg      if (dep->dstStageMask != VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT)
507ec681f3Smrg         pass->end_barrier.src_stage_mask |= dep->srcStageMask;
517ec681f3Smrg      pass->end_barrier.src_access_mask |= dep->srcAccessMask;
527ec681f3Smrg      pass->end_barrier.dst_access_mask |= dep->dstAccessMask;
537ec681f3Smrg   } else {
547ec681f3Smrg      if (dep->dstStageMask != VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT)
557ec681f3Smrg         pass->subpasses[dst].start_barrier.src_stage_mask |= dep->srcStageMask;
567ec681f3Smrg      pass->subpasses[dst].start_barrier.src_access_mask |= dep->srcAccessMask;
577ec681f3Smrg      pass->subpasses[dst].start_barrier.dst_access_mask |= dep->dstAccessMask;
587ec681f3Smrg   }
59ed98bd31Smaya}
60ed98bd31Smaya
61ed98bd31Smayastatic void
627ec681f3Smrgradv_render_pass_add_implicit_deps(struct radv_render_pass *pass)
63ed98bd31Smaya{
647ec681f3Smrg   /* From the Vulkan 1.0.39 spec:
657ec681f3Smrg    *
667ec681f3Smrg    *    If there is no subpass dependency from VK_SUBPASS_EXTERNAL to the
677ec681f3Smrg    *    first subpass that uses an attachment, then an implicit subpass
687ec681f3Smrg    *    dependency exists from VK_SUBPASS_EXTERNAL to the first subpass it is
697ec681f3Smrg    *    used in. The implicit subpass dependency only exists if there
707ec681f3Smrg    *    exists an automatic layout transition away from initialLayout.
717ec681f3Smrg    *    The subpass dependency operates as if defined with the
727ec681f3Smrg    *    following parameters:
737ec681f3Smrg    *
747ec681f3Smrg    *    VkSubpassDependency implicitDependency = {
757ec681f3Smrg    *        .srcSubpass = VK_SUBPASS_EXTERNAL;
767ec681f3Smrg    *        .dstSubpass = firstSubpass; // First subpass attachment is used in
777ec681f3Smrg    *        .srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT;
787ec681f3Smrg    *        .dstStageMask = VK_PIPELINE_STAGE_ALL_COMMANDS_BIT;
797ec681f3Smrg    *        .srcAccessMask = 0;
807ec681f3Smrg    *        .dstAccessMask = VK_ACCESS_INPUT_ATTACHMENT_READ_BIT |
817ec681f3Smrg    *                         VK_ACCESS_COLOR_ATTACHMENT_READ_BIT |
827ec681f3Smrg    *                         VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT |
837ec681f3Smrg    *                         VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT |
847ec681f3Smrg    *                         VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
857ec681f3Smrg    *        .dependencyFlags = 0;
867ec681f3Smrg    *    };
877ec681f3Smrg    *
887ec681f3Smrg    *    Similarly, if there is no subpass dependency from the last subpass
897ec681f3Smrg    *    that uses an attachment to VK_SUBPASS_EXTERNAL, then an implicit
907ec681f3Smrg    *    subpass dependency exists from the last subpass it is used in to
917ec681f3Smrg    *    VK_SUBPASS_EXTERNAL. The implicit subpass dependency only exists
927ec681f3Smrg    *    if there exists an automatic layout transition into finalLayout.
937ec681f3Smrg    *    The subpass dependency operates as if defined with the following
947ec681f3Smrg    *    parameters:
957ec681f3Smrg    *
967ec681f3Smrg    *    VkSubpassDependency implicitDependency = {
977ec681f3Smrg    *        .srcSubpass = lastSubpass; // Last subpass attachment is used in
987ec681f3Smrg    *        .dstSubpass = VK_SUBPASS_EXTERNAL;
997ec681f3Smrg    *        .srcStageMask = VK_PIPELINE_STAGE_ALL_COMMANDS_BIT;
1007ec681f3Smrg    *        .dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT;
1017ec681f3Smrg    *        .srcAccessMask = VK_ACCESS_INPUT_ATTACHMENT_READ_BIT |
1027ec681f3Smrg    *                         VK_ACCESS_COLOR_ATTACHMENT_READ_BIT |
1037ec681f3Smrg    *                         VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT |
1047ec681f3Smrg    *                         VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT |
1057ec681f3Smrg    *                         VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
1067ec681f3Smrg    *        .dstAccessMask = 0;
1077ec681f3Smrg    *        .dependencyFlags = 0;
1087ec681f3Smrg    *    };
1097ec681f3Smrg    */
1107ec681f3Smrg   for (uint32_t i = 0; i < pass->subpass_count; i++) {
1117ec681f3Smrg      struct radv_subpass *subpass = &pass->subpasses[i];
1127ec681f3Smrg      bool add_ingoing_dep = false, add_outgoing_dep = false;
1137ec681f3Smrg
1147ec681f3Smrg      for (uint32_t j = 0; j < subpass->attachment_count; j++) {
1157ec681f3Smrg         struct radv_subpass_attachment *subpass_att = &subpass->attachments[j];
1167ec681f3Smrg         if (subpass_att->attachment == VK_ATTACHMENT_UNUSED)
1177ec681f3Smrg            continue;
1187ec681f3Smrg
1197ec681f3Smrg         struct radv_render_pass_attachment *pass_att = &pass->attachments[subpass_att->attachment];
1207ec681f3Smrg         uint32_t initial_layout = pass_att->initial_layout;
1217ec681f3Smrg         uint32_t stencil_initial_layout = pass_att->stencil_initial_layout;
1227ec681f3Smrg         uint32_t final_layout = pass_att->final_layout;
1237ec681f3Smrg         uint32_t stencil_final_layout = pass_att->stencil_final_layout;
1247ec681f3Smrg
1257ec681f3Smrg         /* The implicit subpass dependency only exists if
1267ec681f3Smrg          * there exists an automatic layout transition away
1277ec681f3Smrg          * from initialLayout.
1287ec681f3Smrg          */
1297ec681f3Smrg         if (pass_att->first_subpass_idx == i && !subpass->has_ingoing_dep &&
1307ec681f3Smrg             ((subpass_att->layout != initial_layout) ||
1317ec681f3Smrg              (subpass_att->layout != stencil_initial_layout))) {
1327ec681f3Smrg            add_ingoing_dep = true;
1337ec681f3Smrg         }
1347ec681f3Smrg
1357ec681f3Smrg         /* The implicit subpass dependency only exists if
1367ec681f3Smrg          * there exists an automatic layout transition into
1377ec681f3Smrg          * finalLayout.
1387ec681f3Smrg          */
1397ec681f3Smrg         if (pass_att->last_subpass_idx == i && !subpass->has_outgoing_dep &&
1407ec681f3Smrg             ((subpass_att->layout != final_layout) ||
1417ec681f3Smrg              (subpass_att->layout != stencil_final_layout))) {
1427ec681f3Smrg            add_outgoing_dep = true;
1437ec681f3Smrg         }
1447ec681f3Smrg      }
1457ec681f3Smrg
1467ec681f3Smrg      if (add_ingoing_dep) {
1477ec681f3Smrg         const VkSubpassDependency2KHR implicit_ingoing_dep = {
1487ec681f3Smrg            .srcSubpass = VK_SUBPASS_EXTERNAL,
1497ec681f3Smrg            .dstSubpass = i, /* first subpass attachment is used in */
1507ec681f3Smrg            .srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
1517ec681f3Smrg            .dstStageMask = VK_PIPELINE_STAGE_ALL_COMMANDS_BIT,
1527ec681f3Smrg            .srcAccessMask = 0,
1537ec681f3Smrg            .dstAccessMask =
1547ec681f3Smrg               VK_ACCESS_INPUT_ATTACHMENT_READ_BIT | VK_ACCESS_COLOR_ATTACHMENT_READ_BIT |
1557ec681f3Smrg               VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT | VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT |
1567ec681f3Smrg               VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
1577ec681f3Smrg            .dependencyFlags = 0,
1587ec681f3Smrg         };
1597ec681f3Smrg
1607ec681f3Smrg         radv_render_pass_add_subpass_dep(pass, &implicit_ingoing_dep);
1617ec681f3Smrg      }
1627ec681f3Smrg
1637ec681f3Smrg      if (add_outgoing_dep) {
1647ec681f3Smrg         const VkSubpassDependency2KHR implicit_outgoing_dep = {
1657ec681f3Smrg            .srcSubpass = i, /* last subpass attachment is used in */
1667ec681f3Smrg            .dstSubpass = VK_SUBPASS_EXTERNAL,
1677ec681f3Smrg            .srcStageMask = VK_PIPELINE_STAGE_ALL_COMMANDS_BIT,
1687ec681f3Smrg            .dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
1697ec681f3Smrg            .srcAccessMask =
1707ec681f3Smrg               VK_ACCESS_INPUT_ATTACHMENT_READ_BIT | VK_ACCESS_COLOR_ATTACHMENT_READ_BIT |
1717ec681f3Smrg               VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT | VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT |
1727ec681f3Smrg               VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
1737ec681f3Smrg            .dstAccessMask = 0,
1747ec681f3Smrg            .dependencyFlags = 0,
1757ec681f3Smrg         };
1767ec681f3Smrg
1777ec681f3Smrg         radv_render_pass_add_subpass_dep(pass, &implicit_outgoing_dep);
1787ec681f3Smrg      }
1797ec681f3Smrg   }
180ed98bd31Smaya}
181ed98bd31Smaya
1827ec681f3Smrgstatic void
1837ec681f3Smrgradv_render_pass_compile(struct radv_render_pass *pass)
184ed98bd31Smaya{
1857ec681f3Smrg   for (uint32_t i = 0; i < pass->subpass_count; i++) {
1867ec681f3Smrg      struct radv_subpass *subpass = &pass->subpasses[i];
1877ec681f3Smrg
1887ec681f3Smrg      for (uint32_t j = 0; j < subpass->attachment_count; j++) {
1897ec681f3Smrg         struct radv_subpass_attachment *subpass_att = &subpass->attachments[j];
1907ec681f3Smrg         if (subpass_att->attachment == VK_ATTACHMENT_UNUSED)
1917ec681f3Smrg            continue;
1927ec681f3Smrg
1937ec681f3Smrg         struct radv_render_pass_attachment *pass_att = &pass->attachments[subpass_att->attachment];
1947ec681f3Smrg
1957ec681f3Smrg         pass_att->first_subpass_idx = VK_SUBPASS_EXTERNAL;
1967ec681f3Smrg         pass_att->last_subpass_idx = VK_SUBPASS_EXTERNAL;
1977ec681f3Smrg      }
1987ec681f3Smrg   }
1997ec681f3Smrg
2007ec681f3Smrg   for (uint32_t i = 0; i < pass->subpass_count; i++) {
2017ec681f3Smrg      struct radv_subpass *subpass = &pass->subpasses[i];
2027ec681f3Smrg      uint32_t color_sample_count = 1, depth_sample_count = 1;
2037ec681f3Smrg
2047ec681f3Smrg      /* We don't allow depth_stencil_attachment to be non-NULL and
2057ec681f3Smrg       * be VK_ATTACHMENT_UNUSED.  This way something can just check
2067ec681f3Smrg       * for NULL and be guaranteed that they have a valid
2077ec681f3Smrg       * attachment.
2087ec681f3Smrg       */
2097ec681f3Smrg      if (subpass->depth_stencil_attachment &&
2107ec681f3Smrg          subpass->depth_stencil_attachment->attachment == VK_ATTACHMENT_UNUSED)
2117ec681f3Smrg         subpass->depth_stencil_attachment = NULL;
2127ec681f3Smrg
2137ec681f3Smrg      if (subpass->ds_resolve_attachment &&
2147ec681f3Smrg          subpass->ds_resolve_attachment->attachment == VK_ATTACHMENT_UNUSED)
2157ec681f3Smrg         subpass->ds_resolve_attachment = NULL;
2167ec681f3Smrg
2177ec681f3Smrg      if (subpass->vrs_attachment && subpass->vrs_attachment->attachment == VK_ATTACHMENT_UNUSED)
2187ec681f3Smrg         subpass->vrs_attachment = NULL;
2197ec681f3Smrg
2207ec681f3Smrg      for (uint32_t j = 0; j < subpass->attachment_count; j++) {
2217ec681f3Smrg         struct radv_subpass_attachment *subpass_att = &subpass->attachments[j];
2227ec681f3Smrg         if (subpass_att->attachment == VK_ATTACHMENT_UNUSED)
2237ec681f3Smrg            continue;
2247ec681f3Smrg
2257ec681f3Smrg         struct radv_render_pass_attachment *pass_att = &pass->attachments[subpass_att->attachment];
2267ec681f3Smrg
2277ec681f3Smrg         if (i < pass_att->first_subpass_idx)
2287ec681f3Smrg            pass_att->first_subpass_idx = i;
2297ec681f3Smrg         pass_att->last_subpass_idx = i;
2307ec681f3Smrg      }
2317ec681f3Smrg
2327ec681f3Smrg      subpass->has_color_att = false;
2337ec681f3Smrg      for (uint32_t j = 0; j < subpass->color_count; j++) {
2347ec681f3Smrg         struct radv_subpass_attachment *subpass_att = &subpass->color_attachments[j];
2357ec681f3Smrg         if (subpass_att->attachment == VK_ATTACHMENT_UNUSED)
2367ec681f3Smrg            continue;
2377ec681f3Smrg
2387ec681f3Smrg         subpass->has_color_att = true;
2397ec681f3Smrg
2407ec681f3Smrg         struct radv_render_pass_attachment *pass_att = &pass->attachments[subpass_att->attachment];
2417ec681f3Smrg
2427ec681f3Smrg         color_sample_count = pass_att->samples;
2437ec681f3Smrg      }
2447ec681f3Smrg
2457ec681f3Smrg      if (subpass->depth_stencil_attachment) {
2467ec681f3Smrg         const uint32_t a = subpass->depth_stencil_attachment->attachment;
2477ec681f3Smrg         struct radv_render_pass_attachment *pass_att = &pass->attachments[a];
2487ec681f3Smrg         depth_sample_count = pass_att->samples;
2497ec681f3Smrg      }
2507ec681f3Smrg
2517ec681f3Smrg      subpass->max_sample_count = MAX2(color_sample_count, depth_sample_count);
2527ec681f3Smrg      subpass->color_sample_count = color_sample_count;
2537ec681f3Smrg      subpass->depth_sample_count = depth_sample_count;
2547ec681f3Smrg
2557ec681f3Smrg      /* We have to handle resolve attachments specially */
2567ec681f3Smrg      subpass->has_color_resolve = false;
2577ec681f3Smrg      if (subpass->resolve_attachments) {
2587ec681f3Smrg         for (uint32_t j = 0; j < subpass->color_count; j++) {
2597ec681f3Smrg            struct radv_subpass_attachment *resolve_att = &subpass->resolve_attachments[j];
2607ec681f3Smrg
2617ec681f3Smrg            if (resolve_att->attachment == VK_ATTACHMENT_UNUSED)
2627ec681f3Smrg               continue;
2637ec681f3Smrg
2647ec681f3Smrg            subpass->has_color_resolve = true;
2657ec681f3Smrg         }
2667ec681f3Smrg      }
2677ec681f3Smrg
2687ec681f3Smrg      for (uint32_t j = 0; j < subpass->input_count; ++j) {
2697ec681f3Smrg         if (subpass->input_attachments[j].attachment == VK_ATTACHMENT_UNUSED)
2707ec681f3Smrg            continue;
2717ec681f3Smrg
2727ec681f3Smrg         for (uint32_t k = 0; k < subpass->color_count; ++k) {
2737ec681f3Smrg            if (subpass->color_attachments[k].attachment ==
2747ec681f3Smrg                subpass->input_attachments[j].attachment) {
2757ec681f3Smrg               subpass->input_attachments[j].in_render_loop = true;
2767ec681f3Smrg               subpass->color_attachments[k].in_render_loop = true;
2777ec681f3Smrg            }
2787ec681f3Smrg         }
2797ec681f3Smrg
2807ec681f3Smrg         if (subpass->depth_stencil_attachment && subpass->depth_stencil_attachment->attachment ==
2817ec681f3Smrg                                                     subpass->input_attachments[j].attachment) {
2827ec681f3Smrg            subpass->input_attachments[j].in_render_loop = true;
2837ec681f3Smrg            subpass->depth_stencil_attachment->in_render_loop = true;
2847ec681f3Smrg         }
2857ec681f3Smrg      }
2867ec681f3Smrg   }
287ed98bd31Smaya}
288ed98bd31Smaya
2897ec681f3Smrgstatic void
2907ec681f3Smrgradv_destroy_render_pass(struct radv_device *device, const VkAllocationCallbacks *pAllocator,
2917ec681f3Smrg                         struct radv_render_pass *pass)
29201e04c3fSmrg{
2937ec681f3Smrg   vk_object_base_finish(&pass->base);
2947ec681f3Smrg   vk_free2(&device->vk.alloc, pAllocator, pass->subpass_attachments);
2957ec681f3Smrg   vk_free2(&device->vk.alloc, pAllocator, pass);
29601e04c3fSmrg}
29701e04c3fSmrg
298ed98bd31Smayastatic unsigned
2997ec681f3Smrgradv_num_subpass_attachments2(const VkSubpassDescription2 *desc)
300ed98bd31Smaya{
3017ec681f3Smrg   const VkSubpassDescriptionDepthStencilResolve *ds_resolve =
3027ec681f3Smrg      vk_find_struct_const(desc->pNext, SUBPASS_DESCRIPTION_DEPTH_STENCIL_RESOLVE);
3037ec681f3Smrg   const VkFragmentShadingRateAttachmentInfoKHR *vrs =
3047ec681f3Smrg      vk_find_struct_const(desc->pNext, FRAGMENT_SHADING_RATE_ATTACHMENT_INFO_KHR);
3057ec681f3Smrg
3067ec681f3Smrg   return desc->inputAttachmentCount + desc->colorAttachmentCount +
3077ec681f3Smrg          (desc->pResolveAttachments ? desc->colorAttachmentCount : 0) +
3087ec681f3Smrg          (desc->pDepthStencilAttachment != NULL) +
3097ec681f3Smrg          (ds_resolve && ds_resolve->pDepthStencilResolveAttachment) +
3107ec681f3Smrg          (vrs && vrs->pFragmentShadingRateAttachment);
311ed98bd31Smaya}
312ed98bd31Smaya
3137ec681f3Smrgstatic bool
3147ec681f3Smrgvk_image_layout_depth_only(VkImageLayout layout)
31501e04c3fSmrg{
3167ec681f3Smrg   switch (layout) {
3177ec681f3Smrg   case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL:
3187ec681f3Smrg   case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL:
3197ec681f3Smrg      return true;
3207ec681f3Smrg   default:
3217ec681f3Smrg      return false;
3227ec681f3Smrg   }
32301e04c3fSmrg}
32401e04c3fSmrg
3257ec681f3Smrg/* From the Vulkan Specification 1.2.166 - VkAttachmentReference2:
3267ec681f3Smrg *
3277ec681f3Smrg * "If layout only specifies the layout of the depth aspect of the attachment,
3287ec681f3Smrg *  the layout of the stencil aspect is specified by the stencilLayout member
3297ec681f3Smrg *  of a VkAttachmentReferenceStencilLayout structure included in the pNext
3307ec681f3Smrg *  chain. Otherwise, layout describes the layout for all relevant image
3317ec681f3Smrg *  aspects."
3327ec681f3Smrg */
3337ec681f3Smrgstatic VkImageLayout
3347ec681f3Smrgstencil_ref_layout(const VkAttachmentReference2 *att_ref)
33501e04c3fSmrg{
3367ec681f3Smrg   if (!vk_image_layout_depth_only(att_ref->layout))
3377ec681f3Smrg      return att_ref->layout;
3387ec681f3Smrg
3397ec681f3Smrg   const VkAttachmentReferenceStencilLayoutKHR *stencil_ref =
3407ec681f3Smrg      vk_find_struct_const(att_ref->pNext, ATTACHMENT_REFERENCE_STENCIL_LAYOUT_KHR);
3417ec681f3Smrg   if (!stencil_ref)
3427ec681f3Smrg      return VK_IMAGE_LAYOUT_UNDEFINED;
34301e04c3fSmrg
3447ec681f3Smrg   return stencil_ref->stencilLayout;
34501e04c3fSmrg}
34601e04c3fSmrg
3477ec681f3Smrg/* From the Vulkan Specification 1.2.184:
3487ec681f3Smrg *
3497ec681f3Smrg * "If the pNext chain includes a VkAttachmentDescriptionStencilLayout structure, then the
3507ec681f3Smrg *  stencilInitialLayout and stencilFinalLayout members specify the initial and final layouts of the
3517ec681f3Smrg *  stencil aspect of a depth/stencil format, and initialLayout and finalLayout only apply to the
3527ec681f3Smrg *  depth aspect. For depth-only formats, the VkAttachmentDescriptionStencilLayout structure is
3537ec681f3Smrg *  ignored. For stencil-only formats, the initial and final layouts of the stencil aspect are taken
3547ec681f3Smrg *  from the VkAttachmentDescriptionStencilLayout structure if present, or initialLayout and
3557ec681f3Smrg *  finalLayout if not present."
3567ec681f3Smrg *
3577ec681f3Smrg * "If format is a depth/stencil format, and either initialLayout or finalLayout does not specify a
3587ec681f3Smrg *  layout for the stencil aspect, then the application must specify the initial and final layouts
3597ec681f3Smrg *  of the stencil aspect by including a VkAttachmentDescriptionStencilLayout structure in the pNext
3607ec681f3Smrg *  chain."
3617ec681f3Smrg */
3627ec681f3Smrgstatic VkImageLayout
3637ec681f3Smrgstencil_desc_layout(const VkAttachmentDescription2KHR *att_desc, bool final)
36401e04c3fSmrg{
3657ec681f3Smrg   const struct util_format_description *desc = vk_format_description(att_desc->format);
3667ec681f3Smrg   if (!util_format_has_stencil(desc))
3677ec681f3Smrg      return VK_IMAGE_LAYOUT_UNDEFINED;
3687ec681f3Smrg
3697ec681f3Smrg   const VkAttachmentDescriptionStencilLayoutKHR *stencil_desc =
3707ec681f3Smrg      vk_find_struct_const(att_desc->pNext, ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR);
3717ec681f3Smrg
3727ec681f3Smrg   if (stencil_desc)
3737ec681f3Smrg      return final ? stencil_desc->stencilFinalLayout : stencil_desc->stencilInitialLayout;
3747ec681f3Smrg   return final ? att_desc->finalLayout : att_desc->initialLayout;
3757ec681f3Smrg}
3767ec681f3Smrg
3777ec681f3SmrgVkResult
3787ec681f3Smrgradv_CreateRenderPass2(VkDevice _device, const VkRenderPassCreateInfo2 *pCreateInfo,
3797ec681f3Smrg                       const VkAllocationCallbacks *pAllocator, VkRenderPass *pRenderPass)
3807ec681f3Smrg{
3817ec681f3Smrg   RADV_FROM_HANDLE(radv_device, device, _device);
3827ec681f3Smrg   struct radv_render_pass *pass;
3837ec681f3Smrg   size_t size;
3847ec681f3Smrg   size_t attachments_offset;
3857ec681f3Smrg
3867ec681f3Smrg   assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO_2);
3877ec681f3Smrg
3887ec681f3Smrg   size = sizeof(*pass);
3897ec681f3Smrg   size += pCreateInfo->subpassCount * sizeof(pass->subpasses[0]);
3907ec681f3Smrg   attachments_offset = size;
3917ec681f3Smrg   size += pCreateInfo->attachmentCount * sizeof(pass->attachments[0]);
3927ec681f3Smrg
3937ec681f3Smrg   pass = vk_alloc2(&device->vk.alloc, pAllocator, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
3947ec681f3Smrg   if (pass == NULL)
3957ec681f3Smrg      return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
3967ec681f3Smrg
3977ec681f3Smrg   memset(pass, 0, size);
3987ec681f3Smrg
3997ec681f3Smrg   vk_object_base_init(&device->vk, &pass->base, VK_OBJECT_TYPE_RENDER_PASS);
4007ec681f3Smrg
4017ec681f3Smrg   pass->attachment_count = pCreateInfo->attachmentCount;
4027ec681f3Smrg   pass->subpass_count = pCreateInfo->subpassCount;
4037ec681f3Smrg   pass->attachments = (struct radv_render_pass_attachment *)((uint8_t *)pass + attachments_offset);
4047ec681f3Smrg
4057ec681f3Smrg   for (uint32_t i = 0; i < pCreateInfo->attachmentCount; i++) {
4067ec681f3Smrg      struct radv_render_pass_attachment *att = &pass->attachments[i];
4077ec681f3Smrg
4087ec681f3Smrg      att->format = pCreateInfo->pAttachments[i].format;
4097ec681f3Smrg      att->samples = pCreateInfo->pAttachments[i].samples;
4107ec681f3Smrg      att->load_op = pCreateInfo->pAttachments[i].loadOp;
4117ec681f3Smrg      att->stencil_load_op = pCreateInfo->pAttachments[i].stencilLoadOp;
4127ec681f3Smrg      att->initial_layout = pCreateInfo->pAttachments[i].initialLayout;
4137ec681f3Smrg      att->final_layout = pCreateInfo->pAttachments[i].finalLayout;
4147ec681f3Smrg      att->stencil_initial_layout = stencil_desc_layout(&pCreateInfo->pAttachments[i], false);
4157ec681f3Smrg      att->stencil_final_layout = stencil_desc_layout(&pCreateInfo->pAttachments[i], true);
4167ec681f3Smrg      // att->store_op = pCreateInfo->pAttachments[i].storeOp;
4177ec681f3Smrg      // att->stencil_store_op = pCreateInfo->pAttachments[i].stencilStoreOp;
4187ec681f3Smrg   }
4197ec681f3Smrg   uint32_t subpass_attachment_count = 0;
4207ec681f3Smrg   struct radv_subpass_attachment *p;
4217ec681f3Smrg   for (uint32_t i = 0; i < pCreateInfo->subpassCount; i++) {
4227ec681f3Smrg      subpass_attachment_count += radv_num_subpass_attachments2(&pCreateInfo->pSubpasses[i]);
4237ec681f3Smrg   }
4247ec681f3Smrg
4257ec681f3Smrg   if (subpass_attachment_count) {
4267ec681f3Smrg      pass->subpass_attachments =
4277ec681f3Smrg         vk_alloc2(&device->vk.alloc, pAllocator,
4287ec681f3Smrg                   subpass_attachment_count * sizeof(struct radv_subpass_attachment), 8,
4297ec681f3Smrg                   VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
4307ec681f3Smrg      if (pass->subpass_attachments == NULL) {
4317ec681f3Smrg         radv_destroy_render_pass(device, pAllocator, pass);
4327ec681f3Smrg         return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
4337ec681f3Smrg      }
4347ec681f3Smrg   } else
4357ec681f3Smrg      pass->subpass_attachments = NULL;
4367ec681f3Smrg
4377ec681f3Smrg   p = pass->subpass_attachments;
4387ec681f3Smrg   for (uint32_t i = 0; i < pCreateInfo->subpassCount; i++) {
4397ec681f3Smrg      const VkSubpassDescription2 *desc = &pCreateInfo->pSubpasses[i];
4407ec681f3Smrg      struct radv_subpass *subpass = &pass->subpasses[i];
4417ec681f3Smrg
4427ec681f3Smrg      subpass->input_count = desc->inputAttachmentCount;
4437ec681f3Smrg      subpass->color_count = desc->colorAttachmentCount;
4447ec681f3Smrg      subpass->attachment_count = radv_num_subpass_attachments2(desc);
4457ec681f3Smrg      subpass->attachments = p;
4467ec681f3Smrg      subpass->view_mask = desc->viewMask;
4477ec681f3Smrg
4487ec681f3Smrg      if (desc->inputAttachmentCount > 0) {
4497ec681f3Smrg         subpass->input_attachments = p;
4507ec681f3Smrg         p += desc->inputAttachmentCount;
4517ec681f3Smrg
4527ec681f3Smrg         for (uint32_t j = 0; j < desc->inputAttachmentCount; j++) {
4537ec681f3Smrg            subpass->input_attachments[j] = (struct radv_subpass_attachment){
4547ec681f3Smrg               .attachment = desc->pInputAttachments[j].attachment,
4557ec681f3Smrg               .layout = desc->pInputAttachments[j].layout,
4567ec681f3Smrg               .stencil_layout = stencil_ref_layout(&desc->pInputAttachments[j]),
4577ec681f3Smrg            };
4587ec681f3Smrg         }
4597ec681f3Smrg      }
4607ec681f3Smrg
4617ec681f3Smrg      if (desc->colorAttachmentCount > 0) {
4627ec681f3Smrg         subpass->color_attachments = p;
4637ec681f3Smrg         p += desc->colorAttachmentCount;
4647ec681f3Smrg
4657ec681f3Smrg         for (uint32_t j = 0; j < desc->colorAttachmentCount; j++) {
4667ec681f3Smrg            subpass->color_attachments[j] = (struct radv_subpass_attachment){
4677ec681f3Smrg               .attachment = desc->pColorAttachments[j].attachment,
4687ec681f3Smrg               .layout = desc->pColorAttachments[j].layout,
4697ec681f3Smrg            };
4707ec681f3Smrg         }
4717ec681f3Smrg      }
4727ec681f3Smrg
4737ec681f3Smrg      if (desc->pResolveAttachments) {
4747ec681f3Smrg         subpass->resolve_attachments = p;
4757ec681f3Smrg         p += desc->colorAttachmentCount;
4767ec681f3Smrg
4777ec681f3Smrg         for (uint32_t j = 0; j < desc->colorAttachmentCount; j++) {
4787ec681f3Smrg            subpass->resolve_attachments[j] = (struct radv_subpass_attachment){
4797ec681f3Smrg               .attachment = desc->pResolveAttachments[j].attachment,
4807ec681f3Smrg               .layout = desc->pResolveAttachments[j].layout,
4817ec681f3Smrg            };
4827ec681f3Smrg         }
4837ec681f3Smrg      }
4847ec681f3Smrg
4857ec681f3Smrg      if (desc->pDepthStencilAttachment) {
4867ec681f3Smrg         subpass->depth_stencil_attachment = p++;
4877ec681f3Smrg
4887ec681f3Smrg         *subpass->depth_stencil_attachment = (struct radv_subpass_attachment){
4897ec681f3Smrg            .attachment = desc->pDepthStencilAttachment->attachment,
4907ec681f3Smrg            .layout = desc->pDepthStencilAttachment->layout,
4917ec681f3Smrg            .stencil_layout = stencil_ref_layout(desc->pDepthStencilAttachment),
4927ec681f3Smrg         };
4937ec681f3Smrg      }
4947ec681f3Smrg
4957ec681f3Smrg      const VkSubpassDescriptionDepthStencilResolve *ds_resolve =
4967ec681f3Smrg         vk_find_struct_const(desc->pNext, SUBPASS_DESCRIPTION_DEPTH_STENCIL_RESOLVE);
4977ec681f3Smrg
4987ec681f3Smrg      if (ds_resolve && ds_resolve->pDepthStencilResolveAttachment) {
4997ec681f3Smrg         subpass->ds_resolve_attachment = p++;
5007ec681f3Smrg
5017ec681f3Smrg         *subpass->ds_resolve_attachment = (struct radv_subpass_attachment){
5027ec681f3Smrg            .attachment = ds_resolve->pDepthStencilResolveAttachment->attachment,
5037ec681f3Smrg            .layout = ds_resolve->pDepthStencilResolveAttachment->layout,
5047ec681f3Smrg            .stencil_layout = stencil_ref_layout(ds_resolve->pDepthStencilResolveAttachment),
5057ec681f3Smrg         };
5067ec681f3Smrg
5077ec681f3Smrg         subpass->depth_resolve_mode = ds_resolve->depthResolveMode;
5087ec681f3Smrg         subpass->stencil_resolve_mode = ds_resolve->stencilResolveMode;
5097ec681f3Smrg      }
5107ec681f3Smrg
5117ec681f3Smrg      const VkFragmentShadingRateAttachmentInfoKHR *vrs =
5127ec681f3Smrg         vk_find_struct_const(desc->pNext, FRAGMENT_SHADING_RATE_ATTACHMENT_INFO_KHR);
5137ec681f3Smrg
5147ec681f3Smrg      if (vrs && vrs->pFragmentShadingRateAttachment) {
5157ec681f3Smrg         subpass->vrs_attachment = p++;
5167ec681f3Smrg
5177ec681f3Smrg         *subpass->vrs_attachment = (struct radv_subpass_attachment){
5187ec681f3Smrg            .attachment = vrs->pFragmentShadingRateAttachment->attachment,
5197ec681f3Smrg            .layout = vrs->pFragmentShadingRateAttachment->layout,
5207ec681f3Smrg         };
5217ec681f3Smrg      }
5227ec681f3Smrg   }
5237ec681f3Smrg
5247ec681f3Smrg   for (unsigned i = 0; i < pCreateInfo->dependencyCount; ++i) {
5257ec681f3Smrg      const VkSubpassDependency2 *dep = &pCreateInfo->pDependencies[i];
5267ec681f3Smrg
5277ec681f3Smrg      radv_render_pass_add_subpass_dep(pass, &pCreateInfo->pDependencies[i]);
5287ec681f3Smrg
5297ec681f3Smrg      /* Determine if the subpass has explicit dependencies from/to
5307ec681f3Smrg       * VK_SUBPASS_EXTERNAL.
5317ec681f3Smrg       */
5327ec681f3Smrg      if (dep->srcSubpass == VK_SUBPASS_EXTERNAL && dep->dstSubpass != VK_SUBPASS_EXTERNAL) {
5337ec681f3Smrg         pass->subpasses[dep->dstSubpass].has_ingoing_dep = true;
5347ec681f3Smrg      }
5357ec681f3Smrg
5367ec681f3Smrg      if (dep->dstSubpass == VK_SUBPASS_EXTERNAL && dep->srcSubpass != VK_SUBPASS_EXTERNAL) {
5377ec681f3Smrg         pass->subpasses[dep->srcSubpass].has_outgoing_dep = true;
5387ec681f3Smrg      }
5397ec681f3Smrg   }
5407ec681f3Smrg
5417ec681f3Smrg   radv_render_pass_compile(pass);
5427ec681f3Smrg
5437ec681f3Smrg   radv_render_pass_add_implicit_deps(pass);
5447ec681f3Smrg
5457ec681f3Smrg   *pRenderPass = radv_render_pass_to_handle(pass);
5467ec681f3Smrg
5477ec681f3Smrg   return VK_SUCCESS;
54801e04c3fSmrg}
54901e04c3fSmrg
5507ec681f3Smrgvoid
5517ec681f3Smrgradv_DestroyRenderPass(VkDevice _device, VkRenderPass _pass,
5527ec681f3Smrg                       const VkAllocationCallbacks *pAllocator)
5537ec681f3Smrg{
5547ec681f3Smrg   RADV_FROM_HANDLE(radv_device, device, _device);
5557ec681f3Smrg   RADV_FROM_HANDLE(radv_render_pass, pass, _pass);
5567ec681f3Smrg
5577ec681f3Smrg   if (!_pass)
5587ec681f3Smrg      return;
5597ec681f3Smrg
5607ec681f3Smrg   radv_destroy_render_pass(device, pAllocator, pass);
5617ec681f3Smrg}
5627ec681f3Smrg
5637ec681f3Smrgvoid
5647ec681f3Smrgradv_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D *pGranularity)
5657ec681f3Smrg{
5667ec681f3Smrg   pGranularity->width = 1;
5677ec681f3Smrg   pGranularity->height = 1;
5687ec681f3Smrg}
569