17ec681f3Smrg/*
27ec681f3Smrg * © Copyright 2017-2018 Alyssa Rosenzweig
37ec681f3Smrg *
47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
57ec681f3Smrg * copy of this software and associated documentation files (the "Software"),
67ec681f3Smrg * to deal in the Software without restriction, including without limitation
77ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
87ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the
97ec681f3Smrg * Software is furnished to do so, subject to the following conditions:
107ec681f3Smrg *
117ec681f3Smrg * The above copyright notice and this permission notice (including the next
127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the
137ec681f3Smrg * Software.
147ec681f3Smrg *
157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
187ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
197ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
207ec681f3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
217ec681f3Smrg * SOFTWARE.
227ec681f3Smrg *
237ec681f3Smrg */
247ec681f3Smrg
257ec681f3Smrg#ifndef __AGX_POOL_H__
267ec681f3Smrg#define __AGX_POOL_H__
277ec681f3Smrg
287ec681f3Smrg#include <stddef.h>
297ec681f3Smrg#include "asahi/lib/agx_pack.h"
307ec681f3Smrg#include "agx_bo.h"
317ec681f3Smrg
327ec681f3Smrg#include "util/u_dynarray.h"
337ec681f3Smrg
347ec681f3Smrg/* Represents a pool of memory that can only grow, used to allocate objects
357ec681f3Smrg * with the same lifetime as the pool itself. In OpenGL, a pool is owned by the
367ec681f3Smrg * batch for transient structures. In Vulkan, it may be owned by e.g. the
377ec681f3Smrg * command pool */
387ec681f3Smrg
397ec681f3Smrgstruct agx_pool {
407ec681f3Smrg   /* Parent device for allocation */
417ec681f3Smrg   struct agx_device *dev;
427ec681f3Smrg
437ec681f3Smrg   /* BOs allocated by this pool */
447ec681f3Smrg   struct util_dynarray bos;
457ec681f3Smrg
467ec681f3Smrg   /* Current transient BO */
477ec681f3Smrg   struct agx_bo *transient_bo;
487ec681f3Smrg
497ec681f3Smrg   /* Within the topmost transient BO, how much has been used? */
507ec681f3Smrg   unsigned transient_offset;
517ec681f3Smrg
527ec681f3Smrg   /* BO flags to use in the pool */
537ec681f3Smrg   unsigned create_flags;
547ec681f3Smrg};
557ec681f3Smrg
567ec681f3Smrgvoid
577ec681f3Smrgagx_pool_init(struct agx_pool *pool, struct agx_device *dev,
587ec681f3Smrg      unsigned create_flags, bool prealloc);
597ec681f3Smrg
607ec681f3Smrgvoid
617ec681f3Smrgagx_pool_cleanup(struct agx_pool *pool);
627ec681f3Smrg
637ec681f3Smrgstatic inline unsigned
647ec681f3Smrgagx_pool_num_bos(struct agx_pool *pool)
657ec681f3Smrg{
667ec681f3Smrg   return util_dynarray_num_elements(&pool->bos, struct agx_bo *);
677ec681f3Smrg}
687ec681f3Smrg
697ec681f3Smrgvoid
707ec681f3Smrgagx_pool_get_bo_handles(struct agx_pool *pool, uint32_t *handles);
717ec681f3Smrg
727ec681f3Smrg/* Represents a fat pointer for GPU-mapped memory, returned from the transient
737ec681f3Smrg * allocator and not used for much else */
747ec681f3Smrg
757ec681f3Smrgstruct agx_ptr
767ec681f3Smrgagx_pool_alloc_aligned(struct agx_pool *pool, size_t sz, unsigned alignment);
777ec681f3Smrg
787ec681f3Smrguint64_t
797ec681f3Smrgagx_pool_upload(struct agx_pool *pool, const void *data, size_t sz);
807ec681f3Smrg
817ec681f3Smrguint64_t
827ec681f3Smrgagx_pool_upload_aligned(struct agx_pool *pool, const void *data, size_t sz, unsigned alignment);
837ec681f3Smrg
847ec681f3Smrgstruct agx_desc_alloc_info {
857ec681f3Smrg   unsigned size;
867ec681f3Smrg   unsigned align;
877ec681f3Smrg   unsigned nelems;
887ec681f3Smrg};
897ec681f3Smrg
907ec681f3Smrg#define AGX_DESC_ARRAY(count, name) \
917ec681f3Smrg        { \
927ec681f3Smrg                .size = MALI_ ## name ## _LENGTH, \
937ec681f3Smrg                .align = MALI_ ## name ## _ALIGN, \
947ec681f3Smrg                .nelems = count, \
957ec681f3Smrg        }
967ec681f3Smrg
977ec681f3Smrg#define AGX_DESC(name) AGX_DESC_ARRAY(1, name)
987ec681f3Smrg
997ec681f3Smrg#define AGX_DESC_AGGREGATE(...) \
1007ec681f3Smrg        (struct agx_desc_alloc_info[]) { \
1017ec681f3Smrg                __VA_ARGS__, \
1027ec681f3Smrg                { 0 }, \
1037ec681f3Smrg        }
1047ec681f3Smrg
1057ec681f3Smrgstatic inline struct agx_ptr
1067ec681f3Smrgagx_pool_alloc_descs(struct agx_pool *pool,
1077ec681f3Smrg                          const struct agx_desc_alloc_info *descs)
1087ec681f3Smrg{
1097ec681f3Smrg   unsigned size = 0;
1107ec681f3Smrg   unsigned align = descs[0].align;
1117ec681f3Smrg
1127ec681f3Smrg   for (unsigned i = 0; descs[i].size; i++) {
1137ec681f3Smrg      assert(!(size & (descs[i].align - 1)));
1147ec681f3Smrg      size += descs[i].size * descs[i].nelems;
1157ec681f3Smrg   }
1167ec681f3Smrg
1177ec681f3Smrg   return agx_pool_alloc_aligned(pool, size, align);
1187ec681f3Smrg}
1197ec681f3Smrg
1207ec681f3Smrg#define agx_pool_alloc_desc(pool, name) \
1217ec681f3Smrg        agx_pool_alloc_descs(pool, AGX_DESC_AGGREGATE(AGX_DESC(name)))
1227ec681f3Smrg
1237ec681f3Smrg#define agx_pool_alloc_desc_array(pool, count, name) \
1247ec681f3Smrg        agx_pool_alloc_descs(pool, AGX_DESC_AGGREGATE(AGX_DESC_ARRAY(count, name)))
1257ec681f3Smrg
1267ec681f3Smrg#define agx_pool_alloc_desc_aggregate(pool, ...) \
1277ec681f3Smrg        agx_pool_alloc_descs(pool, AGX_DESC_AGGREGATE(__VA_ARGS__))
1287ec681f3Smrg
1297ec681f3Smrg#endif
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