101e04c3fSmrg/*
201e04c3fSmrg * Copyright © 2012 Intel Corporation
301e04c3fSmrg *
401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
501e04c3fSmrg * copy of this software and associated documentation files (the "Software"),
601e04c3fSmrg * to deal in the Software without restriction, including without limitation
701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the
901e04c3fSmrg * Software is furnished to do so, subject to the following conditions:
1001e04c3fSmrg *
1101e04c3fSmrg * The above copyright notice and this permission notice (including the next
1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the
1301e04c3fSmrg * Software.
1401e04c3fSmrg *
1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2101e04c3fSmrg * IN THE SOFTWARE.
2201e04c3fSmrg */
2301e04c3fSmrg
2401e04c3fSmrg#include "ir_builder.h"
2501e04c3fSmrg#include "program/prog_instruction.h"
2601e04c3fSmrg
2701e04c3fSmrgusing namespace ir_builder;
2801e04c3fSmrg
2901e04c3fSmrgnamespace ir_builder {
3001e04c3fSmrg
3101e04c3fSmrgvoid
3201e04c3fSmrgir_factory::emit(ir_instruction *ir)
3301e04c3fSmrg{
3401e04c3fSmrg   instructions->push_tail(ir);
3501e04c3fSmrg}
3601e04c3fSmrg
3701e04c3fSmrgir_variable *
3801e04c3fSmrgir_factory::make_temp(const glsl_type *type, const char *name)
3901e04c3fSmrg{
4001e04c3fSmrg   ir_variable *var;
4101e04c3fSmrg
4201e04c3fSmrg   var = new(mem_ctx) ir_variable(type, name, ir_var_temporary);
4301e04c3fSmrg   emit(var);
4401e04c3fSmrg
4501e04c3fSmrg   return var;
4601e04c3fSmrg}
4701e04c3fSmrg
4801e04c3fSmrgir_assignment *
4901e04c3fSmrgassign(deref lhs, operand rhs, operand condition, int writemask)
5001e04c3fSmrg{
5101e04c3fSmrg   void *mem_ctx = ralloc_parent(lhs.val);
5201e04c3fSmrg
5301e04c3fSmrg   ir_assignment *assign = new(mem_ctx) ir_assignment(lhs.val,
5401e04c3fSmrg                                                      rhs.val,
5501e04c3fSmrg                                                      condition.val,
5601e04c3fSmrg                                                      writemask);
5701e04c3fSmrg
5801e04c3fSmrg   return assign;
5901e04c3fSmrg}
6001e04c3fSmrg
6101e04c3fSmrgir_assignment *
6201e04c3fSmrgassign(deref lhs, operand rhs)
6301e04c3fSmrg{
6401e04c3fSmrg   return assign(lhs, rhs, (1 << lhs.val->type->vector_elements) - 1);
6501e04c3fSmrg}
6601e04c3fSmrg
6701e04c3fSmrgir_assignment *
6801e04c3fSmrgassign(deref lhs, operand rhs, int writemask)
6901e04c3fSmrg{
7001e04c3fSmrg   return assign(lhs, rhs, (ir_rvalue *) NULL, writemask);
7101e04c3fSmrg}
7201e04c3fSmrg
7301e04c3fSmrgir_assignment *
7401e04c3fSmrgassign(deref lhs, operand rhs, operand condition)
7501e04c3fSmrg{
7601e04c3fSmrg   return assign(lhs, rhs, condition, (1 << lhs.val->type->vector_elements) - 1);
7701e04c3fSmrg}
7801e04c3fSmrg
7901e04c3fSmrgir_return *
8001e04c3fSmrgret(operand retval)
8101e04c3fSmrg{
8201e04c3fSmrg   void *mem_ctx = ralloc_parent(retval.val);
8301e04c3fSmrg   return new(mem_ctx) ir_return(retval.val);
8401e04c3fSmrg}
8501e04c3fSmrg
8601e04c3fSmrgir_swizzle *
8701e04c3fSmrgswizzle(operand a, int swizzle, int components)
8801e04c3fSmrg{
8901e04c3fSmrg   void *mem_ctx = ralloc_parent(a.val);
9001e04c3fSmrg
9101e04c3fSmrg   return new(mem_ctx) ir_swizzle(a.val,
9201e04c3fSmrg                                  GET_SWZ(swizzle, 0),
9301e04c3fSmrg                                  GET_SWZ(swizzle, 1),
9401e04c3fSmrg                                  GET_SWZ(swizzle, 2),
9501e04c3fSmrg                                  GET_SWZ(swizzle, 3),
9601e04c3fSmrg                                  components);
9701e04c3fSmrg}
9801e04c3fSmrg
9901e04c3fSmrgir_swizzle *
10001e04c3fSmrgswizzle_for_size(operand a, unsigned components)
10101e04c3fSmrg{
10201e04c3fSmrg   void *mem_ctx = ralloc_parent(a.val);
10301e04c3fSmrg
10401e04c3fSmrg   if (a.val->type->vector_elements < components)
10501e04c3fSmrg      components = a.val->type->vector_elements;
10601e04c3fSmrg
10701e04c3fSmrg   unsigned s[4] = { 0, 1, 2, 3 };
10801e04c3fSmrg   for (int i = components; i < 4; i++)
10901e04c3fSmrg      s[i] = components - 1;
11001e04c3fSmrg
11101e04c3fSmrg   return new(mem_ctx) ir_swizzle(a.val, s, components);
11201e04c3fSmrg}
11301e04c3fSmrg
11401e04c3fSmrgir_swizzle *
11501e04c3fSmrgswizzle_xxxx(operand a)
11601e04c3fSmrg{
11701e04c3fSmrg   return swizzle(a, SWIZZLE_XXXX, 4);
11801e04c3fSmrg}
11901e04c3fSmrg
12001e04c3fSmrgir_swizzle *
12101e04c3fSmrgswizzle_yyyy(operand a)
12201e04c3fSmrg{
12301e04c3fSmrg   return swizzle(a, SWIZZLE_YYYY, 4);
12401e04c3fSmrg}
12501e04c3fSmrg
12601e04c3fSmrgir_swizzle *
12701e04c3fSmrgswizzle_zzzz(operand a)
12801e04c3fSmrg{
12901e04c3fSmrg   return swizzle(a, SWIZZLE_ZZZZ, 4);
13001e04c3fSmrg}
13101e04c3fSmrg
13201e04c3fSmrgir_swizzle *
13301e04c3fSmrgswizzle_wwww(operand a)
13401e04c3fSmrg{
13501e04c3fSmrg   return swizzle(a, SWIZZLE_WWWW, 4);
13601e04c3fSmrg}
13701e04c3fSmrg
13801e04c3fSmrgir_swizzle *
13901e04c3fSmrgswizzle_x(operand a)
14001e04c3fSmrg{
14101e04c3fSmrg   return swizzle(a, SWIZZLE_XXXX, 1);
14201e04c3fSmrg}
14301e04c3fSmrg
14401e04c3fSmrgir_swizzle *
14501e04c3fSmrgswizzle_y(operand a)
14601e04c3fSmrg{
14701e04c3fSmrg   return swizzle(a, SWIZZLE_YYYY, 1);
14801e04c3fSmrg}
14901e04c3fSmrg
15001e04c3fSmrgir_swizzle *
15101e04c3fSmrgswizzle_z(operand a)
15201e04c3fSmrg{
15301e04c3fSmrg   return swizzle(a, SWIZZLE_ZZZZ, 1);
15401e04c3fSmrg}
15501e04c3fSmrg
15601e04c3fSmrgir_swizzle *
15701e04c3fSmrgswizzle_w(operand a)
15801e04c3fSmrg{
15901e04c3fSmrg   return swizzle(a, SWIZZLE_WWWW, 1);
16001e04c3fSmrg}
16101e04c3fSmrg
16201e04c3fSmrgir_swizzle *
16301e04c3fSmrgswizzle_xy(operand a)
16401e04c3fSmrg{
16501e04c3fSmrg   return swizzle(a, SWIZZLE_XYZW, 2);
16601e04c3fSmrg}
16701e04c3fSmrg
16801e04c3fSmrgir_swizzle *
16901e04c3fSmrgswizzle_xyz(operand a)
17001e04c3fSmrg{
17101e04c3fSmrg   return swizzle(a, SWIZZLE_XYZW, 3);
17201e04c3fSmrg}
17301e04c3fSmrg
17401e04c3fSmrgir_swizzle *
17501e04c3fSmrgswizzle_xyzw(operand a)
17601e04c3fSmrg{
17701e04c3fSmrg   return swizzle(a, SWIZZLE_XYZW, 4);
17801e04c3fSmrg}
17901e04c3fSmrg
18001e04c3fSmrgir_expression *
18101e04c3fSmrgexpr(ir_expression_operation op, operand a)
18201e04c3fSmrg{
18301e04c3fSmrg   void *mem_ctx = ralloc_parent(a.val);
18401e04c3fSmrg
18501e04c3fSmrg   return new(mem_ctx) ir_expression(op, a.val);
18601e04c3fSmrg}
18701e04c3fSmrg
18801e04c3fSmrgir_expression *
18901e04c3fSmrgexpr(ir_expression_operation op, operand a, operand b)
19001e04c3fSmrg{
19101e04c3fSmrg   void *mem_ctx = ralloc_parent(a.val);
19201e04c3fSmrg
19301e04c3fSmrg   return new(mem_ctx) ir_expression(op, a.val, b.val);
19401e04c3fSmrg}
19501e04c3fSmrg
19601e04c3fSmrgir_expression *
19701e04c3fSmrgexpr(ir_expression_operation op, operand a, operand b, operand c)
19801e04c3fSmrg{
19901e04c3fSmrg   void *mem_ctx = ralloc_parent(a.val);
20001e04c3fSmrg
20101e04c3fSmrg   return new(mem_ctx) ir_expression(op, a.val, b.val, c.val);
20201e04c3fSmrg}
20301e04c3fSmrg
20401e04c3fSmrgir_expression *add(operand a, operand b)
20501e04c3fSmrg{
20601e04c3fSmrg   return expr(ir_binop_add, a, b);
20701e04c3fSmrg}
20801e04c3fSmrg
20901e04c3fSmrgir_expression *sub(operand a, operand b)
21001e04c3fSmrg{
21101e04c3fSmrg   return expr(ir_binop_sub, a, b);
21201e04c3fSmrg}
21301e04c3fSmrg
21401e04c3fSmrgir_expression *min2(operand a, operand b)
21501e04c3fSmrg{
21601e04c3fSmrg   return expr(ir_binop_min, a, b);
21701e04c3fSmrg}
21801e04c3fSmrg
21901e04c3fSmrgir_expression *max2(operand a, operand b)
22001e04c3fSmrg{
22101e04c3fSmrg   return expr(ir_binop_max, a, b);
22201e04c3fSmrg}
22301e04c3fSmrg
22401e04c3fSmrgir_expression *mul(operand a, operand b)
22501e04c3fSmrg{
22601e04c3fSmrg   return expr(ir_binop_mul, a, b);
22701e04c3fSmrg}
22801e04c3fSmrg
22901e04c3fSmrgir_expression *imul_high(operand a, operand b)
23001e04c3fSmrg{
23101e04c3fSmrg   return expr(ir_binop_imul_high, a, b);
23201e04c3fSmrg}
23301e04c3fSmrg
23401e04c3fSmrgir_expression *div(operand a, operand b)
23501e04c3fSmrg{
23601e04c3fSmrg   return expr(ir_binop_div, a, b);
23701e04c3fSmrg}
23801e04c3fSmrg
23901e04c3fSmrgir_expression *carry(operand a, operand b)
24001e04c3fSmrg{
24101e04c3fSmrg   return expr(ir_binop_carry, a, b);
24201e04c3fSmrg}
24301e04c3fSmrg
24401e04c3fSmrgir_expression *borrow(operand a, operand b)
24501e04c3fSmrg{
24601e04c3fSmrg   return expr(ir_binop_borrow, a, b);
24701e04c3fSmrg}
24801e04c3fSmrg
24901e04c3fSmrgir_expression *trunc(operand a)
25001e04c3fSmrg{
25101e04c3fSmrg   return expr(ir_unop_trunc, a);
25201e04c3fSmrg}
25301e04c3fSmrg
25401e04c3fSmrgir_expression *round_even(operand a)
25501e04c3fSmrg{
25601e04c3fSmrg   return expr(ir_unop_round_even, a);
25701e04c3fSmrg}
25801e04c3fSmrg
25901e04c3fSmrgir_expression *fract(operand a)
26001e04c3fSmrg{
26101e04c3fSmrg   return expr(ir_unop_fract, a);
26201e04c3fSmrg}
26301e04c3fSmrg
26401e04c3fSmrg/* dot for vectors, mul for scalars */
26501e04c3fSmrgir_expression *dot(operand a, operand b)
26601e04c3fSmrg{
26701e04c3fSmrg   assert(a.val->type == b.val->type);
26801e04c3fSmrg
26901e04c3fSmrg   if (a.val->type->vector_elements == 1)
27001e04c3fSmrg      return expr(ir_binop_mul, a, b);
27101e04c3fSmrg
27201e04c3fSmrg   return expr(ir_binop_dot, a, b);
27301e04c3fSmrg}
27401e04c3fSmrg
27501e04c3fSmrgir_expression*
27601e04c3fSmrgclamp(operand a, operand b, operand c)
27701e04c3fSmrg{
27801e04c3fSmrg   return expr(ir_binop_min, expr(ir_binop_max, a, b), c);
27901e04c3fSmrg}
28001e04c3fSmrg
28101e04c3fSmrgir_expression *
28201e04c3fSmrgsaturate(operand a)
28301e04c3fSmrg{
28401e04c3fSmrg   return expr(ir_unop_saturate, a);
28501e04c3fSmrg}
28601e04c3fSmrg
28701e04c3fSmrgir_expression *
28801e04c3fSmrgabs(operand a)
28901e04c3fSmrg{
29001e04c3fSmrg   return expr(ir_unop_abs, a);
29101e04c3fSmrg}
29201e04c3fSmrg
29301e04c3fSmrgir_expression *
29401e04c3fSmrgneg(operand a)
29501e04c3fSmrg{
29601e04c3fSmrg   return expr(ir_unop_neg, a);
29701e04c3fSmrg}
29801e04c3fSmrg
29901e04c3fSmrgir_expression *
30001e04c3fSmrgsin(operand a)
30101e04c3fSmrg{
30201e04c3fSmrg   return expr(ir_unop_sin, a);
30301e04c3fSmrg}
30401e04c3fSmrg
30501e04c3fSmrgir_expression *
30601e04c3fSmrgcos(operand a)
30701e04c3fSmrg{
30801e04c3fSmrg   return expr(ir_unop_cos, a);
30901e04c3fSmrg}
31001e04c3fSmrg
31101e04c3fSmrgir_expression *
31201e04c3fSmrgexp(operand a)
31301e04c3fSmrg{
31401e04c3fSmrg   return expr(ir_unop_exp, a);
31501e04c3fSmrg}
31601e04c3fSmrg
31701e04c3fSmrgir_expression *
31801e04c3fSmrgrcp(operand a)
31901e04c3fSmrg{
32001e04c3fSmrg   return expr(ir_unop_rcp, a);
32101e04c3fSmrg}
32201e04c3fSmrg
32301e04c3fSmrgir_expression *
32401e04c3fSmrgrsq(operand a)
32501e04c3fSmrg{
32601e04c3fSmrg   return expr(ir_unop_rsq, a);
32701e04c3fSmrg}
32801e04c3fSmrg
32901e04c3fSmrgir_expression *
33001e04c3fSmrgsqrt(operand a)
33101e04c3fSmrg{
33201e04c3fSmrg   return expr(ir_unop_sqrt, a);
33301e04c3fSmrg}
33401e04c3fSmrg
33501e04c3fSmrgir_expression *
33601e04c3fSmrglog(operand a)
33701e04c3fSmrg{
33801e04c3fSmrg   return expr(ir_unop_log, a);
33901e04c3fSmrg}
34001e04c3fSmrg
34101e04c3fSmrgir_expression *
34201e04c3fSmrgsign(operand a)
34301e04c3fSmrg{
34401e04c3fSmrg   return expr(ir_unop_sign, a);
34501e04c3fSmrg}
34601e04c3fSmrg
34701e04c3fSmrgir_expression *
34801e04c3fSmrgsubr_to_int(operand a)
34901e04c3fSmrg{
35001e04c3fSmrg   return expr(ir_unop_subroutine_to_int, a);
35101e04c3fSmrg}
35201e04c3fSmrg
35301e04c3fSmrgir_expression*
35401e04c3fSmrgequal(operand a, operand b)
35501e04c3fSmrg{
35601e04c3fSmrg   return expr(ir_binop_equal, a, b);
35701e04c3fSmrg}
35801e04c3fSmrg
35901e04c3fSmrgir_expression*
36001e04c3fSmrgnequal(operand a, operand b)
36101e04c3fSmrg{
36201e04c3fSmrg   return expr(ir_binop_nequal, a, b);
36301e04c3fSmrg}
36401e04c3fSmrg
36501e04c3fSmrgir_expression*
36601e04c3fSmrgless(operand a, operand b)
36701e04c3fSmrg{
36801e04c3fSmrg   return expr(ir_binop_less, a, b);
36901e04c3fSmrg}
37001e04c3fSmrg
37101e04c3fSmrgir_expression*
37201e04c3fSmrggreater(operand a, operand b)
37301e04c3fSmrg{
37401e04c3fSmrg   return expr(ir_binop_less, b, a);
37501e04c3fSmrg}
37601e04c3fSmrg
37701e04c3fSmrgir_expression*
37801e04c3fSmrglequal(operand a, operand b)
37901e04c3fSmrg{
38001e04c3fSmrg   return expr(ir_binop_gequal, b, a);
38101e04c3fSmrg}
38201e04c3fSmrg
38301e04c3fSmrgir_expression*
38401e04c3fSmrggequal(operand a, operand b)
38501e04c3fSmrg{
38601e04c3fSmrg   return expr(ir_binop_gequal, a, b);
38701e04c3fSmrg}
38801e04c3fSmrg
38901e04c3fSmrgir_expression*
39001e04c3fSmrglogic_not(operand a)
39101e04c3fSmrg{
39201e04c3fSmrg   return expr(ir_unop_logic_not, a);
39301e04c3fSmrg}
39401e04c3fSmrg
39501e04c3fSmrgir_expression*
39601e04c3fSmrglogic_and(operand a, operand b)
39701e04c3fSmrg{
39801e04c3fSmrg   return expr(ir_binop_logic_and, a, b);
39901e04c3fSmrg}
40001e04c3fSmrg
40101e04c3fSmrgir_expression*
40201e04c3fSmrglogic_or(operand a, operand b)
40301e04c3fSmrg{
40401e04c3fSmrg   return expr(ir_binop_logic_or, a, b);
40501e04c3fSmrg}
40601e04c3fSmrg
40701e04c3fSmrgir_expression*
40801e04c3fSmrgbit_not(operand a)
40901e04c3fSmrg{
41001e04c3fSmrg   return expr(ir_unop_bit_not, a);
41101e04c3fSmrg}
41201e04c3fSmrg
41301e04c3fSmrgir_expression*
41401e04c3fSmrgbit_and(operand a, operand b)
41501e04c3fSmrg{
41601e04c3fSmrg   return expr(ir_binop_bit_and, a, b);
41701e04c3fSmrg}
41801e04c3fSmrg
41901e04c3fSmrgir_expression*
42001e04c3fSmrgbit_or(operand a, operand b)
42101e04c3fSmrg{
42201e04c3fSmrg   return expr(ir_binop_bit_or, a, b);
42301e04c3fSmrg}
42401e04c3fSmrg
42501e04c3fSmrgir_expression*
42601e04c3fSmrgbit_xor(operand a, operand b)
42701e04c3fSmrg{
42801e04c3fSmrg   return expr(ir_binop_bit_xor, a, b);
42901e04c3fSmrg}
43001e04c3fSmrg
43101e04c3fSmrgir_expression*
43201e04c3fSmrglshift(operand a, operand b)
43301e04c3fSmrg{
43401e04c3fSmrg   return expr(ir_binop_lshift, a, b);
43501e04c3fSmrg}
43601e04c3fSmrg
43701e04c3fSmrgir_expression*
43801e04c3fSmrgrshift(operand a, operand b)
43901e04c3fSmrg{
44001e04c3fSmrg   return expr(ir_binop_rshift, a, b);
44101e04c3fSmrg}
44201e04c3fSmrg
44301e04c3fSmrgir_expression*
44401e04c3fSmrgf2i(operand a)
44501e04c3fSmrg{
44601e04c3fSmrg   return expr(ir_unop_f2i, a);
44701e04c3fSmrg}
44801e04c3fSmrg
44901e04c3fSmrgir_expression*
45001e04c3fSmrgbitcast_f2i(operand a)
45101e04c3fSmrg{
45201e04c3fSmrg   return expr(ir_unop_bitcast_f2i, a);
45301e04c3fSmrg}
45401e04c3fSmrg
45501e04c3fSmrgir_expression*
45601e04c3fSmrgi2f(operand a)
45701e04c3fSmrg{
45801e04c3fSmrg   return expr(ir_unop_i2f, a);
45901e04c3fSmrg}
46001e04c3fSmrg
46101e04c3fSmrgir_expression*
46201e04c3fSmrgbitcast_i2f(operand a)
46301e04c3fSmrg{
46401e04c3fSmrg   return expr(ir_unop_bitcast_i2f, a);
46501e04c3fSmrg}
46601e04c3fSmrg
46701e04c3fSmrgir_expression*
46801e04c3fSmrgi2u(operand a)
46901e04c3fSmrg{
47001e04c3fSmrg   return expr(ir_unop_i2u, a);
47101e04c3fSmrg}
47201e04c3fSmrg
47301e04c3fSmrgir_expression*
47401e04c3fSmrgu2i(operand a)
47501e04c3fSmrg{
47601e04c3fSmrg   return expr(ir_unop_u2i, a);
47701e04c3fSmrg}
47801e04c3fSmrg
47901e04c3fSmrgir_expression*
48001e04c3fSmrgf2u(operand a)
48101e04c3fSmrg{
48201e04c3fSmrg   return expr(ir_unop_f2u, a);
48301e04c3fSmrg}
48401e04c3fSmrg
48501e04c3fSmrgir_expression*
48601e04c3fSmrgbitcast_f2u(operand a)
48701e04c3fSmrg{
48801e04c3fSmrg   return expr(ir_unop_bitcast_f2u, a);
48901e04c3fSmrg}
49001e04c3fSmrg
49101e04c3fSmrgir_expression*
49201e04c3fSmrgu2f(operand a)
49301e04c3fSmrg{
49401e04c3fSmrg   return expr(ir_unop_u2f, a);
49501e04c3fSmrg}
49601e04c3fSmrg
49701e04c3fSmrgir_expression*
49801e04c3fSmrgbitcast_u2f(operand a)
49901e04c3fSmrg{
50001e04c3fSmrg   return expr(ir_unop_bitcast_u2f, a);
50101e04c3fSmrg}
50201e04c3fSmrg
50301e04c3fSmrgir_expression*
50401e04c3fSmrgi2b(operand a)
50501e04c3fSmrg{
50601e04c3fSmrg   return expr(ir_unop_i2b, a);
50701e04c3fSmrg}
50801e04c3fSmrg
50901e04c3fSmrgir_expression*
51001e04c3fSmrgb2i(operand a)
51101e04c3fSmrg{
51201e04c3fSmrg   return expr(ir_unop_b2i, a);
51301e04c3fSmrg}
51401e04c3fSmrg
51501e04c3fSmrgir_expression *
51601e04c3fSmrgf2b(operand a)
51701e04c3fSmrg{
51801e04c3fSmrg   return expr(ir_unop_f2b, a);
51901e04c3fSmrg}
52001e04c3fSmrg
52101e04c3fSmrgir_expression *
52201e04c3fSmrgb2f(operand a)
52301e04c3fSmrg{
52401e04c3fSmrg   return expr(ir_unop_b2f, a);
52501e04c3fSmrg}
52601e04c3fSmrg
52701e04c3fSmrgir_expression*
52801e04c3fSmrgbitcast_d2i64(operand a)
52901e04c3fSmrg{
53001e04c3fSmrg   return expr(ir_unop_bitcast_d2i64, a);
53101e04c3fSmrg}
53201e04c3fSmrg
53301e04c3fSmrgir_expression*
53401e04c3fSmrgbitcast_d2u64(operand a)
53501e04c3fSmrg{
53601e04c3fSmrg   return expr(ir_unop_bitcast_d2u64, a);
53701e04c3fSmrg}
53801e04c3fSmrg
53901e04c3fSmrgir_expression*
54001e04c3fSmrgbitcast_i642d(operand a)
54101e04c3fSmrg{
54201e04c3fSmrg   return expr(ir_unop_bitcast_i642d, a);
54301e04c3fSmrg}
54401e04c3fSmrg
54501e04c3fSmrgir_expression*
54601e04c3fSmrgbitcast_u642d(operand a)
54701e04c3fSmrg{
54801e04c3fSmrg   return expr(ir_unop_bitcast_u642d, a);
54901e04c3fSmrg}
55001e04c3fSmrg
55101e04c3fSmrgir_expression *
55201e04c3fSmrginterpolate_at_centroid(operand a)
55301e04c3fSmrg{
55401e04c3fSmrg   return expr(ir_unop_interpolate_at_centroid, a);
55501e04c3fSmrg}
55601e04c3fSmrg
55701e04c3fSmrgir_expression *
55801e04c3fSmrginterpolate_at_offset(operand a, operand b)
55901e04c3fSmrg{
56001e04c3fSmrg   return expr(ir_binop_interpolate_at_offset, a, b);
56101e04c3fSmrg}
56201e04c3fSmrg
56301e04c3fSmrgir_expression *
56401e04c3fSmrginterpolate_at_sample(operand a, operand b)
56501e04c3fSmrg{
56601e04c3fSmrg   return expr(ir_binop_interpolate_at_sample, a, b);
56701e04c3fSmrg}
56801e04c3fSmrg
56901e04c3fSmrgir_expression *
57001e04c3fSmrgf2d(operand a)
57101e04c3fSmrg{
57201e04c3fSmrg   return expr(ir_unop_f2d, a);
57301e04c3fSmrg}
57401e04c3fSmrg
57501e04c3fSmrgir_expression *
57601e04c3fSmrgi2d(operand a)
57701e04c3fSmrg{
57801e04c3fSmrg   return expr(ir_unop_i2d, a);
57901e04c3fSmrg}
58001e04c3fSmrg
58101e04c3fSmrgir_expression *
58201e04c3fSmrgu2d(operand a)
58301e04c3fSmrg{
58401e04c3fSmrg   return expr(ir_unop_u2d, a);
58501e04c3fSmrg}
58601e04c3fSmrg
58701e04c3fSmrgir_expression *
58801e04c3fSmrgfma(operand a, operand b, operand c)
58901e04c3fSmrg{
59001e04c3fSmrg   return expr(ir_triop_fma, a, b, c);
59101e04c3fSmrg}
59201e04c3fSmrg
59301e04c3fSmrgir_expression *
59401e04c3fSmrglrp(operand x, operand y, operand a)
59501e04c3fSmrg{
59601e04c3fSmrg   return expr(ir_triop_lrp, x, y, a);
59701e04c3fSmrg}
59801e04c3fSmrg
59901e04c3fSmrgir_expression *
60001e04c3fSmrgcsel(operand a, operand b, operand c)
60101e04c3fSmrg{
60201e04c3fSmrg   return expr(ir_triop_csel, a, b, c);
60301e04c3fSmrg}
60401e04c3fSmrg
60501e04c3fSmrgir_expression *
60601e04c3fSmrgbitfield_extract(operand a, operand b, operand c)
60701e04c3fSmrg{
60801e04c3fSmrg   return expr(ir_triop_bitfield_extract, a, b, c);
60901e04c3fSmrg}
61001e04c3fSmrg
61101e04c3fSmrgir_expression *
61201e04c3fSmrgbitfield_insert(operand a, operand b, operand c, operand d)
61301e04c3fSmrg{
61401e04c3fSmrg   void *mem_ctx = ralloc_parent(a.val);
61501e04c3fSmrg   return new(mem_ctx) ir_expression(ir_quadop_bitfield_insert,
61601e04c3fSmrg                                     a.val->type, a.val, b.val, c.val, d.val);
61701e04c3fSmrg}
61801e04c3fSmrg
61901e04c3fSmrgir_if*
62001e04c3fSmrgif_tree(operand condition,
62101e04c3fSmrg        ir_instruction *then_branch)
62201e04c3fSmrg{
62301e04c3fSmrg   assert(then_branch != NULL);
62401e04c3fSmrg
62501e04c3fSmrg   void *mem_ctx = ralloc_parent(condition.val);
62601e04c3fSmrg
62701e04c3fSmrg   ir_if *result = new(mem_ctx) ir_if(condition.val);
62801e04c3fSmrg   result->then_instructions.push_tail(then_branch);
62901e04c3fSmrg   return result;
63001e04c3fSmrg}
63101e04c3fSmrg
63201e04c3fSmrgir_if*
63301e04c3fSmrgif_tree(operand condition,
63401e04c3fSmrg        ir_instruction *then_branch,
63501e04c3fSmrg        ir_instruction *else_branch)
63601e04c3fSmrg{
63701e04c3fSmrg   assert(then_branch != NULL);
63801e04c3fSmrg   assert(else_branch != NULL);
63901e04c3fSmrg
64001e04c3fSmrg   void *mem_ctx = ralloc_parent(condition.val);
64101e04c3fSmrg
64201e04c3fSmrg   ir_if *result = new(mem_ctx) ir_if(condition.val);
64301e04c3fSmrg   result->then_instructions.push_tail(then_branch);
64401e04c3fSmrg   result->else_instructions.push_tail(else_branch);
64501e04c3fSmrg   return result;
64601e04c3fSmrg}
64701e04c3fSmrg
64801e04c3fSmrg} /* namespace ir_builder */
649