nir.h revision 01e04c3f
101e04c3fSmrg/* 201e04c3fSmrg * Copyright © 2014 Connor Abbott 301e04c3fSmrg * 401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a 501e04c3fSmrg * copy of this software and associated documentation files (the "Software"), 601e04c3fSmrg * to deal in the Software without restriction, including without limitation 701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the 901e04c3fSmrg * Software is furnished to do so, subject to the following conditions: 1001e04c3fSmrg * 1101e04c3fSmrg * The above copyright notice and this permission notice (including the next 1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the 1301e04c3fSmrg * Software. 1401e04c3fSmrg * 1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 2101e04c3fSmrg * IN THE SOFTWARE. 2201e04c3fSmrg * 2301e04c3fSmrg * Authors: 2401e04c3fSmrg * Connor Abbott (cwabbott0@gmail.com) 2501e04c3fSmrg * 2601e04c3fSmrg */ 2701e04c3fSmrg 2801e04c3fSmrg#ifndef NIR_H 2901e04c3fSmrg#define NIR_H 3001e04c3fSmrg 3101e04c3fSmrg#include "util/hash_table.h" 3201e04c3fSmrg#include "compiler/glsl/list.h" 3301e04c3fSmrg#include "GL/gl.h" /* GLenum */ 3401e04c3fSmrg#include "util/list.h" 3501e04c3fSmrg#include "util/ralloc.h" 3601e04c3fSmrg#include "util/set.h" 3701e04c3fSmrg#include "util/bitset.h" 3801e04c3fSmrg#include "util/macros.h" 3901e04c3fSmrg#include "compiler/nir_types.h" 4001e04c3fSmrg#include "compiler/shader_enums.h" 4101e04c3fSmrg#include "compiler/shader_info.h" 4201e04c3fSmrg#include <stdio.h> 4301e04c3fSmrg 4401e04c3fSmrg#ifndef NDEBUG 4501e04c3fSmrg#include "util/debug.h" 4601e04c3fSmrg#endif /* NDEBUG */ 4701e04c3fSmrg 4801e04c3fSmrg#include "nir_opcodes.h" 4901e04c3fSmrg 5001e04c3fSmrg#if defined(_WIN32) && !defined(snprintf) 5101e04c3fSmrg#define snprintf _snprintf 5201e04c3fSmrg#endif 5301e04c3fSmrg 5401e04c3fSmrg#ifdef __cplusplus 5501e04c3fSmrgextern "C" { 5601e04c3fSmrg#endif 5701e04c3fSmrg 5801e04c3fSmrg#define NIR_FALSE 0u 5901e04c3fSmrg#define NIR_TRUE (~0u) 6001e04c3fSmrg#define NIR_MAX_VEC_COMPONENTS 4 6101e04c3fSmrgtypedef uint8_t nir_component_mask_t; 6201e04c3fSmrg 6301e04c3fSmrg/** Defines a cast function 6401e04c3fSmrg * 6501e04c3fSmrg * This macro defines a cast function from in_type to out_type where 6601e04c3fSmrg * out_type is some structure type that contains a field of type out_type. 6701e04c3fSmrg * 6801e04c3fSmrg * Note that you have to be a bit careful as the generated cast function 6901e04c3fSmrg * destroys constness. 7001e04c3fSmrg */ 7101e04c3fSmrg#define NIR_DEFINE_CAST(name, in_type, out_type, field, \ 7201e04c3fSmrg type_field, type_value) \ 7301e04c3fSmrgstatic inline out_type * \ 7401e04c3fSmrgname(const in_type *parent) \ 7501e04c3fSmrg{ \ 7601e04c3fSmrg assert(parent && parent->type_field == type_value); \ 7701e04c3fSmrg return exec_node_data(out_type, parent, field); \ 7801e04c3fSmrg} 7901e04c3fSmrg 8001e04c3fSmrgstruct nir_function; 8101e04c3fSmrgstruct nir_shader; 8201e04c3fSmrgstruct nir_instr; 8301e04c3fSmrgstruct nir_builder; 8401e04c3fSmrg 8501e04c3fSmrg 8601e04c3fSmrg/** 8701e04c3fSmrg * Description of built-in state associated with a uniform 8801e04c3fSmrg * 8901e04c3fSmrg * \sa nir_variable::state_slots 9001e04c3fSmrg */ 9101e04c3fSmrgtypedef struct { 9201e04c3fSmrg gl_state_index16 tokens[STATE_LENGTH]; 9301e04c3fSmrg int swizzle; 9401e04c3fSmrg} nir_state_slot; 9501e04c3fSmrg 9601e04c3fSmrgtypedef enum { 9701e04c3fSmrg nir_var_shader_in = (1 << 0), 9801e04c3fSmrg nir_var_shader_out = (1 << 1), 9901e04c3fSmrg nir_var_global = (1 << 2), 10001e04c3fSmrg nir_var_local = (1 << 3), 10101e04c3fSmrg nir_var_uniform = (1 << 4), 10201e04c3fSmrg nir_var_shader_storage = (1 << 5), 10301e04c3fSmrg nir_var_system_value = (1 << 6), 10401e04c3fSmrg nir_var_shared = (1 << 8), 10501e04c3fSmrg nir_var_all = ~0, 10601e04c3fSmrg} nir_variable_mode; 10701e04c3fSmrg 10801e04c3fSmrg/** 10901e04c3fSmrg * Rounding modes. 11001e04c3fSmrg */ 11101e04c3fSmrgtypedef enum { 11201e04c3fSmrg nir_rounding_mode_undef = 0, 11301e04c3fSmrg nir_rounding_mode_rtne = 1, /* round to nearest even */ 11401e04c3fSmrg nir_rounding_mode_ru = 2, /* round up */ 11501e04c3fSmrg nir_rounding_mode_rd = 3, /* round down */ 11601e04c3fSmrg nir_rounding_mode_rtz = 4, /* round towards zero */ 11701e04c3fSmrg} nir_rounding_mode; 11801e04c3fSmrg 11901e04c3fSmrgtypedef union { 12001e04c3fSmrg float f32[NIR_MAX_VEC_COMPONENTS]; 12101e04c3fSmrg double f64[NIR_MAX_VEC_COMPONENTS]; 12201e04c3fSmrg int8_t i8[NIR_MAX_VEC_COMPONENTS]; 12301e04c3fSmrg uint8_t u8[NIR_MAX_VEC_COMPONENTS]; 12401e04c3fSmrg int16_t i16[NIR_MAX_VEC_COMPONENTS]; 12501e04c3fSmrg uint16_t u16[NIR_MAX_VEC_COMPONENTS]; 12601e04c3fSmrg int32_t i32[NIR_MAX_VEC_COMPONENTS]; 12701e04c3fSmrg uint32_t u32[NIR_MAX_VEC_COMPONENTS]; 12801e04c3fSmrg int64_t i64[NIR_MAX_VEC_COMPONENTS]; 12901e04c3fSmrg uint64_t u64[NIR_MAX_VEC_COMPONENTS]; 13001e04c3fSmrg} nir_const_value; 13101e04c3fSmrg 13201e04c3fSmrgtypedef struct nir_constant { 13301e04c3fSmrg /** 13401e04c3fSmrg * Value of the constant. 13501e04c3fSmrg * 13601e04c3fSmrg * The field used to back the values supplied by the constant is determined 13701e04c3fSmrg * by the type associated with the \c nir_variable. Constants may be 13801e04c3fSmrg * scalars, vectors, or matrices. 13901e04c3fSmrg */ 14001e04c3fSmrg nir_const_value values[NIR_MAX_VEC_COMPONENTS]; 14101e04c3fSmrg 14201e04c3fSmrg /* we could get this from the var->type but makes clone *much* easier to 14301e04c3fSmrg * not have to care about the type. 14401e04c3fSmrg */ 14501e04c3fSmrg unsigned num_elements; 14601e04c3fSmrg 14701e04c3fSmrg /* Array elements / Structure Fields */ 14801e04c3fSmrg struct nir_constant **elements; 14901e04c3fSmrg} nir_constant; 15001e04c3fSmrg 15101e04c3fSmrg/** 15201e04c3fSmrg * \brief Layout qualifiers for gl_FragDepth. 15301e04c3fSmrg * 15401e04c3fSmrg * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared 15501e04c3fSmrg * with a layout qualifier. 15601e04c3fSmrg */ 15701e04c3fSmrgtypedef enum { 15801e04c3fSmrg nir_depth_layout_none, /**< No depth layout is specified. */ 15901e04c3fSmrg nir_depth_layout_any, 16001e04c3fSmrg nir_depth_layout_greater, 16101e04c3fSmrg nir_depth_layout_less, 16201e04c3fSmrg nir_depth_layout_unchanged 16301e04c3fSmrg} nir_depth_layout; 16401e04c3fSmrg 16501e04c3fSmrg/** 16601e04c3fSmrg * Enum keeping track of how a variable was declared. 16701e04c3fSmrg */ 16801e04c3fSmrgtypedef enum { 16901e04c3fSmrg /** 17001e04c3fSmrg * Normal declaration. 17101e04c3fSmrg */ 17201e04c3fSmrg nir_var_declared_normally = 0, 17301e04c3fSmrg 17401e04c3fSmrg /** 17501e04c3fSmrg * Variable is implicitly generated by the compiler and should not be 17601e04c3fSmrg * visible via the API. 17701e04c3fSmrg */ 17801e04c3fSmrg nir_var_hidden, 17901e04c3fSmrg} nir_var_declaration_type; 18001e04c3fSmrg 18101e04c3fSmrg/** 18201e04c3fSmrg * Either a uniform, global variable, shader input, or shader output. Based on 18301e04c3fSmrg * ir_variable - it should be easy to translate between the two. 18401e04c3fSmrg */ 18501e04c3fSmrg 18601e04c3fSmrgtypedef struct nir_variable { 18701e04c3fSmrg struct exec_node node; 18801e04c3fSmrg 18901e04c3fSmrg /** 19001e04c3fSmrg * Declared type of the variable 19101e04c3fSmrg */ 19201e04c3fSmrg const struct glsl_type *type; 19301e04c3fSmrg 19401e04c3fSmrg /** 19501e04c3fSmrg * Declared name of the variable 19601e04c3fSmrg */ 19701e04c3fSmrg char *name; 19801e04c3fSmrg 19901e04c3fSmrg struct nir_variable_data { 20001e04c3fSmrg /** 20101e04c3fSmrg * Storage class of the variable. 20201e04c3fSmrg * 20301e04c3fSmrg * \sa nir_variable_mode 20401e04c3fSmrg */ 20501e04c3fSmrg nir_variable_mode mode; 20601e04c3fSmrg 20701e04c3fSmrg /** 20801e04c3fSmrg * Is the variable read-only? 20901e04c3fSmrg * 21001e04c3fSmrg * This is set for variables declared as \c const, shader inputs, 21101e04c3fSmrg * and uniforms. 21201e04c3fSmrg */ 21301e04c3fSmrg unsigned read_only:1; 21401e04c3fSmrg unsigned centroid:1; 21501e04c3fSmrg unsigned sample:1; 21601e04c3fSmrg unsigned patch:1; 21701e04c3fSmrg unsigned invariant:1; 21801e04c3fSmrg 21901e04c3fSmrg /** 22001e04c3fSmrg * When separate shader programs are enabled, only input/outputs between 22101e04c3fSmrg * the stages of a multi-stage separate program can be safely removed 22201e04c3fSmrg * from the shader interface. Other input/outputs must remains active. 22301e04c3fSmrg * 22401e04c3fSmrg * This is also used to make sure xfb varyings that are unused by the 22501e04c3fSmrg * fragment shader are not removed. 22601e04c3fSmrg */ 22701e04c3fSmrg unsigned always_active_io:1; 22801e04c3fSmrg 22901e04c3fSmrg /** 23001e04c3fSmrg * Interpolation mode for shader inputs / outputs 23101e04c3fSmrg * 23201e04c3fSmrg * \sa glsl_interp_mode 23301e04c3fSmrg */ 23401e04c3fSmrg unsigned interpolation:2; 23501e04c3fSmrg 23601e04c3fSmrg /** 23701e04c3fSmrg * \name ARB_fragment_coord_conventions 23801e04c3fSmrg * @{ 23901e04c3fSmrg */ 24001e04c3fSmrg unsigned origin_upper_left:1; 24101e04c3fSmrg unsigned pixel_center_integer:1; 24201e04c3fSmrg /*@}*/ 24301e04c3fSmrg 24401e04c3fSmrg /** 24501e04c3fSmrg * If non-zero, then this variable may be packed along with other variables 24601e04c3fSmrg * into a single varying slot, so this offset should be applied when 24701e04c3fSmrg * accessing components. For example, an offset of 1 means that the x 24801e04c3fSmrg * component of this variable is actually stored in component y of the 24901e04c3fSmrg * location specified by \c location. 25001e04c3fSmrg */ 25101e04c3fSmrg unsigned location_frac:2; 25201e04c3fSmrg 25301e04c3fSmrg /** 25401e04c3fSmrg * If true, this variable represents an array of scalars that should 25501e04c3fSmrg * be tightly packed. In other words, consecutive array elements 25601e04c3fSmrg * should be stored one component apart, rather than one slot apart. 25701e04c3fSmrg */ 25801e04c3fSmrg unsigned compact:1; 25901e04c3fSmrg 26001e04c3fSmrg /** 26101e04c3fSmrg * Whether this is a fragment shader output implicitly initialized with 26201e04c3fSmrg * the previous contents of the specified render target at the 26301e04c3fSmrg * framebuffer location corresponding to this shader invocation. 26401e04c3fSmrg */ 26501e04c3fSmrg unsigned fb_fetch_output:1; 26601e04c3fSmrg 26701e04c3fSmrg /** 26801e04c3fSmrg * Non-zero if this variable is considered bindless as defined by 26901e04c3fSmrg * ARB_bindless_texture. 27001e04c3fSmrg */ 27101e04c3fSmrg unsigned bindless:1; 27201e04c3fSmrg 27301e04c3fSmrg /** 27401e04c3fSmrg * Was an explicit binding set in the shader? 27501e04c3fSmrg */ 27601e04c3fSmrg unsigned explicit_binding:1; 27701e04c3fSmrg 27801e04c3fSmrg /** 27901e04c3fSmrg * Was a transfer feedback buffer set in the shader? 28001e04c3fSmrg */ 28101e04c3fSmrg unsigned explicit_xfb_buffer:1; 28201e04c3fSmrg 28301e04c3fSmrg /** 28401e04c3fSmrg * Was a transfer feedback stride set in the shader? 28501e04c3fSmrg */ 28601e04c3fSmrg unsigned explicit_xfb_stride:1; 28701e04c3fSmrg 28801e04c3fSmrg /** 28901e04c3fSmrg * Was an explicit offset set in the shader? 29001e04c3fSmrg */ 29101e04c3fSmrg unsigned explicit_offset:1; 29201e04c3fSmrg 29301e04c3fSmrg /** 29401e04c3fSmrg * \brief Layout qualifier for gl_FragDepth. 29501e04c3fSmrg * 29601e04c3fSmrg * This is not equal to \c ir_depth_layout_none if and only if this 29701e04c3fSmrg * variable is \c gl_FragDepth and a layout qualifier is specified. 29801e04c3fSmrg */ 29901e04c3fSmrg nir_depth_layout depth_layout; 30001e04c3fSmrg 30101e04c3fSmrg /** 30201e04c3fSmrg * Storage location of the base of this variable 30301e04c3fSmrg * 30401e04c3fSmrg * The precise meaning of this field depends on the nature of the variable. 30501e04c3fSmrg * 30601e04c3fSmrg * - Vertex shader input: one of the values from \c gl_vert_attrib. 30701e04c3fSmrg * - Vertex shader output: one of the values from \c gl_varying_slot. 30801e04c3fSmrg * - Geometry shader input: one of the values from \c gl_varying_slot. 30901e04c3fSmrg * - Geometry shader output: one of the values from \c gl_varying_slot. 31001e04c3fSmrg * - Fragment shader input: one of the values from \c gl_varying_slot. 31101e04c3fSmrg * - Fragment shader output: one of the values from \c gl_frag_result. 31201e04c3fSmrg * - Uniforms: Per-stage uniform slot number for default uniform block. 31301e04c3fSmrg * - Uniforms: Index within the uniform block definition for UBO members. 31401e04c3fSmrg * - Non-UBO Uniforms: uniform slot number. 31501e04c3fSmrg * - Other: This field is not currently used. 31601e04c3fSmrg * 31701e04c3fSmrg * If the variable is a uniform, shader input, or shader output, and the 31801e04c3fSmrg * slot has not been assigned, the value will be -1. 31901e04c3fSmrg */ 32001e04c3fSmrg int location; 32101e04c3fSmrg 32201e04c3fSmrg /** 32301e04c3fSmrg * The actual location of the variable in the IR. Only valid for inputs 32401e04c3fSmrg * and outputs. 32501e04c3fSmrg */ 32601e04c3fSmrg unsigned int driver_location; 32701e04c3fSmrg 32801e04c3fSmrg /** 32901e04c3fSmrg * Vertex stream output identifier. 33001e04c3fSmrg * 33101e04c3fSmrg * For packed outputs, bit 31 is set and bits [2*i+1,2*i] indicate the 33201e04c3fSmrg * stream of the i-th component. 33301e04c3fSmrg */ 33401e04c3fSmrg unsigned stream; 33501e04c3fSmrg 33601e04c3fSmrg /** 33701e04c3fSmrg * output index for dual source blending. 33801e04c3fSmrg */ 33901e04c3fSmrg int index; 34001e04c3fSmrg 34101e04c3fSmrg /** 34201e04c3fSmrg * Descriptor set binding for sampler or UBO. 34301e04c3fSmrg */ 34401e04c3fSmrg int descriptor_set; 34501e04c3fSmrg 34601e04c3fSmrg /** 34701e04c3fSmrg * Initial binding point for a sampler or UBO. 34801e04c3fSmrg * 34901e04c3fSmrg * For array types, this represents the binding point for the first element. 35001e04c3fSmrg */ 35101e04c3fSmrg int binding; 35201e04c3fSmrg 35301e04c3fSmrg /** 35401e04c3fSmrg * Location an atomic counter or transform feedback is stored at. 35501e04c3fSmrg */ 35601e04c3fSmrg unsigned offset; 35701e04c3fSmrg 35801e04c3fSmrg /** 35901e04c3fSmrg * Transform feedback buffer. 36001e04c3fSmrg */ 36101e04c3fSmrg unsigned xfb_buffer; 36201e04c3fSmrg 36301e04c3fSmrg /** 36401e04c3fSmrg * Transform feedback stride. 36501e04c3fSmrg */ 36601e04c3fSmrg unsigned xfb_stride; 36701e04c3fSmrg 36801e04c3fSmrg /** 36901e04c3fSmrg * How the variable was declared. See nir_var_declaration_type. 37001e04c3fSmrg * 37101e04c3fSmrg * This is used to detect variables generated by the compiler, so should 37201e04c3fSmrg * not be visible via the API. 37301e04c3fSmrg */ 37401e04c3fSmrg unsigned how_declared:2; 37501e04c3fSmrg 37601e04c3fSmrg /** 37701e04c3fSmrg * ARB_shader_image_load_store qualifiers. 37801e04c3fSmrg */ 37901e04c3fSmrg struct { 38001e04c3fSmrg enum gl_access_qualifier access; 38101e04c3fSmrg 38201e04c3fSmrg /** Image internal format if specified explicitly, otherwise GL_NONE. */ 38301e04c3fSmrg GLenum format; 38401e04c3fSmrg } image; 38501e04c3fSmrg } data; 38601e04c3fSmrg 38701e04c3fSmrg /** 38801e04c3fSmrg * Built-in state that backs this uniform 38901e04c3fSmrg * 39001e04c3fSmrg * Once set at variable creation, \c state_slots must remain invariant. 39101e04c3fSmrg * This is because, ideally, this array would be shared by all clones of 39201e04c3fSmrg * this variable in the IR tree. In other words, we'd really like for it 39301e04c3fSmrg * to be a fly-weight. 39401e04c3fSmrg * 39501e04c3fSmrg * If the variable is not a uniform, \c num_state_slots will be zero and 39601e04c3fSmrg * \c state_slots will be \c NULL. 39701e04c3fSmrg */ 39801e04c3fSmrg /*@{*/ 39901e04c3fSmrg unsigned num_state_slots; /**< Number of state slots used */ 40001e04c3fSmrg nir_state_slot *state_slots; /**< State descriptors. */ 40101e04c3fSmrg /*@}*/ 40201e04c3fSmrg 40301e04c3fSmrg /** 40401e04c3fSmrg * Constant expression assigned in the initializer of the variable 40501e04c3fSmrg * 40601e04c3fSmrg * This field should only be used temporarily by creators of NIR shaders 40701e04c3fSmrg * and then lower_constant_initializers can be used to get rid of them. 40801e04c3fSmrg * Most of the rest of NIR ignores this field or asserts that it's NULL. 40901e04c3fSmrg */ 41001e04c3fSmrg nir_constant *constant_initializer; 41101e04c3fSmrg 41201e04c3fSmrg /** 41301e04c3fSmrg * For variables that are in an interface block or are an instance of an 41401e04c3fSmrg * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block. 41501e04c3fSmrg * 41601e04c3fSmrg * \sa ir_variable::location 41701e04c3fSmrg */ 41801e04c3fSmrg const struct glsl_type *interface_type; 41901e04c3fSmrg 42001e04c3fSmrg /** 42101e04c3fSmrg * Description of per-member data for per-member struct variables 42201e04c3fSmrg * 42301e04c3fSmrg * This is used for variables which are actually an amalgamation of 42401e04c3fSmrg * multiple entities such as a struct of built-in values or a struct of 42501e04c3fSmrg * inputs each with their own layout specifier. This is only allowed on 42601e04c3fSmrg * variables with a struct or array of array of struct type. 42701e04c3fSmrg */ 42801e04c3fSmrg unsigned num_members; 42901e04c3fSmrg struct nir_variable_data *members; 43001e04c3fSmrg} nir_variable; 43101e04c3fSmrg 43201e04c3fSmrg#define nir_foreach_variable(var, var_list) \ 43301e04c3fSmrg foreach_list_typed(nir_variable, var, node, var_list) 43401e04c3fSmrg 43501e04c3fSmrg#define nir_foreach_variable_safe(var, var_list) \ 43601e04c3fSmrg foreach_list_typed_safe(nir_variable, var, node, var_list) 43701e04c3fSmrg 43801e04c3fSmrgstatic inline bool 43901e04c3fSmrgnir_variable_is_global(const nir_variable *var) 44001e04c3fSmrg{ 44101e04c3fSmrg return var->data.mode != nir_var_local; 44201e04c3fSmrg} 44301e04c3fSmrg 44401e04c3fSmrgtypedef struct nir_register { 44501e04c3fSmrg struct exec_node node; 44601e04c3fSmrg 44701e04c3fSmrg unsigned num_components; /** < number of vector components */ 44801e04c3fSmrg unsigned num_array_elems; /** < size of array (0 for no array) */ 44901e04c3fSmrg 45001e04c3fSmrg /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */ 45101e04c3fSmrg uint8_t bit_size; 45201e04c3fSmrg 45301e04c3fSmrg /** generic register index. */ 45401e04c3fSmrg unsigned index; 45501e04c3fSmrg 45601e04c3fSmrg /** only for debug purposes, can be NULL */ 45701e04c3fSmrg const char *name; 45801e04c3fSmrg 45901e04c3fSmrg /** whether this register is local (per-function) or global (per-shader) */ 46001e04c3fSmrg bool is_global; 46101e04c3fSmrg 46201e04c3fSmrg /** 46301e04c3fSmrg * If this flag is set to true, then accessing channels >= num_components 46401e04c3fSmrg * is well-defined, and simply spills over to the next array element. This 46501e04c3fSmrg * is useful for backends that can do per-component accessing, in 46601e04c3fSmrg * particular scalar backends. By setting this flag and making 46701e04c3fSmrg * num_components equal to 1, structures can be packed tightly into 46801e04c3fSmrg * registers and then registers can be accessed per-component to get to 46901e04c3fSmrg * each structure member, even if it crosses vec4 boundaries. 47001e04c3fSmrg */ 47101e04c3fSmrg bool is_packed; 47201e04c3fSmrg 47301e04c3fSmrg /** set of nir_srcs where this register is used (read from) */ 47401e04c3fSmrg struct list_head uses; 47501e04c3fSmrg 47601e04c3fSmrg /** set of nir_dests where this register is defined (written to) */ 47701e04c3fSmrg struct list_head defs; 47801e04c3fSmrg 47901e04c3fSmrg /** set of nir_ifs where this register is used as a condition */ 48001e04c3fSmrg struct list_head if_uses; 48101e04c3fSmrg} nir_register; 48201e04c3fSmrg 48301e04c3fSmrg#define nir_foreach_register(reg, reg_list) \ 48401e04c3fSmrg foreach_list_typed(nir_register, reg, node, reg_list) 48501e04c3fSmrg#define nir_foreach_register_safe(reg, reg_list) \ 48601e04c3fSmrg foreach_list_typed_safe(nir_register, reg, node, reg_list) 48701e04c3fSmrg 48801e04c3fSmrgtypedef enum { 48901e04c3fSmrg nir_instr_type_alu, 49001e04c3fSmrg nir_instr_type_deref, 49101e04c3fSmrg nir_instr_type_call, 49201e04c3fSmrg nir_instr_type_tex, 49301e04c3fSmrg nir_instr_type_intrinsic, 49401e04c3fSmrg nir_instr_type_load_const, 49501e04c3fSmrg nir_instr_type_jump, 49601e04c3fSmrg nir_instr_type_ssa_undef, 49701e04c3fSmrg nir_instr_type_phi, 49801e04c3fSmrg nir_instr_type_parallel_copy, 49901e04c3fSmrg} nir_instr_type; 50001e04c3fSmrg 50101e04c3fSmrgtypedef struct nir_instr { 50201e04c3fSmrg struct exec_node node; 50301e04c3fSmrg nir_instr_type type; 50401e04c3fSmrg struct nir_block *block; 50501e04c3fSmrg 50601e04c3fSmrg /** generic instruction index. */ 50701e04c3fSmrg unsigned index; 50801e04c3fSmrg 50901e04c3fSmrg /* A temporary for optimization and analysis passes to use for storing 51001e04c3fSmrg * flags. For instance, DCE uses this to store the "dead/live" info. 51101e04c3fSmrg */ 51201e04c3fSmrg uint8_t pass_flags; 51301e04c3fSmrg} nir_instr; 51401e04c3fSmrg 51501e04c3fSmrgstatic inline nir_instr * 51601e04c3fSmrgnir_instr_next(nir_instr *instr) 51701e04c3fSmrg{ 51801e04c3fSmrg struct exec_node *next = exec_node_get_next(&instr->node); 51901e04c3fSmrg if (exec_node_is_tail_sentinel(next)) 52001e04c3fSmrg return NULL; 52101e04c3fSmrg else 52201e04c3fSmrg return exec_node_data(nir_instr, next, node); 52301e04c3fSmrg} 52401e04c3fSmrg 52501e04c3fSmrgstatic inline nir_instr * 52601e04c3fSmrgnir_instr_prev(nir_instr *instr) 52701e04c3fSmrg{ 52801e04c3fSmrg struct exec_node *prev = exec_node_get_prev(&instr->node); 52901e04c3fSmrg if (exec_node_is_head_sentinel(prev)) 53001e04c3fSmrg return NULL; 53101e04c3fSmrg else 53201e04c3fSmrg return exec_node_data(nir_instr, prev, node); 53301e04c3fSmrg} 53401e04c3fSmrg 53501e04c3fSmrgstatic inline bool 53601e04c3fSmrgnir_instr_is_first(const nir_instr *instr) 53701e04c3fSmrg{ 53801e04c3fSmrg return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node)); 53901e04c3fSmrg} 54001e04c3fSmrg 54101e04c3fSmrgstatic inline bool 54201e04c3fSmrgnir_instr_is_last(const nir_instr *instr) 54301e04c3fSmrg{ 54401e04c3fSmrg return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node)); 54501e04c3fSmrg} 54601e04c3fSmrg 54701e04c3fSmrgtypedef struct nir_ssa_def { 54801e04c3fSmrg /** for debugging only, can be NULL */ 54901e04c3fSmrg const char* name; 55001e04c3fSmrg 55101e04c3fSmrg /** generic SSA definition index. */ 55201e04c3fSmrg unsigned index; 55301e04c3fSmrg 55401e04c3fSmrg /** Index into the live_in and live_out bitfields */ 55501e04c3fSmrg unsigned live_index; 55601e04c3fSmrg 55701e04c3fSmrg /** Instruction which produces this SSA value. */ 55801e04c3fSmrg nir_instr *parent_instr; 55901e04c3fSmrg 56001e04c3fSmrg /** set of nir_instrs where this register is used (read from) */ 56101e04c3fSmrg struct list_head uses; 56201e04c3fSmrg 56301e04c3fSmrg /** set of nir_ifs where this register is used as a condition */ 56401e04c3fSmrg struct list_head if_uses; 56501e04c3fSmrg 56601e04c3fSmrg uint8_t num_components; 56701e04c3fSmrg 56801e04c3fSmrg /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */ 56901e04c3fSmrg uint8_t bit_size; 57001e04c3fSmrg} nir_ssa_def; 57101e04c3fSmrg 57201e04c3fSmrgstruct nir_src; 57301e04c3fSmrg 57401e04c3fSmrgtypedef struct { 57501e04c3fSmrg nir_register *reg; 57601e04c3fSmrg struct nir_src *indirect; /** < NULL for no indirect offset */ 57701e04c3fSmrg unsigned base_offset; 57801e04c3fSmrg 57901e04c3fSmrg /* TODO use-def chain goes here */ 58001e04c3fSmrg} nir_reg_src; 58101e04c3fSmrg 58201e04c3fSmrgtypedef struct { 58301e04c3fSmrg nir_instr *parent_instr; 58401e04c3fSmrg struct list_head def_link; 58501e04c3fSmrg 58601e04c3fSmrg nir_register *reg; 58701e04c3fSmrg struct nir_src *indirect; /** < NULL for no indirect offset */ 58801e04c3fSmrg unsigned base_offset; 58901e04c3fSmrg 59001e04c3fSmrg /* TODO def-use chain goes here */ 59101e04c3fSmrg} nir_reg_dest; 59201e04c3fSmrg 59301e04c3fSmrgstruct nir_if; 59401e04c3fSmrg 59501e04c3fSmrgtypedef struct nir_src { 59601e04c3fSmrg union { 59701e04c3fSmrg /** Instruction that consumes this value as a source. */ 59801e04c3fSmrg nir_instr *parent_instr; 59901e04c3fSmrg struct nir_if *parent_if; 60001e04c3fSmrg }; 60101e04c3fSmrg 60201e04c3fSmrg struct list_head use_link; 60301e04c3fSmrg 60401e04c3fSmrg union { 60501e04c3fSmrg nir_reg_src reg; 60601e04c3fSmrg nir_ssa_def *ssa; 60701e04c3fSmrg }; 60801e04c3fSmrg 60901e04c3fSmrg bool is_ssa; 61001e04c3fSmrg} nir_src; 61101e04c3fSmrg 61201e04c3fSmrgstatic inline nir_src 61301e04c3fSmrgnir_src_init(void) 61401e04c3fSmrg{ 61501e04c3fSmrg nir_src src = { { NULL } }; 61601e04c3fSmrg return src; 61701e04c3fSmrg} 61801e04c3fSmrg 61901e04c3fSmrg#define NIR_SRC_INIT nir_src_init() 62001e04c3fSmrg 62101e04c3fSmrg#define nir_foreach_use(src, reg_or_ssa_def) \ 62201e04c3fSmrg list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link) 62301e04c3fSmrg 62401e04c3fSmrg#define nir_foreach_use_safe(src, reg_or_ssa_def) \ 62501e04c3fSmrg list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link) 62601e04c3fSmrg 62701e04c3fSmrg#define nir_foreach_if_use(src, reg_or_ssa_def) \ 62801e04c3fSmrg list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link) 62901e04c3fSmrg 63001e04c3fSmrg#define nir_foreach_if_use_safe(src, reg_or_ssa_def) \ 63101e04c3fSmrg list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link) 63201e04c3fSmrg 63301e04c3fSmrgtypedef struct { 63401e04c3fSmrg union { 63501e04c3fSmrg nir_reg_dest reg; 63601e04c3fSmrg nir_ssa_def ssa; 63701e04c3fSmrg }; 63801e04c3fSmrg 63901e04c3fSmrg bool is_ssa; 64001e04c3fSmrg} nir_dest; 64101e04c3fSmrg 64201e04c3fSmrgstatic inline nir_dest 64301e04c3fSmrgnir_dest_init(void) 64401e04c3fSmrg{ 64501e04c3fSmrg nir_dest dest = { { { NULL } } }; 64601e04c3fSmrg return dest; 64701e04c3fSmrg} 64801e04c3fSmrg 64901e04c3fSmrg#define NIR_DEST_INIT nir_dest_init() 65001e04c3fSmrg 65101e04c3fSmrg#define nir_foreach_def(dest, reg) \ 65201e04c3fSmrg list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link) 65301e04c3fSmrg 65401e04c3fSmrg#define nir_foreach_def_safe(dest, reg) \ 65501e04c3fSmrg list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link) 65601e04c3fSmrg 65701e04c3fSmrgstatic inline nir_src 65801e04c3fSmrgnir_src_for_ssa(nir_ssa_def *def) 65901e04c3fSmrg{ 66001e04c3fSmrg nir_src src = NIR_SRC_INIT; 66101e04c3fSmrg 66201e04c3fSmrg src.is_ssa = true; 66301e04c3fSmrg src.ssa = def; 66401e04c3fSmrg 66501e04c3fSmrg return src; 66601e04c3fSmrg} 66701e04c3fSmrg 66801e04c3fSmrgstatic inline nir_src 66901e04c3fSmrgnir_src_for_reg(nir_register *reg) 67001e04c3fSmrg{ 67101e04c3fSmrg nir_src src = NIR_SRC_INIT; 67201e04c3fSmrg 67301e04c3fSmrg src.is_ssa = false; 67401e04c3fSmrg src.reg.reg = reg; 67501e04c3fSmrg src.reg.indirect = NULL; 67601e04c3fSmrg src.reg.base_offset = 0; 67701e04c3fSmrg 67801e04c3fSmrg return src; 67901e04c3fSmrg} 68001e04c3fSmrg 68101e04c3fSmrgstatic inline nir_dest 68201e04c3fSmrgnir_dest_for_reg(nir_register *reg) 68301e04c3fSmrg{ 68401e04c3fSmrg nir_dest dest = NIR_DEST_INIT; 68501e04c3fSmrg 68601e04c3fSmrg dest.reg.reg = reg; 68701e04c3fSmrg 68801e04c3fSmrg return dest; 68901e04c3fSmrg} 69001e04c3fSmrg 69101e04c3fSmrgstatic inline unsigned 69201e04c3fSmrgnir_src_bit_size(nir_src src) 69301e04c3fSmrg{ 69401e04c3fSmrg return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size; 69501e04c3fSmrg} 69601e04c3fSmrg 69701e04c3fSmrgstatic inline unsigned 69801e04c3fSmrgnir_src_num_components(nir_src src) 69901e04c3fSmrg{ 70001e04c3fSmrg return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components; 70101e04c3fSmrg} 70201e04c3fSmrg 70301e04c3fSmrgstatic inline bool 70401e04c3fSmrgnir_src_is_const(nir_src src) 70501e04c3fSmrg{ 70601e04c3fSmrg return src.is_ssa && 70701e04c3fSmrg src.ssa->parent_instr->type == nir_instr_type_load_const; 70801e04c3fSmrg} 70901e04c3fSmrg 71001e04c3fSmrgint64_t nir_src_as_int(nir_src src); 71101e04c3fSmrguint64_t nir_src_as_uint(nir_src src); 71201e04c3fSmrgbool nir_src_as_bool(nir_src src); 71301e04c3fSmrgdouble nir_src_as_float(nir_src src); 71401e04c3fSmrgint64_t nir_src_comp_as_int(nir_src src, unsigned component); 71501e04c3fSmrguint64_t nir_src_comp_as_uint(nir_src src, unsigned component); 71601e04c3fSmrgbool nir_src_comp_as_bool(nir_src src, unsigned component); 71701e04c3fSmrgdouble nir_src_comp_as_float(nir_src src, unsigned component); 71801e04c3fSmrg 71901e04c3fSmrgstatic inline unsigned 72001e04c3fSmrgnir_dest_bit_size(nir_dest dest) 72101e04c3fSmrg{ 72201e04c3fSmrg return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size; 72301e04c3fSmrg} 72401e04c3fSmrg 72501e04c3fSmrgstatic inline unsigned 72601e04c3fSmrgnir_dest_num_components(nir_dest dest) 72701e04c3fSmrg{ 72801e04c3fSmrg return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components; 72901e04c3fSmrg} 73001e04c3fSmrg 73101e04c3fSmrgvoid nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if); 73201e04c3fSmrgvoid nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr); 73301e04c3fSmrg 73401e04c3fSmrgtypedef struct { 73501e04c3fSmrg nir_src src; 73601e04c3fSmrg 73701e04c3fSmrg /** 73801e04c3fSmrg * \name input modifiers 73901e04c3fSmrg */ 74001e04c3fSmrg /*@{*/ 74101e04c3fSmrg /** 74201e04c3fSmrg * For inputs interpreted as floating point, flips the sign bit. For 74301e04c3fSmrg * inputs interpreted as integers, performs the two's complement negation. 74401e04c3fSmrg */ 74501e04c3fSmrg bool negate; 74601e04c3fSmrg 74701e04c3fSmrg /** 74801e04c3fSmrg * Clears the sign bit for floating point values, and computes the integer 74901e04c3fSmrg * absolute value for integers. Note that the negate modifier acts after 75001e04c3fSmrg * the absolute value modifier, therefore if both are set then all inputs 75101e04c3fSmrg * will become negative. 75201e04c3fSmrg */ 75301e04c3fSmrg bool abs; 75401e04c3fSmrg /*@}*/ 75501e04c3fSmrg 75601e04c3fSmrg /** 75701e04c3fSmrg * For each input component, says which component of the register it is 75801e04c3fSmrg * chosen from. Note that which elements of the swizzle are used and which 75901e04c3fSmrg * are ignored are based on the write mask for most opcodes - for example, 76001e04c3fSmrg * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and 76101e04c3fSmrg * a swizzle of {2, x, 1, 0} where x means "don't care." 76201e04c3fSmrg */ 76301e04c3fSmrg uint8_t swizzle[NIR_MAX_VEC_COMPONENTS]; 76401e04c3fSmrg} nir_alu_src; 76501e04c3fSmrg 76601e04c3fSmrgtypedef struct { 76701e04c3fSmrg nir_dest dest; 76801e04c3fSmrg 76901e04c3fSmrg /** 77001e04c3fSmrg * \name saturate output modifier 77101e04c3fSmrg * 77201e04c3fSmrg * Only valid for opcodes that output floating-point numbers. Clamps the 77301e04c3fSmrg * output to between 0.0 and 1.0 inclusive. 77401e04c3fSmrg */ 77501e04c3fSmrg 77601e04c3fSmrg bool saturate; 77701e04c3fSmrg 77801e04c3fSmrg unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */ 77901e04c3fSmrg} nir_alu_dest; 78001e04c3fSmrg 78101e04c3fSmrgtypedef enum { 78201e04c3fSmrg nir_type_invalid = 0, /* Not a valid type */ 78301e04c3fSmrg nir_type_float, 78401e04c3fSmrg nir_type_int, 78501e04c3fSmrg nir_type_uint, 78601e04c3fSmrg nir_type_bool, 78701e04c3fSmrg nir_type_bool32 = 32 | nir_type_bool, 78801e04c3fSmrg nir_type_int8 = 8 | nir_type_int, 78901e04c3fSmrg nir_type_int16 = 16 | nir_type_int, 79001e04c3fSmrg nir_type_int32 = 32 | nir_type_int, 79101e04c3fSmrg nir_type_int64 = 64 | nir_type_int, 79201e04c3fSmrg nir_type_uint8 = 8 | nir_type_uint, 79301e04c3fSmrg nir_type_uint16 = 16 | nir_type_uint, 79401e04c3fSmrg nir_type_uint32 = 32 | nir_type_uint, 79501e04c3fSmrg nir_type_uint64 = 64 | nir_type_uint, 79601e04c3fSmrg nir_type_float16 = 16 | nir_type_float, 79701e04c3fSmrg nir_type_float32 = 32 | nir_type_float, 79801e04c3fSmrg nir_type_float64 = 64 | nir_type_float, 79901e04c3fSmrg} nir_alu_type; 80001e04c3fSmrg 80101e04c3fSmrg#define NIR_ALU_TYPE_SIZE_MASK 0xfffffff8 80201e04c3fSmrg#define NIR_ALU_TYPE_BASE_TYPE_MASK 0x00000007 80301e04c3fSmrg 80401e04c3fSmrgstatic inline unsigned 80501e04c3fSmrgnir_alu_type_get_type_size(nir_alu_type type) 80601e04c3fSmrg{ 80701e04c3fSmrg return type & NIR_ALU_TYPE_SIZE_MASK; 80801e04c3fSmrg} 80901e04c3fSmrg 81001e04c3fSmrgstatic inline unsigned 81101e04c3fSmrgnir_alu_type_get_base_type(nir_alu_type type) 81201e04c3fSmrg{ 81301e04c3fSmrg return type & NIR_ALU_TYPE_BASE_TYPE_MASK; 81401e04c3fSmrg} 81501e04c3fSmrg 81601e04c3fSmrgstatic inline nir_alu_type 81701e04c3fSmrgnir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type) 81801e04c3fSmrg{ 81901e04c3fSmrg switch (base_type) { 82001e04c3fSmrg case GLSL_TYPE_BOOL: 82101e04c3fSmrg return nir_type_bool32; 82201e04c3fSmrg break; 82301e04c3fSmrg case GLSL_TYPE_UINT: 82401e04c3fSmrg return nir_type_uint32; 82501e04c3fSmrg break; 82601e04c3fSmrg case GLSL_TYPE_INT: 82701e04c3fSmrg return nir_type_int32; 82801e04c3fSmrg break; 82901e04c3fSmrg case GLSL_TYPE_UINT16: 83001e04c3fSmrg return nir_type_uint16; 83101e04c3fSmrg break; 83201e04c3fSmrg case GLSL_TYPE_INT16: 83301e04c3fSmrg return nir_type_int16; 83401e04c3fSmrg break; 83501e04c3fSmrg case GLSL_TYPE_UINT8: 83601e04c3fSmrg return nir_type_uint8; 83701e04c3fSmrg case GLSL_TYPE_INT8: 83801e04c3fSmrg return nir_type_int8; 83901e04c3fSmrg case GLSL_TYPE_UINT64: 84001e04c3fSmrg return nir_type_uint64; 84101e04c3fSmrg break; 84201e04c3fSmrg case GLSL_TYPE_INT64: 84301e04c3fSmrg return nir_type_int64; 84401e04c3fSmrg break; 84501e04c3fSmrg case GLSL_TYPE_FLOAT: 84601e04c3fSmrg return nir_type_float32; 84701e04c3fSmrg break; 84801e04c3fSmrg case GLSL_TYPE_FLOAT16: 84901e04c3fSmrg return nir_type_float16; 85001e04c3fSmrg break; 85101e04c3fSmrg case GLSL_TYPE_DOUBLE: 85201e04c3fSmrg return nir_type_float64; 85301e04c3fSmrg break; 85401e04c3fSmrg default: 85501e04c3fSmrg unreachable("unknown type"); 85601e04c3fSmrg } 85701e04c3fSmrg} 85801e04c3fSmrg 85901e04c3fSmrgstatic inline nir_alu_type 86001e04c3fSmrgnir_get_nir_type_for_glsl_type(const struct glsl_type *type) 86101e04c3fSmrg{ 86201e04c3fSmrg return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type)); 86301e04c3fSmrg} 86401e04c3fSmrg 86501e04c3fSmrgnir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, 86601e04c3fSmrg nir_rounding_mode rnd); 86701e04c3fSmrg 86801e04c3fSmrgtypedef enum { 86901e04c3fSmrg NIR_OP_IS_COMMUTATIVE = (1 << 0), 87001e04c3fSmrg NIR_OP_IS_ASSOCIATIVE = (1 << 1), 87101e04c3fSmrg} nir_op_algebraic_property; 87201e04c3fSmrg 87301e04c3fSmrgtypedef struct { 87401e04c3fSmrg const char *name; 87501e04c3fSmrg 87601e04c3fSmrg unsigned num_inputs; 87701e04c3fSmrg 87801e04c3fSmrg /** 87901e04c3fSmrg * The number of components in the output 88001e04c3fSmrg * 88101e04c3fSmrg * If non-zero, this is the size of the output and input sizes are 88201e04c3fSmrg * explicitly given; swizzle and writemask are still in effect, but if 88301e04c3fSmrg * the output component is masked out, then the input component may 88401e04c3fSmrg * still be in use. 88501e04c3fSmrg * 88601e04c3fSmrg * If zero, the opcode acts in the standard, per-component manner; the 88701e04c3fSmrg * operation is performed on each component (except the ones that are 88801e04c3fSmrg * masked out) with the input being taken from the input swizzle for 88901e04c3fSmrg * that component. 89001e04c3fSmrg * 89101e04c3fSmrg * The size of some of the inputs may be given (i.e. non-zero) even 89201e04c3fSmrg * though output_size is zero; in that case, the inputs with a zero 89301e04c3fSmrg * size act per-component, while the inputs with non-zero size don't. 89401e04c3fSmrg */ 89501e04c3fSmrg unsigned output_size; 89601e04c3fSmrg 89701e04c3fSmrg /** 89801e04c3fSmrg * The type of vector that the instruction outputs. Note that the 89901e04c3fSmrg * staurate modifier is only allowed on outputs with the float type. 90001e04c3fSmrg */ 90101e04c3fSmrg 90201e04c3fSmrg nir_alu_type output_type; 90301e04c3fSmrg 90401e04c3fSmrg /** 90501e04c3fSmrg * The number of components in each input 90601e04c3fSmrg */ 90701e04c3fSmrg unsigned input_sizes[NIR_MAX_VEC_COMPONENTS]; 90801e04c3fSmrg 90901e04c3fSmrg /** 91001e04c3fSmrg * The type of vector that each input takes. Note that negate and 91101e04c3fSmrg * absolute value are only allowed on inputs with int or float type and 91201e04c3fSmrg * behave differently on the two. 91301e04c3fSmrg */ 91401e04c3fSmrg nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS]; 91501e04c3fSmrg 91601e04c3fSmrg nir_op_algebraic_property algebraic_properties; 91701e04c3fSmrg} nir_op_info; 91801e04c3fSmrg 91901e04c3fSmrgextern const nir_op_info nir_op_infos[nir_num_opcodes]; 92001e04c3fSmrg 92101e04c3fSmrgtypedef struct nir_alu_instr { 92201e04c3fSmrg nir_instr instr; 92301e04c3fSmrg nir_op op; 92401e04c3fSmrg 92501e04c3fSmrg /** Indicates that this ALU instruction generates an exact value 92601e04c3fSmrg * 92701e04c3fSmrg * This is kind of a mixture of GLSL "precise" and "invariant" and not 92801e04c3fSmrg * really equivalent to either. This indicates that the value generated by 92901e04c3fSmrg * this operation is high-precision and any code transformations that touch 93001e04c3fSmrg * it must ensure that the resulting value is bit-for-bit identical to the 93101e04c3fSmrg * original. 93201e04c3fSmrg */ 93301e04c3fSmrg bool exact; 93401e04c3fSmrg 93501e04c3fSmrg nir_alu_dest dest; 93601e04c3fSmrg nir_alu_src src[]; 93701e04c3fSmrg} nir_alu_instr; 93801e04c3fSmrg 93901e04c3fSmrgvoid nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src, 94001e04c3fSmrg nir_alu_instr *instr); 94101e04c3fSmrgvoid nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src, 94201e04c3fSmrg nir_alu_instr *instr); 94301e04c3fSmrg 94401e04c3fSmrg/* is this source channel used? */ 94501e04c3fSmrgstatic inline bool 94601e04c3fSmrgnir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src, 94701e04c3fSmrg unsigned channel) 94801e04c3fSmrg{ 94901e04c3fSmrg if (nir_op_infos[instr->op].input_sizes[src] > 0) 95001e04c3fSmrg return channel < nir_op_infos[instr->op].input_sizes[src]; 95101e04c3fSmrg 95201e04c3fSmrg return (instr->dest.write_mask >> channel) & 1; 95301e04c3fSmrg} 95401e04c3fSmrg 95501e04c3fSmrg/* 95601e04c3fSmrg * For instructions whose destinations are SSA, get the number of channels 95701e04c3fSmrg * used for a source 95801e04c3fSmrg */ 95901e04c3fSmrgstatic inline unsigned 96001e04c3fSmrgnir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src) 96101e04c3fSmrg{ 96201e04c3fSmrg assert(instr->dest.dest.is_ssa); 96301e04c3fSmrg 96401e04c3fSmrg if (nir_op_infos[instr->op].input_sizes[src] > 0) 96501e04c3fSmrg return nir_op_infos[instr->op].input_sizes[src]; 96601e04c3fSmrg 96701e04c3fSmrg return instr->dest.dest.ssa.num_components; 96801e04c3fSmrg} 96901e04c3fSmrg 97001e04c3fSmrgbool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2, 97101e04c3fSmrg unsigned src1, unsigned src2); 97201e04c3fSmrg 97301e04c3fSmrgtypedef enum { 97401e04c3fSmrg nir_deref_type_var, 97501e04c3fSmrg nir_deref_type_array, 97601e04c3fSmrg nir_deref_type_array_wildcard, 97701e04c3fSmrg nir_deref_type_struct, 97801e04c3fSmrg nir_deref_type_cast, 97901e04c3fSmrg} nir_deref_type; 98001e04c3fSmrg 98101e04c3fSmrgtypedef struct { 98201e04c3fSmrg nir_instr instr; 98301e04c3fSmrg 98401e04c3fSmrg /** The type of this deref instruction */ 98501e04c3fSmrg nir_deref_type deref_type; 98601e04c3fSmrg 98701e04c3fSmrg /** The mode of the underlying variable */ 98801e04c3fSmrg nir_variable_mode mode; 98901e04c3fSmrg 99001e04c3fSmrg /** The dereferenced type of the resulting pointer value */ 99101e04c3fSmrg const struct glsl_type *type; 99201e04c3fSmrg 99301e04c3fSmrg union { 99401e04c3fSmrg /** Variable being dereferenced if deref_type is a deref_var */ 99501e04c3fSmrg nir_variable *var; 99601e04c3fSmrg 99701e04c3fSmrg /** Parent deref if deref_type is not deref_var */ 99801e04c3fSmrg nir_src parent; 99901e04c3fSmrg }; 100001e04c3fSmrg 100101e04c3fSmrg /** Additional deref parameters */ 100201e04c3fSmrg union { 100301e04c3fSmrg struct { 100401e04c3fSmrg nir_src index; 100501e04c3fSmrg } arr; 100601e04c3fSmrg 100701e04c3fSmrg struct { 100801e04c3fSmrg unsigned index; 100901e04c3fSmrg } strct; 101001e04c3fSmrg }; 101101e04c3fSmrg 101201e04c3fSmrg /** Destination to store the resulting "pointer" */ 101301e04c3fSmrg nir_dest dest; 101401e04c3fSmrg} nir_deref_instr; 101501e04c3fSmrg 101601e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr, 101701e04c3fSmrg type, nir_instr_type_deref) 101801e04c3fSmrg 101901e04c3fSmrgstatic inline nir_deref_instr * 102001e04c3fSmrgnir_src_as_deref(nir_src src) 102101e04c3fSmrg{ 102201e04c3fSmrg if (!src.is_ssa) 102301e04c3fSmrg return NULL; 102401e04c3fSmrg 102501e04c3fSmrg if (src.ssa->parent_instr->type != nir_instr_type_deref) 102601e04c3fSmrg return NULL; 102701e04c3fSmrg 102801e04c3fSmrg return nir_instr_as_deref(src.ssa->parent_instr); 102901e04c3fSmrg} 103001e04c3fSmrg 103101e04c3fSmrgstatic inline nir_deref_instr * 103201e04c3fSmrgnir_deref_instr_parent(const nir_deref_instr *instr) 103301e04c3fSmrg{ 103401e04c3fSmrg if (instr->deref_type == nir_deref_type_var) 103501e04c3fSmrg return NULL; 103601e04c3fSmrg else 103701e04c3fSmrg return nir_src_as_deref(instr->parent); 103801e04c3fSmrg} 103901e04c3fSmrg 104001e04c3fSmrgstatic inline nir_variable * 104101e04c3fSmrgnir_deref_instr_get_variable(const nir_deref_instr *instr) 104201e04c3fSmrg{ 104301e04c3fSmrg while (instr->deref_type != nir_deref_type_var) { 104401e04c3fSmrg if (instr->deref_type == nir_deref_type_cast) 104501e04c3fSmrg return NULL; 104601e04c3fSmrg 104701e04c3fSmrg instr = nir_deref_instr_parent(instr); 104801e04c3fSmrg } 104901e04c3fSmrg 105001e04c3fSmrg return instr->var; 105101e04c3fSmrg} 105201e04c3fSmrg 105301e04c3fSmrgbool nir_deref_instr_has_indirect(nir_deref_instr *instr); 105401e04c3fSmrg 105501e04c3fSmrgbool nir_deref_instr_remove_if_unused(nir_deref_instr *instr); 105601e04c3fSmrg 105701e04c3fSmrgtypedef struct { 105801e04c3fSmrg nir_instr instr; 105901e04c3fSmrg 106001e04c3fSmrg struct nir_function *callee; 106101e04c3fSmrg 106201e04c3fSmrg unsigned num_params; 106301e04c3fSmrg nir_src params[]; 106401e04c3fSmrg} nir_call_instr; 106501e04c3fSmrg 106601e04c3fSmrg#include "nir_intrinsics.h" 106701e04c3fSmrg 106801e04c3fSmrg#define NIR_INTRINSIC_MAX_CONST_INDEX 4 106901e04c3fSmrg 107001e04c3fSmrg/** Represents an intrinsic 107101e04c3fSmrg * 107201e04c3fSmrg * An intrinsic is an instruction type for handling things that are 107301e04c3fSmrg * more-or-less regular operations but don't just consume and produce SSA 107401e04c3fSmrg * values like ALU operations do. Intrinsics are not for things that have 107501e04c3fSmrg * special semantic meaning such as phi nodes and parallel copies. 107601e04c3fSmrg * Examples of intrinsics include variable load/store operations, system 107701e04c3fSmrg * value loads, and the like. Even though texturing more-or-less falls 107801e04c3fSmrg * under this category, texturing is its own instruction type because 107901e04c3fSmrg * trying to represent texturing with intrinsics would lead to a 108001e04c3fSmrg * combinatorial explosion of intrinsic opcodes. 108101e04c3fSmrg * 108201e04c3fSmrg * By having a single instruction type for handling a lot of different 108301e04c3fSmrg * cases, optimization passes can look for intrinsics and, for the most 108401e04c3fSmrg * part, completely ignore them. Each intrinsic type also has a few 108501e04c3fSmrg * possible flags that govern whether or not they can be reordered or 108601e04c3fSmrg * eliminated. That way passes like dead code elimination can still work 108701e04c3fSmrg * on intrisics without understanding the meaning of each. 108801e04c3fSmrg * 108901e04c3fSmrg * Each intrinsic has some number of constant indices, some number of 109001e04c3fSmrg * variables, and some number of sources. What these sources, variables, 109101e04c3fSmrg * and indices mean depends on the intrinsic and is documented with the 109201e04c3fSmrg * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture 109301e04c3fSmrg * instructions are the only types of instruction that can operate on 109401e04c3fSmrg * variables. 109501e04c3fSmrg */ 109601e04c3fSmrgtypedef struct { 109701e04c3fSmrg nir_instr instr; 109801e04c3fSmrg 109901e04c3fSmrg nir_intrinsic_op intrinsic; 110001e04c3fSmrg 110101e04c3fSmrg nir_dest dest; 110201e04c3fSmrg 110301e04c3fSmrg /** number of components if this is a vectorized intrinsic 110401e04c3fSmrg * 110501e04c3fSmrg * Similarly to ALU operations, some intrinsics are vectorized. 110601e04c3fSmrg * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0. 110701e04c3fSmrg * For vectorized intrinsics, the num_components field specifies the 110801e04c3fSmrg * number of destination components and the number of source components 110901e04c3fSmrg * for all sources with nir_intrinsic_infos.src_components[i] == 0. 111001e04c3fSmrg */ 111101e04c3fSmrg uint8_t num_components; 111201e04c3fSmrg 111301e04c3fSmrg int const_index[NIR_INTRINSIC_MAX_CONST_INDEX]; 111401e04c3fSmrg 111501e04c3fSmrg nir_src src[]; 111601e04c3fSmrg} nir_intrinsic_instr; 111701e04c3fSmrg 111801e04c3fSmrgstatic inline nir_variable * 111901e04c3fSmrgnir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i) 112001e04c3fSmrg{ 112101e04c3fSmrg return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i])); 112201e04c3fSmrg} 112301e04c3fSmrg 112401e04c3fSmrg/** 112501e04c3fSmrg * \name NIR intrinsics semantic flags 112601e04c3fSmrg * 112701e04c3fSmrg * information about what the compiler can do with the intrinsics. 112801e04c3fSmrg * 112901e04c3fSmrg * \sa nir_intrinsic_info::flags 113001e04c3fSmrg */ 113101e04c3fSmrgtypedef enum { 113201e04c3fSmrg /** 113301e04c3fSmrg * whether the intrinsic can be safely eliminated if none of its output 113401e04c3fSmrg * value is not being used. 113501e04c3fSmrg */ 113601e04c3fSmrg NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0), 113701e04c3fSmrg 113801e04c3fSmrg /** 113901e04c3fSmrg * Whether the intrinsic can be reordered with respect to any other 114001e04c3fSmrg * intrinsic, i.e. whether the only reordering dependencies of the 114101e04c3fSmrg * intrinsic are due to the register reads/writes. 114201e04c3fSmrg */ 114301e04c3fSmrg NIR_INTRINSIC_CAN_REORDER = (1 << 1), 114401e04c3fSmrg} nir_intrinsic_semantic_flag; 114501e04c3fSmrg 114601e04c3fSmrg/** 114701e04c3fSmrg * \name NIR intrinsics const-index flag 114801e04c3fSmrg * 114901e04c3fSmrg * Indicates the usage of a const_index slot. 115001e04c3fSmrg * 115101e04c3fSmrg * \sa nir_intrinsic_info::index_map 115201e04c3fSmrg */ 115301e04c3fSmrgtypedef enum { 115401e04c3fSmrg /** 115501e04c3fSmrg * Generally instructions that take a offset src argument, can encode 115601e04c3fSmrg * a constant 'base' value which is added to the offset. 115701e04c3fSmrg */ 115801e04c3fSmrg NIR_INTRINSIC_BASE = 1, 115901e04c3fSmrg 116001e04c3fSmrg /** 116101e04c3fSmrg * For store instructions, a writemask for the store. 116201e04c3fSmrg */ 116301e04c3fSmrg NIR_INTRINSIC_WRMASK = 2, 116401e04c3fSmrg 116501e04c3fSmrg /** 116601e04c3fSmrg * The stream-id for GS emit_vertex/end_primitive intrinsics. 116701e04c3fSmrg */ 116801e04c3fSmrg NIR_INTRINSIC_STREAM_ID = 3, 116901e04c3fSmrg 117001e04c3fSmrg /** 117101e04c3fSmrg * The clip-plane id for load_user_clip_plane intrinsic. 117201e04c3fSmrg */ 117301e04c3fSmrg NIR_INTRINSIC_UCP_ID = 4, 117401e04c3fSmrg 117501e04c3fSmrg /** 117601e04c3fSmrg * The amount of data, starting from BASE, that this instruction may 117701e04c3fSmrg * access. This is used to provide bounds if the offset is not constant. 117801e04c3fSmrg */ 117901e04c3fSmrg NIR_INTRINSIC_RANGE = 5, 118001e04c3fSmrg 118101e04c3fSmrg /** 118201e04c3fSmrg * The Vulkan descriptor set for vulkan_resource_index intrinsic. 118301e04c3fSmrg */ 118401e04c3fSmrg NIR_INTRINSIC_DESC_SET = 6, 118501e04c3fSmrg 118601e04c3fSmrg /** 118701e04c3fSmrg * The Vulkan descriptor set binding for vulkan_resource_index intrinsic. 118801e04c3fSmrg */ 118901e04c3fSmrg NIR_INTRINSIC_BINDING = 7, 119001e04c3fSmrg 119101e04c3fSmrg /** 119201e04c3fSmrg * Component offset. 119301e04c3fSmrg */ 119401e04c3fSmrg NIR_INTRINSIC_COMPONENT = 8, 119501e04c3fSmrg 119601e04c3fSmrg /** 119701e04c3fSmrg * Interpolation mode (only meaningful for FS inputs). 119801e04c3fSmrg */ 119901e04c3fSmrg NIR_INTRINSIC_INTERP_MODE = 9, 120001e04c3fSmrg 120101e04c3fSmrg /** 120201e04c3fSmrg * A binary nir_op to use when performing a reduction or scan operation 120301e04c3fSmrg */ 120401e04c3fSmrg NIR_INTRINSIC_REDUCTION_OP = 10, 120501e04c3fSmrg 120601e04c3fSmrg /** 120701e04c3fSmrg * Cluster size for reduction operations 120801e04c3fSmrg */ 120901e04c3fSmrg NIR_INTRINSIC_CLUSTER_SIZE = 11, 121001e04c3fSmrg 121101e04c3fSmrg /** 121201e04c3fSmrg * Parameter index for a load_param intrinsic 121301e04c3fSmrg */ 121401e04c3fSmrg NIR_INTRINSIC_PARAM_IDX = 12, 121501e04c3fSmrg 121601e04c3fSmrg /** 121701e04c3fSmrg * Image dimensionality for image intrinsics 121801e04c3fSmrg * 121901e04c3fSmrg * One of GLSL_SAMPLER_DIM_* 122001e04c3fSmrg */ 122101e04c3fSmrg NIR_INTRINSIC_IMAGE_DIM = 13, 122201e04c3fSmrg 122301e04c3fSmrg /** 122401e04c3fSmrg * Non-zero if we are accessing an array image 122501e04c3fSmrg */ 122601e04c3fSmrg NIR_INTRINSIC_IMAGE_ARRAY = 14, 122701e04c3fSmrg 122801e04c3fSmrg /** 122901e04c3fSmrg * Image format for image intrinsics 123001e04c3fSmrg */ 123101e04c3fSmrg NIR_INTRINSIC_FORMAT = 15, 123201e04c3fSmrg 123301e04c3fSmrg /** 123401e04c3fSmrg * Access qualifiers for image intrinsics 123501e04c3fSmrg */ 123601e04c3fSmrg NIR_INTRINSIC_ACCESS = 16, 123701e04c3fSmrg 123801e04c3fSmrg NIR_INTRINSIC_NUM_INDEX_FLAGS, 123901e04c3fSmrg 124001e04c3fSmrg} nir_intrinsic_index_flag; 124101e04c3fSmrg 124201e04c3fSmrg#define NIR_INTRINSIC_MAX_INPUTS 5 124301e04c3fSmrg 124401e04c3fSmrgtypedef struct { 124501e04c3fSmrg const char *name; 124601e04c3fSmrg 124701e04c3fSmrg unsigned num_srcs; /** < number of register/SSA inputs */ 124801e04c3fSmrg 124901e04c3fSmrg /** number of components of each input register 125001e04c3fSmrg * 125101e04c3fSmrg * If this value is 0, the number of components is given by the 125201e04c3fSmrg * num_components field of nir_intrinsic_instr. 125301e04c3fSmrg */ 125401e04c3fSmrg unsigned src_components[NIR_INTRINSIC_MAX_INPUTS]; 125501e04c3fSmrg 125601e04c3fSmrg bool has_dest; 125701e04c3fSmrg 125801e04c3fSmrg /** number of components of the output register 125901e04c3fSmrg * 126001e04c3fSmrg * If this value is 0, the number of components is given by the 126101e04c3fSmrg * num_components field of nir_intrinsic_instr. 126201e04c3fSmrg */ 126301e04c3fSmrg unsigned dest_components; 126401e04c3fSmrg 126501e04c3fSmrg /** the number of constant indices used by the intrinsic */ 126601e04c3fSmrg unsigned num_indices; 126701e04c3fSmrg 126801e04c3fSmrg /** indicates the usage of intr->const_index[n] */ 126901e04c3fSmrg unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS]; 127001e04c3fSmrg 127101e04c3fSmrg /** semantic flags for calls to this intrinsic */ 127201e04c3fSmrg nir_intrinsic_semantic_flag flags; 127301e04c3fSmrg} nir_intrinsic_info; 127401e04c3fSmrg 127501e04c3fSmrgextern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics]; 127601e04c3fSmrg 127701e04c3fSmrgstatic inline unsigned 127801e04c3fSmrgnir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn) 127901e04c3fSmrg{ 128001e04c3fSmrg const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic]; 128101e04c3fSmrg assert(srcn < info->num_srcs); 128201e04c3fSmrg if (info->src_components[srcn]) 128301e04c3fSmrg return info->src_components[srcn]; 128401e04c3fSmrg else 128501e04c3fSmrg return intr->num_components; 128601e04c3fSmrg} 128701e04c3fSmrg 128801e04c3fSmrgstatic inline unsigned 128901e04c3fSmrgnir_intrinsic_dest_components(nir_intrinsic_instr *intr) 129001e04c3fSmrg{ 129101e04c3fSmrg const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic]; 129201e04c3fSmrg if (!info->has_dest) 129301e04c3fSmrg return 0; 129401e04c3fSmrg else if (info->dest_components) 129501e04c3fSmrg return info->dest_components; 129601e04c3fSmrg else 129701e04c3fSmrg return intr->num_components; 129801e04c3fSmrg} 129901e04c3fSmrg 130001e04c3fSmrg#define INTRINSIC_IDX_ACCESSORS(name, flag, type) \ 130101e04c3fSmrgstatic inline type \ 130201e04c3fSmrgnir_intrinsic_##name(const nir_intrinsic_instr *instr) \ 130301e04c3fSmrg{ \ 130401e04c3fSmrg const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \ 130501e04c3fSmrg assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \ 130601e04c3fSmrg return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \ 130701e04c3fSmrg} \ 130801e04c3fSmrgstatic inline void \ 130901e04c3fSmrgnir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \ 131001e04c3fSmrg{ \ 131101e04c3fSmrg const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \ 131201e04c3fSmrg assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \ 131301e04c3fSmrg instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \ 131401e04c3fSmrg} 131501e04c3fSmrg 131601e04c3fSmrgINTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned) 131701e04c3fSmrgINTRINSIC_IDX_ACCESSORS(base, BASE, int) 131801e04c3fSmrgINTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned) 131901e04c3fSmrgINTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned) 132001e04c3fSmrgINTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned) 132101e04c3fSmrgINTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned) 132201e04c3fSmrgINTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned) 132301e04c3fSmrgINTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned) 132401e04c3fSmrgINTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned) 132501e04c3fSmrgINTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned) 132601e04c3fSmrgINTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned) 132701e04c3fSmrgINTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned) 132801e04c3fSmrgINTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim) 132901e04c3fSmrgINTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool) 133001e04c3fSmrgINTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier) 133101e04c3fSmrgINTRINSIC_IDX_ACCESSORS(format, FORMAT, unsigned) 133201e04c3fSmrg 133301e04c3fSmrg/** 133401e04c3fSmrg * \group texture information 133501e04c3fSmrg * 133601e04c3fSmrg * This gives semantic information about textures which is useful to the 133701e04c3fSmrg * frontend, the backend, and lowering passes, but not the optimizer. 133801e04c3fSmrg */ 133901e04c3fSmrg 134001e04c3fSmrgtypedef enum { 134101e04c3fSmrg nir_tex_src_coord, 134201e04c3fSmrg nir_tex_src_projector, 134301e04c3fSmrg nir_tex_src_comparator, /* shadow comparator */ 134401e04c3fSmrg nir_tex_src_offset, 134501e04c3fSmrg nir_tex_src_bias, 134601e04c3fSmrg nir_tex_src_lod, 134701e04c3fSmrg nir_tex_src_ms_index, /* MSAA sample index */ 134801e04c3fSmrg nir_tex_src_ms_mcs, /* MSAA compression value */ 134901e04c3fSmrg nir_tex_src_ddx, 135001e04c3fSmrg nir_tex_src_ddy, 135101e04c3fSmrg nir_tex_src_texture_deref, /* < deref pointing to the texture */ 135201e04c3fSmrg nir_tex_src_sampler_deref, /* < deref pointing to the sampler */ 135301e04c3fSmrg nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */ 135401e04c3fSmrg nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */ 135501e04c3fSmrg nir_tex_src_plane, /* < selects plane for planar textures */ 135601e04c3fSmrg nir_num_tex_src_types 135701e04c3fSmrg} nir_tex_src_type; 135801e04c3fSmrg 135901e04c3fSmrgtypedef struct { 136001e04c3fSmrg nir_src src; 136101e04c3fSmrg nir_tex_src_type src_type; 136201e04c3fSmrg} nir_tex_src; 136301e04c3fSmrg 136401e04c3fSmrgtypedef enum { 136501e04c3fSmrg nir_texop_tex, /**< Regular texture look-up */ 136601e04c3fSmrg nir_texop_txb, /**< Texture look-up with LOD bias */ 136701e04c3fSmrg nir_texop_txl, /**< Texture look-up with explicit LOD */ 136801e04c3fSmrg nir_texop_txd, /**< Texture look-up with partial derivatives */ 136901e04c3fSmrg nir_texop_txf, /**< Texel fetch with explicit LOD */ 137001e04c3fSmrg nir_texop_txf_ms, /**< Multisample texture fetch */ 137101e04c3fSmrg nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */ 137201e04c3fSmrg nir_texop_txs, /**< Texture size */ 137301e04c3fSmrg nir_texop_lod, /**< Texture lod query */ 137401e04c3fSmrg nir_texop_tg4, /**< Texture gather */ 137501e04c3fSmrg nir_texop_query_levels, /**< Texture levels query */ 137601e04c3fSmrg nir_texop_texture_samples, /**< Texture samples query */ 137701e04c3fSmrg nir_texop_samples_identical, /**< Query whether all samples are definitely 137801e04c3fSmrg * identical. 137901e04c3fSmrg */ 138001e04c3fSmrg} nir_texop; 138101e04c3fSmrg 138201e04c3fSmrgtypedef struct { 138301e04c3fSmrg nir_instr instr; 138401e04c3fSmrg 138501e04c3fSmrg enum glsl_sampler_dim sampler_dim; 138601e04c3fSmrg nir_alu_type dest_type; 138701e04c3fSmrg 138801e04c3fSmrg nir_texop op; 138901e04c3fSmrg nir_dest dest; 139001e04c3fSmrg nir_tex_src *src; 139101e04c3fSmrg unsigned num_srcs, coord_components; 139201e04c3fSmrg bool is_array, is_shadow; 139301e04c3fSmrg 139401e04c3fSmrg /** 139501e04c3fSmrg * If is_shadow is true, whether this is the old-style shadow that outputs 4 139601e04c3fSmrg * components or the new-style shadow that outputs 1 component. 139701e04c3fSmrg */ 139801e04c3fSmrg bool is_new_style_shadow; 139901e04c3fSmrg 140001e04c3fSmrg /* gather component selector */ 140101e04c3fSmrg unsigned component : 2; 140201e04c3fSmrg 140301e04c3fSmrg /** The texture index 140401e04c3fSmrg * 140501e04c3fSmrg * If this texture instruction has a nir_tex_src_texture_offset source, 140601e04c3fSmrg * then the texture index is given by texture_index + texture_offset. 140701e04c3fSmrg */ 140801e04c3fSmrg unsigned texture_index; 140901e04c3fSmrg 141001e04c3fSmrg /** The size of the texture array or 0 if it's not an array */ 141101e04c3fSmrg unsigned texture_array_size; 141201e04c3fSmrg 141301e04c3fSmrg /** The sampler index 141401e04c3fSmrg * 141501e04c3fSmrg * The following operations do not require a sampler and, as such, this 141601e04c3fSmrg * field should be ignored: 141701e04c3fSmrg * - nir_texop_txf 141801e04c3fSmrg * - nir_texop_txf_ms 141901e04c3fSmrg * - nir_texop_txs 142001e04c3fSmrg * - nir_texop_lod 142101e04c3fSmrg * - nir_texop_query_levels 142201e04c3fSmrg * - nir_texop_texture_samples 142301e04c3fSmrg * - nir_texop_samples_identical 142401e04c3fSmrg * 142501e04c3fSmrg * If this texture instruction has a nir_tex_src_sampler_offset source, 142601e04c3fSmrg * then the sampler index is given by sampler_index + sampler_offset. 142701e04c3fSmrg */ 142801e04c3fSmrg unsigned sampler_index; 142901e04c3fSmrg} nir_tex_instr; 143001e04c3fSmrg 143101e04c3fSmrgstatic inline unsigned 143201e04c3fSmrgnir_tex_instr_dest_size(const nir_tex_instr *instr) 143301e04c3fSmrg{ 143401e04c3fSmrg switch (instr->op) { 143501e04c3fSmrg case nir_texop_txs: { 143601e04c3fSmrg unsigned ret; 143701e04c3fSmrg switch (instr->sampler_dim) { 143801e04c3fSmrg case GLSL_SAMPLER_DIM_1D: 143901e04c3fSmrg case GLSL_SAMPLER_DIM_BUF: 144001e04c3fSmrg ret = 1; 144101e04c3fSmrg break; 144201e04c3fSmrg case GLSL_SAMPLER_DIM_2D: 144301e04c3fSmrg case GLSL_SAMPLER_DIM_CUBE: 144401e04c3fSmrg case GLSL_SAMPLER_DIM_MS: 144501e04c3fSmrg case GLSL_SAMPLER_DIM_RECT: 144601e04c3fSmrg case GLSL_SAMPLER_DIM_EXTERNAL: 144701e04c3fSmrg case GLSL_SAMPLER_DIM_SUBPASS: 144801e04c3fSmrg ret = 2; 144901e04c3fSmrg break; 145001e04c3fSmrg case GLSL_SAMPLER_DIM_3D: 145101e04c3fSmrg ret = 3; 145201e04c3fSmrg break; 145301e04c3fSmrg default: 145401e04c3fSmrg unreachable("not reached"); 145501e04c3fSmrg } 145601e04c3fSmrg if (instr->is_array) 145701e04c3fSmrg ret++; 145801e04c3fSmrg return ret; 145901e04c3fSmrg } 146001e04c3fSmrg 146101e04c3fSmrg case nir_texop_lod: 146201e04c3fSmrg return 2; 146301e04c3fSmrg 146401e04c3fSmrg case nir_texop_texture_samples: 146501e04c3fSmrg case nir_texop_query_levels: 146601e04c3fSmrg case nir_texop_samples_identical: 146701e04c3fSmrg return 1; 146801e04c3fSmrg 146901e04c3fSmrg default: 147001e04c3fSmrg if (instr->is_shadow && instr->is_new_style_shadow) 147101e04c3fSmrg return 1; 147201e04c3fSmrg 147301e04c3fSmrg return 4; 147401e04c3fSmrg } 147501e04c3fSmrg} 147601e04c3fSmrg 147701e04c3fSmrg/* Returns true if this texture operation queries something about the texture 147801e04c3fSmrg * rather than actually sampling it. 147901e04c3fSmrg */ 148001e04c3fSmrgstatic inline bool 148101e04c3fSmrgnir_tex_instr_is_query(const nir_tex_instr *instr) 148201e04c3fSmrg{ 148301e04c3fSmrg switch (instr->op) { 148401e04c3fSmrg case nir_texop_txs: 148501e04c3fSmrg case nir_texop_lod: 148601e04c3fSmrg case nir_texop_texture_samples: 148701e04c3fSmrg case nir_texop_query_levels: 148801e04c3fSmrg case nir_texop_txf_ms_mcs: 148901e04c3fSmrg return true; 149001e04c3fSmrg case nir_texop_tex: 149101e04c3fSmrg case nir_texop_txb: 149201e04c3fSmrg case nir_texop_txl: 149301e04c3fSmrg case nir_texop_txd: 149401e04c3fSmrg case nir_texop_txf: 149501e04c3fSmrg case nir_texop_txf_ms: 149601e04c3fSmrg case nir_texop_tg4: 149701e04c3fSmrg return false; 149801e04c3fSmrg default: 149901e04c3fSmrg unreachable("Invalid texture opcode"); 150001e04c3fSmrg } 150101e04c3fSmrg} 150201e04c3fSmrg 150301e04c3fSmrgstatic inline bool 150401e04c3fSmrgnir_alu_instr_is_comparison(const nir_alu_instr *instr) 150501e04c3fSmrg{ 150601e04c3fSmrg switch (instr->op) { 150701e04c3fSmrg case nir_op_flt: 150801e04c3fSmrg case nir_op_fge: 150901e04c3fSmrg case nir_op_feq: 151001e04c3fSmrg case nir_op_fne: 151101e04c3fSmrg case nir_op_ilt: 151201e04c3fSmrg case nir_op_ult: 151301e04c3fSmrg case nir_op_ige: 151401e04c3fSmrg case nir_op_uge: 151501e04c3fSmrg case nir_op_ieq: 151601e04c3fSmrg case nir_op_ine: 151701e04c3fSmrg case nir_op_i2b: 151801e04c3fSmrg case nir_op_f2b: 151901e04c3fSmrg case nir_op_inot: 152001e04c3fSmrg case nir_op_fnot: 152101e04c3fSmrg return true; 152201e04c3fSmrg default: 152301e04c3fSmrg return false; 152401e04c3fSmrg } 152501e04c3fSmrg} 152601e04c3fSmrg 152701e04c3fSmrgstatic inline nir_alu_type 152801e04c3fSmrgnir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src) 152901e04c3fSmrg{ 153001e04c3fSmrg switch (instr->src[src].src_type) { 153101e04c3fSmrg case nir_tex_src_coord: 153201e04c3fSmrg switch (instr->op) { 153301e04c3fSmrg case nir_texop_txf: 153401e04c3fSmrg case nir_texop_txf_ms: 153501e04c3fSmrg case nir_texop_txf_ms_mcs: 153601e04c3fSmrg case nir_texop_samples_identical: 153701e04c3fSmrg return nir_type_int; 153801e04c3fSmrg 153901e04c3fSmrg default: 154001e04c3fSmrg return nir_type_float; 154101e04c3fSmrg } 154201e04c3fSmrg 154301e04c3fSmrg case nir_tex_src_lod: 154401e04c3fSmrg switch (instr->op) { 154501e04c3fSmrg case nir_texop_txs: 154601e04c3fSmrg case nir_texop_txf: 154701e04c3fSmrg return nir_type_int; 154801e04c3fSmrg 154901e04c3fSmrg default: 155001e04c3fSmrg return nir_type_float; 155101e04c3fSmrg } 155201e04c3fSmrg 155301e04c3fSmrg case nir_tex_src_projector: 155401e04c3fSmrg case nir_tex_src_comparator: 155501e04c3fSmrg case nir_tex_src_bias: 155601e04c3fSmrg case nir_tex_src_ddx: 155701e04c3fSmrg case nir_tex_src_ddy: 155801e04c3fSmrg return nir_type_float; 155901e04c3fSmrg 156001e04c3fSmrg case nir_tex_src_offset: 156101e04c3fSmrg case nir_tex_src_ms_index: 156201e04c3fSmrg case nir_tex_src_texture_offset: 156301e04c3fSmrg case nir_tex_src_sampler_offset: 156401e04c3fSmrg return nir_type_int; 156501e04c3fSmrg 156601e04c3fSmrg default: 156701e04c3fSmrg unreachable("Invalid texture source type"); 156801e04c3fSmrg } 156901e04c3fSmrg} 157001e04c3fSmrg 157101e04c3fSmrgstatic inline unsigned 157201e04c3fSmrgnir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src) 157301e04c3fSmrg{ 157401e04c3fSmrg if (instr->src[src].src_type == nir_tex_src_coord) 157501e04c3fSmrg return instr->coord_components; 157601e04c3fSmrg 157701e04c3fSmrg /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */ 157801e04c3fSmrg if (instr->src[src].src_type == nir_tex_src_ms_mcs) 157901e04c3fSmrg return 4; 158001e04c3fSmrg 158101e04c3fSmrg if (instr->src[src].src_type == nir_tex_src_ddx || 158201e04c3fSmrg instr->src[src].src_type == nir_tex_src_ddy) { 158301e04c3fSmrg if (instr->is_array) 158401e04c3fSmrg return instr->coord_components - 1; 158501e04c3fSmrg else 158601e04c3fSmrg return instr->coord_components; 158701e04c3fSmrg } 158801e04c3fSmrg 158901e04c3fSmrg /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for 159001e04c3fSmrg * the offset, since a cube maps to a single face. 159101e04c3fSmrg */ 159201e04c3fSmrg if (instr->src[src].src_type == nir_tex_src_offset) { 159301e04c3fSmrg if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) 159401e04c3fSmrg return 2; 159501e04c3fSmrg else if (instr->is_array) 159601e04c3fSmrg return instr->coord_components - 1; 159701e04c3fSmrg else 159801e04c3fSmrg return instr->coord_components; 159901e04c3fSmrg } 160001e04c3fSmrg 160101e04c3fSmrg return 1; 160201e04c3fSmrg} 160301e04c3fSmrg 160401e04c3fSmrgstatic inline int 160501e04c3fSmrgnir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type) 160601e04c3fSmrg{ 160701e04c3fSmrg for (unsigned i = 0; i < instr->num_srcs; i++) 160801e04c3fSmrg if (instr->src[i].src_type == type) 160901e04c3fSmrg return (int) i; 161001e04c3fSmrg 161101e04c3fSmrg return -1; 161201e04c3fSmrg} 161301e04c3fSmrg 161401e04c3fSmrgvoid nir_tex_instr_add_src(nir_tex_instr *tex, 161501e04c3fSmrg nir_tex_src_type src_type, 161601e04c3fSmrg nir_src src); 161701e04c3fSmrg 161801e04c3fSmrgvoid nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx); 161901e04c3fSmrg 162001e04c3fSmrgtypedef struct { 162101e04c3fSmrg nir_instr instr; 162201e04c3fSmrg 162301e04c3fSmrg nir_const_value value; 162401e04c3fSmrg 162501e04c3fSmrg nir_ssa_def def; 162601e04c3fSmrg} nir_load_const_instr; 162701e04c3fSmrg 162801e04c3fSmrgtypedef enum { 162901e04c3fSmrg nir_jump_return, 163001e04c3fSmrg nir_jump_break, 163101e04c3fSmrg nir_jump_continue, 163201e04c3fSmrg} nir_jump_type; 163301e04c3fSmrg 163401e04c3fSmrgtypedef struct { 163501e04c3fSmrg nir_instr instr; 163601e04c3fSmrg nir_jump_type type; 163701e04c3fSmrg} nir_jump_instr; 163801e04c3fSmrg 163901e04c3fSmrg/* creates a new SSA variable in an undefined state */ 164001e04c3fSmrg 164101e04c3fSmrgtypedef struct { 164201e04c3fSmrg nir_instr instr; 164301e04c3fSmrg nir_ssa_def def; 164401e04c3fSmrg} nir_ssa_undef_instr; 164501e04c3fSmrg 164601e04c3fSmrgtypedef struct { 164701e04c3fSmrg struct exec_node node; 164801e04c3fSmrg 164901e04c3fSmrg /* The predecessor block corresponding to this source */ 165001e04c3fSmrg struct nir_block *pred; 165101e04c3fSmrg 165201e04c3fSmrg nir_src src; 165301e04c3fSmrg} nir_phi_src; 165401e04c3fSmrg 165501e04c3fSmrg#define nir_foreach_phi_src(phi_src, phi) \ 165601e04c3fSmrg foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs) 165701e04c3fSmrg#define nir_foreach_phi_src_safe(phi_src, phi) \ 165801e04c3fSmrg foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs) 165901e04c3fSmrg 166001e04c3fSmrgtypedef struct { 166101e04c3fSmrg nir_instr instr; 166201e04c3fSmrg 166301e04c3fSmrg struct exec_list srcs; /** < list of nir_phi_src */ 166401e04c3fSmrg 166501e04c3fSmrg nir_dest dest; 166601e04c3fSmrg} nir_phi_instr; 166701e04c3fSmrg 166801e04c3fSmrgtypedef struct { 166901e04c3fSmrg struct exec_node node; 167001e04c3fSmrg nir_src src; 167101e04c3fSmrg nir_dest dest; 167201e04c3fSmrg} nir_parallel_copy_entry; 167301e04c3fSmrg 167401e04c3fSmrg#define nir_foreach_parallel_copy_entry(entry, pcopy) \ 167501e04c3fSmrg foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries) 167601e04c3fSmrg 167701e04c3fSmrgtypedef struct { 167801e04c3fSmrg nir_instr instr; 167901e04c3fSmrg 168001e04c3fSmrg /* A list of nir_parallel_copy_entrys. The sources of all of the 168101e04c3fSmrg * entries are copied to the corresponding destinations "in parallel". 168201e04c3fSmrg * In other words, if we have two entries: a -> b and b -> a, the values 168301e04c3fSmrg * get swapped. 168401e04c3fSmrg */ 168501e04c3fSmrg struct exec_list entries; 168601e04c3fSmrg} nir_parallel_copy_instr; 168701e04c3fSmrg 168801e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr, 168901e04c3fSmrg type, nir_instr_type_alu) 169001e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr, 169101e04c3fSmrg type, nir_instr_type_call) 169201e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr, 169301e04c3fSmrg type, nir_instr_type_jump) 169401e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr, 169501e04c3fSmrg type, nir_instr_type_tex) 169601e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr, 169701e04c3fSmrg type, nir_instr_type_intrinsic) 169801e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr, 169901e04c3fSmrg type, nir_instr_type_load_const) 170001e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr, 170101e04c3fSmrg type, nir_instr_type_ssa_undef) 170201e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr, 170301e04c3fSmrg type, nir_instr_type_phi) 170401e04c3fSmrgNIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr, 170501e04c3fSmrg nir_parallel_copy_instr, instr, 170601e04c3fSmrg type, nir_instr_type_parallel_copy) 170701e04c3fSmrg 170801e04c3fSmrg/* 170901e04c3fSmrg * Control flow 171001e04c3fSmrg * 171101e04c3fSmrg * Control flow consists of a tree of control flow nodes, which include 171201e04c3fSmrg * if-statements and loops. The leaves of the tree are basic blocks, lists of 171301e04c3fSmrg * instructions that always run start-to-finish. Each basic block also keeps 171401e04c3fSmrg * track of its successors (blocks which may run immediately after the current 171501e04c3fSmrg * block) and predecessors (blocks which could have run immediately before the 171601e04c3fSmrg * current block). Each function also has a start block and an end block which 171701e04c3fSmrg * all return statements point to (which is always empty). Together, all the 171801e04c3fSmrg * blocks with their predecessors and successors make up the control flow 171901e04c3fSmrg * graph (CFG) of the function. There are helpers that modify the tree of 172001e04c3fSmrg * control flow nodes while modifying the CFG appropriately; these should be 172101e04c3fSmrg * used instead of modifying the tree directly. 172201e04c3fSmrg */ 172301e04c3fSmrg 172401e04c3fSmrgtypedef enum { 172501e04c3fSmrg nir_cf_node_block, 172601e04c3fSmrg nir_cf_node_if, 172701e04c3fSmrg nir_cf_node_loop, 172801e04c3fSmrg nir_cf_node_function 172901e04c3fSmrg} nir_cf_node_type; 173001e04c3fSmrg 173101e04c3fSmrgtypedef struct nir_cf_node { 173201e04c3fSmrg struct exec_node node; 173301e04c3fSmrg nir_cf_node_type type; 173401e04c3fSmrg struct nir_cf_node *parent; 173501e04c3fSmrg} nir_cf_node; 173601e04c3fSmrg 173701e04c3fSmrgtypedef struct nir_block { 173801e04c3fSmrg nir_cf_node cf_node; 173901e04c3fSmrg 174001e04c3fSmrg struct exec_list instr_list; /** < list of nir_instr */ 174101e04c3fSmrg 174201e04c3fSmrg /** generic block index; generated by nir_index_blocks */ 174301e04c3fSmrg unsigned index; 174401e04c3fSmrg 174501e04c3fSmrg /* 174601e04c3fSmrg * Each block can only have up to 2 successors, so we put them in a simple 174701e04c3fSmrg * array - no need for anything more complicated. 174801e04c3fSmrg */ 174901e04c3fSmrg struct nir_block *successors[2]; 175001e04c3fSmrg 175101e04c3fSmrg /* Set of nir_block predecessors in the CFG */ 175201e04c3fSmrg struct set *predecessors; 175301e04c3fSmrg 175401e04c3fSmrg /* 175501e04c3fSmrg * this node's immediate dominator in the dominance tree - set to NULL for 175601e04c3fSmrg * the start block. 175701e04c3fSmrg */ 175801e04c3fSmrg struct nir_block *imm_dom; 175901e04c3fSmrg 176001e04c3fSmrg /* This node's children in the dominance tree */ 176101e04c3fSmrg unsigned num_dom_children; 176201e04c3fSmrg struct nir_block **dom_children; 176301e04c3fSmrg 176401e04c3fSmrg /* Set of nir_blocks on the dominance frontier of this block */ 176501e04c3fSmrg struct set *dom_frontier; 176601e04c3fSmrg 176701e04c3fSmrg /* 176801e04c3fSmrg * These two indices have the property that dom_{pre,post}_index for each 176901e04c3fSmrg * child of this block in the dominance tree will always be between 177001e04c3fSmrg * dom_pre_index and dom_post_index for this block, which makes testing if 177101e04c3fSmrg * a given block is dominated by another block an O(1) operation. 177201e04c3fSmrg */ 177301e04c3fSmrg unsigned dom_pre_index, dom_post_index; 177401e04c3fSmrg 177501e04c3fSmrg /* live in and out for this block; used for liveness analysis */ 177601e04c3fSmrg BITSET_WORD *live_in; 177701e04c3fSmrg BITSET_WORD *live_out; 177801e04c3fSmrg} nir_block; 177901e04c3fSmrg 178001e04c3fSmrgstatic inline nir_instr * 178101e04c3fSmrgnir_block_first_instr(nir_block *block) 178201e04c3fSmrg{ 178301e04c3fSmrg struct exec_node *head = exec_list_get_head(&block->instr_list); 178401e04c3fSmrg return exec_node_data(nir_instr, head, node); 178501e04c3fSmrg} 178601e04c3fSmrg 178701e04c3fSmrgstatic inline nir_instr * 178801e04c3fSmrgnir_block_last_instr(nir_block *block) 178901e04c3fSmrg{ 179001e04c3fSmrg struct exec_node *tail = exec_list_get_tail(&block->instr_list); 179101e04c3fSmrg return exec_node_data(nir_instr, tail, node); 179201e04c3fSmrg} 179301e04c3fSmrg 179401e04c3fSmrgstatic inline bool 179501e04c3fSmrgnir_block_ends_in_jump(nir_block *block) 179601e04c3fSmrg{ 179701e04c3fSmrg return !exec_list_is_empty(&block->instr_list) && 179801e04c3fSmrg nir_block_last_instr(block)->type == nir_instr_type_jump; 179901e04c3fSmrg} 180001e04c3fSmrg 180101e04c3fSmrg#define nir_foreach_instr(instr, block) \ 180201e04c3fSmrg foreach_list_typed(nir_instr, instr, node, &(block)->instr_list) 180301e04c3fSmrg#define nir_foreach_instr_reverse(instr, block) \ 180401e04c3fSmrg foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list) 180501e04c3fSmrg#define nir_foreach_instr_safe(instr, block) \ 180601e04c3fSmrg foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list) 180701e04c3fSmrg#define nir_foreach_instr_reverse_safe(instr, block) \ 180801e04c3fSmrg foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list) 180901e04c3fSmrg 181001e04c3fSmrgtypedef struct nir_if { 181101e04c3fSmrg nir_cf_node cf_node; 181201e04c3fSmrg nir_src condition; 181301e04c3fSmrg 181401e04c3fSmrg struct exec_list then_list; /** < list of nir_cf_node */ 181501e04c3fSmrg struct exec_list else_list; /** < list of nir_cf_node */ 181601e04c3fSmrg} nir_if; 181701e04c3fSmrg 181801e04c3fSmrgtypedef struct { 181901e04c3fSmrg nir_if *nif; 182001e04c3fSmrg 182101e04c3fSmrg nir_instr *conditional_instr; 182201e04c3fSmrg 182301e04c3fSmrg nir_block *break_block; 182401e04c3fSmrg nir_block *continue_from_block; 182501e04c3fSmrg 182601e04c3fSmrg bool continue_from_then; 182701e04c3fSmrg 182801e04c3fSmrg struct list_head loop_terminator_link; 182901e04c3fSmrg} nir_loop_terminator; 183001e04c3fSmrg 183101e04c3fSmrgtypedef struct { 183201e04c3fSmrg /* Number of instructions in the loop */ 183301e04c3fSmrg unsigned num_instructions; 183401e04c3fSmrg 183501e04c3fSmrg /* How many times the loop is run (if known) */ 183601e04c3fSmrg unsigned trip_count; 183701e04c3fSmrg bool is_trip_count_known; 183801e04c3fSmrg 183901e04c3fSmrg /* Unroll the loop regardless of its size */ 184001e04c3fSmrg bool force_unroll; 184101e04c3fSmrg 184201e04c3fSmrg /* Does the loop contain complex loop terminators, continues or other 184301e04c3fSmrg * complex behaviours? If this is true we can't rely on 184401e04c3fSmrg * loop_terminator_list to be complete or accurate. 184501e04c3fSmrg */ 184601e04c3fSmrg bool complex_loop; 184701e04c3fSmrg 184801e04c3fSmrg nir_loop_terminator *limiting_terminator; 184901e04c3fSmrg 185001e04c3fSmrg /* A list of loop_terminators terminating this loop. */ 185101e04c3fSmrg struct list_head loop_terminator_list; 185201e04c3fSmrg} nir_loop_info; 185301e04c3fSmrg 185401e04c3fSmrgtypedef struct { 185501e04c3fSmrg nir_cf_node cf_node; 185601e04c3fSmrg 185701e04c3fSmrg struct exec_list body; /** < list of nir_cf_node */ 185801e04c3fSmrg 185901e04c3fSmrg nir_loop_info *info; 186001e04c3fSmrg} nir_loop; 186101e04c3fSmrg 186201e04c3fSmrg/** 186301e04c3fSmrg * Various bits of metadata that can may be created or required by 186401e04c3fSmrg * optimization and analysis passes 186501e04c3fSmrg */ 186601e04c3fSmrgtypedef enum { 186701e04c3fSmrg nir_metadata_none = 0x0, 186801e04c3fSmrg nir_metadata_block_index = 0x1, 186901e04c3fSmrg nir_metadata_dominance = 0x2, 187001e04c3fSmrg nir_metadata_live_ssa_defs = 0x4, 187101e04c3fSmrg nir_metadata_not_properly_reset = 0x8, 187201e04c3fSmrg nir_metadata_loop_analysis = 0x10, 187301e04c3fSmrg} nir_metadata; 187401e04c3fSmrg 187501e04c3fSmrgtypedef struct { 187601e04c3fSmrg nir_cf_node cf_node; 187701e04c3fSmrg 187801e04c3fSmrg /** pointer to the function of which this is an implementation */ 187901e04c3fSmrg struct nir_function *function; 188001e04c3fSmrg 188101e04c3fSmrg struct exec_list body; /** < list of nir_cf_node */ 188201e04c3fSmrg 188301e04c3fSmrg nir_block *end_block; 188401e04c3fSmrg 188501e04c3fSmrg /** list for all local variables in the function */ 188601e04c3fSmrg struct exec_list locals; 188701e04c3fSmrg 188801e04c3fSmrg /** list of local registers in the function */ 188901e04c3fSmrg struct exec_list registers; 189001e04c3fSmrg 189101e04c3fSmrg /** next available local register index */ 189201e04c3fSmrg unsigned reg_alloc; 189301e04c3fSmrg 189401e04c3fSmrg /** next available SSA value index */ 189501e04c3fSmrg unsigned ssa_alloc; 189601e04c3fSmrg 189701e04c3fSmrg /* total number of basic blocks, only valid when block_index_dirty = false */ 189801e04c3fSmrg unsigned num_blocks; 189901e04c3fSmrg 190001e04c3fSmrg nir_metadata valid_metadata; 190101e04c3fSmrg} nir_function_impl; 190201e04c3fSmrg 190301e04c3fSmrgATTRIBUTE_RETURNS_NONNULL static inline nir_block * 190401e04c3fSmrgnir_start_block(nir_function_impl *impl) 190501e04c3fSmrg{ 190601e04c3fSmrg return (nir_block *) impl->body.head_sentinel.next; 190701e04c3fSmrg} 190801e04c3fSmrg 190901e04c3fSmrgATTRIBUTE_RETURNS_NONNULL static inline nir_block * 191001e04c3fSmrgnir_impl_last_block(nir_function_impl *impl) 191101e04c3fSmrg{ 191201e04c3fSmrg return (nir_block *) impl->body.tail_sentinel.prev; 191301e04c3fSmrg} 191401e04c3fSmrg 191501e04c3fSmrgstatic inline nir_cf_node * 191601e04c3fSmrgnir_cf_node_next(nir_cf_node *node) 191701e04c3fSmrg{ 191801e04c3fSmrg struct exec_node *next = exec_node_get_next(&node->node); 191901e04c3fSmrg if (exec_node_is_tail_sentinel(next)) 192001e04c3fSmrg return NULL; 192101e04c3fSmrg else 192201e04c3fSmrg return exec_node_data(nir_cf_node, next, node); 192301e04c3fSmrg} 192401e04c3fSmrg 192501e04c3fSmrgstatic inline nir_cf_node * 192601e04c3fSmrgnir_cf_node_prev(nir_cf_node *node) 192701e04c3fSmrg{ 192801e04c3fSmrg struct exec_node *prev = exec_node_get_prev(&node->node); 192901e04c3fSmrg if (exec_node_is_head_sentinel(prev)) 193001e04c3fSmrg return NULL; 193101e04c3fSmrg else 193201e04c3fSmrg return exec_node_data(nir_cf_node, prev, node); 193301e04c3fSmrg} 193401e04c3fSmrg 193501e04c3fSmrgstatic inline bool 193601e04c3fSmrgnir_cf_node_is_first(const nir_cf_node *node) 193701e04c3fSmrg{ 193801e04c3fSmrg return exec_node_is_head_sentinel(node->node.prev); 193901e04c3fSmrg} 194001e04c3fSmrg 194101e04c3fSmrgstatic inline bool 194201e04c3fSmrgnir_cf_node_is_last(const nir_cf_node *node) 194301e04c3fSmrg{ 194401e04c3fSmrg return exec_node_is_tail_sentinel(node->node.next); 194501e04c3fSmrg} 194601e04c3fSmrg 194701e04c3fSmrgNIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node, 194801e04c3fSmrg type, nir_cf_node_block) 194901e04c3fSmrgNIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node, 195001e04c3fSmrg type, nir_cf_node_if) 195101e04c3fSmrgNIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node, 195201e04c3fSmrg type, nir_cf_node_loop) 195301e04c3fSmrgNIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node, 195401e04c3fSmrg nir_function_impl, cf_node, type, nir_cf_node_function) 195501e04c3fSmrg 195601e04c3fSmrgstatic inline nir_block * 195701e04c3fSmrgnir_if_first_then_block(nir_if *if_stmt) 195801e04c3fSmrg{ 195901e04c3fSmrg struct exec_node *head = exec_list_get_head(&if_stmt->then_list); 196001e04c3fSmrg return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node)); 196101e04c3fSmrg} 196201e04c3fSmrg 196301e04c3fSmrgstatic inline nir_block * 196401e04c3fSmrgnir_if_last_then_block(nir_if *if_stmt) 196501e04c3fSmrg{ 196601e04c3fSmrg struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list); 196701e04c3fSmrg return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node)); 196801e04c3fSmrg} 196901e04c3fSmrg 197001e04c3fSmrgstatic inline nir_block * 197101e04c3fSmrgnir_if_first_else_block(nir_if *if_stmt) 197201e04c3fSmrg{ 197301e04c3fSmrg struct exec_node *head = exec_list_get_head(&if_stmt->else_list); 197401e04c3fSmrg return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node)); 197501e04c3fSmrg} 197601e04c3fSmrg 197701e04c3fSmrgstatic inline nir_block * 197801e04c3fSmrgnir_if_last_else_block(nir_if *if_stmt) 197901e04c3fSmrg{ 198001e04c3fSmrg struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list); 198101e04c3fSmrg return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node)); 198201e04c3fSmrg} 198301e04c3fSmrg 198401e04c3fSmrgstatic inline nir_block * 198501e04c3fSmrgnir_loop_first_block(nir_loop *loop) 198601e04c3fSmrg{ 198701e04c3fSmrg struct exec_node *head = exec_list_get_head(&loop->body); 198801e04c3fSmrg return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node)); 198901e04c3fSmrg} 199001e04c3fSmrg 199101e04c3fSmrgstatic inline nir_block * 199201e04c3fSmrgnir_loop_last_block(nir_loop *loop) 199301e04c3fSmrg{ 199401e04c3fSmrg struct exec_node *tail = exec_list_get_tail(&loop->body); 199501e04c3fSmrg return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node)); 199601e04c3fSmrg} 199701e04c3fSmrg 199801e04c3fSmrgtypedef struct { 199901e04c3fSmrg uint8_t num_components; 200001e04c3fSmrg uint8_t bit_size; 200101e04c3fSmrg} nir_parameter; 200201e04c3fSmrg 200301e04c3fSmrgtypedef struct nir_function { 200401e04c3fSmrg struct exec_node node; 200501e04c3fSmrg 200601e04c3fSmrg const char *name; 200701e04c3fSmrg struct nir_shader *shader; 200801e04c3fSmrg 200901e04c3fSmrg unsigned num_params; 201001e04c3fSmrg nir_parameter *params; 201101e04c3fSmrg 201201e04c3fSmrg /** The implementation of this function. 201301e04c3fSmrg * 201401e04c3fSmrg * If the function is only declared and not implemented, this is NULL. 201501e04c3fSmrg */ 201601e04c3fSmrg nir_function_impl *impl; 201701e04c3fSmrg} nir_function; 201801e04c3fSmrg 201901e04c3fSmrgtypedef struct nir_shader_compiler_options { 202001e04c3fSmrg bool lower_fdiv; 202101e04c3fSmrg bool lower_ffma; 202201e04c3fSmrg bool fuse_ffma; 202301e04c3fSmrg bool lower_flrp32; 202401e04c3fSmrg /** Lowers flrp when it does not support doubles */ 202501e04c3fSmrg bool lower_flrp64; 202601e04c3fSmrg bool lower_fpow; 202701e04c3fSmrg bool lower_fsat; 202801e04c3fSmrg bool lower_fsqrt; 202901e04c3fSmrg bool lower_fmod32; 203001e04c3fSmrg bool lower_fmod64; 203101e04c3fSmrg /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */ 203201e04c3fSmrg bool lower_bitfield_extract; 203301e04c3fSmrg /** Lowers ibitfield_extract/ubitfield_extract to bfm, compares, shifts. */ 203401e04c3fSmrg bool lower_bitfield_extract_to_shifts; 203501e04c3fSmrg /** Lowers bitfield_insert to bfi/bfm */ 203601e04c3fSmrg bool lower_bitfield_insert; 203701e04c3fSmrg /** Lowers bitfield_insert to bfm, compares, and shifts. */ 203801e04c3fSmrg bool lower_bitfield_insert_to_shifts; 203901e04c3fSmrg /** Lowers bitfield_reverse to shifts. */ 204001e04c3fSmrg bool lower_bitfield_reverse; 204101e04c3fSmrg /** Lowers bit_count to shifts. */ 204201e04c3fSmrg bool lower_bit_count; 204301e04c3fSmrg /** Lowers bfm to shifts and subtracts. */ 204401e04c3fSmrg bool lower_bfm; 204501e04c3fSmrg /** Lowers ifind_msb to compare and ufind_msb */ 204601e04c3fSmrg bool lower_ifind_msb; 204701e04c3fSmrg /** Lowers find_lsb to ufind_msb and logic ops */ 204801e04c3fSmrg bool lower_find_lsb; 204901e04c3fSmrg bool lower_uadd_carry; 205001e04c3fSmrg bool lower_usub_borrow; 205101e04c3fSmrg /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */ 205201e04c3fSmrg bool lower_mul_high; 205301e04c3fSmrg /** lowers fneg and ineg to fsub and isub. */ 205401e04c3fSmrg bool lower_negate; 205501e04c3fSmrg /** lowers fsub and isub to fadd+fneg and iadd+ineg. */ 205601e04c3fSmrg bool lower_sub; 205701e04c3fSmrg 205801e04c3fSmrg /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */ 205901e04c3fSmrg bool lower_scmp; 206001e04c3fSmrg 206101e04c3fSmrg /** enables rules to lower idiv by power-of-two: */ 206201e04c3fSmrg bool lower_idiv; 206301e04c3fSmrg 206401e04c3fSmrg /* lower b2f to iand */ 206501e04c3fSmrg bool lower_b2f; 206601e04c3fSmrg 206701e04c3fSmrg /* Does the native fdot instruction replicate its result for four 206801e04c3fSmrg * components? If so, then opt_algebraic_late will turn all fdotN 206901e04c3fSmrg * instructions into fdot_replicatedN instructions. 207001e04c3fSmrg */ 207101e04c3fSmrg bool fdot_replicates; 207201e04c3fSmrg 207301e04c3fSmrg /** lowers ffract to fsub+ffloor: */ 207401e04c3fSmrg bool lower_ffract; 207501e04c3fSmrg 207601e04c3fSmrg bool lower_ldexp; 207701e04c3fSmrg 207801e04c3fSmrg bool lower_pack_half_2x16; 207901e04c3fSmrg bool lower_pack_unorm_2x16; 208001e04c3fSmrg bool lower_pack_snorm_2x16; 208101e04c3fSmrg bool lower_pack_unorm_4x8; 208201e04c3fSmrg bool lower_pack_snorm_4x8; 208301e04c3fSmrg bool lower_unpack_half_2x16; 208401e04c3fSmrg bool lower_unpack_unorm_2x16; 208501e04c3fSmrg bool lower_unpack_snorm_2x16; 208601e04c3fSmrg bool lower_unpack_unorm_4x8; 208701e04c3fSmrg bool lower_unpack_snorm_4x8; 208801e04c3fSmrg 208901e04c3fSmrg bool lower_extract_byte; 209001e04c3fSmrg bool lower_extract_word; 209101e04c3fSmrg 209201e04c3fSmrg bool lower_all_io_to_temps; 209301e04c3fSmrg 209401e04c3fSmrg /** 209501e04c3fSmrg * Does the driver support real 32-bit integers? (Otherwise, integers 209601e04c3fSmrg * are simulated by floats.) 209701e04c3fSmrg */ 209801e04c3fSmrg bool native_integers; 209901e04c3fSmrg 210001e04c3fSmrg /* Indicates that the driver only has zero-based vertex id */ 210101e04c3fSmrg bool vertex_id_zero_based; 210201e04c3fSmrg 210301e04c3fSmrg /** 210401e04c3fSmrg * If enabled, gl_BaseVertex will be lowered as: 210501e04c3fSmrg * is_indexed_draw (~0/0) & firstvertex 210601e04c3fSmrg */ 210701e04c3fSmrg bool lower_base_vertex; 210801e04c3fSmrg 210901e04c3fSmrg /** 211001e04c3fSmrg * If enabled, gl_HelperInvocation will be lowered as: 211101e04c3fSmrg * 211201e04c3fSmrg * !((1 << sample_id) & sample_mask_in)) 211301e04c3fSmrg * 211401e04c3fSmrg * This depends on some possibly hw implementation details, which may 211501e04c3fSmrg * not be true for all hw. In particular that the FS is only executed 211601e04c3fSmrg * for covered samples or for helper invocations. So, do not blindly 211701e04c3fSmrg * enable this option. 211801e04c3fSmrg * 211901e04c3fSmrg * Note: See also issue #22 in ARB_shader_image_load_store 212001e04c3fSmrg */ 212101e04c3fSmrg bool lower_helper_invocation; 212201e04c3fSmrg 212301e04c3fSmrg bool lower_cs_local_index_from_id; 212401e04c3fSmrg 212501e04c3fSmrg bool lower_device_index_to_zero; 212601e04c3fSmrg 212701e04c3fSmrg /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */ 212801e04c3fSmrg bool lower_wpos_pntc; 212901e04c3fSmrg 213001e04c3fSmrg /** 213101e04c3fSmrg * Should nir_lower_io() create load_interpolated_input intrinsics? 213201e04c3fSmrg * 213301e04c3fSmrg * If not, it generates regular load_input intrinsics and interpolation 213401e04c3fSmrg * information must be inferred from the list of input nir_variables. 213501e04c3fSmrg */ 213601e04c3fSmrg bool use_interpolated_input_intrinsics; 213701e04c3fSmrg 213801e04c3fSmrg unsigned max_unroll_iterations; 213901e04c3fSmrg} nir_shader_compiler_options; 214001e04c3fSmrg 214101e04c3fSmrgtypedef struct nir_shader { 214201e04c3fSmrg /** list of uniforms (nir_variable) */ 214301e04c3fSmrg struct exec_list uniforms; 214401e04c3fSmrg 214501e04c3fSmrg /** list of inputs (nir_variable) */ 214601e04c3fSmrg struct exec_list inputs; 214701e04c3fSmrg 214801e04c3fSmrg /** list of outputs (nir_variable) */ 214901e04c3fSmrg struct exec_list outputs; 215001e04c3fSmrg 215101e04c3fSmrg /** list of shared compute variables (nir_variable) */ 215201e04c3fSmrg struct exec_list shared; 215301e04c3fSmrg 215401e04c3fSmrg /** Set of driver-specific options for the shader. 215501e04c3fSmrg * 215601e04c3fSmrg * The memory for the options is expected to be kept in a single static 215701e04c3fSmrg * copy by the driver. 215801e04c3fSmrg */ 215901e04c3fSmrg const struct nir_shader_compiler_options *options; 216001e04c3fSmrg 216101e04c3fSmrg /** Various bits of compile-time information about a given shader */ 216201e04c3fSmrg struct shader_info info; 216301e04c3fSmrg 216401e04c3fSmrg /** list of global variables in the shader (nir_variable) */ 216501e04c3fSmrg struct exec_list globals; 216601e04c3fSmrg 216701e04c3fSmrg /** list of system value variables in the shader (nir_variable) */ 216801e04c3fSmrg struct exec_list system_values; 216901e04c3fSmrg 217001e04c3fSmrg struct exec_list functions; /** < list of nir_function */ 217101e04c3fSmrg 217201e04c3fSmrg /** list of global register in the shader */ 217301e04c3fSmrg struct exec_list registers; 217401e04c3fSmrg 217501e04c3fSmrg /** next available global register index */ 217601e04c3fSmrg unsigned reg_alloc; 217701e04c3fSmrg 217801e04c3fSmrg /** 217901e04c3fSmrg * the highest index a load_input_*, load_uniform_*, etc. intrinsic can 218001e04c3fSmrg * access plus one 218101e04c3fSmrg */ 218201e04c3fSmrg unsigned num_inputs, num_uniforms, num_outputs, num_shared; 218301e04c3fSmrg 218401e04c3fSmrg /** Constant data associated with this shader. 218501e04c3fSmrg * 218601e04c3fSmrg * Constant data is loaded through load_constant intrinsics. See also 218701e04c3fSmrg * nir_opt_large_constants. 218801e04c3fSmrg */ 218901e04c3fSmrg void *constant_data; 219001e04c3fSmrg unsigned constant_data_size; 219101e04c3fSmrg} nir_shader; 219201e04c3fSmrg 219301e04c3fSmrgstatic inline nir_function_impl * 219401e04c3fSmrgnir_shader_get_entrypoint(nir_shader *shader) 219501e04c3fSmrg{ 219601e04c3fSmrg assert(exec_list_length(&shader->functions) == 1); 219701e04c3fSmrg struct exec_node *func_node = exec_list_get_head(&shader->functions); 219801e04c3fSmrg nir_function *func = exec_node_data(nir_function, func_node, node); 219901e04c3fSmrg assert(func->num_params == 0); 220001e04c3fSmrg assert(func->impl); 220101e04c3fSmrg return func->impl; 220201e04c3fSmrg} 220301e04c3fSmrg 220401e04c3fSmrg#define nir_foreach_function(func, shader) \ 220501e04c3fSmrg foreach_list_typed(nir_function, func, node, &(shader)->functions) 220601e04c3fSmrg 220701e04c3fSmrgnir_shader *nir_shader_create(void *mem_ctx, 220801e04c3fSmrg gl_shader_stage stage, 220901e04c3fSmrg const nir_shader_compiler_options *options, 221001e04c3fSmrg shader_info *si); 221101e04c3fSmrg 221201e04c3fSmrg/** creates a register, including assigning it an index and adding it to the list */ 221301e04c3fSmrgnir_register *nir_global_reg_create(nir_shader *shader); 221401e04c3fSmrg 221501e04c3fSmrgnir_register *nir_local_reg_create(nir_function_impl *impl); 221601e04c3fSmrg 221701e04c3fSmrgvoid nir_reg_remove(nir_register *reg); 221801e04c3fSmrg 221901e04c3fSmrg/** Adds a variable to the appropriate list in nir_shader */ 222001e04c3fSmrgvoid nir_shader_add_variable(nir_shader *shader, nir_variable *var); 222101e04c3fSmrg 222201e04c3fSmrgstatic inline void 222301e04c3fSmrgnir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var) 222401e04c3fSmrg{ 222501e04c3fSmrg assert(var->data.mode == nir_var_local); 222601e04c3fSmrg exec_list_push_tail(&impl->locals, &var->node); 222701e04c3fSmrg} 222801e04c3fSmrg 222901e04c3fSmrg/** creates a variable, sets a few defaults, and adds it to the list */ 223001e04c3fSmrgnir_variable *nir_variable_create(nir_shader *shader, 223101e04c3fSmrg nir_variable_mode mode, 223201e04c3fSmrg const struct glsl_type *type, 223301e04c3fSmrg const char *name); 223401e04c3fSmrg/** creates a local variable and adds it to the list */ 223501e04c3fSmrgnir_variable *nir_local_variable_create(nir_function_impl *impl, 223601e04c3fSmrg const struct glsl_type *type, 223701e04c3fSmrg const char *name); 223801e04c3fSmrg 223901e04c3fSmrg/** creates a function and adds it to the shader's list of functions */ 224001e04c3fSmrgnir_function *nir_function_create(nir_shader *shader, const char *name); 224101e04c3fSmrg 224201e04c3fSmrgnir_function_impl *nir_function_impl_create(nir_function *func); 224301e04c3fSmrg/** creates a function_impl that isn't tied to any particular function */ 224401e04c3fSmrgnir_function_impl *nir_function_impl_create_bare(nir_shader *shader); 224501e04c3fSmrg 224601e04c3fSmrgnir_block *nir_block_create(nir_shader *shader); 224701e04c3fSmrgnir_if *nir_if_create(nir_shader *shader); 224801e04c3fSmrgnir_loop *nir_loop_create(nir_shader *shader); 224901e04c3fSmrg 225001e04c3fSmrgnir_function_impl *nir_cf_node_get_function(nir_cf_node *node); 225101e04c3fSmrg 225201e04c3fSmrg/** requests that the given pieces of metadata be generated */ 225301e04c3fSmrgvoid nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...); 225401e04c3fSmrg/** dirties all but the preserved metadata */ 225501e04c3fSmrgvoid nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved); 225601e04c3fSmrg 225701e04c3fSmrg/** creates an instruction with default swizzle/writemask/etc. with NULL registers */ 225801e04c3fSmrgnir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op); 225901e04c3fSmrg 226001e04c3fSmrgnir_deref_instr *nir_deref_instr_create(nir_shader *shader, 226101e04c3fSmrg nir_deref_type deref_type); 226201e04c3fSmrg 226301e04c3fSmrgnir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type); 226401e04c3fSmrg 226501e04c3fSmrgnir_load_const_instr *nir_load_const_instr_create(nir_shader *shader, 226601e04c3fSmrg unsigned num_components, 226701e04c3fSmrg unsigned bit_size); 226801e04c3fSmrg 226901e04c3fSmrgnir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader, 227001e04c3fSmrg nir_intrinsic_op op); 227101e04c3fSmrg 227201e04c3fSmrgnir_call_instr *nir_call_instr_create(nir_shader *shader, 227301e04c3fSmrg nir_function *callee); 227401e04c3fSmrg 227501e04c3fSmrgnir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs); 227601e04c3fSmrg 227701e04c3fSmrgnir_phi_instr *nir_phi_instr_create(nir_shader *shader); 227801e04c3fSmrg 227901e04c3fSmrgnir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader); 228001e04c3fSmrg 228101e04c3fSmrgnir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader, 228201e04c3fSmrg unsigned num_components, 228301e04c3fSmrg unsigned bit_size); 228401e04c3fSmrg 228501e04c3fSmrgnir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size); 228601e04c3fSmrg 228701e04c3fSmrg/** 228801e04c3fSmrg * NIR Cursors and Instruction Insertion API 228901e04c3fSmrg * @{ 229001e04c3fSmrg * 229101e04c3fSmrg * A tiny struct representing a point to insert/extract instructions or 229201e04c3fSmrg * control flow nodes. Helps reduce the combinatorial explosion of possible 229301e04c3fSmrg * points to insert/extract. 229401e04c3fSmrg * 229501e04c3fSmrg * \sa nir_control_flow.h 229601e04c3fSmrg */ 229701e04c3fSmrgtypedef enum { 229801e04c3fSmrg nir_cursor_before_block, 229901e04c3fSmrg nir_cursor_after_block, 230001e04c3fSmrg nir_cursor_before_instr, 230101e04c3fSmrg nir_cursor_after_instr, 230201e04c3fSmrg} nir_cursor_option; 230301e04c3fSmrg 230401e04c3fSmrgtypedef struct { 230501e04c3fSmrg nir_cursor_option option; 230601e04c3fSmrg union { 230701e04c3fSmrg nir_block *block; 230801e04c3fSmrg nir_instr *instr; 230901e04c3fSmrg }; 231001e04c3fSmrg} nir_cursor; 231101e04c3fSmrg 231201e04c3fSmrgstatic inline nir_block * 231301e04c3fSmrgnir_cursor_current_block(nir_cursor cursor) 231401e04c3fSmrg{ 231501e04c3fSmrg if (cursor.option == nir_cursor_before_instr || 231601e04c3fSmrg cursor.option == nir_cursor_after_instr) { 231701e04c3fSmrg return cursor.instr->block; 231801e04c3fSmrg } else { 231901e04c3fSmrg return cursor.block; 232001e04c3fSmrg } 232101e04c3fSmrg} 232201e04c3fSmrg 232301e04c3fSmrgbool nir_cursors_equal(nir_cursor a, nir_cursor b); 232401e04c3fSmrg 232501e04c3fSmrgstatic inline nir_cursor 232601e04c3fSmrgnir_before_block(nir_block *block) 232701e04c3fSmrg{ 232801e04c3fSmrg nir_cursor cursor; 232901e04c3fSmrg cursor.option = nir_cursor_before_block; 233001e04c3fSmrg cursor.block = block; 233101e04c3fSmrg return cursor; 233201e04c3fSmrg} 233301e04c3fSmrg 233401e04c3fSmrgstatic inline nir_cursor 233501e04c3fSmrgnir_after_block(nir_block *block) 233601e04c3fSmrg{ 233701e04c3fSmrg nir_cursor cursor; 233801e04c3fSmrg cursor.option = nir_cursor_after_block; 233901e04c3fSmrg cursor.block = block; 234001e04c3fSmrg return cursor; 234101e04c3fSmrg} 234201e04c3fSmrg 234301e04c3fSmrgstatic inline nir_cursor 234401e04c3fSmrgnir_before_instr(nir_instr *instr) 234501e04c3fSmrg{ 234601e04c3fSmrg nir_cursor cursor; 234701e04c3fSmrg cursor.option = nir_cursor_before_instr; 234801e04c3fSmrg cursor.instr = instr; 234901e04c3fSmrg return cursor; 235001e04c3fSmrg} 235101e04c3fSmrg 235201e04c3fSmrgstatic inline nir_cursor 235301e04c3fSmrgnir_after_instr(nir_instr *instr) 235401e04c3fSmrg{ 235501e04c3fSmrg nir_cursor cursor; 235601e04c3fSmrg cursor.option = nir_cursor_after_instr; 235701e04c3fSmrg cursor.instr = instr; 235801e04c3fSmrg return cursor; 235901e04c3fSmrg} 236001e04c3fSmrg 236101e04c3fSmrgstatic inline nir_cursor 236201e04c3fSmrgnir_after_block_before_jump(nir_block *block) 236301e04c3fSmrg{ 236401e04c3fSmrg nir_instr *last_instr = nir_block_last_instr(block); 236501e04c3fSmrg if (last_instr && last_instr->type == nir_instr_type_jump) { 236601e04c3fSmrg return nir_before_instr(last_instr); 236701e04c3fSmrg } else { 236801e04c3fSmrg return nir_after_block(block); 236901e04c3fSmrg } 237001e04c3fSmrg} 237101e04c3fSmrg 237201e04c3fSmrgstatic inline nir_cursor 237301e04c3fSmrgnir_before_src(nir_src *src, bool is_if_condition) 237401e04c3fSmrg{ 237501e04c3fSmrg if (is_if_condition) { 237601e04c3fSmrg nir_block *prev_block = 237701e04c3fSmrg nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node)); 237801e04c3fSmrg assert(!nir_block_ends_in_jump(prev_block)); 237901e04c3fSmrg return nir_after_block(prev_block); 238001e04c3fSmrg } else if (src->parent_instr->type == nir_instr_type_phi) { 238101e04c3fSmrg#ifndef NDEBUG 238201e04c3fSmrg nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr); 238301e04c3fSmrg bool found = false; 238401e04c3fSmrg nir_foreach_phi_src(phi_src, cond_phi) { 238501e04c3fSmrg if (phi_src->src.ssa == src->ssa) { 238601e04c3fSmrg found = true; 238701e04c3fSmrg break; 238801e04c3fSmrg } 238901e04c3fSmrg } 239001e04c3fSmrg assert(found); 239101e04c3fSmrg#endif 239201e04c3fSmrg /* The LIST_ENTRY macro is a generic container-of macro, it just happens 239301e04c3fSmrg * to have a more specific name. 239401e04c3fSmrg */ 239501e04c3fSmrg nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src); 239601e04c3fSmrg return nir_after_block_before_jump(phi_src->pred); 239701e04c3fSmrg } else { 239801e04c3fSmrg return nir_before_instr(src->parent_instr); 239901e04c3fSmrg } 240001e04c3fSmrg} 240101e04c3fSmrg 240201e04c3fSmrgstatic inline nir_cursor 240301e04c3fSmrgnir_before_cf_node(nir_cf_node *node) 240401e04c3fSmrg{ 240501e04c3fSmrg if (node->type == nir_cf_node_block) 240601e04c3fSmrg return nir_before_block(nir_cf_node_as_block(node)); 240701e04c3fSmrg 240801e04c3fSmrg return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node))); 240901e04c3fSmrg} 241001e04c3fSmrg 241101e04c3fSmrgstatic inline nir_cursor 241201e04c3fSmrgnir_after_cf_node(nir_cf_node *node) 241301e04c3fSmrg{ 241401e04c3fSmrg if (node->type == nir_cf_node_block) 241501e04c3fSmrg return nir_after_block(nir_cf_node_as_block(node)); 241601e04c3fSmrg 241701e04c3fSmrg return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node))); 241801e04c3fSmrg} 241901e04c3fSmrg 242001e04c3fSmrgstatic inline nir_cursor 242101e04c3fSmrgnir_after_phis(nir_block *block) 242201e04c3fSmrg{ 242301e04c3fSmrg nir_foreach_instr(instr, block) { 242401e04c3fSmrg if (instr->type != nir_instr_type_phi) 242501e04c3fSmrg return nir_before_instr(instr); 242601e04c3fSmrg } 242701e04c3fSmrg return nir_after_block(block); 242801e04c3fSmrg} 242901e04c3fSmrg 243001e04c3fSmrgstatic inline nir_cursor 243101e04c3fSmrgnir_after_cf_node_and_phis(nir_cf_node *node) 243201e04c3fSmrg{ 243301e04c3fSmrg if (node->type == nir_cf_node_block) 243401e04c3fSmrg return nir_after_block(nir_cf_node_as_block(node)); 243501e04c3fSmrg 243601e04c3fSmrg nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node)); 243701e04c3fSmrg 243801e04c3fSmrg return nir_after_phis(block); 243901e04c3fSmrg} 244001e04c3fSmrg 244101e04c3fSmrgstatic inline nir_cursor 244201e04c3fSmrgnir_before_cf_list(struct exec_list *cf_list) 244301e04c3fSmrg{ 244401e04c3fSmrg nir_cf_node *first_node = exec_node_data(nir_cf_node, 244501e04c3fSmrg exec_list_get_head(cf_list), node); 244601e04c3fSmrg return nir_before_cf_node(first_node); 244701e04c3fSmrg} 244801e04c3fSmrg 244901e04c3fSmrgstatic inline nir_cursor 245001e04c3fSmrgnir_after_cf_list(struct exec_list *cf_list) 245101e04c3fSmrg{ 245201e04c3fSmrg nir_cf_node *last_node = exec_node_data(nir_cf_node, 245301e04c3fSmrg exec_list_get_tail(cf_list), node); 245401e04c3fSmrg return nir_after_cf_node(last_node); 245501e04c3fSmrg} 245601e04c3fSmrg 245701e04c3fSmrg/** 245801e04c3fSmrg * Insert a NIR instruction at the given cursor. 245901e04c3fSmrg * 246001e04c3fSmrg * Note: This does not update the cursor. 246101e04c3fSmrg */ 246201e04c3fSmrgvoid nir_instr_insert(nir_cursor cursor, nir_instr *instr); 246301e04c3fSmrg 246401e04c3fSmrgstatic inline void 246501e04c3fSmrgnir_instr_insert_before(nir_instr *instr, nir_instr *before) 246601e04c3fSmrg{ 246701e04c3fSmrg nir_instr_insert(nir_before_instr(instr), before); 246801e04c3fSmrg} 246901e04c3fSmrg 247001e04c3fSmrgstatic inline void 247101e04c3fSmrgnir_instr_insert_after(nir_instr *instr, nir_instr *after) 247201e04c3fSmrg{ 247301e04c3fSmrg nir_instr_insert(nir_after_instr(instr), after); 247401e04c3fSmrg} 247501e04c3fSmrg 247601e04c3fSmrgstatic inline void 247701e04c3fSmrgnir_instr_insert_before_block(nir_block *block, nir_instr *before) 247801e04c3fSmrg{ 247901e04c3fSmrg nir_instr_insert(nir_before_block(block), before); 248001e04c3fSmrg} 248101e04c3fSmrg 248201e04c3fSmrgstatic inline void 248301e04c3fSmrgnir_instr_insert_after_block(nir_block *block, nir_instr *after) 248401e04c3fSmrg{ 248501e04c3fSmrg nir_instr_insert(nir_after_block(block), after); 248601e04c3fSmrg} 248701e04c3fSmrg 248801e04c3fSmrgstatic inline void 248901e04c3fSmrgnir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before) 249001e04c3fSmrg{ 249101e04c3fSmrg nir_instr_insert(nir_before_cf_node(node), before); 249201e04c3fSmrg} 249301e04c3fSmrg 249401e04c3fSmrgstatic inline void 249501e04c3fSmrgnir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after) 249601e04c3fSmrg{ 249701e04c3fSmrg nir_instr_insert(nir_after_cf_node(node), after); 249801e04c3fSmrg} 249901e04c3fSmrg 250001e04c3fSmrgstatic inline void 250101e04c3fSmrgnir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before) 250201e04c3fSmrg{ 250301e04c3fSmrg nir_instr_insert(nir_before_cf_list(list), before); 250401e04c3fSmrg} 250501e04c3fSmrg 250601e04c3fSmrgstatic inline void 250701e04c3fSmrgnir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after) 250801e04c3fSmrg{ 250901e04c3fSmrg nir_instr_insert(nir_after_cf_list(list), after); 251001e04c3fSmrg} 251101e04c3fSmrg 251201e04c3fSmrgvoid nir_instr_remove_v(nir_instr *instr); 251301e04c3fSmrg 251401e04c3fSmrgstatic inline nir_cursor 251501e04c3fSmrgnir_instr_remove(nir_instr *instr) 251601e04c3fSmrg{ 251701e04c3fSmrg nir_cursor cursor; 251801e04c3fSmrg nir_instr *prev = nir_instr_prev(instr); 251901e04c3fSmrg if (prev) { 252001e04c3fSmrg cursor = nir_after_instr(prev); 252101e04c3fSmrg } else { 252201e04c3fSmrg cursor = nir_before_block(instr->block); 252301e04c3fSmrg } 252401e04c3fSmrg nir_instr_remove_v(instr); 252501e04c3fSmrg return cursor; 252601e04c3fSmrg} 252701e04c3fSmrg 252801e04c3fSmrg/** @} */ 252901e04c3fSmrg 253001e04c3fSmrgtypedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state); 253101e04c3fSmrgtypedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state); 253201e04c3fSmrgtypedef bool (*nir_foreach_src_cb)(nir_src *src, void *state); 253301e04c3fSmrgbool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, 253401e04c3fSmrg void *state); 253501e04c3fSmrgbool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state); 253601e04c3fSmrgbool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state); 253701e04c3fSmrg 253801e04c3fSmrgnir_const_value *nir_src_as_const_value(nir_src src); 253901e04c3fSmrg 254001e04c3fSmrgstatic inline struct nir_instr * 254101e04c3fSmrgnir_src_instr(const struct nir_src *src) 254201e04c3fSmrg{ 254301e04c3fSmrg return src->is_ssa ? src->ssa->parent_instr : NULL; 254401e04c3fSmrg} 254501e04c3fSmrg 254601e04c3fSmrg#define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \ 254701e04c3fSmrgstatic inline c_type * \ 254801e04c3fSmrgnir_src_as_ ## name (struct nir_src *src) \ 254901e04c3fSmrg{ \ 255001e04c3fSmrg return src->is_ssa && src->ssa->parent_instr->type == type_enum \ 255101e04c3fSmrg ? cast_macro(src->ssa->parent_instr) : NULL; \ 255201e04c3fSmrg} \ 255301e04c3fSmrgstatic inline const c_type * \ 255401e04c3fSmrgnir_src_as_ ## name ## _const(const struct nir_src *src) \ 255501e04c3fSmrg{ \ 255601e04c3fSmrg return src->is_ssa && src->ssa->parent_instr->type == type_enum \ 255701e04c3fSmrg ? cast_macro(src->ssa->parent_instr) : NULL; \ 255801e04c3fSmrg} 255901e04c3fSmrg 256001e04c3fSmrgNIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu) 256101e04c3fSmrg 256201e04c3fSmrgbool nir_src_is_dynamically_uniform(nir_src src); 256301e04c3fSmrgbool nir_srcs_equal(nir_src src1, nir_src src2); 256401e04c3fSmrgvoid nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src); 256501e04c3fSmrgvoid nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src); 256601e04c3fSmrgvoid nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src); 256701e04c3fSmrgvoid nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, 256801e04c3fSmrg nir_dest new_dest); 256901e04c3fSmrg 257001e04c3fSmrgvoid nir_ssa_dest_init(nir_instr *instr, nir_dest *dest, 257101e04c3fSmrg unsigned num_components, unsigned bit_size, 257201e04c3fSmrg const char *name); 257301e04c3fSmrgvoid nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def, 257401e04c3fSmrg unsigned num_components, unsigned bit_size, 257501e04c3fSmrg const char *name); 257601e04c3fSmrgstatic inline void 257701e04c3fSmrgnir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest, 257801e04c3fSmrg const struct glsl_type *type, 257901e04c3fSmrg const char *name) 258001e04c3fSmrg{ 258101e04c3fSmrg assert(glsl_type_is_vector_or_scalar(type)); 258201e04c3fSmrg nir_ssa_dest_init(instr, dest, glsl_get_components(type), 258301e04c3fSmrg glsl_get_bit_size(type), name); 258401e04c3fSmrg} 258501e04c3fSmrgvoid nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src); 258601e04c3fSmrgvoid nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src, 258701e04c3fSmrg nir_instr *after_me); 258801e04c3fSmrg 258901e04c3fSmrgnir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def); 259001e04c3fSmrg 259101e04c3fSmrg/* 259201e04c3fSmrg * finds the next basic block in source-code order, returns NULL if there is 259301e04c3fSmrg * none 259401e04c3fSmrg */ 259501e04c3fSmrg 259601e04c3fSmrgnir_block *nir_block_cf_tree_next(nir_block *block); 259701e04c3fSmrg 259801e04c3fSmrg/* Performs the opposite of nir_block_cf_tree_next() */ 259901e04c3fSmrg 260001e04c3fSmrgnir_block *nir_block_cf_tree_prev(nir_block *block); 260101e04c3fSmrg 260201e04c3fSmrg/* Gets the first block in a CF node in source-code order */ 260301e04c3fSmrg 260401e04c3fSmrgnir_block *nir_cf_node_cf_tree_first(nir_cf_node *node); 260501e04c3fSmrg 260601e04c3fSmrg/* Gets the last block in a CF node in source-code order */ 260701e04c3fSmrg 260801e04c3fSmrgnir_block *nir_cf_node_cf_tree_last(nir_cf_node *node); 260901e04c3fSmrg 261001e04c3fSmrg/* Gets the next block after a CF node in source-code order */ 261101e04c3fSmrg 261201e04c3fSmrgnir_block *nir_cf_node_cf_tree_next(nir_cf_node *node); 261301e04c3fSmrg 261401e04c3fSmrg/* Macros for loops that visit blocks in source-code order */ 261501e04c3fSmrg 261601e04c3fSmrg#define nir_foreach_block(block, impl) \ 261701e04c3fSmrg for (nir_block *block = nir_start_block(impl); block != NULL; \ 261801e04c3fSmrg block = nir_block_cf_tree_next(block)) 261901e04c3fSmrg 262001e04c3fSmrg#define nir_foreach_block_safe(block, impl) \ 262101e04c3fSmrg for (nir_block *block = nir_start_block(impl), \ 262201e04c3fSmrg *next = nir_block_cf_tree_next(block); \ 262301e04c3fSmrg block != NULL; \ 262401e04c3fSmrg block = next, next = nir_block_cf_tree_next(block)) 262501e04c3fSmrg 262601e04c3fSmrg#define nir_foreach_block_reverse(block, impl) \ 262701e04c3fSmrg for (nir_block *block = nir_impl_last_block(impl); block != NULL; \ 262801e04c3fSmrg block = nir_block_cf_tree_prev(block)) 262901e04c3fSmrg 263001e04c3fSmrg#define nir_foreach_block_reverse_safe(block, impl) \ 263101e04c3fSmrg for (nir_block *block = nir_impl_last_block(impl), \ 263201e04c3fSmrg *prev = nir_block_cf_tree_prev(block); \ 263301e04c3fSmrg block != NULL; \ 263401e04c3fSmrg block = prev, prev = nir_block_cf_tree_prev(block)) 263501e04c3fSmrg 263601e04c3fSmrg#define nir_foreach_block_in_cf_node(block, node) \ 263701e04c3fSmrg for (nir_block *block = nir_cf_node_cf_tree_first(node); \ 263801e04c3fSmrg block != nir_cf_node_cf_tree_next(node); \ 263901e04c3fSmrg block = nir_block_cf_tree_next(block)) 264001e04c3fSmrg 264101e04c3fSmrg/* If the following CF node is an if, this function returns that if. 264201e04c3fSmrg * Otherwise, it returns NULL. 264301e04c3fSmrg */ 264401e04c3fSmrgnir_if *nir_block_get_following_if(nir_block *block); 264501e04c3fSmrg 264601e04c3fSmrgnir_loop *nir_block_get_following_loop(nir_block *block); 264701e04c3fSmrg 264801e04c3fSmrgvoid nir_index_local_regs(nir_function_impl *impl); 264901e04c3fSmrgvoid nir_index_global_regs(nir_shader *shader); 265001e04c3fSmrgvoid nir_index_ssa_defs(nir_function_impl *impl); 265101e04c3fSmrgunsigned nir_index_instrs(nir_function_impl *impl); 265201e04c3fSmrg 265301e04c3fSmrgvoid nir_index_blocks(nir_function_impl *impl); 265401e04c3fSmrg 265501e04c3fSmrgvoid nir_print_shader(nir_shader *shader, FILE *fp); 265601e04c3fSmrgvoid nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors); 265701e04c3fSmrgvoid nir_print_instr(const nir_instr *instr, FILE *fp); 265801e04c3fSmrg 265901e04c3fSmrgnir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s); 266001e04c3fSmrgnir_function_impl *nir_function_impl_clone(const nir_function_impl *fi); 266101e04c3fSmrgnir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var); 266201e04c3fSmrgnir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader); 266301e04c3fSmrg 266401e04c3fSmrgnir_shader *nir_shader_serialize_deserialize(void *mem_ctx, nir_shader *s); 266501e04c3fSmrg 266601e04c3fSmrg#ifndef NDEBUG 266701e04c3fSmrgvoid nir_validate_shader(nir_shader *shader, const char *when); 266801e04c3fSmrgvoid nir_metadata_set_validation_flag(nir_shader *shader); 266901e04c3fSmrgvoid nir_metadata_check_validation_flag(nir_shader *shader); 267001e04c3fSmrg 267101e04c3fSmrgstatic inline bool 267201e04c3fSmrgshould_clone_nir(void) 267301e04c3fSmrg{ 267401e04c3fSmrg static int should_clone = -1; 267501e04c3fSmrg if (should_clone < 0) 267601e04c3fSmrg should_clone = env_var_as_boolean("NIR_TEST_CLONE", false); 267701e04c3fSmrg 267801e04c3fSmrg return should_clone; 267901e04c3fSmrg} 268001e04c3fSmrg 268101e04c3fSmrgstatic inline bool 268201e04c3fSmrgshould_serialize_deserialize_nir(void) 268301e04c3fSmrg{ 268401e04c3fSmrg static int test_serialize = -1; 268501e04c3fSmrg if (test_serialize < 0) 268601e04c3fSmrg test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false); 268701e04c3fSmrg 268801e04c3fSmrg return test_serialize; 268901e04c3fSmrg} 269001e04c3fSmrg 269101e04c3fSmrgstatic inline bool 269201e04c3fSmrgshould_print_nir(void) 269301e04c3fSmrg{ 269401e04c3fSmrg static int should_print = -1; 269501e04c3fSmrg if (should_print < 0) 269601e04c3fSmrg should_print = env_var_as_boolean("NIR_PRINT", false); 269701e04c3fSmrg 269801e04c3fSmrg return should_print; 269901e04c3fSmrg} 270001e04c3fSmrg#else 270101e04c3fSmrgstatic inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; } 270201e04c3fSmrgstatic inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; } 270301e04c3fSmrgstatic inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; } 270401e04c3fSmrgstatic inline bool should_clone_nir(void) { return false; } 270501e04c3fSmrgstatic inline bool should_serialize_deserialize_nir(void) { return false; } 270601e04c3fSmrgstatic inline bool should_print_nir(void) { return false; } 270701e04c3fSmrg#endif /* NDEBUG */ 270801e04c3fSmrg 270901e04c3fSmrg#define _PASS(pass, nir, do_pass) do { \ 271001e04c3fSmrg do_pass \ 271101e04c3fSmrg nir_validate_shader(nir, "after " #pass); \ 271201e04c3fSmrg if (should_clone_nir()) { \ 271301e04c3fSmrg nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \ 271401e04c3fSmrg ralloc_free(nir); \ 271501e04c3fSmrg nir = clone; \ 271601e04c3fSmrg } \ 271701e04c3fSmrg if (should_serialize_deserialize_nir()) { \ 271801e04c3fSmrg void *mem_ctx = ralloc_parent(nir); \ 271901e04c3fSmrg nir = nir_shader_serialize_deserialize(mem_ctx, nir); \ 272001e04c3fSmrg } \ 272101e04c3fSmrg} while (0) 272201e04c3fSmrg 272301e04c3fSmrg#define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \ 272401e04c3fSmrg nir_metadata_set_validation_flag(nir); \ 272501e04c3fSmrg if (should_print_nir()) \ 272601e04c3fSmrg printf("%s\n", #pass); \ 272701e04c3fSmrg if (pass(nir, ##__VA_ARGS__)) { \ 272801e04c3fSmrg progress = true; \ 272901e04c3fSmrg if (should_print_nir()) \ 273001e04c3fSmrg nir_print_shader(nir, stdout); \ 273101e04c3fSmrg nir_metadata_check_validation_flag(nir); \ 273201e04c3fSmrg } \ 273301e04c3fSmrg) 273401e04c3fSmrg 273501e04c3fSmrg#define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \ 273601e04c3fSmrg if (should_print_nir()) \ 273701e04c3fSmrg printf("%s\n", #pass); \ 273801e04c3fSmrg pass(nir, ##__VA_ARGS__); \ 273901e04c3fSmrg if (should_print_nir()) \ 274001e04c3fSmrg nir_print_shader(nir, stdout); \ 274101e04c3fSmrg) 274201e04c3fSmrg 274301e04c3fSmrgvoid nir_calc_dominance_impl(nir_function_impl *impl); 274401e04c3fSmrgvoid nir_calc_dominance(nir_shader *shader); 274501e04c3fSmrg 274601e04c3fSmrgnir_block *nir_dominance_lca(nir_block *b1, nir_block *b2); 274701e04c3fSmrgbool nir_block_dominates(nir_block *parent, nir_block *child); 274801e04c3fSmrg 274901e04c3fSmrgvoid nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp); 275001e04c3fSmrgvoid nir_dump_dom_tree(nir_shader *shader, FILE *fp); 275101e04c3fSmrg 275201e04c3fSmrgvoid nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp); 275301e04c3fSmrgvoid nir_dump_dom_frontier(nir_shader *shader, FILE *fp); 275401e04c3fSmrg 275501e04c3fSmrgvoid nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp); 275601e04c3fSmrgvoid nir_dump_cfg(nir_shader *shader, FILE *fp); 275701e04c3fSmrg 275801e04c3fSmrgint nir_gs_count_vertices(const nir_shader *shader); 275901e04c3fSmrg 276001e04c3fSmrgbool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes); 276101e04c3fSmrgbool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes); 276201e04c3fSmrgbool nir_split_var_copies(nir_shader *shader); 276301e04c3fSmrgbool nir_split_per_member_structs(nir_shader *shader); 276401e04c3fSmrgbool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes); 276501e04c3fSmrg 276601e04c3fSmrgbool nir_lower_returns_impl(nir_function_impl *impl); 276701e04c3fSmrgbool nir_lower_returns(nir_shader *shader); 276801e04c3fSmrg 276901e04c3fSmrgbool nir_inline_functions(nir_shader *shader); 277001e04c3fSmrg 277101e04c3fSmrgbool nir_propagate_invariant(nir_shader *shader); 277201e04c3fSmrg 277301e04c3fSmrgvoid nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader); 277401e04c3fSmrgvoid nir_lower_deref_copy_instr(struct nir_builder *b, 277501e04c3fSmrg nir_intrinsic_instr *copy); 277601e04c3fSmrgbool nir_lower_var_copies(nir_shader *shader); 277701e04c3fSmrg 277801e04c3fSmrgvoid nir_fixup_deref_modes(nir_shader *shader); 277901e04c3fSmrg 278001e04c3fSmrgbool nir_lower_global_vars_to_local(nir_shader *shader); 278101e04c3fSmrg 278201e04c3fSmrgbool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes); 278301e04c3fSmrg 278401e04c3fSmrgbool nir_lower_locals_to_regs(nir_shader *shader); 278501e04c3fSmrg 278601e04c3fSmrgvoid nir_lower_io_to_temporaries(nir_shader *shader, 278701e04c3fSmrg nir_function_impl *entrypoint, 278801e04c3fSmrg bool outputs, bool inputs); 278901e04c3fSmrg 279001e04c3fSmrgvoid nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint); 279101e04c3fSmrg 279201e04c3fSmrgvoid nir_assign_var_locations(struct exec_list *var_list, unsigned *size, 279301e04c3fSmrg int (*type_size)(const struct glsl_type *)); 279401e04c3fSmrg 279501e04c3fSmrg/* Some helpers to do very simple linking */ 279601e04c3fSmrgbool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer); 279701e04c3fSmrgbool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list, 279801e04c3fSmrg uint64_t *used_by_other_stage, 279901e04c3fSmrg uint64_t *used_by_other_stage_patches); 280001e04c3fSmrgvoid nir_compact_varyings(nir_shader *producer, nir_shader *consumer, 280101e04c3fSmrg bool default_to_smooth_interp); 280201e04c3fSmrgvoid nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer); 280301e04c3fSmrg 280401e04c3fSmrgtypedef enum { 280501e04c3fSmrg /* If set, this forces all non-flat fragment shader inputs to be 280601e04c3fSmrg * interpolated as if with the "sample" qualifier. This requires 280701e04c3fSmrg * nir_shader_compiler_options::use_interpolated_input_intrinsics. 280801e04c3fSmrg */ 280901e04c3fSmrg nir_lower_io_force_sample_interpolation = (1 << 1), 281001e04c3fSmrg} nir_lower_io_options; 281101e04c3fSmrgbool nir_lower_io(nir_shader *shader, 281201e04c3fSmrg nir_variable_mode modes, 281301e04c3fSmrg int (*type_size)(const struct glsl_type *), 281401e04c3fSmrg nir_lower_io_options); 281501e04c3fSmrgnir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr); 281601e04c3fSmrgnir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr); 281701e04c3fSmrg 281801e04c3fSmrgbool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage); 281901e04c3fSmrg 282001e04c3fSmrgbool nir_lower_regs_to_ssa_impl(nir_function_impl *impl); 282101e04c3fSmrgbool nir_lower_regs_to_ssa(nir_shader *shader); 282201e04c3fSmrgbool nir_lower_vars_to_ssa(nir_shader *shader); 282301e04c3fSmrg 282401e04c3fSmrgbool nir_remove_dead_derefs(nir_shader *shader); 282501e04c3fSmrgbool nir_remove_dead_derefs_impl(nir_function_impl *impl); 282601e04c3fSmrgbool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes); 282701e04c3fSmrgbool nir_lower_constant_initializers(nir_shader *shader, 282801e04c3fSmrg nir_variable_mode modes); 282901e04c3fSmrg 283001e04c3fSmrgbool nir_move_load_const(nir_shader *shader); 283101e04c3fSmrgbool nir_move_vec_src_uses_to_dest(nir_shader *shader); 283201e04c3fSmrgbool nir_lower_vec_to_movs(nir_shader *shader); 283301e04c3fSmrgvoid nir_lower_alpha_test(nir_shader *shader, enum compare_func func, 283401e04c3fSmrg bool alpha_to_one); 283501e04c3fSmrgbool nir_lower_alu(nir_shader *shader); 283601e04c3fSmrgbool nir_lower_alu_to_scalar(nir_shader *shader); 283701e04c3fSmrgbool nir_lower_load_const_to_scalar(nir_shader *shader); 283801e04c3fSmrgbool nir_lower_read_invocation_to_scalar(nir_shader *shader); 283901e04c3fSmrgbool nir_lower_phis_to_scalar(nir_shader *shader); 284001e04c3fSmrgvoid nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer); 284101e04c3fSmrgvoid nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader, 284201e04c3fSmrg bool outputs_only); 284301e04c3fSmrgvoid nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask); 284401e04c3fSmrgvoid nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask); 284501e04c3fSmrg 284601e04c3fSmrgtypedef struct nir_lower_subgroups_options { 284701e04c3fSmrg uint8_t subgroup_size; 284801e04c3fSmrg uint8_t ballot_bit_size; 284901e04c3fSmrg bool lower_to_scalar:1; 285001e04c3fSmrg bool lower_vote_trivial:1; 285101e04c3fSmrg bool lower_vote_eq_to_ballot:1; 285201e04c3fSmrg bool lower_subgroup_masks:1; 285301e04c3fSmrg bool lower_shuffle:1; 285401e04c3fSmrg bool lower_shuffle_to_32bit:1; 285501e04c3fSmrg bool lower_quad:1; 285601e04c3fSmrg} nir_lower_subgroups_options; 285701e04c3fSmrg 285801e04c3fSmrgbool nir_lower_subgroups(nir_shader *shader, 285901e04c3fSmrg const nir_lower_subgroups_options *options); 286001e04c3fSmrg 286101e04c3fSmrgbool nir_lower_system_values(nir_shader *shader); 286201e04c3fSmrg 286301e04c3fSmrgtypedef struct nir_lower_tex_options { 286401e04c3fSmrg /** 286501e04c3fSmrg * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which 286601e04c3fSmrg * sampler types a texture projector is lowered. 286701e04c3fSmrg */ 286801e04c3fSmrg unsigned lower_txp; 286901e04c3fSmrg 287001e04c3fSmrg /** 287101e04c3fSmrg * If true, lower away nir_tex_src_offset for all texelfetch instructions. 287201e04c3fSmrg */ 287301e04c3fSmrg bool lower_txf_offset; 287401e04c3fSmrg 287501e04c3fSmrg /** 287601e04c3fSmrg * If true, lower away nir_tex_src_offset for all rect textures. 287701e04c3fSmrg */ 287801e04c3fSmrg bool lower_rect_offset; 287901e04c3fSmrg 288001e04c3fSmrg /** 288101e04c3fSmrg * If true, lower rect textures to 2D, using txs to fetch the 288201e04c3fSmrg * texture dimensions and dividing the texture coords by the 288301e04c3fSmrg * texture dims to normalize. 288401e04c3fSmrg */ 288501e04c3fSmrg bool lower_rect; 288601e04c3fSmrg 288701e04c3fSmrg /** 288801e04c3fSmrg * If true, convert yuv to rgb. 288901e04c3fSmrg */ 289001e04c3fSmrg unsigned lower_y_uv_external; 289101e04c3fSmrg unsigned lower_y_u_v_external; 289201e04c3fSmrg unsigned lower_yx_xuxv_external; 289301e04c3fSmrg unsigned lower_xy_uxvx_external; 289401e04c3fSmrg 289501e04c3fSmrg /** 289601e04c3fSmrg * To emulate certain texture wrap modes, this can be used 289701e04c3fSmrg * to saturate the specified tex coord to [0.0, 1.0]. The 289801e04c3fSmrg * bits are according to sampler #, ie. if, for example: 289901e04c3fSmrg * 290001e04c3fSmrg * (conf->saturate_s & (1 << n)) 290101e04c3fSmrg * 290201e04c3fSmrg * is true, then the s coord for sampler n is saturated. 290301e04c3fSmrg * 290401e04c3fSmrg * Note that clamping must happen *after* projector lowering 290501e04c3fSmrg * so any projected texture sample instruction with a clamped 290601e04c3fSmrg * coordinate gets automatically lowered, regardless of the 290701e04c3fSmrg * 'lower_txp' setting. 290801e04c3fSmrg */ 290901e04c3fSmrg unsigned saturate_s; 291001e04c3fSmrg unsigned saturate_t; 291101e04c3fSmrg unsigned saturate_r; 291201e04c3fSmrg 291301e04c3fSmrg /* Bitmask of textures that need swizzling. 291401e04c3fSmrg * 291501e04c3fSmrg * If (swizzle_result & (1 << texture_index)), then the swizzle in 291601e04c3fSmrg * swizzles[texture_index] is applied to the result of the texturing 291701e04c3fSmrg * operation. 291801e04c3fSmrg */ 291901e04c3fSmrg unsigned swizzle_result; 292001e04c3fSmrg 292101e04c3fSmrg /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles 292201e04c3fSmrg * while 4 and 5 represent 0 and 1 respectively. 292301e04c3fSmrg */ 292401e04c3fSmrg uint8_t swizzles[32][4]; 292501e04c3fSmrg 292601e04c3fSmrg /** 292701e04c3fSmrg * Bitmap of textures that need srgb to linear conversion. If 292801e04c3fSmrg * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components 292901e04c3fSmrg * of the texture are lowered to linear. 293001e04c3fSmrg */ 293101e04c3fSmrg unsigned lower_srgb; 293201e04c3fSmrg 293301e04c3fSmrg /** 293401e04c3fSmrg * If true, lower nir_texop_txd on cube maps with nir_texop_txl. 293501e04c3fSmrg */ 293601e04c3fSmrg bool lower_txd_cube_map; 293701e04c3fSmrg 293801e04c3fSmrg /** 293901e04c3fSmrg * If true, lower nir_texop_txd on shadow samplers (except cube maps) 294001e04c3fSmrg * with nir_texop_txl. Notice that cube map shadow samplers are lowered 294101e04c3fSmrg * with lower_txd_cube_map. 294201e04c3fSmrg */ 294301e04c3fSmrg bool lower_txd_shadow; 294401e04c3fSmrg 294501e04c3fSmrg /** 294601e04c3fSmrg * If true, lower nir_texop_txd on all samplers to a nir_texop_txl. 294701e04c3fSmrg * Implies lower_txd_cube_map and lower_txd_shadow. 294801e04c3fSmrg */ 294901e04c3fSmrg bool lower_txd; 295001e04c3fSmrg} nir_lower_tex_options; 295101e04c3fSmrg 295201e04c3fSmrgbool nir_lower_tex(nir_shader *shader, 295301e04c3fSmrg const nir_lower_tex_options *options); 295401e04c3fSmrg 295501e04c3fSmrgbool nir_lower_idiv(nir_shader *shader); 295601e04c3fSmrg 295701e04c3fSmrgbool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables); 295801e04c3fSmrgbool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables); 295901e04c3fSmrgbool nir_lower_clip_cull_distance_arrays(nir_shader *nir); 296001e04c3fSmrg 296101e04c3fSmrgvoid nir_lower_two_sided_color(nir_shader *shader); 296201e04c3fSmrg 296301e04c3fSmrgbool nir_lower_clamp_color_outputs(nir_shader *shader); 296401e04c3fSmrg 296501e04c3fSmrgvoid nir_lower_passthrough_edgeflags(nir_shader *shader); 296601e04c3fSmrgbool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count, 296701e04c3fSmrg const gl_state_index16 *uniform_state_tokens); 296801e04c3fSmrg 296901e04c3fSmrgtypedef struct nir_lower_wpos_ytransform_options { 297001e04c3fSmrg gl_state_index16 state_tokens[STATE_LENGTH]; 297101e04c3fSmrg bool fs_coord_origin_upper_left :1; 297201e04c3fSmrg bool fs_coord_origin_lower_left :1; 297301e04c3fSmrg bool fs_coord_pixel_center_integer :1; 297401e04c3fSmrg bool fs_coord_pixel_center_half_integer :1; 297501e04c3fSmrg} nir_lower_wpos_ytransform_options; 297601e04c3fSmrg 297701e04c3fSmrgbool nir_lower_wpos_ytransform(nir_shader *shader, 297801e04c3fSmrg const nir_lower_wpos_ytransform_options *options); 297901e04c3fSmrgbool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading); 298001e04c3fSmrg 298101e04c3fSmrgtypedef struct nir_lower_drawpixels_options { 298201e04c3fSmrg gl_state_index16 texcoord_state_tokens[STATE_LENGTH]; 298301e04c3fSmrg gl_state_index16 scale_state_tokens[STATE_LENGTH]; 298401e04c3fSmrg gl_state_index16 bias_state_tokens[STATE_LENGTH]; 298501e04c3fSmrg unsigned drawpix_sampler; 298601e04c3fSmrg unsigned pixelmap_sampler; 298701e04c3fSmrg bool pixel_maps :1; 298801e04c3fSmrg bool scale_and_bias :1; 298901e04c3fSmrg} nir_lower_drawpixels_options; 299001e04c3fSmrg 299101e04c3fSmrgvoid nir_lower_drawpixels(nir_shader *shader, 299201e04c3fSmrg const nir_lower_drawpixels_options *options); 299301e04c3fSmrg 299401e04c3fSmrgtypedef struct nir_lower_bitmap_options { 299501e04c3fSmrg unsigned sampler; 299601e04c3fSmrg bool swizzle_xxxx; 299701e04c3fSmrg} nir_lower_bitmap_options; 299801e04c3fSmrg 299901e04c3fSmrgvoid nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options); 300001e04c3fSmrg 300101e04c3fSmrgbool nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned ssbo_offset); 300201e04c3fSmrgbool nir_lower_to_source_mods(nir_shader *shader); 300301e04c3fSmrg 300401e04c3fSmrgbool nir_lower_gs_intrinsics(nir_shader *shader); 300501e04c3fSmrg 300601e04c3fSmrgtypedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *); 300701e04c3fSmrg 300801e04c3fSmrgbool nir_lower_bit_size(nir_shader *shader, 300901e04c3fSmrg nir_lower_bit_size_callback callback, 301001e04c3fSmrg void *callback_data); 301101e04c3fSmrg 301201e04c3fSmrgtypedef enum { 301301e04c3fSmrg nir_lower_imul64 = (1 << 0), 301401e04c3fSmrg nir_lower_isign64 = (1 << 1), 301501e04c3fSmrg /** Lower all int64 modulus and division opcodes */ 301601e04c3fSmrg nir_lower_divmod64 = (1 << 2), 301701e04c3fSmrg} nir_lower_int64_options; 301801e04c3fSmrg 301901e04c3fSmrgbool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options); 302001e04c3fSmrg 302101e04c3fSmrgtypedef enum { 302201e04c3fSmrg nir_lower_drcp = (1 << 0), 302301e04c3fSmrg nir_lower_dsqrt = (1 << 1), 302401e04c3fSmrg nir_lower_drsq = (1 << 2), 302501e04c3fSmrg nir_lower_dtrunc = (1 << 3), 302601e04c3fSmrg nir_lower_dfloor = (1 << 4), 302701e04c3fSmrg nir_lower_dceil = (1 << 5), 302801e04c3fSmrg nir_lower_dfract = (1 << 6), 302901e04c3fSmrg nir_lower_dround_even = (1 << 7), 303001e04c3fSmrg nir_lower_dmod = (1 << 8) 303101e04c3fSmrg} nir_lower_doubles_options; 303201e04c3fSmrg 303301e04c3fSmrgbool nir_lower_doubles(nir_shader *shader, nir_lower_doubles_options options); 303401e04c3fSmrgbool nir_lower_pack(nir_shader *shader); 303501e04c3fSmrg 303601e04c3fSmrgbool nir_normalize_cubemap_coords(nir_shader *shader); 303701e04c3fSmrg 303801e04c3fSmrgvoid nir_live_ssa_defs_impl(nir_function_impl *impl); 303901e04c3fSmrg 304001e04c3fSmrgvoid nir_loop_analyze_impl(nir_function_impl *impl, 304101e04c3fSmrg nir_variable_mode indirect_mask); 304201e04c3fSmrg 304301e04c3fSmrgbool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b); 304401e04c3fSmrg 304501e04c3fSmrgbool nir_repair_ssa_impl(nir_function_impl *impl); 304601e04c3fSmrgbool nir_repair_ssa(nir_shader *shader); 304701e04c3fSmrg 304801e04c3fSmrgvoid nir_convert_loop_to_lcssa(nir_loop *loop); 304901e04c3fSmrg 305001e04c3fSmrg/* If phi_webs_only is true, only convert SSA values involved in phi nodes to 305101e04c3fSmrg * registers. If false, convert all values (even those not involved in a phi 305201e04c3fSmrg * node) to registers. 305301e04c3fSmrg */ 305401e04c3fSmrgbool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only); 305501e04c3fSmrg 305601e04c3fSmrgbool nir_lower_phis_to_regs_block(nir_block *block); 305701e04c3fSmrgbool nir_lower_ssa_defs_to_regs_block(nir_block *block); 305801e04c3fSmrgbool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl); 305901e04c3fSmrg 306001e04c3fSmrgbool nir_opt_algebraic(nir_shader *shader); 306101e04c3fSmrgbool nir_opt_algebraic_before_ffma(nir_shader *shader); 306201e04c3fSmrgbool nir_opt_algebraic_late(nir_shader *shader); 306301e04c3fSmrgbool nir_opt_constant_folding(nir_shader *shader); 306401e04c3fSmrg 306501e04c3fSmrgbool nir_opt_global_to_local(nir_shader *shader); 306601e04c3fSmrg 306701e04c3fSmrgbool nir_copy_prop(nir_shader *shader); 306801e04c3fSmrg 306901e04c3fSmrgbool nir_opt_copy_prop_vars(nir_shader *shader); 307001e04c3fSmrg 307101e04c3fSmrgbool nir_opt_cse(nir_shader *shader); 307201e04c3fSmrg 307301e04c3fSmrgbool nir_opt_dce(nir_shader *shader); 307401e04c3fSmrg 307501e04c3fSmrgbool nir_opt_dead_cf(nir_shader *shader); 307601e04c3fSmrg 307701e04c3fSmrgbool nir_opt_dead_write_vars(nir_shader *shader); 307801e04c3fSmrg 307901e04c3fSmrgbool nir_opt_find_array_copies(nir_shader *shader); 308001e04c3fSmrg 308101e04c3fSmrgbool nir_opt_gcm(nir_shader *shader, bool value_number); 308201e04c3fSmrg 308301e04c3fSmrgbool nir_opt_if(nir_shader *shader); 308401e04c3fSmrg 308501e04c3fSmrgbool nir_opt_intrinsics(nir_shader *shader); 308601e04c3fSmrg 308701e04c3fSmrgbool nir_opt_large_constants(nir_shader *shader, 308801e04c3fSmrg glsl_type_size_align_func size_align, 308901e04c3fSmrg unsigned threshold); 309001e04c3fSmrg 309101e04c3fSmrgbool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask); 309201e04c3fSmrg 309301e04c3fSmrgbool nir_opt_move_comparisons(nir_shader *shader); 309401e04c3fSmrg 309501e04c3fSmrgbool nir_opt_move_load_ubo(nir_shader *shader); 309601e04c3fSmrg 309701e04c3fSmrgbool nir_opt_peephole_select(nir_shader *shader, unsigned limit); 309801e04c3fSmrg 309901e04c3fSmrgbool nir_opt_remove_phis_impl(nir_function_impl *impl); 310001e04c3fSmrgbool nir_opt_remove_phis(nir_shader *shader); 310101e04c3fSmrg 310201e04c3fSmrgbool nir_opt_shrink_load(nir_shader *shader); 310301e04c3fSmrg 310401e04c3fSmrgbool nir_opt_trivial_continues(nir_shader *shader); 310501e04c3fSmrg 310601e04c3fSmrgbool nir_opt_undef(nir_shader *shader); 310701e04c3fSmrg 310801e04c3fSmrgbool nir_opt_conditional_discard(nir_shader *shader); 310901e04c3fSmrg 311001e04c3fSmrgvoid nir_sweep(nir_shader *shader); 311101e04c3fSmrg 311201e04c3fSmrgvoid nir_remap_dual_slot_attributes(nir_shader *shader, 311301e04c3fSmrg uint64_t *dual_slot_inputs); 311401e04c3fSmrguint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot); 311501e04c3fSmrg 311601e04c3fSmrgnir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val); 311701e04c3fSmrggl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin); 311801e04c3fSmrg 311901e04c3fSmrg#ifdef __cplusplus 312001e04c3fSmrg} /* extern "C" */ 312101e04c3fSmrg#endif 312201e04c3fSmrg 312301e04c3fSmrg#endif /* NIR_H */ 3124