17ec681f3Smrg/* 27ec681f3Smrg * Copyright © 2019 Collabora, Ltd. 37ec681f3Smrg * 47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 57ec681f3Smrg * copy of this software and associated documentation files (the "Software"), 67ec681f3Smrg * to deal in the Software without restriction, including without limitation 77ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 87ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the 97ec681f3Smrg * Software is furnished to do so, subject to the following conditions: 107ec681f3Smrg * 117ec681f3Smrg * The above copyright notice and this permission notice (including the next 127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the 137ec681f3Smrg * Software. 147ec681f3Smrg * 157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 187ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 197ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 207ec681f3Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 217ec681f3Smrg * IN THE SOFTWARE. 227ec681f3Smrg * 237ec681f3Smrg * Authors (Collabora): 247ec681f3Smrg * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> 257ec681f3Smrg */ 267ec681f3Smrg 277ec681f3Smrg#include "nir.h" 287ec681f3Smrg#include "nir_builder.h" 297ec681f3Smrg 307ec681f3Smrg/* 317ec681f3Smrg * Lowers SSBOs to globals, for hardware that lack native SSBO support. When 327ec681f3Smrg * lowering, *_ssbo_* instructions will become *_global_* instructions, 337ec681f3Smrg * augmented with load_ssbo_address. 347ec681f3Smrg * 357ec681f3Smrg * DOES NOT PERFORM BOUNDS CHECKING. DO NOT USE IN PRODUCTION ON UNTRUSTED 367ec681f3Smrg * CONTEXTS INCLUDING WEBGL 2. 377ec681f3Smrg */ 387ec681f3Smrg 397ec681f3Smrgstatic nir_intrinsic_op 407ec681f3Smrglower_ssbo_op(nir_intrinsic_op op) 417ec681f3Smrg{ 427ec681f3Smrg switch (op) { 437ec681f3Smrg case nir_intrinsic_load_ssbo: 447ec681f3Smrg return nir_intrinsic_load_global; 457ec681f3Smrg 467ec681f3Smrg case nir_intrinsic_store_ssbo: 477ec681f3Smrg return nir_intrinsic_store_global; 487ec681f3Smrg 497ec681f3Smrg case nir_intrinsic_ssbo_atomic_add: 507ec681f3Smrg return nir_intrinsic_global_atomic_add; 517ec681f3Smrg case nir_intrinsic_ssbo_atomic_imin: 527ec681f3Smrg return nir_intrinsic_global_atomic_imin; 537ec681f3Smrg case nir_intrinsic_ssbo_atomic_umin: 547ec681f3Smrg return nir_intrinsic_global_atomic_umin; 557ec681f3Smrg case nir_intrinsic_ssbo_atomic_imax: 567ec681f3Smrg return nir_intrinsic_global_atomic_imax; 577ec681f3Smrg case nir_intrinsic_ssbo_atomic_umax: 587ec681f3Smrg return nir_intrinsic_global_atomic_umax; 597ec681f3Smrg case nir_intrinsic_ssbo_atomic_and: 607ec681f3Smrg return nir_intrinsic_global_atomic_and; 617ec681f3Smrg case nir_intrinsic_ssbo_atomic_or: 627ec681f3Smrg return nir_intrinsic_global_atomic_or; 637ec681f3Smrg case nir_intrinsic_ssbo_atomic_xor: 647ec681f3Smrg return nir_intrinsic_global_atomic_xor; 657ec681f3Smrg case nir_intrinsic_ssbo_atomic_exchange: 667ec681f3Smrg return nir_intrinsic_global_atomic_exchange; 677ec681f3Smrg case nir_intrinsic_ssbo_atomic_comp_swap: 687ec681f3Smrg return nir_intrinsic_global_atomic_comp_swap; 697ec681f3Smrg 707ec681f3Smrg case nir_intrinsic_ssbo_atomic_fadd: 717ec681f3Smrg return nir_intrinsic_global_atomic_fadd; 727ec681f3Smrg case nir_intrinsic_ssbo_atomic_fmin: 737ec681f3Smrg return nir_intrinsic_global_atomic_fmin; 747ec681f3Smrg case nir_intrinsic_ssbo_atomic_fmax: 757ec681f3Smrg return nir_intrinsic_global_atomic_fmax; 767ec681f3Smrg case nir_intrinsic_ssbo_atomic_fcomp_swap: 777ec681f3Smrg return nir_intrinsic_global_atomic_fcomp_swap; 787ec681f3Smrg 797ec681f3Smrg default: 807ec681f3Smrg unreachable("Invalid SSBO op"); 817ec681f3Smrg } 827ec681f3Smrg} 837ec681f3Smrg 847ec681f3Smrg/* Like SSBO property sysvals, though SSBO index may be indirect. C.f. 857ec681f3Smrg * nir_load_system_value */ 867ec681f3Smrg 877ec681f3Smrgstatic inline nir_ssa_def * 887ec681f3Smrgnir_load_ssbo_prop(nir_builder *b, nir_intrinsic_op op, 897ec681f3Smrg nir_src *idx, unsigned bitsize) 907ec681f3Smrg{ 917ec681f3Smrg nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, op); 927ec681f3Smrg load->num_components = 1; 937ec681f3Smrg nir_src_copy(&load->src[0], idx); 947ec681f3Smrg nir_ssa_dest_init(&load->instr, &load->dest, 1, bitsize, NULL); 957ec681f3Smrg nir_builder_instr_insert(b, &load->instr); 967ec681f3Smrg return &load->dest.ssa; 977ec681f3Smrg} 987ec681f3Smrg 997ec681f3Smrg#define nir_ssbo_prop(b, prop, index, bitsize) \ 1007ec681f3Smrg nir_load_ssbo_prop(b, nir_intrinsic_##prop, index, bitsize) 1017ec681f3Smrg 1027ec681f3Smrgstatic nir_ssa_def * 1037ec681f3Smrglower_ssbo_instr(nir_builder *b, nir_intrinsic_instr *intr) 1047ec681f3Smrg{ 1057ec681f3Smrg nir_intrinsic_op op = lower_ssbo_op(intr->intrinsic); 1067ec681f3Smrg bool is_store = op == nir_intrinsic_store_global; 1077ec681f3Smrg bool is_atomic = !is_store && op != nir_intrinsic_load_global; 1087ec681f3Smrg 1097ec681f3Smrg /* We have to calculate the address: 1107ec681f3Smrg * 1117ec681f3Smrg * &(SSBO[offset]) = &SSBO + offset 1127ec681f3Smrg */ 1137ec681f3Smrg 1147ec681f3Smrg nir_src index = intr->src[is_store ? 1 : 0]; 1157ec681f3Smrg nir_src *offset_src = nir_get_io_offset_src(intr); 1167ec681f3Smrg nir_ssa_def *offset = nir_ssa_for_src(b, *offset_src, 1); 1177ec681f3Smrg 1187ec681f3Smrg nir_ssa_def *address = 1197ec681f3Smrg nir_iadd(b, 1207ec681f3Smrg nir_ssbo_prop(b, load_ssbo_address, &index, 64), 1217ec681f3Smrg nir_u2u64(b, offset)); 1227ec681f3Smrg 1237ec681f3Smrg /* Create the replacement intrinsic */ 1247ec681f3Smrg 1257ec681f3Smrg nir_intrinsic_instr *global = 1267ec681f3Smrg nir_intrinsic_instr_create(b->shader, op); 1277ec681f3Smrg 1287ec681f3Smrg global->num_components = intr->num_components; 1297ec681f3Smrg global->src[is_store ? 1 : 0] = nir_src_for_ssa(address); 1307ec681f3Smrg 1317ec681f3Smrg if (!is_atomic) { 1327ec681f3Smrg nir_intrinsic_set_align_mul(global, nir_intrinsic_align_mul(intr)); 1337ec681f3Smrg nir_intrinsic_set_align_offset(global, nir_intrinsic_align_offset(intr)); 1347ec681f3Smrg } 1357ec681f3Smrg 1367ec681f3Smrg if (is_store) { 1377ec681f3Smrg nir_src_copy(&global->src[0], &intr->src[0]); 1387ec681f3Smrg nir_intrinsic_set_write_mask(global, nir_intrinsic_write_mask(intr)); 1397ec681f3Smrg } else { 1407ec681f3Smrg nir_ssa_dest_init(&global->instr, &global->dest, 1417ec681f3Smrg intr->dest.ssa.num_components, 1427ec681f3Smrg intr->dest.ssa.bit_size, NULL); 1437ec681f3Smrg 1447ec681f3Smrg if (is_atomic) { 1457ec681f3Smrg nir_src_copy(&global->src[1], &intr->src[2]); 1467ec681f3Smrg if (nir_intrinsic_infos[op].num_srcs > 2) 1477ec681f3Smrg nir_src_copy(&global->src[2], &intr->src[3]); 1487ec681f3Smrg } 1497ec681f3Smrg } 1507ec681f3Smrg 1517ec681f3Smrg nir_builder_instr_insert(b, &global->instr); 1527ec681f3Smrg return is_store ? NULL : &global->dest.ssa; 1537ec681f3Smrg} 1547ec681f3Smrg 1557ec681f3Smrgstatic bool 1567ec681f3Smrgshould_lower_ssbo_instr(const nir_instr *instr) 1577ec681f3Smrg{ 1587ec681f3Smrg if (instr->type != nir_instr_type_intrinsic) 1597ec681f3Smrg return false; 1607ec681f3Smrg 1617ec681f3Smrg const nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); 1627ec681f3Smrg 1637ec681f3Smrg switch (intr->intrinsic) { 1647ec681f3Smrg case nir_intrinsic_load_ssbo: 1657ec681f3Smrg case nir_intrinsic_store_ssbo: 1667ec681f3Smrg case nir_intrinsic_ssbo_atomic_add: 1677ec681f3Smrg case nir_intrinsic_ssbo_atomic_imin: 1687ec681f3Smrg case nir_intrinsic_ssbo_atomic_umin: 1697ec681f3Smrg case nir_intrinsic_ssbo_atomic_imax: 1707ec681f3Smrg case nir_intrinsic_ssbo_atomic_umax: 1717ec681f3Smrg case nir_intrinsic_ssbo_atomic_and: 1727ec681f3Smrg case nir_intrinsic_ssbo_atomic_or: 1737ec681f3Smrg case nir_intrinsic_ssbo_atomic_xor: 1747ec681f3Smrg case nir_intrinsic_ssbo_atomic_exchange: 1757ec681f3Smrg case nir_intrinsic_ssbo_atomic_comp_swap: 1767ec681f3Smrg case nir_intrinsic_ssbo_atomic_fadd: 1777ec681f3Smrg case nir_intrinsic_ssbo_atomic_fmin: 1787ec681f3Smrg case nir_intrinsic_ssbo_atomic_fmax: 1797ec681f3Smrg case nir_intrinsic_ssbo_atomic_fcomp_swap: 1807ec681f3Smrg return true; 1817ec681f3Smrg default: 1827ec681f3Smrg return false; 1837ec681f3Smrg } 1847ec681f3Smrg 1857ec681f3Smrg return false; 1867ec681f3Smrg} 1877ec681f3Smrg 1887ec681f3Smrgbool 1897ec681f3Smrgnir_lower_ssbo(nir_shader *shader) 1907ec681f3Smrg{ 1917ec681f3Smrg bool progress = false; 1927ec681f3Smrg 1937ec681f3Smrg nir_foreach_function(function, shader) { 1947ec681f3Smrg nir_function_impl *impl = function->impl; 1957ec681f3Smrg nir_builder b; 1967ec681f3Smrg nir_builder_init(&b, impl); 1977ec681f3Smrg 1987ec681f3Smrg nir_foreach_block(block, impl) { 1997ec681f3Smrg nir_foreach_instr_safe(instr, block) { 2007ec681f3Smrg if (!should_lower_ssbo_instr(instr)) continue; 2017ec681f3Smrg progress = true; 2027ec681f3Smrg b.cursor = nir_before_instr(instr); 2037ec681f3Smrg 2047ec681f3Smrg nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); 2057ec681f3Smrg nir_ssa_def *replace = lower_ssbo_instr(&b, intr); 2067ec681f3Smrg 2077ec681f3Smrg if (replace) { 2087ec681f3Smrg nir_ssa_def_rewrite_uses(&intr->dest.ssa, 2097ec681f3Smrg replace); 2107ec681f3Smrg } 2117ec681f3Smrg 2127ec681f3Smrg nir_instr_remove(instr); 2137ec681f3Smrg } 2147ec681f3Smrg } 2157ec681f3Smrg } 2167ec681f3Smrg 2177ec681f3Smrg return progress; 2187ec681f3Smrg} 219