101e04c3fSmrg/*
201e04c3fSmrg * Mesa 3-D graphics library
301e04c3fSmrg *
401e04c3fSmrg * Copyright (C) 1999-2008  Brian Paul   All Rights Reserved.
501e04c3fSmrg * Copyright (C) 2009  VMware, Inc.  All Rights Reserved.
601e04c3fSmrg *
701e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
801e04c3fSmrg * copy of this software and associated documentation files (the "Software"),
901e04c3fSmrg * to deal in the Software without restriction, including without limitation
1001e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1101e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the
1201e04c3fSmrg * Software is furnished to do so, subject to the following conditions:
1301e04c3fSmrg *
1401e04c3fSmrg * The above copyright notice and this permission notice shall be included
1501e04c3fSmrg * in all copies or substantial portions of the Software.
1601e04c3fSmrg *
1701e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
1801e04c3fSmrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1901e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
2001e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
2101e04c3fSmrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
2201e04c3fSmrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2301e04c3fSmrg * OTHER DEALINGS IN THE SOFTWARE.
2401e04c3fSmrg */
2501e04c3fSmrg
2601e04c3fSmrg#ifndef SHADER_ENUMS_H
2701e04c3fSmrg#define SHADER_ENUMS_H
2801e04c3fSmrg
29ed98bd31Smaya#include <stdbool.h>
30ed98bd31Smaya
317ec681f3Smrg/* Project-wide (GL and Vulkan) maximum. */
327ec681f3Smrg#define MAX_DRAW_BUFFERS 8
337ec681f3Smrg
3401e04c3fSmrg#ifdef __cplusplus
3501e04c3fSmrgextern "C" {
3601e04c3fSmrg#endif
3701e04c3fSmrg
3801e04c3fSmrg/**
3901e04c3fSmrg * Shader stages.
4001e04c3fSmrg *
4101e04c3fSmrg * The order must match how shaders are ordered in the pipeline.
4201e04c3fSmrg * The GLSL linker assumes that if i<j, then the j-th shader is
4301e04c3fSmrg * executed later than the i-th shader.
4401e04c3fSmrg */
4501e04c3fSmrgtypedef enum
4601e04c3fSmrg{
4701e04c3fSmrg   MESA_SHADER_NONE = -1,
4801e04c3fSmrg   MESA_SHADER_VERTEX = 0,
4901e04c3fSmrg   MESA_SHADER_TESS_CTRL = 1,
5001e04c3fSmrg   MESA_SHADER_TESS_EVAL = 2,
5101e04c3fSmrg   MESA_SHADER_GEOMETRY = 3,
5201e04c3fSmrg   MESA_SHADER_FRAGMENT = 4,
5301e04c3fSmrg   MESA_SHADER_COMPUTE = 5,
547ec681f3Smrg
557ec681f3Smrg   /* Vulkan-only stages. */
567ec681f3Smrg   MESA_SHADER_TASK         = 6,
577ec681f3Smrg   MESA_SHADER_MESH         = 7,
587ec681f3Smrg   MESA_SHADER_RAYGEN       = 8,
597ec681f3Smrg   MESA_SHADER_ANY_HIT      = 9,
607ec681f3Smrg   MESA_SHADER_CLOSEST_HIT  = 10,
617ec681f3Smrg   MESA_SHADER_MISS         = 11,
627ec681f3Smrg   MESA_SHADER_INTERSECTION = 12,
637ec681f3Smrg   MESA_SHADER_CALLABLE     = 13,
647ec681f3Smrg
65ed98bd31Smaya   /* must be last so it doesn't affect the GL pipeline */
667ec681f3Smrg   MESA_SHADER_KERNEL = 14,
6701e04c3fSmrg} gl_shader_stage;
6801e04c3fSmrg
69ed98bd31Smayastatic inline bool
70ed98bd31Smayagl_shader_stage_is_compute(gl_shader_stage stage)
71ed98bd31Smaya{
72ed98bd31Smaya   return stage == MESA_SHADER_COMPUTE || stage == MESA_SHADER_KERNEL;
73ed98bd31Smaya}
74ed98bd31Smaya
757ec681f3Smrgstatic inline bool
767ec681f3Smrggl_shader_stage_uses_workgroup(gl_shader_stage stage)
777ec681f3Smrg{
787ec681f3Smrg   return stage == MESA_SHADER_COMPUTE ||
797ec681f3Smrg          stage == MESA_SHADER_KERNEL ||
807ec681f3Smrg          stage == MESA_SHADER_TASK ||
817ec681f3Smrg          stage == MESA_SHADER_MESH;
827ec681f3Smrg}
837ec681f3Smrg
847ec681f3Smrgstatic inline bool
857ec681f3Smrggl_shader_stage_is_callable(gl_shader_stage stage)
867ec681f3Smrg{
877ec681f3Smrg   return stage == MESA_SHADER_ANY_HIT ||
887ec681f3Smrg          stage == MESA_SHADER_CLOSEST_HIT ||
897ec681f3Smrg          stage == MESA_SHADER_MISS ||
907ec681f3Smrg          stage == MESA_SHADER_INTERSECTION ||
917ec681f3Smrg          stage == MESA_SHADER_CALLABLE;
927ec681f3Smrg}
937ec681f3Smrg
9401e04c3fSmrg/**
9501e04c3fSmrg * Number of STATE_* values we need to address any GL state.
9601e04c3fSmrg * Used to dimension arrays.
9701e04c3fSmrg */
987ec681f3Smrg#define STATE_LENGTH 4
9901e04c3fSmrg
10001e04c3fSmrgtypedef short gl_state_index16; /* see enum gl_state_index */
10101e04c3fSmrg
10201e04c3fSmrgconst char *gl_shader_stage_name(gl_shader_stage stage);
10301e04c3fSmrg
10401e04c3fSmrg/**
10501e04c3fSmrg * Translate a gl_shader_stage to a short shader stage name for debug
10601e04c3fSmrg * printouts and error messages.
10701e04c3fSmrg */
10801e04c3fSmrgconst char *_mesa_shader_stage_to_string(unsigned stage);
10901e04c3fSmrg
11001e04c3fSmrg/**
11101e04c3fSmrg * Translate a gl_shader_stage to a shader stage abbreviation (VS, GS, FS)
11201e04c3fSmrg * for debug printouts and error messages.
11301e04c3fSmrg */
11401e04c3fSmrgconst char *_mesa_shader_stage_to_abbrev(unsigned stage);
11501e04c3fSmrg
116ed98bd31Smaya/**
117ed98bd31Smaya * GL related stages (not including CL)
118ed98bd31Smaya */
11901e04c3fSmrg#define MESA_SHADER_STAGES (MESA_SHADER_COMPUTE + 1)
12001e04c3fSmrg
1217ec681f3Smrg/**
1227ec681f3Smrg * Vulkan stages (not including CL)
1237ec681f3Smrg */
1247ec681f3Smrg#define MESA_VULKAN_SHADER_STAGES (MESA_SHADER_CALLABLE + 1)
1257ec681f3Smrg
126ed98bd31Smaya/**
127ed98bd31Smaya * All stages
128ed98bd31Smaya */
129ed98bd31Smaya#define MESA_ALL_SHADER_STAGES (MESA_SHADER_KERNEL + 1)
130ed98bd31Smaya
13101e04c3fSmrg
13201e04c3fSmrg/**
13301e04c3fSmrg * Indexes for vertex program attributes.
13401e04c3fSmrg * GL_NV_vertex_program aliases generic attributes over the conventional
13501e04c3fSmrg * attributes.  In GL_ARB_vertex_program shader the aliasing is optional.
13601e04c3fSmrg * In GL_ARB_vertex_shader / OpenGL 2.0 the aliasing is disallowed (the
13701e04c3fSmrg * generic attributes are distinct/separate).
13801e04c3fSmrg */
13901e04c3fSmrgtypedef enum
14001e04c3fSmrg{
14101e04c3fSmrg   VERT_ATTRIB_POS,
14201e04c3fSmrg   VERT_ATTRIB_NORMAL,
14301e04c3fSmrg   VERT_ATTRIB_COLOR0,
14401e04c3fSmrg   VERT_ATTRIB_COLOR1,
14501e04c3fSmrg   VERT_ATTRIB_FOG,
14601e04c3fSmrg   VERT_ATTRIB_COLOR_INDEX,
14701e04c3fSmrg   VERT_ATTRIB_TEX0,
14801e04c3fSmrg   VERT_ATTRIB_TEX1,
14901e04c3fSmrg   VERT_ATTRIB_TEX2,
15001e04c3fSmrg   VERT_ATTRIB_TEX3,
15101e04c3fSmrg   VERT_ATTRIB_TEX4,
15201e04c3fSmrg   VERT_ATTRIB_TEX5,
15301e04c3fSmrg   VERT_ATTRIB_TEX6,
15401e04c3fSmrg   VERT_ATTRIB_TEX7,
15501e04c3fSmrg   VERT_ATTRIB_POINT_SIZE,
15601e04c3fSmrg   VERT_ATTRIB_GENERIC0,
15701e04c3fSmrg   VERT_ATTRIB_GENERIC1,
15801e04c3fSmrg   VERT_ATTRIB_GENERIC2,
15901e04c3fSmrg   VERT_ATTRIB_GENERIC3,
16001e04c3fSmrg   VERT_ATTRIB_GENERIC4,
16101e04c3fSmrg   VERT_ATTRIB_GENERIC5,
16201e04c3fSmrg   VERT_ATTRIB_GENERIC6,
16301e04c3fSmrg   VERT_ATTRIB_GENERIC7,
16401e04c3fSmrg   VERT_ATTRIB_GENERIC8,
16501e04c3fSmrg   VERT_ATTRIB_GENERIC9,
16601e04c3fSmrg   VERT_ATTRIB_GENERIC10,
16701e04c3fSmrg   VERT_ATTRIB_GENERIC11,
16801e04c3fSmrg   VERT_ATTRIB_GENERIC12,
16901e04c3fSmrg   VERT_ATTRIB_GENERIC13,
17001e04c3fSmrg   VERT_ATTRIB_GENERIC14,
17101e04c3fSmrg   VERT_ATTRIB_GENERIC15,
1727ec681f3Smrg   /* This must be last to keep VS inputs and vertex attributes in the same
1737ec681f3Smrg    * order in st/mesa, and st/mesa always adds edgeflags as the last input.
1747ec681f3Smrg    */
1757ec681f3Smrg   VERT_ATTRIB_EDGEFLAG,
17601e04c3fSmrg   VERT_ATTRIB_MAX
17701e04c3fSmrg} gl_vert_attrib;
17801e04c3fSmrg
17901e04c3fSmrgconst char *gl_vert_attrib_name(gl_vert_attrib attrib);
18001e04c3fSmrg
1817ec681f3Smrg/**
1827ec681f3Smrg * Max number of texture coordinate units.  This mainly just applies to
1837ec681f3Smrg * the fixed-function vertex code.  This will be difficult to raise above
1847ec681f3Smrg * eight because of various vertex attribute bitvectors.
1857ec681f3Smrg */
1867ec681f3Smrg#define MAX_TEXTURE_COORD_UNITS     8
1877ec681f3Smrg#define MAX_VERTEX_GENERIC_ATTRIBS  16
1887ec681f3Smrg
18901e04c3fSmrg/**
19001e04c3fSmrg * Symbolic constats to help iterating over
19101e04c3fSmrg * specific blocks of vertex attributes.
19201e04c3fSmrg *
19301e04c3fSmrg * VERT_ATTRIB_TEX
19401e04c3fSmrg *   include the classic texture coordinate attributes.
19501e04c3fSmrg * VERT_ATTRIB_GENERIC
19601e04c3fSmrg *   include the OpenGL 2.0+ GLSL generic shader attributes.
19701e04c3fSmrg *   These alias the generic GL_ARB_vertex_shader attributes.
19801e04c3fSmrg * VERT_ATTRIB_MAT
19901e04c3fSmrg *   include the generic shader attributes used to alias
20001e04c3fSmrg *   varying material values for the TNL shader programs.
20101e04c3fSmrg *   They are located at the end of the generic attribute
20201e04c3fSmrg *   block not to overlap with the generic 0 attribute.
20301e04c3fSmrg */
20401e04c3fSmrg#define VERT_ATTRIB_TEX(i)          (VERT_ATTRIB_TEX0 + (i))
20501e04c3fSmrg#define VERT_ATTRIB_TEX_MAX         MAX_TEXTURE_COORD_UNITS
20601e04c3fSmrg
20701e04c3fSmrg#define VERT_ATTRIB_GENERIC(i)      (VERT_ATTRIB_GENERIC0 + (i))
20801e04c3fSmrg#define VERT_ATTRIB_GENERIC_MAX     MAX_VERTEX_GENERIC_ATTRIBS
20901e04c3fSmrg
21001e04c3fSmrg#define VERT_ATTRIB_MAT0            \
21101e04c3fSmrg   (VERT_ATTRIB_GENERIC_MAX - VERT_ATTRIB_MAT_MAX)
21201e04c3fSmrg#define VERT_ATTRIB_MAT(i)          \
21301e04c3fSmrg   VERT_ATTRIB_GENERIC((i) + VERT_ATTRIB_MAT0)
21401e04c3fSmrg#define VERT_ATTRIB_MAT_MAX         MAT_ATTRIB_MAX
21501e04c3fSmrg
21601e04c3fSmrg/**
21701e04c3fSmrg * Bitflags for vertex attributes.
21801e04c3fSmrg * These are used in bitfields in many places.
21901e04c3fSmrg */
22001e04c3fSmrg/*@{*/
22101e04c3fSmrg#define VERT_BIT_POS             BITFIELD_BIT(VERT_ATTRIB_POS)
22201e04c3fSmrg#define VERT_BIT_NORMAL          BITFIELD_BIT(VERT_ATTRIB_NORMAL)
22301e04c3fSmrg#define VERT_BIT_COLOR0          BITFIELD_BIT(VERT_ATTRIB_COLOR0)
22401e04c3fSmrg#define VERT_BIT_COLOR1          BITFIELD_BIT(VERT_ATTRIB_COLOR1)
22501e04c3fSmrg#define VERT_BIT_FOG             BITFIELD_BIT(VERT_ATTRIB_FOG)
22601e04c3fSmrg#define VERT_BIT_COLOR_INDEX     BITFIELD_BIT(VERT_ATTRIB_COLOR_INDEX)
22701e04c3fSmrg#define VERT_BIT_TEX0            BITFIELD_BIT(VERT_ATTRIB_TEX0)
22801e04c3fSmrg#define VERT_BIT_TEX1            BITFIELD_BIT(VERT_ATTRIB_TEX1)
22901e04c3fSmrg#define VERT_BIT_TEX2            BITFIELD_BIT(VERT_ATTRIB_TEX2)
23001e04c3fSmrg#define VERT_BIT_TEX3            BITFIELD_BIT(VERT_ATTRIB_TEX3)
23101e04c3fSmrg#define VERT_BIT_TEX4            BITFIELD_BIT(VERT_ATTRIB_TEX4)
23201e04c3fSmrg#define VERT_BIT_TEX5            BITFIELD_BIT(VERT_ATTRIB_TEX5)
23301e04c3fSmrg#define VERT_BIT_TEX6            BITFIELD_BIT(VERT_ATTRIB_TEX6)
23401e04c3fSmrg#define VERT_BIT_TEX7            BITFIELD_BIT(VERT_ATTRIB_TEX7)
23501e04c3fSmrg#define VERT_BIT_POINT_SIZE      BITFIELD_BIT(VERT_ATTRIB_POINT_SIZE)
23601e04c3fSmrg#define VERT_BIT_GENERIC0        BITFIELD_BIT(VERT_ATTRIB_GENERIC0)
2377ec681f3Smrg#define VERT_BIT_EDGEFLAG        BITFIELD_BIT(VERT_ATTRIB_EDGEFLAG)
23801e04c3fSmrg
23901e04c3fSmrg#define VERT_BIT(i)              BITFIELD_BIT(i)
24001e04c3fSmrg#define VERT_BIT_ALL             BITFIELD_RANGE(0, VERT_ATTRIB_MAX)
24101e04c3fSmrg
2427ec681f3Smrg#define VERT_BIT_FF_ALL          (BITFIELD_RANGE(0, VERT_ATTRIB_GENERIC0) | \
2437ec681f3Smrg                                  VERT_BIT_EDGEFLAG)
24401e04c3fSmrg#define VERT_BIT_TEX(i)          VERT_BIT(VERT_ATTRIB_TEX(i))
24501e04c3fSmrg#define VERT_BIT_TEX_ALL         \
24601e04c3fSmrg   BITFIELD_RANGE(VERT_ATTRIB_TEX(0), VERT_ATTRIB_TEX_MAX)
24701e04c3fSmrg
24801e04c3fSmrg#define VERT_BIT_GENERIC(i)      VERT_BIT(VERT_ATTRIB_GENERIC(i))
24901e04c3fSmrg#define VERT_BIT_GENERIC_ALL     \
25001e04c3fSmrg   BITFIELD_RANGE(VERT_ATTRIB_GENERIC(0), VERT_ATTRIB_GENERIC_MAX)
25101e04c3fSmrg
25201e04c3fSmrg#define VERT_BIT_MAT(i)	         VERT_BIT(VERT_ATTRIB_MAT(i))
25301e04c3fSmrg#define VERT_BIT_MAT_ALL         \
25401e04c3fSmrg   BITFIELD_RANGE(VERT_ATTRIB_MAT(0), VERT_ATTRIB_MAT_MAX)
25501e04c3fSmrg/*@}*/
25601e04c3fSmrg
25701e04c3fSmrg#define MAX_VARYING 32 /**< number of float[4] vectors */
25801e04c3fSmrg
25901e04c3fSmrg/**
26001e04c3fSmrg * Indexes for vertex shader outputs, geometry shader inputs/outputs, and
26101e04c3fSmrg * fragment shader inputs.
26201e04c3fSmrg *
26301e04c3fSmrg * Note that some of these values are not available to all pipeline stages.
26401e04c3fSmrg *
26501e04c3fSmrg * When this enum is updated, the following code must be updated too:
26601e04c3fSmrg * - vertResults (in prog_print.c's arb_output_attrib_string())
26701e04c3fSmrg * - fragAttribs (in prog_print.c's arb_input_attrib_string())
26801e04c3fSmrg * - _mesa_varying_slot_in_fs()
2697ec681f3Smrg * - _mesa_varying_slot_name_for_stage()
27001e04c3fSmrg */
27101e04c3fSmrgtypedef enum
27201e04c3fSmrg{
27301e04c3fSmrg   VARYING_SLOT_POS,
27401e04c3fSmrg   VARYING_SLOT_COL0, /* COL0 and COL1 must be contiguous */
27501e04c3fSmrg   VARYING_SLOT_COL1,
27601e04c3fSmrg   VARYING_SLOT_FOGC,
27701e04c3fSmrg   VARYING_SLOT_TEX0, /* TEX0-TEX7 must be contiguous */
27801e04c3fSmrg   VARYING_SLOT_TEX1,
27901e04c3fSmrg   VARYING_SLOT_TEX2,
28001e04c3fSmrg   VARYING_SLOT_TEX3,
28101e04c3fSmrg   VARYING_SLOT_TEX4,
28201e04c3fSmrg   VARYING_SLOT_TEX5,
28301e04c3fSmrg   VARYING_SLOT_TEX6,
28401e04c3fSmrg   VARYING_SLOT_TEX7,
28501e04c3fSmrg   VARYING_SLOT_PSIZ, /* Does not appear in FS */
28601e04c3fSmrg   VARYING_SLOT_BFC0, /* Does not appear in FS */
28701e04c3fSmrg   VARYING_SLOT_BFC1, /* Does not appear in FS */
28801e04c3fSmrg   VARYING_SLOT_EDGE, /* Does not appear in FS */
28901e04c3fSmrg   VARYING_SLOT_CLIP_VERTEX, /* Does not appear in FS */
29001e04c3fSmrg   VARYING_SLOT_CLIP_DIST0,
29101e04c3fSmrg   VARYING_SLOT_CLIP_DIST1,
29201e04c3fSmrg   VARYING_SLOT_CULL_DIST0,
29301e04c3fSmrg   VARYING_SLOT_CULL_DIST1,
29401e04c3fSmrg   VARYING_SLOT_PRIMITIVE_ID, /* Does not appear in VS */
29501e04c3fSmrg   VARYING_SLOT_LAYER, /* Appears as VS or GS output */
29601e04c3fSmrg   VARYING_SLOT_VIEWPORT, /* Appears as VS or GS output */
29701e04c3fSmrg   VARYING_SLOT_FACE, /* FS only */
29801e04c3fSmrg   VARYING_SLOT_PNTC, /* FS only */
29901e04c3fSmrg   VARYING_SLOT_TESS_LEVEL_OUTER, /* Only appears as TCS output. */
30001e04c3fSmrg   VARYING_SLOT_TESS_LEVEL_INNER, /* Only appears as TCS output. */
30101e04c3fSmrg   VARYING_SLOT_BOUNDING_BOX0, /* Only appears as TCS output. */
30201e04c3fSmrg   VARYING_SLOT_BOUNDING_BOX1, /* Only appears as TCS output. */
30301e04c3fSmrg   VARYING_SLOT_VIEW_INDEX,
3047ec681f3Smrg   VARYING_SLOT_VIEWPORT_MASK, /* Does not appear in FS */
3057ec681f3Smrg   VARYING_SLOT_PRIMITIVE_SHADING_RATE = VARYING_SLOT_FACE, /* Does not appear in FS. */
3067ec681f3Smrg
3077ec681f3Smrg   VARYING_SLOT_PRIMITIVE_COUNT = VARYING_SLOT_TESS_LEVEL_OUTER, /* Only appears in MESH. */
3087ec681f3Smrg   VARYING_SLOT_PRIMITIVE_INDICES = VARYING_SLOT_TESS_LEVEL_INNER, /* Only appears in MESH. */
3097ec681f3Smrg   VARYING_SLOT_TASK_COUNT = VARYING_SLOT_BOUNDING_BOX0, /* Only appears in TASK. */
3107ec681f3Smrg
3117ec681f3Smrg   VARYING_SLOT_VAR0 = 32, /* First generic varying slot */
31201e04c3fSmrg   /* the remaining are simply for the benefit of gl_varying_slot_name()
31301e04c3fSmrg    * and not to be construed as an upper bound:
31401e04c3fSmrg    */
31501e04c3fSmrg   VARYING_SLOT_VAR1,
31601e04c3fSmrg   VARYING_SLOT_VAR2,
31701e04c3fSmrg   VARYING_SLOT_VAR3,
31801e04c3fSmrg   VARYING_SLOT_VAR4,
31901e04c3fSmrg   VARYING_SLOT_VAR5,
32001e04c3fSmrg   VARYING_SLOT_VAR6,
32101e04c3fSmrg   VARYING_SLOT_VAR7,
32201e04c3fSmrg   VARYING_SLOT_VAR8,
32301e04c3fSmrg   VARYING_SLOT_VAR9,
32401e04c3fSmrg   VARYING_SLOT_VAR10,
32501e04c3fSmrg   VARYING_SLOT_VAR11,
32601e04c3fSmrg   VARYING_SLOT_VAR12,
32701e04c3fSmrg   VARYING_SLOT_VAR13,
32801e04c3fSmrg   VARYING_SLOT_VAR14,
32901e04c3fSmrg   VARYING_SLOT_VAR15,
33001e04c3fSmrg   VARYING_SLOT_VAR16,
33101e04c3fSmrg   VARYING_SLOT_VAR17,
33201e04c3fSmrg   VARYING_SLOT_VAR18,
33301e04c3fSmrg   VARYING_SLOT_VAR19,
33401e04c3fSmrg   VARYING_SLOT_VAR20,
33501e04c3fSmrg   VARYING_SLOT_VAR21,
33601e04c3fSmrg   VARYING_SLOT_VAR22,
33701e04c3fSmrg   VARYING_SLOT_VAR23,
33801e04c3fSmrg   VARYING_SLOT_VAR24,
33901e04c3fSmrg   VARYING_SLOT_VAR25,
34001e04c3fSmrg   VARYING_SLOT_VAR26,
34101e04c3fSmrg   VARYING_SLOT_VAR27,
34201e04c3fSmrg   VARYING_SLOT_VAR28,
34301e04c3fSmrg   VARYING_SLOT_VAR29,
34401e04c3fSmrg   VARYING_SLOT_VAR30,
34501e04c3fSmrg   VARYING_SLOT_VAR31,
3467ec681f3Smrg   /* Per-patch varyings for tessellation. */
3477ec681f3Smrg   VARYING_SLOT_PATCH0,
3487ec681f3Smrg   VARYING_SLOT_PATCH1,
3497ec681f3Smrg   VARYING_SLOT_PATCH2,
3507ec681f3Smrg   VARYING_SLOT_PATCH3,
3517ec681f3Smrg   VARYING_SLOT_PATCH4,
3527ec681f3Smrg   VARYING_SLOT_PATCH5,
3537ec681f3Smrg   VARYING_SLOT_PATCH6,
3547ec681f3Smrg   VARYING_SLOT_PATCH7,
3557ec681f3Smrg   VARYING_SLOT_PATCH8,
3567ec681f3Smrg   VARYING_SLOT_PATCH9,
3577ec681f3Smrg   VARYING_SLOT_PATCH10,
3587ec681f3Smrg   VARYING_SLOT_PATCH11,
3597ec681f3Smrg   VARYING_SLOT_PATCH12,
3607ec681f3Smrg   VARYING_SLOT_PATCH13,
3617ec681f3Smrg   VARYING_SLOT_PATCH14,
3627ec681f3Smrg   VARYING_SLOT_PATCH15,
3637ec681f3Smrg   VARYING_SLOT_PATCH16,
3647ec681f3Smrg   VARYING_SLOT_PATCH17,
3657ec681f3Smrg   VARYING_SLOT_PATCH18,
3667ec681f3Smrg   VARYING_SLOT_PATCH19,
3677ec681f3Smrg   VARYING_SLOT_PATCH20,
3687ec681f3Smrg   VARYING_SLOT_PATCH21,
3697ec681f3Smrg   VARYING_SLOT_PATCH22,
3707ec681f3Smrg   VARYING_SLOT_PATCH23,
3717ec681f3Smrg   VARYING_SLOT_PATCH24,
3727ec681f3Smrg   VARYING_SLOT_PATCH25,
3737ec681f3Smrg   VARYING_SLOT_PATCH26,
3747ec681f3Smrg   VARYING_SLOT_PATCH27,
3757ec681f3Smrg   VARYING_SLOT_PATCH28,
3767ec681f3Smrg   VARYING_SLOT_PATCH29,
3777ec681f3Smrg   VARYING_SLOT_PATCH30,
3787ec681f3Smrg   VARYING_SLOT_PATCH31,
3797ec681f3Smrg   /* 32 16-bit vec4 slots packed in 16 32-bit vec4 slots for GLES/mediump.
3807ec681f3Smrg    * They are really just additional generic slots used for 16-bit data to
3817ec681f3Smrg    * prevent conflicts between neighboring mediump and non-mediump varyings
3827ec681f3Smrg    * that can't be packed without breaking one or the other, which is
3837ec681f3Smrg    * a limitation of separate shaders. This allows linking shaders in 32 bits
3847ec681f3Smrg    * and then get an optimally packed 16-bit varyings by remapping the IO
3857ec681f3Smrg    * locations to these slots. The remapping can also be undone trivially.
3867ec681f3Smrg    *
3877ec681f3Smrg    * nir_io_semantics::high_16bit determines which half of the slot is
3887ec681f3Smrg    * accessed. The low and high halves share the same IO "base" number.
3897ec681f3Smrg    * Drivers can treat these as 32-bit slots everywhere except for FP16
3907ec681f3Smrg    * interpolation.
3917ec681f3Smrg    */
3927ec681f3Smrg   VARYING_SLOT_VAR0_16BIT,
3937ec681f3Smrg   VARYING_SLOT_VAR1_16BIT,
3947ec681f3Smrg   VARYING_SLOT_VAR2_16BIT,
3957ec681f3Smrg   VARYING_SLOT_VAR3_16BIT,
3967ec681f3Smrg   VARYING_SLOT_VAR4_16BIT,
3977ec681f3Smrg   VARYING_SLOT_VAR5_16BIT,
3987ec681f3Smrg   VARYING_SLOT_VAR6_16BIT,
3997ec681f3Smrg   VARYING_SLOT_VAR7_16BIT,
4007ec681f3Smrg   VARYING_SLOT_VAR8_16BIT,
4017ec681f3Smrg   VARYING_SLOT_VAR9_16BIT,
4027ec681f3Smrg   VARYING_SLOT_VAR10_16BIT,
4037ec681f3Smrg   VARYING_SLOT_VAR11_16BIT,
4047ec681f3Smrg   VARYING_SLOT_VAR12_16BIT,
4057ec681f3Smrg   VARYING_SLOT_VAR13_16BIT,
4067ec681f3Smrg   VARYING_SLOT_VAR14_16BIT,
4077ec681f3Smrg   VARYING_SLOT_VAR15_16BIT,
4087ec681f3Smrg
4097ec681f3Smrg   NUM_TOTAL_VARYING_SLOTS,
41001e04c3fSmrg} gl_varying_slot;
41101e04c3fSmrg
41201e04c3fSmrg
41301e04c3fSmrg#define VARYING_SLOT_MAX	(VARYING_SLOT_VAR0 + MAX_VARYING)
41401e04c3fSmrg#define VARYING_SLOT_TESS_MAX	(VARYING_SLOT_PATCH0 + MAX_VARYING)
41501e04c3fSmrg#define MAX_VARYINGS_INCL_PATCH (VARYING_SLOT_TESS_MAX - VARYING_SLOT_VAR0)
41601e04c3fSmrg
4177ec681f3Smrgconst char *gl_varying_slot_name_for_stage(gl_varying_slot slot,
4187ec681f3Smrg                                           gl_shader_stage stage);
4197ec681f3Smrg
42001e04c3fSmrg
42101e04c3fSmrg/**
42201e04c3fSmrg * Bitflags for varying slots.
42301e04c3fSmrg */
42401e04c3fSmrg/*@{*/
42501e04c3fSmrg#define VARYING_BIT_POS BITFIELD64_BIT(VARYING_SLOT_POS)
42601e04c3fSmrg#define VARYING_BIT_COL0 BITFIELD64_BIT(VARYING_SLOT_COL0)
42701e04c3fSmrg#define VARYING_BIT_COL1 BITFIELD64_BIT(VARYING_SLOT_COL1)
42801e04c3fSmrg#define VARYING_BIT_FOGC BITFIELD64_BIT(VARYING_SLOT_FOGC)
42901e04c3fSmrg#define VARYING_BIT_TEX0 BITFIELD64_BIT(VARYING_SLOT_TEX0)
43001e04c3fSmrg#define VARYING_BIT_TEX1 BITFIELD64_BIT(VARYING_SLOT_TEX1)
43101e04c3fSmrg#define VARYING_BIT_TEX2 BITFIELD64_BIT(VARYING_SLOT_TEX2)
43201e04c3fSmrg#define VARYING_BIT_TEX3 BITFIELD64_BIT(VARYING_SLOT_TEX3)
43301e04c3fSmrg#define VARYING_BIT_TEX4 BITFIELD64_BIT(VARYING_SLOT_TEX4)
43401e04c3fSmrg#define VARYING_BIT_TEX5 BITFIELD64_BIT(VARYING_SLOT_TEX5)
43501e04c3fSmrg#define VARYING_BIT_TEX6 BITFIELD64_BIT(VARYING_SLOT_TEX6)
43601e04c3fSmrg#define VARYING_BIT_TEX7 BITFIELD64_BIT(VARYING_SLOT_TEX7)
43701e04c3fSmrg#define VARYING_BIT_TEX(U) BITFIELD64_BIT(VARYING_SLOT_TEX0 + (U))
43801e04c3fSmrg#define VARYING_BITS_TEX_ANY BITFIELD64_RANGE(VARYING_SLOT_TEX0, \
43901e04c3fSmrg                                              MAX_TEXTURE_COORD_UNITS)
44001e04c3fSmrg#define VARYING_BIT_PSIZ BITFIELD64_BIT(VARYING_SLOT_PSIZ)
44101e04c3fSmrg#define VARYING_BIT_BFC0 BITFIELD64_BIT(VARYING_SLOT_BFC0)
44201e04c3fSmrg#define VARYING_BIT_BFC1 BITFIELD64_BIT(VARYING_SLOT_BFC1)
4437ec681f3Smrg#define VARYING_BITS_COLOR (VARYING_BIT_COL0 | \
4447ec681f3Smrg                            VARYING_BIT_COL1 |        \
4457ec681f3Smrg                            VARYING_BIT_BFC0 |        \
4467ec681f3Smrg                            VARYING_BIT_BFC1)
44701e04c3fSmrg#define VARYING_BIT_EDGE BITFIELD64_BIT(VARYING_SLOT_EDGE)
44801e04c3fSmrg#define VARYING_BIT_CLIP_VERTEX BITFIELD64_BIT(VARYING_SLOT_CLIP_VERTEX)
44901e04c3fSmrg#define VARYING_BIT_CLIP_DIST0 BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0)
45001e04c3fSmrg#define VARYING_BIT_CLIP_DIST1 BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1)
45101e04c3fSmrg#define VARYING_BIT_CULL_DIST0 BITFIELD64_BIT(VARYING_SLOT_CULL_DIST0)
45201e04c3fSmrg#define VARYING_BIT_CULL_DIST1 BITFIELD64_BIT(VARYING_SLOT_CULL_DIST1)
45301e04c3fSmrg#define VARYING_BIT_PRIMITIVE_ID BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_ID)
45401e04c3fSmrg#define VARYING_BIT_LAYER BITFIELD64_BIT(VARYING_SLOT_LAYER)
45501e04c3fSmrg#define VARYING_BIT_VIEWPORT BITFIELD64_BIT(VARYING_SLOT_VIEWPORT)
45601e04c3fSmrg#define VARYING_BIT_FACE BITFIELD64_BIT(VARYING_SLOT_FACE)
45701e04c3fSmrg#define VARYING_BIT_PNTC BITFIELD64_BIT(VARYING_SLOT_PNTC)
45801e04c3fSmrg#define VARYING_BIT_TESS_LEVEL_OUTER BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_OUTER)
45901e04c3fSmrg#define VARYING_BIT_TESS_LEVEL_INNER BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_INNER)
46001e04c3fSmrg#define VARYING_BIT_BOUNDING_BOX0 BITFIELD64_BIT(VARYING_SLOT_BOUNDING_BOX0)
46101e04c3fSmrg#define VARYING_BIT_BOUNDING_BOX1 BITFIELD64_BIT(VARYING_SLOT_BOUNDING_BOX1)
4627ec681f3Smrg#define VARYING_BIT_VIEWPORT_MASK BITFIELD64_BIT(VARYING_SLOT_VIEWPORT_MASK)
46301e04c3fSmrg#define VARYING_BIT_VAR(V) BITFIELD64_BIT(VARYING_SLOT_VAR0 + (V))
46401e04c3fSmrg/*@}*/
46501e04c3fSmrg
46601e04c3fSmrg/**
46701e04c3fSmrg * If the gl_register_file is PROGRAM_SYSTEM_VALUE, the register index will be
46801e04c3fSmrg * one of these values.  If a NIR variable's mode is nir_var_system_value, it
46901e04c3fSmrg * will be one of these values.
47001e04c3fSmrg */
47101e04c3fSmrgtypedef enum
47201e04c3fSmrg{
47301e04c3fSmrg   /**
47401e04c3fSmrg    * \name System values applicable to all shaders
47501e04c3fSmrg    */
47601e04c3fSmrg   /*@{*/
47701e04c3fSmrg
47801e04c3fSmrg   /**
47901e04c3fSmrg    * Builtin variables added by GL_ARB_shader_ballot.
48001e04c3fSmrg    */
48101e04c3fSmrg   /*@{*/
48201e04c3fSmrg
48301e04c3fSmrg   /**
48401e04c3fSmrg    * From the GL_ARB_shader-ballot spec:
48501e04c3fSmrg    *
48601e04c3fSmrg    *    "A sub-group is a collection of invocations which execute in lockstep.
48701e04c3fSmrg    *     The variable <gl_SubGroupSizeARB> is the maximum number of
48801e04c3fSmrg    *     invocations in a sub-group. The maximum <gl_SubGroupSizeARB>
48901e04c3fSmrg    *     supported in this extension is 64."
49001e04c3fSmrg    *
49101e04c3fSmrg    * The spec defines this as a uniform. However, it's highly unlikely that
49201e04c3fSmrg    * implementations actually treat it as a uniform (which is loaded from a
49301e04c3fSmrg    * constant buffer). Most likely, this is an implementation-wide constant,
49401e04c3fSmrg    * or perhaps something that depends on the shader stage.
49501e04c3fSmrg    */
49601e04c3fSmrg   SYSTEM_VALUE_SUBGROUP_SIZE,
49701e04c3fSmrg
49801e04c3fSmrg   /**
49901e04c3fSmrg    * From the GL_ARB_shader_ballot spec:
50001e04c3fSmrg    *
50101e04c3fSmrg    *    "The variable <gl_SubGroupInvocationARB> holds the index of the
50201e04c3fSmrg    *     invocation within sub-group. This variable is in the range 0 to
50301e04c3fSmrg    *     <gl_SubGroupSizeARB>-1, where <gl_SubGroupSizeARB> is the total
50401e04c3fSmrg    *     number of invocations in a sub-group."
50501e04c3fSmrg    */
50601e04c3fSmrg   SYSTEM_VALUE_SUBGROUP_INVOCATION,
50701e04c3fSmrg
50801e04c3fSmrg   /**
50901e04c3fSmrg    * From the GL_ARB_shader_ballot spec:
51001e04c3fSmrg    *
51101e04c3fSmrg    *    "The <gl_SubGroup??MaskARB> variables provide a bitmask for all
51201e04c3fSmrg    *     invocations, with one bit per invocation starting with the least
51301e04c3fSmrg    *     significant bit, according to the following table,
51401e04c3fSmrg    *
51501e04c3fSmrg    *       variable               equation for bit values
51601e04c3fSmrg    *       --------------------   ------------------------------------
51701e04c3fSmrg    *       gl_SubGroupEqMaskARB   bit index == gl_SubGroupInvocationARB
51801e04c3fSmrg    *       gl_SubGroupGeMaskARB   bit index >= gl_SubGroupInvocationARB
51901e04c3fSmrg    *       gl_SubGroupGtMaskARB   bit index >  gl_SubGroupInvocationARB
52001e04c3fSmrg    *       gl_SubGroupLeMaskARB   bit index <= gl_SubGroupInvocationARB
52101e04c3fSmrg    *       gl_SubGroupLtMaskARB   bit index <  gl_SubGroupInvocationARB
52201e04c3fSmrg    */
52301e04c3fSmrg   SYSTEM_VALUE_SUBGROUP_EQ_MASK,
52401e04c3fSmrg   SYSTEM_VALUE_SUBGROUP_GE_MASK,
52501e04c3fSmrg   SYSTEM_VALUE_SUBGROUP_GT_MASK,
52601e04c3fSmrg   SYSTEM_VALUE_SUBGROUP_LE_MASK,
52701e04c3fSmrg   SYSTEM_VALUE_SUBGROUP_LT_MASK,
52801e04c3fSmrg   /*@}*/
52901e04c3fSmrg
53001e04c3fSmrg   /**
53101e04c3fSmrg    * Builtin variables added by VK_KHR_subgroups
53201e04c3fSmrg    */
53301e04c3fSmrg   /*@{*/
53401e04c3fSmrg   SYSTEM_VALUE_NUM_SUBGROUPS,
53501e04c3fSmrg   SYSTEM_VALUE_SUBGROUP_ID,
53601e04c3fSmrg   /*@}*/
53701e04c3fSmrg
53801e04c3fSmrg   /*@}*/
53901e04c3fSmrg
54001e04c3fSmrg   /**
54101e04c3fSmrg    * \name Vertex shader system values
54201e04c3fSmrg    */
54301e04c3fSmrg   /*@{*/
54401e04c3fSmrg   /**
54501e04c3fSmrg    * OpenGL-style vertex ID.
54601e04c3fSmrg    *
54701e04c3fSmrg    * Section 2.11.7 (Shader Execution), subsection Shader Inputs, of the
54801e04c3fSmrg    * OpenGL 3.3 core profile spec says:
54901e04c3fSmrg    *
55001e04c3fSmrg    *     "gl_VertexID holds the integer index i implicitly passed by
55101e04c3fSmrg    *     DrawArrays or one of the other drawing commands defined in section
55201e04c3fSmrg    *     2.8.3."
55301e04c3fSmrg    *
55401e04c3fSmrg    * Section 2.8.3 (Drawing Commands) of the same spec says:
55501e04c3fSmrg    *
55601e04c3fSmrg    *     "The commands....are equivalent to the commands with the same base
55701e04c3fSmrg    *     name (without the BaseVertex suffix), except that the ith element
55801e04c3fSmrg    *     transferred by the corresponding draw call will be taken from
55901e04c3fSmrg    *     element indices[i] + basevertex of each enabled array."
56001e04c3fSmrg    *
56101e04c3fSmrg    * Additionally, the overview in the GL_ARB_shader_draw_parameters spec
56201e04c3fSmrg    * says:
56301e04c3fSmrg    *
56401e04c3fSmrg    *     "In unextended GL, vertex shaders have inputs named gl_VertexID and
56501e04c3fSmrg    *     gl_InstanceID, which contain, respectively the index of the vertex
56601e04c3fSmrg    *     and instance. The value of gl_VertexID is the implicitly passed
56701e04c3fSmrg    *     index of the vertex being processed, which includes the value of
56801e04c3fSmrg    *     baseVertex, for those commands that accept it."
56901e04c3fSmrg    *
57001e04c3fSmrg    * gl_VertexID gets basevertex added in.  This differs from DirectX where
57101e04c3fSmrg    * SV_VertexID does \b not get basevertex added in.
57201e04c3fSmrg    *
57301e04c3fSmrg    * \note
57401e04c3fSmrg    * If all system values are available, \c SYSTEM_VALUE_VERTEX_ID will be
57501e04c3fSmrg    * equal to \c SYSTEM_VALUE_VERTEX_ID_ZERO_BASE plus
57601e04c3fSmrg    * \c SYSTEM_VALUE_BASE_VERTEX.
57701e04c3fSmrg    *
57801e04c3fSmrg    * \sa SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, SYSTEM_VALUE_BASE_VERTEX
57901e04c3fSmrg    */
58001e04c3fSmrg   SYSTEM_VALUE_VERTEX_ID,
58101e04c3fSmrg
58201e04c3fSmrg   /**
58301e04c3fSmrg    * Instanced ID as supplied to gl_InstanceID
58401e04c3fSmrg    *
58501e04c3fSmrg    * Values assigned to gl_InstanceID always begin with zero, regardless of
58601e04c3fSmrg    * the value of baseinstance.
58701e04c3fSmrg    *
58801e04c3fSmrg    * Section 11.1.3.9 (Shader Inputs) of the OpenGL 4.4 core profile spec
58901e04c3fSmrg    * says:
59001e04c3fSmrg    *
59101e04c3fSmrg    *     "gl_InstanceID holds the integer instance number of the current
59201e04c3fSmrg    *     primitive in an instanced draw call (see section 10.5)."
59301e04c3fSmrg    *
59401e04c3fSmrg    * Through a big chain of pseudocode, section 10.5 describes that
59501e04c3fSmrg    * baseinstance is not counted by gl_InstanceID.  In that section, notice
59601e04c3fSmrg    *
59701e04c3fSmrg    *     "If an enabled vertex attribute array is instanced (it has a
59801e04c3fSmrg    *     non-zero divisor as specified by VertexAttribDivisor), the element
59901e04c3fSmrg    *     index that is transferred to the GL, for all vertices, is given by
60001e04c3fSmrg    *
60101e04c3fSmrg    *         floor(instance/divisor) + baseinstance
60201e04c3fSmrg    *
60301e04c3fSmrg    *     If an array corresponding to an attribute required by a vertex
60401e04c3fSmrg    *     shader is not enabled, then the corresponding element is taken from
60501e04c3fSmrg    *     the current attribute state (see section 10.2)."
60601e04c3fSmrg    *
60701e04c3fSmrg    * Note that baseinstance is \b not included in the value of instance.
60801e04c3fSmrg    */
60901e04c3fSmrg   SYSTEM_VALUE_INSTANCE_ID,
61001e04c3fSmrg
61101e04c3fSmrg   /**
61201e04c3fSmrg    * Vulkan InstanceIndex.
61301e04c3fSmrg    *
61401e04c3fSmrg    * InstanceIndex = gl_InstanceID + gl_BaseInstance
61501e04c3fSmrg    */
61601e04c3fSmrg   SYSTEM_VALUE_INSTANCE_INDEX,
61701e04c3fSmrg
61801e04c3fSmrg   /**
61901e04c3fSmrg    * DirectX-style vertex ID.
62001e04c3fSmrg    *
62101e04c3fSmrg    * Unlike \c SYSTEM_VALUE_VERTEX_ID, this system value does \b not include
62201e04c3fSmrg    * the value of basevertex.
62301e04c3fSmrg    *
62401e04c3fSmrg    * \sa SYSTEM_VALUE_VERTEX_ID, SYSTEM_VALUE_BASE_VERTEX
62501e04c3fSmrg    */
62601e04c3fSmrg   SYSTEM_VALUE_VERTEX_ID_ZERO_BASE,
62701e04c3fSmrg
62801e04c3fSmrg   /**
62901e04c3fSmrg    * Value of \c basevertex passed to \c glDrawElementsBaseVertex and similar
63001e04c3fSmrg    * functions.
63101e04c3fSmrg    *
63201e04c3fSmrg    * \sa SYSTEM_VALUE_VERTEX_ID, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
63301e04c3fSmrg    */
63401e04c3fSmrg   SYSTEM_VALUE_BASE_VERTEX,
63501e04c3fSmrg
63601e04c3fSmrg   /**
63701e04c3fSmrg    * Depending on the type of the draw call (indexed or non-indexed),
63801e04c3fSmrg    * is the value of \c basevertex passed to \c glDrawElementsBaseVertex and
63901e04c3fSmrg    * similar, or is the value of \c first passed to \c glDrawArrays and
64001e04c3fSmrg    * similar.
64101e04c3fSmrg    *
64201e04c3fSmrg    * \note
64301e04c3fSmrg    * It can be used to calculate the \c SYSTEM_VALUE_VERTEX_ID as
64401e04c3fSmrg    * \c SYSTEM_VALUE_VERTEX_ID_ZERO_BASE plus \c SYSTEM_VALUE_FIRST_VERTEX.
64501e04c3fSmrg    *
64601e04c3fSmrg    * \sa SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, SYSTEM_VALUE_VERTEX_ID
64701e04c3fSmrg    */
64801e04c3fSmrg   SYSTEM_VALUE_FIRST_VERTEX,
64901e04c3fSmrg
65001e04c3fSmrg   /**
65101e04c3fSmrg    * If the Draw command used to start the rendering was an indexed draw
65201e04c3fSmrg    * or not (~0/0). Useful to calculate \c SYSTEM_VALUE_BASE_VERTEX as
65301e04c3fSmrg    * \c SYSTEM_VALUE_IS_INDEXED_DRAW & \c SYSTEM_VALUE_FIRST_VERTEX.
65401e04c3fSmrg    */
65501e04c3fSmrg   SYSTEM_VALUE_IS_INDEXED_DRAW,
65601e04c3fSmrg
65701e04c3fSmrg   /**
65801e04c3fSmrg    * Value of \c baseinstance passed to instanced draw entry points
65901e04c3fSmrg    *
66001e04c3fSmrg    * \sa SYSTEM_VALUE_INSTANCE_ID
66101e04c3fSmrg    */
66201e04c3fSmrg   SYSTEM_VALUE_BASE_INSTANCE,
66301e04c3fSmrg
66401e04c3fSmrg   /**
66501e04c3fSmrg    * From _ARB_shader_draw_parameters:
66601e04c3fSmrg    *
66701e04c3fSmrg    *   "Additionally, this extension adds a further built-in variable,
66801e04c3fSmrg    *    gl_DrawID to the shading language. This variable contains the index
66901e04c3fSmrg    *    of the draw currently being processed by a Multi* variant of a
67001e04c3fSmrg    *    drawing command (such as MultiDrawElements or
67101e04c3fSmrg    *    MultiDrawArraysIndirect)."
67201e04c3fSmrg    *
67301e04c3fSmrg    * If GL_ARB_multi_draw_indirect is not supported, this is always 0.
67401e04c3fSmrg    */
67501e04c3fSmrg   SYSTEM_VALUE_DRAW_ID,
67601e04c3fSmrg   /*@}*/
67701e04c3fSmrg
67801e04c3fSmrg   /**
67901e04c3fSmrg    * \name Geometry shader system values
68001e04c3fSmrg    */
68101e04c3fSmrg   /*@{*/
68201e04c3fSmrg   SYSTEM_VALUE_INVOCATION_ID,  /**< (Also in Tessellation Control shader) */
68301e04c3fSmrg   /*@}*/
68401e04c3fSmrg
68501e04c3fSmrg   /**
68601e04c3fSmrg    * \name Fragment shader system values
68701e04c3fSmrg    */
68801e04c3fSmrg   /*@{*/
68901e04c3fSmrg   SYSTEM_VALUE_FRAG_COORD,
6907ec681f3Smrg   SYSTEM_VALUE_POINT_COORD,
6917ec681f3Smrg   SYSTEM_VALUE_LINE_COORD, /**< Coord along axis perpendicular to line */
69201e04c3fSmrg   SYSTEM_VALUE_FRONT_FACE,
69301e04c3fSmrg   SYSTEM_VALUE_SAMPLE_ID,
69401e04c3fSmrg   SYSTEM_VALUE_SAMPLE_POS,
69501e04c3fSmrg   SYSTEM_VALUE_SAMPLE_MASK_IN,
69601e04c3fSmrg   SYSTEM_VALUE_HELPER_INVOCATION,
6977ec681f3Smrg   SYSTEM_VALUE_COLOR0,
6987ec681f3Smrg   SYSTEM_VALUE_COLOR1,
69901e04c3fSmrg   /*@}*/
70001e04c3fSmrg
70101e04c3fSmrg   /**
70201e04c3fSmrg    * \name Tessellation Evaluation shader system values
70301e04c3fSmrg    */
70401e04c3fSmrg   /*@{*/
70501e04c3fSmrg   SYSTEM_VALUE_TESS_COORD,
70601e04c3fSmrg   SYSTEM_VALUE_VERTICES_IN,    /**< Tessellation vertices in input patch */
70701e04c3fSmrg   SYSTEM_VALUE_PRIMITIVE_ID,
70801e04c3fSmrg   SYSTEM_VALUE_TESS_LEVEL_OUTER, /**< TES input */
70901e04c3fSmrg   SYSTEM_VALUE_TESS_LEVEL_INNER, /**< TES input */
7107ec681f3Smrg   SYSTEM_VALUE_TESS_LEVEL_OUTER_DEFAULT, /**< TCS input for passthru TCS */
7117ec681f3Smrg   SYSTEM_VALUE_TESS_LEVEL_INNER_DEFAULT, /**< TCS input for passthru TCS */
71201e04c3fSmrg   /*@}*/
71301e04c3fSmrg
71401e04c3fSmrg   /**
71501e04c3fSmrg    * \name Compute shader system values
71601e04c3fSmrg    */
71701e04c3fSmrg   /*@{*/
71801e04c3fSmrg   SYSTEM_VALUE_LOCAL_INVOCATION_ID,
71901e04c3fSmrg   SYSTEM_VALUE_LOCAL_INVOCATION_INDEX,
72001e04c3fSmrg   SYSTEM_VALUE_GLOBAL_INVOCATION_ID,
7217ec681f3Smrg   SYSTEM_VALUE_BASE_GLOBAL_INVOCATION_ID,
722ed98bd31Smaya   SYSTEM_VALUE_GLOBAL_INVOCATION_INDEX,
7237ec681f3Smrg   SYSTEM_VALUE_WORKGROUP_ID,
7247ec681f3Smrg   SYSTEM_VALUE_NUM_WORKGROUPS,
7257ec681f3Smrg   SYSTEM_VALUE_WORKGROUP_SIZE,
72601e04c3fSmrg   SYSTEM_VALUE_GLOBAL_GROUP_SIZE,
72701e04c3fSmrg   SYSTEM_VALUE_WORK_DIM,
7287ec681f3Smrg   SYSTEM_VALUE_USER_DATA_AMD,
72901e04c3fSmrg   /*@}*/
73001e04c3fSmrg
73101e04c3fSmrg   /** Required for VK_KHR_device_group */
73201e04c3fSmrg   SYSTEM_VALUE_DEVICE_INDEX,
73301e04c3fSmrg
73401e04c3fSmrg   /** Required for VK_KHX_multiview */
73501e04c3fSmrg   SYSTEM_VALUE_VIEW_INDEX,
73601e04c3fSmrg
73701e04c3fSmrg   /**
73801e04c3fSmrg    * Driver internal vertex-count, used (for example) for drivers to
73901e04c3fSmrg    * calculate stride for stream-out outputs.  Not externally visible.
74001e04c3fSmrg    */
74101e04c3fSmrg   SYSTEM_VALUE_VERTEX_CNT,
74201e04c3fSmrg
74301e04c3fSmrg   /**
7447ec681f3Smrg    * Required for AMD_shader_explicit_vertex_parameter and also used for
7457ec681f3Smrg    * varying-fetch instructions.
746ed98bd31Smaya    *
747ed98bd31Smaya    * The _SIZE value is "primitive size", used to scale i/j in primitive
748ed98bd31Smaya    * space to pixel space.
74901e04c3fSmrg    */
7507ec681f3Smrg   SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL,
7517ec681f3Smrg   SYSTEM_VALUE_BARYCENTRIC_PERSP_SAMPLE,
7527ec681f3Smrg   SYSTEM_VALUE_BARYCENTRIC_PERSP_CENTROID,
7537ec681f3Smrg   SYSTEM_VALUE_BARYCENTRIC_PERSP_SIZE,
7547ec681f3Smrg   SYSTEM_VALUE_BARYCENTRIC_LINEAR_PIXEL,
7557ec681f3Smrg   SYSTEM_VALUE_BARYCENTRIC_LINEAR_CENTROID,
7567ec681f3Smrg   SYSTEM_VALUE_BARYCENTRIC_LINEAR_SAMPLE,
7577ec681f3Smrg   SYSTEM_VALUE_BARYCENTRIC_PULL_MODEL,
7587ec681f3Smrg
7597ec681f3Smrg   /**
7607ec681f3Smrg    * \name Ray tracing shader system values
7617ec681f3Smrg    */
7627ec681f3Smrg   /*@{*/
7637ec681f3Smrg   SYSTEM_VALUE_RAY_LAUNCH_ID,
7647ec681f3Smrg   SYSTEM_VALUE_RAY_LAUNCH_SIZE,
7657ec681f3Smrg   SYSTEM_VALUE_RAY_WORLD_ORIGIN,
7667ec681f3Smrg   SYSTEM_VALUE_RAY_WORLD_DIRECTION,
7677ec681f3Smrg   SYSTEM_VALUE_RAY_OBJECT_ORIGIN,
7687ec681f3Smrg   SYSTEM_VALUE_RAY_OBJECT_DIRECTION,
7697ec681f3Smrg   SYSTEM_VALUE_RAY_T_MIN,
7707ec681f3Smrg   SYSTEM_VALUE_RAY_T_MAX,
7717ec681f3Smrg   SYSTEM_VALUE_RAY_OBJECT_TO_WORLD,
7727ec681f3Smrg   SYSTEM_VALUE_RAY_WORLD_TO_OBJECT,
7737ec681f3Smrg   SYSTEM_VALUE_RAY_HIT_KIND,
7747ec681f3Smrg   SYSTEM_VALUE_RAY_FLAGS,
7757ec681f3Smrg   SYSTEM_VALUE_RAY_GEOMETRY_INDEX,
7767ec681f3Smrg   SYSTEM_VALUE_RAY_INSTANCE_CUSTOM_INDEX,
7777ec681f3Smrg   /*@}*/
7787ec681f3Smrg
7797ec681f3Smrg   /**
7807ec681f3Smrg    * IR3 specific geometry shader and tesselation control shader system
7817ec681f3Smrg    * values that packs invocation id, thread id and vertex id.  Having this
7827ec681f3Smrg    * as a nir level system value lets us do the unpacking in nir.
7837ec681f3Smrg    */
7847ec681f3Smrg   SYSTEM_VALUE_GS_HEADER_IR3,
7857ec681f3Smrg   SYSTEM_VALUE_TCS_HEADER_IR3,
7867ec681f3Smrg
7877ec681f3Smrg   /* IR3 specific system value that contains the patch id for the current
7887ec681f3Smrg    * subdraw.
7897ec681f3Smrg    */
7907ec681f3Smrg   SYSTEM_VALUE_REL_PATCH_ID_IR3,
7917ec681f3Smrg
7927ec681f3Smrg   /**
7937ec681f3Smrg    * Fragment shading rate used for KHR_fragment_shading_rate (Vulkan).
7947ec681f3Smrg    */
7957ec681f3Smrg   SYSTEM_VALUE_FRAG_SHADING_RATE,
79601e04c3fSmrg
79701e04c3fSmrg   SYSTEM_VALUE_MAX             /**< Number of values */
79801e04c3fSmrg} gl_system_value;
79901e04c3fSmrg
80001e04c3fSmrgconst char *gl_system_value_name(gl_system_value sysval);
80101e04c3fSmrg
80201e04c3fSmrg/**
80301e04c3fSmrg * The possible interpolation qualifiers that can be applied to a fragment
80401e04c3fSmrg * shader input in GLSL.
80501e04c3fSmrg *
80601e04c3fSmrg * Note: INTERP_MODE_NONE must be 0 so that memsetting the
80701e04c3fSmrg * ir_variable data structure to 0 causes the default behavior.
80801e04c3fSmrg */
80901e04c3fSmrgenum glsl_interp_mode
81001e04c3fSmrg{
81101e04c3fSmrg   INTERP_MODE_NONE = 0,
81201e04c3fSmrg   INTERP_MODE_SMOOTH,
81301e04c3fSmrg   INTERP_MODE_FLAT,
81401e04c3fSmrg   INTERP_MODE_NOPERSPECTIVE,
8157ec681f3Smrg   INTERP_MODE_EXPLICIT,
8167ec681f3Smrg   INTERP_MODE_COLOR, /**< glShadeModel determines the interp mode */
81701e04c3fSmrg   INTERP_MODE_COUNT /**< Number of interpolation qualifiers */
81801e04c3fSmrg};
81901e04c3fSmrg
82001e04c3fSmrgenum glsl_interface_packing {
82101e04c3fSmrg   GLSL_INTERFACE_PACKING_STD140,
82201e04c3fSmrg   GLSL_INTERFACE_PACKING_SHARED,
82301e04c3fSmrg   GLSL_INTERFACE_PACKING_PACKED,
82401e04c3fSmrg   GLSL_INTERFACE_PACKING_STD430
82501e04c3fSmrg};
82601e04c3fSmrg
82701e04c3fSmrgconst char *glsl_interp_mode_name(enum glsl_interp_mode qual);
82801e04c3fSmrg
82901e04c3fSmrg/**
83001e04c3fSmrg * Fragment program results
83101e04c3fSmrg */
83201e04c3fSmrgtypedef enum
83301e04c3fSmrg{
83401e04c3fSmrg   FRAG_RESULT_DEPTH = 0,
83501e04c3fSmrg   FRAG_RESULT_STENCIL = 1,
83601e04c3fSmrg   /* If a single color should be written to all render targets, this
83701e04c3fSmrg    * register is written.  No FRAG_RESULT_DATAn will be written.
83801e04c3fSmrg    */
83901e04c3fSmrg   FRAG_RESULT_COLOR = 2,
84001e04c3fSmrg   FRAG_RESULT_SAMPLE_MASK = 3,
84101e04c3fSmrg
84201e04c3fSmrg   /* FRAG_RESULT_DATAn are the per-render-target (GLSL gl_FragData[n]
84301e04c3fSmrg    * or ARB_fragment_program fragment.color[n]) color results.  If
84401e04c3fSmrg    * any are written, FRAG_RESULT_COLOR will not be written.
84501e04c3fSmrg    * FRAG_RESULT_DATA1 and up are simply for the benefit of
84601e04c3fSmrg    * gl_frag_result_name() and not to be construed as an upper bound
84701e04c3fSmrg    */
84801e04c3fSmrg   FRAG_RESULT_DATA0 = 4,
84901e04c3fSmrg   FRAG_RESULT_DATA1,
85001e04c3fSmrg   FRAG_RESULT_DATA2,
85101e04c3fSmrg   FRAG_RESULT_DATA3,
85201e04c3fSmrg   FRAG_RESULT_DATA4,
85301e04c3fSmrg   FRAG_RESULT_DATA5,
85401e04c3fSmrg   FRAG_RESULT_DATA6,
85501e04c3fSmrg   FRAG_RESULT_DATA7,
85601e04c3fSmrg} gl_frag_result;
85701e04c3fSmrg
85801e04c3fSmrgconst char *gl_frag_result_name(gl_frag_result result);
85901e04c3fSmrg
86001e04c3fSmrg#define FRAG_RESULT_MAX		(FRAG_RESULT_DATA0 + MAX_DRAW_BUFFERS)
86101e04c3fSmrg
86201e04c3fSmrg/**
86301e04c3fSmrg * \brief Layout qualifiers for gl_FragDepth.
86401e04c3fSmrg *
86501e04c3fSmrg * Extension AMD_conservative_depth allows gl_FragDepth to be redeclared with
86601e04c3fSmrg * a layout qualifier.
86701e04c3fSmrg *
86801e04c3fSmrg * \see enum ir_depth_layout
86901e04c3fSmrg */
87001e04c3fSmrgenum gl_frag_depth_layout
87101e04c3fSmrg{
87201e04c3fSmrg   FRAG_DEPTH_LAYOUT_NONE, /**< No layout is specified. */
87301e04c3fSmrg   FRAG_DEPTH_LAYOUT_ANY,
87401e04c3fSmrg   FRAG_DEPTH_LAYOUT_GREATER,
87501e04c3fSmrg   FRAG_DEPTH_LAYOUT_LESS,
87601e04c3fSmrg   FRAG_DEPTH_LAYOUT_UNCHANGED
87701e04c3fSmrg};
87801e04c3fSmrg
87901e04c3fSmrg/**
88001e04c3fSmrg * \brief Buffer access qualifiers
88101e04c3fSmrg */
88201e04c3fSmrgenum gl_access_qualifier
88301e04c3fSmrg{
88401e04c3fSmrg   ACCESS_COHERENT      = (1 << 0),
88501e04c3fSmrg   ACCESS_RESTRICT      = (1 << 1),
88601e04c3fSmrg   ACCESS_VOLATILE      = (1 << 2),
8877ec681f3Smrg
8887ec681f3Smrg   /* The memory used by the access/variable is not read. */
88901e04c3fSmrg   ACCESS_NON_READABLE  = (1 << 3),
8907ec681f3Smrg
8917ec681f3Smrg   /* The memory used by the access/variable is not written. */
89201e04c3fSmrg   ACCESS_NON_WRITEABLE = (1 << 4),
893ed98bd31Smaya
894ed98bd31Smaya   /** The access may use a non-uniform buffer or image index */
895ed98bd31Smaya   ACCESS_NON_UNIFORM   = (1 << 5),
8967ec681f3Smrg
8977ec681f3Smrg   /* This has the same semantics as NIR_INTRINSIC_CAN_REORDER, only to be
8987ec681f3Smrg    * used with loads. In other words, it means that the load can be
8997ec681f3Smrg    * arbitrarily reordered, or combined with other loads to the same address.
9007ec681f3Smrg    * It is implied by ACCESS_NON_WRITEABLE and a lack of ACCESS_VOLATILE.
9017ec681f3Smrg    */
9027ec681f3Smrg   ACCESS_CAN_REORDER = (1 << 6),
9037ec681f3Smrg
9047ec681f3Smrg   /** Use as little cache space as possible. */
9057ec681f3Smrg   ACCESS_STREAM_CACHE_POLICY = (1 << 7),
90601e04c3fSmrg};
90701e04c3fSmrg
90801e04c3fSmrg/**
90901e04c3fSmrg * \brief Blend support qualifiers
91001e04c3fSmrg */
91101e04c3fSmrgenum gl_advanced_blend_mode
91201e04c3fSmrg{
9137ec681f3Smrg   BLEND_NONE = 0,
9147ec681f3Smrg   BLEND_MULTIPLY,
9157ec681f3Smrg   BLEND_SCREEN,
9167ec681f3Smrg   BLEND_OVERLAY,
9177ec681f3Smrg   BLEND_DARKEN,
9187ec681f3Smrg   BLEND_LIGHTEN,
9197ec681f3Smrg   BLEND_COLORDODGE,
9207ec681f3Smrg   BLEND_COLORBURN,
9217ec681f3Smrg   BLEND_HARDLIGHT,
9227ec681f3Smrg   BLEND_SOFTLIGHT,
9237ec681f3Smrg   BLEND_DIFFERENCE,
9247ec681f3Smrg   BLEND_EXCLUSION,
9257ec681f3Smrg   BLEND_HSL_HUE,
9267ec681f3Smrg   BLEND_HSL_SATURATION,
9277ec681f3Smrg   BLEND_HSL_COLOR,
9287ec681f3Smrg   BLEND_HSL_LUMINOSITY,
9297ec681f3Smrg};
9307ec681f3Smrg
9317ec681f3Smrgenum blend_func
9327ec681f3Smrg{
9337ec681f3Smrg   BLEND_FUNC_ADD,
9347ec681f3Smrg   BLEND_FUNC_SUBTRACT,
9357ec681f3Smrg   BLEND_FUNC_REVERSE_SUBTRACT,
9367ec681f3Smrg   BLEND_FUNC_MIN,
9377ec681f3Smrg   BLEND_FUNC_MAX,
9387ec681f3Smrg};
9397ec681f3Smrg
9407ec681f3Smrgenum blend_factor
9417ec681f3Smrg{
9427ec681f3Smrg   BLEND_FACTOR_ZERO,
9437ec681f3Smrg   BLEND_FACTOR_SRC_COLOR,
9447ec681f3Smrg   BLEND_FACTOR_SRC1_COLOR,
9457ec681f3Smrg   BLEND_FACTOR_DST_COLOR,
9467ec681f3Smrg   BLEND_FACTOR_SRC_ALPHA,
9477ec681f3Smrg   BLEND_FACTOR_SRC1_ALPHA,
9487ec681f3Smrg   BLEND_FACTOR_DST_ALPHA,
9497ec681f3Smrg   BLEND_FACTOR_CONSTANT_COLOR,
9507ec681f3Smrg   BLEND_FACTOR_CONSTANT_ALPHA,
9517ec681f3Smrg   BLEND_FACTOR_SRC_ALPHA_SATURATE,
95201e04c3fSmrg};
95301e04c3fSmrg
95401e04c3fSmrgenum gl_tess_spacing
95501e04c3fSmrg{
95601e04c3fSmrg   TESS_SPACING_UNSPECIFIED,
95701e04c3fSmrg   TESS_SPACING_EQUAL,
95801e04c3fSmrg   TESS_SPACING_FRACTIONAL_ODD,
95901e04c3fSmrg   TESS_SPACING_FRACTIONAL_EVEN,
96001e04c3fSmrg};
96101e04c3fSmrg
96201e04c3fSmrg/**
96301e04c3fSmrg * A compare function enum for use in compiler lowering passes.  This is in
96401e04c3fSmrg * the same order as GL's compare functions (shifted down by GL_NEVER), and is
96501e04c3fSmrg * exactly the same as gallium's PIPE_FUNC_*.
96601e04c3fSmrg */
96701e04c3fSmrgenum compare_func
96801e04c3fSmrg{
96901e04c3fSmrg   COMPARE_FUNC_NEVER,
97001e04c3fSmrg   COMPARE_FUNC_LESS,
97101e04c3fSmrg   COMPARE_FUNC_EQUAL,
97201e04c3fSmrg   COMPARE_FUNC_LEQUAL,
97301e04c3fSmrg   COMPARE_FUNC_GREATER,
97401e04c3fSmrg   COMPARE_FUNC_NOTEQUAL,
97501e04c3fSmrg   COMPARE_FUNC_GEQUAL,
97601e04c3fSmrg   COMPARE_FUNC_ALWAYS,
97701e04c3fSmrg};
97801e04c3fSmrg
979ed98bd31Smaya/**
980ed98bd31Smaya * Arrangements for grouping invocations from NV_compute_shader_derivatives.
981ed98bd31Smaya *
982ed98bd31Smaya *   The extension provides new layout qualifiers that support two different
983ed98bd31Smaya *   arrangements of compute shader invocations for the purpose of derivative
984ed98bd31Smaya *   computation.  When specifying
985ed98bd31Smaya *
986ed98bd31Smaya *     layout(derivative_group_quadsNV) in;
987ed98bd31Smaya *
988ed98bd31Smaya *   compute shader invocations are grouped into 2x2x1 arrays whose four local
989ed98bd31Smaya *   invocation ID values follow the pattern:
990ed98bd31Smaya *
991ed98bd31Smaya *       +-----------------+------------------+
992ed98bd31Smaya *       | (2x+0, 2y+0, z) |  (2x+1, 2y+0, z) |
993ed98bd31Smaya *       +-----------------+------------------+
994ed98bd31Smaya *       | (2x+0, 2y+1, z) |  (2x+1, 2y+1, z) |
995ed98bd31Smaya *       +-----------------+------------------+
996ed98bd31Smaya *
997ed98bd31Smaya *   where Y increases from bottom to top.  When specifying
998ed98bd31Smaya *
999ed98bd31Smaya *     layout(derivative_group_linearNV) in;
1000ed98bd31Smaya *
1001ed98bd31Smaya *   compute shader invocations are grouped into 2x2x1 arrays whose four local
1002ed98bd31Smaya *   invocation index values follow the pattern:
1003ed98bd31Smaya *
1004ed98bd31Smaya *       +------+------+
1005ed98bd31Smaya *       | 4n+0 | 4n+1 |
1006ed98bd31Smaya *       +------+------+
1007ed98bd31Smaya *       | 4n+2 | 4n+3 |
1008ed98bd31Smaya *       +------+------+
1009ed98bd31Smaya *
1010ed98bd31Smaya *   If neither layout qualifier is specified, derivatives in compute shaders
1011ed98bd31Smaya *   return zero, which is consistent with the handling of built-in texture
1012ed98bd31Smaya *   functions like texture() in GLSL 4.50 compute shaders.
1013ed98bd31Smaya */
1014ed98bd31Smayaenum gl_derivative_group {
1015ed98bd31Smaya   DERIVATIVE_GROUP_NONE = 0,
1016ed98bd31Smaya   DERIVATIVE_GROUP_QUADS,
1017ed98bd31Smaya   DERIVATIVE_GROUP_LINEAR,
1018ed98bd31Smaya};
1019ed98bd31Smaya
10207ec681f3Smrgenum float_controls
10217ec681f3Smrg{
10227ec681f3Smrg   FLOAT_CONTROLS_DEFAULT_FLOAT_CONTROL_MODE        = 0x0000,
10237ec681f3Smrg   FLOAT_CONTROLS_DENORM_PRESERVE_FP16              = 0x0001,
10247ec681f3Smrg   FLOAT_CONTROLS_DENORM_PRESERVE_FP32              = 0x0002,
10257ec681f3Smrg   FLOAT_CONTROLS_DENORM_PRESERVE_FP64              = 0x0004,
10267ec681f3Smrg   FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16         = 0x0008,
10277ec681f3Smrg   FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32         = 0x0010,
10287ec681f3Smrg   FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64         = 0x0020,
10297ec681f3Smrg   FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16 = 0x0040,
10307ec681f3Smrg   FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32 = 0x0080,
10317ec681f3Smrg   FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64 = 0x0100,
10327ec681f3Smrg   FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16            = 0x0200,
10337ec681f3Smrg   FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32            = 0x0400,
10347ec681f3Smrg   FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64            = 0x0800,
10357ec681f3Smrg   FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16            = 0x1000,
10367ec681f3Smrg   FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32            = 0x2000,
10377ec681f3Smrg   FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64            = 0x4000,
10387ec681f3Smrg};
10397ec681f3Smrg
10407ec681f3Smrg/**
10417ec681f3Smrg* Enums to describe sampler properties used by OpenCL's inline constant samplers.
10427ec681f3Smrg* These values match the meanings described in the SPIR-V spec.
10437ec681f3Smrg*/
10447ec681f3Smrgenum cl_sampler_addressing_mode {
10457ec681f3Smrg   SAMPLER_ADDRESSING_MODE_NONE = 0,
10467ec681f3Smrg   SAMPLER_ADDRESSING_MODE_CLAMP_TO_EDGE = 1,
10477ec681f3Smrg   SAMPLER_ADDRESSING_MODE_CLAMP = 2,
10487ec681f3Smrg   SAMPLER_ADDRESSING_MODE_REPEAT = 3,
10497ec681f3Smrg   SAMPLER_ADDRESSING_MODE_REPEAT_MIRRORED = 4,
10507ec681f3Smrg};
10517ec681f3Smrg
10527ec681f3Smrgenum cl_sampler_filter_mode {
10537ec681f3Smrg   SAMPLER_FILTER_MODE_NEAREST = 0,
10547ec681f3Smrg   SAMPLER_FILTER_MODE_LINEAR = 1,
10557ec681f3Smrg};
10567ec681f3Smrg
105701e04c3fSmrg#ifdef __cplusplus
105801e04c3fSmrg} /* extern "C" */
105901e04c3fSmrg#endif
106001e04c3fSmrg
106101e04c3fSmrg#endif /* SHADER_ENUMS_H */
1062