17ec681f3Smrg/*
27ec681f3Smrg * Copyright (c) 2012 Rob Clark <robdclark@gmail.com>
37ec681f3Smrg *
47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
57ec681f3Smrg * copy of this software and associated documentation files (the "Software"),
67ec681f3Smrg * to deal in the Software without restriction, including without limitation
77ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
87ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the
97ec681f3Smrg * Software is furnished to do so, subject to the following conditions:
107ec681f3Smrg *
117ec681f3Smrg * The above copyright notice and this permission notice (including the next
127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the
137ec681f3Smrg * Software.
147ec681f3Smrg *
157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
187ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
197ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
207ec681f3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
217ec681f3Smrg * SOFTWARE.
227ec681f3Smrg */
237ec681f3Smrg
247ec681f3Smrg#ifndef INSTR_A2XX_H_
257ec681f3Smrg#define INSTR_A2XX_H_
267ec681f3Smrg
277ec681f3Smrg#define PACKED __attribute__((__packed__))
287ec681f3Smrg
297ec681f3Smrg#include "util/u_math.h"
307ec681f3Smrg#include "adreno_common.xml.h"
317ec681f3Smrg#include "adreno_pm4.xml.h"
327ec681f3Smrg#include "a2xx.xml.h"
337ec681f3Smrg
347ec681f3Smrg/*
357ec681f3Smrg * ALU instructions:
367ec681f3Smrg */
377ec681f3Smrg
387ec681f3Smrgtypedef enum {
397ec681f3Smrg   ADDs = 0,
407ec681f3Smrg   ADD_PREVs = 1,
417ec681f3Smrg   MULs = 2,
427ec681f3Smrg   MUL_PREVs = 3,
437ec681f3Smrg   MUL_PREV2s = 4,
447ec681f3Smrg   MAXs = 5,
457ec681f3Smrg   MINs = 6,
467ec681f3Smrg   SETEs = 7,
477ec681f3Smrg   SETGTs = 8,
487ec681f3Smrg   SETGTEs = 9,
497ec681f3Smrg   SETNEs = 10,
507ec681f3Smrg   FRACs = 11,
517ec681f3Smrg   TRUNCs = 12,
527ec681f3Smrg   FLOORs = 13,
537ec681f3Smrg   EXP_IEEE = 14,
547ec681f3Smrg   LOG_CLAMP = 15,
557ec681f3Smrg   LOG_IEEE = 16,
567ec681f3Smrg   RECIP_CLAMP = 17,
577ec681f3Smrg   RECIP_FF = 18,
587ec681f3Smrg   RECIP_IEEE = 19,
597ec681f3Smrg   RECIPSQ_CLAMP = 20,
607ec681f3Smrg   RECIPSQ_FF = 21,
617ec681f3Smrg   RECIPSQ_IEEE = 22,
627ec681f3Smrg   MOVAs = 23,
637ec681f3Smrg   MOVA_FLOORs = 24,
647ec681f3Smrg   SUBs = 25,
657ec681f3Smrg   SUB_PREVs = 26,
667ec681f3Smrg   PRED_SETEs = 27,
677ec681f3Smrg   PRED_SETNEs = 28,
687ec681f3Smrg   PRED_SETGTs = 29,
697ec681f3Smrg   PRED_SETGTEs = 30,
707ec681f3Smrg   PRED_SET_INVs = 31,
717ec681f3Smrg   PRED_SET_POPs = 32,
727ec681f3Smrg   PRED_SET_CLRs = 33,
737ec681f3Smrg   PRED_SET_RESTOREs = 34,
747ec681f3Smrg   KILLEs = 35,
757ec681f3Smrg   KILLGTs = 36,
767ec681f3Smrg   KILLGTEs = 37,
777ec681f3Smrg   KILLNEs = 38,
787ec681f3Smrg   KILLONEs = 39,
797ec681f3Smrg   SQRT_IEEE = 40,
807ec681f3Smrg   MUL_CONST_0 = 42,
817ec681f3Smrg   MUL_CONST_1 = 43,
827ec681f3Smrg   ADD_CONST_0 = 44,
837ec681f3Smrg   ADD_CONST_1 = 45,
847ec681f3Smrg   SUB_CONST_0 = 46,
857ec681f3Smrg   SUB_CONST_1 = 47,
867ec681f3Smrg   SIN = 48,
877ec681f3Smrg   COS = 49,
887ec681f3Smrg   RETAIN_PREV = 50,
897ec681f3Smrg   SCALAR_NONE = 63,
907ec681f3Smrg} instr_scalar_opc_t;
917ec681f3Smrg
927ec681f3Smrgtypedef enum {
937ec681f3Smrg   ADDv = 0,
947ec681f3Smrg   MULv = 1,
957ec681f3Smrg   MAXv = 2,
967ec681f3Smrg   MINv = 3,
977ec681f3Smrg   SETEv = 4,
987ec681f3Smrg   SETGTv = 5,
997ec681f3Smrg   SETGTEv = 6,
1007ec681f3Smrg   SETNEv = 7,
1017ec681f3Smrg   FRACv = 8,
1027ec681f3Smrg   TRUNCv = 9,
1037ec681f3Smrg   FLOORv = 10,
1047ec681f3Smrg   MULADDv = 11,
1057ec681f3Smrg   CNDEv = 12,
1067ec681f3Smrg   CNDGTEv = 13,
1077ec681f3Smrg   CNDGTv = 14,
1087ec681f3Smrg   DOT4v = 15,
1097ec681f3Smrg   DOT3v = 16,
1107ec681f3Smrg   DOT2ADDv = 17,
1117ec681f3Smrg   CUBEv = 18,
1127ec681f3Smrg   MAX4v = 19,
1137ec681f3Smrg   PRED_SETE_PUSHv = 20,
1147ec681f3Smrg   PRED_SETNE_PUSHv = 21,
1157ec681f3Smrg   PRED_SETGT_PUSHv = 22,
1167ec681f3Smrg   PRED_SETGTE_PUSHv = 23,
1177ec681f3Smrg   KILLEv = 24,
1187ec681f3Smrg   KILLGTv = 25,
1197ec681f3Smrg   KILLGTEv = 26,
1207ec681f3Smrg   KILLNEv = 27,
1217ec681f3Smrg   DSTv = 28,
1227ec681f3Smrg   MOVAv = 29,
1237ec681f3Smrg   VECTOR_NONE = 31,
1247ec681f3Smrg} instr_vector_opc_t;
1257ec681f3Smrg
1267ec681f3Smrgtypedef struct PACKED {
1277ec681f3Smrg   /* dword0: */
1287ec681f3Smrg   uint8_t vector_dest : 6;
1297ec681f3Smrg   uint8_t vector_dest_rel : 1;
1307ec681f3Smrg   uint8_t low_precision_16b_fp : 1;
1317ec681f3Smrg   uint8_t scalar_dest : 6;
1327ec681f3Smrg   uint8_t scalar_dest_rel : 1;
1337ec681f3Smrg   uint8_t export_data : 1;
1347ec681f3Smrg   uint8_t vector_write_mask : 4;
1357ec681f3Smrg   uint8_t scalar_write_mask : 4;
1367ec681f3Smrg   uint8_t vector_clamp : 1;
1377ec681f3Smrg   uint8_t scalar_clamp : 1;
1387ec681f3Smrg   instr_scalar_opc_t scalar_opc : 6;
1397ec681f3Smrg   /* dword1: */
1407ec681f3Smrg   uint8_t src3_swiz : 8;
1417ec681f3Smrg   uint8_t src2_swiz : 8;
1427ec681f3Smrg   uint8_t src1_swiz : 8;
1437ec681f3Smrg   uint8_t src3_reg_negate : 1;
1447ec681f3Smrg   uint8_t src2_reg_negate : 1;
1457ec681f3Smrg   uint8_t src1_reg_negate : 1;
1467ec681f3Smrg   uint8_t pred_select : 2;
1477ec681f3Smrg   uint8_t relative_addr : 1;
1487ec681f3Smrg   uint8_t const_1_rel_abs : 1;
1497ec681f3Smrg   uint8_t const_0_rel_abs : 1;
1507ec681f3Smrg   /* dword2: */
1517ec681f3Smrg   union {
1527ec681f3Smrg      struct {
1537ec681f3Smrg         uint8_t src3_reg : 6;
1547ec681f3Smrg         uint8_t src3_reg_select : 1;
1557ec681f3Smrg         uint8_t src3_reg_abs : 1;
1567ec681f3Smrg         uint8_t src2_reg : 6;
1577ec681f3Smrg         uint8_t src2_reg_select : 1;
1587ec681f3Smrg         uint8_t src2_reg_abs : 1;
1597ec681f3Smrg         uint8_t src1_reg : 6;
1607ec681f3Smrg         uint8_t src1_reg_select : 1;
1617ec681f3Smrg         uint8_t src1_reg_abs : 1;
1627ec681f3Smrg      };
1637ec681f3Smrg      /* constants have full 8-bit index */
1647ec681f3Smrg      struct {
1657ec681f3Smrg         uint8_t src3_reg_byte : 8;
1667ec681f3Smrg         uint8_t src2_reg_byte : 8;
1677ec681f3Smrg         uint8_t src1_reg_byte : 8;
1687ec681f3Smrg      };
1697ec681f3Smrg   };
1707ec681f3Smrg   instr_vector_opc_t vector_opc : 5;
1717ec681f3Smrg   uint8_t src3_sel : 1;
1727ec681f3Smrg   uint8_t src2_sel : 1;
1737ec681f3Smrg   uint8_t src1_sel : 1;
1747ec681f3Smrg} instr_alu_t;
1757ec681f3Smrg
1767ec681f3Smrg/*
1777ec681f3Smrg * CF instructions:
1787ec681f3Smrg */
1797ec681f3Smrg
1807ec681f3Smrgtypedef enum {
1817ec681f3Smrg   NOP = 0,
1827ec681f3Smrg   EXEC = 1,
1837ec681f3Smrg   EXEC_END = 2,
1847ec681f3Smrg   COND_EXEC = 3,
1857ec681f3Smrg   COND_EXEC_END = 4,
1867ec681f3Smrg   COND_PRED_EXEC = 5,
1877ec681f3Smrg   COND_PRED_EXEC_END = 6,
1887ec681f3Smrg   LOOP_START = 7,
1897ec681f3Smrg   LOOP_END = 8,
1907ec681f3Smrg   COND_CALL = 9,
1917ec681f3Smrg   RETURN = 10,
1927ec681f3Smrg   COND_JMP = 11,
1937ec681f3Smrg   ALLOC = 12,
1947ec681f3Smrg   COND_EXEC_PRED_CLEAN = 13,
1957ec681f3Smrg   COND_EXEC_PRED_CLEAN_END = 14,
1967ec681f3Smrg   MARK_VS_FETCH_DONE = 15,
1977ec681f3Smrg} instr_cf_opc_t;
1987ec681f3Smrg
1997ec681f3Smrgtypedef enum {
2007ec681f3Smrg   RELATIVE_ADDR = 0,
2017ec681f3Smrg   ABSOLUTE_ADDR = 1,
2027ec681f3Smrg} instr_addr_mode_t;
2037ec681f3Smrg
2047ec681f3Smrgtypedef enum {
2057ec681f3Smrg   SQ_NO_ALLOC = 0,
2067ec681f3Smrg   SQ_POSITION = 1,
2077ec681f3Smrg   SQ_PARAMETER_PIXEL = 2,
2087ec681f3Smrg   SQ_MEMORY = 3,
2097ec681f3Smrg} instr_alloc_type_t;
2107ec681f3Smrg
2117ec681f3Smrgtypedef struct PACKED {
2127ec681f3Smrg   uint16_t address : 9;
2137ec681f3Smrg   uint8_t reserved0 : 3;
2147ec681f3Smrg   uint8_t count : 3;
2157ec681f3Smrg   uint8_t yeild : 1;
2167ec681f3Smrg   uint16_t serialize : 12;
2177ec681f3Smrg   uint32_t vc : 6; /* vertex cache? */
2187ec681f3Smrg   uint32_t bool_addr : 8;
2197ec681f3Smrg   uint8_t condition : 1;
2207ec681f3Smrg   instr_addr_mode_t address_mode : 1;
2217ec681f3Smrg   instr_cf_opc_t opc : 4;
2227ec681f3Smrg} instr_cf_exec_t;
2237ec681f3Smrg
2247ec681f3Smrgtypedef struct PACKED {
2257ec681f3Smrg   uint16_t address : 10;
2267ec681f3Smrg   uint8_t reserved0 : 6;
2277ec681f3Smrg   uint8_t loop_id : 5;
2287ec681f3Smrg   uint32_t reserved1 : 22;
2297ec681f3Smrg   instr_addr_mode_t address_mode : 1;
2307ec681f3Smrg   instr_cf_opc_t opc : 4;
2317ec681f3Smrg} instr_cf_loop_t;
2327ec681f3Smrg
2337ec681f3Smrgtypedef struct PACKED {
2347ec681f3Smrg   uint16_t address : 10;
2357ec681f3Smrg   uint8_t reserved0 : 3;
2367ec681f3Smrg   uint8_t force_call : 1;
2377ec681f3Smrg   uint8_t predicated_jmp : 1;
2387ec681f3Smrg   uint32_t reserved1 : 18;
2397ec681f3Smrg   uint8_t direction : 1;
2407ec681f3Smrg   uint32_t bool_addr : 8;
2417ec681f3Smrg   uint8_t condition : 1;
2427ec681f3Smrg   instr_addr_mode_t address_mode : 1;
2437ec681f3Smrg   instr_cf_opc_t opc : 4;
2447ec681f3Smrg} instr_cf_jmp_call_t;
2457ec681f3Smrg
2467ec681f3Smrgtypedef struct PACKED {
2477ec681f3Smrg   uint8_t size : 4;
2487ec681f3Smrg   uint64_t reserved0 : 36;
2497ec681f3Smrg   uint8_t no_serial : 1;
2507ec681f3Smrg   instr_alloc_type_t buffer_select : 2;
2517ec681f3Smrg   uint8_t alloc_mode : 1;
2527ec681f3Smrg   instr_cf_opc_t opc : 4;
2537ec681f3Smrg} instr_cf_alloc_t;
2547ec681f3Smrg
2557ec681f3Smrgtypedef union PACKED {
2567ec681f3Smrg   instr_cf_exec_t exec;
2577ec681f3Smrg   instr_cf_loop_t loop;
2587ec681f3Smrg   instr_cf_jmp_call_t jmp_call;
2597ec681f3Smrg   instr_cf_alloc_t alloc;
2607ec681f3Smrg   struct PACKED {
2617ec681f3Smrg      uint64_t dummy : 44;
2627ec681f3Smrg      instr_cf_opc_t opc : 4;
2637ec681f3Smrg   };
2647ec681f3Smrg} instr_cf_t;
2657ec681f3Smrg
2667ec681f3Smrg/*
2677ec681f3Smrg * FETCH instructions:
2687ec681f3Smrg */
2697ec681f3Smrg
2707ec681f3Smrgtypedef enum {
2717ec681f3Smrg   VTX_FETCH = 0,
2727ec681f3Smrg   TEX_FETCH = 1,
2737ec681f3Smrg   TEX_GET_BORDER_COLOR_FRAC = 16,
2747ec681f3Smrg   TEX_GET_COMP_TEX_LOD = 17,
2757ec681f3Smrg   TEX_GET_GRADIENTS = 18,
2767ec681f3Smrg   TEX_GET_WEIGHTS = 19,
2777ec681f3Smrg   TEX_SET_TEX_LOD = 24,
2787ec681f3Smrg   TEX_SET_GRADIENTS_H = 25,
2797ec681f3Smrg   TEX_SET_GRADIENTS_V = 26,
2807ec681f3Smrg   TEX_RESERVED_4 = 27,
2817ec681f3Smrg} instr_fetch_opc_t;
2827ec681f3Smrg
2837ec681f3Smrgtypedef enum {
2847ec681f3Smrg   TEX_FILTER_POINT = 0,
2857ec681f3Smrg   TEX_FILTER_LINEAR = 1,
2867ec681f3Smrg   TEX_FILTER_BASEMAP = 2, /* only applicable for mip-filter */
2877ec681f3Smrg   TEX_FILTER_USE_FETCH_CONST = 3,
2887ec681f3Smrg} instr_tex_filter_t;
2897ec681f3Smrg
2907ec681f3Smrgtypedef enum {
2917ec681f3Smrg   ANISO_FILTER_DISABLED = 0,
2927ec681f3Smrg   ANISO_FILTER_MAX_1_1 = 1,
2937ec681f3Smrg   ANISO_FILTER_MAX_2_1 = 2,
2947ec681f3Smrg   ANISO_FILTER_MAX_4_1 = 3,
2957ec681f3Smrg   ANISO_FILTER_MAX_8_1 = 4,
2967ec681f3Smrg   ANISO_FILTER_MAX_16_1 = 5,
2977ec681f3Smrg   ANISO_FILTER_USE_FETCH_CONST = 7,
2987ec681f3Smrg} instr_aniso_filter_t;
2997ec681f3Smrg
3007ec681f3Smrgtypedef enum {
3017ec681f3Smrg   ARBITRARY_FILTER_2X4_SYM = 0,
3027ec681f3Smrg   ARBITRARY_FILTER_2X4_ASYM = 1,
3037ec681f3Smrg   ARBITRARY_FILTER_4X2_SYM = 2,
3047ec681f3Smrg   ARBITRARY_FILTER_4X2_ASYM = 3,
3057ec681f3Smrg   ARBITRARY_FILTER_4X4_SYM = 4,
3067ec681f3Smrg   ARBITRARY_FILTER_4X4_ASYM = 5,
3077ec681f3Smrg   ARBITRARY_FILTER_USE_FETCH_CONST = 7,
3087ec681f3Smrg} instr_arbitrary_filter_t;
3097ec681f3Smrg
3107ec681f3Smrgtypedef enum {
3117ec681f3Smrg   SAMPLE_CENTROID = 0,
3127ec681f3Smrg   SAMPLE_CENTER = 1,
3137ec681f3Smrg} instr_sample_loc_t;
3147ec681f3Smrg
3157ec681f3Smrgtypedef enum a2xx_sq_surfaceformat instr_surf_fmt_t;
3167ec681f3Smrg
3177ec681f3Smrgtypedef struct PACKED {
3187ec681f3Smrg   /* dword0: */
3197ec681f3Smrg   instr_fetch_opc_t opc : 5;
3207ec681f3Smrg   uint32_t src_reg : 6;
3217ec681f3Smrg   uint8_t src_reg_am : 1;
3227ec681f3Smrg   uint32_t dst_reg : 6;
3237ec681f3Smrg   uint8_t dst_reg_am : 1;
3247ec681f3Smrg   uint8_t fetch_valid_only : 1;
3257ec681f3Smrg   uint32_t const_idx : 5;
3267ec681f3Smrg   uint8_t tx_coord_denorm : 1;
3277ec681f3Smrg   uint8_t src_swiz : 6;
3287ec681f3Smrg   /* dword1: */
3297ec681f3Smrg   uint16_t dst_swiz : 12;
3307ec681f3Smrg   instr_tex_filter_t mag_filter : 2;
3317ec681f3Smrg   instr_tex_filter_t min_filter : 2;
3327ec681f3Smrg   instr_tex_filter_t mip_filter : 2;
3337ec681f3Smrg   instr_aniso_filter_t aniso_filter : 3;
3347ec681f3Smrg   instr_arbitrary_filter_t arbitrary_filter : 3;
3357ec681f3Smrg   instr_tex_filter_t vol_mag_filter : 2;
3367ec681f3Smrg   instr_tex_filter_t vol_min_filter : 2;
3377ec681f3Smrg   uint8_t use_comp_lod : 1;
3387ec681f3Smrg   uint8_t use_reg_lod : 2; /* 0 for cube, 1 for 2d */
3397ec681f3Smrg   uint8_t pred_select : 1;
3407ec681f3Smrg   /* dword2: */
3417ec681f3Smrg   uint8_t use_reg_gradients : 1;
3427ec681f3Smrg   instr_sample_loc_t sample_location : 1;
3437ec681f3Smrg   uint32_t lod_bias : 7;
3447ec681f3Smrg   uint8_t unused : 7;
3457ec681f3Smrg   uint8_t offset_x : 5;
3467ec681f3Smrg   uint32_t offset_y : 5;
3477ec681f3Smrg   uint8_t offset_z : 5;
3487ec681f3Smrg   uint8_t pred_condition : 1;
3497ec681f3Smrg} instr_fetch_tex_t;
3507ec681f3Smrg
3517ec681f3Smrgtypedef struct PACKED {
3527ec681f3Smrg   /* dword0: */
3537ec681f3Smrg   instr_fetch_opc_t opc : 5;
3547ec681f3Smrg   uint32_t src_reg : 6;
3557ec681f3Smrg   uint8_t src_reg_am : 1;
3567ec681f3Smrg   uint32_t dst_reg : 6;
3577ec681f3Smrg   uint8_t dst_reg_am : 1;
3587ec681f3Smrg   uint8_t must_be_one : 1;
3597ec681f3Smrg   uint32_t const_index : 5;
3607ec681f3Smrg   uint8_t const_index_sel : 2;
3617ec681f3Smrg   uint8_t reserved0 : 3;
3627ec681f3Smrg   uint8_t src_swiz : 2;
3637ec681f3Smrg   /* dword1: */
3647ec681f3Smrg   uint16_t dst_swiz : 12;
3657ec681f3Smrg   uint8_t format_comp_all : 1; /* '1' for signed, '0' for unsigned? */
3667ec681f3Smrg   uint8_t num_format_all : 1;  /* '0' for normalized, '1' for unnormalized */
3677ec681f3Smrg   uint8_t signed_rf_mode_all : 1;
3687ec681f3Smrg   uint8_t reserved1 : 1;
3697ec681f3Smrg   instr_surf_fmt_t format : 6;
3707ec681f3Smrg   uint8_t reserved2 : 2;
3717ec681f3Smrg   uint8_t exp_adjust_all : 6;
3727ec681f3Smrg   uint8_t reserved3 : 1;
3737ec681f3Smrg   uint8_t pred_select : 1;
3747ec681f3Smrg   /* dword2: */
3757ec681f3Smrg   uint8_t stride : 8;
3767ec681f3Smrg   uint32_t offset : 22;
3777ec681f3Smrg   uint8_t reserved4 : 1;
3787ec681f3Smrg   uint8_t pred_condition : 1;
3797ec681f3Smrg} instr_fetch_vtx_t;
3807ec681f3Smrg
3817ec681f3Smrgtypedef union PACKED {
3827ec681f3Smrg   instr_fetch_tex_t tex;
3837ec681f3Smrg   instr_fetch_vtx_t vtx;
3847ec681f3Smrg   struct PACKED {
3857ec681f3Smrg      /* dword0: */
3867ec681f3Smrg      instr_fetch_opc_t opc : 5;
3877ec681f3Smrg      uint32_t dummy0 : 27;
3887ec681f3Smrg      /* dword1: */
3897ec681f3Smrg      uint32_t dummy1 : 31;
3907ec681f3Smrg      uint8_t pred_select : 1;
3917ec681f3Smrg      /* dword2: */
3927ec681f3Smrg      uint32_t dummy2 : 31;
3937ec681f3Smrg      uint8_t pred_condition : 1;
3947ec681f3Smrg   };
3957ec681f3Smrg} instr_fetch_t;
3967ec681f3Smrg
3977ec681f3Smrgtypedef union PACKED {
3987ec681f3Smrg   instr_alu_t alu;
3997ec681f3Smrg   instr_fetch_t fetch;
4007ec681f3Smrg} instr_t;
4017ec681f3Smrg
4027ec681f3Smrg#endif /* INSTR_H_ */
403