disasm-a3xx.c revision 7e102996
1/* 2 * Copyright (c) 2013 Rob Clark <robdclark@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24#include <stdio.h> 25#include <stdlib.h> 26#include <stdint.h> 27#include <stdbool.h> 28#include <string.h> 29#include <assert.h> 30 31#include <util/u_debug.h> 32 33#include "instr-a3xx.h" 34 35/* bitmask of debug flags */ 36enum debug_t { 37 PRINT_RAW = 0x1, /* dump raw hexdump */ 38 PRINT_VERBOSE = 0x2, 39}; 40 41static enum debug_t debug; 42 43#define printf debug_printf 44 45static const char *levels[] = { 46 "", 47 "\t", 48 "\t\t", 49 "\t\t\t", 50 "\t\t\t\t", 51 "\t\t\t\t\t", 52 "\t\t\t\t\t\t", 53 "\t\t\t\t\t\t\t", 54 "\t\t\t\t\t\t\t\t", 55 "\t\t\t\t\t\t\t\t\t", 56 "x", 57 "x", 58 "x", 59 "x", 60 "x", 61 "x", 62}; 63 64static const char *component = "xyzw"; 65 66static const char *type[] = { 67 [TYPE_F16] = "f16", 68 [TYPE_F32] = "f32", 69 [TYPE_U16] = "u16", 70 [TYPE_U32] = "u32", 71 [TYPE_S16] = "s16", 72 [TYPE_S32] = "s32", 73 [TYPE_U8] = "u8", 74 [TYPE_S8] = "s8", 75}; 76 77struct disasm_ctx { 78 FILE *out; 79 int level; 80 unsigned gpu_id; 81 82 /* current instruction repeat flag: */ 83 unsigned repeat; 84}; 85 86static void print_reg(struct disasm_ctx *ctx, reg_t reg, bool full, bool r, 87 bool c, bool im, bool neg, bool abs, bool addr_rel) 88{ 89 const char type = c ? 'c' : 'r'; 90 91 // XXX I prefer - and || for neg/abs, but preserving format used 92 // by libllvm-a3xx for easy diffing.. 93 94 if (abs && neg) 95 fprintf(ctx->out, "(absneg)"); 96 else if (neg) 97 fprintf(ctx->out, "(neg)"); 98 else if (abs) 99 fprintf(ctx->out, "(abs)"); 100 101 if (r) 102 fprintf(ctx->out, "(r)"); 103 104 if (im) { 105 fprintf(ctx->out, "%d", reg.iim_val); 106 } else if (addr_rel) { 107 /* I would just use %+d but trying to make it diff'able with 108 * libllvm-a3xx... 109 */ 110 if (reg.iim_val < 0) 111 fprintf(ctx->out, "%s%c<a0.x - %d>", full ? "" : "h", type, -reg.iim_val); 112 else if (reg.iim_val > 0) 113 fprintf(ctx->out, "%s%c<a0.x + %d>", full ? "" : "h", type, reg.iim_val); 114 else 115 fprintf(ctx->out, "%s%c<a0.x>", full ? "" : "h", type); 116 } else if ((reg.num == REG_A0) && !c) { 117 fprintf(ctx->out, "a0.%c", component[reg.comp]); 118 } else if ((reg.num == REG_P0) && !c) { 119 fprintf(ctx->out, "p0.%c", component[reg.comp]); 120 } else { 121 fprintf(ctx->out, "%s%c%d.%c", full ? "" : "h", type, reg.num, component[reg.comp]); 122 } 123} 124 125 126static void print_reg_dst(struct disasm_ctx *ctx, reg_t reg, bool full, bool addr_rel) 127{ 128 print_reg(ctx, reg, full, false, false, false, false, false, addr_rel); 129} 130 131static void print_reg_src(struct disasm_ctx *ctx, reg_t reg, bool full, bool r, 132 bool c, bool im, bool neg, bool abs, bool addr_rel) 133{ 134 print_reg(ctx, reg, full, r, c, im, neg, abs, addr_rel); 135} 136 137/* TODO switch to using reginfo struct everywhere, since more readable 138 * than passing a bunch of bools to print_reg_src 139 */ 140 141struct reginfo { 142 reg_t reg; 143 bool full; 144 bool r; 145 bool c; 146 bool im; 147 bool neg; 148 bool abs; 149 bool addr_rel; 150}; 151 152static void print_src(struct disasm_ctx *ctx, struct reginfo *info) 153{ 154 print_reg_src(ctx, info->reg, info->full, info->r, info->c, info->im, 155 info->neg, info->abs, info->addr_rel); 156} 157 158//static void print_dst(struct disasm_ctx *ctx, struct reginfo *info) 159//{ 160// print_reg_dst(ctx, info->reg, info->full, info->addr_rel); 161//} 162 163static void print_instr_cat0(struct disasm_ctx *ctx, instr_t *instr) 164{ 165 instr_cat0_t *cat0 = &instr->cat0; 166 167 switch (cat0->opc) { 168 case OPC_KILL: 169 fprintf(ctx->out, " %sp0.%c", cat0->inv ? "!" : "", 170 component[cat0->comp]); 171 break; 172 case OPC_BR: 173 fprintf(ctx->out, " %sp0.%c, #%d", cat0->inv ? "!" : "", 174 component[cat0->comp], cat0->a3xx.immed); 175 break; 176 case OPC_JUMP: 177 case OPC_CALL: 178 fprintf(ctx->out, " #%d", cat0->a3xx.immed); 179 break; 180 } 181 182 if ((debug & PRINT_VERBOSE) && (cat0->dummy2|cat0->dummy3|cat0->dummy4)) 183 fprintf(ctx->out, "\t{0: %x,%x,%x}", cat0->dummy2, cat0->dummy3, cat0->dummy4); 184} 185 186static void print_instr_cat1(struct disasm_ctx *ctx, instr_t *instr) 187{ 188 instr_cat1_t *cat1 = &instr->cat1; 189 190 if (cat1->ul) 191 fprintf(ctx->out, "(ul)"); 192 193 if (cat1->src_type == cat1->dst_type) { 194 if ((cat1->src_type == TYPE_S16) && (((reg_t)cat1->dst).num == REG_A0)) { 195 /* special case (nmemonic?): */ 196 fprintf(ctx->out, "mova"); 197 } else { 198 fprintf(ctx->out, "mov.%s%s", type[cat1->src_type], type[cat1->dst_type]); 199 } 200 } else { 201 fprintf(ctx->out, "cov.%s%s", type[cat1->src_type], type[cat1->dst_type]); 202 } 203 204 fprintf(ctx->out, " "); 205 206 if (cat1->even) 207 fprintf(ctx->out, "(even)"); 208 209 if (cat1->pos_inf) 210 fprintf(ctx->out, "(pos_infinity)"); 211 212 print_reg_dst(ctx, (reg_t)(cat1->dst), type_size(cat1->dst_type) == 32, 213 cat1->dst_rel); 214 215 fprintf(ctx->out, ", "); 216 217 /* ugg, have to special case this.. vs print_reg().. */ 218 if (cat1->src_im) { 219 if (type_float(cat1->src_type)) 220 fprintf(ctx->out, "(%f)", cat1->fim_val); 221 else if (type_uint(cat1->src_type)) 222 fprintf(ctx->out, "0x%08x", cat1->uim_val); 223 else 224 fprintf(ctx->out, "%d", cat1->iim_val); 225 } else if (cat1->src_rel && !cat1->src_c) { 226 /* I would just use %+d but trying to make it diff'able with 227 * libllvm-a3xx... 228 */ 229 char type = cat1->src_rel_c ? 'c' : 'r'; 230 if (cat1->off < 0) 231 fprintf(ctx->out, "%c<a0.x - %d>", type, -cat1->off); 232 else if (cat1->off > 0) 233 fprintf(ctx->out, "%c<a0.x + %d>", type, cat1->off); 234 else 235 fprintf(ctx->out, "%c<a0.x>", type); 236 } else { 237 print_reg_src(ctx, (reg_t)(cat1->src), type_size(cat1->src_type) == 32, 238 cat1->src_r, cat1->src_c, cat1->src_im, false, false, false); 239 } 240 241 if ((debug & PRINT_VERBOSE) && (cat1->must_be_0)) 242 fprintf(ctx->out, "\t{1: %x}", cat1->must_be_0); 243} 244 245static void print_instr_cat2(struct disasm_ctx *ctx, instr_t *instr) 246{ 247 instr_cat2_t *cat2 = &instr->cat2; 248 static const char *cond[] = { 249 "lt", 250 "le", 251 "gt", 252 "ge", 253 "eq", 254 "ne", 255 "?6?", 256 }; 257 258 switch (_OPC(2, cat2->opc)) { 259 case OPC_CMPS_F: 260 case OPC_CMPS_U: 261 case OPC_CMPS_S: 262 case OPC_CMPV_F: 263 case OPC_CMPV_U: 264 case OPC_CMPV_S: 265 fprintf(ctx->out, ".%s", cond[cat2->cond]); 266 break; 267 } 268 269 fprintf(ctx->out, " "); 270 if (cat2->ei) 271 fprintf(ctx->out, "(ei)"); 272 print_reg_dst(ctx, (reg_t)(cat2->dst), cat2->full ^ cat2->dst_half, false); 273 fprintf(ctx->out, ", "); 274 275 unsigned src1_r = cat2->repeat ? cat2->src1_r : 0; 276 if (cat2->c1.src1_c) { 277 print_reg_src(ctx, (reg_t)(cat2->c1.src1), cat2->full, src1_r, 278 cat2->c1.src1_c, cat2->src1_im, cat2->src1_neg, 279 cat2->src1_abs, false); 280 } else if (cat2->rel1.src1_rel) { 281 print_reg_src(ctx, (reg_t)(cat2->rel1.src1), cat2->full, src1_r, 282 cat2->rel1.src1_c, cat2->src1_im, cat2->src1_neg, 283 cat2->src1_abs, cat2->rel1.src1_rel); 284 } else { 285 print_reg_src(ctx, (reg_t)(cat2->src1), cat2->full, src1_r, 286 false, cat2->src1_im, cat2->src1_neg, 287 cat2->src1_abs, false); 288 } 289 290 unsigned src2_r = cat2->repeat ? cat2->src2_r : 0; 291 switch (_OPC(2, cat2->opc)) { 292 case OPC_ABSNEG_F: 293 case OPC_ABSNEG_S: 294 case OPC_CLZ_B: 295 case OPC_CLZ_S: 296 case OPC_SIGN_F: 297 case OPC_FLOOR_F: 298 case OPC_CEIL_F: 299 case OPC_RNDNE_F: 300 case OPC_RNDAZ_F: 301 case OPC_TRUNC_F: 302 case OPC_NOT_B: 303 case OPC_BFREV_B: 304 case OPC_SETRM: 305 case OPC_CBITS_B: 306 /* these only have one src reg */ 307 break; 308 default: 309 fprintf(ctx->out, ", "); 310 if (cat2->c2.src2_c) { 311 print_reg_src(ctx, (reg_t)(cat2->c2.src2), cat2->full, src2_r, 312 cat2->c2.src2_c, cat2->src2_im, cat2->src2_neg, 313 cat2->src2_abs, false); 314 } else if (cat2->rel2.src2_rel) { 315 print_reg_src(ctx, (reg_t)(cat2->rel2.src2), cat2->full, src2_r, 316 cat2->rel2.src2_c, cat2->src2_im, cat2->src2_neg, 317 cat2->src2_abs, cat2->rel2.src2_rel); 318 } else { 319 print_reg_src(ctx, (reg_t)(cat2->src2), cat2->full, src2_r, 320 false, cat2->src2_im, cat2->src2_neg, 321 cat2->src2_abs, false); 322 } 323 break; 324 } 325} 326 327static void print_instr_cat3(struct disasm_ctx *ctx, instr_t *instr) 328{ 329 instr_cat3_t *cat3 = &instr->cat3; 330 bool full = instr_cat3_full(cat3); 331 332 fprintf(ctx->out, " "); 333 print_reg_dst(ctx, (reg_t)(cat3->dst), full ^ cat3->dst_half, false); 334 fprintf(ctx->out, ", "); 335 unsigned src1_r = cat3->repeat ? cat3->src1_r : 0; 336 if (cat3->c1.src1_c) { 337 print_reg_src(ctx, (reg_t)(cat3->c1.src1), full, 338 src1_r, cat3->c1.src1_c, false, cat3->src1_neg, 339 false, false); 340 } else if (cat3->rel1.src1_rel) { 341 print_reg_src(ctx, (reg_t)(cat3->rel1.src1), full, 342 src1_r, cat3->rel1.src1_c, false, cat3->src1_neg, 343 false, cat3->rel1.src1_rel); 344 } else { 345 print_reg_src(ctx, (reg_t)(cat3->src1), full, 346 src1_r, false, false, cat3->src1_neg, 347 false, false); 348 } 349 fprintf(ctx->out, ", "); 350 unsigned src2_r = cat3->repeat ? cat3->src2_r : 0; 351 print_reg_src(ctx, (reg_t)cat3->src2, full, 352 src2_r, cat3->src2_c, false, cat3->src2_neg, 353 false, false); 354 fprintf(ctx->out, ", "); 355 if (cat3->c2.src3_c) { 356 print_reg_src(ctx, (reg_t)(cat3->c2.src3), full, 357 cat3->src3_r, cat3->c2.src3_c, false, cat3->src3_neg, 358 false, false); 359 } else if (cat3->rel2.src3_rel) { 360 print_reg_src(ctx, (reg_t)(cat3->rel2.src3), full, 361 cat3->src3_r, cat3->rel2.src3_c, false, cat3->src3_neg, 362 false, cat3->rel2.src3_rel); 363 } else { 364 print_reg_src(ctx, (reg_t)(cat3->src3), full, 365 cat3->src3_r, false, false, cat3->src3_neg, 366 false, false); 367 } 368} 369 370static void print_instr_cat4(struct disasm_ctx *ctx, instr_t *instr) 371{ 372 instr_cat4_t *cat4 = &instr->cat4; 373 374 fprintf(ctx->out, " "); 375 print_reg_dst(ctx, (reg_t)(cat4->dst), cat4->full ^ cat4->dst_half, false); 376 fprintf(ctx->out, ", "); 377 378 if (cat4->c.src_c) { 379 print_reg_src(ctx, (reg_t)(cat4->c.src), cat4->full, 380 cat4->src_r, cat4->c.src_c, cat4->src_im, 381 cat4->src_neg, cat4->src_abs, false); 382 } else if (cat4->rel.src_rel) { 383 print_reg_src(ctx, (reg_t)(cat4->rel.src), cat4->full, 384 cat4->src_r, cat4->rel.src_c, cat4->src_im, 385 cat4->src_neg, cat4->src_abs, cat4->rel.src_rel); 386 } else { 387 print_reg_src(ctx, (reg_t)(cat4->src), cat4->full, 388 cat4->src_r, false, cat4->src_im, 389 cat4->src_neg, cat4->src_abs, false); 390 } 391 392 if ((debug & PRINT_VERBOSE) && (cat4->dummy1|cat4->dummy2)) 393 fprintf(ctx->out, "\t{4: %x,%x}", cat4->dummy1, cat4->dummy2); 394} 395 396static void print_instr_cat5(struct disasm_ctx *ctx, instr_t *instr) 397{ 398 static const struct { 399 bool src1, src2, samp, tex; 400 } info[0x1f] = { 401 [opc_op(OPC_ISAM)] = { true, false, true, true, }, 402 [opc_op(OPC_ISAML)] = { true, true, true, true, }, 403 [opc_op(OPC_ISAMM)] = { true, false, true, true, }, 404 [opc_op(OPC_SAM)] = { true, false, true, true, }, 405 [opc_op(OPC_SAMB)] = { true, true, true, true, }, 406 [opc_op(OPC_SAML)] = { true, true, true, true, }, 407 [opc_op(OPC_SAMGQ)] = { true, false, true, true, }, 408 [opc_op(OPC_GETLOD)] = { true, false, true, true, }, 409 [opc_op(OPC_CONV)] = { true, true, true, true, }, 410 [opc_op(OPC_CONVM)] = { true, true, true, true, }, 411 [opc_op(OPC_GETSIZE)] = { true, false, false, true, }, 412 [opc_op(OPC_GETBUF)] = { false, false, false, true, }, 413 [opc_op(OPC_GETPOS)] = { true, false, false, true, }, 414 [opc_op(OPC_GETINFO)] = { false, false, false, true, }, 415 [opc_op(OPC_DSX)] = { true, false, false, false, }, 416 [opc_op(OPC_DSY)] = { true, false, false, false, }, 417 [opc_op(OPC_GATHER4R)] = { true, false, true, true, }, 418 [opc_op(OPC_GATHER4G)] = { true, false, true, true, }, 419 [opc_op(OPC_GATHER4B)] = { true, false, true, true, }, 420 [opc_op(OPC_GATHER4A)] = { true, false, true, true, }, 421 [opc_op(OPC_SAMGP0)] = { true, false, true, true, }, 422 [opc_op(OPC_SAMGP1)] = { true, false, true, true, }, 423 [opc_op(OPC_SAMGP2)] = { true, false, true, true, }, 424 [opc_op(OPC_SAMGP3)] = { true, false, true, true, }, 425 [opc_op(OPC_DSXPP_1)] = { true, false, false, false, }, 426 [opc_op(OPC_DSYPP_1)] = { true, false, false, false, }, 427 [opc_op(OPC_RGETPOS)] = { true, false, false, false, }, 428 [opc_op(OPC_RGETINFO)] = { false, false, false, false, }, 429 }; 430 instr_cat5_t *cat5 = &instr->cat5; 431 int i; 432 433 if (cat5->is_3d) fprintf(ctx->out, ".3d"); 434 if (cat5->is_a) fprintf(ctx->out, ".a"); 435 if (cat5->is_o) fprintf(ctx->out, ".o"); 436 if (cat5->is_p) fprintf(ctx->out, ".p"); 437 if (cat5->is_s) fprintf(ctx->out, ".s"); 438 if (cat5->is_s2en) fprintf(ctx->out, ".s2en"); 439 440 fprintf(ctx->out, " "); 441 442 switch (_OPC(5, cat5->opc)) { 443 case OPC_DSXPP_1: 444 case OPC_DSYPP_1: 445 break; 446 default: 447 fprintf(ctx->out, "(%s)", type[cat5->type]); 448 break; 449 } 450 451 fprintf(ctx->out, "("); 452 for (i = 0; i < 4; i++) 453 if (cat5->wrmask & (1 << i)) 454 fprintf(ctx->out, "%c", "xyzw"[i]); 455 fprintf(ctx->out, ")"); 456 457 print_reg_dst(ctx, (reg_t)(cat5->dst), type_size(cat5->type) == 32, false); 458 459 if (info[cat5->opc].src1) { 460 fprintf(ctx->out, ", "); 461 print_reg_src(ctx, (reg_t)(cat5->src1), cat5->full, false, false, false, 462 false, false, false); 463 } 464 465 if (cat5->is_s2en) { 466 if (cat5->is_o || info[cat5->opc].src2) { 467 fprintf(ctx->out, ", "); 468 print_reg_src(ctx, (reg_t)(cat5->s2en.src2), cat5->full, 469 false, false, false, false, false, false); 470 } 471 fprintf(ctx->out, ", "); 472 print_reg_src(ctx, (reg_t)(cat5->s2en.src3), false, false, false, false, 473 false, false, false); 474 } else { 475 if (cat5->is_o || info[cat5->opc].src2) { 476 fprintf(ctx->out, ", "); 477 print_reg_src(ctx, (reg_t)(cat5->norm.src2), cat5->full, 478 false, false, false, false, false, false); 479 } 480 if (info[cat5->opc].samp) 481 fprintf(ctx->out, ", s#%d", cat5->norm.samp); 482 if (info[cat5->opc].tex) 483 fprintf(ctx->out, ", t#%d", cat5->norm.tex); 484 } 485 486 if (debug & PRINT_VERBOSE) { 487 if (cat5->is_s2en) { 488 if ((debug & PRINT_VERBOSE) && (cat5->s2en.dummy1|cat5->s2en.dummy2|cat5->dummy2)) 489 fprintf(ctx->out, "\t{5: %x,%x,%x}", cat5->s2en.dummy1, cat5->s2en.dummy2, cat5->dummy2); 490 } else { 491 if ((debug & PRINT_VERBOSE) && (cat5->norm.dummy1|cat5->dummy2)) 492 fprintf(ctx->out, "\t{5: %x,%x}", cat5->norm.dummy1, cat5->dummy2); 493 } 494 } 495} 496 497static void print_instr_cat6_a3xx(struct disasm_ctx *ctx, instr_t *instr) 498{ 499 instr_cat6_t *cat6 = &instr->cat6; 500 char sd = 0, ss = 0; /* dst/src address space */ 501 bool nodst = false; 502 struct reginfo dst, src1, src2; 503 int src1off = 0, dstoff = 0; 504 505 memset(&dst, 0, sizeof(dst)); 506 memset(&src1, 0, sizeof(src1)); 507 memset(&src2, 0, sizeof(src2)); 508 509 switch (_OPC(6, cat6->opc)) { 510 case OPC_RESINFO: 511 case OPC_RESFMT: 512 dst.full = type_size(cat6->type) == 32; 513 src1.full = type_size(cat6->type) == 32; 514 src2.full = type_size(cat6->type) == 32; 515 break; 516 case OPC_L2G: 517 case OPC_G2L: 518 dst.full = true; 519 src1.full = true; 520 src2.full = true; 521 break; 522 case OPC_STG: 523 case OPC_STL: 524 case OPC_STP: 525 case OPC_STLW: 526 case OPC_STIB: 527 dst.full = true; 528 src1.full = type_size(cat6->type) == 32; 529 src2.full = type_size(cat6->type) == 32; 530 break; 531 default: 532 dst.full = type_size(cat6->type) == 32; 533 src1.full = true; 534 src2.full = true; 535 break; 536 } 537 538 switch (_OPC(6, cat6->opc)) { 539 case OPC_PREFETCH: 540 break; 541 case OPC_RESINFO: 542 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1); 543 break; 544 case OPC_LDGB: 545 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped"); 546 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1); 547 fprintf(ctx->out, ".%s", type[cat6->type]); 548 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1); 549 break; 550 case OPC_STGB: 551 case OPC_STIB: 552 fprintf(ctx->out, ".%s", cat6->stgb.typed ? "typed" : "untyped"); 553 fprintf(ctx->out, ".%dd", cat6->stgb.d + 1); 554 fprintf(ctx->out, ".%s", type[cat6->type]); 555 fprintf(ctx->out, ".%d", cat6->stgb.type_size + 1); 556 break; 557 case OPC_ATOMIC_ADD: 558 case OPC_ATOMIC_SUB: 559 case OPC_ATOMIC_XCHG: 560 case OPC_ATOMIC_INC: 561 case OPC_ATOMIC_DEC: 562 case OPC_ATOMIC_CMPXCHG: 563 case OPC_ATOMIC_MIN: 564 case OPC_ATOMIC_MAX: 565 case OPC_ATOMIC_AND: 566 case OPC_ATOMIC_OR: 567 case OPC_ATOMIC_XOR: 568 ss = cat6->g ? 'g' : 'l'; 569 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped"); 570 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1); 571 fprintf(ctx->out, ".%s", type[cat6->type]); 572 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1); 573 fprintf(ctx->out, ".%c", ss); 574 break; 575 default: 576 dst.im = cat6->g && !cat6->dst_off; 577 fprintf(ctx->out, ".%s", type[cat6->type]); 578 break; 579 } 580 fprintf(ctx->out, " "); 581 582 switch (_OPC(6, cat6->opc)) { 583 case OPC_STG: 584 sd = 'g'; 585 break; 586 case OPC_STP: 587 sd = 'p'; 588 break; 589 case OPC_STL: 590 case OPC_STLW: 591 sd = 'l'; 592 break; 593 594 case OPC_LDG: 595 case OPC_LDC: 596 ss = 'g'; 597 break; 598 case OPC_LDP: 599 ss = 'p'; 600 break; 601 case OPC_LDL: 602 case OPC_LDLW: 603 case OPC_LDLV: 604 ss = 'l'; 605 break; 606 607 case OPC_L2G: 608 ss = 'l'; 609 sd = 'g'; 610 break; 611 612 case OPC_G2L: 613 ss = 'g'; 614 sd = 'l'; 615 break; 616 617 case OPC_PREFETCH: 618 ss = 'g'; 619 nodst = true; 620 break; 621 } 622 623 if ((_OPC(6, cat6->opc) == OPC_STGB) || (_OPC(6, cat6->opc) == OPC_STIB)) { 624 struct reginfo src3; 625 626 memset(&src3, 0, sizeof(src3)); 627 628 src1.reg = (reg_t)(cat6->stgb.src1); 629 src2.reg = (reg_t)(cat6->stgb.src2); 630 src2.im = cat6->stgb.src2_im; 631 src3.reg = (reg_t)(cat6->stgb.src3); 632 src3.im = cat6->stgb.src3_im; 633 src3.full = true; 634 635 fprintf(ctx->out, "g[%u], ", cat6->stgb.dst_ssbo); 636 print_src(ctx, &src1); 637 fprintf(ctx->out, ", "); 638 print_src(ctx, &src2); 639 fprintf(ctx->out, ", "); 640 print_src(ctx, &src3); 641 642 if (debug & PRINT_VERBOSE) 643 fprintf(ctx->out, " (pad0=%x, pad3=%x)", cat6->stgb.pad0, cat6->stgb.pad3); 644 645 return; 646 } 647 648 if (is_atomic(_OPC(6, cat6->opc))) { 649 650 src1.reg = (reg_t)(cat6->ldgb.src1); 651 src1.im = cat6->ldgb.src1_im; 652 src2.reg = (reg_t)(cat6->ldgb.src2); 653 src2.im = cat6->ldgb.src2_im; 654 dst.reg = (reg_t)(cat6->ldgb.dst); 655 656 print_src(ctx, &dst); 657 fprintf(ctx->out, ", "); 658 if (ss == 'g') { 659 struct reginfo src3; 660 memset(&src3, 0, sizeof(src3)); 661 662 src3.reg = (reg_t)(cat6->ldgb.src3); 663 src3.full = true; 664 665 /* For images, the ".typed" variant is used and src2 is 666 * the ivecN coordinates, ie ivec2 for 2d. 667 * 668 * For SSBOs, the ".untyped" variant is used and src2 is 669 * a simple dword offset.. src3 appears to be 670 * uvec2(offset * 4, 0). Not sure the point of that. 671 */ 672 673 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo); 674 print_src(ctx, &src1); /* value */ 675 fprintf(ctx->out, ", "); 676 print_src(ctx, &src2); /* offset/coords */ 677 fprintf(ctx->out, ", "); 678 print_src(ctx, &src3); /* 64b byte offset.. */ 679 680 if (debug & PRINT_VERBOSE) { 681 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0, 682 cat6->ldgb.pad3, cat6->ldgb.mustbe0); 683 } 684 } else { /* ss == 'l' */ 685 fprintf(ctx->out, "l["); 686 print_src(ctx, &src1); /* simple byte offset */ 687 fprintf(ctx->out, "], "); 688 print_src(ctx, &src2); /* value */ 689 690 if (debug & PRINT_VERBOSE) { 691 fprintf(ctx->out, " (src3=%x, pad0=%x, pad3=%x, mustbe0=%x)", 692 cat6->ldgb.src3, cat6->ldgb.pad0, 693 cat6->ldgb.pad3, cat6->ldgb.mustbe0); 694 } 695 } 696 697 return; 698 } else if (_OPC(6, cat6->opc) == OPC_RESINFO) { 699 dst.reg = (reg_t)(cat6->ldgb.dst); 700 701 print_src(ctx, &dst); 702 fprintf(ctx->out, ", "); 703 fprintf(ctx->out, "g[%u]", cat6->ldgb.src_ssbo); 704 705 return; 706 } else if (_OPC(6, cat6->opc) == OPC_LDGB) { 707 708 src1.reg = (reg_t)(cat6->ldgb.src1); 709 src1.im = cat6->ldgb.src1_im; 710 src2.reg = (reg_t)(cat6->ldgb.src2); 711 src2.im = cat6->ldgb.src2_im; 712 dst.reg = (reg_t)(cat6->ldgb.dst); 713 714 print_src(ctx, &dst); 715 fprintf(ctx->out, ", "); 716 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo); 717 print_src(ctx, &src1); 718 fprintf(ctx->out, ", "); 719 print_src(ctx, &src2); 720 721 if (debug & PRINT_VERBOSE) 722 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0, cat6->ldgb.pad3, cat6->ldgb.mustbe0); 723 724 return; 725 } 726 if (cat6->dst_off) { 727 dst.reg = (reg_t)(cat6->c.dst); 728 dstoff = cat6->c.off; 729 } else { 730 dst.reg = (reg_t)(cat6->d.dst); 731 } 732 733 if (cat6->src_off) { 734 src1.reg = (reg_t)(cat6->a.src1); 735 src1.im = cat6->a.src1_im; 736 src2.reg = (reg_t)(cat6->a.src2); 737 src2.im = cat6->a.src2_im; 738 src1off = cat6->a.off; 739 } else { 740 src1.reg = (reg_t)(cat6->b.src1); 741 src1.im = cat6->b.src1_im; 742 src2.reg = (reg_t)(cat6->b.src2); 743 src2.im = cat6->b.src2_im; 744 } 745 746 if (!nodst) { 747 if (sd) 748 fprintf(ctx->out, "%c[", sd); 749 /* note: dst might actually be a src (ie. address to store to) */ 750 print_src(ctx, &dst); 751 if (dstoff) 752 fprintf(ctx->out, "%+d", dstoff); 753 if (sd) 754 fprintf(ctx->out, "]"); 755 fprintf(ctx->out, ", "); 756 } 757 758 if (ss) 759 fprintf(ctx->out, "%c[", ss); 760 761 /* can have a larger than normal immed, so hack: */ 762 if (src1.im) { 763 fprintf(ctx->out, "%u", src1.reg.dummy13); 764 } else { 765 print_src(ctx, &src1); 766 } 767 768 if (src1off) 769 fprintf(ctx->out, "%+d", src1off); 770 if (ss) 771 fprintf(ctx->out, "]"); 772 773 switch (_OPC(6, cat6->opc)) { 774 case OPC_RESINFO: 775 case OPC_RESFMT: 776 break; 777 default: 778 fprintf(ctx->out, ", "); 779 print_src(ctx, &src2); 780 break; 781 } 782} 783 784static void print_instr_cat6_a6xx(struct disasm_ctx *ctx, instr_t *instr) 785{ 786 instr_cat6_a6xx_t *cat6 = &instr->cat6_a6xx; 787 struct reginfo src1, src2; 788 bool has_dest = _OPC(6, cat6->opc) == OPC_LDIB; 789 char ss = 0; 790 791 memset(&src1, 0, sizeof(src1)); 792 memset(&src2, 0, sizeof(src2)); 793 794 fprintf(ctx->out, ".%s", cat6->typed ? "typed" : "untyped"); 795 fprintf(ctx->out, ".%dd", cat6->d + 1); 796 fprintf(ctx->out, ".%s", type[cat6->type]); 797 fprintf(ctx->out, ".%u ", cat6->type_size + 1); 798 799 if (has_dest) { 800 src2.reg = (reg_t)(cat6->src2); 801 src2.full = true; // XXX 802 print_src(ctx, &src2); 803 804 fprintf(ctx->out, ", "); 805 } 806 807 /* NOTE: blob seems to use old encoding for ldl/stl (local memory) */ 808 ss = 'g'; 809 810 fprintf(ctx->out, "%c[%u", ss, cat6->ssbo); 811 fprintf(ctx->out, "] + "); 812 src1.reg = (reg_t)(cat6->src1); 813 src1.full = true; // XXX 814 print_src(ctx, &src1); 815 816 if (!has_dest) { 817 fprintf(ctx->out, ", "); 818 819 src2.reg = (reg_t)(cat6->src2); 820 src2.full = true; // XXX 821 print_src(ctx, &src2); 822 } 823 824 if (debug & PRINT_VERBOSE) { 825 fprintf(ctx->out, " (pad1=%x, pad2=%x, pad3=%x, pad4=%x)", cat6->pad1, 826 cat6->pad2, cat6->pad3, cat6->pad4); 827 } 828} 829 830static void print_instr_cat6(struct disasm_ctx *ctx, instr_t *instr) 831{ 832 if (!is_cat6_legacy(instr, ctx->gpu_id)) { 833 print_instr_cat6_a6xx(ctx, instr); 834 if (debug & PRINT_VERBOSE) 835 fprintf(ctx->out, " NEW"); 836 } else { 837 print_instr_cat6_a3xx(ctx, instr); 838 if (debug & PRINT_VERBOSE) 839 fprintf(ctx->out, " LEGACY"); 840 } 841} 842static void print_instr_cat7(struct disasm_ctx *ctx, instr_t *instr) 843{ 844 instr_cat7_t *cat7 = &instr->cat7; 845 846 if (cat7->g) 847 fprintf(ctx->out, ".g"); 848 if (cat7->l) 849 fprintf(ctx->out, ".l"); 850 851 if (_OPC(7, cat7->opc) == OPC_FENCE) { 852 if (cat7->r) 853 fprintf(ctx->out, ".r"); 854 if (cat7->w) 855 fprintf(ctx->out, ".w"); 856 } 857} 858 859/* size of largest OPC field of all the instruction categories: */ 860#define NOPC_BITS 6 861 862static const struct opc_info { 863 uint16_t cat; 864 uint16_t opc; 865 const char *name; 866 void (*print)(struct disasm_ctx *ctx, instr_t *instr); 867} opcs[1 << (3+NOPC_BITS)] = { 868#define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat } 869 /* category 0: */ 870 OPC(0, OPC_NOP, nop), 871 OPC(0, OPC_BR, br), 872 OPC(0, OPC_JUMP, jump), 873 OPC(0, OPC_CALL, call), 874 OPC(0, OPC_RET, ret), 875 OPC(0, OPC_KILL, kill), 876 OPC(0, OPC_END, end), 877 OPC(0, OPC_EMIT, emit), 878 OPC(0, OPC_CUT, cut), 879 OPC(0, OPC_CHMASK, chmask), 880 OPC(0, OPC_CHSH, chsh), 881 OPC(0, OPC_FLOW_REV, flow_rev), 882 883 /* category 1: */ 884 OPC(1, OPC_MOV, ), 885 886 /* category 2: */ 887 OPC(2, OPC_ADD_F, add.f), 888 OPC(2, OPC_MIN_F, min.f), 889 OPC(2, OPC_MAX_F, max.f), 890 OPC(2, OPC_MUL_F, mul.f), 891 OPC(2, OPC_SIGN_F, sign.f), 892 OPC(2, OPC_CMPS_F, cmps.f), 893 OPC(2, OPC_ABSNEG_F, absneg.f), 894 OPC(2, OPC_CMPV_F, cmpv.f), 895 OPC(2, OPC_FLOOR_F, floor.f), 896 OPC(2, OPC_CEIL_F, ceil.f), 897 OPC(2, OPC_RNDNE_F, rndne.f), 898 OPC(2, OPC_RNDAZ_F, rndaz.f), 899 OPC(2, OPC_TRUNC_F, trunc.f), 900 OPC(2, OPC_ADD_U, add.u), 901 OPC(2, OPC_ADD_S, add.s), 902 OPC(2, OPC_SUB_U, sub.u), 903 OPC(2, OPC_SUB_S, sub.s), 904 OPC(2, OPC_CMPS_U, cmps.u), 905 OPC(2, OPC_CMPS_S, cmps.s), 906 OPC(2, OPC_MIN_U, min.u), 907 OPC(2, OPC_MIN_S, min.s), 908 OPC(2, OPC_MAX_U, max.u), 909 OPC(2, OPC_MAX_S, max.s), 910 OPC(2, OPC_ABSNEG_S, absneg.s), 911 OPC(2, OPC_AND_B, and.b), 912 OPC(2, OPC_OR_B, or.b), 913 OPC(2, OPC_NOT_B, not.b), 914 OPC(2, OPC_XOR_B, xor.b), 915 OPC(2, OPC_CMPV_U, cmpv.u), 916 OPC(2, OPC_CMPV_S, cmpv.s), 917 OPC(2, OPC_MUL_U, mul.u), 918 OPC(2, OPC_MUL_S, mul.s), 919 OPC(2, OPC_MULL_U, mull.u), 920 OPC(2, OPC_BFREV_B, bfrev.b), 921 OPC(2, OPC_CLZ_S, clz.s), 922 OPC(2, OPC_CLZ_B, clz.b), 923 OPC(2, OPC_SHL_B, shl.b), 924 OPC(2, OPC_SHR_B, shr.b), 925 OPC(2, OPC_ASHR_B, ashr.b), 926 OPC(2, OPC_BARY_F, bary.f), 927 OPC(2, OPC_MGEN_B, mgen.b), 928 OPC(2, OPC_GETBIT_B, getbit.b), 929 OPC(2, OPC_SETRM, setrm), 930 OPC(2, OPC_CBITS_B, cbits.b), 931 OPC(2, OPC_SHB, shb), 932 OPC(2, OPC_MSAD, msad), 933 934 /* category 3: */ 935 OPC(3, OPC_MAD_U16, mad.u16), 936 OPC(3, OPC_MADSH_U16, madsh.u16), 937 OPC(3, OPC_MAD_S16, mad.s16), 938 OPC(3, OPC_MADSH_M16, madsh.m16), 939 OPC(3, OPC_MAD_U24, mad.u24), 940 OPC(3, OPC_MAD_S24, mad.s24), 941 OPC(3, OPC_MAD_F16, mad.f16), 942 OPC(3, OPC_MAD_F32, mad.f32), 943 OPC(3, OPC_SEL_B16, sel.b16), 944 OPC(3, OPC_SEL_B32, sel.b32), 945 OPC(3, OPC_SEL_S16, sel.s16), 946 OPC(3, OPC_SEL_S32, sel.s32), 947 OPC(3, OPC_SEL_F16, sel.f16), 948 OPC(3, OPC_SEL_F32, sel.f32), 949 OPC(3, OPC_SAD_S16, sad.s16), 950 OPC(3, OPC_SAD_S32, sad.s32), 951 952 /* category 4: */ 953 OPC(4, OPC_RCP, rcp), 954 OPC(4, OPC_RSQ, rsq), 955 OPC(4, OPC_LOG2, log2), 956 OPC(4, OPC_EXP2, exp2), 957 OPC(4, OPC_SIN, sin), 958 OPC(4, OPC_COS, cos), 959 OPC(4, OPC_SQRT, sqrt), 960 961 /* category 5: */ 962 OPC(5, OPC_ISAM, isam), 963 OPC(5, OPC_ISAML, isaml), 964 OPC(5, OPC_ISAMM, isamm), 965 OPC(5, OPC_SAM, sam), 966 OPC(5, OPC_SAMB, samb), 967 OPC(5, OPC_SAML, saml), 968 OPC(5, OPC_SAMGQ, samgq), 969 OPC(5, OPC_GETLOD, getlod), 970 OPC(5, OPC_CONV, conv), 971 OPC(5, OPC_CONVM, convm), 972 OPC(5, OPC_GETSIZE, getsize), 973 OPC(5, OPC_GETBUF, getbuf), 974 OPC(5, OPC_GETPOS, getpos), 975 OPC(5, OPC_GETINFO, getinfo), 976 OPC(5, OPC_DSX, dsx), 977 OPC(5, OPC_DSY, dsy), 978 OPC(5, OPC_GATHER4R, gather4r), 979 OPC(5, OPC_GATHER4G, gather4g), 980 OPC(5, OPC_GATHER4B, gather4b), 981 OPC(5, OPC_GATHER4A, gather4a), 982 OPC(5, OPC_SAMGP0, samgp0), 983 OPC(5, OPC_SAMGP1, samgp1), 984 OPC(5, OPC_SAMGP2, samgp2), 985 OPC(5, OPC_SAMGP3, samgp3), 986 OPC(5, OPC_DSXPP_1, dsxpp.1), 987 OPC(5, OPC_DSYPP_1, dsypp.1), 988 OPC(5, OPC_RGETPOS, rgetpos), 989 OPC(5, OPC_RGETINFO, rgetinfo), 990 991 992 /* category 6: */ 993 OPC(6, OPC_LDG, ldg), 994 OPC(6, OPC_LDL, ldl), 995 OPC(6, OPC_LDP, ldp), 996 OPC(6, OPC_STG, stg), 997 OPC(6, OPC_STL, stl), 998 OPC(6, OPC_STP, stp), 999 OPC(6, OPC_LDIB, ldib), 1000 OPC(6, OPC_G2L, g2l), 1001 OPC(6, OPC_L2G, l2g), 1002 OPC(6, OPC_PREFETCH, prefetch), 1003 OPC(6, OPC_LDLW, ldlw), 1004 OPC(6, OPC_STLW, stlw), 1005 OPC(6, OPC_RESFMT, resfmt), 1006 OPC(6, OPC_RESINFO, resinfo), 1007 OPC(6, OPC_ATOMIC_ADD, atomic.add), 1008 OPC(6, OPC_ATOMIC_SUB, atomic.sub), 1009 OPC(6, OPC_ATOMIC_XCHG, atomic.xchg), 1010 OPC(6, OPC_ATOMIC_INC, atomic.inc), 1011 OPC(6, OPC_ATOMIC_DEC, atomic.dec), 1012 OPC(6, OPC_ATOMIC_CMPXCHG, atomic.cmpxchg), 1013 OPC(6, OPC_ATOMIC_MIN, atomic.min), 1014 OPC(6, OPC_ATOMIC_MAX, atomic.max), 1015 OPC(6, OPC_ATOMIC_AND, atomic.and), 1016 OPC(6, OPC_ATOMIC_OR, atomic.or), 1017 OPC(6, OPC_ATOMIC_XOR, atomic.xor), 1018 OPC(6, OPC_LDGB, ldgb), 1019 OPC(6, OPC_STGB, stgb), 1020 OPC(6, OPC_STIB, stib), 1021 OPC(6, OPC_LDC, ldc), 1022 OPC(6, OPC_LDLV, ldlv), 1023 1024 OPC(7, OPC_BAR, bar), 1025 OPC(7, OPC_FENCE, fence), 1026 1027#undef OPC 1028}; 1029 1030#define GETINFO(instr) (&(opcs[((instr)->opc_cat << NOPC_BITS) | instr_opc(instr, ctx->gpu_id)])) 1031 1032// XXX hack.. probably should move this table somewhere common: 1033#include "ir3.h" 1034const char *ir3_instr_name(struct ir3_instruction *instr) 1035{ 1036 if (opc_cat(instr->opc) == -1) return "??meta??"; 1037 return opcs[instr->opc].name; 1038} 1039 1040static bool print_instr(struct disasm_ctx *ctx, uint32_t *dwords, int n) 1041{ 1042 instr_t *instr = (instr_t *)dwords; 1043 uint32_t opc = instr_opc(instr, ctx->gpu_id); 1044 const char *name; 1045 1046 if (debug & PRINT_VERBOSE) 1047 fprintf(ctx->out, "%s%04d[%08xx_%08xx] ", levels[ctx->level], n, dwords[1], dwords[0]); 1048 1049 /* NOTE: order flags are printed is a bit fugly.. but for now I 1050 * try to match the order in llvm-a3xx disassembler for easy 1051 * diff'ing.. 1052 */ 1053 1054 ctx->repeat = instr_repeat(instr); 1055 1056 if (instr->sync) 1057 fprintf(ctx->out, "(sy)"); 1058 if (instr->ss && ((instr->opc_cat <= 4) || (instr->opc_cat == 7))) 1059 fprintf(ctx->out, "(ss)"); 1060 if (instr->jmp_tgt) 1061 fprintf(ctx->out, "(jp)"); 1062 if (instr_sat(instr)) 1063 fprintf(ctx->out, "(sat)"); 1064 if (ctx->repeat) { 1065 fprintf(ctx->out, "(rpt%d)", ctx->repeat); 1066 } else if ((instr->opc_cat == 2) && (instr->cat2.src1_r || instr->cat2.src2_r)) { 1067 unsigned nop = (instr->cat2.src2_r * 2) + instr->cat2.src1_r; 1068 fprintf(ctx->out, "(nop%d)", nop); 1069 } else if ((instr->opc_cat == 3) && (instr->cat3.src1_r || instr->cat3.src2_r)) { 1070 unsigned nop = (instr->cat3.src2_r * 2) + instr->cat3.src1_r; 1071 fprintf(ctx->out, "(nop%d)", nop); 1072 } 1073 if (instr->ul && ((2 <= instr->opc_cat) && (instr->opc_cat <= 4))) 1074 fprintf(ctx->out, "(ul)"); 1075 1076 name = GETINFO(instr)->name; 1077 1078 if (name) { 1079 fprintf(ctx->out, "%s", name); 1080 GETINFO(instr)->print(ctx, instr); 1081 } else { 1082 fprintf(ctx->out, "unknown(%d,%d)", instr->opc_cat, opc); 1083 } 1084 1085 fprintf(ctx->out, "\n"); 1086 1087 return (instr->opc_cat == 0) && (opc == OPC_END); 1088} 1089 1090int disasm_a3xx(uint32_t *dwords, int sizedwords, int level, FILE *out, unsigned gpu_id) 1091{ 1092 struct disasm_ctx ctx; 1093 int i; 1094 1095 assert((sizedwords % 2) == 0); 1096 1097 memset(&ctx, 0, sizeof(ctx)); 1098 ctx.out = out; 1099 ctx.level = level; 1100 ctx.gpu_id = gpu_id; 1101 1102 for (i = 0; i < sizedwords; i += 2) 1103 print_instr(&ctx, &dwords[i], i/2); 1104 1105 return 0; 1106} 1107