17ec681f3Smrg<?xml version="1.0" encoding="UTF-8"?> 27ec681f3Smrg<!-- 37ec681f3SmrgCopyright © 2020 Google, Inc. 47ec681f3Smrg 57ec681f3SmrgPermission is hereby granted, free of charge, to any person obtaining a 67ec681f3Smrgcopy of this software and associated documentation files (the "Software"), 77ec681f3Smrgto deal in the Software without restriction, including without limitation 87ec681f3Smrgthe rights to use, copy, modify, merge, publish, distribute, sublicense, 97ec681f3Smrgand/or sell copies of the Software, and to permit persons to whom the 107ec681f3SmrgSoftware is furnished to do so, subject to the following conditions: 117ec681f3Smrg 127ec681f3SmrgThe above copyright notice and this permission notice (including the next 137ec681f3Smrgparagraph) shall be included in all copies or substantial portions of the 147ec681f3SmrgSoftware. 157ec681f3Smrg 167ec681f3SmrgTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 177ec681f3SmrgIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 187ec681f3SmrgFITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 197ec681f3SmrgTHE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 207ec681f3SmrgLIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 217ec681f3SmrgOUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 227ec681f3SmrgSOFTWARE. 237ec681f3Smrg --> 247ec681f3Smrg 257ec681f3Smrg<isa> 267ec681f3Smrg 277ec681f3Smrg<!-- 287ec681f3Smrg Cat5 Instructions: texture instructions 297ec681f3Smrg --> 307ec681f3Smrg 317ec681f3Smrg<bitset name="#cat5-s2en-bindless-base" size="1"> 327ec681f3Smrg <doc> 337ec681f3Smrg The BASE field is actually split across BASE_LO and BASE_HI, 347ec681f3Smrg but '.baseN' should only appear in the bindless case.. the 357ec681f3Smrg easiest way to accomplish that is by splitting it out into a 367ec681f3Smrg bitset. We just arbitrarily map this to BASE_LO 377ec681f3Smrg </doc> 387ec681f3Smrg <override> 397ec681f3Smrg <expr>{BINDLESS}</expr> 407ec681f3Smrg <display> 417ec681f3Smrg .base{BASE} 427ec681f3Smrg </display> 437ec681f3Smrg </override> 447ec681f3Smrg <display/> 457ec681f3Smrg <field name="BASE_LO" pos="0" type="uint"/> 467ec681f3Smrg <derived name="BASE" type="uint"> 477ec681f3Smrg <expr>({BASE_HI} * 2) | {BASE_LO}</expr> 487ec681f3Smrg </derived> 497ec681f3Smrg <encode type="struct ir3_instruction *"> 507ec681f3Smrg <map name="BASE_LO">src->cat5.tex_base & 0x1</map> 517ec681f3Smrg </encode> 527ec681f3Smrg</bitset> 537ec681f3Smrg 547ec681f3Smrg<bitset name="#instruction-cat5" extends="#instruction"> 557ec681f3Smrg <override> 567ec681f3Smrg <expr>{S2EN_BINDLESS}</expr> 577ec681f3Smrg <doc> 587ec681f3Smrg The s2en (indirect) or bindless case 597ec681f3Smrg </doc> 607ec681f3Smrg <display> 617ec681f3Smrg {SY}{JP}{NAME}{3D}{A}{O}{P}{S}{S2EN}{UNIFORM}{NONUNIFORM}{BASE} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SRC3}{A1} 627ec681f3Smrg </display> 637ec681f3Smrg <field name="BASE_HI" low="19" high="20" type="uint"/> 647ec681f3Smrg <field name="SRC3" low="21" high="28" type="#cat5-src3"> 657ec681f3Smrg <param name="BINDLESS"/> 667ec681f3Smrg <param name="DESC_MODE"/> 677ec681f3Smrg <param name="HAS_SAMP"/> 687ec681f3Smrg <param name="HAS_TEX"/> 697ec681f3Smrg </field> 707ec681f3Smrg <field name="DESC_MODE" low="29" high="31" type="#cat5-s2en-bindless-desc-mode"/> 717ec681f3Smrg <field name="BASE" pos="47" type="#cat5-s2en-bindless-base"> 727ec681f3Smrg <param name="BINDLESS"/> 737ec681f3Smrg <param name="BASE_HI"/> 747ec681f3Smrg </field> 757ec681f3Smrg <derived name="BINDLESS" expr="#cat5-s2enb-is-bindless" type="bool"/> 767ec681f3Smrg <derived name="S2EN" expr="#cat5-s2enb-is-indirect" type="bool" display=".s2en"/> 777ec681f3Smrg <derived name="UNIFORM" expr="#cat5-s2enb-is-uniform" type="bool" display=".uniform"/> 787ec681f3Smrg <derived name="NONUNIFORM" expr="#cat5-s2enb-is-nonuniform" type="bool" display=".nonuniform"/> 797ec681f3Smrg <derived name="A1" expr="#cat5-s2enb-uses_a1" type="bool" display=", a1.x"/> 807ec681f3Smrg </override> 817ec681f3Smrg 827ec681f3Smrg <doc> 837ec681f3Smrg The "normal" case, ie. not s2en (indirect) and/or bindless 847ec681f3Smrg </doc> 857ec681f3Smrg <display> 867ec681f3Smrg {SY}{JP}{NAME}{3D}{A}{O}{P}{S} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SAMP}{TEX} 877ec681f3Smrg </display> 887ec681f3Smrg <derived name="DST_HALF" type="bool" display="h"> 897ec681f3Smrg <expr> 907ec681f3Smrg ({TYPE} == 0) /* f16 */ || 917ec681f3Smrg ({TYPE} == 2) /* u16 */ || 927ec681f3Smrg ({TYPE} == 4) /* s16 */ || 937ec681f3Smrg ({TYPE} == 6) /* u8 */ || 947ec681f3Smrg ({TYPE} == 7) /* s8 */ 957ec681f3Smrg </expr> 967ec681f3Smrg </derived> 977ec681f3Smrg <field name="FULL" pos="0" type="bool"/> 987ec681f3Smrg <derived name="HALF" expr="#multisrc-half" type="bool" display="h"/> 997ec681f3Smrg <field name="SRC1" low="1" high="8" type="#cat5-src1"> 1007ec681f3Smrg <param name="NUM_SRC"/> 1017ec681f3Smrg <param name="HALF"/> 1027ec681f3Smrg </field> 1037ec681f3Smrg <field name="SRC2" low="9" high="16" type="#cat5-src2"> 1047ec681f3Smrg <param name="NUM_SRC"/> 1057ec681f3Smrg <param name="HALF"/> 1067ec681f3Smrg <param name="O"/> 1077ec681f3Smrg </field> 1087ec681f3Smrg <!-- 1097ec681f3Smrg TODO remainder of first 32b differ depending on s2en/bindless.. 1107ec681f3Smrg possibly use overrides? Need to sort-out how to display.. 1117ec681f3Smrg 1127ec681f3Smrg Note b17 seems to show up in some blob traces (samgpN), need 1137ec681f3Smrg to figure out what this bit does 1147ec681f3Smrg --> 1157ec681f3Smrg <pattern low="17" high="18">0x</pattern> 1167ec681f3Smrg <assert low="19" high="20">00</assert> <!-- BASE_HI --> 1177ec681f3Smrg <field name="SAMP" low="21" high="24" type="#cat5-samp"> 1187ec681f3Smrg <param name="HAS_SAMP"/> 1197ec681f3Smrg </field> 1207ec681f3Smrg <field name="TEX" low="25" high="31" type="#cat5-tex"> 1217ec681f3Smrg <param name="HAS_TEX"/> 1227ec681f3Smrg </field> 1237ec681f3Smrg 1247ec681f3Smrg <field name="DST" low="32" high="39" type="#reg-gpr"/> 1257ec681f3Smrg <field name="WRMASK" low="40" high="43" type="#wrmask"/> 1267ec681f3Smrg <field name="TYPE" low="44" high="46" type="#cat5-type"> 1277ec681f3Smrg <param name="HAS_TYPE"/> 1287ec681f3Smrg </field> 1297ec681f3Smrg <assert pos="47">0</assert> <!-- BASE_LO --> 1307ec681f3Smrg <field name="3D" pos="48" type="bool" display=".3d"/> 1317ec681f3Smrg <field name="A" pos="49" type="bool" display=".a"/> 1327ec681f3Smrg <field name="S" pos="50" type="bool" display=".s"/> 1337ec681f3Smrg <field name="S2EN_BINDLESS" pos="51" type="bool"/> 1347ec681f3Smrg <field name="O" pos="52" type="bool" display=".o"/> 1357ec681f3Smrg <field name="P" pos="53" type="bool" display=".p"/> 1367ec681f3Smrg <!-- OPC --> 1377ec681f3Smrg <field name="JP" pos="59" type="bool" display="(jp)"/> 1387ec681f3Smrg <field name="SY" pos="60" type="bool" display="(sy)"/> 1397ec681f3Smrg <pattern low="61" high="63">101</pattern> <!-- cat5 --> 1407ec681f3Smrg <encode> 1417ec681f3Smrg <map name="FULL">extract_cat5_FULL(src)</map> 1427ec681f3Smrg <map name="TEX">src</map> 1437ec681f3Smrg <map name="SAMP">src</map> 1447ec681f3Smrg <map name="WRMASK">src->dsts[0]->wrmask</map> 1457ec681f3Smrg <map name="BASE">src</map> 1467ec681f3Smrg <map name="TYPE">src</map> 1477ec681f3Smrg <map name="BASE_HI">src->cat5.tex_base >> 1</map> 1487ec681f3Smrg <map name="3D">!!(src->flags & IR3_INSTR_3D)</map> 1497ec681f3Smrg <map name="A">!!(src->flags & IR3_INSTR_A)</map> 1507ec681f3Smrg <map name="S">!!(src->flags & IR3_INSTR_S)</map> 1517ec681f3Smrg <map name="S2EN_BINDLESS">!!(src->flags & (IR3_INSTR_S2EN | IR3_INSTR_B))</map> 1527ec681f3Smrg <map name="O">!!(src->flags & IR3_INSTR_O)</map> 1537ec681f3Smrg <map name="P">!!(src->flags & IR3_INSTR_P)</map> 1547ec681f3Smrg <map name="DESC_MODE">extract_cat5_DESC_MODE(src)</map> 1557ec681f3Smrg <!-- 1567ec681f3Smrg TODO the src order is currently a bit messy due to ir3 using srcs[0] 1577ec681f3Smrg for s2en src in the s2en case 1587ec681f3Smrg --> 1597ec681f3Smrg <map name="SRC1">extract_cat5_SRC(src, 0)</map> 1607ec681f3Smrg <map name="SRC2">extract_cat5_SRC(src, 1)</map> 1617ec681f3Smrg <map name="SRC3">(src->srcs_count > 0) ? src->srcs[0] : NULL</map> 1627ec681f3Smrg </encode> 1637ec681f3Smrg</bitset> 1647ec681f3Smrg 1657ec681f3Smrg<bitset name="isam" extends="#instruction-cat5"> 1667ec681f3Smrg <pattern low="54" high="58">00000</pattern> 1677ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 1687ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 1697ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 1707ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 1717ec681f3Smrg</bitset> 1727ec681f3Smrg 1737ec681f3Smrg<bitset name="isaml" extends="#instruction-cat5"> 1747ec681f3Smrg <pattern low="54" high="58">00001</pattern> 1757ec681f3Smrg <derived name="NUM_SRC" expr="#two" type="uint"/> 1767ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 1777ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 1787ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 1797ec681f3Smrg</bitset> 1807ec681f3Smrg 1817ec681f3Smrg<bitset name="isamm" extends="#instruction-cat5"> 1827ec681f3Smrg <pattern low="54" high="58">00010</pattern> 1837ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 1847ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 1857ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 1867ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 1877ec681f3Smrg</bitset> 1887ec681f3Smrg 1897ec681f3Smrg<bitset name="sam" extends="#instruction-cat5"> 1907ec681f3Smrg <pattern low="54" high="58">00011</pattern> 1917ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 1927ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 1937ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 1947ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 1957ec681f3Smrg</bitset> 1967ec681f3Smrg 1977ec681f3Smrg<bitset name="samb" extends="#instruction-cat5"> 1987ec681f3Smrg <pattern low="54" high="58">00100</pattern> 1997ec681f3Smrg <derived name="NUM_SRC" expr="#two" type="uint"/> 2007ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 2017ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2027ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2037ec681f3Smrg</bitset> 2047ec681f3Smrg 2057ec681f3Smrg<bitset name="saml" extends="#instruction-cat5"> 2067ec681f3Smrg <pattern low="54" high="58">00101</pattern> 2077ec681f3Smrg <derived name="NUM_SRC" expr="#two" type="uint"/> 2087ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 2097ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2107ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2117ec681f3Smrg</bitset> 2127ec681f3Smrg 2137ec681f3Smrg<bitset name="samgq" extends="#instruction-cat5"> 2147ec681f3Smrg <pattern low="54" high="58">00110</pattern> 2157ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 2167ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 2177ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2187ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2197ec681f3Smrg</bitset> 2207ec681f3Smrg 2217ec681f3Smrg<bitset name="getlod" extends="#instruction-cat5"> 2227ec681f3Smrg <pattern low="54" high="58">00111</pattern> 2237ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 2247ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 2257ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2267ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2277ec681f3Smrg</bitset> 2287ec681f3Smrg 2297ec681f3Smrg<bitset name="conv" extends="#instruction-cat5"> 2307ec681f3Smrg <pattern low="54" high="58">01000</pattern> 2317ec681f3Smrg <derived name="NUM_SRC" expr="#two" type="uint"/> 2327ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 2337ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2347ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2357ec681f3Smrg</bitset> 2367ec681f3Smrg 2377ec681f3Smrg<bitset name="convm" extends="#instruction-cat5"> 2387ec681f3Smrg <pattern low="54" high="58">01001</pattern> 2397ec681f3Smrg <derived name="NUM_SRC" expr="#two" type="uint"/> 2407ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 2417ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2427ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2437ec681f3Smrg</bitset> 2447ec681f3Smrg 2457ec681f3Smrg<bitset name="getsize" extends="#instruction-cat5"> 2467ec681f3Smrg <pattern low="54" high="58">01010</pattern> 2477ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 2487ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 2497ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2507ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2517ec681f3Smrg</bitset> 2527ec681f3Smrg 2537ec681f3Smrg<bitset name="getbuf" extends="#instruction-cat5"> 2547ec681f3Smrg <pattern low="54" high="58">01011</pattern> 2557ec681f3Smrg <derived name="NUM_SRC" expr="#zero" type="uint"/> 2567ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 2577ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2587ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2597ec681f3Smrg</bitset> 2607ec681f3Smrg 2617ec681f3Smrg<bitset name="getpos" extends="#instruction-cat5"> 2627ec681f3Smrg <pattern low="54" high="58">01100</pattern> 2637ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 2647ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 2657ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2667ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2677ec681f3Smrg</bitset> 2687ec681f3Smrg 2697ec681f3Smrg<bitset name="getinfo" extends="#instruction-cat5"> 2707ec681f3Smrg <pattern low="54" high="58">01101</pattern> 2717ec681f3Smrg <derived name="NUM_SRC" expr="#zero" type="uint"/> 2727ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 2737ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2747ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2757ec681f3Smrg</bitset> 2767ec681f3Smrg 2777ec681f3Smrg<bitset name="dsx" extends="#instruction-cat5"> 2787ec681f3Smrg <pattern low="54" high="58">01110</pattern> 2797ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 2807ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 2817ec681f3Smrg <derived name="HAS_TEX" expr="#false" type="bool"/> 2827ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2837ec681f3Smrg</bitset> 2847ec681f3Smrg 2857ec681f3Smrg<bitset name="dsy" extends="#instruction-cat5"> 2867ec681f3Smrg <pattern low="54" high="58">01111</pattern> 2877ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 2887ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 2897ec681f3Smrg <derived name="HAS_TEX" expr="#false" type="bool"/> 2907ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2917ec681f3Smrg</bitset> 2927ec681f3Smrg 2937ec681f3Smrg<bitset name="gather4r" extends="#instruction-cat5"> 2947ec681f3Smrg <pattern low="54" high="58">10000</pattern> 2957ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 2967ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 2977ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 2987ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 2997ec681f3Smrg</bitset> 3007ec681f3Smrg 3017ec681f3Smrg<bitset name="gather4g" extends="#instruction-cat5"> 3027ec681f3Smrg <pattern low="54" high="58">10001</pattern> 3037ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3047ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 3057ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 3067ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3077ec681f3Smrg</bitset> 3087ec681f3Smrg 3097ec681f3Smrg<bitset name="gather4b" extends="#instruction-cat5"> 3107ec681f3Smrg <pattern low="54" high="58">10010</pattern> 3117ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3127ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 3137ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 3147ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3157ec681f3Smrg</bitset> 3167ec681f3Smrg 3177ec681f3Smrg<bitset name="gather4a" extends="#instruction-cat5"> 3187ec681f3Smrg <pattern low="54" high="58">10011</pattern> 3197ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3207ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 3217ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 3227ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3237ec681f3Smrg</bitset> 3247ec681f3Smrg 3257ec681f3Smrg<bitset name="samgp0" extends="#instruction-cat5"> 3267ec681f3Smrg <pattern low="54" high="58">10100</pattern> 3277ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3287ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 3297ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 3307ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3317ec681f3Smrg</bitset> 3327ec681f3Smrg 3337ec681f3Smrg<bitset name="samgp1" extends="#instruction-cat5"> 3347ec681f3Smrg <pattern low="54" high="58">10101</pattern> 3357ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3367ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 3377ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 3387ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3397ec681f3Smrg</bitset> 3407ec681f3Smrg 3417ec681f3Smrg<bitset name="samgp2" extends="#instruction-cat5"> 3427ec681f3Smrg <pattern low="54" high="58">10110</pattern> 3437ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3447ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 3457ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 3467ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3477ec681f3Smrg</bitset> 3487ec681f3Smrg 3497ec681f3Smrg<bitset name="samgp3" extends="#instruction-cat5"> 3507ec681f3Smrg <pattern low="54" high="58">10111</pattern> 3517ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3527ec681f3Smrg <derived name="HAS_SAMP" expr="#true" type="bool"/> 3537ec681f3Smrg <derived name="HAS_TEX" expr="#true" type="bool"/> 3547ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3557ec681f3Smrg</bitset> 3567ec681f3Smrg 3577ec681f3Smrg<bitset name="dsxpp.1" extends="#instruction-cat5"> 3587ec681f3Smrg <pattern low="54" high="58">11000</pattern> 3597ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3607ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 3617ec681f3Smrg <derived name="HAS_TEX" expr="#false" type="bool"/> 3627ec681f3Smrg <derived name="HAS_TYPE" expr="#false" type="bool"/> 3637ec681f3Smrg</bitset> 3647ec681f3Smrg 3657ec681f3Smrg<bitset name="dsypp.1" extends="#instruction-cat5"> 3667ec681f3Smrg <pattern low="54" high="58">11001</pattern> 3677ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3687ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 3697ec681f3Smrg <derived name="HAS_TEX" expr="#false" type="bool"/> 3707ec681f3Smrg <derived name="HAS_TYPE" expr="#false" type="bool"/> 3717ec681f3Smrg</bitset> 3727ec681f3Smrg 3737ec681f3Smrg<bitset name="rgetpos" extends="#instruction-cat5"> 3747ec681f3Smrg <pattern low="54" high="58">11010</pattern> 3757ec681f3Smrg <derived name="NUM_SRC" expr="#one" type="uint"/> 3767ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 3777ec681f3Smrg <derived name="HAS_TEX" expr="#false" type="bool"/> 3787ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3797ec681f3Smrg</bitset> 3807ec681f3Smrg 3817ec681f3Smrg<bitset name="rgetinfo" extends="#instruction-cat5"> 3827ec681f3Smrg <pattern low="54" high="58">11011</pattern> 3837ec681f3Smrg <derived name="NUM_SRC" expr="#zero" type="uint"/> 3847ec681f3Smrg <derived name="HAS_SAMP" expr="#false" type="bool"/> 3857ec681f3Smrg <derived name="HAS_TEX" expr="#false" type="bool"/> 3867ec681f3Smrg <derived name="HAS_TYPE" expr="#true" type="bool"/> 3877ec681f3Smrg</bitset> 3887ec681f3Smrg 3897ec681f3Smrg 3907ec681f3Smrg<!-- 3917ec681f3Smrg All the magic for conditionally displaying various srcs, etc 3927ec681f3Smrg for the non-bindless / non-indirect case, or things that are in 3937ec681f3Smrg common with the bindless / indirect case 3947ec681f3Smrg --> 3957ec681f3Smrg 3967ec681f3Smrg<bitset name="#cat5-src1" size="8"> 3977ec681f3Smrg <override> 3987ec681f3Smrg <expr>{NUM_SRC} > 0</expr> 3997ec681f3Smrg <display> 4007ec681f3Smrg , {HALF}{SRC} 4017ec681f3Smrg </display> 4027ec681f3Smrg <field name="SRC" low="0" high="7" type="#reg-gpr"/> 4037ec681f3Smrg </override> 4047ec681f3Smrg <display/> 4057ec681f3Smrg <assert low="0" high="7">00000000</assert> 4067ec681f3Smrg <encode type="struct ir3_register *"> 4077ec681f3Smrg <map name="SRC">src</map> 4087ec681f3Smrg </encode> 4097ec681f3Smrg</bitset> 4107ec681f3Smrg 4117ec681f3Smrg<bitset name="#cat5-src2" size="8"> 4127ec681f3Smrg <override> 4137ec681f3Smrg <expr>{O} || ({NUM_SRC} > 1)</expr> 4147ec681f3Smrg <display> 4157ec681f3Smrg , {HALF}{SRC} 4167ec681f3Smrg </display> 4177ec681f3Smrg <field name="SRC" low="0" high="7" type="#reg-gpr"/> 4187ec681f3Smrg </override> 4197ec681f3Smrg <display/> 4207ec681f3Smrg <assert low="0" high="7">00000000</assert> 4217ec681f3Smrg <encode type="struct ir3_register *"> 4227ec681f3Smrg <map name="SRC">src</map> 4237ec681f3Smrg </encode> 4247ec681f3Smrg</bitset> 4257ec681f3Smrg 4267ec681f3Smrg<bitset name="#cat5-samp" size="4"> 4277ec681f3Smrg <override> 4287ec681f3Smrg <expr>{HAS_SAMP}</expr> 4297ec681f3Smrg <display> 4307ec681f3Smrg , s#{SAMP} 4317ec681f3Smrg </display> 4327ec681f3Smrg <field name="SAMP" low="0" high="3" type="uint"/> 4337ec681f3Smrg </override> 4347ec681f3Smrg <display/> 4357ec681f3Smrg <assert low="0" high="3">0000</assert> 4367ec681f3Smrg <encode type="struct ir3_instruction *"> 4377ec681f3Smrg <map name="SAMP">src->cat5.samp</map> 4387ec681f3Smrg </encode> 4397ec681f3Smrg</bitset> 4407ec681f3Smrg 4417ec681f3Smrg<bitset name="#cat5-samp-s2en-bindless-a1" size="8"> 4427ec681f3Smrg <doc>s2en (indirect) / bindless case with a1.x has 8b samp</doc> 4437ec681f3Smrg <override> 4447ec681f3Smrg <expr>{HAS_SAMP}</expr> 4457ec681f3Smrg <display> 4467ec681f3Smrg , s#{SAMP} 4477ec681f3Smrg </display> 4487ec681f3Smrg <field name="SAMP" low="0" high="7" type="uint"/> 4497ec681f3Smrg </override> 4507ec681f3Smrg <display/> 4517ec681f3Smrg <assert low="0" high="7">00000000</assert> 4527ec681f3Smrg <encode type="struct ir3_instruction *"> 4537ec681f3Smrg <map name="SAMP">src->cat5.samp</map> 4547ec681f3Smrg </encode> 4557ec681f3Smrg</bitset> 4567ec681f3Smrg 4577ec681f3Smrg<bitset name="#cat5-tex" size="7"> 4587ec681f3Smrg <override> 4597ec681f3Smrg <expr>{HAS_TEX}</expr> 4607ec681f3Smrg <display> 4617ec681f3Smrg , t#{TEX} 4627ec681f3Smrg </display> 4637ec681f3Smrg <field name="TEX" low="0" high="6" type="uint"/> 4647ec681f3Smrg </override> 4657ec681f3Smrg <display/> 4667ec681f3Smrg <assert low="0" high="6">0000000</assert> 4677ec681f3Smrg <encode type="struct ir3_instruction *"> 4687ec681f3Smrg <map name="TEX">src->cat5.tex</map> 4697ec681f3Smrg </encode> 4707ec681f3Smrg</bitset> 4717ec681f3Smrg 4727ec681f3Smrg<bitset name="#cat5-tex-s2en-bindless" size="4"> 4737ec681f3Smrg <doc>s2en (indirect) / bindless case only has 4b tex</doc> 4747ec681f3Smrg <override> 4757ec681f3Smrg <expr>{HAS_TEX}</expr> 4767ec681f3Smrg <display> 4777ec681f3Smrg , t#{TEX} 4787ec681f3Smrg </display> 4797ec681f3Smrg <field name="TEX" low="0" high="3" type="uint"/> 4807ec681f3Smrg </override> 4817ec681f3Smrg <display/> 4827ec681f3Smrg <assert low="0" high="3">0000</assert> 4837ec681f3Smrg <encode type="struct ir3_instruction *"> 4847ec681f3Smrg <!-- 4857ec681f3Smrg TODO properly decouple the encoding from ir3 IR in this 4867ec681f3Smrg case.. the IR has no business knowing how this gets 4877ec681f3Smrg encoded into "SRC3".. 4887ec681f3Smrg --> 4897ec681f3Smrg <map name="TEX">src->cat5.samp >> 4</map> 4907ec681f3Smrg </encode> 4917ec681f3Smrg</bitset> 4927ec681f3Smrg 4937ec681f3Smrg<bitset name="#cat5-type" size="3"> 4947ec681f3Smrg <display/> 4957ec681f3Smrg <override> 4967ec681f3Smrg <expr>{HAS_TYPE}</expr> 4977ec681f3Smrg <display> 4987ec681f3Smrg ({TYPE}) 4997ec681f3Smrg </display> 5007ec681f3Smrg </override> 5017ec681f3Smrg <field name="TYPE" low="0" high="2" type="#type"/> 5027ec681f3Smrg <encode type="struct ir3_instruction *"> 5037ec681f3Smrg <!-- 5047ec681f3Smrg Normally we only encode fields that have visible impact on 5057ec681f3Smrg the decoded disasm, but the type field is one of those 5067ec681f3Smrg special exceptions 5077ec681f3Smrg --> 5087ec681f3Smrg <map name="TYPE" force="true">src->cat5.type</map> 5097ec681f3Smrg </encode> 5107ec681f3Smrg</bitset> 5117ec681f3Smrg 5127ec681f3Smrg<!-- 5137ec681f3Smrg Helpers/bitsets/etc for dealing with the bindless/indirect case: 5147ec681f3Smrg --> 5157ec681f3Smrg 5167ec681f3Smrg<enum name="#cat5-s2en-bindless-desc-mode"> 5177ec681f3Smrg <doc> 5187ec681f3Smrg We don't actually display this enum, but it is useful to 5197ec681f3Smrg document the various cases 5207ec681f3Smrg 5217ec681f3Smrg TODO we should probably have an option for uniforms w/out 5227ec681f3Smrg display strings, but which have 'C' names that can be used 5237ec681f3Smrg to generate header that the compiler can use 5247ec681f3Smrg </doc> 5257ec681f3Smrg <value val="0" display="CAT5_NONUNIFORM"> 5267ec681f3Smrg <doc> 5277ec681f3Smrg Use traditional GL binding model, get texture and sampler index 5287ec681f3Smrg from src3 which is not presumed to be uniform. This is 5297ec681f3Smrg backwards-compatible with earlier generations, where this field was 5307ec681f3Smrg always 0 and nonuniform-indexed sampling always worked. 5317ec681f3Smrg </doc> 5327ec681f3Smrg </value> 5337ec681f3Smrg <value val="1" display="CAT5_BINDLESS_A1_UNIFORM"> 5347ec681f3Smrg <doc> 5357ec681f3Smrg The sampler base comes from the low 3 bits of a1.x, and the sampler 5367ec681f3Smrg and texture index come from src3 which is presumed to be uniform. 5377ec681f3Smrg </doc> 5387ec681f3Smrg </value> 5397ec681f3Smrg <value val="2" display="CAT5_BINDLESS_NONUNIFORM"> 5407ec681f3Smrg <doc> 5417ec681f3Smrg The texture and sampler share the same base, and the sampler and 5427ec681f3Smrg texture index come from src3 which is *not* presumed to be uniform. 5437ec681f3Smrg </doc> 5447ec681f3Smrg </value> 5457ec681f3Smrg <value val="3" display="CAT5_BINDLESS_A1_NONUNIFORM"> 5467ec681f3Smrg <doc> 5477ec681f3Smrg The sampler base comes from the low 3 bits of a1.x, and the sampler 5487ec681f3Smrg and texture index come from src3 which is *not* presumed to be 5497ec681f3Smrg uniform. 5507ec681f3Smrg </doc> 5517ec681f3Smrg </value> 5527ec681f3Smrg <value val="4" display="CAT5_UNIFORM"> 5537ec681f3Smrg <doc> 5547ec681f3Smrg Use traditional GL binding model, get texture and sampler index 5557ec681f3Smrg from src3 which is presumed to be uniform. 5567ec681f3Smrg </doc> 5577ec681f3Smrg </value> 5587ec681f3Smrg <value val="5" display="CAT5_BINDLESS_UNIFORM"> 5597ec681f3Smrg <doc> 5607ec681f3Smrg The texture and sampler share the same base, and the sampler and 5617ec681f3Smrg texture index come from src3 which is presumed to be uniform. 5627ec681f3Smrg </doc> 5637ec681f3Smrg </value> 5647ec681f3Smrg <value val="6" display="CAT5_BINDLESS_IMM"> 5657ec681f3Smrg <doc> 5667ec681f3Smrg The texture and sampler share the same base, get sampler index from low 5677ec681f3Smrg 4 bits of src3 and texture index from high 4 bits. 5687ec681f3Smrg </doc> 5697ec681f3Smrg </value> 5707ec681f3Smrg <value val="7" display="CAT5_BINDLESS_A1_IMM"> 5717ec681f3Smrg <doc> 5727ec681f3Smrg The sampler base comes from the low 3 bits of a1.x, and the texture 5737ec681f3Smrg index comes from the next 8 bits of a1.x. The sampler index is an 5747ec681f3Smrg immediate in src3. 5757ec681f3Smrg </doc> 5767ec681f3Smrg </value> 5777ec681f3Smrg</enum> 5787ec681f3Smrg 5797ec681f3Smrg<!-- Helper to map s2en/bindless DESC_MODE to whether it is an indirect mode --> 5807ec681f3Smrg<expr name="#cat5-s2enb-is-indirect"> 5817ec681f3Smrg {DESC_MODE} < 6 /* CAT5_BINDLESS_IMM */ 5827ec681f3Smrg</expr> 5837ec681f3Smrg 5847ec681f3Smrg<!-- Helper to map s2en/bindless DESC_MODE to whether it is a bindless mode --> 5857ec681f3Smrg<expr name="#cat5-s2enb-is-bindless"> 5867ec681f3Smrg ({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ || 5877ec681f3Smrg ({DESC_MODE} == 2) /* CAT5_BINDLESS_NONUNIFORM */ || 5887ec681f3Smrg ({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ || 5897ec681f3Smrg ({DESC_MODE} == 5) /* CAT5_BINDLESS_UNIFORM */ || 5907ec681f3Smrg ({DESC_MODE} == 6) /* CAT5_BINDLESS_IMM */ || 5917ec681f3Smrg ({DESC_MODE} == 7) /* CAT5_BINDLESS_A1_IMM */ 5927ec681f3Smrg</expr> 5937ec681f3Smrg 5947ec681f3Smrg<!-- Helper to map s2en/bindless DESC_MODE to whether it uses a1.x --> 5957ec681f3Smrg<expr name="#cat5-s2enb-uses_a1"> 5967ec681f3Smrg ({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ || 5977ec681f3Smrg ({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ || 5987ec681f3Smrg ({DESC_MODE} == 7) /* CAT5_BINDLESS_A1_IMM */ 5997ec681f3Smrg</expr> 6007ec681f3Smrg 6017ec681f3Smrg<!-- Helper to map s2en/bindless DESC_MODE to whether it is uniform (flow control) mode --> 6027ec681f3Smrg<expr name="#cat5-s2enb-is-uniform"> 6037ec681f3Smrg ({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ || 6047ec681f3Smrg ({DESC_MODE} == 4) /* CAT5_UNIFORM */ || 6057ec681f3Smrg ({DESC_MODE} == 5) /* CAT5_BINDLESS_UNIFORM */ 6067ec681f3Smrg</expr> 6077ec681f3Smrg 6087ec681f3Smrg<!-- Helper to map s2en/bindless DESC_MODE to whether it is non-uniform mode 6097ec681f3Smrg Note that it returns only for bindless for now, since we need to figure out bindful 6107ec681f3Smrg uniform/nonuniform mode correctly. See TODO in extract_cat5_DESC_MODE in encode.c --> 6117ec681f3Smrg<expr name="#cat5-s2enb-is-nonuniform"> 6127ec681f3Smrg ({DESC_MODE} == 2) /* CAT5_BINDLESS_NONUNIFORM */ || 6137ec681f3Smrg ({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ 6147ec681f3Smrg</expr> 6157ec681f3Smrg 6167ec681f3Smrg<bitset name="#cat5-src3" size="8"> 6177ec681f3Smrg <doc>bindless/indirect src3, which can either be GPR or samp/tex</doc> 6187ec681f3Smrg <override expr="#cat5-s2enb-is-indirect"> 6197ec681f3Smrg <display> 6207ec681f3Smrg , {SRC_HALF}{SRC} 6217ec681f3Smrg </display> 6227ec681f3Smrg <field name="SRC" low="0" high="7" type="#reg-gpr"/> 6237ec681f3Smrg <derived name="SRC_HALF" type="bool" display="h"> 6247ec681f3Smrg <expr>!{BINDLESS}</expr> 6257ec681f3Smrg </derived> 6267ec681f3Smrg </override> 6277ec681f3Smrg <override expr="#cat5-s2enb-uses_a1"> 6287ec681f3Smrg <doc> 6297ec681f3Smrg In the case that a1.x is used, all 8 bits encode sampler 6307ec681f3Smrg </doc> 6317ec681f3Smrg <display> 6327ec681f3Smrg {SAMP} 6337ec681f3Smrg </display> 6347ec681f3Smrg <field name="SAMP" low="0" high="7" type="#cat5-samp-s2en-bindless-a1"> 6357ec681f3Smrg <param name="HAS_SAMP"/> 6367ec681f3Smrg </field> 6377ec681f3Smrg </override> 6387ec681f3Smrg <display> 6397ec681f3Smrg {SAMP}{TEX} 6407ec681f3Smrg </display> 6417ec681f3Smrg <field name="SAMP" low="0" high="3" type="#cat5-samp"> 6427ec681f3Smrg <param name="HAS_SAMP"/> 6437ec681f3Smrg </field> 6447ec681f3Smrg <field name="TEX" low="4" high="7" type="#cat5-tex-s2en-bindless"> 6457ec681f3Smrg <param name="HAS_TEX"/> 6467ec681f3Smrg </field> 6477ec681f3Smrg <encode type="struct ir3_register *"> 6487ec681f3Smrg <map name="SAMP">s->instr</map> 6497ec681f3Smrg <map name="TEX">s->instr</map> 6507ec681f3Smrg <map name="SRC">src</map> 6517ec681f3Smrg </encode> 6527ec681f3Smrg</bitset> 6537ec681f3Smrg 6547ec681f3Smrg</isa> 655