tgsi_exec.h revision 01e04c3f
1/**************************************************************************
2 *
3 * Copyright 2007-2008 VMware, Inc.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc.  All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29#ifndef TGSI_EXEC_H
30#define TGSI_EXEC_H
31
32#include "pipe/p_compiler.h"
33#include "pipe/p_state.h"
34#include "pipe/p_shader_tokens.h"
35
36#if defined __cplusplus
37extern "C" {
38#endif
39
40#define TGSI_CHAN_X 0
41#define TGSI_CHAN_Y 1
42#define TGSI_CHAN_Z 2
43#define TGSI_CHAN_W 3
44
45#define TGSI_NUM_CHANNELS 4  /* R,G,B,A */
46#define TGSI_QUAD_SIZE    4  /* 4 pixel/quad */
47
48#define TGSI_FOR_EACH_CHANNEL( CHAN )\
49   for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
50
51#define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52   ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
53
54#define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55   if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
56
57#define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
58   TGSI_FOR_EACH_CHANNEL( CHAN )\
59      TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
60
61#define TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\
62   ((INST)->Dst[1].Register.WriteMask & (1 << (CHAN)))
63
64#define TGSI_IF_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\
65   if (TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHAN ))
66
67#define TGSI_FOR_EACH_DST1_ENABLED_CHANNEL( INST, CHAN )\
68   TGSI_FOR_EACH_CHANNEL( CHAN )\
69      TGSI_IF_IS_DST1_CHANNEL_ENABLED( INST, CHAN )
70
71/**
72  * Registers may be treated as float, signed int or unsigned int.
73  */
74union tgsi_exec_channel
75{
76   float    f[TGSI_QUAD_SIZE];
77   int      i[TGSI_QUAD_SIZE];
78   unsigned u[TGSI_QUAD_SIZE];
79};
80
81/**
82  * A vector[RGBA] of channels[4 pixels]
83  */
84struct tgsi_exec_vector
85{
86   union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
87};
88
89/**
90 * For fragment programs, information for computing fragment input
91 * values from plane equation of the triangle/line.
92 */
93struct tgsi_interp_coef
94{
95   float a0[TGSI_NUM_CHANNELS];	/* in an xyzw layout */
96   float dadx[TGSI_NUM_CHANNELS];
97   float dady[TGSI_NUM_CHANNELS];
98};
99
100enum tgsi_sampler_control
101{
102   TGSI_SAMPLER_LOD_NONE,
103   TGSI_SAMPLER_LOD_BIAS,
104   TGSI_SAMPLER_LOD_EXPLICIT,
105   TGSI_SAMPLER_LOD_ZERO,
106   TGSI_SAMPLER_DERIVS_EXPLICIT,
107   TGSI_SAMPLER_GATHER,
108};
109
110struct tgsi_image_params {
111   unsigned unit;
112   unsigned tgsi_tex_instr;
113   enum pipe_format format;
114   unsigned execmask;
115};
116
117struct tgsi_image {
118   /* image interfaces */
119   void (*load)(const struct tgsi_image *image,
120                const struct tgsi_image_params *params,
121                const int s[TGSI_QUAD_SIZE],
122                const int t[TGSI_QUAD_SIZE],
123                const int r[TGSI_QUAD_SIZE],
124                const int sample[TGSI_QUAD_SIZE],
125                float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
126
127   void (*store)(const struct tgsi_image *image,
128                 const struct tgsi_image_params *params,
129                 const int s[TGSI_QUAD_SIZE],
130                 const int t[TGSI_QUAD_SIZE],
131                 const int r[TGSI_QUAD_SIZE],
132                 const int sample[TGSI_QUAD_SIZE],
133                 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
134
135   void (*op)(const struct tgsi_image *image,
136              const struct tgsi_image_params *params,
137              enum tgsi_opcode opcode,
138              const int s[TGSI_QUAD_SIZE],
139              const int t[TGSI_QUAD_SIZE],
140              const int r[TGSI_QUAD_SIZE],
141              const int sample[TGSI_QUAD_SIZE],
142              float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE],
143              float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
144
145   void (*get_dims)(const struct tgsi_image *image,
146                    const struct tgsi_image_params *params,
147                    int dims[4]);
148};
149
150struct tgsi_buffer_params {
151   unsigned unit;
152   unsigned execmask;
153   unsigned writemask;
154};
155
156struct tgsi_buffer {
157   /* buffer interfaces */
158   void (*load)(const struct tgsi_buffer *buffer,
159                const struct tgsi_buffer_params *params,
160                const int s[TGSI_QUAD_SIZE],
161                float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
162
163   void (*store)(const struct tgsi_buffer *buffer,
164                 const struct tgsi_buffer_params *params,
165                 const int s[TGSI_QUAD_SIZE],
166                 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
167
168   void (*op)(const struct tgsi_buffer *buffer,
169              const struct tgsi_buffer_params *params,
170              enum tgsi_opcode opcode,
171              const int s[TGSI_QUAD_SIZE],
172              float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE],
173              float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
174
175   void (*get_dims)(const struct tgsi_buffer *buffer,
176                    const struct tgsi_buffer_params *params,
177                    int *dim);
178};
179
180/**
181 * Information for sampling textures, which must be implemented
182 * by code outside the TGSI executor.
183 */
184struct tgsi_sampler
185{
186   /** Get samples for four fragments in a quad */
187   /* this interface contains 5 sets of channels that vary
188    * depending on the sampler.
189    * s - the first texture coordinate for sampling.
190    * t - the second texture coordinate for sampling - unused for 1D,
191          layer for 1D arrays.
192    * r - the third coordinate for sampling for 3D, cube, cube arrays,
193    *     layer for 2D arrays. Compare value for 1D/2D shadows.
194    * c0 - Compare value for shadow cube and shadow 2d arrays,
195    *      layer for cube arrays.
196    * derivs - explicit derivatives.
197    * offset - texel offsets
198    * lod - lod value, except for shadow cube arrays (compare value there).
199    */
200   void (*get_samples)(struct tgsi_sampler *sampler,
201                       const unsigned sview_index,
202                       const unsigned sampler_index,
203                       const float s[TGSI_QUAD_SIZE],
204                       const float t[TGSI_QUAD_SIZE],
205                       const float r[TGSI_QUAD_SIZE],
206                       const float c0[TGSI_QUAD_SIZE],
207                       const float c1[TGSI_QUAD_SIZE],
208                       float derivs[3][2][TGSI_QUAD_SIZE],
209                       const int8_t offset[3],
210                       enum tgsi_sampler_control control,
211                       float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
212   void (*get_dims)(struct tgsi_sampler *sampler,
213                    const unsigned sview_index,
214                    int level, int dims[4]);
215   void (*get_texel)(struct tgsi_sampler *sampler,
216                     const unsigned sview_index,
217                     const int i[TGSI_QUAD_SIZE],
218                     const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
219                     const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
220                     float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
221   void (*query_lod)(const struct tgsi_sampler *tgsi_sampler,
222                     const unsigned sview_index,
223                     const unsigned sampler_index,
224                     const float s[TGSI_QUAD_SIZE],
225                     const float t[TGSI_QUAD_SIZE],
226                     const float p[TGSI_QUAD_SIZE],
227                     const float c0[TGSI_QUAD_SIZE],
228                     const enum tgsi_sampler_control control,
229                     float mipmap[TGSI_QUAD_SIZE],
230                     float lod[TGSI_QUAD_SIZE]);
231};
232
233#define TGSI_EXEC_NUM_TEMPS       4096
234
235/*
236 * Locations of various utility registers (_I = Index, _C = Channel)
237 */
238#define TGSI_EXEC_TEMP_00000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
239#define TGSI_EXEC_TEMP_00000000_C   0
240
241#define TGSI_EXEC_TEMP_7FFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
242#define TGSI_EXEC_TEMP_7FFFFFFF_C   1
243
244#define TGSI_EXEC_TEMP_80000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
245#define TGSI_EXEC_TEMP_80000000_C   2
246
247#define TGSI_EXEC_TEMP_FFFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
248#define TGSI_EXEC_TEMP_FFFFFFFF_C   3
249
250#define TGSI_EXEC_TEMP_ONE_I        (TGSI_EXEC_NUM_TEMPS + 1)
251#define TGSI_EXEC_TEMP_ONE_C        0
252
253#define TGSI_EXEC_TEMP_TWO_I        (TGSI_EXEC_NUM_TEMPS + 1)
254#define TGSI_EXEC_TEMP_TWO_C        1
255
256#define TGSI_EXEC_TEMP_128_I        (TGSI_EXEC_NUM_TEMPS + 1)
257#define TGSI_EXEC_TEMP_128_C        2
258
259#define TGSI_EXEC_TEMP_MINUS_128_I  (TGSI_EXEC_NUM_TEMPS + 1)
260#define TGSI_EXEC_TEMP_MINUS_128_C  3
261
262#define TGSI_EXEC_TEMP_KILMASK_I    (TGSI_EXEC_NUM_TEMPS + 2)
263#define TGSI_EXEC_TEMP_KILMASK_C    0
264
265#define TGSI_EXEC_TEMP_OUTPUT_I     (TGSI_EXEC_NUM_TEMPS + 2)
266#define TGSI_EXEC_TEMP_OUTPUT_C     1
267
268#define TGSI_EXEC_TEMP_PRIMITIVE_I  (TGSI_EXEC_NUM_TEMPS + 2)
269#define TGSI_EXEC_TEMP_PRIMITIVE_C  2
270
271#define TGSI_EXEC_TEMP_THREE_I      (TGSI_EXEC_NUM_TEMPS + 2)
272#define TGSI_EXEC_TEMP_THREE_C      3
273
274#define TGSI_EXEC_TEMP_HALF_I       (TGSI_EXEC_NUM_TEMPS + 3)
275#define TGSI_EXEC_TEMP_HALF_C       0
276
277/* 4 register buffer for various purposes */
278#define TGSI_EXEC_TEMP_R0           (TGSI_EXEC_NUM_TEMPS + 4)
279#define TGSI_EXEC_NUM_TEMP_R        4
280
281#define TGSI_EXEC_TEMP_ADDR         (TGSI_EXEC_NUM_TEMPS + 8)
282#define TGSI_EXEC_NUM_ADDRS         3
283
284#define TGSI_EXEC_NUM_TEMP_EXTRAS   12
285
286
287
288#define TGSI_EXEC_MAX_NESTING  32
289#define TGSI_EXEC_MAX_COND_NESTING  TGSI_EXEC_MAX_NESTING
290#define TGSI_EXEC_MAX_LOOP_NESTING  TGSI_EXEC_MAX_NESTING
291#define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
292#define TGSI_EXEC_MAX_CALL_NESTING  TGSI_EXEC_MAX_NESTING
293
294/* The maximum number of input attributes per vertex. For 2D
295 * input register files, this is the stride between two 1D
296 * arrays.
297 */
298#define TGSI_EXEC_MAX_INPUT_ATTRIBS 32
299
300/* The maximum number of bytes per constant buffer.
301 */
302#define TGSI_EXEC_MAX_CONST_BUFFER_SIZE  (4096 * sizeof(float[4]))
303
304/* The maximum number of vertices per primitive */
305#define TGSI_MAX_PRIM_VERTICES 6
306
307/* The maximum number of primitives to be generated */
308#define TGSI_MAX_PRIMITIVES 64
309
310/* The maximum total number of vertices */
311#define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
312
313#define TGSI_MAX_MISC_INPUTS 8
314
315/** function call/activation record */
316struct tgsi_call_record
317{
318   uint CondStackTop;
319   uint LoopStackTop;
320   uint ContStackTop;
321   int SwitchStackTop;
322   int BreakStackTop;
323   uint ReturnAddr;
324};
325
326
327/* Switch-case block state. */
328struct tgsi_switch_record {
329   uint mask;                          /**< execution mask */
330   union tgsi_exec_channel selector;   /**< a value case statements are compared to */
331   uint defaultMask;                   /**< non-execute mask for default case */
332};
333
334
335enum tgsi_break_type {
336   TGSI_EXEC_BREAK_INSIDE_LOOP,
337   TGSI_EXEC_BREAK_INSIDE_SWITCH
338};
339
340
341#define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
342
343typedef float float4[4];
344
345/**
346 * Run-time virtual machine state for executing TGSI shader.
347 */
348struct tgsi_exec_machine
349{
350   /* Total = program temporaries + internal temporaries
351    */
352   struct tgsi_exec_vector       Temps[TGSI_EXEC_NUM_TEMPS +
353                                       TGSI_EXEC_NUM_TEMP_EXTRAS];
354
355   unsigned                       ImmsReserved;
356   float4                         *Imms;
357
358   struct tgsi_exec_vector       *Inputs;
359   struct tgsi_exec_vector       *Outputs;
360
361   /* System values */
362   unsigned                      SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
363   struct tgsi_exec_vector       SystemValue[TGSI_MAX_MISC_INPUTS];
364
365   struct tgsi_exec_vector       *Addrs;
366
367   struct tgsi_sampler           *Sampler;
368
369   struct tgsi_image             *Image;
370   struct tgsi_buffer            *Buffer;
371   unsigned                      ImmLimit;
372
373   const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
374   unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
375
376   const struct tgsi_token       *Tokens;   /**< Declarations, instructions */
377   enum pipe_shader_type         ShaderType; /**< PIPE_SHADER_x */
378
379   /* GEOMETRY processor only. */
380   unsigned                      *Primitives;
381   unsigned                       NumOutputs;
382   unsigned                       MaxGeometryShaderOutputs;
383   unsigned                       MaxOutputVertices;
384
385   /* FRAGMENT processor only. */
386   const struct tgsi_interp_coef *InterpCoefs;
387   struct tgsi_exec_vector       QuadPos;
388   float                         Face;    /**< +1 if front facing, -1 if back facing */
389   bool                          flatshade_color;
390
391   /* Compute Only */
392   void                          *LocalMem;
393   unsigned                      LocalMemSize;
394
395   /* See GLSL 4.50 specification for definition of helper invocations */
396   uint NonHelperMask;  /**< non-helpers */
397   /* Conditional execution masks */
398   uint CondMask;  /**< For IF/ELSE/ENDIF */
399   uint LoopMask;  /**< For BGNLOOP/ENDLOOP */
400   uint ContMask;  /**< For loop CONT statements */
401   uint FuncMask;  /**< For function calls */
402   uint ExecMask;  /**< = CondMask & LoopMask */
403
404   /* Current switch-case state. */
405   struct tgsi_switch_record Switch;
406
407   /* Current break type. */
408   enum tgsi_break_type BreakType;
409
410   /** Condition mask stack (for nested conditionals) */
411   uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
412   int CondStackTop;
413
414   /** Loop mask stack (for nested loops) */
415   uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
416   int LoopStackTop;
417
418   /** Loop label stack */
419   uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
420   int LoopLabelStackTop;
421
422   /** Loop continue mask stack (see comments in tgsi_exec.c) */
423   uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
424   int ContStackTop;
425
426   /** Switch case stack */
427   struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
428   int SwitchStackTop;
429
430   enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
431   int BreakStackTop;
432
433   /** Function execution mask stack (for executing subroutine code) */
434   uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
435   int FuncStackTop;
436
437   /** Function call stack for saving/restoring the program counter */
438   struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
439   int CallStackTop;
440
441   struct tgsi_full_instruction *Instructions;
442   uint NumInstructions;
443
444   struct tgsi_full_declaration *Declarations;
445   uint NumDeclarations;
446
447   struct tgsi_declaration_sampler_view
448      SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
449
450   boolean UsedGeometryShader;
451
452   int pc;
453};
454
455struct tgsi_exec_machine *
456tgsi_exec_machine_create(enum pipe_shader_type shader_type);
457
458void
459tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
460
461
462void
463tgsi_exec_machine_bind_shader(
464   struct tgsi_exec_machine *mach,
465   const struct tgsi_token *tokens,
466   struct tgsi_sampler *sampler,
467   struct tgsi_image *image,
468   struct tgsi_buffer *buffer);
469
470uint
471tgsi_exec_machine_run(
472   struct tgsi_exec_machine *mach, int start_pc );
473
474
475void
476tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
477
478
479boolean
480tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
481
482
483extern void
484tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
485                               unsigned num_bufs,
486                               const void **bufs,
487                               const unsigned *buf_sizes);
488
489
490static inline int
491tgsi_exec_get_shader_param(enum pipe_shader_cap param)
492{
493   switch(param) {
494   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
495   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
496   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
497   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
498      return INT_MAX;
499   case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
500      return TGSI_EXEC_MAX_NESTING;
501   case PIPE_SHADER_CAP_MAX_INPUTS:
502      return TGSI_EXEC_MAX_INPUT_ATTRIBS;
503   case PIPE_SHADER_CAP_MAX_OUTPUTS:
504      return 32;
505   case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
506      return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
507   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
508      return PIPE_MAX_CONSTANT_BUFFERS;
509   case PIPE_SHADER_CAP_MAX_TEMPS:
510      return TGSI_EXEC_NUM_TEMPS;
511   case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
512      return 1;
513   case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
514   case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
515   case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
516   case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
517      return 1;
518   case PIPE_SHADER_CAP_SUBROUTINES:
519      return 1;
520   case PIPE_SHADER_CAP_INTEGERS:
521      return 1;
522   case PIPE_SHADER_CAP_INT64_ATOMICS:
523   case PIPE_SHADER_CAP_FP16:
524      return 0;
525   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
526      return PIPE_MAX_SAMPLERS;
527   case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
528      return PIPE_MAX_SHADER_SAMPLER_VIEWS;
529   case PIPE_SHADER_CAP_PREFERRED_IR:
530      return PIPE_SHADER_IR_TGSI;
531   case PIPE_SHADER_CAP_SUPPORTED_IRS:
532      return 1 << PIPE_SHADER_IR_TGSI;
533   case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
534      return 1;
535   case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
536   case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
537   case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
538      return 1;
539   case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
540   case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
541   case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
542   case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
543   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
544   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
545      return 0;
546   case PIPE_SHADER_CAP_SCALAR_ISA:
547      return 1;
548   case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
549      return PIPE_MAX_SHADER_BUFFERS;
550   case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
551      return PIPE_MAX_SHADER_IMAGES;
552
553   case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
554      return 32;
555   }
556   /* if we get here, we missed a shader cap above (and should have seen
557    * a compiler warning.)
558    */
559   return 0;
560}
561
562#if defined __cplusplus
563} /* extern "C" */
564#endif
565
566#endif /* TGSI_EXEC_H */
567