17ec681f3Smrg/* 27ec681f3Smrg * Copyright © 2018 Intel Corporation 37ec681f3Smrg * 47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 57ec681f3Smrg * copy of this software and associated documentation files (the "Software"), 67ec681f3Smrg * to deal in the Software without restriction, including without limitation 77ec681f3Smrg * on the rights to use, copy, modify, merge, publish, distribute, sub 87ec681f3Smrg * license, and/or sell copies of the Software, and to permit persons to whom 97ec681f3Smrg * the Software is furnished to do so, subject to the following conditions: 107ec681f3Smrg * 117ec681f3Smrg * The above copyright notice and this permission notice (including the next 127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the 137ec681f3Smrg * Software. 147ec681f3Smrg * 157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 187ec681f3Smrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 197ec681f3Smrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 207ec681f3Smrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 217ec681f3Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE. 227ec681f3Smrg */ 237ec681f3Smrg#ifndef CROCUS_DEFINES_H 247ec681f3Smrg#define CROCUS_DEFINES_H 257ec681f3Smrg 267ec681f3Smrg/** 277ec681f3Smrg * @file crocus_defines.h 287ec681f3Smrg * 297ec681f3Smrg * Random hardware #defines that we're not using GENXML for. 307ec681f3Smrg */ 317ec681f3Smrg 327ec681f3Smrg#define MI_PREDICATE (0xC << 23) 337ec681f3Smrg# define MI_PREDICATE_LOADOP_KEEP (0 << 6) 347ec681f3Smrg# define MI_PREDICATE_LOADOP_LOAD (2 << 6) 357ec681f3Smrg# define MI_PREDICATE_LOADOP_LOADINV (3 << 6) 367ec681f3Smrg# define MI_PREDICATE_COMBINEOP_SET (0 << 3) 377ec681f3Smrg# define MI_PREDICATE_COMBINEOP_AND (1 << 3) 387ec681f3Smrg# define MI_PREDICATE_COMBINEOP_OR (2 << 3) 397ec681f3Smrg# define MI_PREDICATE_COMBINEOP_XOR (3 << 3) 407ec681f3Smrg# define MI_PREDICATE_COMPAREOP_TRUE (0 << 0) 417ec681f3Smrg# define MI_PREDICATE_COMPAREOP_FALSE (1 << 0) 427ec681f3Smrg# define MI_PREDICATE_COMPAREOP_SRCS_EQUAL (2 << 0) 437ec681f3Smrg# define MI_PREDICATE_COMPAREOP_DELTAS_EQUAL (3 << 0) 447ec681f3Smrg 457ec681f3Smrg/* Predicate registers */ 467ec681f3Smrg#define MI_PREDICATE_SRC0 0x2400 477ec681f3Smrg#define MI_PREDICATE_SRC1 0x2408 487ec681f3Smrg#define MI_PREDICATE_DATA 0x2410 497ec681f3Smrg#define MI_PREDICATE_RESULT 0x2418 507ec681f3Smrg#define MI_PREDICATE_RESULT_1 0x241C 517ec681f3Smrg#define MI_PREDICATE_RESULT_2 0x2214 527ec681f3Smrg 537ec681f3Smrg#define CS_GPR(n) (0x2600 + (n) * 8) 547ec681f3Smrg 557ec681f3Smrg/* The number of bits in our TIMESTAMP queries. */ 567ec681f3Smrg#define TIMESTAMP_BITS 36 577ec681f3Smrg 587ec681f3Smrg#endif 59