17ec681f3Smrg/* 27ec681f3Smrg * Copyright © 2017 Intel Corporation 37ec681f3Smrg * 47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 57ec681f3Smrg * copy of this software and associated documentation files (the "Software"), 67ec681f3Smrg * to deal in the Software without restriction, including without limitation 77ec681f3Smrg * on the rights to use, copy, modify, merge, publish, distribute, sub 87ec681f3Smrg * license, and/or sell copies of the Software, and to permit persons to whom 97ec681f3Smrg * the Software is furnished to do so, subject to the following conditions: 107ec681f3Smrg * 117ec681f3Smrg * The above copyright notice and this permission notice (including the next 127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the 137ec681f3Smrg * Software. 147ec681f3Smrg * 157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 187ec681f3Smrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 197ec681f3Smrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 207ec681f3Smrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 217ec681f3Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE. 227ec681f3Smrg */ 237ec681f3Smrg#ifndef CROCUS_PIPE_H 247ec681f3Smrg#define CROCUS_PIPE_H 257ec681f3Smrg 267ec681f3Smrg#include "pipe/p_defines.h" 277ec681f3Smrg#include "compiler/shader_enums.h" 287ec681f3Smrg 297ec681f3Smrgstatic inline gl_shader_stage 307ec681f3Smrgstage_from_pipe(enum pipe_shader_type pstage) 317ec681f3Smrg{ 327ec681f3Smrg static const gl_shader_stage stages[PIPE_SHADER_TYPES] = { 337ec681f3Smrg [PIPE_SHADER_VERTEX] = MESA_SHADER_VERTEX, 347ec681f3Smrg [PIPE_SHADER_TESS_CTRL] = MESA_SHADER_TESS_CTRL, 357ec681f3Smrg [PIPE_SHADER_TESS_EVAL] = MESA_SHADER_TESS_EVAL, 367ec681f3Smrg [PIPE_SHADER_GEOMETRY] = MESA_SHADER_GEOMETRY, 377ec681f3Smrg [PIPE_SHADER_FRAGMENT] = MESA_SHADER_FRAGMENT, 387ec681f3Smrg [PIPE_SHADER_COMPUTE] = MESA_SHADER_COMPUTE, 397ec681f3Smrg }; 407ec681f3Smrg return stages[pstage]; 417ec681f3Smrg} 427ec681f3Smrg 437ec681f3Smrgstatic inline enum pipe_shader_type 447ec681f3Smrgstage_to_pipe(gl_shader_stage stage) 457ec681f3Smrg{ 467ec681f3Smrg static const enum pipe_shader_type pstages[MESA_SHADER_STAGES] = { 477ec681f3Smrg [MESA_SHADER_VERTEX] = PIPE_SHADER_VERTEX, 487ec681f3Smrg [MESA_SHADER_TESS_CTRL] = PIPE_SHADER_TESS_CTRL, 497ec681f3Smrg [MESA_SHADER_TESS_EVAL] = PIPE_SHADER_TESS_EVAL, 507ec681f3Smrg [MESA_SHADER_GEOMETRY] = PIPE_SHADER_GEOMETRY, 517ec681f3Smrg [MESA_SHADER_FRAGMENT] = PIPE_SHADER_FRAGMENT, 527ec681f3Smrg [MESA_SHADER_COMPUTE] = PIPE_SHADER_COMPUTE, 537ec681f3Smrg }; 547ec681f3Smrg return pstages[stage]; 557ec681f3Smrg} 567ec681f3Smrg 577ec681f3Smrg/** 587ec681f3Smrg * Convert an swizzle enumeration (i.e. PIPE_SWIZZLE_X) to one of the HW's 597ec681f3Smrg * "Shader Channel Select" enumerations (i.e. SCS_RED). The mappings are 607ec681f3Smrg * 617ec681f3Smrg * SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE 627ec681f3Smrg * 0 1 2 3 4 5 637ec681f3Smrg * 4 5 6 7 0 1 647ec681f3Smrg * SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE 657ec681f3Smrg * 667ec681f3Smrg * which is simply adding 4 then modding by 8 (or anding with 7). 677ec681f3Smrg */ 687ec681f3Smrgstatic inline enum isl_channel_select 697ec681f3Smrgpipe_swizzle_to_isl_channel(enum pipe_swizzle swizzle) 707ec681f3Smrg{ 717ec681f3Smrg return (swizzle + 4) & 7; 727ec681f3Smrg} 737ec681f3Smrg 747ec681f3Smrg#endif 75