r600_blit.c revision af69d88d
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23#include "r600_pipe.h" 24#include "util/u_surface.h" 25#include "util/u_format.h" 26#include "evergreend.h" 27 28enum r600_blitter_op /* bitmask */ 29{ 30 R600_SAVE_FRAGMENT_STATE = 1, 31 R600_SAVE_TEXTURES = 2, 32 R600_SAVE_FRAMEBUFFER = 4, 33 R600_DISABLE_RENDER_COND = 8, 34 35 R600_CLEAR = R600_SAVE_FRAGMENT_STATE, 36 37 R600_CLEAR_SURFACE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER, 38 39 R600_COPY_BUFFER = R600_DISABLE_RENDER_COND, 40 41 R600_COPY_TEXTURE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES | 42 R600_DISABLE_RENDER_COND, 43 44 R600_BLIT = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES, 45 46 R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND, 47 48 R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER 49}; 50 51static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op) 52{ 53 struct r600_context *rctx = (struct r600_context *)ctx; 54 55 r600_suspend_nontimer_queries(&rctx->b); 56 57 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb); 58 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso); 59 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader); 60 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader); 61 util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets, 62 (struct pipe_stream_output_target**)rctx->b.streamout.targets); 63 util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso); 64 65 if (op & R600_SAVE_FRAGMENT_STATE) { 66 util_blitter_save_viewport(rctx->blitter, &rctx->viewport[0].state); 67 util_blitter_save_scissor(rctx->blitter, &rctx->scissor[0].scissor); 68 util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader); 69 util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso); 70 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso); 71 util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state); 72 util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask); 73 } 74 75 if (op & R600_SAVE_FRAMEBUFFER) 76 util_blitter_save_framebuffer(rctx->blitter, &rctx->framebuffer.state); 77 78 if (op & R600_SAVE_TEXTURES) { 79 util_blitter_save_fragment_sampler_states( 80 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].states.enabled_mask), 81 (void**)rctx->samplers[PIPE_SHADER_FRAGMENT].states.states); 82 83 util_blitter_save_fragment_sampler_views( 84 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].views.enabled_mask), 85 (struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views); 86 } 87 88 if ((op & R600_DISABLE_RENDER_COND) && rctx->b.current_render_cond) { 89 util_blitter_save_render_condition(rctx->blitter, 90 rctx->b.current_render_cond, 91 rctx->b.current_render_cond_cond, 92 rctx->b.current_render_cond_mode); 93 } 94} 95 96static void r600_blitter_end(struct pipe_context *ctx) 97{ 98 struct r600_context *rctx = (struct r600_context *)ctx; 99 r600_resume_nontimer_queries(&rctx->b); 100} 101 102static unsigned u_max_sample(struct pipe_resource *r) 103{ 104 return r->nr_samples ? r->nr_samples - 1 : 0; 105} 106 107static void r600_blit_decompress_depth(struct pipe_context *ctx, 108 struct r600_texture *texture, 109 struct r600_texture *staging, 110 unsigned first_level, unsigned last_level, 111 unsigned first_layer, unsigned last_layer, 112 unsigned first_sample, unsigned last_sample) 113{ 114 struct r600_context *rctx = (struct r600_context *)ctx; 115 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample; 116 struct r600_texture *flushed_depth_texture = staging ? 117 staging : texture->flushed_depth_texture; 118 const struct util_format_description *desc = 119 util_format_description(texture->resource.b.b.format); 120 float depth; 121 122 if (!staging && !texture->dirty_level_mask) 123 return; 124 125 max_sample = u_max_sample(&texture->resource.b.b); 126 127 /* XXX Decompressing MSAA depth textures is broken on R6xx. 128 * There is also a hardlock if CMASK and FMASK are not present. 129 * Just skip this until we find out how to fix it. */ 130 if (rctx->b.chip_class == R600 && max_sample > 0) { 131 texture->dirty_level_mask = 0; 132 return; 133 } 134 135 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 || 136 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635) 137 depth = 0.0f; 138 else 139 depth = 1.0f; 140 141 /* Enable decompression in DB_RENDER_CONTROL */ 142 rctx->db_misc_state.flush_depthstencil_through_cb = true; 143 rctx->db_misc_state.copy_depth = util_format_has_depth(desc); 144 rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc); 145 rctx->db_misc_state.copy_sample = first_sample; 146 rctx->db_misc_state.atom.dirty = true; 147 148 for (level = first_level; level <= last_level; level++) { 149 if (!staging && !(texture->dirty_level_mask & (1 << level))) 150 continue; 151 152 /* The smaller the mipmap level, the less layers there are 153 * as far as 3D textures are concerned. */ 154 max_layer = util_max_layer(&texture->resource.b.b, level); 155 checked_last_layer = last_layer < max_layer ? last_layer : max_layer; 156 157 for (layer = first_layer; layer <= checked_last_layer; layer++) { 158 for (sample = first_sample; sample <= last_sample; sample++) { 159 struct pipe_surface *zsurf, *cbsurf, surf_tmpl; 160 161 if (sample != rctx->db_misc_state.copy_sample) { 162 rctx->db_misc_state.copy_sample = sample; 163 rctx->db_misc_state.atom.dirty = true; 164 } 165 166 surf_tmpl.format = texture->resource.b.b.format; 167 surf_tmpl.u.tex.level = level; 168 surf_tmpl.u.tex.first_layer = layer; 169 surf_tmpl.u.tex.last_layer = layer; 170 171 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl); 172 173 surf_tmpl.format = flushed_depth_texture->resource.b.b.format; 174 cbsurf = ctx->create_surface(ctx, 175 &flushed_depth_texture->resource.b.b, &surf_tmpl); 176 177 r600_blitter_begin(ctx, R600_DECOMPRESS); 178 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample, 179 rctx->custom_dsa_flush, depth); 180 r600_blitter_end(ctx); 181 182 pipe_surface_reference(&zsurf, NULL); 183 pipe_surface_reference(&cbsurf, NULL); 184 } 185 } 186 187 /* The texture will always be dirty if some layers or samples aren't flushed. 188 * I don't think this case occurs often though. */ 189 if (!staging && 190 first_layer == 0 && last_layer == max_layer && 191 first_sample == 0 && last_sample == max_sample) { 192 texture->dirty_level_mask &= ~(1 << level); 193 } 194 } 195 196 /* reenable compression in DB_RENDER_CONTROL */ 197 rctx->db_misc_state.flush_depthstencil_through_cb = false; 198 rctx->db_misc_state.atom.dirty = true; 199} 200 201static void r600_blit_decompress_depth_in_place(struct r600_context *rctx, 202 struct r600_texture *texture, 203 unsigned first_level, unsigned last_level, 204 unsigned first_layer, unsigned last_layer) 205{ 206 struct pipe_surface *zsurf, surf_tmpl = {{0}}; 207 unsigned layer, max_layer, checked_last_layer, level; 208 209 /* Enable decompression in DB_RENDER_CONTROL */ 210 rctx->db_misc_state.flush_depthstencil_in_place = true; 211 rctx->db_misc_state.atom.dirty = true; 212 213 surf_tmpl.format = texture->resource.b.b.format; 214 215 for (level = first_level; level <= last_level; level++) { 216 if (!(texture->dirty_level_mask & (1 << level))) 217 continue; 218 219 surf_tmpl.u.tex.level = level; 220 221 /* The smaller the mipmap level, the less layers there are 222 * as far as 3D textures are concerned. */ 223 max_layer = util_max_layer(&texture->resource.b.b, level); 224 checked_last_layer = last_layer < max_layer ? last_layer : max_layer; 225 226 for (layer = first_layer; layer <= checked_last_layer; layer++) { 227 surf_tmpl.u.tex.first_layer = layer; 228 surf_tmpl.u.tex.last_layer = layer; 229 230 zsurf = rctx->b.b.create_surface(&rctx->b.b, &texture->resource.b.b, &surf_tmpl); 231 232 r600_blitter_begin(&rctx->b.b, R600_DECOMPRESS); 233 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, NULL, ~0, 234 rctx->custom_dsa_flush, 1.0f); 235 r600_blitter_end(&rctx->b.b); 236 237 pipe_surface_reference(&zsurf, NULL); 238 } 239 240 /* The texture will always be dirty if some layers or samples aren't flushed. 241 * I don't think this case occurs often though. */ 242 if (first_layer == 0 && last_layer == max_layer) { 243 texture->dirty_level_mask &= ~(1 << level); 244 } 245 } 246 247 /* Disable decompression in DB_RENDER_CONTROL */ 248 rctx->db_misc_state.flush_depthstencil_in_place = false; 249 rctx->db_misc_state.atom.dirty = true; 250} 251 252void r600_decompress_depth_textures(struct r600_context *rctx, 253 struct r600_samplerview_state *textures) 254{ 255 unsigned i; 256 unsigned depth_texture_mask = textures->compressed_depthtex_mask; 257 258 while (depth_texture_mask) { 259 struct pipe_sampler_view *view; 260 struct r600_texture *tex; 261 262 i = u_bit_scan(&depth_texture_mask); 263 264 view = &textures->views[i]->base; 265 assert(view); 266 267 tex = (struct r600_texture *)view->texture; 268 assert(tex->is_depth && !tex->is_flushing_texture); 269 270 if (rctx->b.chip_class >= EVERGREEN || 271 r600_can_read_depth(tex)) { 272 r600_blit_decompress_depth_in_place(rctx, tex, 273 view->u.tex.first_level, view->u.tex.last_level, 274 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level)); 275 } else { 276 r600_blit_decompress_depth(&rctx->b.b, tex, NULL, 277 view->u.tex.first_level, view->u.tex.last_level, 278 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level), 279 0, u_max_sample(&tex->resource.b.b)); 280 } 281 } 282} 283 284static void r600_blit_decompress_color(struct pipe_context *ctx, 285 struct r600_texture *rtex, 286 unsigned first_level, unsigned last_level, 287 unsigned first_layer, unsigned last_layer) 288{ 289 struct r600_context *rctx = (struct r600_context *)ctx; 290 unsigned layer, level, checked_last_layer, max_layer; 291 292 if (!rtex->dirty_level_mask) 293 return; 294 295 for (level = first_level; level <= last_level; level++) { 296 if (!(rtex->dirty_level_mask & (1 << level))) 297 continue; 298 299 /* The smaller the mipmap level, the less layers there are 300 * as far as 3D textures are concerned. */ 301 max_layer = util_max_layer(&rtex->resource.b.b, level); 302 checked_last_layer = last_layer < max_layer ? last_layer : max_layer; 303 304 for (layer = first_layer; layer <= checked_last_layer; layer++) { 305 struct pipe_surface *cbsurf, surf_tmpl; 306 307 surf_tmpl.format = rtex->resource.b.b.format; 308 surf_tmpl.u.tex.level = level; 309 surf_tmpl.u.tex.first_layer = layer; 310 surf_tmpl.u.tex.last_layer = layer; 311 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl); 312 313 r600_blitter_begin(ctx, R600_DECOMPRESS); 314 util_blitter_custom_color(rctx->blitter, cbsurf, 315 rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear); 316 r600_blitter_end(ctx); 317 318 pipe_surface_reference(&cbsurf, NULL); 319 } 320 321 /* The texture will always be dirty if some layers aren't flushed. 322 * I don't think this case occurs often though. */ 323 if (first_layer == 0 && last_layer == max_layer) { 324 rtex->dirty_level_mask &= ~(1 << level); 325 } 326 } 327} 328 329void r600_decompress_color_textures(struct r600_context *rctx, 330 struct r600_samplerview_state *textures) 331{ 332 unsigned i; 333 unsigned mask = textures->compressed_colortex_mask; 334 335 while (mask) { 336 struct pipe_sampler_view *view; 337 struct r600_texture *tex; 338 339 i = u_bit_scan(&mask); 340 341 view = &textures->views[i]->base; 342 assert(view); 343 344 tex = (struct r600_texture *)view->texture; 345 assert(tex->cmask.size); 346 347 r600_blit_decompress_color(&rctx->b.b, tex, 348 view->u.tex.first_level, view->u.tex.last_level, 349 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level)); 350 } 351} 352 353/* Helper for decompressing a portion of a color or depth resource before 354 * blitting if any decompression is needed. 355 * The driver doesn't decompress resources automatically while u_blitter is 356 * rendering. */ 357static bool r600_decompress_subresource(struct pipe_context *ctx, 358 struct pipe_resource *tex, 359 unsigned level, 360 unsigned first_layer, unsigned last_layer) 361{ 362 struct r600_context *rctx = (struct r600_context *)ctx; 363 struct r600_texture *rtex = (struct r600_texture*)tex; 364 365 if (rtex->is_depth && !rtex->is_flushing_texture) { 366 if (rctx->b.chip_class >= EVERGREEN || 367 r600_can_read_depth(rtex)) { 368 r600_blit_decompress_depth_in_place(rctx, rtex, 369 level, level, 370 first_layer, last_layer); 371 } else { 372 if (!r600_init_flushed_depth_texture(ctx, tex, NULL)) 373 return false; /* error */ 374 375 r600_blit_decompress_depth(ctx, rtex, NULL, 376 level, level, 377 first_layer, last_layer, 378 0, u_max_sample(tex)); 379 } 380 } else if (rtex->cmask.size) { 381 r600_blit_decompress_color(ctx, rtex, level, level, 382 first_layer, last_layer); 383 } 384 return true; 385} 386 387static void r600_clear(struct pipe_context *ctx, unsigned buffers, 388 const union pipe_color_union *color, 389 double depth, unsigned stencil) 390{ 391 struct r600_context *rctx = (struct r600_context *)ctx; 392 struct pipe_framebuffer_state *fb = &rctx->framebuffer.state; 393 394 if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) { 395 evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom, 396 &buffers, color); 397 } 398 399 if (buffers & PIPE_CLEAR_COLOR) { 400 int i; 401 402 /* These buffers cannot use fast clear, make sure to disable expansion. */ 403 for (i = 0; i < fb->nr_cbufs; i++) { 404 struct r600_texture *tex; 405 406 /* If not clearing this buffer, skip. */ 407 if (!(buffers & (PIPE_CLEAR_COLOR0 << i))) 408 continue; 409 410 if (!fb->cbufs[i]) 411 continue; 412 413 tex = (struct r600_texture *)fb->cbufs[i]->texture; 414 if (tex->fmask.size == 0) 415 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level); 416 } 417 } 418 419 /* if hyperz enabled just clear hyperz */ 420 if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) { 421 struct r600_texture *rtex; 422 unsigned level = fb->zsbuf->u.tex.level; 423 424 rtex = (struct r600_texture*)fb->zsbuf->texture; 425 426 /* We can't use hyperz fast clear if each slice of a texture 427 * array are clear to different value. To simplify code just 428 * disable fast clear for texture array. 429 */ 430 /* Only use htile for first level */ 431 if (rtex->htile_buffer && !level && 432 util_max_layer(&rtex->resource.b.b, level) == 0) { 433 if (rtex->depth_clear_value != depth) { 434 rtex->depth_clear_value = depth; 435 rctx->db_state.atom.dirty = true; 436 } 437 rctx->db_misc_state.htile_clear = true; 438 rctx->db_misc_state.atom.dirty = true; 439 } 440 } 441 442 r600_blitter_begin(ctx, R600_CLEAR); 443 util_blitter_clear(rctx->blitter, fb->width, fb->height, 444 util_framebuffer_get_num_layers(fb), 445 buffers, color, depth, stencil); 446 r600_blitter_end(ctx); 447 448 /* disable fast clear */ 449 if (rctx->db_misc_state.htile_clear) { 450 rctx->db_misc_state.htile_clear = false; 451 rctx->db_misc_state.atom.dirty = true; 452 } 453} 454 455static void r600_clear_render_target(struct pipe_context *ctx, 456 struct pipe_surface *dst, 457 const union pipe_color_union *color, 458 unsigned dstx, unsigned dsty, 459 unsigned width, unsigned height) 460{ 461 struct r600_context *rctx = (struct r600_context *)ctx; 462 463 r600_blitter_begin(ctx, R600_CLEAR_SURFACE); 464 util_blitter_clear_render_target(rctx->blitter, dst, color, 465 dstx, dsty, width, height); 466 r600_blitter_end(ctx); 467} 468 469static void r600_clear_depth_stencil(struct pipe_context *ctx, 470 struct pipe_surface *dst, 471 unsigned clear_flags, 472 double depth, 473 unsigned stencil, 474 unsigned dstx, unsigned dsty, 475 unsigned width, unsigned height) 476{ 477 struct r600_context *rctx = (struct r600_context *)ctx; 478 479 r600_blitter_begin(ctx, R600_CLEAR_SURFACE); 480 util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil, 481 dstx, dsty, width, height); 482 r600_blitter_end(ctx); 483} 484 485static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx, 486 struct pipe_resource *src, const struct pipe_box *src_box) 487{ 488 struct r600_context *rctx = (struct r600_context*)ctx; 489 490 if (rctx->screen->b.has_cp_dma) { 491 r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width); 492 } 493 else if (rctx->screen->b.has_streamout && 494 /* Require 4-byte alignment. */ 495 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) { 496 497 r600_blitter_begin(ctx, R600_COPY_BUFFER); 498 util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width); 499 r600_blitter_end(ctx); 500 } else { 501 util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box); 502 } 503 504 /* The index buffer (VGT) doesn't seem to see the result of the copying. 505 * Can we somehow flush the index buffer cache? Starting a new IB seems 506 * to do the trick. */ 507 if (rctx->b.chip_class <= R700) 508 rctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL); 509} 510 511/** 512 * Global buffers are not really resources, they are are actually offsets 513 * into a single global resource (r600_screen::global_pool). The means 514 * they don't have their own cs_buf handle, so they cannot be passed 515 * to r600_copy_buffer() and must be handled separately. 516 * 517 * XXX: It should be possible to implement this function using 518 * r600_copy_buffer() by passing the memory_pool resource as both src 519 * and dst and updating dstx and src_box to point to the correct offsets. 520 * This would likely perform better than the current implementation. 521 */ 522static void r600_copy_global_buffer(struct pipe_context *ctx, 523 struct pipe_resource *dst, unsigned 524 dstx, struct pipe_resource *src, 525 const struct pipe_box *src_box) 526{ 527 struct pipe_box dst_box; struct pipe_transfer *src_pxfer, 528 *dst_pxfer; 529 530 u_box_1d(dstx, src_box->width, &dst_box); 531 void *src_ptr = ctx->transfer_map(ctx, src, 0, PIPE_TRANSFER_READ, 532 src_box, &src_pxfer); 533 void *dst_ptr = ctx->transfer_map(ctx, dst, 0, PIPE_TRANSFER_WRITE, 534 &dst_box, &dst_pxfer); 535 memcpy(dst_ptr, src_ptr, src_box->width); 536 537 ctx->transfer_unmap(ctx, src_pxfer); 538 ctx->transfer_unmap(ctx, dst_pxfer); 539} 540 541static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst, 542 unsigned offset, unsigned size, unsigned value) 543{ 544 struct r600_context *rctx = (struct r600_context*)ctx; 545 546 if (rctx->screen->b.has_cp_dma && 547 rctx->b.chip_class >= EVERGREEN && 548 offset % 4 == 0 && size % 4 == 0) { 549 evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value); 550 } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) { 551 union pipe_color_union clear_value; 552 clear_value.ui[0] = value; 553 554 r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND); 555 util_blitter_clear_buffer(rctx->blitter, dst, offset, size, 556 1, &clear_value); 557 r600_blitter_end(ctx); 558 } else { 559 uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst), 560 PIPE_TRANSFER_WRITE); 561 size /= 4; 562 for (unsigned i = 0; i < size; i++) 563 *map++ = value; 564 } 565} 566 567static void r600_resource_copy_region(struct pipe_context *ctx, 568 struct pipe_resource *dst, 569 unsigned dst_level, 570 unsigned dstx, unsigned dsty, unsigned dstz, 571 struct pipe_resource *src, 572 unsigned src_level, 573 const struct pipe_box *src_box) 574{ 575 struct r600_context *rctx = (struct r600_context *)ctx; 576 struct pipe_surface *dst_view, dst_templ; 577 struct pipe_sampler_view src_templ, *src_view; 578 unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL; 579 unsigned src_force_level = 0; 580 struct pipe_box sbox, dstbox; 581 582 /* Handle buffers first. */ 583 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) { 584 if ((src->bind & PIPE_BIND_GLOBAL) || 585 (dst->bind & PIPE_BIND_GLOBAL)) { 586 r600_copy_global_buffer(ctx, dst, dstx, src, src_box); 587 } else { 588 r600_copy_buffer(ctx, dst, dstx, src, src_box); 589 } 590 return; 591 } 592 593 assert(u_max_sample(dst) == u_max_sample(src)); 594 595 /* The driver doesn't decompress resources automatically while 596 * u_blitter is rendering. */ 597 if (!r600_decompress_subresource(ctx, src, src_level, 598 src_box->z, src_box->z + src_box->depth - 1)) { 599 return; /* error */ 600 } 601 602 dst_width = u_minify(dst->width0, dst_level); 603 dst_height = u_minify(dst->height0, dst_level); 604 src_width0 = src->width0; 605 src_height0 = src->height0; 606 src_widthFL = u_minify(src->width0, src_level); 607 src_heightFL = u_minify(src->height0, src_level); 608 609 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz); 610 util_blitter_default_src_texture(&src_templ, src, src_level); 611 612 if (util_format_is_compressed(src->format)) { 613 unsigned blocksize = util_format_get_blocksize(src->format); 614 615 if (blocksize == 8) 616 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */ 617 else 618 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */ 619 dst_templ.format = src_templ.format; 620 621 dst_width = util_format_get_nblocksx(dst->format, dst_width); 622 dst_height = util_format_get_nblocksy(dst->format, dst_height); 623 src_width0 = util_format_get_nblocksx(src->format, src_width0); 624 src_height0 = util_format_get_nblocksy(src->format, src_height0); 625 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL); 626 src_heightFL = util_format_get_nblocksy(src->format, src_heightFL); 627 628 dstx = util_format_get_nblocksx(dst->format, dstx); 629 dsty = util_format_get_nblocksy(dst->format, dsty); 630 631 sbox.x = util_format_get_nblocksx(src->format, src_box->x); 632 sbox.y = util_format_get_nblocksy(src->format, src_box->y); 633 sbox.z = src_box->z; 634 sbox.width = util_format_get_nblocksx(src->format, src_box->width); 635 sbox.height = util_format_get_nblocksy(src->format, src_box->height); 636 sbox.depth = src_box->depth; 637 src_box = &sbox; 638 639 src_force_level = src_level; 640 } else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) { 641 if (util_format_is_subsampled_422(src->format)) { 642 643 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT; 644 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT; 645 646 dst_width = util_format_get_nblocksx(dst->format, dst_width); 647 src_width0 = util_format_get_nblocksx(src->format, src_width0); 648 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL); 649 650 dstx = util_format_get_nblocksx(dst->format, dstx); 651 652 sbox = *src_box; 653 sbox.x = util_format_get_nblocksx(src->format, src_box->x); 654 sbox.width = util_format_get_nblocksx(src->format, src_box->width); 655 src_box = &sbox; 656 } else { 657 unsigned blocksize = util_format_get_blocksize(src->format); 658 659 switch (blocksize) { 660 case 1: 661 dst_templ.format = PIPE_FORMAT_R8_UNORM; 662 src_templ.format = PIPE_FORMAT_R8_UNORM; 663 break; 664 case 2: 665 dst_templ.format = PIPE_FORMAT_R8G8_UNORM; 666 src_templ.format = PIPE_FORMAT_R8G8_UNORM; 667 break; 668 case 4: 669 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM; 670 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM; 671 break; 672 case 8: 673 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; 674 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; 675 break; 676 case 16: 677 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; 678 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; 679 break; 680 default: 681 fprintf(stderr, "Unhandled format %s with blocksize %u\n", 682 util_format_short_name(src->format), blocksize); 683 assert(0); 684 } 685 } 686 } 687 688 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ, dst_width, dst_height); 689 690 if (rctx->b.chip_class >= EVERGREEN) { 691 src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ, 692 src_width0, src_height0, 693 src_force_level); 694 } else { 695 src_view = r600_create_sampler_view_custom(ctx, src, &src_templ, 696 src_widthFL, src_heightFL); 697 } 698 699 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height), 700 abs(src_box->depth), &dstbox); 701 702 /* Copy. */ 703 r600_blitter_begin(ctx, R600_COPY_TEXTURE); 704 util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox, 705 src_view, src_box, src_width0, src_height0, 706 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL); 707 r600_blitter_end(ctx); 708 709 pipe_surface_reference(&dst_view, NULL); 710 pipe_sampler_view_reference(&src_view, NULL); 711} 712 713/* For MSAA integer resolving to work, we change the format to NORM using this function. */ 714static enum pipe_format int_to_norm_format(enum pipe_format format) 715{ 716 switch (format) { 717#define REPLACE_FORMAT_SIGN(format,sign) \ 718 case PIPE_FORMAT_##format##_##sign##INT: \ 719 return PIPE_FORMAT_##format##_##sign##NORM 720#define REPLACE_FORMAT(format) \ 721 REPLACE_FORMAT_SIGN(format, U); \ 722 REPLACE_FORMAT_SIGN(format, S) 723 724 REPLACE_FORMAT_SIGN(B10G10R10A2, U); 725 REPLACE_FORMAT(R8); 726 REPLACE_FORMAT(R8G8); 727 REPLACE_FORMAT(R8G8B8X8); 728 REPLACE_FORMAT(R8G8B8A8); 729 REPLACE_FORMAT(A8); 730 REPLACE_FORMAT(I8); 731 REPLACE_FORMAT(L8); 732 REPLACE_FORMAT(L8A8); 733 REPLACE_FORMAT(R16); 734 REPLACE_FORMAT(R16G16); 735 REPLACE_FORMAT(R16G16B16X16); 736 REPLACE_FORMAT(R16G16B16A16); 737 REPLACE_FORMAT(A16); 738 REPLACE_FORMAT(I16); 739 REPLACE_FORMAT(L16); 740 REPLACE_FORMAT(L16A16); 741 742#undef REPLACE_FORMAT 743#undef REPLACE_FORMAT_SIGN 744 default: 745 return format; 746 } 747} 748 749static bool do_hardware_msaa_resolve(struct pipe_context *ctx, 750 const struct pipe_blit_info *info) 751{ 752 struct r600_context *rctx = (struct r600_context*)ctx; 753 struct r600_texture *dst = (struct r600_texture*)info->dst.resource; 754 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level); 755 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level); 756 enum pipe_format format = int_to_norm_format(info->dst.format); 757 unsigned sample_mask = 758 rctx->b.chip_class == CAYMAN ? ~0 : 759 ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1); 760 761 if (info->src.resource->nr_samples > 1 && 762 info->dst.resource->nr_samples <= 1 && 763 util_max_layer(info->src.resource, 0) == 0 && 764 util_max_layer(info->dst.resource, info->dst.level) == 0 && 765 info->dst.format == info->src.format && 766 !util_format_is_pure_integer(format) && 767 !util_format_is_depth_or_stencil(format) && 768 !info->scissor_enable && 769 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA && 770 dst_width == info->src.resource->width0 && 771 dst_height == info->src.resource->height0 && 772 info->dst.box.x == 0 && 773 info->dst.box.y == 0 && 774 info->dst.box.width == dst_width && 775 info->dst.box.height == dst_height && 776 info->dst.box.depth == 1 && 777 info->src.box.x == 0 && 778 info->src.box.y == 0 && 779 info->src.box.width == dst_width && 780 info->src.box.height == dst_height && 781 info->src.box.depth == 1 && 782 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D && 783 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) { 784 r600_blitter_begin(ctx, R600_COLOR_RESOLVE | 785 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND)); 786 util_blitter_custom_resolve_color(rctx->blitter, 787 info->dst.resource, info->dst.level, 788 info->dst.box.z, 789 info->src.resource, info->src.box.z, 790 sample_mask, rctx->custom_blend_resolve, 791 format); 792 r600_blitter_end(ctx); 793 return true; 794 } 795 return false; 796} 797 798static void r600_blit(struct pipe_context *ctx, 799 const struct pipe_blit_info *info) 800{ 801 struct r600_context *rctx = (struct r600_context*)ctx; 802 803 if (do_hardware_msaa_resolve(ctx, info)) { 804 return; 805 } 806 807 assert(util_blitter_is_blit_supported(rctx->blitter, info)); 808 809 /* The driver doesn't decompress resources automatically while 810 * u_blitter is rendering. */ 811 if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level, 812 info->src.box.z, 813 info->src.box.z + info->src.box.depth - 1)) { 814 return; /* error */ 815 } 816 817 r600_blitter_begin(ctx, R600_BLIT | 818 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND)); 819 util_blitter_blit(rctx->blitter, info); 820 r600_blitter_end(ctx); 821} 822 823static void r600_flush_resource(struct pipe_context *ctx, 824 struct pipe_resource *res) 825{ 826 struct r600_texture *rtex = (struct r600_texture*)res; 827 828 assert(res->target != PIPE_BUFFER); 829 830 if (!rtex->is_depth && rtex->cmask.size) { 831 r600_blit_decompress_color(ctx, rtex, 0, res->last_level, 832 0, util_max_layer(res, 0)); 833 } 834} 835 836void r600_init_blit_functions(struct r600_context *rctx) 837{ 838 rctx->b.b.clear = r600_clear; 839 rctx->b.b.clear_render_target = r600_clear_render_target; 840 rctx->b.b.clear_depth_stencil = r600_clear_depth_stencil; 841 rctx->b.b.resource_copy_region = r600_resource_copy_region; 842 rctx->b.b.blit = r600_blit; 843 rctx->b.b.flush_resource = r600_flush_resource; 844 rctx->b.clear_buffer = r600_clear_buffer; 845 rctx->b.blit_decompress_depth = r600_blit_decompress_depth; 846} 847