radeon_vce.h revision af69d88d
1/************************************************************************** 2 * 3 * Copyright 2013 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28/* 29 * Authors: 30 * Christian König <christian.koenig@amd.com> 31 * 32 */ 33 34#ifndef RADEON_VCE_H 35#define RADEON_VCE_H 36 37#include "util/u_double_list.h" 38 39#define RVCE_RELOC(buf, usage, domain) (enc->ws->cs_add_reloc(enc->cs, (buf), (usage), domain, RADEON_PRIO_MIN)) 40 41#define RVCE_CS(value) (enc->cs->buf[enc->cs->cdw++] = (value)) 42#define RVCE_BEGIN(cmd) { uint32_t *begin = &enc->cs->buf[enc->cs->cdw++]; RVCE_CS(cmd) 43#define RVCE_READ(buf, domain) RVCE_CS(RVCE_RELOC(buf, RADEON_USAGE_READ, domain) * 4) 44#define RVCE_WRITE(buf, domain) RVCE_CS(RVCE_RELOC(buf, RADEON_USAGE_WRITE, domain) * 4) 45#define RVCE_READWRITE(buf, domain) RVCE_CS(RVCE_RELOC(buf, RADEON_USAGE_READWRITE, domain) * 4) 46#define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; } 47 48struct r600_common_screen; 49 50/* driver dependent callback */ 51typedef void (*rvce_get_buffer)(struct pipe_resource *resource, 52 struct radeon_winsys_cs_handle **handle, 53 struct radeon_surface **surface); 54 55/* Coded picture buffer slot */ 56struct rvce_cpb_slot { 57 struct list_head list; 58 59 unsigned index; 60 enum pipe_h264_enc_picture_type picture_type; 61 unsigned frame_num; 62 unsigned pic_order_cnt; 63}; 64 65/* VCE encoder representation */ 66struct rvce_encoder { 67 struct pipe_video_codec base; 68 69 /* version specific packets */ 70 void (*session)(struct rvce_encoder *enc); 71 void (*create)(struct rvce_encoder *enc); 72 void (*feedback)(struct rvce_encoder *enc); 73 void (*rate_control)(struct rvce_encoder *enc); 74 void (*config_extension)(struct rvce_encoder *enc); 75 void (*pic_control)(struct rvce_encoder *enc); 76 void (*motion_estimation)(struct rvce_encoder *enc); 77 void (*rdo)(struct rvce_encoder *enc); 78 void (*encode)(struct rvce_encoder *enc); 79 void (*destroy)(struct rvce_encoder *enc); 80 81 unsigned stream_handle; 82 83 struct radeon_winsys* ws; 84 struct radeon_winsys_cs* cs; 85 86 rvce_get_buffer get_buffer; 87 88 struct radeon_winsys_cs_handle* handle; 89 struct radeon_surface* luma; 90 struct radeon_surface* chroma; 91 92 struct radeon_winsys_cs_handle* bs_handle; 93 unsigned bs_size; 94 95 struct rvce_cpb_slot *cpb_array; 96 struct list_head cpb_slots; 97 unsigned cpb_num; 98 99 struct rvid_buffer *fb; 100 struct rvid_buffer cpb; 101 struct pipe_h264_enc_picture_desc pic; 102}; 103 104struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context, 105 const struct pipe_video_codec *templat, 106 struct radeon_winsys* ws, 107 rvce_get_buffer get_buffer); 108 109bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen); 110 111/* init vce fw 40.2.2 specific callbacks */ 112void radeon_vce_40_2_2_init(struct rvce_encoder *enc); 113 114#endif 115