101e04c3fSmrg/* 201e04c3fSmrg * Copyright 2015 Advanced Micro Devices, Inc. 301e04c3fSmrg * All Rights Reserved. 401e04c3fSmrg * 501e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a 601e04c3fSmrg * copy of this software and associated documentation files (the "Software"), 701e04c3fSmrg * to deal in the Software without restriction, including without limitation 801e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 901e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the 1001e04c3fSmrg * Software is furnished to do so, subject to the following conditions: 1101e04c3fSmrg * 1201e04c3fSmrg * The above copyright notice and this permission notice (including the next 1301e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the 1401e04c3fSmrg * Software. 1501e04c3fSmrg * 1601e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1701e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1801e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1901e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 2001e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 2101e04c3fSmrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 2201e04c3fSmrg * SOFTWARE. 2301e04c3fSmrg */ 2401e04c3fSmrg 2501e04c3fSmrg#ifndef SI_QUERY_H 2601e04c3fSmrg#define SI_QUERY_H 2701e04c3fSmrg 2801e04c3fSmrg#include "util/u_threaded_context.h" 2901e04c3fSmrg 307ec681f3Smrg#include "ac_perfcounter.h" 317ec681f3Smrg 3201e04c3fSmrgstruct pipe_context; 3301e04c3fSmrgstruct pipe_query; 3401e04c3fSmrgstruct pipe_resource; 3501e04c3fSmrg 3601e04c3fSmrgstruct si_screen; 3701e04c3fSmrgstruct si_context; 3801e04c3fSmrgstruct si_query; 399f464c52Smayastruct si_query_buffer; 4001e04c3fSmrgstruct si_query_hw; 419f464c52Smayastruct si_resource; 4201e04c3fSmrg 437ec681f3Smrg#define SI_MAX_STREAMS 4 447ec681f3Smrg 457ec681f3Smrgenum 467ec681f3Smrg{ 477ec681f3Smrg SI_QUERY_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC, 487ec681f3Smrg SI_QUERY_DECOMPRESS_CALLS, 497ec681f3Smrg SI_QUERY_PRIM_RESTART_CALLS, 507ec681f3Smrg SI_QUERY_COMPUTE_CALLS, 517ec681f3Smrg SI_QUERY_CP_DMA_CALLS, 527ec681f3Smrg SI_QUERY_NUM_VS_FLUSHES, 537ec681f3Smrg SI_QUERY_NUM_PS_FLUSHES, 547ec681f3Smrg SI_QUERY_NUM_CS_FLUSHES, 557ec681f3Smrg SI_QUERY_NUM_CB_CACHE_FLUSHES, 567ec681f3Smrg SI_QUERY_NUM_DB_CACHE_FLUSHES, 577ec681f3Smrg SI_QUERY_NUM_L2_INVALIDATES, 587ec681f3Smrg SI_QUERY_NUM_L2_WRITEBACKS, 597ec681f3Smrg SI_QUERY_NUM_RESIDENT_HANDLES, 607ec681f3Smrg SI_QUERY_TC_OFFLOADED_SLOTS, 617ec681f3Smrg SI_QUERY_TC_DIRECT_SLOTS, 627ec681f3Smrg SI_QUERY_TC_NUM_SYNCS, 637ec681f3Smrg SI_QUERY_CS_THREAD_BUSY, 647ec681f3Smrg SI_QUERY_GALLIUM_THREAD_BUSY, 657ec681f3Smrg SI_QUERY_REQUESTED_VRAM, 667ec681f3Smrg SI_QUERY_REQUESTED_GTT, 677ec681f3Smrg SI_QUERY_MAPPED_VRAM, 687ec681f3Smrg SI_QUERY_MAPPED_GTT, 697ec681f3Smrg SI_QUERY_SLAB_WASTED_VRAM, 707ec681f3Smrg SI_QUERY_SLAB_WASTED_GTT, 717ec681f3Smrg SI_QUERY_BUFFER_WAIT_TIME, 727ec681f3Smrg SI_QUERY_NUM_MAPPED_BUFFERS, 737ec681f3Smrg SI_QUERY_NUM_GFX_IBS, 747ec681f3Smrg SI_QUERY_GFX_BO_LIST_SIZE, 757ec681f3Smrg SI_QUERY_GFX_IB_SIZE, 767ec681f3Smrg SI_QUERY_NUM_BYTES_MOVED, 777ec681f3Smrg SI_QUERY_NUM_EVICTIONS, 787ec681f3Smrg SI_QUERY_NUM_VRAM_CPU_PAGE_FAULTS, 797ec681f3Smrg SI_QUERY_VRAM_USAGE, 807ec681f3Smrg SI_QUERY_VRAM_VIS_USAGE, 817ec681f3Smrg SI_QUERY_GTT_USAGE, 827ec681f3Smrg SI_QUERY_GPU_TEMPERATURE, 837ec681f3Smrg SI_QUERY_CURRENT_GPU_SCLK, 847ec681f3Smrg SI_QUERY_CURRENT_GPU_MCLK, 857ec681f3Smrg SI_QUERY_GPU_LOAD, 867ec681f3Smrg SI_QUERY_GPU_SHADERS_BUSY, 877ec681f3Smrg SI_QUERY_GPU_TA_BUSY, 887ec681f3Smrg SI_QUERY_GPU_GDS_BUSY, 897ec681f3Smrg SI_QUERY_GPU_VGT_BUSY, 907ec681f3Smrg SI_QUERY_GPU_IA_BUSY, 917ec681f3Smrg SI_QUERY_GPU_SX_BUSY, 927ec681f3Smrg SI_QUERY_GPU_WD_BUSY, 937ec681f3Smrg SI_QUERY_GPU_BCI_BUSY, 947ec681f3Smrg SI_QUERY_GPU_SC_BUSY, 957ec681f3Smrg SI_QUERY_GPU_PA_BUSY, 967ec681f3Smrg SI_QUERY_GPU_DB_BUSY, 977ec681f3Smrg SI_QUERY_GPU_CP_BUSY, 987ec681f3Smrg SI_QUERY_GPU_CB_BUSY, 997ec681f3Smrg SI_QUERY_GPU_SDMA_BUSY, 1007ec681f3Smrg SI_QUERY_GPU_PFP_BUSY, 1017ec681f3Smrg SI_QUERY_GPU_MEQ_BUSY, 1027ec681f3Smrg SI_QUERY_GPU_ME_BUSY, 1037ec681f3Smrg SI_QUERY_GPU_SURF_SYNC_BUSY, 1047ec681f3Smrg SI_QUERY_GPU_CP_DMA_BUSY, 1057ec681f3Smrg SI_QUERY_GPU_SCRATCH_RAM_BUSY, 1067ec681f3Smrg SI_QUERY_NUM_COMPILATIONS, 1077ec681f3Smrg SI_QUERY_NUM_SHADERS_CREATED, 1087ec681f3Smrg SI_QUERY_BACK_BUFFER_PS_DRAW_RATIO, 1097ec681f3Smrg SI_QUERY_GPIN_ASIC_ID, 1107ec681f3Smrg SI_QUERY_GPIN_NUM_SIMD, 1117ec681f3Smrg SI_QUERY_GPIN_NUM_RB, 1127ec681f3Smrg SI_QUERY_GPIN_NUM_SPI, 1137ec681f3Smrg SI_QUERY_GPIN_NUM_SE, 1147ec681f3Smrg SI_QUERY_LIVE_SHADER_CACHE_HITS, 1157ec681f3Smrg SI_QUERY_LIVE_SHADER_CACHE_MISSES, 1167ec681f3Smrg SI_QUERY_MEMORY_SHADER_CACHE_HITS, 1177ec681f3Smrg SI_QUERY_MEMORY_SHADER_CACHE_MISSES, 1187ec681f3Smrg SI_QUERY_DISK_SHADER_CACHE_HITS, 1197ec681f3Smrg SI_QUERY_DISK_SHADER_CACHE_MISSES, 1207ec681f3Smrg 1217ec681f3Smrg SI_QUERY_FIRST_PERFCOUNTER = PIPE_QUERY_DRIVER_SPECIFIC + 100, 12201e04c3fSmrg}; 12301e04c3fSmrg 1247ec681f3Smrgenum 1257ec681f3Smrg{ 1267ec681f3Smrg SI_QUERY_GROUP_GPIN = 0, 1277ec681f3Smrg SI_NUM_SW_QUERY_GROUPS 12801e04c3fSmrg}; 12901e04c3fSmrg 13001e04c3fSmrgstruct si_query_ops { 1317ec681f3Smrg void (*destroy)(struct si_context *, struct si_query *); 1327ec681f3Smrg bool (*begin)(struct si_context *, struct si_query *); 1337ec681f3Smrg bool (*end)(struct si_context *, struct si_query *); 1347ec681f3Smrg bool (*get_result)(struct si_context *, struct si_query *, bool wait, 1357ec681f3Smrg union pipe_query_result *result); 1367ec681f3Smrg void (*get_result_resource)(struct si_context *, struct si_query *, bool wait, 1377ec681f3Smrg enum pipe_query_value_type result_type, int index, 1387ec681f3Smrg struct pipe_resource *resource, unsigned offset); 1397ec681f3Smrg 1407ec681f3Smrg void (*suspend)(struct si_context *, struct si_query *); 1417ec681f3Smrg void (*resume)(struct si_context *, struct si_query *); 14201e04c3fSmrg}; 14301e04c3fSmrg 14401e04c3fSmrgstruct si_query { 1457ec681f3Smrg struct threaded_query b; 1467ec681f3Smrg const struct si_query_ops *ops; 14701e04c3fSmrg 1487ec681f3Smrg /* The PIPE_QUERY_xxx type of query */ 1497ec681f3Smrg unsigned type; 1509f464c52Smaya 1517ec681f3Smrg /* The number of dwords for suspend. */ 1527ec681f3Smrg unsigned num_cs_dw_suspend; 1539f464c52Smaya 1547ec681f3Smrg /* Linked list of queries that must be suspended at end of CS. */ 1557ec681f3Smrg struct list_head active_list; 15601e04c3fSmrg}; 15701e04c3fSmrg 1587ec681f3Smrgenum 1597ec681f3Smrg{ 1607ec681f3Smrg SI_QUERY_HW_FLAG_NO_START = (1 << 0), 1617ec681f3Smrg /* gap */ 1627ec681f3Smrg /* whether begin_query doesn't clear the result */ 1637ec681f3Smrg SI_QUERY_HW_FLAG_BEGIN_RESUMES = (1 << 2), 16401e04c3fSmrg}; 16501e04c3fSmrg 16601e04c3fSmrgstruct si_query_hw_ops { 1677ec681f3Smrg bool (*prepare_buffer)(struct si_context *, struct si_query_buffer *); 1687ec681f3Smrg void (*emit_start)(struct si_context *, struct si_query_hw *, struct si_resource *buffer, 1697ec681f3Smrg uint64_t va); 1707ec681f3Smrg void (*emit_stop)(struct si_context *, struct si_query_hw *, struct si_resource *buffer, 1717ec681f3Smrg uint64_t va); 1727ec681f3Smrg void (*clear_result)(struct si_query_hw *, union pipe_query_result *); 1737ec681f3Smrg void (*add_result)(struct si_screen *screen, struct si_query_hw *, void *buffer, 1747ec681f3Smrg union pipe_query_result *result); 17501e04c3fSmrg}; 17601e04c3fSmrg 17701e04c3fSmrgstruct si_query_buffer { 1787ec681f3Smrg /* The buffer where query results are stored. */ 1797ec681f3Smrg struct si_resource *buf; 1807ec681f3Smrg /* If a query buffer is full, a new buffer is created and the old one 1817ec681f3Smrg * is put in here. When we calculate the result, we sum up the samples 1827ec681f3Smrg * from all buffers. */ 1837ec681f3Smrg struct si_query_buffer *previous; 1847ec681f3Smrg /* Offset of the next free result after current query data */ 1857ec681f3Smrg unsigned results_end; 1867ec681f3Smrg bool unprepared; 18701e04c3fSmrg}; 18801e04c3fSmrg 1899f464c52Smayavoid si_query_buffer_destroy(struct si_screen *sctx, struct si_query_buffer *buffer); 1909f464c52Smayavoid si_query_buffer_reset(struct si_context *sctx, struct si_query_buffer *buffer); 1919f464c52Smayabool si_query_buffer_alloc(struct si_context *sctx, struct si_query_buffer *buffer, 1927ec681f3Smrg bool (*prepare_buffer)(struct si_context *, struct si_query_buffer *), 1937ec681f3Smrg unsigned size); 1949f464c52Smaya 19501e04c3fSmrgstruct si_query_hw { 1967ec681f3Smrg struct si_query b; 1977ec681f3Smrg struct si_query_hw_ops *ops; 1987ec681f3Smrg unsigned flags; 1997ec681f3Smrg 2007ec681f3Smrg /* The query buffer and how many results are in it. */ 2017ec681f3Smrg struct si_query_buffer buffer; 2027ec681f3Smrg /* Size of the result in memory for both begin_query and end_query, 2037ec681f3Smrg * this can be one or two numbers, or it could even be a size of a structure. */ 2047ec681f3Smrg unsigned result_size; 2057ec681f3Smrg /* For transform feedback: which stream the query is for */ 2067ec681f3Smrg unsigned stream; 2077ec681f3Smrg 2087ec681f3Smrg /* Workaround via compute shader */ 2097ec681f3Smrg struct si_resource *workaround_buf; 2107ec681f3Smrg unsigned workaround_offset; 21101e04c3fSmrg}; 21201e04c3fSmrg 2137ec681f3Smrgvoid si_query_hw_destroy(struct si_context *sctx, struct si_query *squery); 2147ec681f3Smrgbool si_query_hw_begin(struct si_context *sctx, struct si_query *squery); 2157ec681f3Smrgbool si_query_hw_end(struct si_context *sctx, struct si_query *squery); 2167ec681f3Smrgbool si_query_hw_get_result(struct si_context *sctx, struct si_query *squery, bool wait, 2177ec681f3Smrg union pipe_query_result *result); 2189f464c52Smayavoid si_query_hw_suspend(struct si_context *sctx, struct si_query *query); 2199f464c52Smayavoid si_query_hw_resume(struct si_context *sctx, struct si_query *query); 22001e04c3fSmrg 2217ec681f3Smrg/* Shader-based queries */ 2227ec681f3Smrg 2237ec681f3Smrg/** 2247ec681f3Smrg * The query buffer is written to by ESGS NGG shaders with statistics about 2257ec681f3Smrg * generated and (streamout-)emitted primitives. 2267ec681f3Smrg * 2277ec681f3Smrg * The context maintains a ring of these query buffers, and queries simply 2287ec681f3Smrg * point into the ring, allowing an arbitrary number of queries to be active 2297ec681f3Smrg * without additional GPU cost. 2307ec681f3Smrg */ 2317ec681f3Smrgstruct gfx10_sh_query_buffer { 2327ec681f3Smrg struct list_head list; 2337ec681f3Smrg struct si_resource *buf; 2347ec681f3Smrg unsigned refcount; 2357ec681f3Smrg 2367ec681f3Smrg /* Offset into the buffer in bytes; points at the first un-emitted entry. */ 2377ec681f3Smrg unsigned head; 2387ec681f3Smrg}; 2397ec681f3Smrg 2407ec681f3Smrg/* Memory layout of the query buffer. Must be kept in sync with shaders 2417ec681f3Smrg * (including QBO shaders) and should be aligned to cachelines. 2427ec681f3Smrg * 2437ec681f3Smrg * The somewhat awkward memory layout is for compatibility with the 2447ec681f3Smrg * SET_PREDICATION packet, which also means that we're setting the high bit 2457ec681f3Smrg * of all those values unconditionally. 2467ec681f3Smrg */ 2477ec681f3Smrgstruct gfx10_sh_query_buffer_mem { 2487ec681f3Smrg struct { 2497ec681f3Smrg uint64_t generated_primitives_start_dummy; 2507ec681f3Smrg uint64_t emitted_primitives_start_dummy; 2517ec681f3Smrg uint64_t generated_primitives; 2527ec681f3Smrg uint64_t emitted_primitives; 2537ec681f3Smrg } stream[4]; 2547ec681f3Smrg uint32_t fence; /* bottom-of-pipe fence: set to ~0 when draws have finished */ 2557ec681f3Smrg uint32_t pad[31]; 2567ec681f3Smrg}; 2577ec681f3Smrg 2587ec681f3Smrgstruct gfx10_sh_query { 2597ec681f3Smrg struct si_query b; 2607ec681f3Smrg 2617ec681f3Smrg struct gfx10_sh_query_buffer *first; 2627ec681f3Smrg struct gfx10_sh_query_buffer *last; 2637ec681f3Smrg unsigned first_begin; 2647ec681f3Smrg unsigned last_end; 2657ec681f3Smrg 2667ec681f3Smrg unsigned stream; 2677ec681f3Smrg}; 2687ec681f3Smrg 2697ec681f3Smrgstruct pipe_query *gfx10_sh_query_create(struct si_screen *screen, enum pipe_query_type query_type, 2707ec681f3Smrg unsigned index); 27101e04c3fSmrg 2729f464c52Smaya/* Performance counters */ 27301e04c3fSmrgstruct si_perfcounters { 2747ec681f3Smrg struct ac_perfcounters base; 27501e04c3fSmrg 2767ec681f3Smrg unsigned num_stop_cs_dwords; 2777ec681f3Smrg unsigned num_instance_cs_dwords; 27801e04c3fSmrg}; 27901e04c3fSmrg 2807ec681f3Smrgstruct pipe_query *si_create_batch_query(struct pipe_context *ctx, unsigned num_queries, 2817ec681f3Smrg unsigned *query_types); 28201e04c3fSmrg 2837ec681f3Smrgint si_get_perfcounter_info(struct si_screen *, unsigned index, 2847ec681f3Smrg struct pipe_driver_query_info *info); 2857ec681f3Smrgint si_get_perfcounter_group_info(struct si_screen *, unsigned index, 2867ec681f3Smrg struct pipe_driver_query_group_info *info); 28701e04c3fSmrg 28801e04c3fSmrgstruct si_qbo_state { 2897ec681f3Smrg struct pipe_constant_buffer saved_const0; 29001e04c3fSmrg}; 29101e04c3fSmrg 29201e04c3fSmrg#endif /* SI_QUERY_H */ 293