101e04c3fSmrg/****************************************************************************
201e04c3fSmrg * Copyright (C) 2015 Intel Corporation.   All Rights Reserved.
301e04c3fSmrg *
401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
501e04c3fSmrg * copy of this software and associated documentation files (the "Software"),
601e04c3fSmrg * to deal in the Software without restriction, including without limitation
701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the
901e04c3fSmrg * Software is furnished to do so, subject to the following conditions:
1001e04c3fSmrg *
1101e04c3fSmrg * The above copyright notice and this permission notice (including the next
1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the
1301e04c3fSmrg * Software.
1401e04c3fSmrg *
1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2101e04c3fSmrg * IN THE SOFTWARE.
2201e04c3fSmrg ***************************************************************************/
2301e04c3fSmrg
2401e04c3fSmrg#include "swr_context.h"
2501e04c3fSmrg#include "swr_query.h"
2601e04c3fSmrg
2701e04c3fSmrgstatic void
2801e04c3fSmrgswr_clear(struct pipe_context *pipe,
2901e04c3fSmrg          unsigned buffers,
307ec681f3Smrg          const struct pipe_scissor_state *scissor_state,
3101e04c3fSmrg          const union pipe_color_union *color,
3201e04c3fSmrg          double depth,
3301e04c3fSmrg          unsigned stencil)
3401e04c3fSmrg{
3501e04c3fSmrg   struct swr_context *ctx = swr_context(pipe);
3601e04c3fSmrg   struct pipe_framebuffer_state *fb = &ctx->framebuffer;
3701e04c3fSmrg
3801e04c3fSmrg   UINT clearMask = 0;
3901e04c3fSmrg   unsigned layers = 0;
4001e04c3fSmrg
4101e04c3fSmrg   if (!swr_check_render_cond(pipe))
4201e04c3fSmrg      return;
4301e04c3fSmrg
4401e04c3fSmrg   swr_update_derived(pipe);
4501e04c3fSmrg
4601e04c3fSmrg   if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
4701e04c3fSmrg      for (unsigned i = 0; i < fb->nr_cbufs; ++i)
4801e04c3fSmrg         if (fb->cbufs[i] && (buffers & (PIPE_CLEAR_COLOR0 << i))) {
4901e04c3fSmrg            clearMask |= (SWR_ATTACHMENT_COLOR0_BIT << i);
5001e04c3fSmrg            layers = std::max(layers, fb->cbufs[i]->u.tex.last_layer -
5101e04c3fSmrg                                      fb->cbufs[i]->u.tex.first_layer + 1u);
5201e04c3fSmrg         }
5301e04c3fSmrg   }
5401e04c3fSmrg
5501e04c3fSmrg   if (buffers & PIPE_CLEAR_DEPTH && fb->zsbuf) {
5601e04c3fSmrg      clearMask |= SWR_ATTACHMENT_DEPTH_BIT;
5701e04c3fSmrg      layers = std::max(layers, fb->zsbuf->u.tex.last_layer -
5801e04c3fSmrg                                fb->zsbuf->u.tex.first_layer + 1u);
5901e04c3fSmrg   }
6001e04c3fSmrg
6101e04c3fSmrg   if (buffers & PIPE_CLEAR_STENCIL && fb->zsbuf) {
6201e04c3fSmrg      clearMask |= SWR_ATTACHMENT_STENCIL_BIT;
6301e04c3fSmrg      layers = std::max(layers, fb->zsbuf->u.tex.last_layer -
6401e04c3fSmrg                                fb->zsbuf->u.tex.first_layer + 1u);
6501e04c3fSmrg   }
6601e04c3fSmrg
6701e04c3fSmrg#if 0 // XXX HACK, override clear color alpha. On ubuntu, clears are
6801e04c3fSmrg      // transparent.
6901e04c3fSmrg   ((union pipe_color_union *)color)->f[3] = 1.0; /* cast off your const'd-ness */
7001e04c3fSmrg#endif
7101e04c3fSmrg
727ec681f3Smrg   /*
737ec681f3Smrg    * Always clear full surface. When GL_SCISSOR_TEST is enabled
747ec681f3Smrg    * glClear is handled by state tracker and there is no need to do this here
757ec681f3Smrg    */
767ec681f3Smrg   SWR_RECT clear_rect = {0, 0, (int32_t)fb->width, (int32_t)fb->height};
7701e04c3fSmrg
7801e04c3fSmrg   for (unsigned i = 0; i < layers; ++i) {
7901e04c3fSmrg      swr_update_draw_context(ctx);
8001e04c3fSmrg      ctx->api.pfnSwrClearRenderTarget(ctx->swrContext, clearMask, i,
8101e04c3fSmrg                                       color->f, depth, stencil,
8201e04c3fSmrg                                       clear_rect);
8301e04c3fSmrg
8401e04c3fSmrg      // Mask out the attachments that are out of layers.
8501e04c3fSmrg      if (fb->zsbuf &&
8601e04c3fSmrg          (fb->zsbuf->u.tex.last_layer <= fb->zsbuf->u.tex.first_layer + i))
8701e04c3fSmrg         clearMask &= ~(SWR_ATTACHMENT_DEPTH_BIT | SWR_ATTACHMENT_STENCIL_BIT);
8801e04c3fSmrg      for (unsigned c = 0; c < fb->nr_cbufs; ++c) {
8901e04c3fSmrg         const struct pipe_surface *sf = fb->cbufs[c];
9001e04c3fSmrg         if (sf && (sf->u.tex.last_layer <= sf->u.tex.first_layer + i))
9101e04c3fSmrg            clearMask &= ~(SWR_ATTACHMENT_COLOR0_BIT << c);
9201e04c3fSmrg      }
9301e04c3fSmrg   }
9401e04c3fSmrg}
9501e04c3fSmrg
9601e04c3fSmrgvoid
9701e04c3fSmrgswr_clear_init(struct pipe_context *pipe)
9801e04c3fSmrg{
9901e04c3fSmrg   pipe->clear = swr_clear;
10001e04c3fSmrg}
101