virgl_screen.c revision 01e04c3f
1/* 2 * Copyright 2014, 2015 Red Hat. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23#include "util/u_memory.h" 24#include "util/u_format.h" 25#include "util/u_format_s3tc.h" 26#include "util/u_screen.h" 27#include "util/u_video.h" 28#include "util/u_math.h" 29#include "util/os_time.h" 30#include "pipe/p_defines.h" 31#include "pipe/p_screen.h" 32 33#include "tgsi/tgsi_exec.h" 34 35#include "virgl_screen.h" 36#include "virgl_resource.h" 37#include "virgl_public.h" 38#include "virgl_context.h" 39 40int virgl_debug = 0; 41static const struct debug_named_value debug_options[] = { 42 { "verbose", VIRGL_DEBUG_VERBOSE, NULL }, 43 { "tgsi", VIRGL_DEBUG_TGSI, NULL }, 44 DEBUG_NAMED_VALUE_END 45}; 46DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0) 47 48static const char * 49virgl_get_vendor(struct pipe_screen *screen) 50{ 51 return "Red Hat"; 52} 53 54 55static const char * 56virgl_get_name(struct pipe_screen *screen) 57{ 58 return "virgl"; 59} 60 61static int 62virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) 63{ 64 struct virgl_screen *vscreen = virgl_screen(screen); 65 switch (param) { 66 case PIPE_CAP_NPOT_TEXTURES: 67 return 1; 68 case PIPE_CAP_SM3: 69 return 1; 70 case PIPE_CAP_ANISOTROPIC_FILTER: 71 return 1; 72 case PIPE_CAP_POINT_SPRITE: 73 return 1; 74 case PIPE_CAP_MAX_RENDER_TARGETS: 75 return vscreen->caps.caps.v1.max_render_targets; 76 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: 77 return vscreen->caps.caps.v1.max_dual_source_render_targets; 78 case PIPE_CAP_OCCLUSION_QUERY: 79 return vscreen->caps.caps.v1.bset.occlusion_query; 80 case PIPE_CAP_TEXTURE_MIRROR_CLAMP: 81 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE: 82 return vscreen->caps.caps.v1.bset.mirror_clamp; 83 case PIPE_CAP_TEXTURE_SWIZZLE: 84 return 1; 85 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: 86 if (vscreen->caps.caps.v2.max_texture_2d_size) 87 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size); 88 return 15; /* 16K x 16K */ 89 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: 90 if (vscreen->caps.caps.v2.max_texture_3d_size) 91 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size); 92 return 9; /* 256 x 256 x 256 */ 93 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: 94 if (vscreen->caps.caps.v2.max_texture_cube_size) 95 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size); 96 return 13; /* 4K x 4K */ 97 case PIPE_CAP_BLEND_EQUATION_SEPARATE: 98 return 1; 99 case PIPE_CAP_INDEP_BLEND_ENABLE: 100 return vscreen->caps.caps.v1.bset.indep_blend_enable; 101 case PIPE_CAP_INDEP_BLEND_FUNC: 102 return vscreen->caps.caps.v1.bset.indep_blend_func; 103 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: 104 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: 105 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: 106 return 1; 107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: 108 return vscreen->caps.caps.v1.bset.fragment_coord_conventions; 109 case PIPE_CAP_DEPTH_CLIP_DISABLE: 110 return vscreen->caps.caps.v1.bset.depth_clip_disable; 111 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: 112 return vscreen->caps.caps.v1.max_streamout_buffers; 113 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: 114 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: 115 return 16*4; 116 case PIPE_CAP_PRIMITIVE_RESTART: 117 return vscreen->caps.caps.v1.bset.primitive_restart; 118 case PIPE_CAP_SHADER_STENCIL_EXPORT: 119 return vscreen->caps.caps.v1.bset.shader_stencil_export; 120 case PIPE_CAP_TGSI_INSTANCEID: 121 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: 122 return 1; 123 case PIPE_CAP_SEAMLESS_CUBE_MAP: 124 return vscreen->caps.caps.v1.bset.seamless_cube_map; 125 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: 126 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture; 127 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: 128 return vscreen->caps.caps.v1.max_texture_array_layers; 129 case PIPE_CAP_MIN_TEXEL_OFFSET: 130 return vscreen->caps.caps.v2.min_texel_offset; 131 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: 132 return vscreen->caps.caps.v2.min_texture_gather_offset; 133 case PIPE_CAP_MAX_TEXEL_OFFSET: 134 return vscreen->caps.caps.v2.max_texel_offset; 135 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: 136 return vscreen->caps.caps.v2.max_texture_gather_offset; 137 case PIPE_CAP_CONDITIONAL_RENDER: 138 return vscreen->caps.caps.v1.bset.conditional_render; 139 case PIPE_CAP_TEXTURE_BARRIER: 140 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER; 141 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: 142 return 1; 143 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: 144 case PIPE_CAP_VERTEX_COLOR_CLAMPED: 145 return vscreen->caps.caps.v1.bset.color_clamping; 146 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: 147 return 1; 148 case PIPE_CAP_GLSL_FEATURE_LEVEL: 149 return vscreen->caps.caps.v1.glsl_level; 150 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY: 151 return MIN2(vscreen->caps.caps.v1.glsl_level, 140); 152 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: 153 case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE: 154 return 0; 155 case PIPE_CAP_COMPUTE: 156 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER; 157 case PIPE_CAP_USER_VERTEX_BUFFERS: 158 return 0; 159 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: 160 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment; 161 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: 162 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: 163 return vscreen->caps.caps.v1.bset.streamout_pause_resume; 164 case PIPE_CAP_START_INSTANCE: 165 return vscreen->caps.caps.v1.bset.start_instance; 166 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: 167 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: 168 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: 169 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: 170 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: 171 return 0; 172 case PIPE_CAP_QUERY_TIMESTAMP: 173 return 1; 174 case PIPE_CAP_QUERY_TIME_ELAPSED: 175 return 0; 176 case PIPE_CAP_TGSI_TEXCOORD: 177 return 0; 178 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: 179 return VIRGL_MAP_BUFFER_ALIGNMENT; 180 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: 181 return vscreen->caps.caps.v1.max_tbo_size > 0; 182 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: 183 return vscreen->caps.caps.v2.texture_buffer_offset_alignment; 184 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY: 185 return 0; 186 case PIPE_CAP_CUBE_MAP_ARRAY: 187 return vscreen->caps.caps.v1.bset.cube_map_array; 188 case PIPE_CAP_TEXTURE_MULTISAMPLE: 189 return vscreen->caps.caps.v1.bset.texture_multisample; 190 case PIPE_CAP_MAX_VIEWPORTS: 191 return vscreen->caps.caps.v1.max_viewports; 192 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: 193 return vscreen->caps.caps.v1.max_tbo_size; 194 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: 195 case PIPE_CAP_QUERY_PIPELINE_STATISTICS: 196 case PIPE_CAP_ENDIANNESS: 197 return 0; 198 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: 199 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: 200 return 1; 201 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: 202 return 0; 203 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: 204 return vscreen->caps.caps.v2.max_geom_output_vertices; 205 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: 206 return vscreen->caps.caps.v2.max_geom_total_output_components; 207 case PIPE_CAP_TEXTURE_QUERY_LOD: 208 return vscreen->caps.caps.v1.bset.texture_query_lod; 209 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: 210 return vscreen->caps.caps.v1.max_texture_gather_components; 211 case PIPE_CAP_DRAW_INDIRECT: 212 return vscreen->caps.caps.v1.bset.has_indirect_draw; 213 case PIPE_CAP_SAMPLE_SHADING: 214 case PIPE_CAP_FORCE_PERSAMPLE_INTERP: 215 return vscreen->caps.caps.v1.bset.has_sample_shading; 216 case PIPE_CAP_CULL_DISTANCE: 217 return vscreen->caps.caps.v1.bset.has_cull; 218 case PIPE_CAP_MAX_VERTEX_STREAMS: 219 return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1; 220 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: 221 return vscreen->caps.caps.v1.bset.conditional_render_inverted; 222 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: 223 return vscreen->caps.caps.v1.bset.derivative_control; 224 case PIPE_CAP_POLYGON_OFFSET_CLAMP: 225 return vscreen->caps.caps.v1.bset.polygon_offset_clamp; 226 case PIPE_CAP_QUERY_SO_OVERFLOW: 227 return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query; 228 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: 229 return vscreen->caps.caps.v2.shader_buffer_offset_alignment; 230 case PIPE_CAP_DOUBLES: 231 return vscreen->caps.caps.v1.bset.has_fp64; 232 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: 233 return vscreen->caps.caps.v2.max_shader_patch_varyings; 234 case PIPE_CAP_SAMPLER_VIEW_TARGET: 235 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW; 236 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE: 237 return vscreen->caps.caps.v2.max_vertex_attrib_stride; 238 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: 239 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE; 240 case PIPE_CAP_TGSI_TXQS: 241 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS; 242 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: 243 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH; 244 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: 245 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS; 246 case PIPE_CAP_TGSI_FS_FBFETCH: 247 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH; 248 case PIPE_CAP_TGSI_CLOCK: 249 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK; 250 case PIPE_CAP_TGSI_ARRAY_COMPONENTS: 251 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS; 252 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS: 253 return vscreen->caps.caps.v2.max_combined_shader_buffers; 254 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS: 255 return vscreen->caps.caps.v2.max_combined_atomic_counters; 256 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS: 257 return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers; 258 case PIPE_CAP_TEXTURE_GATHER_SM5: 259 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: 260 case PIPE_CAP_FAKE_SW_MSAA: 261 case PIPE_CAP_TEXTURE_GATHER_OFFSETS: 262 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: 263 case PIPE_CAP_MULTI_DRAW_INDIRECT: 264 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: 265 case PIPE_CAP_CLIP_HALFZ: 266 case PIPE_CAP_VERTEXID_NOBASE: 267 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: 268 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: 269 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: 270 case PIPE_CAP_TEXTURE_FLOAT_LINEAR: 271 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: 272 case PIPE_CAP_DEPTH_BOUNDS_TEST: 273 case PIPE_CAP_SHAREABLE_SHADERS: 274 case PIPE_CAP_CLEAR_TEXTURE: 275 case PIPE_CAP_DRAW_PARAMETERS: 276 case PIPE_CAP_TGSI_PACK_HALF_FLOAT: 277 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: 278 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: 279 case PIPE_CAP_INVALIDATE_BUFFER: 280 case PIPE_CAP_GENERATE_MIPMAP: 281 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS: 282 case PIPE_CAP_QUERY_BUFFER_OBJECT: 283 case PIPE_CAP_STRING_MARKER: 284 case PIPE_CAP_QUERY_MEMORY_INFO: 285 case PIPE_CAP_PCI_GROUP: 286 case PIPE_CAP_PCI_BUS: 287 case PIPE_CAP_PCI_DEVICE: 288 case PIPE_CAP_PCI_FUNCTION: 289 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: 290 case PIPE_CAP_TGSI_VOTE: 291 case PIPE_CAP_MAX_WINDOW_RECTANGLES: 292 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: 293 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: 294 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: 295 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: 296 case PIPE_CAP_TGSI_MUL_ZERO_WINS: 297 case PIPE_CAP_INT64: 298 case PIPE_CAP_INT64_DIVMOD: 299 case PIPE_CAP_TGSI_TEX_TXF_LZ: 300 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: 301 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE: 302 case PIPE_CAP_TGSI_BALLOT: 303 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT: 304 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX: 305 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: 306 case PIPE_CAP_POST_DEPTH_COVERAGE: 307 case PIPE_CAP_BINDLESS_TEXTURE: 308 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF: 309 case PIPE_CAP_MEMOBJ: 310 case PIPE_CAP_LOAD_CONSTBUF: 311 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS: 312 case PIPE_CAP_TILE_RASTER_ORDER: 313 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES: 314 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS: 315 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET: 316 case PIPE_CAP_CONTEXT_PRIORITY_MASK: 317 case PIPE_CAP_FENCE_SIGNAL: 318 case PIPE_CAP_CONSTBUF0_FLAGS: 319 case PIPE_CAP_PACKED_UNIFORMS: 320 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES: 321 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES: 322 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES: 323 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES: 324 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE: 325 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS: 326 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS: 327 case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: 328 return 0; 329 case PIPE_CAP_MAX_GS_INVOCATIONS: 330 return 32; 331 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE: 332 return 1 << 27; 333 case PIPE_CAP_VENDOR_ID: 334 return 0x1af4; 335 case PIPE_CAP_DEVICE_ID: 336 return 0x1010; 337 case PIPE_CAP_ACCELERATED: 338 return 1; 339 case PIPE_CAP_UMA: 340 case PIPE_CAP_VIDEO_MEMORY: 341 return 0; 342 case PIPE_CAP_NATIVE_FENCE_FD: 343 return 0; 344 default: 345 return u_pipe_screen_get_param_defaults(screen, param); 346 } 347} 348 349static int 350virgl_get_shader_param(struct pipe_screen *screen, 351 enum pipe_shader_type shader, 352 enum pipe_shader_cap param) 353{ 354 struct virgl_screen *vscreen = virgl_screen(screen); 355 356 if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) && 357 !vscreen->caps.caps.v1.bset.has_tessellation_shaders) 358 return 0; 359 360 if (shader == PIPE_SHADER_COMPUTE && 361 !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER)) 362 return 0; 363 364 switch(shader) 365 { 366 case PIPE_SHADER_FRAGMENT: 367 case PIPE_SHADER_VERTEX: 368 case PIPE_SHADER_GEOMETRY: 369 case PIPE_SHADER_TESS_CTRL: 370 case PIPE_SHADER_TESS_EVAL: 371 case PIPE_SHADER_COMPUTE: 372 switch (param) { 373 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 374 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 375 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 376 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 377 return INT_MAX; 378 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 379 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 380 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 381 return 1; 382 case PIPE_SHADER_CAP_MAX_INPUTS: 383 if (vscreen->caps.caps.v1.glsl_level < 150) 384 return vscreen->caps.caps.v2.max_vertex_attribs; 385 return (shader == PIPE_SHADER_VERTEX || 386 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32; 387 case PIPE_SHADER_CAP_MAX_OUTPUTS: 388 if (shader == PIPE_SHADER_FRAGMENT) 389 return vscreen->caps.caps.v1.max_render_targets; 390 return vscreen->caps.caps.v2.max_vertex_outputs; 391 // case PIPE_SHADER_CAP_MAX_CONSTS: 392 // return 4096; 393 case PIPE_SHADER_CAP_MAX_TEMPS: 394 return 256; 395 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 396 return vscreen->caps.caps.v1.max_uniform_blocks; 397 // case PIPE_SHADER_CAP_MAX_ADDRS: 398 // return 1; 399 case PIPE_SHADER_CAP_SUBROUTINES: 400 return 1; 401 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 402 return 16; 403 case PIPE_SHADER_CAP_INTEGERS: 404 return vscreen->caps.caps.v1.glsl_level >= 130; 405 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 406 return 32; 407 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: 408 return 4096 * sizeof(float[4]); 409 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: 410 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) 411 return vscreen->caps.caps.v2.max_shader_buffer_frag_compute; 412 else 413 return vscreen->caps.caps.v2.max_shader_buffer_other_stages; 414 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: 415 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) 416 return vscreen->caps.caps.v2.max_shader_image_frag_compute; 417 else 418 return vscreen->caps.caps.v2.max_shader_image_other_stages; 419 case PIPE_SHADER_CAP_SUPPORTED_IRS: 420 return (1 << PIPE_SHADER_IR_TGSI); 421 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: 422 return vscreen->caps.caps.v2.max_atomic_counters[shader]; 423 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: 424 return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader]; 425 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: 426 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: 427 case PIPE_SHADER_CAP_INT64_ATOMICS: 428 case PIPE_SHADER_CAP_FP16: 429 return 0; 430 case PIPE_SHADER_CAP_SCALAR_ISA: 431 return 1; 432 default: 433 return 0; 434 } 435 default: 436 return 0; 437 } 438} 439 440static float 441virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param) 442{ 443 struct virgl_screen *vscreen = virgl_screen(screen); 444 switch (param) { 445 case PIPE_CAPF_MAX_LINE_WIDTH: 446 return vscreen->caps.caps.v2.max_aliased_line_width; 447 case PIPE_CAPF_MAX_LINE_WIDTH_AA: 448 return vscreen->caps.caps.v2.max_smooth_line_width; 449 case PIPE_CAPF_MAX_POINT_WIDTH: 450 return vscreen->caps.caps.v2.max_aliased_point_size; 451 case PIPE_CAPF_MAX_POINT_WIDTH_AA: 452 return vscreen->caps.caps.v2.max_smooth_point_size; 453 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: 454 return 16.0; 455 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: 456 return vscreen->caps.caps.v2.max_texture_lod_bias; 457 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE: 458 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE: 459 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY: 460 return 0.0f; 461 } 462 /* should only get here on unhandled cases */ 463 debug_printf("Unexpected PIPE_CAPF %d query\n", param); 464 return 0.0; 465} 466 467static int 468virgl_get_compute_param(struct pipe_screen *screen, 469 enum pipe_shader_ir ir_type, 470 enum pipe_compute_cap param, 471 void *ret) 472{ 473 struct virgl_screen *vscreen = virgl_screen(screen); 474 if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER)) 475 return 0; 476 switch (param) { 477 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE: 478 if (ret) { 479 uint64_t *grid_size = ret; 480 grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0]; 481 grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1]; 482 grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2]; 483 } 484 return 3 * sizeof(uint64_t) ; 485 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE: 486 if (ret) { 487 uint64_t *block_size = ret; 488 block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0]; 489 block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1]; 490 block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2]; 491 } 492 return 3 * sizeof(uint64_t); 493 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK: 494 if (ret) { 495 uint64_t *max_threads_per_block = ret; 496 *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations; 497 } 498 return sizeof(uint64_t); 499 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE: 500 if (ret) { 501 uint64_t *max_local_size = ret; 502 /* Value reported by the closed source driver. */ 503 *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size; 504 } 505 return sizeof(uint64_t); 506 default: 507 break; 508 } 509 return 0; 510} 511 512static boolean 513virgl_is_vertex_format_supported(struct pipe_screen *screen, 514 enum pipe_format format) 515{ 516 struct virgl_screen *vscreen = virgl_screen(screen); 517 const struct util_format_description *format_desc; 518 int i; 519 520 format_desc = util_format_description(format); 521 if (!format_desc) 522 return FALSE; 523 524 if (format == PIPE_FORMAT_R11G11B10_FLOAT) { 525 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT; 526 int big = vformat / 32; 527 int small = vformat % 32; 528 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small))) 529 return FALSE; 530 return TRUE; 531 } 532 533 /* Find the first non-VOID channel. */ 534 for (i = 0; i < 4; i++) { 535 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) { 536 break; 537 } 538 } 539 540 if (i == 4) 541 return FALSE; 542 543 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) 544 return FALSE; 545 546 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED) 547 return FALSE; 548 return TRUE; 549} 550 551/** 552 * Query format support for creating a texture, drawing surface, etc. 553 * \param format the format to test 554 * \param type one of PIPE_TEXTURE, PIPE_SURFACE 555 */ 556static boolean 557virgl_is_format_supported( struct pipe_screen *screen, 558 enum pipe_format format, 559 enum pipe_texture_target target, 560 unsigned sample_count, 561 unsigned storage_sample_count, 562 unsigned bind) 563{ 564 struct virgl_screen *vscreen = virgl_screen(screen); 565 const struct util_format_description *format_desc; 566 int i; 567 568 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count)) 569 return false; 570 571 assert(target == PIPE_BUFFER || 572 target == PIPE_TEXTURE_1D || 573 target == PIPE_TEXTURE_1D_ARRAY || 574 target == PIPE_TEXTURE_2D || 575 target == PIPE_TEXTURE_2D_ARRAY || 576 target == PIPE_TEXTURE_RECT || 577 target == PIPE_TEXTURE_3D || 578 target == PIPE_TEXTURE_CUBE || 579 target == PIPE_TEXTURE_CUBE_ARRAY); 580 581 format_desc = util_format_description(format); 582 if (!format_desc) 583 return FALSE; 584 585 if (util_format_is_intensity(format)) 586 return FALSE; 587 588 if (sample_count > 1) { 589 if (!vscreen->caps.caps.v1.bset.texture_multisample) 590 return FALSE; 591 592 if (bind & PIPE_BIND_SHADER_IMAGE) { 593 if (sample_count > vscreen->caps.caps.v2.max_image_samples) 594 return FALSE; 595 } 596 597 if (sample_count > vscreen->caps.caps.v1.max_samples) 598 return FALSE; 599 } 600 601 if (bind & PIPE_BIND_VERTEX_BUFFER) { 602 return virgl_is_vertex_format_supported(screen, format); 603 } 604 605 /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */ 606 if ((format == PIPE_FORMAT_R32G32B32_FLOAT || 607 format == PIPE_FORMAT_R32G32B32_SINT || 608 format == PIPE_FORMAT_R32G32B32_UINT) && 609 target != PIPE_BUFFER) 610 return FALSE; 611 612 if (bind & PIPE_BIND_RENDER_TARGET) { 613 /* For ARB_framebuffer_no_attachments. */ 614 if (format == PIPE_FORMAT_NONE) 615 return TRUE; 616 617 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) 618 return FALSE; 619 620 /* 621 * Although possible, it is unnatural to render into compressed or YUV 622 * surfaces. So disable these here to avoid going into weird paths 623 * inside the state trackers. 624 */ 625 if (format_desc->block.width != 1 || 626 format_desc->block.height != 1) 627 return FALSE; 628 629 { 630 int big = format / 32; 631 int small = format % 32; 632 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small))) 633 return FALSE; 634 } 635 } 636 637 if (bind & PIPE_BIND_DEPTH_STENCIL) { 638 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS) 639 return FALSE; 640 } 641 642 /* 643 * All other operations (sampling, transfer, etc). 644 */ 645 646 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) { 647 goto out_lookup; 648 } 649 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) { 650 goto out_lookup; 651 } 652 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) { 653 goto out_lookup; 654 } 655 656 if (format == PIPE_FORMAT_R11G11B10_FLOAT) { 657 goto out_lookup; 658 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) { 659 goto out_lookup; 660 } 661 662 /* Find the first non-VOID channel. */ 663 for (i = 0; i < 4; i++) { 664 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) { 665 break; 666 } 667 } 668 669 if (i == 4) 670 return FALSE; 671 672 /* no L4A4 */ 673 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4) 674 return FALSE; 675 676 out_lookup: 677 { 678 int big = format / 32; 679 int small = format % 32; 680 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small))) 681 return FALSE; 682 } 683 /* 684 * Everything else should be supported by u_format. 685 */ 686 return TRUE; 687} 688 689static void virgl_flush_frontbuffer(struct pipe_screen *screen, 690 struct pipe_resource *res, 691 unsigned level, unsigned layer, 692 void *winsys_drawable_handle, struct pipe_box *sub_box) 693{ 694 struct virgl_screen *vscreen = virgl_screen(screen); 695 struct virgl_winsys *vws = vscreen->vws; 696 struct virgl_resource *vres = virgl_resource(res); 697 698 if (vws->flush_frontbuffer) 699 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle, 700 sub_box); 701} 702 703static void virgl_fence_reference(struct pipe_screen *screen, 704 struct pipe_fence_handle **ptr, 705 struct pipe_fence_handle *fence) 706{ 707 struct virgl_screen *vscreen = virgl_screen(screen); 708 struct virgl_winsys *vws = vscreen->vws; 709 710 vws->fence_reference(vws, ptr, fence); 711} 712 713static boolean virgl_fence_finish(struct pipe_screen *screen, 714 struct pipe_context *ctx, 715 struct pipe_fence_handle *fence, 716 uint64_t timeout) 717{ 718 struct virgl_screen *vscreen = virgl_screen(screen); 719 struct virgl_winsys *vws = vscreen->vws; 720 721 return vws->fence_wait(vws, fence, timeout); 722} 723 724static uint64_t 725virgl_get_timestamp(struct pipe_screen *_screen) 726{ 727 return os_time_get_nano(); 728} 729 730static void 731virgl_destroy_screen(struct pipe_screen *screen) 732{ 733 struct virgl_screen *vscreen = virgl_screen(screen); 734 struct virgl_winsys *vws = vscreen->vws; 735 736 slab_destroy_parent(&vscreen->texture_transfer_pool); 737 738 if (vws) 739 vws->destroy(vws); 740 FREE(vscreen); 741} 742 743struct pipe_screen * 744virgl_create_screen(struct virgl_winsys *vws) 745{ 746 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen); 747 748 if (!screen) 749 return NULL; 750 751 virgl_debug = debug_get_option_virgl_debug(); 752 753 screen->vws = vws; 754 screen->base.get_name = virgl_get_name; 755 screen->base.get_vendor = virgl_get_vendor; 756 screen->base.get_param = virgl_get_param; 757 screen->base.get_shader_param = virgl_get_shader_param; 758 screen->base.get_compute_param = virgl_get_compute_param; 759 screen->base.get_paramf = virgl_get_paramf; 760 screen->base.is_format_supported = virgl_is_format_supported; 761 screen->base.destroy = virgl_destroy_screen; 762 screen->base.context_create = virgl_context_create; 763 screen->base.flush_frontbuffer = virgl_flush_frontbuffer; 764 screen->base.get_timestamp = virgl_get_timestamp; 765 screen->base.fence_reference = virgl_fence_reference; 766 //screen->base.fence_signalled = virgl_fence_signalled; 767 screen->base.fence_finish = virgl_fence_finish; 768 769 virgl_init_screen_resource_functions(&screen->base); 770 771 vws->get_caps(vws, &screen->caps); 772 773 screen->refcnt = 1; 774 775 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16); 776 777 return &screen->base; 778} 779