17ec681f3Smrg/**************************************************************************
27ec681f3Smrg *
37ec681f3Smrg * Copyright 2016 Advanced Micro Devices, Inc.
47ec681f3Smrg * All Rights Reserved.
57ec681f3Smrg *
67ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
77ec681f3Smrg * copy of this software and associated documentation files (the
87ec681f3Smrg * "Software"), to deal in the Software without restriction, including
97ec681f3Smrg * without limitation the rights to use, copy, modify, merge, publish,
107ec681f3Smrg * distribute, sub license, and/or sell copies of the Software, and to
117ec681f3Smrg * permit persons to whom the Software is furnished to do so, subject to
127ec681f3Smrg * the following conditions:
137ec681f3Smrg *
147ec681f3Smrg * The above copyright notice and this permission notice (including the
157ec681f3Smrg * next paragraph) shall be included in all copies or substantial portions
167ec681f3Smrg * of the Software.
177ec681f3Smrg *
187ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
197ec681f3Smrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
207ec681f3Smrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
217ec681f3Smrg * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
227ec681f3Smrg * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
237ec681f3Smrg * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
247ec681f3Smrg * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
257ec681f3Smrg *
267ec681f3Smrg **************************************************************************/
277ec681f3Smrg
287ec681f3Smrg/*
297ec681f3Smrg * Authors:
307ec681f3Smrg *      Christian König <christian.koenig@amd.com>
317ec681f3Smrg *
327ec681f3Smrg */
337ec681f3Smrg
347ec681f3Smrg#ifndef _VDPAU_DMABUF_H_
357ec681f3Smrg#define _VDPAU_DMABUF_H_
367ec681f3Smrg
377ec681f3Smrg#include <vdpau/vdpau.h>
387ec681f3Smrg
397ec681f3Smrg/* driver specific functions for NV_vdpau_interop */
407ec681f3Smrg#ifndef VDP_FUNC_ID_BASE_DRIVER
417ec681f3Smrg#define VDP_FUNC_ID_BASE_DRIVER 0x2000
427ec681f3Smrg#endif
437ec681f3Smrg
447ec681f3Smrg/* New DMA-buf based implementation */
457ec681f3Smrg#define VDP_FUNC_ID_VIDEO_SURFACE_DMA_BUF (VDP_FUNC_ID_BASE_DRIVER + 2)
467ec681f3Smrg#define VDP_FUNC_ID_OUTPUT_SURFACE_DMA_BUF (VDP_FUNC_ID_BASE_DRIVER + 3)
477ec681f3Smrg
487ec681f3Smrg/* Define some more internal RGBA formats for more
497ec681f3Smrg * robust handling of Video Surfaces
507ec681f3Smrg */
517ec681f3Smrg#define VDP_RGBA_FORMAT_R8          (-1)
527ec681f3Smrg#define VDP_RGBA_FORMAT_R8G8        (-2)
537ec681f3Smrg
547ec681f3Smrgstruct VdpSurfaceDMABufDesc {
557ec681f3Smrg   /* DMA-buf file descriptor */
567ec681f3Smrg   uint32_t handle;
577ec681f3Smrg   /* Width in pixel */
587ec681f3Smrg   uint32_t width;
597ec681f3Smrg   /* Height in pixel */
607ec681f3Smrg   uint32_t height;
617ec681f3Smrg   /* Offset in bytes */
627ec681f3Smrg   uint32_t offset;
637ec681f3Smrg   /* Stride in bytes */
647ec681f3Smrg   uint32_t stride;
657ec681f3Smrg   /* VDP_RGBA_FORMAT_* as defined in the VDPAU spec and above. */
667ec681f3Smrg   uint32_t format;
677ec681f3Smrg};
687ec681f3Smrg
697ec681f3Smrg/**
707ec681f3Smrg * \brief Video surface planes
717ec681f3Smrg */
727ec681f3Smrgtypedef uint32_t VdpVideoSurfacePlane;
737ec681f3Smrg
747ec681f3Smrg/** \hideinitializer \brief Luma top field */
757ec681f3Smrg#define VDP_VIDEO_SURFACE_PLANE_LUMA_TOP      ((VdpVideoSurfacePlane)0)
767ec681f3Smrg/** \hideinitializer \brief Luma bottom field */
777ec681f3Smrg#define VDP_VIDEO_SURFACE_PLANE_LUMA_BOTTOM   ((VdpVideoSurfacePlane)1)
787ec681f3Smrg/** \hideinitializer \brief Chroma top field */
797ec681f3Smrg#define VDP_VIDEO_SURFACE_PLANE_CHROMA_TOP    ((VdpVideoSurfacePlane)2)
807ec681f3Smrg/** \hideinitializer \brief Chroma bottom field */
817ec681f3Smrg#define VDP_VIDEO_SURFACE_PLANE_CHROMA_BOTTOM ((VdpVideoSurfacePlane)3)
827ec681f3Smrg
837ec681f3Smrgtypedef VdpStatus VdpVideoSurfaceDMABuf(
847ec681f3Smrg   VdpVideoSurface               surface,
857ec681f3Smrg   VdpVideoSurfacePlane          plane,
867ec681f3Smrg   struct VdpSurfaceDMABufDesc * result
877ec681f3Smrg);
887ec681f3Smrg
897ec681f3Smrgtypedef VdpStatus VdpOutputSurfaceDMABuf(
907ec681f3Smrg   VdpOutputSurface              surface,
917ec681f3Smrg   struct VdpSurfaceDMABufDesc * result
927ec681f3Smrg);
937ec681f3Smrg
947ec681f3Smrg#endif /* _VDPAU_DMABUF_H_ */
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