17ec681f3Smrg/*
27ec681f3Smrg * Copyright © 2020 Intel Corporation
37ec681f3Smrg *
47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
57ec681f3Smrg * copy of this software and associated documentation files (the "Software"),
67ec681f3Smrg * to deal in the Software without restriction, including without limitation
77ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
87ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the
97ec681f3Smrg * Software is furnished to do so, subject to the following conditions:
107ec681f3Smrg *
117ec681f3Smrg * The above copyright notice and this permission notice (including the next
127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the
137ec681f3Smrg * Software.
147ec681f3Smrg *
157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
187ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
197ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
207ec681f3Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
217ec681f3Smrg * IN THE SOFTWARE.
227ec681f3Smrg */
237ec681f3Smrg
247ec681f3Smrg#include "intel_uuid.h"
257ec681f3Smrg#include "git_sha1.h"
267ec681f3Smrg#include "util/mesa-sha1.h"
277ec681f3Smrg
287ec681f3Smrgvoid
297ec681f3Smrgintel_uuid_compute_device_id(uint8_t *uuid,
307ec681f3Smrg                             const struct isl_device *isldev,
317ec681f3Smrg                             size_t size)
327ec681f3Smrg{
337ec681f3Smrg   struct mesa_sha1 sha1_ctx;
347ec681f3Smrg   uint8_t sha1[20];
357ec681f3Smrg   const struct intel_device_info *devinfo = isldev->info;
367ec681f3Smrg
377ec681f3Smrg   assert(size <= sizeof(sha1));
387ec681f3Smrg
397ec681f3Smrg   /* The device UUID uniquely identifies the given device within the machine.
407ec681f3Smrg    * Since we never have more than one device, this doesn't need to be a real
417ec681f3Smrg    * UUID.  However, on the off-chance that someone tries to use this to
427ec681f3Smrg    * cache pre-tiled images or something of the like, we use the PCI ID and
437ec681f3Smrg    * some bits of ISL info to ensure that this is safe.
447ec681f3Smrg    */
457ec681f3Smrg   _mesa_sha1_init(&sha1_ctx);
467ec681f3Smrg   _mesa_sha1_update(&sha1_ctx, &devinfo->chipset_id,
477ec681f3Smrg                     sizeof(devinfo->chipset_id));
487ec681f3Smrg   _mesa_sha1_update(&sha1_ctx, &isldev->has_bit6_swizzling,
497ec681f3Smrg                     sizeof(isldev->has_bit6_swizzling));
507ec681f3Smrg   _mesa_sha1_final(&sha1_ctx, sha1);
517ec681f3Smrg   memcpy(uuid, sha1, size);
527ec681f3Smrg}
537ec681f3Smrg
547ec681f3Smrgvoid
557ec681f3Smrgintel_uuid_compute_driver_id(uint8_t *uuid,
567ec681f3Smrg                             const struct intel_device_info *devinfo,
577ec681f3Smrg                             size_t size)
587ec681f3Smrg{
597ec681f3Smrg   const char* intelDriver = PACKAGE_VERSION MESA_GIT_SHA1;
607ec681f3Smrg   struct mesa_sha1 sha1_ctx;
617ec681f3Smrg   uint8_t sha1[20];
627ec681f3Smrg
637ec681f3Smrg   assert(size <= sizeof(sha1));
647ec681f3Smrg
657ec681f3Smrg   /* The driver UUID is used for determining sharability of images and memory
667ec681f3Smrg    * between two Vulkan instances in separate processes, but also to
677ec681f3Smrg    * determining memory objects and sharability between Vulkan and OpenGL
687ec681f3Smrg    * driver. People who want to share memory need to also check the device
697ec681f3Smrg    * UUID.
707ec681f3Smrg    */
717ec681f3Smrg   _mesa_sha1_init(&sha1_ctx);
727ec681f3Smrg   _mesa_sha1_update(&sha1_ctx, intelDriver, strlen(intelDriver) * sizeof(char));
737ec681f3Smrg   _mesa_sha1_final(&sha1_ctx, sha1);
747ec681f3Smrg   memcpy(uuid, sha1, size);
757ec681f3Smrg}
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