brw_disasm.c revision 01e04c3f
1/* 2 * Copyright © 2008 Keith Packard 3 * 4 * Permission to use, copy, modify, distribute, and sell this software and its 5 * documentation for any purpose is hereby granted without fee, provided that 6 * the above copyright notice appear in all copies and that both that copyright 7 * notice and this permission notice appear in supporting documentation, and 8 * that the name of the copyright holders not be used in advertising or 9 * publicity pertaining to distribution of the software without specific, 10 * written prior permission. The copyright holders make no representations 11 * about the suitability of this software for any purpose. It is provided "as 12 * is" without express or implied warranty. 13 * 14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE 20 * OF THIS SOFTWARE. 21 */ 22 23#include <stdio.h> 24#include <string.h> 25#include <stdarg.h> 26 27#include "brw_eu_defines.h" 28#include "brw_inst.h" 29#include "brw_shader.h" 30#include "brw_reg.h" 31#include "brw_inst.h" 32#include "brw_eu.h" 33#include "util/half_float.h" 34 35static bool 36has_jip(const struct gen_device_info *devinfo, enum opcode opcode) 37{ 38 if (devinfo->gen < 6) 39 return false; 40 41 return opcode == BRW_OPCODE_IF || 42 opcode == BRW_OPCODE_ELSE || 43 opcode == BRW_OPCODE_ENDIF || 44 opcode == BRW_OPCODE_WHILE || 45 opcode == BRW_OPCODE_BREAK || 46 opcode == BRW_OPCODE_CONTINUE || 47 opcode == BRW_OPCODE_HALT; 48} 49 50static bool 51has_uip(const struct gen_device_info *devinfo, enum opcode opcode) 52{ 53 if (devinfo->gen < 6) 54 return false; 55 56 return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) || 57 (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) || 58 opcode == BRW_OPCODE_BREAK || 59 opcode == BRW_OPCODE_CONTINUE || 60 opcode == BRW_OPCODE_HALT; 61} 62 63static bool 64has_branch_ctrl(const struct gen_device_info *devinfo, enum opcode opcode) 65{ 66 if (devinfo->gen < 8) 67 return false; 68 69 return opcode == BRW_OPCODE_IF || 70 opcode == BRW_OPCODE_ELSE; 71 /* opcode == BRW_OPCODE_GOTO; */ 72} 73 74static bool 75is_logic_instruction(unsigned opcode) 76{ 77 return opcode == BRW_OPCODE_AND || 78 opcode == BRW_OPCODE_NOT || 79 opcode == BRW_OPCODE_OR || 80 opcode == BRW_OPCODE_XOR; 81} 82 83const char *const conditional_modifier[16] = { 84 [BRW_CONDITIONAL_NONE] = "", 85 [BRW_CONDITIONAL_Z] = ".z", 86 [BRW_CONDITIONAL_NZ] = ".nz", 87 [BRW_CONDITIONAL_G] = ".g", 88 [BRW_CONDITIONAL_GE] = ".ge", 89 [BRW_CONDITIONAL_L] = ".l", 90 [BRW_CONDITIONAL_LE] = ".le", 91 [BRW_CONDITIONAL_R] = ".r", 92 [BRW_CONDITIONAL_O] = ".o", 93 [BRW_CONDITIONAL_U] = ".u", 94}; 95 96static const char *const m_negate[2] = { 97 [0] = "", 98 [1] = "-", 99}; 100 101static const char *const _abs[2] = { 102 [0] = "", 103 [1] = "(abs)", 104}; 105 106static const char *const m_bitnot[2] = { "", "~" }; 107 108static const char *const vert_stride[16] = { 109 [0] = "0", 110 [1] = "1", 111 [2] = "2", 112 [3] = "4", 113 [4] = "8", 114 [5] = "16", 115 [6] = "32", 116 [15] = "VxH", 117}; 118 119static const char *const width[8] = { 120 [0] = "1", 121 [1] = "2", 122 [2] = "4", 123 [3] = "8", 124 [4] = "16", 125}; 126 127static const char *const horiz_stride[4] = { 128 [0] = "0", 129 [1] = "1", 130 [2] = "2", 131 [3] = "4" 132}; 133 134static const char *const chan_sel[4] = { 135 [0] = "x", 136 [1] = "y", 137 [2] = "z", 138 [3] = "w", 139}; 140 141static const char *const debug_ctrl[2] = { 142 [0] = "", 143 [1] = ".breakpoint" 144}; 145 146static const char *const saturate[2] = { 147 [0] = "", 148 [1] = ".sat" 149}; 150 151static const char *const cmpt_ctrl[2] = { 152 [0] = "", 153 [1] = "compacted" 154}; 155 156static const char *const accwr[2] = { 157 [0] = "", 158 [1] = "AccWrEnable" 159}; 160 161static const char *const branch_ctrl[2] = { 162 [0] = "", 163 [1] = "BranchCtrl" 164}; 165 166static const char *const wectrl[2] = { 167 [0] = "", 168 [1] = "WE_all" 169}; 170 171static const char *const exec_size[8] = { 172 [0] = "1", 173 [1] = "2", 174 [2] = "4", 175 [3] = "8", 176 [4] = "16", 177 [5] = "32" 178}; 179 180static const char *const pred_inv[2] = { 181 [0] = "+", 182 [1] = "-" 183}; 184 185const char *const pred_ctrl_align16[16] = { 186 [1] = "", 187 [2] = ".x", 188 [3] = ".y", 189 [4] = ".z", 190 [5] = ".w", 191 [6] = ".any4h", 192 [7] = ".all4h", 193}; 194 195static const char *const pred_ctrl_align1[16] = { 196 [BRW_PREDICATE_NORMAL] = "", 197 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv", 198 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv", 199 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h", 200 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h", 201 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h", 202 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h", 203 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h", 204 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h", 205 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h", 206 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h", 207 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h", 208 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h", 209}; 210 211static const char *const thread_ctrl[4] = { 212 [BRW_THREAD_NORMAL] = "", 213 [BRW_THREAD_ATOMIC] = "atomic", 214 [BRW_THREAD_SWITCH] = "switch", 215}; 216 217static const char *const compr_ctrl[4] = { 218 [0] = "", 219 [1] = "sechalf", 220 [2] = "compr", 221 [3] = "compr4", 222}; 223 224static const char *const dep_ctrl[4] = { 225 [0] = "", 226 [1] = "NoDDClr", 227 [2] = "NoDDChk", 228 [3] = "NoDDClr,NoDDChk", 229}; 230 231static const char *const mask_ctrl[4] = { 232 [0] = "", 233 [1] = "nomask", 234}; 235 236static const char *const access_mode[2] = { 237 [0] = "align1", 238 [1] = "align16", 239}; 240 241static const char *const reg_file[4] = { 242 [0] = "A", 243 [1] = "g", 244 [2] = "m", 245 [3] = "imm", 246}; 247 248static const char *const writemask[16] = { 249 [0x0] = ".", 250 [0x1] = ".x", 251 [0x2] = ".y", 252 [0x3] = ".xy", 253 [0x4] = ".z", 254 [0x5] = ".xz", 255 [0x6] = ".yz", 256 [0x7] = ".xyz", 257 [0x8] = ".w", 258 [0x9] = ".xw", 259 [0xa] = ".yw", 260 [0xb] = ".xyw", 261 [0xc] = ".zw", 262 [0xd] = ".xzw", 263 [0xe] = ".yzw", 264 [0xf] = "", 265}; 266 267static const char *const end_of_thread[2] = { 268 [0] = "", 269 [1] = "EOT" 270}; 271 272/* SFIDs on Gen4-5 */ 273static const char *const gen4_sfid[16] = { 274 [BRW_SFID_NULL] = "null", 275 [BRW_SFID_MATH] = "math", 276 [BRW_SFID_SAMPLER] = "sampler", 277 [BRW_SFID_MESSAGE_GATEWAY] = "gateway", 278 [BRW_SFID_DATAPORT_READ] = "read", 279 [BRW_SFID_DATAPORT_WRITE] = "write", 280 [BRW_SFID_URB] = "urb", 281 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner", 282 [BRW_SFID_VME] = "vme", 283}; 284 285static const char *const gen6_sfid[16] = { 286 [BRW_SFID_NULL] = "null", 287 [BRW_SFID_MATH] = "math", 288 [BRW_SFID_SAMPLER] = "sampler", 289 [BRW_SFID_MESSAGE_GATEWAY] = "gateway", 290 [BRW_SFID_URB] = "urb", 291 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner", 292 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler", 293 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render", 294 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const", 295 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data", 296 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp", 297 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1", 298 [HSW_SFID_CRE] = "cre", 299}; 300 301static const char *const gen7_gateway_subfuncid[8] = { 302 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open", 303 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close", 304 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg", 305 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp", 306 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg", 307 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state", 308 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write", 309}; 310 311static const char *const gen4_dp_read_port_msg_type[4] = { 312 [0b00] = "OWord Block Read", 313 [0b01] = "OWord Dual Block Read", 314 [0b10] = "Media Block Read", 315 [0b11] = "DWord Scattered Read", 316}; 317 318static const char *const g45_dp_read_port_msg_type[8] = { 319 [0b000] = "OWord Block Read", 320 [0b010] = "OWord Dual Block Read", 321 [0b100] = "Media Block Read", 322 [0b110] = "DWord Scattered Read", 323 [0b001] = "Render Target UNORM Read", 324 [0b011] = "AVC Loop Filter Read", 325}; 326 327static const char *const dp_write_port_msg_type[8] = { 328 [0b000] = "OWord block write", 329 [0b001] = "OWord dual block write", 330 [0b010] = "media block write", 331 [0b011] = "DWord scattered write", 332 [0b100] = "RT write", 333 [0b101] = "streamed VB write", 334 [0b110] = "RT UNORM write", /* G45+ */ 335 [0b111] = "flush render cache", 336}; 337 338static const char *const dp_rc_msg_type_gen6[16] = { 339 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read", 340 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read", 341 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read", 342 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read", 343 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = 344 "OWORD unaligned block read", 345 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read", 346 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write", 347 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write", 348 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = 349 "OWORD dual block write", 350 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write", 351 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = 352 "DWORD scattered write", 353 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write", 354 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write", 355 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write", 356}; 357 358static const char *const dp_rc_msg_type_gen7[16] = { 359 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ] = "media block read", 360 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ] = "typed surface read", 361 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP] = "typed atomic op", 362 [GEN7_DATAPORT_RC_MEMORY_FENCE] = "memory fence", 363 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE] = "media block write", 364 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write", 365 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write" 366}; 367 368static const char *const dp_rc_msg_type_gen9[16] = { 369 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write", 370 [GEN9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read" 371}; 372 373static const char *const * 374dp_rc_msg_type(const struct gen_device_info *devinfo) 375{ 376 return (devinfo->gen >= 9 ? dp_rc_msg_type_gen9 : 377 devinfo->gen >= 7 ? dp_rc_msg_type_gen7 : 378 devinfo->gen >= 6 ? dp_rc_msg_type_gen6 : 379 dp_write_port_msg_type); 380} 381 382static const char *const m_rt_write_subtype[] = { 383 [0b000] = "SIMD16", 384 [0b001] = "SIMD16/RepData", 385 [0b010] = "SIMD8/DualSrcLow", 386 [0b011] = "SIMD8/DualSrcHigh", 387 [0b100] = "SIMD8", 388 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */ 389 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */ 390}; 391 392static const char *const dp_dc0_msg_type_gen7[16] = { 393 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read", 394 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] = 395 "DC unaligned OWORD block read", 396 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read", 397 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read", 398 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read", 399 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read", 400 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic", 401 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence", 402 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write", 403 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write", 404 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write", 405 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write", 406 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write", 407}; 408 409static const char *const dp_dc1_msg_type_hsw[32] = { 410 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read", 411 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op", 412 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] = 413 "DC untyped 4x2 atomic op", 414 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read", 415 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read", 416 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic", 417 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op", 418 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write", 419 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write", 420 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op", 421 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] = 422 "DC 4x2 atomic counter op", 423 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write", 424 [GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP] = 425 "DC untyped atomic float op", 426}; 427 428static const char *const aop[16] = { 429 [BRW_AOP_AND] = "and", 430 [BRW_AOP_OR] = "or", 431 [BRW_AOP_XOR] = "xor", 432 [BRW_AOP_MOV] = "mov", 433 [BRW_AOP_INC] = "inc", 434 [BRW_AOP_DEC] = "dec", 435 [BRW_AOP_ADD] = "add", 436 [BRW_AOP_SUB] = "sub", 437 [BRW_AOP_REVSUB] = "revsub", 438 [BRW_AOP_IMAX] = "imax", 439 [BRW_AOP_IMIN] = "imin", 440 [BRW_AOP_UMAX] = "umax", 441 [BRW_AOP_UMIN] = "umin", 442 [BRW_AOP_CMPWR] = "cmpwr", 443 [BRW_AOP_PREDEC] = "predec", 444}; 445 446static const char *const aop_float[4] = { 447 [BRW_AOP_FMAX] = "fmax", 448 [BRW_AOP_FMIN] = "fmin", 449 [BRW_AOP_FCMPWR] = "fcmpwr", 450}; 451 452static const char * const pixel_interpolator_msg_types[4] = { 453 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset", 454 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position", 455 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid", 456 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset", 457}; 458 459static const char *const math_function[16] = { 460 [BRW_MATH_FUNCTION_INV] = "inv", 461 [BRW_MATH_FUNCTION_LOG] = "log", 462 [BRW_MATH_FUNCTION_EXP] = "exp", 463 [BRW_MATH_FUNCTION_SQRT] = "sqrt", 464 [BRW_MATH_FUNCTION_RSQ] = "rsq", 465 [BRW_MATH_FUNCTION_SIN] = "sin", 466 [BRW_MATH_FUNCTION_COS] = "cos", 467 [BRW_MATH_FUNCTION_SINCOS] = "sincos", 468 [BRW_MATH_FUNCTION_FDIV] = "fdiv", 469 [BRW_MATH_FUNCTION_POW] = "pow", 470 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod", 471 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv", 472 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod", 473 [GEN8_MATH_FUNCTION_INVM] = "invm", 474 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm", 475}; 476 477static const char *const math_saturate[2] = { 478 [0] = "", 479 [1] = "sat" 480}; 481 482static const char *const math_signed[2] = { 483 [0] = "", 484 [1] = "signed" 485}; 486 487static const char *const math_scalar[2] = { 488 [0] = "", 489 [1] = "scalar" 490}; 491 492static const char *const math_precision[2] = { 493 [0] = "", 494 [1] = "partial_precision" 495}; 496 497static const char *const gen5_urb_opcode[] = { 498 [0] = "urb_write", 499 [1] = "ff_sync", 500}; 501 502static const char *const gen7_urb_opcode[] = { 503 [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord", 504 [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord", 505 [BRW_URB_OPCODE_READ_HWORD] = "read HWord", 506 [BRW_URB_OPCODE_READ_OWORD] = "read OWord", 507 [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gen7+ */ 508 [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gen7+ */ 509 [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gen8+ */ 510 [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */ 511 [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gen8+ */ 512 /* [9-15] - reserved */ 513}; 514 515static const char *const urb_swizzle[4] = { 516 [BRW_URB_SWIZZLE_NONE] = "", 517 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave", 518 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose", 519}; 520 521static const char *const urb_allocate[2] = { 522 [0] = "", 523 [1] = "allocate" 524}; 525 526static const char *const urb_used[2] = { 527 [0] = "", 528 [1] = "used" 529}; 530 531static const char *const urb_complete[2] = { 532 [0] = "", 533 [1] = "complete" 534}; 535 536static const char *const gen5_sampler_msg_type[] = { 537 [GEN5_SAMPLER_MESSAGE_SAMPLE] = "sample", 538 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b", 539 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l", 540 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c", 541 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d", 542 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c", 543 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c", 544 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld", 545 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4", 546 [GEN5_SAMPLER_MESSAGE_LOD] = "lod", 547 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo", 548 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo", 549 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c", 550 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po", 551 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c", 552 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c", 553 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz", 554 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ] = "sample_c_lz", 555 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz", 556 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w", 557 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs", 558 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms", 559 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss", 560}; 561 562static const char *const gen5_sampler_simd_mode[4] = { 563 [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2", 564 [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8", 565 [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16", 566 [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64", 567}; 568 569static const char *const sampler_target_format[4] = { 570 [0] = "F", 571 [2] = "UD", 572 [3] = "D" 573}; 574 575 576static int column; 577 578static int 579string(FILE *file, const char *string) 580{ 581 fputs(string, file); 582 column += strlen(string); 583 return 0; 584} 585 586static int 587format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3); 588 589static int 590format(FILE *f, const char *format, ...) 591{ 592 char buf[1024]; 593 va_list args; 594 va_start(args, format); 595 596 vsnprintf(buf, sizeof(buf) - 1, format, args); 597 va_end(args); 598 string(f, buf); 599 return 0; 600} 601 602static int 603newline(FILE *f) 604{ 605 putc('\n', f); 606 column = 0; 607 return 0; 608} 609 610static int 611pad(FILE *f, int c) 612{ 613 do 614 string(f, " "); 615 while (column < c); 616 return 0; 617} 618 619static int 620control(FILE *file, const char *name, const char *const ctrl[], 621 unsigned id, int *space) 622{ 623 if (!ctrl[id]) { 624 fprintf(file, "*** invalid %s value %d ", name, id); 625 return 1; 626 } 627 if (ctrl[id][0]) { 628 if (space && *space) 629 string(file, " "); 630 string(file, ctrl[id]); 631 if (space) 632 *space = 1; 633 } 634 return 0; 635} 636 637static int 638print_opcode(FILE *file, const struct gen_device_info *devinfo, 639 enum opcode id) 640{ 641 const struct opcode_desc *desc = brw_opcode_desc(devinfo, id); 642 if (!desc) { 643 format(file, "*** invalid opcode value %d ", id); 644 return 1; 645 } 646 string(file, desc->name); 647 return 0; 648} 649 650static int 651reg(FILE *file, unsigned _reg_file, unsigned _reg_nr) 652{ 653 int err = 0; 654 655 /* Clear the Compr4 instruction compression bit. */ 656 if (_reg_file == BRW_MESSAGE_REGISTER_FILE) 657 _reg_nr &= ~BRW_MRF_COMPR4; 658 659 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) { 660 switch (_reg_nr & 0xf0) { 661 case BRW_ARF_NULL: 662 string(file, "null"); 663 break; 664 case BRW_ARF_ADDRESS: 665 format(file, "a%d", _reg_nr & 0x0f); 666 break; 667 case BRW_ARF_ACCUMULATOR: 668 format(file, "acc%d", _reg_nr & 0x0f); 669 break; 670 case BRW_ARF_FLAG: 671 format(file, "f%d", _reg_nr & 0x0f); 672 break; 673 case BRW_ARF_MASK: 674 format(file, "mask%d", _reg_nr & 0x0f); 675 break; 676 case BRW_ARF_MASK_STACK: 677 format(file, "msd%d", _reg_nr & 0x0f); 678 break; 679 case BRW_ARF_STATE: 680 format(file, "sr%d", _reg_nr & 0x0f); 681 break; 682 case BRW_ARF_CONTROL: 683 format(file, "cr%d", _reg_nr & 0x0f); 684 break; 685 case BRW_ARF_NOTIFICATION_COUNT: 686 format(file, "n%d", _reg_nr & 0x0f); 687 break; 688 case BRW_ARF_IP: 689 string(file, "ip"); 690 return -1; 691 break; 692 case BRW_ARF_TDR: 693 format(file, "tdr0"); 694 return -1; 695 case BRW_ARF_TIMESTAMP: 696 format(file, "tm%d", _reg_nr & 0x0f); 697 break; 698 default: 699 format(file, "ARF%d", _reg_nr); 700 break; 701 } 702 } else { 703 err |= control(file, "src reg file", reg_file, _reg_file, NULL); 704 format(file, "%d", _reg_nr); 705 } 706 return err; 707} 708 709static int 710dest(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) 711{ 712 enum brw_reg_type type = brw_inst_dst_type(devinfo, inst); 713 unsigned elem_size = brw_reg_type_to_size(type); 714 int err = 0; 715 716 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { 717 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 718 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst), 719 brw_inst_dst_da_reg_nr(devinfo, inst)); 720 if (err == -1) 721 return 0; 722 if (brw_inst_dst_da1_subreg_nr(devinfo, inst)) 723 format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) / 724 elem_size); 725 string(file, "<"); 726 err |= control(file, "horiz stride", horiz_stride, 727 brw_inst_dst_hstride(devinfo, inst), NULL); 728 string(file, ">"); 729 string(file, brw_reg_type_to_letters(type)); 730 } else { 731 string(file, "g[a0"); 732 if (brw_inst_dst_ia_subreg_nr(devinfo, inst)) 733 format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) / 734 elem_size); 735 if (brw_inst_dst_ia1_addr_imm(devinfo, inst)) 736 format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst)); 737 string(file, "]<"); 738 err |= control(file, "horiz stride", horiz_stride, 739 brw_inst_dst_hstride(devinfo, inst), NULL); 740 string(file, ">"); 741 string(file, brw_reg_type_to_letters(type)); 742 } 743 } else { 744 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 745 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst), 746 brw_inst_dst_da_reg_nr(devinfo, inst)); 747 if (err == -1) 748 return 0; 749 if (brw_inst_dst_da16_subreg_nr(devinfo, inst)) 750 format(file, ".%u", 16 / elem_size); 751 string(file, "<1>"); 752 err |= control(file, "writemask", writemask, 753 brw_inst_da16_writemask(devinfo, inst), NULL); 754 string(file, brw_reg_type_to_letters(type)); 755 } else { 756 err = 1; 757 string(file, "Indirect align16 address mode not supported"); 758 } 759 } 760 761 return 0; 762} 763 764static int 765dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) 766{ 767 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; 768 int err = 0; 769 uint32_t reg_file; 770 unsigned subreg_nr; 771 enum brw_reg_type type; 772 773 if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst)) 774 reg_file = BRW_ARCHITECTURE_REGISTER_FILE; 775 else if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst)) 776 reg_file = BRW_MESSAGE_REGISTER_FILE; 777 else 778 reg_file = BRW_GENERAL_REGISTER_FILE; 779 780 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst)); 781 if (err == -1) 782 return 0; 783 784 if (is_align1) { 785 type = brw_inst_3src_a1_dst_type(devinfo, inst); 786 subreg_nr = brw_inst_3src_a1_dst_subreg_nr(devinfo, inst); 787 } else { 788 type = brw_inst_3src_a16_dst_type(devinfo, inst); 789 subreg_nr = brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4; 790 } 791 subreg_nr /= brw_reg_type_to_size(type); 792 793 if (subreg_nr) 794 format(file, ".%u", subreg_nr); 795 string(file, "<1>"); 796 797 if (!is_align1) { 798 err |= control(file, "writemask", writemask, 799 brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL); 800 } 801 string(file, brw_reg_type_to_letters(type)); 802 803 return 0; 804} 805 806static int 807src_align1_region(FILE *file, 808 unsigned _vert_stride, unsigned _width, 809 unsigned _horiz_stride) 810{ 811 int err = 0; 812 string(file, "<"); 813 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL); 814 string(file, ","); 815 err |= control(file, "width", width, _width, NULL); 816 string(file, ","); 817 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL); 818 string(file, ">"); 819 return err; 820} 821 822static int 823src_da1(FILE *file, 824 const struct gen_device_info *devinfo, 825 unsigned opcode, 826 enum brw_reg_type type, unsigned _reg_file, 827 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride, 828 unsigned reg_num, unsigned sub_reg_num, unsigned __abs, 829 unsigned _negate) 830{ 831 int err = 0; 832 833 if (devinfo->gen >= 8 && is_logic_instruction(opcode)) 834 err |= control(file, "bitnot", m_bitnot, _negate, NULL); 835 else 836 err |= control(file, "negate", m_negate, _negate, NULL); 837 838 err |= control(file, "abs", _abs, __abs, NULL); 839 840 err |= reg(file, _reg_file, reg_num); 841 if (err == -1) 842 return 0; 843 if (sub_reg_num) { 844 unsigned elem_size = brw_reg_type_to_size(type); 845 format(file, ".%d", sub_reg_num / elem_size); /* use formal style like spec */ 846 } 847 src_align1_region(file, _vert_stride, _width, _horiz_stride); 848 string(file, brw_reg_type_to_letters(type)); 849 return err; 850} 851 852static int 853src_ia1(FILE *file, 854 const struct gen_device_info *devinfo, 855 unsigned opcode, 856 enum brw_reg_type type, 857 int _addr_imm, 858 unsigned _addr_subreg_nr, 859 unsigned _negate, 860 unsigned __abs, 861 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride) 862{ 863 int err = 0; 864 865 if (devinfo->gen >= 8 && is_logic_instruction(opcode)) 866 err |= control(file, "bitnot", m_bitnot, _negate, NULL); 867 else 868 err |= control(file, "negate", m_negate, _negate, NULL); 869 870 err |= control(file, "abs", _abs, __abs, NULL); 871 872 string(file, "g[a0"); 873 if (_addr_subreg_nr) 874 format(file, ".%d", _addr_subreg_nr); 875 if (_addr_imm) 876 format(file, " %d", _addr_imm); 877 string(file, "]"); 878 src_align1_region(file, _vert_stride, _width, _horiz_stride); 879 string(file, brw_reg_type_to_letters(type)); 880 return err; 881} 882 883static int 884src_swizzle(FILE *file, unsigned swiz) 885{ 886 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X); 887 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y); 888 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z); 889 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W); 890 int err = 0; 891 892 if (x == y && x == z && x == w) { 893 string(file, "."); 894 err |= control(file, "channel select", chan_sel, x, NULL); 895 } else if (swiz != BRW_SWIZZLE_XYZW) { 896 string(file, "."); 897 err |= control(file, "channel select", chan_sel, x, NULL); 898 err |= control(file, "channel select", chan_sel, y, NULL); 899 err |= control(file, "channel select", chan_sel, z, NULL); 900 err |= control(file, "channel select", chan_sel, w, NULL); 901 } 902 return err; 903} 904 905static int 906src_da16(FILE *file, 907 const struct gen_device_info *devinfo, 908 unsigned opcode, 909 enum brw_reg_type type, 910 unsigned _reg_file, 911 unsigned _vert_stride, 912 unsigned _reg_nr, 913 unsigned _subreg_nr, 914 unsigned __abs, 915 unsigned _negate, 916 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w) 917{ 918 int err = 0; 919 920 if (devinfo->gen >= 8 && is_logic_instruction(opcode)) 921 err |= control(file, "bitnot", m_bitnot, _negate, NULL); 922 else 923 err |= control(file, "negate", m_negate, _negate, NULL); 924 925 err |= control(file, "abs", _abs, __abs, NULL); 926 927 err |= reg(file, _reg_file, _reg_nr); 928 if (err == -1) 929 return 0; 930 if (_subreg_nr) { 931 unsigned elem_size = brw_reg_type_to_size(type); 932 933 /* bit4 for subreg number byte addressing. Make this same meaning as 934 in da1 case, so output looks consistent. */ 935 format(file, ".%d", 16 / elem_size); 936 } 937 string(file, "<"); 938 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL); 939 string(file, ">"); 940 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w)); 941 string(file, brw_reg_type_to_letters(type)); 942 return err; 943} 944 945static enum brw_vertical_stride 946vstride_from_align1_3src_vstride(enum gen10_align1_3src_vertical_stride vstride) 947{ 948 switch (vstride) { 949 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0; 950 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2; 951 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4; 952 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8: return BRW_VERTICAL_STRIDE_8; 953 default: 954 unreachable("not reached"); 955 } 956} 957 958static enum brw_horizontal_stride 959hstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride) 960{ 961 switch (hstride) { 962 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_HORIZONTAL_STRIDE_0; 963 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_HORIZONTAL_STRIDE_1; 964 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_HORIZONTAL_STRIDE_2; 965 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_HORIZONTAL_STRIDE_4; 966 default: 967 unreachable("not reached"); 968 } 969} 970 971static enum brw_vertical_stride 972vstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride) 973{ 974 switch (hstride) { 975 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0; 976 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_VERTICAL_STRIDE_1; 977 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2; 978 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4; 979 default: 980 unreachable("not reached"); 981 } 982} 983 984/* From "GEN10 Regioning Rules for Align1 Ternary Operations" in the 985 * "Register Region Restrictions" documentation 986 */ 987static enum brw_width 988implied_width(enum brw_vertical_stride _vert_stride, 989 enum brw_horizontal_stride _horiz_stride) 990{ 991 /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */ 992 if (_vert_stride == BRW_VERTICAL_STRIDE_0 && 993 _horiz_stride == BRW_HORIZONTAL_STRIDE_0) { 994 return BRW_WIDTH_1; 995 996 /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */ 997 } else if (_horiz_stride == BRW_HORIZONTAL_STRIDE_0) { 998 switch (_vert_stride) { 999 case BRW_VERTICAL_STRIDE_2: return BRW_WIDTH_2; 1000 case BRW_VERTICAL_STRIDE_4: return BRW_WIDTH_4; 1001 case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8; 1002 case BRW_VERTICAL_STRIDE_0: 1003 default: 1004 unreachable("not reached"); 1005 } 1006 1007 } else { 1008 /* FINISHME: Implement these: */ 1009 1010 /* "3. Width is equal to Vertical Stride/Horizontal Stride when both 1011 * Strides are non-zero. 1012 * 1013 * 4. Vertical Stride must not be zero if Horizontal Stride is non-zero. 1014 * This implies Vertical Stride is always greater than Horizontal 1015 * Stride." 1016 * 1017 * Given these statements and the knowledge that the stride and width 1018 * values are encoded in logarithmic form, we can perform the division 1019 * by just subtracting. 1020 */ 1021 return _vert_stride - _horiz_stride; 1022 } 1023} 1024 1025static int 1026src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) 1027{ 1028 int err = 0; 1029 unsigned reg_nr, subreg_nr; 1030 enum brw_reg_file _file; 1031 enum brw_reg_type type; 1032 enum brw_vertical_stride _vert_stride; 1033 enum brw_width _width; 1034 enum brw_horizontal_stride _horiz_stride; 1035 bool is_scalar_region; 1036 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; 1037 1038 if (is_align1) { 1039 if (brw_inst_3src_a1_src0_reg_file(devinfo, inst) == 1040 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { 1041 _file = BRW_GENERAL_REGISTER_FILE; 1042 reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst); 1043 subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst); 1044 type = brw_inst_3src_a1_src0_type(devinfo, inst); 1045 } else if (brw_inst_3src_a1_src0_type(devinfo, inst) == 1046 BRW_REGISTER_TYPE_NF) { 1047 _file = BRW_ARCHITECTURE_REGISTER_FILE; 1048 reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst); 1049 subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst); 1050 type = brw_inst_3src_a1_src0_type(devinfo, inst); 1051 } else { 1052 _file = BRW_IMMEDIATE_VALUE; 1053 uint16_t imm_val = brw_inst_3src_a1_src0_imm(devinfo, inst); 1054 enum brw_reg_type type = brw_inst_3src_a1_src0_type(devinfo, inst); 1055 1056 if (type == BRW_REGISTER_TYPE_W) { 1057 format(file, "%dW", imm_val); 1058 } else if (type == BRW_REGISTER_TYPE_UW) { 1059 format(file, "0x%04xUW", imm_val); 1060 } else if (type == BRW_REGISTER_TYPE_HF) { 1061 format(file, "%-gF", _mesa_half_to_float(imm_val)); 1062 } 1063 return 0; 1064 } 1065 1066 _vert_stride = vstride_from_align1_3src_vstride( 1067 brw_inst_3src_a1_src0_vstride(devinfo, inst)); 1068 _horiz_stride = hstride_from_align1_3src_hstride( 1069 brw_inst_3src_a1_src0_hstride(devinfo, inst)); 1070 _width = implied_width(_vert_stride, _horiz_stride); 1071 } else { 1072 _file = BRW_GENERAL_REGISTER_FILE; 1073 reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst); 1074 subreg_nr = brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4; 1075 type = brw_inst_3src_a16_src_type(devinfo, inst); 1076 1077 if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) { 1078 _vert_stride = BRW_VERTICAL_STRIDE_0; 1079 _width = BRW_WIDTH_1; 1080 _horiz_stride = BRW_HORIZONTAL_STRIDE_0; 1081 } else { 1082 _vert_stride = BRW_VERTICAL_STRIDE_4; 1083 _width = BRW_WIDTH_4; 1084 _horiz_stride = BRW_HORIZONTAL_STRIDE_1; 1085 } 1086 } 1087 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 && 1088 _width == BRW_WIDTH_1 && 1089 _horiz_stride == BRW_HORIZONTAL_STRIDE_0; 1090 1091 subreg_nr /= brw_reg_type_to_size(type); 1092 1093 err |= control(file, "negate", m_negate, 1094 brw_inst_3src_src0_negate(devinfo, inst), NULL); 1095 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL); 1096 1097 err |= reg(file, _file, reg_nr); 1098 if (err == -1) 1099 return 0; 1100 if (subreg_nr || is_scalar_region) 1101 format(file, ".%d", subreg_nr); 1102 src_align1_region(file, _vert_stride, _width, _horiz_stride); 1103 if (!is_scalar_region && !is_align1) 1104 err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst)); 1105 string(file, brw_reg_type_to_letters(type)); 1106 return err; 1107} 1108 1109static int 1110src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) 1111{ 1112 int err = 0; 1113 unsigned reg_nr, subreg_nr; 1114 enum brw_reg_file _file; 1115 enum brw_reg_type type; 1116 enum brw_vertical_stride _vert_stride; 1117 enum brw_width _width; 1118 enum brw_horizontal_stride _horiz_stride; 1119 bool is_scalar_region; 1120 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; 1121 1122 if (is_align1) { 1123 if (brw_inst_3src_a1_src1_reg_file(devinfo, inst) == 1124 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { 1125 _file = BRW_GENERAL_REGISTER_FILE; 1126 } else { 1127 _file = BRW_ARCHITECTURE_REGISTER_FILE; 1128 } 1129 1130 reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst); 1131 subreg_nr = brw_inst_3src_a1_src1_subreg_nr(devinfo, inst); 1132 type = brw_inst_3src_a1_src1_type(devinfo, inst); 1133 1134 _vert_stride = vstride_from_align1_3src_vstride( 1135 brw_inst_3src_a1_src1_vstride(devinfo, inst)); 1136 _horiz_stride = hstride_from_align1_3src_hstride( 1137 brw_inst_3src_a1_src1_hstride(devinfo, inst)); 1138 _width = implied_width(_vert_stride, _horiz_stride); 1139 } else { 1140 _file = BRW_GENERAL_REGISTER_FILE; 1141 reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst); 1142 subreg_nr = brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4; 1143 type = brw_inst_3src_a16_src_type(devinfo, inst); 1144 1145 if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) { 1146 _vert_stride = BRW_VERTICAL_STRIDE_0; 1147 _width = BRW_WIDTH_1; 1148 _horiz_stride = BRW_HORIZONTAL_STRIDE_0; 1149 } else { 1150 _vert_stride = BRW_VERTICAL_STRIDE_4; 1151 _width = BRW_WIDTH_4; 1152 _horiz_stride = BRW_HORIZONTAL_STRIDE_1; 1153 } 1154 } 1155 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 && 1156 _width == BRW_WIDTH_1 && 1157 _horiz_stride == BRW_HORIZONTAL_STRIDE_0; 1158 1159 subreg_nr /= brw_reg_type_to_size(type); 1160 1161 err |= control(file, "negate", m_negate, 1162 brw_inst_3src_src1_negate(devinfo, inst), NULL); 1163 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL); 1164 1165 err |= reg(file, _file, reg_nr); 1166 if (err == -1) 1167 return 0; 1168 if (subreg_nr || is_scalar_region) 1169 format(file, ".%d", subreg_nr); 1170 src_align1_region(file, _vert_stride, _width, _horiz_stride); 1171 if (!is_scalar_region && !is_align1) 1172 err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst)); 1173 string(file, brw_reg_type_to_letters(type)); 1174 return err; 1175} 1176 1177static int 1178src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) 1179{ 1180 int err = 0; 1181 unsigned reg_nr, subreg_nr; 1182 enum brw_reg_file _file; 1183 enum brw_reg_type type; 1184 enum brw_vertical_stride _vert_stride; 1185 enum brw_width _width; 1186 enum brw_horizontal_stride _horiz_stride; 1187 bool is_scalar_region; 1188 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; 1189 1190 if (is_align1) { 1191 if (brw_inst_3src_a1_src2_reg_file(devinfo, inst) == 1192 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { 1193 _file = BRW_GENERAL_REGISTER_FILE; 1194 reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst); 1195 subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst); 1196 type = brw_inst_3src_a1_src2_type(devinfo, inst); 1197 } else { 1198 _file = BRW_IMMEDIATE_VALUE; 1199 uint16_t imm_val = brw_inst_3src_a1_src2_imm(devinfo, inst); 1200 enum brw_reg_type type = brw_inst_3src_a1_src2_type(devinfo, inst); 1201 1202 if (type == BRW_REGISTER_TYPE_W) { 1203 format(file, "%dW", imm_val); 1204 } else if (type == BRW_REGISTER_TYPE_UW) { 1205 format(file, "0x%04xUW", imm_val); 1206 } else if (type == BRW_REGISTER_TYPE_HF) { 1207 format(file, "%-gF", _mesa_half_to_float(imm_val)); 1208 } 1209 return 0; 1210 } 1211 1212 /* FINISHME: No vertical stride on src2. Is using the hstride in place 1213 * correct? Doesn't seem like it, since there's hstride=1 but 1214 * no vstride=1. 1215 */ 1216 _vert_stride = vstride_from_align1_3src_hstride( 1217 brw_inst_3src_a1_src2_hstride(devinfo, inst)); 1218 _horiz_stride = hstride_from_align1_3src_hstride( 1219 brw_inst_3src_a1_src2_hstride(devinfo, inst)); 1220 _width = implied_width(_vert_stride, _horiz_stride); 1221 } else { 1222 _file = BRW_GENERAL_REGISTER_FILE; 1223 reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst); 1224 subreg_nr = brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4; 1225 type = brw_inst_3src_a16_src_type(devinfo, inst); 1226 1227 if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) { 1228 _vert_stride = BRW_VERTICAL_STRIDE_0; 1229 _width = BRW_WIDTH_1; 1230 _horiz_stride = BRW_HORIZONTAL_STRIDE_0; 1231 } else { 1232 _vert_stride = BRW_VERTICAL_STRIDE_4; 1233 _width = BRW_WIDTH_4; 1234 _horiz_stride = BRW_HORIZONTAL_STRIDE_1; 1235 } 1236 } 1237 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 && 1238 _width == BRW_WIDTH_1 && 1239 _horiz_stride == BRW_HORIZONTAL_STRIDE_0; 1240 1241 subreg_nr /= brw_reg_type_to_size(type); 1242 1243 err |= control(file, "negate", m_negate, 1244 brw_inst_3src_src2_negate(devinfo, inst), NULL); 1245 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL); 1246 1247 err |= reg(file, _file, reg_nr); 1248 if (err == -1) 1249 return 0; 1250 if (subreg_nr || is_scalar_region) 1251 format(file, ".%d", subreg_nr); 1252 src_align1_region(file, _vert_stride, _width, _horiz_stride); 1253 if (!is_scalar_region && !is_align1) 1254 err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst)); 1255 string(file, brw_reg_type_to_letters(type)); 1256 return err; 1257} 1258 1259static int 1260imm(FILE *file, const struct gen_device_info *devinfo, enum brw_reg_type type, 1261 const brw_inst *inst) 1262{ 1263 switch (type) { 1264 case BRW_REGISTER_TYPE_UQ: 1265 format(file, "0x%016"PRIx64"UQ", brw_inst_imm_uq(devinfo, inst)); 1266 break; 1267 case BRW_REGISTER_TYPE_Q: 1268 format(file, "%"PRId64"Q", brw_inst_imm_uq(devinfo, inst)); 1269 break; 1270 case BRW_REGISTER_TYPE_UD: 1271 format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst)); 1272 break; 1273 case BRW_REGISTER_TYPE_D: 1274 format(file, "%dD", brw_inst_imm_d(devinfo, inst)); 1275 break; 1276 case BRW_REGISTER_TYPE_UW: 1277 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst)); 1278 break; 1279 case BRW_REGISTER_TYPE_W: 1280 format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst)); 1281 break; 1282 case BRW_REGISTER_TYPE_UV: 1283 format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst)); 1284 break; 1285 case BRW_REGISTER_TYPE_VF: 1286 format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127, 96)); 1287 pad(file, 48); 1288 format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */", 1289 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)), 1290 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8), 1291 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16), 1292 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24)); 1293 break; 1294 case BRW_REGISTER_TYPE_V: 1295 format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst)); 1296 break; 1297 case BRW_REGISTER_TYPE_F: 1298 format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96)); 1299 pad(file, 48); 1300 format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst)); 1301 break; 1302 case BRW_REGISTER_TYPE_DF: 1303 format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127, 64)); 1304 pad(file, 48); 1305 format(file, "/* %-gDF */", brw_inst_imm_df(devinfo, inst)); 1306 break; 1307 case BRW_REGISTER_TYPE_HF: 1308 string(file, "Half Float IMM"); 1309 break; 1310 case BRW_REGISTER_TYPE_NF: 1311 case BRW_REGISTER_TYPE_UB: 1312 case BRW_REGISTER_TYPE_B: 1313 format(file, "*** invalid immediate type %d ", type); 1314 } 1315 return 0; 1316} 1317 1318static int 1319src0(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) 1320{ 1321 if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) { 1322 return imm(file, devinfo, brw_inst_src0_type(devinfo, inst), inst); 1323 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { 1324 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 1325 return src_da1(file, 1326 devinfo, 1327 brw_inst_opcode(devinfo, inst), 1328 brw_inst_src0_type(devinfo, inst), 1329 brw_inst_src0_reg_file(devinfo, inst), 1330 brw_inst_src0_vstride(devinfo, inst), 1331 brw_inst_src0_width(devinfo, inst), 1332 brw_inst_src0_hstride(devinfo, inst), 1333 brw_inst_src0_da_reg_nr(devinfo, inst), 1334 brw_inst_src0_da1_subreg_nr(devinfo, inst), 1335 brw_inst_src0_abs(devinfo, inst), 1336 brw_inst_src0_negate(devinfo, inst)); 1337 } else { 1338 return src_ia1(file, 1339 devinfo, 1340 brw_inst_opcode(devinfo, inst), 1341 brw_inst_src0_type(devinfo, inst), 1342 brw_inst_src0_ia1_addr_imm(devinfo, inst), 1343 brw_inst_src0_ia_subreg_nr(devinfo, inst), 1344 brw_inst_src0_negate(devinfo, inst), 1345 brw_inst_src0_abs(devinfo, inst), 1346 brw_inst_src0_hstride(devinfo, inst), 1347 brw_inst_src0_width(devinfo, inst), 1348 brw_inst_src0_vstride(devinfo, inst)); 1349 } 1350 } else { 1351 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 1352 return src_da16(file, 1353 devinfo, 1354 brw_inst_opcode(devinfo, inst), 1355 brw_inst_src0_type(devinfo, inst), 1356 brw_inst_src0_reg_file(devinfo, inst), 1357 brw_inst_src0_vstride(devinfo, inst), 1358 brw_inst_src0_da_reg_nr(devinfo, inst), 1359 brw_inst_src0_da16_subreg_nr(devinfo, inst), 1360 brw_inst_src0_abs(devinfo, inst), 1361 brw_inst_src0_negate(devinfo, inst), 1362 brw_inst_src0_da16_swiz_x(devinfo, inst), 1363 brw_inst_src0_da16_swiz_y(devinfo, inst), 1364 brw_inst_src0_da16_swiz_z(devinfo, inst), 1365 brw_inst_src0_da16_swiz_w(devinfo, inst)); 1366 } else { 1367 string(file, "Indirect align16 address mode not supported"); 1368 return 1; 1369 } 1370 } 1371} 1372 1373static int 1374src1(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) 1375{ 1376 if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) { 1377 return imm(file, devinfo, brw_inst_src1_type(devinfo, inst), inst); 1378 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { 1379 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 1380 return src_da1(file, 1381 devinfo, 1382 brw_inst_opcode(devinfo, inst), 1383 brw_inst_src1_type(devinfo, inst), 1384 brw_inst_src1_reg_file(devinfo, inst), 1385 brw_inst_src1_vstride(devinfo, inst), 1386 brw_inst_src1_width(devinfo, inst), 1387 brw_inst_src1_hstride(devinfo, inst), 1388 brw_inst_src1_da_reg_nr(devinfo, inst), 1389 brw_inst_src1_da1_subreg_nr(devinfo, inst), 1390 brw_inst_src1_abs(devinfo, inst), 1391 brw_inst_src1_negate(devinfo, inst)); 1392 } else { 1393 return src_ia1(file, 1394 devinfo, 1395 brw_inst_opcode(devinfo, inst), 1396 brw_inst_src1_type(devinfo, inst), 1397 brw_inst_src1_ia1_addr_imm(devinfo, inst), 1398 brw_inst_src1_ia_subreg_nr(devinfo, inst), 1399 brw_inst_src1_negate(devinfo, inst), 1400 brw_inst_src1_abs(devinfo, inst), 1401 brw_inst_src1_hstride(devinfo, inst), 1402 brw_inst_src1_width(devinfo, inst), 1403 brw_inst_src1_vstride(devinfo, inst)); 1404 } 1405 } else { 1406 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 1407 return src_da16(file, 1408 devinfo, 1409 brw_inst_opcode(devinfo, inst), 1410 brw_inst_src1_type(devinfo, inst), 1411 brw_inst_src1_reg_file(devinfo, inst), 1412 brw_inst_src1_vstride(devinfo, inst), 1413 brw_inst_src1_da_reg_nr(devinfo, inst), 1414 brw_inst_src1_da16_subreg_nr(devinfo, inst), 1415 brw_inst_src1_abs(devinfo, inst), 1416 brw_inst_src1_negate(devinfo, inst), 1417 brw_inst_src1_da16_swiz_x(devinfo, inst), 1418 brw_inst_src1_da16_swiz_y(devinfo, inst), 1419 brw_inst_src1_da16_swiz_z(devinfo, inst), 1420 brw_inst_src1_da16_swiz_w(devinfo, inst)); 1421 } else { 1422 string(file, "Indirect align16 address mode not supported"); 1423 return 1; 1424 } 1425 } 1426} 1427 1428static int 1429qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) 1430{ 1431 int qtr_ctl = brw_inst_qtr_control(devinfo, inst); 1432 int exec_size = 1 << brw_inst_exec_size(devinfo, inst); 1433 const unsigned nib_ctl = devinfo->gen < 7 ? 0 : 1434 brw_inst_nib_control(devinfo, inst); 1435 1436 if (exec_size < 8 || nib_ctl) { 1437 format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1); 1438 } else if (exec_size == 8) { 1439 switch (qtr_ctl) { 1440 case 0: 1441 string(file, " 1Q"); 1442 break; 1443 case 1: 1444 string(file, " 2Q"); 1445 break; 1446 case 2: 1447 string(file, " 3Q"); 1448 break; 1449 case 3: 1450 string(file, " 4Q"); 1451 break; 1452 } 1453 } else if (exec_size == 16) { 1454 if (qtr_ctl < 2) 1455 string(file, " 1H"); 1456 else 1457 string(file, " 2H"); 1458 } 1459 return 0; 1460} 1461 1462#ifdef DEBUG 1463static __attribute__((__unused__)) int 1464brw_disassemble_imm(const struct gen_device_info *devinfo, 1465 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0) 1466{ 1467 brw_inst inst; 1468 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0); 1469 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2); 1470 return brw_disassemble_inst(stderr, devinfo, &inst, false); 1471} 1472#endif 1473 1474int 1475brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo, 1476 const brw_inst *inst, bool is_compacted) 1477{ 1478 int err = 0; 1479 int space = 0; 1480 1481 const enum opcode opcode = brw_inst_opcode(devinfo, inst); 1482 const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode); 1483 1484 if (brw_inst_pred_control(devinfo, inst)) { 1485 string(file, "("); 1486 err |= control(file, "predicate inverse", pred_inv, 1487 brw_inst_pred_inv(devinfo, inst), NULL); 1488 format(file, "f%"PRIu64, devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0); 1489 if (brw_inst_flag_subreg_nr(devinfo, inst)) 1490 format(file, ".%"PRIu64, brw_inst_flag_subreg_nr(devinfo, inst)); 1491 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { 1492 err |= control(file, "predicate control align1", pred_ctrl_align1, 1493 brw_inst_pred_control(devinfo, inst), NULL); 1494 } else { 1495 err |= control(file, "predicate control align16", pred_ctrl_align16, 1496 brw_inst_pred_control(devinfo, inst), NULL); 1497 } 1498 string(file, ") "); 1499 } 1500 1501 err |= print_opcode(file, devinfo, opcode); 1502 err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst), 1503 NULL); 1504 1505 err |= control(file, "debug control", debug_ctrl, 1506 brw_inst_debug_control(devinfo, inst), NULL); 1507 1508 if (opcode == BRW_OPCODE_MATH) { 1509 string(file, " "); 1510 err |= control(file, "function", math_function, 1511 brw_inst_math_function(devinfo, inst), NULL); 1512 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) { 1513 err |= control(file, "conditional modifier", conditional_modifier, 1514 brw_inst_cond_modifier(devinfo, inst), NULL); 1515 1516 /* If we're using the conditional modifier, print which flags reg is 1517 * used for it. Note that on gen6+, the embedded-condition SEL and 1518 * control flow doesn't update flags. 1519 */ 1520 if (brw_inst_cond_modifier(devinfo, inst) && 1521 (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL && 1522 opcode != BRW_OPCODE_CSEL && 1523 opcode != BRW_OPCODE_IF && 1524 opcode != BRW_OPCODE_WHILE))) { 1525 format(file, ".f%"PRIu64, 1526 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0); 1527 if (brw_inst_flag_subreg_nr(devinfo, inst)) 1528 format(file, ".%"PRIu64, brw_inst_flag_subreg_nr(devinfo, inst)); 1529 } 1530 } 1531 1532 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) { 1533 string(file, "("); 1534 err |= control(file, "execution size", exec_size, 1535 brw_inst_exec_size(devinfo, inst), NULL); 1536 string(file, ")"); 1537 } 1538 1539 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6) 1540 format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst)); 1541 1542 if (has_uip(devinfo, opcode)) { 1543 /* Instructions that have UIP also have JIP. */ 1544 pad(file, 16); 1545 format(file, "JIP: %d", brw_inst_jip(devinfo, inst)); 1546 pad(file, 32); 1547 format(file, "UIP: %d", brw_inst_uip(devinfo, inst)); 1548 } else if (has_jip(devinfo, opcode)) { 1549 pad(file, 16); 1550 if (devinfo->gen >= 7) { 1551 format(file, "JIP: %d", brw_inst_jip(devinfo, inst)); 1552 } else { 1553 format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst)); 1554 } 1555 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK || 1556 opcode == BRW_OPCODE_CONTINUE || 1557 opcode == BRW_OPCODE_ELSE)) { 1558 pad(file, 16); 1559 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst)); 1560 pad(file, 32); 1561 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst)); 1562 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF || 1563 opcode == BRW_OPCODE_IFF || 1564 opcode == BRW_OPCODE_HALT)) { 1565 pad(file, 16); 1566 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst)); 1567 } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) { 1568 pad(file, 16); 1569 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst)); 1570 } else if (opcode == BRW_OPCODE_JMPI) { 1571 pad(file, 16); 1572 err |= src1(file, devinfo, inst); 1573 } else if (desc && desc->nsrc == 3) { 1574 pad(file, 16); 1575 err |= dest_3src(file, devinfo, inst); 1576 1577 pad(file, 32); 1578 err |= src0_3src(file, devinfo, inst); 1579 1580 pad(file, 48); 1581 err |= src1_3src(file, devinfo, inst); 1582 1583 pad(file, 64); 1584 err |= src2_3src(file, devinfo, inst); 1585 } else if (desc) { 1586 if (desc->ndst > 0) { 1587 pad(file, 16); 1588 err |= dest(file, devinfo, inst); 1589 } 1590 1591 if (desc->nsrc > 0) { 1592 pad(file, 32); 1593 err |= src0(file, devinfo, inst); 1594 } 1595 1596 if (desc->nsrc > 1) { 1597 pad(file, 48); 1598 err |= src1(file, devinfo, inst); 1599 } 1600 } 1601 1602 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) { 1603 enum brw_message_target sfid = brw_inst_sfid(devinfo, inst); 1604 1605 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) { 1606 /* show the indirect descriptor source */ 1607 pad(file, 48); 1608 err |= src1(file, devinfo, inst); 1609 pad(file, 64); 1610 } else { 1611 pad(file, 48); 1612 } 1613 1614 /* Print message descriptor as immediate source */ 1615 fprintf(file, "0x%08"PRIx64, inst->data[1] >> 32); 1616 1617 newline(file); 1618 pad(file, 16); 1619 space = 0; 1620 1621 fprintf(file, " "); 1622 err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid, 1623 sfid, &space); 1624 string(file, " MsgDesc:"); 1625 1626 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) { 1627 format(file, " indirect"); 1628 } else { 1629 switch (sfid) { 1630 case BRW_SFID_MATH: 1631 err |= control(file, "math function", math_function, 1632 brw_inst_math_msg_function(devinfo, inst), &space); 1633 err |= control(file, "math saturate", math_saturate, 1634 brw_inst_math_msg_saturate(devinfo, inst), &space); 1635 err |= control(file, "math signed", math_signed, 1636 brw_inst_math_msg_signed_int(devinfo, inst), &space); 1637 err |= control(file, "math scalar", math_scalar, 1638 brw_inst_math_msg_data_type(devinfo, inst), &space); 1639 err |= control(file, "math precision", math_precision, 1640 brw_inst_math_msg_precision(devinfo, inst), &space); 1641 break; 1642 case BRW_SFID_SAMPLER: 1643 if (devinfo->gen >= 5) { 1644 err |= control(file, "sampler message", gen5_sampler_msg_type, 1645 brw_inst_sampler_msg_type(devinfo, inst), &space); 1646 err |= control(file, "sampler simd mode", gen5_sampler_simd_mode, 1647 brw_inst_sampler_simd_mode(devinfo, inst), &space); 1648 format(file, " Surface = %"PRIu64" Sampler = %"PRIu64, 1649 brw_inst_binding_table_index(devinfo, inst), 1650 brw_inst_sampler(devinfo, inst)); 1651 } else { 1652 format(file, " (%"PRIu64", %"PRIu64", %"PRIu64", ", 1653 brw_inst_binding_table_index(devinfo, inst), 1654 brw_inst_sampler(devinfo, inst), 1655 brw_inst_sampler_msg_type(devinfo, inst)); 1656 if (!devinfo->is_g4x) { 1657 err |= control(file, "sampler target format", 1658 sampler_target_format, 1659 brw_inst_sampler_return_format(devinfo, inst), NULL); 1660 } 1661 string(file, ")"); 1662 } 1663 break; 1664 case GEN6_SFID_DATAPORT_SAMPLER_CACHE: 1665 case GEN6_SFID_DATAPORT_CONSTANT_CACHE: 1666 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */ 1667 if (devinfo->gen >= 6) { 1668 format(file, " (%"PRIu64", %"PRIu64", %"PRIu64", %"PRIu64")", 1669 brw_inst_binding_table_index(devinfo, inst), 1670 brw_inst_dp_msg_control(devinfo, inst), 1671 brw_inst_dp_msg_type(devinfo, inst), 1672 devinfo->gen >= 7 ? 0 : brw_inst_dp_write_commit(devinfo, inst)); 1673 } else { 1674 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x; 1675 err |= control(file, "DP read message type", 1676 is_965 ? gen4_dp_read_port_msg_type : 1677 g45_dp_read_port_msg_type, 1678 brw_inst_dp_read_msg_type(devinfo, inst), 1679 &space); 1680 1681 format(file, " MsgCtrl = 0x%"PRIx64, 1682 brw_inst_dp_read_msg_control(devinfo, inst)); 1683 1684 format(file, " Surface = %"PRIu64, brw_inst_binding_table_index(devinfo, inst)); 1685 } 1686 break; 1687 1688 case GEN6_SFID_DATAPORT_RENDER_CACHE: { 1689 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */ 1690 unsigned msg_type = brw_inst_dp_write_msg_type(devinfo, inst); 1691 1692 err |= control(file, "DP rc message type", 1693 dp_rc_msg_type(devinfo), msg_type, &space); 1694 1695 bool is_rt_write = msg_type == 1696 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 1697 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE); 1698 1699 if (is_rt_write) { 1700 err |= control(file, "RT message type", m_rt_write_subtype, 1701 brw_inst_rt_message_type(devinfo, inst), &space); 1702 if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst)) 1703 string(file, " Hi"); 1704 if (brw_inst_rt_last(devinfo, inst)) 1705 string(file, " LastRT"); 1706 if (devinfo->gen < 7 && brw_inst_dp_write_commit(devinfo, inst)) 1707 string(file, " WriteCommit"); 1708 } else { 1709 format(file, " MsgCtrl = 0x%"PRIx64, 1710 brw_inst_dp_write_msg_control(devinfo, inst)); 1711 } 1712 1713 format(file, " Surface = %"PRIu64, brw_inst_binding_table_index(devinfo, inst)); 1714 break; 1715 } 1716 1717 case BRW_SFID_URB: { 1718 unsigned opcode = brw_inst_urb_opcode(devinfo, inst); 1719 1720 format(file, " %"PRIu64, brw_inst_urb_global_offset(devinfo, inst)); 1721 1722 space = 1; 1723 1724 err |= control(file, "urb opcode", 1725 devinfo->gen >= 7 ? gen7_urb_opcode 1726 : gen5_urb_opcode, 1727 opcode, &space); 1728 1729 if (devinfo->gen >= 7 && 1730 brw_inst_urb_per_slot_offset(devinfo, inst)) { 1731 string(file, " per-slot"); 1732 } 1733 1734 if (opcode == GEN8_URB_OPCODE_SIMD8_WRITE || 1735 opcode == GEN8_URB_OPCODE_SIMD8_READ) { 1736 if (brw_inst_urb_channel_mask_present(devinfo, inst)) 1737 string(file, " masked"); 1738 } else { 1739 err |= control(file, "urb swizzle", urb_swizzle, 1740 brw_inst_urb_swizzle_control(devinfo, inst), 1741 &space); 1742 } 1743 1744 if (devinfo->gen < 7) { 1745 err |= control(file, "urb allocate", urb_allocate, 1746 brw_inst_urb_allocate(devinfo, inst), &space); 1747 err |= control(file, "urb used", urb_used, 1748 brw_inst_urb_used(devinfo, inst), &space); 1749 } 1750 if (devinfo->gen < 8) { 1751 err |= control(file, "urb complete", urb_complete, 1752 brw_inst_urb_complete(devinfo, inst), &space); 1753 } 1754 break; 1755 } 1756 case BRW_SFID_THREAD_SPAWNER: 1757 break; 1758 1759 case BRW_SFID_MESSAGE_GATEWAY: 1760 format(file, " (%s)", 1761 gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]); 1762 break; 1763 1764 case GEN7_SFID_DATAPORT_DATA_CACHE: 1765 if (devinfo->gen >= 7) { 1766 format(file, " ("); 1767 1768 err |= control(file, "DP DC0 message type", 1769 dp_dc0_msg_type_gen7, 1770 brw_inst_dp_msg_type(devinfo, inst), &space); 1771 1772 format(file, ", %"PRIu64", ", brw_inst_binding_table_index(devinfo, inst)); 1773 1774 switch (brw_inst_dp_msg_type(devinfo, inst)) { 1775 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP: 1776 control(file, "atomic op", aop, 1777 brw_inst_imm_ud(devinfo, inst) >> 8 & 0xf, &space); 1778 break; 1779 default: 1780 format(file, "%"PRIu64, brw_inst_dp_msg_control(devinfo, inst)); 1781 } 1782 format(file, ")"); 1783 break; 1784 } 1785 /* FALLTHROUGH */ 1786 1787 case HSW_SFID_DATAPORT_DATA_CACHE_1: { 1788 if (devinfo->gen >= 7) { 1789 format(file, " ("); 1790 1791 unsigned msg_ctrl = brw_inst_dp_msg_control(devinfo, inst); 1792 1793 err |= control(file, "DP DC1 message type", 1794 dp_dc1_msg_type_hsw, 1795 brw_inst_dp_msg_type(devinfo, inst), &space); 1796 1797 format(file, ", Surface = %"PRIu64", ", 1798 brw_inst_binding_table_index(devinfo, inst)); 1799 1800 switch (brw_inst_dp_msg_type(devinfo, inst)) { 1801 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP: 1802 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP: 1803 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP: 1804 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16); 1805 /* fallthrough */ 1806 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2: 1807 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2: 1808 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2: 1809 control(file, "atomic op", aop, msg_ctrl & 0xf, &space); 1810 break; 1811 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ: 1812 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE: 1813 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ: 1814 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: { 1815 static const char *simd_modes[] = { "4x2", "16", "8" }; 1816 format(file, "SIMD%s, Mask = 0x%x", 1817 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf); 1818 break; 1819 } 1820 case GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP: 1821 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16); 1822 control(file, "atomic float op", aop_float, msg_ctrl & 0xf, 1823 &space); 1824 break; 1825 default: 1826 format(file, "0x%x", msg_ctrl); 1827 } 1828 format(file, ")"); 1829 break; 1830 } 1831 /* FALLTHROUGH */ 1832 } 1833 1834 case GEN7_SFID_PIXEL_INTERPOLATOR: 1835 if (devinfo->gen >= 7) { 1836 format(file, " (%s, %s, 0x%02"PRIx64")", 1837 brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp", 1838 pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)], 1839 brw_inst_pi_message_data(devinfo, inst)); 1840 break; 1841 } 1842 /* FALLTHROUGH */ 1843 1844 default: 1845 format(file, "unsupported shared function ID %d", sfid); 1846 break; 1847 } 1848 1849 if (space) 1850 string(file, " "); 1851 format(file, "mlen %"PRIu64, brw_inst_mlen(devinfo, inst)); 1852 format(file, " rlen %"PRIu64, brw_inst_rlen(devinfo, inst)); 1853 } 1854 } 1855 pad(file, 64); 1856 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) { 1857 string(file, "{"); 1858 space = 1; 1859 err |= control(file, "access mode", access_mode, 1860 brw_inst_access_mode(devinfo, inst), &space); 1861 if (devinfo->gen >= 6) { 1862 err |= control(file, "write enable control", wectrl, 1863 brw_inst_mask_control(devinfo, inst), &space); 1864 } else { 1865 err |= control(file, "mask control", mask_ctrl, 1866 brw_inst_mask_control(devinfo, inst), &space); 1867 } 1868 err |= control(file, "dependency control", dep_ctrl, 1869 ((brw_inst_no_dd_check(devinfo, inst) << 1) | 1870 brw_inst_no_dd_clear(devinfo, inst)), &space); 1871 1872 if (devinfo->gen >= 6) 1873 err |= qtr_ctrl(file, devinfo, inst); 1874 else { 1875 if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED && 1876 desc && desc->ndst > 0 && 1877 brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE && 1878 brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) { 1879 format(file, " compr4"); 1880 } else { 1881 err |= control(file, "compression control", compr_ctrl, 1882 brw_inst_qtr_control(devinfo, inst), &space); 1883 } 1884 } 1885 1886 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space); 1887 err |= control(file, "thread control", thread_ctrl, 1888 brw_inst_thread_control(devinfo, inst), &space); 1889 if (has_branch_ctrl(devinfo, opcode)) { 1890 err |= control(file, "branch ctrl", branch_ctrl, 1891 brw_inst_branch_control(devinfo, inst), &space); 1892 } else if (devinfo->gen >= 6) { 1893 err |= control(file, "acc write control", accwr, 1894 brw_inst_acc_wr_control(devinfo, inst), &space); 1895 } 1896 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) 1897 err |= control(file, "end of thread", end_of_thread, 1898 brw_inst_eot(devinfo, inst), &space); 1899 if (space) 1900 string(file, " "); 1901 string(file, "}"); 1902 } 1903 string(file, ";"); 1904 newline(file); 1905 return err; 1906} 1907