brw_eu.h revision 01e04c3f
1/* 2 Copyright (C) Intel Corp. 2006. All Rights Reserved. 3 Intel funded Tungsten Graphics to 4 develop this 3D driver. 5 6 Permission is hereby granted, free of charge, to any person obtaining 7 a copy of this software and associated documentation files (the 8 "Software"), to deal in the Software without restriction, including 9 without limitation the rights to use, copy, modify, merge, publish, 10 distribute, sublicense, and/or sell copies of the Software, and to 11 permit persons to whom the Software is furnished to do so, subject to 12 the following conditions: 13 14 The above copyright notice and this permission notice (including the 15 next paragraph) shall be included in all copies or substantial 16 portions of the Software. 17 18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 26 **********************************************************************/ 27 /* 28 * Authors: 29 * Keith Whitwell <keithw@vmware.com> 30 */ 31 32 33#ifndef BRW_EU_H 34#define BRW_EU_H 35 36#include <stdbool.h> 37#include <stdio.h> 38#include "brw_inst.h" 39#include "brw_eu_defines.h" 40#include "brw_reg.h" 41#include "brw_disasm_info.h" 42 43#ifdef __cplusplus 44extern "C" { 45#endif 46 47#define BRW_EU_MAX_INSN_STACK 5 48 49struct brw_insn_state { 50 /* One of BRW_EXECUTE_* */ 51 unsigned exec_size:3; 52 53 /* Group in units of channels */ 54 unsigned group:5; 55 56 /* Compression control on gen4-5 */ 57 bool compressed:1; 58 59 /* One of BRW_MASK_* */ 60 unsigned mask_control:1; 61 62 bool saturate:1; 63 64 /* One of BRW_ALIGN_* */ 65 unsigned access_mode:1; 66 67 /* One of BRW_PREDICATE_* */ 68 enum brw_predicate predicate:4; 69 70 bool pred_inv:1; 71 72 /* Flag subreg. Bottom bit is subreg, top bit is reg */ 73 unsigned flag_subreg:2; 74 75 bool acc_wr_control:1; 76}; 77 78 79/* A helper for accessing the last instruction emitted. This makes it easy 80 * to set various bits on an instruction without having to create temporary 81 * variable and assign the emitted instruction to those. 82 */ 83#define brw_last_inst (&p->store[p->nr_insn - 1]) 84 85struct brw_codegen { 86 brw_inst *store; 87 int store_size; 88 unsigned nr_insn; 89 unsigned int next_insn_offset; 90 91 void *mem_ctx; 92 93 /* Allow clients to push/pop instruction state: 94 */ 95 struct brw_insn_state stack[BRW_EU_MAX_INSN_STACK]; 96 struct brw_insn_state *current; 97 98 /** Whether or not the user wants automatic exec sizes 99 * 100 * If true, codegen will try to automatically infer the exec size of an 101 * instruction from the width of the destination register. If false, it 102 * will take whatever is set by brw_set_default_exec_size verbatim. 103 * 104 * This is set to true by default in brw_init_codegen. 105 */ 106 bool automatic_exec_sizes; 107 108 bool single_program_flow; 109 const struct gen_device_info *devinfo; 110 111 /* Control flow stacks: 112 * - if_stack contains IF and ELSE instructions which must be patched 113 * (and popped) once the matching ENDIF instruction is encountered. 114 * 115 * Just store the instruction pointer(an index). 116 */ 117 int *if_stack; 118 int if_stack_depth; 119 int if_stack_array_size; 120 121 /** 122 * loop_stack contains the instruction pointers of the starts of loops which 123 * must be patched (and popped) once the matching WHILE instruction is 124 * encountered. 125 */ 126 int *loop_stack; 127 /** 128 * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF 129 * blocks they were popping out of, to fix up the mask stack. This tracks 130 * the IF/ENDIF nesting in each current nested loop level. 131 */ 132 int *if_depth_in_loop; 133 int loop_stack_depth; 134 int loop_stack_array_size; 135}; 136 137void brw_pop_insn_state( struct brw_codegen *p ); 138void brw_push_insn_state( struct brw_codegen *p ); 139unsigned brw_get_default_exec_size(struct brw_codegen *p); 140unsigned brw_get_default_group(struct brw_codegen *p); 141unsigned brw_get_default_access_mode(struct brw_codegen *p); 142void brw_set_default_exec_size(struct brw_codegen *p, unsigned value); 143void brw_set_default_mask_control( struct brw_codegen *p, unsigned value ); 144void brw_set_default_saturate( struct brw_codegen *p, bool enable ); 145void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode ); 146void brw_inst_set_compression(const struct gen_device_info *devinfo, 147 brw_inst *inst, bool on); 148void brw_set_default_compression(struct brw_codegen *p, bool on); 149void brw_inst_set_group(const struct gen_device_info *devinfo, 150 brw_inst *inst, unsigned group); 151void brw_set_default_group(struct brw_codegen *p, unsigned group); 152void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c); 153void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc ); 154void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse); 155void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg); 156void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value); 157 158void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p, 159 void *mem_ctx); 160int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo, 161 const struct brw_inst *inst, bool is_compacted); 162void brw_disassemble(const struct gen_device_info *devinfo, 163 const void *assembly, int start, int end, FILE *out); 164const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz ); 165 166brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode); 167void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest); 168void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg); 169 170void gen6_resolve_implied_move(struct brw_codegen *p, 171 struct brw_reg *src, 172 unsigned msg_reg_nr); 173 174/* Helpers for regular instructions: 175 */ 176#define ALU1(OP) \ 177brw_inst *brw_##OP(struct brw_codegen *p, \ 178 struct brw_reg dest, \ 179 struct brw_reg src0); 180 181#define ALU2(OP) \ 182brw_inst *brw_##OP(struct brw_codegen *p, \ 183 struct brw_reg dest, \ 184 struct brw_reg src0, \ 185 struct brw_reg src1); 186 187#define ALU3(OP) \ 188brw_inst *brw_##OP(struct brw_codegen *p, \ 189 struct brw_reg dest, \ 190 struct brw_reg src0, \ 191 struct brw_reg src1, \ 192 struct brw_reg src2); 193 194#define ROUND(OP) \ 195void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0); 196 197ALU1(MOV) 198ALU2(SEL) 199ALU1(NOT) 200ALU2(AND) 201ALU2(OR) 202ALU2(XOR) 203ALU2(SHR) 204ALU2(SHL) 205ALU1(DIM) 206ALU2(ASR) 207ALU3(CSEL) 208ALU1(F32TO16) 209ALU1(F16TO32) 210ALU2(ADD) 211ALU2(AVG) 212ALU2(MUL) 213ALU1(FRC) 214ALU1(RNDD) 215ALU2(MAC) 216ALU2(MACH) 217ALU1(LZD) 218ALU2(DP4) 219ALU2(DPH) 220ALU2(DP3) 221ALU2(DP2) 222ALU2(LINE) 223ALU2(PLN) 224ALU3(MAD) 225ALU3(LRP) 226ALU1(BFREV) 227ALU3(BFE) 228ALU2(BFI1) 229ALU3(BFI2) 230ALU1(FBH) 231ALU1(FBL) 232ALU1(CBIT) 233ALU2(ADDC) 234ALU2(SUBB) 235ALU2(MAC) 236 237ROUND(RNDZ) 238ROUND(RNDE) 239 240#undef ALU1 241#undef ALU2 242#undef ALU3 243#undef ROUND 244 245 246/* Helpers for SEND instruction: 247 */ 248 249/** 250 * Construct a message descriptor immediate with the specified common 251 * descriptor controls. 252 */ 253static inline uint32_t 254brw_message_desc(const struct gen_device_info *devinfo, 255 unsigned msg_length, 256 unsigned response_length, 257 bool header_present) 258{ 259 if (devinfo->gen >= 5) { 260 return (SET_BITS(msg_length, 28, 25) | 261 SET_BITS(response_length, 24, 20) | 262 SET_BITS(header_present, 19, 19)); 263 } else { 264 return (SET_BITS(msg_length, 23, 20) | 265 SET_BITS(response_length, 19, 16)); 266 } 267} 268 269/** 270 * Construct a message descriptor immediate with the specified sampler 271 * function controls. 272 */ 273static inline uint32_t 274brw_sampler_desc(const struct gen_device_info *devinfo, 275 unsigned binding_table_index, 276 unsigned sampler, 277 unsigned msg_type, 278 unsigned simd_mode, 279 unsigned return_format) 280{ 281 const unsigned desc = (SET_BITS(binding_table_index, 7, 0) | 282 SET_BITS(sampler, 11, 8)); 283 if (devinfo->gen >= 7) 284 return (desc | SET_BITS(msg_type, 16, 12) | 285 SET_BITS(simd_mode, 18, 17)); 286 else if (devinfo->gen >= 5) 287 return (desc | SET_BITS(msg_type, 15, 12) | 288 SET_BITS(simd_mode, 17, 16)); 289 else if (devinfo->is_g4x) 290 return desc | SET_BITS(msg_type, 15, 12); 291 else 292 return (desc | SET_BITS(return_format, 13, 12) | 293 SET_BITS(msg_type, 15, 14)); 294} 295 296/** 297 * Construct a message descriptor immediate with the specified dataport read 298 * function controls. 299 */ 300static inline uint32_t 301brw_dp_read_desc(const struct gen_device_info *devinfo, 302 unsigned binding_table_index, 303 unsigned msg_control, 304 unsigned msg_type, 305 unsigned target_cache) 306{ 307 const unsigned desc = SET_BITS(binding_table_index, 7, 0); 308 if (devinfo->gen >= 7) 309 return (desc | SET_BITS(msg_control, 13, 8) | 310 SET_BITS(msg_type, 17, 14)); 311 else if (devinfo->gen >= 6) 312 return (desc | SET_BITS(msg_control, 12, 8) | 313 SET_BITS(msg_type, 16, 13)); 314 else if (devinfo->gen >= 5 || devinfo->is_g4x) 315 return (desc | SET_BITS(msg_control, 10, 8) | 316 SET_BITS(msg_type, 13, 11) | 317 SET_BITS(target_cache, 15, 14)); 318 else 319 return (desc | SET_BITS(msg_control, 11, 8) | 320 SET_BITS(msg_type, 13, 12) | 321 SET_BITS(target_cache, 15, 14)); 322} 323 324/** 325 * Construct a message descriptor immediate with the specified dataport write 326 * function controls. 327 */ 328static inline uint32_t 329brw_dp_write_desc(const struct gen_device_info *devinfo, 330 unsigned binding_table_index, 331 unsigned msg_control, 332 unsigned msg_type, 333 unsigned last_render_target, 334 unsigned send_commit_msg) 335{ 336 const unsigned desc = SET_BITS(binding_table_index, 7, 0); 337 if (devinfo->gen >= 7) 338 return (desc | SET_BITS(msg_control, 13, 8) | 339 SET_BITS(last_render_target, 12, 12) | 340 SET_BITS(msg_type, 17, 14)); 341 else if (devinfo->gen >= 6) 342 return (desc | SET_BITS(msg_control, 12, 8) | 343 SET_BITS(last_render_target, 12, 12) | 344 SET_BITS(msg_type, 16, 13) | 345 SET_BITS(send_commit_msg, 17, 17)); 346 else 347 return (desc | SET_BITS(msg_control, 11, 8) | 348 SET_BITS(last_render_target, 11, 11) | 349 SET_BITS(msg_type, 14, 12) | 350 SET_BITS(send_commit_msg, 15, 15)); 351} 352 353/** 354 * Construct a message descriptor immediate with the specified dataport 355 * surface function controls. 356 */ 357static inline uint32_t 358brw_dp_surface_desc(const struct gen_device_info *devinfo, 359 unsigned msg_type, 360 unsigned msg_control) 361{ 362 assert(devinfo->gen >= 7); 363 if (devinfo->gen >= 8) { 364 return (SET_BITS(msg_control, 13, 8) | 365 SET_BITS(msg_type, 18, 14)); 366 } else { 367 return (SET_BITS(msg_control, 13, 8) | 368 SET_BITS(msg_type, 17, 14)); 369 } 370} 371 372/** 373 * Construct a message descriptor immediate with the specified pixel 374 * interpolator function controls. 375 */ 376static inline uint32_t 377brw_pixel_interp_desc(UNUSED const struct gen_device_info *devinfo, 378 unsigned msg_type, 379 bool noperspective, 380 unsigned simd_mode, 381 unsigned slot_group) 382{ 383 return (SET_BITS(slot_group, 11, 11) | 384 SET_BITS(msg_type, 13, 12) | 385 SET_BITS(!!noperspective, 14, 14) | 386 SET_BITS(simd_mode, 16, 16)); 387} 388 389void brw_urb_WRITE(struct brw_codegen *p, 390 struct brw_reg dest, 391 unsigned msg_reg_nr, 392 struct brw_reg src0, 393 enum brw_urb_write_flags flags, 394 unsigned msg_length, 395 unsigned response_length, 396 unsigned offset, 397 unsigned swizzle); 398 399/** 400 * Send message to shared unit \p sfid with a possibly indirect descriptor \p 401 * desc. If \p desc is not an immediate it will be transparently loaded to an 402 * address register using an OR instruction. 403 */ 404void 405brw_send_indirect_message(struct brw_codegen *p, 406 unsigned sfid, 407 struct brw_reg dst, 408 struct brw_reg payload, 409 struct brw_reg desc, 410 unsigned desc_imm); 411 412void brw_ff_sync(struct brw_codegen *p, 413 struct brw_reg dest, 414 unsigned msg_reg_nr, 415 struct brw_reg src0, 416 bool allocate, 417 unsigned response_length, 418 bool eot); 419 420void brw_svb_write(struct brw_codegen *p, 421 struct brw_reg dest, 422 unsigned msg_reg_nr, 423 struct brw_reg src0, 424 unsigned binding_table_index, 425 bool send_commit_msg); 426 427brw_inst *brw_fb_WRITE(struct brw_codegen *p, 428 struct brw_reg payload, 429 struct brw_reg implied_header, 430 unsigned msg_control, 431 unsigned binding_table_index, 432 unsigned msg_length, 433 unsigned response_length, 434 bool eot, 435 bool last_render_target, 436 bool header_present); 437 438brw_inst *gen9_fb_READ(struct brw_codegen *p, 439 struct brw_reg dst, 440 struct brw_reg payload, 441 unsigned binding_table_index, 442 unsigned msg_length, 443 unsigned response_length, 444 bool per_sample); 445 446void brw_SAMPLE(struct brw_codegen *p, 447 struct brw_reg dest, 448 unsigned msg_reg_nr, 449 struct brw_reg src0, 450 unsigned binding_table_index, 451 unsigned sampler, 452 unsigned msg_type, 453 unsigned response_length, 454 unsigned msg_length, 455 unsigned header_present, 456 unsigned simd_mode, 457 unsigned return_format); 458 459void brw_adjust_sampler_state_pointer(struct brw_codegen *p, 460 struct brw_reg header, 461 struct brw_reg sampler_index); 462 463void gen4_math(struct brw_codegen *p, 464 struct brw_reg dest, 465 unsigned function, 466 unsigned msg_reg_nr, 467 struct brw_reg src, 468 unsigned precision ); 469 470void gen6_math(struct brw_codegen *p, 471 struct brw_reg dest, 472 unsigned function, 473 struct brw_reg src0, 474 struct brw_reg src1); 475 476void brw_oword_block_read(struct brw_codegen *p, 477 struct brw_reg dest, 478 struct brw_reg mrf, 479 uint32_t offset, 480 uint32_t bind_table_index); 481 482unsigned brw_scratch_surface_idx(const struct brw_codegen *p); 483 484void brw_oword_block_read_scratch(struct brw_codegen *p, 485 struct brw_reg dest, 486 struct brw_reg mrf, 487 int num_regs, 488 unsigned offset); 489 490void brw_oword_block_write_scratch(struct brw_codegen *p, 491 struct brw_reg mrf, 492 int num_regs, 493 unsigned offset); 494 495void gen7_block_read_scratch(struct brw_codegen *p, 496 struct brw_reg dest, 497 int num_regs, 498 unsigned offset); 499 500void brw_shader_time_add(struct brw_codegen *p, 501 struct brw_reg payload, 502 uint32_t surf_index); 503 504/** 505 * Return the generation-specific jump distance scaling factor. 506 * 507 * Given the number of instructions to jump, we need to scale by 508 * some number to obtain the actual jump distance to program in an 509 * instruction. 510 */ 511static inline unsigned 512brw_jump_scale(const struct gen_device_info *devinfo) 513{ 514 /* Broadwell measures jump targets in bytes. */ 515 if (devinfo->gen >= 8) 516 return 16; 517 518 /* Ironlake and later measure jump targets in 64-bit data chunks (in order 519 * (to support compaction), so each 128-bit instruction requires 2 chunks. 520 */ 521 if (devinfo->gen >= 5) 522 return 2; 523 524 /* Gen4 simply uses the number of 128-bit instructions. */ 525 return 1; 526} 527 528void brw_barrier(struct brw_codegen *p, struct brw_reg src); 529 530/* If/else/endif. Works by manipulating the execution flags on each 531 * channel. 532 */ 533brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size); 534brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional, 535 struct brw_reg src0, struct brw_reg src1); 536 537void brw_ELSE(struct brw_codegen *p); 538void brw_ENDIF(struct brw_codegen *p); 539 540/* DO/WHILE loops: 541 */ 542brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size); 543 544brw_inst *brw_WHILE(struct brw_codegen *p); 545 546brw_inst *brw_BREAK(struct brw_codegen *p); 547brw_inst *brw_CONT(struct brw_codegen *p); 548brw_inst *gen6_HALT(struct brw_codegen *p); 549 550/* Forward jumps: 551 */ 552void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx); 553 554brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index, 555 unsigned predicate_control); 556 557void brw_NOP(struct brw_codegen *p); 558 559void brw_WAIT(struct brw_codegen *p); 560 561/* Special case: there is never a destination, execution size will be 562 * taken from src0: 563 */ 564void brw_CMP(struct brw_codegen *p, 565 struct brw_reg dest, 566 unsigned conditional, 567 struct brw_reg src0, 568 struct brw_reg src1); 569 570void 571brw_untyped_atomic(struct brw_codegen *p, 572 struct brw_reg dst, 573 struct brw_reg payload, 574 struct brw_reg surface, 575 unsigned atomic_op, 576 unsigned msg_length, 577 bool response_expected, 578 bool header_present); 579 580void 581brw_untyped_atomic_float(struct brw_codegen *p, 582 struct brw_reg dst, 583 struct brw_reg payload, 584 struct brw_reg surface, 585 unsigned atomic_op, 586 unsigned msg_length, 587 bool response_expected, 588 bool header_present); 589 590 591void 592brw_untyped_surface_read(struct brw_codegen *p, 593 struct brw_reg dst, 594 struct brw_reg payload, 595 struct brw_reg surface, 596 unsigned msg_length, 597 unsigned num_channels); 598 599void 600brw_untyped_surface_write(struct brw_codegen *p, 601 struct brw_reg payload, 602 struct brw_reg surface, 603 unsigned msg_length, 604 unsigned num_channels, 605 bool header_present); 606 607void 608brw_typed_atomic(struct brw_codegen *p, 609 struct brw_reg dst, 610 struct brw_reg payload, 611 struct brw_reg surface, 612 unsigned atomic_op, 613 unsigned msg_length, 614 bool response_expected, 615 bool header_present); 616 617void 618brw_typed_surface_read(struct brw_codegen *p, 619 struct brw_reg dst, 620 struct brw_reg payload, 621 struct brw_reg surface, 622 unsigned msg_length, 623 unsigned num_channels, 624 bool header_present); 625 626void 627brw_typed_surface_write(struct brw_codegen *p, 628 struct brw_reg payload, 629 struct brw_reg surface, 630 unsigned msg_length, 631 unsigned num_channels, 632 bool header_present); 633 634void 635brw_byte_scattered_read(struct brw_codegen *p, 636 struct brw_reg dst, 637 struct brw_reg payload, 638 struct brw_reg surface, 639 unsigned msg_length, 640 unsigned bit_size); 641 642void 643brw_byte_scattered_write(struct brw_codegen *p, 644 struct brw_reg payload, 645 struct brw_reg surface, 646 unsigned msg_length, 647 unsigned bit_size, 648 bool header_present); 649 650void 651brw_memory_fence(struct brw_codegen *p, 652 struct brw_reg dst, 653 enum opcode send_op); 654 655void 656brw_pixel_interpolator_query(struct brw_codegen *p, 657 struct brw_reg dest, 658 struct brw_reg mrf, 659 bool noperspective, 660 unsigned mode, 661 struct brw_reg data, 662 unsigned msg_length, 663 unsigned response_length); 664 665void 666brw_find_live_channel(struct brw_codegen *p, 667 struct brw_reg dst, 668 struct brw_reg mask); 669 670void 671brw_broadcast(struct brw_codegen *p, 672 struct brw_reg dst, 673 struct brw_reg src, 674 struct brw_reg idx); 675 676void 677brw_rounding_mode(struct brw_codegen *p, 678 enum brw_rnd_mode mode); 679 680/*********************************************************************** 681 * brw_eu_util.c: 682 */ 683 684void brw_copy_indirect_to_indirect(struct brw_codegen *p, 685 struct brw_indirect dst_ptr, 686 struct brw_indirect src_ptr, 687 unsigned count); 688 689void brw_copy_from_indirect(struct brw_codegen *p, 690 struct brw_reg dst, 691 struct brw_indirect ptr, 692 unsigned count); 693 694void brw_copy4(struct brw_codegen *p, 695 struct brw_reg dst, 696 struct brw_reg src, 697 unsigned count); 698 699void brw_copy8(struct brw_codegen *p, 700 struct brw_reg dst, 701 struct brw_reg src, 702 unsigned count); 703 704void brw_math_invert( struct brw_codegen *p, 705 struct brw_reg dst, 706 struct brw_reg src); 707 708void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg); 709 710void brw_set_desc_ex(struct brw_codegen *p, brw_inst *insn, 711 unsigned desc, unsigned ex_desc); 712 713static inline void 714brw_set_desc(struct brw_codegen *p, brw_inst *insn, unsigned desc) 715{ 716 brw_set_desc_ex(p, insn, desc, 0); 717} 718 719void brw_set_uip_jip(struct brw_codegen *p, int start_offset); 720 721enum brw_conditional_mod brw_negate_cmod(uint32_t cmod); 722enum brw_conditional_mod brw_swap_cmod(uint32_t cmod); 723 724/* brw_eu_compact.c */ 725void brw_init_compaction_tables(const struct gen_device_info *devinfo); 726void brw_compact_instructions(struct brw_codegen *p, int start_offset, 727 struct disasm_info *disasm); 728void brw_uncompact_instruction(const struct gen_device_info *devinfo, 729 brw_inst *dst, brw_compact_inst *src); 730bool brw_try_compact_instruction(const struct gen_device_info *devinfo, 731 brw_compact_inst *dst, const brw_inst *src); 732 733void brw_debug_compact_uncompact(const struct gen_device_info *devinfo, 734 brw_inst *orig, brw_inst *uncompacted); 735 736/* brw_eu_validate.c */ 737bool brw_validate_instructions(const struct gen_device_info *devinfo, 738 const void *assembly, int start_offset, int end_offset, 739 struct disasm_info *disasm); 740 741static inline int 742next_offset(const struct gen_device_info *devinfo, void *store, int offset) 743{ 744 brw_inst *insn = (brw_inst *)((char *)store + offset); 745 746 if (brw_inst_cmpt_control(devinfo, insn)) 747 return offset + 8; 748 else 749 return offset + 16; 750} 751 752struct opcode_desc { 753 /* The union is an implementation detail used by brw_opcode_desc() to handle 754 * opcodes that have been reused for different instructions across hardware 755 * generations. 756 * 757 * The gens field acts as a tag. If it is non-zero, name points to a string 758 * containing the instruction mnemonic. If it is zero, the table field is 759 * valid and either points to a secondary opcode_desc table with 'size' 760 * elements or is NULL and no such instruction exists for the opcode. 761 */ 762 union { 763 struct { 764 char *name; 765 int nsrc; 766 }; 767 struct { 768 const struct opcode_desc *table; 769 unsigned size; 770 }; 771 }; 772 int ndst; 773 int gens; 774}; 775 776const struct opcode_desc * 777brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode); 778 779static inline bool 780is_3src(const struct gen_device_info *devinfo, enum opcode opcode) 781{ 782 const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode); 783 return desc && desc->nsrc == 3; 784} 785 786/** Maximum SEND message length */ 787#define BRW_MAX_MSG_LENGTH 15 788 789/** First MRF register used by pull loads */ 790#define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13) 791 792/** First MRF register used by spills */ 793#define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13) 794 795#ifdef __cplusplus 796} 797#endif 798 799#endif 800