101e04c3fSmrg/*
201e04c3fSmrg * Copyright © 2018 Intel Corporation
301e04c3fSmrg *
401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
501e04c3fSmrg * copy of this software and associated documentation files (the "Software"),
601e04c3fSmrg * to deal in the Software without restriction, including without limitation
701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the
901e04c3fSmrg * Software is furnished to do so, subject to the following conditions:
1001e04c3fSmrg *
1101e04c3fSmrg * The above copyright notice and this permission notice (including the next
1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the
1301e04c3fSmrg * Software.
1401e04c3fSmrg *
1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2101e04c3fSmrg * IN THE SOFTWARE.
2201e04c3fSmrg *
2301e04c3fSmrg */
2401e04c3fSmrg
2501e04c3fSmrg#ifndef INTEL_AUB_READ
2601e04c3fSmrg#define INTEL_AUB_READ
2701e04c3fSmrg
2801e04c3fSmrg#include <stdint.h>
2901e04c3fSmrg
307ec681f3Smrg#include "dev/intel_device_info.h"
319f464c52Smaya#include "drm-uapi/i915_drm.h"
3201e04c3fSmrg
3301e04c3fSmrg#ifdef __cplusplus
3401e04c3fSmrgextern "C" {
3501e04c3fSmrg#endif
3601e04c3fSmrg
3701e04c3fSmrgstruct aub_read {
3801e04c3fSmrg   /* Caller's data */
3901e04c3fSmrg   void *user_data;
4001e04c3fSmrg
4101e04c3fSmrg   void (*error)(void *user_data, const void *aub_data, const char *msg);
4201e04c3fSmrg
4301e04c3fSmrg   void (*info)(void *user_data, int pci_id, const char *app_name);
4401e04c3fSmrg
4501e04c3fSmrg   void (*local_write)(void *user_data, uint64_t phys_addr, const void *data, uint32_t data_len);
4601e04c3fSmrg   void (*phys_write)(void *user_data, uint64_t phys_addr, const void *data, uint32_t data_len);
4701e04c3fSmrg   void (*ggtt_write)(void *user_data, uint64_t phys_addr, const void *data, uint32_t data_len);
4801e04c3fSmrg   void (*ggtt_entry_write)(void *user_data, uint64_t phys_addr,
4901e04c3fSmrg                            const void *data, uint32_t data_len);
5001e04c3fSmrg
5101e04c3fSmrg   void (*reg_write)(void *user_data, uint32_t reg_offset, uint32_t reg_value);
5201e04c3fSmrg
539f464c52Smaya   void (*ring_write)(void *user_data, enum drm_i915_gem_engine_class engine,
5401e04c3fSmrg                      const void *data, uint32_t data_len);
559f464c52Smaya   void (*execlist_write)(void *user_data, enum drm_i915_gem_engine_class engine,
5601e04c3fSmrg                          uint64_t context_descriptor);
5701e04c3fSmrg
5801e04c3fSmrg   /* Reader's data */
5901e04c3fSmrg   uint32_t render_elsp[4];
6001e04c3fSmrg   int render_elsp_index;
6101e04c3fSmrg   uint32_t video_elsp[4];
6201e04c3fSmrg   int video_elsp_index;
6301e04c3fSmrg   uint32_t blitter_elsp[4];
6401e04c3fSmrg   int blitter_elsp_index;
6501e04c3fSmrg
667ec681f3Smrg   struct intel_device_info devinfo;
6701e04c3fSmrg};
6801e04c3fSmrg
6901e04c3fSmrgint aub_read_command(struct aub_read *read, const void *data, uint32_t data_len);
7001e04c3fSmrg
7101e04c3fSmrg#ifdef __cplusplus
7201e04c3fSmrg}
7301e04c3fSmrg#endif
7401e04c3fSmrg
7501e04c3fSmrg#endif /* INTEL_AUB_READ */
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