14a49301eSmrg/**************************************************************************
27ec681f3Smrg *
3af69d88dSmrg * Copyright 2007 VMware, Inc.
44a49301eSmrg * All Rights Reserved.
57ec681f3Smrg *
64a49301eSmrg * Permission is hereby granted, free of charge, to any person obtaining a
74a49301eSmrg * copy of this software and associated documentation files (the
84a49301eSmrg * "Software"), to deal in the Software without restriction, including
94a49301eSmrg * without limitation the rights to use, copy, modify, merge, publish,
104a49301eSmrg * distribute, sub license, and/or sell copies of the Software, and to
114a49301eSmrg * permit persons to whom the Software is furnished to do so, subject to
124a49301eSmrg * the following conditions:
137ec681f3Smrg *
144a49301eSmrg * The above copyright notice and this permission notice (including the
154a49301eSmrg * next paragraph) shall be included in all copies or substantial portions
164a49301eSmrg * of the Software.
177ec681f3Smrg *
184a49301eSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
194a49301eSmrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
204a49301eSmrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21af69d88dSmrg * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
224a49301eSmrg * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
234a49301eSmrg * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
244a49301eSmrg * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
257ec681f3Smrg *
264a49301eSmrg **************************************************************************/
274a49301eSmrg /*
284a49301eSmrg  * Authors:
29af69d88dSmrg  *   Keith Whitwell <keithw@vmware.com>
304a49301eSmrg  *   Brian Paul
314a49301eSmrg  */
324a49301eSmrg
334a49301eSmrg
3401e04c3fSmrg#include "main/errors.h"
357ec681f3Smrg
363464ebd5Sriastradh#include "main/hash.h"
374a49301eSmrg#include "main/mtypes.h"
383464ebd5Sriastradh#include "program/prog_parameter.h"
393464ebd5Sriastradh#include "program/prog_print.h"
40b9abf16eSmaya#include "program/prog_to_nir.h"
413464ebd5Sriastradh#include "program/programopt.h"
424a49301eSmrg
437ec681f3Smrg#include "compiler/glsl/gl_nir.h"
4401e04c3fSmrg#include "compiler/nir/nir.h"
457ec681f3Smrg#include "compiler/nir/nir_serialize.h"
467ec681f3Smrg#include "draw/draw_context.h"
4701e04c3fSmrg
484a49301eSmrg#include "pipe/p_context.h"
494a49301eSmrg#include "pipe/p_defines.h"
504a49301eSmrg#include "pipe/p_shader_tokens.h"
514a49301eSmrg#include "draw/draw_context.h"
524a49301eSmrg#include "tgsi/tgsi_dump.h"
5301e04c3fSmrg#include "tgsi/tgsi_emulate.h"
5401e04c3fSmrg#include "tgsi/tgsi_parse.h"
553464ebd5Sriastradh#include "tgsi/tgsi_ureg.h"
567ec681f3Smrg#include "nir/nir_to_tgsi.h"
577ec681f3Smrg
587ec681f3Smrg#include "util/u_memory.h"
594a49301eSmrg
604a49301eSmrg#include "st_debug.h"
613464ebd5Sriastradh#include "st_cb_bitmap.h"
623464ebd5Sriastradh#include "st_cb_drawpixels.h"
634a49301eSmrg#include "st_context.h"
647ec681f3Smrg#include "st_tgsi_lower_depth_clamp.h"
6501e04c3fSmrg#include "st_tgsi_lower_yuv.h"
664a49301eSmrg#include "st_program.h"
677ec681f3Smrg#include "st_atifs_to_nir.h"
6801e04c3fSmrg#include "st_nir.h"
6901e04c3fSmrg#include "st_shader_cache.h"
707ec681f3Smrg#include "st_util.h"
714a49301eSmrg#include "cso_cache/cso_context.h"
724a49301eSmrg
734a49301eSmrg
747ec681f3Smrgstatic void
757ec681f3Smrgdestroy_program_variants(struct st_context *st, struct gl_program *target);
76cdc920a0Smrg
7701e04c3fSmrgstatic void
7801e04c3fSmrgset_affected_state_flags(uint64_t *states,
7901e04c3fSmrg                         struct gl_program *prog,
8001e04c3fSmrg                         uint64_t new_constants,
8101e04c3fSmrg                         uint64_t new_sampler_views,
8201e04c3fSmrg                         uint64_t new_samplers,
8301e04c3fSmrg                         uint64_t new_images,
8401e04c3fSmrg                         uint64_t new_ubos,
8501e04c3fSmrg                         uint64_t new_ssbos,
8601e04c3fSmrg                         uint64_t new_atomics)
8701e04c3fSmrg{
8801e04c3fSmrg   if (prog->Parameters->NumParameters)
8901e04c3fSmrg      *states |= new_constants;
9001e04c3fSmrg
9101e04c3fSmrg   if (prog->info.num_textures)
9201e04c3fSmrg      *states |= new_sampler_views | new_samplers;
9301e04c3fSmrg
9401e04c3fSmrg   if (prog->info.num_images)
9501e04c3fSmrg      *states |= new_images;
9601e04c3fSmrg
9701e04c3fSmrg   if (prog->info.num_ubos)
9801e04c3fSmrg      *states |= new_ubos;
9901e04c3fSmrg
10001e04c3fSmrg   if (prog->info.num_ssbos)
10101e04c3fSmrg      *states |= new_ssbos;
10201e04c3fSmrg
10301e04c3fSmrg   if (prog->info.num_abos)
10401e04c3fSmrg      *states |= new_atomics;
10501e04c3fSmrg}
10601e04c3fSmrg
10701e04c3fSmrg/**
10801e04c3fSmrg * This determines which states will be updated when the shader is bound.
10901e04c3fSmrg */
11001e04c3fSmrgvoid
11101e04c3fSmrgst_set_prog_affected_state_flags(struct gl_program *prog)
11201e04c3fSmrg{
11301e04c3fSmrg   uint64_t *states;
11401e04c3fSmrg
11501e04c3fSmrg   switch (prog->info.stage) {
11601e04c3fSmrg   case MESA_SHADER_VERTEX:
1177ec681f3Smrg      states = &((struct st_program*)prog)->affected_states;
11801e04c3fSmrg
11901e04c3fSmrg      *states = ST_NEW_VS_STATE |
12001e04c3fSmrg                ST_NEW_RASTERIZER |
12101e04c3fSmrg                ST_NEW_VERTEX_ARRAYS;
12201e04c3fSmrg
12301e04c3fSmrg      set_affected_state_flags(states, prog,
12401e04c3fSmrg                               ST_NEW_VS_CONSTANTS,
12501e04c3fSmrg                               ST_NEW_VS_SAMPLER_VIEWS,
12601e04c3fSmrg                               ST_NEW_VS_SAMPLERS,
12701e04c3fSmrg                               ST_NEW_VS_IMAGES,
12801e04c3fSmrg                               ST_NEW_VS_UBOS,
12901e04c3fSmrg                               ST_NEW_VS_SSBOS,
13001e04c3fSmrg                               ST_NEW_VS_ATOMICS);
13101e04c3fSmrg      break;
13201e04c3fSmrg
13301e04c3fSmrg   case MESA_SHADER_TESS_CTRL:
1347ec681f3Smrg      states = &(st_program(prog))->affected_states;
13501e04c3fSmrg
13601e04c3fSmrg      *states = ST_NEW_TCS_STATE;
13701e04c3fSmrg
13801e04c3fSmrg      set_affected_state_flags(states, prog,
13901e04c3fSmrg                               ST_NEW_TCS_CONSTANTS,
14001e04c3fSmrg                               ST_NEW_TCS_SAMPLER_VIEWS,
14101e04c3fSmrg                               ST_NEW_TCS_SAMPLERS,
14201e04c3fSmrg                               ST_NEW_TCS_IMAGES,
14301e04c3fSmrg                               ST_NEW_TCS_UBOS,
14401e04c3fSmrg                               ST_NEW_TCS_SSBOS,
14501e04c3fSmrg                               ST_NEW_TCS_ATOMICS);
14601e04c3fSmrg      break;
14701e04c3fSmrg
14801e04c3fSmrg   case MESA_SHADER_TESS_EVAL:
1497ec681f3Smrg      states = &(st_program(prog))->affected_states;
15001e04c3fSmrg
15101e04c3fSmrg      *states = ST_NEW_TES_STATE |
15201e04c3fSmrg                ST_NEW_RASTERIZER;
15301e04c3fSmrg
15401e04c3fSmrg      set_affected_state_flags(states, prog,
15501e04c3fSmrg                               ST_NEW_TES_CONSTANTS,
15601e04c3fSmrg                               ST_NEW_TES_SAMPLER_VIEWS,
15701e04c3fSmrg                               ST_NEW_TES_SAMPLERS,
15801e04c3fSmrg                               ST_NEW_TES_IMAGES,
15901e04c3fSmrg                               ST_NEW_TES_UBOS,
16001e04c3fSmrg                               ST_NEW_TES_SSBOS,
16101e04c3fSmrg                               ST_NEW_TES_ATOMICS);
16201e04c3fSmrg      break;
16301e04c3fSmrg
16401e04c3fSmrg   case MESA_SHADER_GEOMETRY:
1657ec681f3Smrg      states = &(st_program(prog))->affected_states;
16601e04c3fSmrg
16701e04c3fSmrg      *states = ST_NEW_GS_STATE |
16801e04c3fSmrg                ST_NEW_RASTERIZER;
16901e04c3fSmrg
17001e04c3fSmrg      set_affected_state_flags(states, prog,
17101e04c3fSmrg                               ST_NEW_GS_CONSTANTS,
17201e04c3fSmrg                               ST_NEW_GS_SAMPLER_VIEWS,
17301e04c3fSmrg                               ST_NEW_GS_SAMPLERS,
17401e04c3fSmrg                               ST_NEW_GS_IMAGES,
17501e04c3fSmrg                               ST_NEW_GS_UBOS,
17601e04c3fSmrg                               ST_NEW_GS_SSBOS,
17701e04c3fSmrg                               ST_NEW_GS_ATOMICS);
17801e04c3fSmrg      break;
17901e04c3fSmrg
18001e04c3fSmrg   case MESA_SHADER_FRAGMENT:
1817ec681f3Smrg      states = &((struct st_program*)prog)->affected_states;
18201e04c3fSmrg
18301e04c3fSmrg      /* gl_FragCoord and glDrawPixels always use constants. */
18401e04c3fSmrg      *states = ST_NEW_FS_STATE |
18501e04c3fSmrg                ST_NEW_SAMPLE_SHADING |
18601e04c3fSmrg                ST_NEW_FS_CONSTANTS;
18701e04c3fSmrg
18801e04c3fSmrg      set_affected_state_flags(states, prog,
18901e04c3fSmrg                               ST_NEW_FS_CONSTANTS,
19001e04c3fSmrg                               ST_NEW_FS_SAMPLER_VIEWS,
19101e04c3fSmrg                               ST_NEW_FS_SAMPLERS,
19201e04c3fSmrg                               ST_NEW_FS_IMAGES,
19301e04c3fSmrg                               ST_NEW_FS_UBOS,
19401e04c3fSmrg                               ST_NEW_FS_SSBOS,
19501e04c3fSmrg                               ST_NEW_FS_ATOMICS);
19601e04c3fSmrg      break;
19701e04c3fSmrg
19801e04c3fSmrg   case MESA_SHADER_COMPUTE:
1997ec681f3Smrg      states = &((struct st_program*)prog)->affected_states;
20001e04c3fSmrg
20101e04c3fSmrg      *states = ST_NEW_CS_STATE;
20201e04c3fSmrg
20301e04c3fSmrg      set_affected_state_flags(states, prog,
20401e04c3fSmrg                               ST_NEW_CS_CONSTANTS,
20501e04c3fSmrg                               ST_NEW_CS_SAMPLER_VIEWS,
20601e04c3fSmrg                               ST_NEW_CS_SAMPLERS,
20701e04c3fSmrg                               ST_NEW_CS_IMAGES,
20801e04c3fSmrg                               ST_NEW_CS_UBOS,
20901e04c3fSmrg                               ST_NEW_CS_SSBOS,
21001e04c3fSmrg                               ST_NEW_CS_ATOMICS);
21101e04c3fSmrg      break;
21201e04c3fSmrg
21301e04c3fSmrg   default:
21401e04c3fSmrg      unreachable("unhandled shader stage");
21501e04c3fSmrg   }
21601e04c3fSmrg}
21701e04c3fSmrg
2187ec681f3Smrg
2197ec681f3Smrg/**
2207ec681f3Smrg * Delete a shader variant.  Note the caller must unlink the variant from
2217ec681f3Smrg * the linked list.
2227ec681f3Smrg */
2237ec681f3Smrgstatic void
2247ec681f3Smrgdelete_variant(struct st_context *st, struct st_variant *v, GLenum target)
2257ec681f3Smrg{
2267ec681f3Smrg   if (v->driver_shader) {
2277ec681f3Smrg      if (target == GL_VERTEX_PROGRAM_ARB &&
2287ec681f3Smrg          ((struct st_common_variant*)v)->key.is_draw_shader) {
2297ec681f3Smrg         /* Draw shader. */
2307ec681f3Smrg         draw_delete_vertex_shader(st->draw, v->driver_shader);
2317ec681f3Smrg      } else if (st->has_shareable_shaders || v->st == st) {
2327ec681f3Smrg         /* The shader's context matches the calling context, or we
2337ec681f3Smrg          * don't care.
2347ec681f3Smrg          */
2357ec681f3Smrg         switch (target) {
2367ec681f3Smrg         case GL_VERTEX_PROGRAM_ARB:
2377ec681f3Smrg            st->pipe->delete_vs_state(st->pipe, v->driver_shader);
2387ec681f3Smrg            break;
2397ec681f3Smrg         case GL_TESS_CONTROL_PROGRAM_NV:
2407ec681f3Smrg            st->pipe->delete_tcs_state(st->pipe, v->driver_shader);
2417ec681f3Smrg            break;
2427ec681f3Smrg         case GL_TESS_EVALUATION_PROGRAM_NV:
2437ec681f3Smrg            st->pipe->delete_tes_state(st->pipe, v->driver_shader);
2447ec681f3Smrg            break;
2457ec681f3Smrg         case GL_GEOMETRY_PROGRAM_NV:
2467ec681f3Smrg            st->pipe->delete_gs_state(st->pipe, v->driver_shader);
2477ec681f3Smrg            break;
2487ec681f3Smrg         case GL_FRAGMENT_PROGRAM_ARB:
2497ec681f3Smrg            st->pipe->delete_fs_state(st->pipe, v->driver_shader);
2507ec681f3Smrg            break;
2517ec681f3Smrg         case GL_COMPUTE_PROGRAM_NV:
2527ec681f3Smrg            st->pipe->delete_compute_state(st->pipe, v->driver_shader);
2537ec681f3Smrg            break;
2547ec681f3Smrg         default:
2557ec681f3Smrg            unreachable("bad shader type in delete_basic_variant");
2567ec681f3Smrg         }
2577ec681f3Smrg      } else {
2587ec681f3Smrg         /* We can't delete a shader with a context different from the one
2597ec681f3Smrg          * that created it.  Add it to the creating context's zombie list.
2607ec681f3Smrg          */
2617ec681f3Smrg         enum pipe_shader_type type =
2627ec681f3Smrg            pipe_shader_type_from_mesa(_mesa_program_enum_to_shader_stage(target));
2637ec681f3Smrg
2647ec681f3Smrg         st_save_zombie_shader(v->st, type, v->driver_shader);
2657ec681f3Smrg      }
2667ec681f3Smrg   }
2677ec681f3Smrg
2687ec681f3Smrg   free(v);
2697ec681f3Smrg}
2707ec681f3Smrg
271b9abf16eSmayastatic void
2727ec681f3Smrgst_unbind_program(struct st_context *st, struct st_program *p)
2737ec681f3Smrg{
2747ec681f3Smrg   /* Unbind the shader in cso_context and re-bind in st/mesa. */
2757ec681f3Smrg   switch (p->Base.info.stage) {
2767ec681f3Smrg   case MESA_SHADER_VERTEX:
2777ec681f3Smrg      cso_set_vertex_shader_handle(st->cso_context, NULL);
2787ec681f3Smrg      st->dirty |= ST_NEW_VS_STATE;
2797ec681f3Smrg      break;
2807ec681f3Smrg   case MESA_SHADER_TESS_CTRL:
2817ec681f3Smrg      cso_set_tessctrl_shader_handle(st->cso_context, NULL);
2827ec681f3Smrg      st->dirty |= ST_NEW_TCS_STATE;
2837ec681f3Smrg      break;
2847ec681f3Smrg   case MESA_SHADER_TESS_EVAL:
2857ec681f3Smrg      cso_set_tesseval_shader_handle(st->cso_context, NULL);
2867ec681f3Smrg      st->dirty |= ST_NEW_TES_STATE;
2877ec681f3Smrg      break;
2887ec681f3Smrg   case MESA_SHADER_GEOMETRY:
2897ec681f3Smrg      cso_set_geometry_shader_handle(st->cso_context, NULL);
2907ec681f3Smrg      st->dirty |= ST_NEW_GS_STATE;
2917ec681f3Smrg      break;
2927ec681f3Smrg   case MESA_SHADER_FRAGMENT:
2937ec681f3Smrg      cso_set_fragment_shader_handle(st->cso_context, NULL);
2947ec681f3Smrg      st->dirty |= ST_NEW_FS_STATE;
2957ec681f3Smrg      break;
2967ec681f3Smrg   case MESA_SHADER_COMPUTE:
2977ec681f3Smrg      cso_set_compute_shader_handle(st->cso_context, NULL);
2987ec681f3Smrg      st->dirty |= ST_NEW_CS_STATE;
2997ec681f3Smrg      break;
3007ec681f3Smrg   default:
3017ec681f3Smrg      unreachable("invalid shader type");
3027ec681f3Smrg   }
3037ec681f3Smrg}
3047ec681f3Smrg
3057ec681f3Smrg/**
3067ec681f3Smrg * Free all basic program variants.
3077ec681f3Smrg */
3087ec681f3Smrgvoid
3097ec681f3Smrgst_release_variants(struct st_context *st, struct st_program *p)
310b9abf16eSmaya{
3117ec681f3Smrg   struct st_variant *v;
3127ec681f3Smrg
3137ec681f3Smrg   /* If we are releasing shaders, re-bind them, because we don't
3147ec681f3Smrg    * know which shaders are bound in the driver.
3157ec681f3Smrg    */
3167ec681f3Smrg   if (p->variants)
3177ec681f3Smrg      st_unbind_program(st, p);
3187ec681f3Smrg
3197ec681f3Smrg   for (v = p->variants; v; ) {
3207ec681f3Smrg      struct st_variant *next = v->next;
3217ec681f3Smrg      delete_variant(st, v, p->Base.Target);
3227ec681f3Smrg      v = next;
3237ec681f3Smrg   }
3247ec681f3Smrg
3257ec681f3Smrg   p->variants = NULL;
3267ec681f3Smrg
3277ec681f3Smrg   if (p->state.tokens) {
3287ec681f3Smrg      ureg_free_tokens(p->state.tokens);
3297ec681f3Smrg      p->state.tokens = NULL;
3307ec681f3Smrg   }
331b9abf16eSmaya
332b9abf16eSmaya   /* Note: Any setup of ->ir.nir that has had pipe->create_*_state called on
333b9abf16eSmaya    * it has resulted in the driver taking ownership of the NIR.  Those
334b9abf16eSmaya    * callers should be NULLing out the nir field in any pipe_shader_state
335b9abf16eSmaya    * that might have this called in order to indicate that.
336b9abf16eSmaya    *
337b9abf16eSmaya    * GLSL IR and ARB programs will have set gl_program->nir to the same
338b9abf16eSmaya    * shader as ir->ir.nir, so it will be freed by _mesa_delete_program().
339b9abf16eSmaya    */
340b9abf16eSmaya}
341b9abf16eSmaya
3423464ebd5Sriastradh/**
3437ec681f3Smrg * Free all basic program variants and unref program.
3443464ebd5Sriastradh */
3457ec681f3Smrgvoid
3467ec681f3Smrgst_release_program(struct st_context *st, struct st_program **p)
3473464ebd5Sriastradh{
3487ec681f3Smrg   if (!*p)
3497ec681f3Smrg      return;
35001e04c3fSmrg
3517ec681f3Smrg   destroy_program_variants(st, &((*p)->Base));
3527ec681f3Smrg   st_reference_prog(st, p, NULL);
3533464ebd5Sriastradh}
3543464ebd5Sriastradh
355cdc920a0Smrgvoid
3567ec681f3Smrgst_finalize_nir_before_variants(struct nir_shader *nir)
357cdc920a0Smrg{
3587ec681f3Smrg   NIR_PASS_V(nir, nir_split_var_copies);
3597ec681f3Smrg   NIR_PASS_V(nir, nir_lower_var_copies);
3607ec681f3Smrg   if (nir->options->lower_all_io_to_temps ||
3617ec681f3Smrg       nir->options->lower_all_io_to_elements ||
3627ec681f3Smrg       nir->info.stage == MESA_SHADER_VERTEX ||
3637ec681f3Smrg       nir->info.stage == MESA_SHADER_GEOMETRY) {
3647ec681f3Smrg      NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
3657ec681f3Smrg   } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
3667ec681f3Smrg      NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true);
3673464ebd5Sriastradh   }
368cdc920a0Smrg
3697ec681f3Smrg   /* st_nir_assign_vs_in_locations requires correct shader info. */
3707ec681f3Smrg   nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
37101e04c3fSmrg
3727ec681f3Smrg   st_nir_assign_vs_in_locations(nir);
3733464ebd5Sriastradh}
3743464ebd5Sriastradh
3753464ebd5Sriastradhstatic void
3767ec681f3Smrgst_prog_to_nir_postprocess(struct st_context *st, nir_shader *nir,
3777ec681f3Smrg                           struct gl_program *prog)
3783464ebd5Sriastradh{
3797ec681f3Smrg   struct pipe_screen *screen = st->screen;
3807ec681f3Smrg
3817ec681f3Smrg   NIR_PASS_V(nir, nir_lower_regs_to_ssa);
3827ec681f3Smrg   nir_validate_shader(nir, "after st/ptn lower_regs_to_ssa");
3837ec681f3Smrg
3847ec681f3Smrg   NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, prog, screen);
3857ec681f3Smrg   NIR_PASS_V(nir, nir_lower_system_values);
3867ec681f3Smrg   NIR_PASS_V(nir, nir_lower_compute_system_values, NULL);
3877ec681f3Smrg
3887ec681f3Smrg   /* Optimise NIR */
3897ec681f3Smrg   NIR_PASS_V(nir, nir_opt_constant_folding);
3907ec681f3Smrg   st_nir_opts(nir);
3917ec681f3Smrg   st_finalize_nir_before_variants(nir);
3927ec681f3Smrg
3937ec681f3Smrg   if (st->allow_st_finalize_nir_twice) {
3947ec681f3Smrg      char *msg = st_finalize_nir(st, prog, NULL, nir, true, true);
3957ec681f3Smrg      free(msg);
396b9abf16eSmaya   }
397b9abf16eSmaya
3987ec681f3Smrg   nir_validate_shader(nir, "after st/glsl finalize_nir");
3993464ebd5Sriastradh}
4003464ebd5Sriastradh
4013464ebd5Sriastradh/**
4027ec681f3Smrg * Translate ARB (asm) program to NIR
4033464ebd5Sriastradh */
4047ec681f3Smrgstatic nir_shader *
4057ec681f3Smrgst_translate_prog_to_nir(struct st_context *st, struct gl_program *prog,
4067ec681f3Smrg                         gl_shader_stage stage)
4073464ebd5Sriastradh{
4087ec681f3Smrg   const struct nir_shader_compiler_options *options =
4097ec681f3Smrg      st_get_nir_compiler_options(st, prog->info.stage);
4103464ebd5Sriastradh
4117ec681f3Smrg   /* Translate to NIR */
4127ec681f3Smrg   nir_shader *nir = prog_to_nir(prog, options);
4133464ebd5Sriastradh
4147ec681f3Smrg   st_prog_to_nir_postprocess(st, nir, prog);
41501e04c3fSmrg
4167ec681f3Smrg   return nir;
4173464ebd5Sriastradh}
4183464ebd5Sriastradh
4193464ebd5Sriastradh/**
4207ec681f3Smrg * Prepare st_vertex_program info.
4217ec681f3Smrg *
4227ec681f3Smrg * attrib_to_index is an optional mapping from a vertex attrib to a shader
4237ec681f3Smrg * input index.
4243464ebd5Sriastradh */
4257ec681f3Smrgvoid
4267ec681f3Smrgst_prepare_vertex_program(struct st_program *stp, uint8_t *out_attrib_to_index)
4273464ebd5Sriastradh{
4287ec681f3Smrg   struct st_vertex_program *stvp = (struct st_vertex_program *)stp;
4297ec681f3Smrg   uint8_t attrib_to_index[VERT_ATTRIB_MAX] = {0};
4307ec681f3Smrg
4317ec681f3Smrg   stvp->num_inputs = 0;
4327ec681f3Smrg   stvp->vert_attrib_mask = 0;
4337ec681f3Smrg   memset(stvp->result_to_output, ~0, sizeof(stvp->result_to_output));
4347ec681f3Smrg
4357ec681f3Smrg   /* Determine number of inputs, the mappings between VERT_ATTRIB_x
4367ec681f3Smrg    * and TGSI generic input indexes, plus input attrib semantic info.
4377ec681f3Smrg    */
4387ec681f3Smrg   for (unsigned attr = 0; attr < VERT_ATTRIB_MAX; attr++) {
4397ec681f3Smrg      if ((stp->Base.info.inputs_read & BITFIELD64_BIT(attr)) != 0) {
4407ec681f3Smrg         attrib_to_index[attr] = stvp->num_inputs;
4417ec681f3Smrg         stvp->vert_attrib_mask |= BITFIELD_BIT(attr);
4427ec681f3Smrg         stvp->num_inputs++;
44301e04c3fSmrg      }
44401e04c3fSmrg   }
44501e04c3fSmrg
4467ec681f3Smrg   /* pre-setup potentially unused edgeflag input */
4477ec681f3Smrg   attrib_to_index[VERT_ATTRIB_EDGEFLAG] = stvp->num_inputs;
448cdc920a0Smrg
4497ec681f3Smrg   /* Compute mapping of vertex program outputs to slots. */
4507ec681f3Smrg   unsigned num_outputs = 0;
4517ec681f3Smrg   for (unsigned attr = 0; attr < VARYING_SLOT_MAX; attr++) {
4527ec681f3Smrg      if (stp->Base.info.outputs_written & BITFIELD64_BIT(attr))
4537ec681f3Smrg         stvp->result_to_output[attr] = num_outputs++;
4547ec681f3Smrg   }
4557ec681f3Smrg   /* pre-setup potentially unused edgeflag output */
4567ec681f3Smrg   stvp->result_to_output[VARYING_SLOT_EDGE] = num_outputs;
4577ec681f3Smrg
4587ec681f3Smrg   if (out_attrib_to_index)
4597ec681f3Smrg      memcpy(out_attrib_to_index, attrib_to_index, sizeof(attrib_to_index));
4607ec681f3Smrg}
4613464ebd5Sriastradh
4623464ebd5Sriastradhvoid
4637ec681f3Smrgst_translate_stream_output_info(struct gl_program *prog)
4643464ebd5Sriastradh{
4657ec681f3Smrg   struct gl_transform_feedback_info *info = prog->sh.LinkedTransformFeedback;
4667ec681f3Smrg   if (!info)
4677ec681f3Smrg      return;
4683464ebd5Sriastradh
4697ec681f3Smrg   /* Determine the (default) output register mapping for each output. */
4707ec681f3Smrg   unsigned num_outputs = 0;
4717ec681f3Smrg   ubyte output_mapping[VARYING_SLOT_TESS_MAX];
4727ec681f3Smrg   memset(output_mapping, 0, sizeof(output_mapping));
4737ec681f3Smrg
4747ec681f3Smrg   for (unsigned attr = 0; attr < VARYING_SLOT_MAX; attr++) {
4757ec681f3Smrg      if (prog->info.outputs_written & BITFIELD64_BIT(attr))
4767ec681f3Smrg         output_mapping[attr] = num_outputs++;
477cdc920a0Smrg   }
478cdc920a0Smrg
4797ec681f3Smrg   /* Translate stream output info. */
4807ec681f3Smrg   struct pipe_stream_output_info *so_info =
4817ec681f3Smrg      &((struct st_program*)prog)->state.stream_output;
48201e04c3fSmrg
4837ec681f3Smrg   for (unsigned i = 0; i < info->NumOutputs; i++) {
4847ec681f3Smrg      so_info->output[i].register_index =
4857ec681f3Smrg         output_mapping[info->Outputs[i].OutputRegister];
4867ec681f3Smrg      so_info->output[i].start_component = info->Outputs[i].ComponentOffset;
4877ec681f3Smrg      so_info->output[i].num_components = info->Outputs[i].NumComponents;
4887ec681f3Smrg      so_info->output[i].output_buffer = info->Outputs[i].OutputBuffer;
4897ec681f3Smrg      so_info->output[i].dst_offset = info->Outputs[i].DstOffset;
4907ec681f3Smrg      so_info->output[i].stream = info->Outputs[i].StreamId;
4917ec681f3Smrg   }
492cdc920a0Smrg
4937ec681f3Smrg   for (unsigned i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
4947ec681f3Smrg      so_info->stride[i] = info->Buffers[i].Stride;
4957ec681f3Smrg   }
4967ec681f3Smrg   so_info->num_outputs = info->NumOutputs;
4977ec681f3Smrg}
498cdc920a0Smrg
49901e04c3fSmrg/**
5007ec681f3Smrg * Creates a driver shader from a NIR shader.  Takes ownership of the
5017ec681f3Smrg * passed nir_shader.
50201e04c3fSmrg */
5037ec681f3Smrgstruct pipe_shader_state *
5047ec681f3Smrgst_create_nir_shader(struct st_context *st, struct pipe_shader_state *state)
50501e04c3fSmrg{
5067ec681f3Smrg   struct pipe_context *pipe = st->pipe;
5077ec681f3Smrg   struct pipe_screen *screen = st->screen;
50801e04c3fSmrg
5097ec681f3Smrg   assert(state->type == PIPE_SHADER_IR_NIR);
5107ec681f3Smrg   nir_shader *nir = state->ir.nir;
5117ec681f3Smrg   gl_shader_stage stage = nir->info.stage;
5127ec681f3Smrg   enum pipe_shader_type sh = pipe_shader_type_from_mesa(stage);
5137ec681f3Smrg
5147ec681f3Smrg   if (ST_DEBUG & DEBUG_PRINT_IR) {
5157ec681f3Smrg      fprintf(stderr, "NIR before handing off to driver:\n");
5167ec681f3Smrg      nir_print_shader(nir, stderr);
51701e04c3fSmrg   }
51801e04c3fSmrg
5197ec681f3Smrg   if (PIPE_SHADER_IR_NIR !=
5207ec681f3Smrg       screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_PREFERRED_IR)) {
5217ec681f3Smrg      /* u_screen.c defaults to images as deref enabled for some reason (which
5227ec681f3Smrg       * is what radeonsi wants), but nir-to-tgsi requires lowered images.
5237ec681f3Smrg       */
5247ec681f3Smrg      if (screen->get_param(screen, PIPE_CAP_NIR_IMAGES_AS_DEREF))
5257ec681f3Smrg         NIR_PASS_V(nir, gl_nir_lower_images, false);
526cdc920a0Smrg
5277ec681f3Smrg      state->type = PIPE_SHADER_IR_TGSI;
5287ec681f3Smrg      state->tokens = nir_to_tgsi(nir, screen);
5297ec681f3Smrg
5307ec681f3Smrg      if (ST_DEBUG & DEBUG_PRINT_IR) {
5317ec681f3Smrg         fprintf(stderr, "TGSI for driver after nir-to-tgsi:\n");
5327ec681f3Smrg         tgsi_dump(state->tokens, 0);
5337ec681f3Smrg         fprintf(stderr, "\n");
53401e04c3fSmrg      }
53501e04c3fSmrg   }
536b9abf16eSmaya
5377ec681f3Smrg   struct pipe_shader_state *shader;
5387ec681f3Smrg   switch (stage) {
5397ec681f3Smrg   case MESA_SHADER_VERTEX:
5407ec681f3Smrg      shader = pipe->create_vs_state(pipe, state);
5417ec681f3Smrg      break;
5427ec681f3Smrg   case MESA_SHADER_TESS_CTRL:
5437ec681f3Smrg      shader = pipe->create_tcs_state(pipe, state);
5447ec681f3Smrg      break;
5457ec681f3Smrg   case MESA_SHADER_TESS_EVAL:
5467ec681f3Smrg      shader = pipe->create_tes_state(pipe, state);
5477ec681f3Smrg      break;
5487ec681f3Smrg   case MESA_SHADER_GEOMETRY:
5497ec681f3Smrg      shader = pipe->create_gs_state(pipe, state);
5507ec681f3Smrg      break;
5517ec681f3Smrg   case MESA_SHADER_FRAGMENT:
5527ec681f3Smrg      shader = pipe->create_fs_state(pipe, state);
5537ec681f3Smrg      break;
5547ec681f3Smrg   case MESA_SHADER_COMPUTE: {
5557ec681f3Smrg      struct pipe_compute_state cs = {0};
5567ec681f3Smrg      cs.ir_type = state->type;
5577ec681f3Smrg      cs.req_local_mem = nir->info.shared_size;
558b9abf16eSmaya
5597ec681f3Smrg      if (state->type == PIPE_SHADER_IR_NIR)
5607ec681f3Smrg         cs.prog = state->ir.nir;
5617ec681f3Smrg      else
5627ec681f3Smrg         cs.prog = state->tokens;
563b9abf16eSmaya
5647ec681f3Smrg      shader = pipe->create_compute_state(pipe, &cs);
5657ec681f3Smrg      break;
5667ec681f3Smrg   }
5677ec681f3Smrg   default:
5687ec681f3Smrg      unreachable("unsupported shader stage");
5697ec681f3Smrg      return NULL;
5707ec681f3Smrg   }
571b9abf16eSmaya
5727ec681f3Smrg   if (state->type == PIPE_SHADER_IR_TGSI)
5737ec681f3Smrg      tgsi_free_tokens(state->tokens);
574b9abf16eSmaya
5757ec681f3Smrg   return shader;
576b9abf16eSmaya}
577b9abf16eSmaya
5784a49301eSmrg/**
57901e04c3fSmrg * Translate a vertex program.
5804a49301eSmrg */
58101e04c3fSmrgbool
58201e04c3fSmrgst_translate_vertex_program(struct st_context *st,
5837ec681f3Smrg                            struct st_program *stp)
5844a49301eSmrg{
58501e04c3fSmrg   struct ureg_program *ureg;
58601e04c3fSmrg   enum pipe_error error;
58701e04c3fSmrg   unsigned num_outputs = 0;
58801e04c3fSmrg   unsigned attr;
58901e04c3fSmrg   ubyte output_semantic_name[VARYING_SLOT_MAX] = {0};
59001e04c3fSmrg   ubyte output_semantic_index[VARYING_SLOT_MAX] = {0};
5914a49301eSmrg
5927ec681f3Smrg   if (stp->Base.arb.IsPositionInvariant)
5937ec681f3Smrg      _mesa_insert_mvp_code(st->ctx, &stp->Base);
5944a49301eSmrg
5957ec681f3Smrg   /* ARB_vp: */
5967ec681f3Smrg   if (!stp->glsl_to_tgsi) {
5977ec681f3Smrg      _mesa_remove_output_reads(&stp->Base, PROGRAM_OUTPUT);
5984a49301eSmrg
5997ec681f3Smrg      /* This determines which states will be updated when the assembly
6007ec681f3Smrg       * shader is bound.
6017ec681f3Smrg       */
6027ec681f3Smrg      stp->affected_states = ST_NEW_VS_STATE |
6037ec681f3Smrg                              ST_NEW_RASTERIZER |
6047ec681f3Smrg                              ST_NEW_VERTEX_ARRAYS;
6057ec681f3Smrg
6067ec681f3Smrg      if (stp->Base.Parameters->NumParameters)
6077ec681f3Smrg         stp->affected_states |= ST_NEW_VS_CONSTANTS;
6087ec681f3Smrg
6097ec681f3Smrg      if (stp->Base.nir)
6107ec681f3Smrg         ralloc_free(stp->Base.nir);
6117ec681f3Smrg
6127ec681f3Smrg      if (stp->serialized_nir) {
6137ec681f3Smrg         free(stp->serialized_nir);
6147ec681f3Smrg         stp->serialized_nir = NULL;
6154a49301eSmrg      }
6167ec681f3Smrg
6177ec681f3Smrg      stp->state.type = PIPE_SHADER_IR_NIR;
6187ec681f3Smrg      stp->Base.nir = st_translate_prog_to_nir(st, &stp->Base,
6197ec681f3Smrg                                               MESA_SHADER_VERTEX);
6207ec681f3Smrg      stp->Base.info = stp->Base.nir->info;
6217ec681f3Smrg
6227ec681f3Smrg      st_prepare_vertex_program(stp, NULL);
6237ec681f3Smrg      return true;
6244a49301eSmrg   }
6254a49301eSmrg
6267ec681f3Smrg   uint8_t input_to_index[VERT_ATTRIB_MAX];
6277ec681f3Smrg   st_prepare_vertex_program(stp, input_to_index);
6287ec681f3Smrg
6297ec681f3Smrg   /* Get semantic names and indices. */
630af69d88dSmrg   for (attr = 0; attr < VARYING_SLOT_MAX; attr++) {
6317ec681f3Smrg      if (stp->Base.info.outputs_written & BITFIELD64_BIT(attr)) {
63201e04c3fSmrg         unsigned slot = num_outputs++;
63301e04c3fSmrg         unsigned semantic_name, semantic_index;
63401e04c3fSmrg         tgsi_get_gl_varying_semantic(attr, st->needs_texcoord_semantic,
63501e04c3fSmrg                                      &semantic_name, &semantic_index);
63601e04c3fSmrg         output_semantic_name[slot] = semantic_name;
63701e04c3fSmrg         output_semantic_index[slot] = semantic_index;
6384a49301eSmrg      }
6394a49301eSmrg   }
6407ec681f3Smrg   /* pre-setup potentially unused edgeflag output */
64101e04c3fSmrg   output_semantic_name[num_outputs] = TGSI_SEMANTIC_EDGEFLAG;
64201e04c3fSmrg   output_semantic_index[num_outputs] = 0;
6434a49301eSmrg
6447ec681f3Smrg   ureg = ureg_create_with_screen(PIPE_SHADER_VERTEX, st->screen);
64501e04c3fSmrg   if (ureg == NULL)
64601e04c3fSmrg      return false;
6473464ebd5Sriastradh
6487ec681f3Smrg   ureg_setup_shader_info(ureg, &stp->Base.info);
6494a49301eSmrg
6503464ebd5Sriastradh   if (ST_DEBUG & DEBUG_MESA) {
6517ec681f3Smrg      _mesa_print_program(&stp->Base);
6527ec681f3Smrg      _mesa_print_program_parameters(st->ctx, &stp->Base);
6533464ebd5Sriastradh      debug_printf("\n");
6543464ebd5Sriastradh   }
6553464ebd5Sriastradh
6567ec681f3Smrg   struct st_vertex_program *stvp = (struct st_vertex_program *)stp;
6577ec681f3Smrg
6587ec681f3Smrg   error = st_translate_program(st->ctx,
6597ec681f3Smrg                                PIPE_SHADER_VERTEX,
6607ec681f3Smrg                                ureg,
6617ec681f3Smrg                                stp->glsl_to_tgsi,
6627ec681f3Smrg                                &stp->Base,
6637ec681f3Smrg                                /* inputs */
6647ec681f3Smrg                                stvp->num_inputs,
6657ec681f3Smrg                                input_to_index,
6667ec681f3Smrg                                NULL, /* inputSlotToAttr */
6677ec681f3Smrg                                NULL, /* input semantic name */
6687ec681f3Smrg                                NULL, /* input semantic index */
6697ec681f3Smrg                                NULL, /* interp mode */
6707ec681f3Smrg                                /* outputs */
6717ec681f3Smrg                                num_outputs,
6727ec681f3Smrg                                stvp->result_to_output,
6737ec681f3Smrg                                output_semantic_name,
6747ec681f3Smrg                                output_semantic_index);
6757ec681f3Smrg
6767ec681f3Smrg   st_translate_stream_output_info(&stp->Base);
6777ec681f3Smrg
6787ec681f3Smrg   free_glsl_to_tgsi_visitor(stp->glsl_to_tgsi);
67901e04c3fSmrg
68001e04c3fSmrg   if (error) {
6817ec681f3Smrg      debug_printf("%s: failed to translate GLSL IR program:\n", __func__);
6827ec681f3Smrg      _mesa_print_program(&stp->Base);
68301e04c3fSmrg      debug_assert(0);
68401e04c3fSmrg      return false;
68501e04c3fSmrg   }
686cdc920a0Smrg
6877ec681f3Smrg   stp->state.tokens = ureg_get_tokens(ureg, NULL);
68801e04c3fSmrg   ureg_destroy(ureg);
6894a49301eSmrg
6907ec681f3Smrg   stp->glsl_to_tgsi = NULL;
6917ec681f3Smrg   st_store_ir_in_disk_cache(st, &stp->Base, false);
692cdc920a0Smrg
6937ec681f3Smrg   return stp->state.tokens != NULL;
6947ec681f3Smrg}
695b9abf16eSmaya
6967ec681f3Smrgstatic struct nir_shader *
6977ec681f3Smrgget_nir_shader(struct st_context *st, struct st_program *stp)
6987ec681f3Smrg{
6997ec681f3Smrg   if (stp->Base.nir) {
7007ec681f3Smrg      nir_shader *nir = stp->Base.nir;
701b9abf16eSmaya
7027ec681f3Smrg      /* The first shader variant takes ownership of NIR, so that there is
7037ec681f3Smrg       * no cloning. Additional shader variants are always generated from
7047ec681f3Smrg       * serialized NIR to save memory.
7057ec681f3Smrg       */
7067ec681f3Smrg      stp->Base.nir = NULL;
7077ec681f3Smrg      assert(stp->serialized_nir && stp->serialized_nir_size);
7087ec681f3Smrg      return nir;
709b9abf16eSmaya   }
710b9abf16eSmaya
7117ec681f3Smrg   struct blob_reader blob_reader;
7127ec681f3Smrg   const struct nir_shader_compiler_options *options =
7137ec681f3Smrg      st_get_nir_compiler_options(st, stp->Base.info.stage);
7147ec681f3Smrg
7157ec681f3Smrg   blob_reader_init(&blob_reader, stp->serialized_nir, stp->serialized_nir_size);
7167ec681f3Smrg   return nir_deserialize(NULL, options, &blob_reader);
71701e04c3fSmrg}
718cdc920a0Smrg
7197ec681f3Smrgstatic void
7207ec681f3Smrglower_ucp(struct st_context *st,
7217ec681f3Smrg          struct nir_shader *nir,
7227ec681f3Smrg          unsigned ucp_enables,
7237ec681f3Smrg          struct gl_program_parameter_list *params)
72401e04c3fSmrg{
7257ec681f3Smrg   if (nir->info.outputs_written & VARYING_BIT_CLIP_DIST0)
7267ec681f3Smrg      NIR_PASS_V(nir, nir_lower_clip_disable, ucp_enables);
7277ec681f3Smrg   else {
7287ec681f3Smrg      struct pipe_screen *screen = st->screen;
7297ec681f3Smrg      bool can_compact = screen->get_param(screen,
7307ec681f3Smrg                                           PIPE_CAP_NIR_COMPACT_ARRAYS);
7317ec681f3Smrg      bool use_eye = st->ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX] != NULL;
7327ec681f3Smrg
7337ec681f3Smrg      gl_state_index16 clipplane_state[MAX_CLIP_PLANES][STATE_LENGTH] = {{0}};
7347ec681f3Smrg      for (int i = 0; i < MAX_CLIP_PLANES; ++i) {
7357ec681f3Smrg         if (use_eye) {
7367ec681f3Smrg            clipplane_state[i][0] = STATE_CLIPPLANE;
7377ec681f3Smrg            clipplane_state[i][1] = i;
7387ec681f3Smrg         } else {
7397ec681f3Smrg            clipplane_state[i][0] = STATE_CLIP_INTERNAL;
7407ec681f3Smrg            clipplane_state[i][1] = i;
7417ec681f3Smrg         }
7427ec681f3Smrg         _mesa_add_state_reference(params, clipplane_state[i]);
7437ec681f3Smrg      }
7447ec681f3Smrg
7457ec681f3Smrg      if (nir->info.stage == MESA_SHADER_VERTEX) {
7467ec681f3Smrg         NIR_PASS_V(nir, nir_lower_clip_vs, ucp_enables,
7477ec681f3Smrg                    true, can_compact, clipplane_state);
7487ec681f3Smrg      } else if (nir->info.stage == MESA_SHADER_GEOMETRY) {
7497ec681f3Smrg         NIR_PASS_V(nir, nir_lower_clip_gs, ucp_enables,
7507ec681f3Smrg                    can_compact, clipplane_state);
7517ec681f3Smrg      }
7527ec681f3Smrg
7537ec681f3Smrg      NIR_PASS_V(nir, nir_lower_io_to_temporaries,
7547ec681f3Smrg                 nir_shader_get_entrypoint(nir), true, false);
7557ec681f3Smrg      NIR_PASS_V(nir, nir_lower_global_vars_to_local);
7567ec681f3Smrg   }
7577ec681f3Smrg}
7587ec681f3Smrg
7597ec681f3Smrgstatic const gl_state_index16 depth_range_state[STATE_LENGTH] =
7607ec681f3Smrg   { STATE_DEPTH_RANGE };
7617ec681f3Smrg
7627ec681f3Smrgstatic struct st_common_variant *
7637ec681f3Smrgst_create_common_variant(struct st_context *st,
7647ec681f3Smrg                     struct st_program *stp,
7657ec681f3Smrg                     const struct st_common_variant_key *key)
7667ec681f3Smrg{
7677ec681f3Smrg   struct st_common_variant *v = CALLOC_STRUCT(st_common_variant);
7687ec681f3Smrg   struct pipe_context *pipe = st->pipe;
7697ec681f3Smrg   struct pipe_shader_state state = {0};
7707ec681f3Smrg
7717ec681f3Smrg   static const gl_state_index16 point_size_state[STATE_LENGTH] =
7727ec681f3Smrg      { STATE_POINT_SIZE_CLAMPED, 0 };
7737ec681f3Smrg   struct gl_program_parameter_list *params = stp->Base.Parameters;
7747ec681f3Smrg
7757ec681f3Smrg   v->key = *key;
7767ec681f3Smrg
7777ec681f3Smrg   state.stream_output = stp->state.stream_output;
7787ec681f3Smrg
7797ec681f3Smrg   if (stp->state.type == PIPE_SHADER_IR_NIR) {
7807ec681f3Smrg      bool finalize = false;
7817ec681f3Smrg
7827ec681f3Smrg      state.type = PIPE_SHADER_IR_NIR;
7837ec681f3Smrg      state.ir.nir = get_nir_shader(st, stp);
7847ec681f3Smrg      const nir_shader_compiler_options *options = ((nir_shader *)state.ir.nir)->options;
7857ec681f3Smrg
7867ec681f3Smrg      if (key->clamp_color) {
7877ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_clamp_color_outputs);
7887ec681f3Smrg         finalize = true;
7897ec681f3Smrg      }
79001e04c3fSmrg      if (key->passthrough_edgeflags) {
7917ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_passthrough_edgeflags);
7927ec681f3Smrg         finalize = true;
7937ec681f3Smrg      }
7947ec681f3Smrg
7957ec681f3Smrg      if (key->lower_point_size) {
7967ec681f3Smrg         _mesa_add_state_reference(params, point_size_state);
7977ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_point_size_mov,
7987ec681f3Smrg                    point_size_state);
7997ec681f3Smrg
8007ec681f3Smrg         switch (stp->Base.info.stage) {
8017ec681f3Smrg         case MESA_SHADER_VERTEX:
8027ec681f3Smrg            stp->affected_states |= ST_NEW_VS_CONSTANTS;
8037ec681f3Smrg            break;
8047ec681f3Smrg         case MESA_SHADER_TESS_EVAL:
8057ec681f3Smrg            stp->affected_states |= ST_NEW_TES_CONSTANTS;
8067ec681f3Smrg            break;
8077ec681f3Smrg         case MESA_SHADER_GEOMETRY:
8087ec681f3Smrg            stp->affected_states |= ST_NEW_GS_CONSTANTS;
8097ec681f3Smrg            break;
8107ec681f3Smrg         default:
8117ec681f3Smrg            unreachable("bad shader stage");
8127ec681f3Smrg         }
8137ec681f3Smrg
8147ec681f3Smrg         finalize = true;
8157ec681f3Smrg      }
8167ec681f3Smrg
8177ec681f3Smrg      if (key->lower_ucp) {
8187ec681f3Smrg         assert(!options->unify_interfaces);
8197ec681f3Smrg         lower_ucp(st, state.ir.nir, key->lower_ucp, params);
8207ec681f3Smrg         finalize = true;
8217ec681f3Smrg      }
8227ec681f3Smrg
8237ec681f3Smrg      if (st->emulate_gl_clamp &&
8247ec681f3Smrg          (key->gl_clamp[0] || key->gl_clamp[1] || key->gl_clamp[2])) {
8257ec681f3Smrg         nir_lower_tex_options tex_opts = {0};
8267ec681f3Smrg         tex_opts.saturate_s = key->gl_clamp[0];
8277ec681f3Smrg         tex_opts.saturate_t = key->gl_clamp[1];
8287ec681f3Smrg         tex_opts.saturate_r = key->gl_clamp[2];
8297ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_tex, &tex_opts);
8307ec681f3Smrg      }
8317ec681f3Smrg
8327ec681f3Smrg      if (finalize || !st->allow_st_finalize_nir_twice) {
8337ec681f3Smrg         char *msg = st_finalize_nir(st, &stp->Base, stp->shader_program, state.ir.nir,
8347ec681f3Smrg                                     true, false);
8357ec681f3Smrg         free(msg);
8367ec681f3Smrg
8377ec681f3Smrg         /* Clip lowering and edgeflags may have introduced new varyings, so
8387ec681f3Smrg          * update the inputs_read/outputs_written. However, with
8397ec681f3Smrg          * unify_interfaces set (aka iris) the non-SSO varyings layout is
8407ec681f3Smrg          * decided at link time with outputs_written updated so the two line
8417ec681f3Smrg          * up.  A driver with this flag set may not use any of the lowering
8427ec681f3Smrg          * passes that would change the varyings, so skip to make sure we don't
8437ec681f3Smrg          * break its linkage.
8447ec681f3Smrg          */
8457ec681f3Smrg         if (!options->unify_interfaces) {
8467ec681f3Smrg            nir_shader_gather_info(state.ir.nir,
8477ec681f3Smrg                                   nir_shader_get_entrypoint(state.ir.nir));
8487ec681f3Smrg         }
84901e04c3fSmrg      }
85001e04c3fSmrg
8517ec681f3Smrg      if (key->is_draw_shader)
8527ec681f3Smrg         v->base.driver_shader = draw_create_vertex_shader(st->draw, &state);
8537ec681f3Smrg      else
8547ec681f3Smrg         v->base.driver_shader = st_create_nir_shader(st, &state);
85501e04c3fSmrg
8567ec681f3Smrg      return v;
85701e04c3fSmrg   }
85801e04c3fSmrg
8597ec681f3Smrg   state.type = PIPE_SHADER_IR_TGSI;
8607ec681f3Smrg   state.tokens = tgsi_dup_tokens(stp->state.tokens);
8617ec681f3Smrg
86201e04c3fSmrg   /* Emulate features. */
86301e04c3fSmrg   if (key->clamp_color || key->passthrough_edgeflags) {
86401e04c3fSmrg      const struct tgsi_token *tokens;
86501e04c3fSmrg      unsigned flags =
86601e04c3fSmrg         (key->clamp_color ? TGSI_EMU_CLAMP_COLOR_OUTPUTS : 0) |
86701e04c3fSmrg         (key->passthrough_edgeflags ? TGSI_EMU_PASSTHROUGH_EDGEFLAG : 0);
86801e04c3fSmrg
8697ec681f3Smrg      tokens = tgsi_emulate(state.tokens, flags);
87001e04c3fSmrg
87101e04c3fSmrg      if (tokens) {
8727ec681f3Smrg         tgsi_free_tokens(state.tokens);
8737ec681f3Smrg         state.tokens = tokens;
8747ec681f3Smrg      } else {
87501e04c3fSmrg         fprintf(stderr, "mesa: cannot emulate deprecated features\n");
8767ec681f3Smrg      }
877af69d88dSmrg   }
8784a49301eSmrg
8797ec681f3Smrg   if (key->lower_depth_clamp) {
8807ec681f3Smrg      unsigned depth_range_const =
8817ec681f3Smrg            _mesa_add_state_reference(params, depth_range_state);
8827ec681f3Smrg
8837ec681f3Smrg      const struct tgsi_token *tokens;
8847ec681f3Smrg      tokens = st_tgsi_lower_depth_clamp(state.tokens, depth_range_const,
8857ec681f3Smrg                                         key->clip_negative_one_to_one);
8867ec681f3Smrg      if (tokens != state.tokens)
8877ec681f3Smrg         tgsi_free_tokens(state.tokens);
8887ec681f3Smrg      state.tokens = tokens;
8897ec681f3Smrg   }
8907ec681f3Smrg
8917ec681f3Smrg   if (ST_DEBUG & DEBUG_PRINT_IR)
8927ec681f3Smrg      tgsi_dump(state.tokens, 0);
8937ec681f3Smrg
8947ec681f3Smrg   switch (stp->Base.info.stage) {
8957ec681f3Smrg   case MESA_SHADER_VERTEX:
8967ec681f3Smrg      if (key->is_draw_shader)
8977ec681f3Smrg         v->base.driver_shader = draw_create_vertex_shader(st->draw, &state);
8987ec681f3Smrg      else
8997ec681f3Smrg         v->base.driver_shader = pipe->create_vs_state(pipe, &state);
9007ec681f3Smrg      break;
9017ec681f3Smrg   case MESA_SHADER_TESS_CTRL:
9027ec681f3Smrg      v->base.driver_shader = pipe->create_tcs_state(pipe, &state);
9037ec681f3Smrg      break;
9047ec681f3Smrg   case MESA_SHADER_TESS_EVAL:
9057ec681f3Smrg      v->base.driver_shader = pipe->create_tes_state(pipe, &state);
9067ec681f3Smrg      break;
9077ec681f3Smrg   case MESA_SHADER_GEOMETRY:
9087ec681f3Smrg      v->base.driver_shader = pipe->create_gs_state(pipe, &state);
9097ec681f3Smrg      break;
9107ec681f3Smrg   case MESA_SHADER_COMPUTE: {
9117ec681f3Smrg      struct pipe_compute_state cs = {0};
9127ec681f3Smrg      cs.ir_type = state.type;
9137ec681f3Smrg      cs.req_local_mem = stp->Base.info.shared_size;
9147ec681f3Smrg
9157ec681f3Smrg      if (state.type == PIPE_SHADER_IR_NIR)
9167ec681f3Smrg         cs.prog = state.ir.nir;
9177ec681f3Smrg      else
9187ec681f3Smrg         cs.prog = state.tokens;
9197ec681f3Smrg
9207ec681f3Smrg      v->base.driver_shader = pipe->create_compute_state(pipe, &cs);
9217ec681f3Smrg      break;
9227ec681f3Smrg   }
9237ec681f3Smrg   default:
9247ec681f3Smrg      assert(!"unhandled shader type");
9257ec681f3Smrg      free(v);
9267ec681f3Smrg      return NULL;
9274a49301eSmrg   }
928cdc920a0Smrg
9297ec681f3Smrg   if (state.tokens) {
9307ec681f3Smrg      tgsi_free_tokens(state.tokens);
9317ec681f3Smrg   }
9327ec681f3Smrg
9337ec681f3Smrg   return v;
9344a49301eSmrg}
9354a49301eSmrg
9367ec681f3Smrgstatic void
9377ec681f3Smrgst_add_variant(struct st_variant **list, struct st_variant *v)
9387ec681f3Smrg{
9397ec681f3Smrg   struct st_variant *first = *list;
9407ec681f3Smrg
9417ec681f3Smrg   /* Make sure that the default variant stays the first in the list, and insert
9427ec681f3Smrg    * any later variants in as the second entry.
9437ec681f3Smrg    */
9447ec681f3Smrg   if (first) {
9457ec681f3Smrg      v->next = first->next;
9467ec681f3Smrg      first->next = v;
9477ec681f3Smrg   } else {
9487ec681f3Smrg      *list = v;
9497ec681f3Smrg   }
9507ec681f3Smrg}
9514a49301eSmrg
9523464ebd5Sriastradh/**
9533464ebd5Sriastradh * Find/create a vertex program variant.
9543464ebd5Sriastradh */
9557ec681f3Smrgstruct st_common_variant *
9567ec681f3Smrgst_get_common_variant(struct st_context *st,
9577ec681f3Smrg                  struct st_program *stp,
9587ec681f3Smrg                  const struct st_common_variant_key *key)
9593464ebd5Sriastradh{
9607ec681f3Smrg   struct st_common_variant *v;
9613464ebd5Sriastradh
9623464ebd5Sriastradh   /* Search for existing variant */
9637ec681f3Smrg   for (v = st_common_variant(stp->variants); v;
9647ec681f3Smrg        v = st_common_variant(v->base.next)) {
9657ec681f3Smrg      if (memcmp(&v->key, key, sizeof(*key)) == 0) {
9663464ebd5Sriastradh         break;
9673464ebd5Sriastradh      }
9683464ebd5Sriastradh   }
9693464ebd5Sriastradh
9707ec681f3Smrg   if (!v) {
9717ec681f3Smrg      if (stp->variants != NULL) {
9727ec681f3Smrg         _mesa_perf_debug(st->ctx, MESA_DEBUG_SEVERITY_MEDIUM,
9737ec681f3Smrg                          "Compiling %s shader variant (%s%s%s%s%s%s%s%s)",
9747ec681f3Smrg                          _mesa_shader_stage_to_string(stp->Base.info.stage),
9757ec681f3Smrg                          key->passthrough_edgeflags ? "edgeflags," : "",
9767ec681f3Smrg                          key->clamp_color ? "clamp_color," : "",
9777ec681f3Smrg                          key->lower_depth_clamp ? "depth_clamp," : "",
9787ec681f3Smrg                          key->clip_negative_one_to_one ? "clip_negative_one," : "",
9797ec681f3Smrg                          key->lower_point_size ? "point_size," : "",
9807ec681f3Smrg                          key->lower_ucp ? "ucp," : "",
9817ec681f3Smrg                          key->is_draw_shader ? "draw," : "",
9827ec681f3Smrg                          key->gl_clamp[0] || key->gl_clamp[1] || key->gl_clamp[2] ? "GL_CLAMP," : "");
9837ec681f3Smrg      }
9847ec681f3Smrg
9853464ebd5Sriastradh      /* create now */
9867ec681f3Smrg      v = st_create_common_variant(st, stp, key);
9877ec681f3Smrg      if (v) {
9887ec681f3Smrg         v->base.st = key->st;
9897ec681f3Smrg
9907ec681f3Smrg         if (stp->Base.info.stage == MESA_SHADER_VERTEX) {
9917ec681f3Smrg            struct st_vertex_program *stvp = (struct st_vertex_program *)stp;
9927ec681f3Smrg
9937ec681f3Smrg            v->vert_attrib_mask =
9947ec681f3Smrg               stvp->vert_attrib_mask |
9957ec681f3Smrg               (key->passthrough_edgeflags ? VERT_BIT_EDGEFLAG : 0);
9967ec681f3Smrg         }
9977ec681f3Smrg
9987ec681f3Smrg         st_add_variant(&stp->variants, &v->base);
9993464ebd5Sriastradh      }
10003464ebd5Sriastradh   }
10013464ebd5Sriastradh
10027ec681f3Smrg   return v;
10033464ebd5Sriastradh}
10043464ebd5Sriastradh
10054a49301eSmrg
10064a49301eSmrg/**
100701e04c3fSmrg * Translate a Mesa fragment shader into a TGSI shader.
10084a49301eSmrg */
100901e04c3fSmrgbool
10104a49301eSmrgst_translate_fragment_program(struct st_context *st,
10117ec681f3Smrg                              struct st_program *stfp)
10124a49301eSmrg{
101301e04c3fSmrg   /* Non-GLSL programs: */
10147ec681f3Smrg   if (!stfp->glsl_to_tgsi) {
101501e04c3fSmrg      _mesa_remove_output_reads(&stfp->Base, PROGRAM_OUTPUT);
101601e04c3fSmrg      if (st->ctx->Const.GLSLFragCoordIsSysVal)
101701e04c3fSmrg         _mesa_program_fragment_position_to_sysval(&stfp->Base);
101801e04c3fSmrg
101901e04c3fSmrg      /* This determines which states will be updated when the assembly
102001e04c3fSmrg       * shader is bound.
102101e04c3fSmrg       *
102201e04c3fSmrg       * fragment.position and glDrawPixels always use constants.
102301e04c3fSmrg       */
102401e04c3fSmrg      stfp->affected_states = ST_NEW_FS_STATE |
102501e04c3fSmrg                              ST_NEW_SAMPLE_SHADING |
102601e04c3fSmrg                              ST_NEW_FS_CONSTANTS;
102701e04c3fSmrg
102801e04c3fSmrg      if (stfp->ati_fs) {
102901e04c3fSmrg         /* Just set them for ATI_fs unconditionally. */
103001e04c3fSmrg         stfp->affected_states |= ST_NEW_FS_SAMPLER_VIEWS |
103101e04c3fSmrg                                  ST_NEW_FS_SAMPLERS;
103201e04c3fSmrg      } else {
103301e04c3fSmrg         /* ARB_fp */
103401e04c3fSmrg         if (stfp->Base.SamplersUsed)
103501e04c3fSmrg            stfp->affected_states |= ST_NEW_FS_SAMPLER_VIEWS |
103601e04c3fSmrg                                     ST_NEW_FS_SAMPLERS;
10373464ebd5Sriastradh      }
10383464ebd5Sriastradh
10397ec681f3Smrg      /* Translate to NIR.  ATI_fs translates at variant time. */
10407ec681f3Smrg      if (!stfp->ati_fs) {
10417ec681f3Smrg         nir_shader *nir =
10427ec681f3Smrg            st_translate_prog_to_nir(st, &stfp->Base, MESA_SHADER_FRAGMENT);
1043b9abf16eSmaya
10447ec681f3Smrg         if (stfp->Base.nir)
10457ec681f3Smrg            ralloc_free(stfp->Base.nir);
10467ec681f3Smrg         if (stfp->serialized_nir) {
10477ec681f3Smrg            free(stfp->serialized_nir);
10487ec681f3Smrg            stfp->serialized_nir = NULL;
10497ec681f3Smrg         }
10507ec681f3Smrg         stfp->state.type = PIPE_SHADER_IR_NIR;
10517ec681f3Smrg         stfp->Base.nir = nir;
10527ec681f3Smrg      }
1053b9abf16eSmaya
1054b9abf16eSmaya      return true;
1055b9abf16eSmaya   }
1056b9abf16eSmaya
10577ec681f3Smrg   ubyte outputMapping[2 * FRAG_RESULT_MAX];
10587ec681f3Smrg   ubyte inputMapping[VARYING_SLOT_MAX];
10597ec681f3Smrg   ubyte inputSlotToAttr[VARYING_SLOT_MAX];
10607ec681f3Smrg   ubyte interpMode[PIPE_MAX_SHADER_INPUTS];  /* XXX size? */
10617ec681f3Smrg   GLuint attr;
10627ec681f3Smrg   GLbitfield64 inputsRead;
10637ec681f3Smrg   struct ureg_program *ureg;
10647ec681f3Smrg
10657ec681f3Smrg   GLboolean write_all = GL_FALSE;
10667ec681f3Smrg
10677ec681f3Smrg   ubyte input_semantic_name[PIPE_MAX_SHADER_INPUTS];
10687ec681f3Smrg   ubyte input_semantic_index[PIPE_MAX_SHADER_INPUTS];
10697ec681f3Smrg   uint fs_num_inputs = 0;
10707ec681f3Smrg
10717ec681f3Smrg   ubyte fs_output_semantic_name[PIPE_MAX_SHADER_OUTPUTS];
10727ec681f3Smrg   ubyte fs_output_semantic_index[PIPE_MAX_SHADER_OUTPUTS];
10737ec681f3Smrg   uint fs_num_outputs = 0;
10747ec681f3Smrg
10757ec681f3Smrg   memset(inputSlotToAttr, ~0, sizeof(inputSlotToAttr));
10767ec681f3Smrg
1077af69d88dSmrg   /*
1078af69d88dSmrg    * Convert Mesa program inputs to TGSI input register semantics.
1079af69d88dSmrg    */
108001e04c3fSmrg   inputsRead = stfp->Base.info.inputs_read;
1081af69d88dSmrg   for (attr = 0; attr < VARYING_SLOT_MAX; attr++) {
1082af69d88dSmrg      if ((inputsRead & BITFIELD64_BIT(attr)) != 0) {
1083af69d88dSmrg         const GLuint slot = fs_num_inputs++;
10843464ebd5Sriastradh
1085af69d88dSmrg         inputMapping[attr] = slot;
108601e04c3fSmrg         inputSlotToAttr[slot] = attr;
1087af69d88dSmrg
1088af69d88dSmrg         switch (attr) {
1089af69d88dSmrg         case VARYING_SLOT_POS:
1090af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_POSITION;
1091af69d88dSmrg            input_semantic_index[slot] = 0;
1092af69d88dSmrg            interpMode[slot] = TGSI_INTERPOLATE_LINEAR;
1093af69d88dSmrg            break;
1094af69d88dSmrg         case VARYING_SLOT_COL0:
1095af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_COLOR;
1096af69d88dSmrg            input_semantic_index[slot] = 0;
109701e04c3fSmrg            interpMode[slot] = stfp->glsl_to_tgsi ?
109801e04c3fSmrg               TGSI_INTERPOLATE_COUNT : TGSI_INTERPOLATE_COLOR;
1099af69d88dSmrg            break;
1100af69d88dSmrg         case VARYING_SLOT_COL1:
1101af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_COLOR;
1102af69d88dSmrg            input_semantic_index[slot] = 1;
110301e04c3fSmrg            interpMode[slot] = stfp->glsl_to_tgsi ?
110401e04c3fSmrg               TGSI_INTERPOLATE_COUNT : TGSI_INTERPOLATE_COLOR;
1105af69d88dSmrg            break;
1106af69d88dSmrg         case VARYING_SLOT_FOGC:
1107af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_FOG;
1108af69d88dSmrg            input_semantic_index[slot] = 0;
1109af69d88dSmrg            interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE;
1110af69d88dSmrg            break;
1111af69d88dSmrg         case VARYING_SLOT_FACE:
1112af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_FACE;
1113af69d88dSmrg            input_semantic_index[slot] = 0;
1114af69d88dSmrg            interpMode[slot] = TGSI_INTERPOLATE_CONSTANT;
1115af69d88dSmrg            break;
1116af69d88dSmrg         case VARYING_SLOT_PRIMITIVE_ID:
1117af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_PRIMID;
1118af69d88dSmrg            input_semantic_index[slot] = 0;
1119af69d88dSmrg            interpMode[slot] = TGSI_INTERPOLATE_CONSTANT;
1120af69d88dSmrg            break;
1121af69d88dSmrg         case VARYING_SLOT_LAYER:
1122af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_LAYER;
1123af69d88dSmrg            input_semantic_index[slot] = 0;
1124af69d88dSmrg            interpMode[slot] = TGSI_INTERPOLATE_CONSTANT;
1125af69d88dSmrg            break;
1126af69d88dSmrg         case VARYING_SLOT_VIEWPORT:
1127af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_VIEWPORT_INDEX;
1128af69d88dSmrg            input_semantic_index[slot] = 0;
1129af69d88dSmrg            interpMode[slot] = TGSI_INTERPOLATE_CONSTANT;
1130af69d88dSmrg            break;
1131af69d88dSmrg         case VARYING_SLOT_CLIP_DIST0:
1132af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_CLIPDIST;
1133af69d88dSmrg            input_semantic_index[slot] = 0;
1134af69d88dSmrg            interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE;
1135af69d88dSmrg            break;
1136af69d88dSmrg         case VARYING_SLOT_CLIP_DIST1:
1137af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_CLIPDIST;
1138af69d88dSmrg            input_semantic_index[slot] = 1;
1139af69d88dSmrg            interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE;
1140af69d88dSmrg            break;
114101e04c3fSmrg         case VARYING_SLOT_CULL_DIST0:
114201e04c3fSmrg         case VARYING_SLOT_CULL_DIST1:
114301e04c3fSmrg            /* these should have been lowered by GLSL */
114401e04c3fSmrg            assert(0);
114501e04c3fSmrg            break;
1146af69d88dSmrg            /* In most cases, there is nothing special about these
1147af69d88dSmrg             * inputs, so adopt a convention to use the generic
1148af69d88dSmrg             * semantic name and the mesa VARYING_SLOT_ number as the
1149af69d88dSmrg             * index.
1150af69d88dSmrg             *
1151af69d88dSmrg             * All that is required is that the vertex shader labels
1152af69d88dSmrg             * its own outputs similarly, and that the vertex shader
1153af69d88dSmrg             * generates at least every output required by the
1154af69d88dSmrg             * fragment shader plus fixed-function hardware (such as
1155af69d88dSmrg             * BFC).
1156af69d88dSmrg             *
1157af69d88dSmrg             * However, some drivers may need us to identify the PNTC and TEXi
1158af69d88dSmrg             * varyings if, for example, their capability to replace them with
1159af69d88dSmrg             * sprite coordinates is limited.
1160af69d88dSmrg             */
1161af69d88dSmrg         case VARYING_SLOT_PNTC:
1162af69d88dSmrg            if (st->needs_texcoord_semantic) {
1163af69d88dSmrg               input_semantic_name[slot] = TGSI_SEMANTIC_PCOORD;
11643464ebd5Sriastradh               input_semantic_index[slot] = 0;
11653464ebd5Sriastradh               interpMode[slot] = TGSI_INTERPOLATE_LINEAR;
11663464ebd5Sriastradh               break;
1167af69d88dSmrg            }
11687ec681f3Smrg            FALLTHROUGH;
1169af69d88dSmrg         case VARYING_SLOT_TEX0:
1170af69d88dSmrg         case VARYING_SLOT_TEX1:
1171af69d88dSmrg         case VARYING_SLOT_TEX2:
1172af69d88dSmrg         case VARYING_SLOT_TEX3:
1173af69d88dSmrg         case VARYING_SLOT_TEX4:
1174af69d88dSmrg         case VARYING_SLOT_TEX5:
1175af69d88dSmrg         case VARYING_SLOT_TEX6:
1176af69d88dSmrg         case VARYING_SLOT_TEX7:
1177af69d88dSmrg            if (st->needs_texcoord_semantic) {
1178af69d88dSmrg               input_semantic_name[slot] = TGSI_SEMANTIC_TEXCOORD;
1179af69d88dSmrg               input_semantic_index[slot] = attr - VARYING_SLOT_TEX0;
118001e04c3fSmrg               interpMode[slot] = stfp->glsl_to_tgsi ?
118101e04c3fSmrg                  TGSI_INTERPOLATE_COUNT : TGSI_INTERPOLATE_PERSPECTIVE;
11823464ebd5Sriastradh               break;
11833464ebd5Sriastradh            }
11847ec681f3Smrg            FALLTHROUGH;
1185af69d88dSmrg         case VARYING_SLOT_VAR0:
1186af69d88dSmrg         default:
1187af69d88dSmrg            /* Semantic indices should be zero-based because drivers may choose
1188af69d88dSmrg             * to assign a fixed slot determined by that index.
1189af69d88dSmrg             * This is useful because ARB_separate_shader_objects uses location
1190af69d88dSmrg             * qualifiers for linkage, and if the semantic index corresponds to
1191af69d88dSmrg             * these locations, linkage passes in the driver become unecessary.
1192af69d88dSmrg             *
1193af69d88dSmrg             * If needs_texcoord_semantic is true, no semantic indices will be
1194af69d88dSmrg             * consumed for the TEXi varyings, and we can base the locations of
1195af69d88dSmrg             * the user varyings on VAR0.  Otherwise, we use TEX0 as base index.
1196af69d88dSmrg             */
119701e04c3fSmrg            assert(attr >= VARYING_SLOT_VAR0 || attr == VARYING_SLOT_PNTC ||
119801e04c3fSmrg                   (attr >= VARYING_SLOT_TEX0 && attr <= VARYING_SLOT_TEX7));
1199af69d88dSmrg            input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
120001e04c3fSmrg            input_semantic_index[slot] = st_get_generic_varying_index(st, attr);
1201af69d88dSmrg            if (attr == VARYING_SLOT_PNTC)
1202af69d88dSmrg               interpMode[slot] = TGSI_INTERPOLATE_LINEAR;
120301e04c3fSmrg            else {
120401e04c3fSmrg               interpMode[slot] = stfp->glsl_to_tgsi ?
120501e04c3fSmrg                  TGSI_INTERPOLATE_COUNT : TGSI_INTERPOLATE_PERSPECTIVE;
120601e04c3fSmrg            }
1207af69d88dSmrg            break;
12083464ebd5Sriastradh         }
12093464ebd5Sriastradh      }
1210af69d88dSmrg      else {
1211af69d88dSmrg         inputMapping[attr] = -1;
1212af69d88dSmrg      }
1213af69d88dSmrg   }
12143464ebd5Sriastradh
1215af69d88dSmrg   /*
1216af69d88dSmrg    * Semantics and mapping for outputs
1217af69d88dSmrg    */
121801e04c3fSmrg   GLbitfield64 outputsWritten = stfp->Base.info.outputs_written;
121901e04c3fSmrg
122001e04c3fSmrg   /* if z is written, emit that first */
122101e04c3fSmrg   if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
122201e04c3fSmrg      fs_output_semantic_name[fs_num_outputs] = TGSI_SEMANTIC_POSITION;
122301e04c3fSmrg      fs_output_semantic_index[fs_num_outputs] = 0;
122401e04c3fSmrg      outputMapping[FRAG_RESULT_DEPTH] = fs_num_outputs;
122501e04c3fSmrg      fs_num_outputs++;
122601e04c3fSmrg      outputsWritten &= ~(1 << FRAG_RESULT_DEPTH);
122701e04c3fSmrg   }
12283464ebd5Sriastradh
122901e04c3fSmrg   if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) {
123001e04c3fSmrg      fs_output_semantic_name[fs_num_outputs] = TGSI_SEMANTIC_STENCIL;
123101e04c3fSmrg      fs_output_semantic_index[fs_num_outputs] = 0;
123201e04c3fSmrg      outputMapping[FRAG_RESULT_STENCIL] = fs_num_outputs;
123301e04c3fSmrg      fs_num_outputs++;
123401e04c3fSmrg      outputsWritten &= ~(1 << FRAG_RESULT_STENCIL);
123501e04c3fSmrg   }
12363464ebd5Sriastradh
123701e04c3fSmrg   if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) {
123801e04c3fSmrg      fs_output_semantic_name[fs_num_outputs] = TGSI_SEMANTIC_SAMPLEMASK;
123901e04c3fSmrg      fs_output_semantic_index[fs_num_outputs] = 0;
124001e04c3fSmrg      outputMapping[FRAG_RESULT_SAMPLE_MASK] = fs_num_outputs;
124101e04c3fSmrg      fs_num_outputs++;
124201e04c3fSmrg      outputsWritten &= ~(1 << FRAG_RESULT_SAMPLE_MASK);
124301e04c3fSmrg   }
12443464ebd5Sriastradh
124501e04c3fSmrg   /* handle remaining outputs (color) */
124601e04c3fSmrg   for (attr = 0; attr < ARRAY_SIZE(outputMapping); attr++) {
124701e04c3fSmrg      const GLbitfield64 written = attr < FRAG_RESULT_MAX ? outputsWritten :
124801e04c3fSmrg         stfp->Base.SecondaryOutputsWritten;
124901e04c3fSmrg      const unsigned loc = attr % FRAG_RESULT_MAX;
125001e04c3fSmrg
125101e04c3fSmrg      if (written & BITFIELD64_BIT(loc)) {
125201e04c3fSmrg         switch (loc) {
125301e04c3fSmrg         case FRAG_RESULT_DEPTH:
125401e04c3fSmrg         case FRAG_RESULT_STENCIL:
125501e04c3fSmrg         case FRAG_RESULT_SAMPLE_MASK:
125601e04c3fSmrg            /* handled above */
125701e04c3fSmrg            assert(0);
125801e04c3fSmrg            break;
125901e04c3fSmrg         case FRAG_RESULT_COLOR:
12607ec681f3Smrg            write_all = GL_TRUE;
12617ec681f3Smrg            FALLTHROUGH;
126201e04c3fSmrg         default: {
126301e04c3fSmrg            int index;
126401e04c3fSmrg            assert(loc == FRAG_RESULT_COLOR ||
126501e04c3fSmrg                   (FRAG_RESULT_DATA0 <= loc && loc < FRAG_RESULT_MAX));
126601e04c3fSmrg
126701e04c3fSmrg            index = (loc == FRAG_RESULT_COLOR) ? 0 : (loc - FRAG_RESULT_DATA0);
126801e04c3fSmrg
126901e04c3fSmrg            if (attr >= FRAG_RESULT_MAX) {
127001e04c3fSmrg               /* Secondary color for dual source blending. */
127101e04c3fSmrg               assert(index == 0);
127201e04c3fSmrg               index++;
1273af69d88dSmrg            }
12743464ebd5Sriastradh
127501e04c3fSmrg            fs_output_semantic_name[fs_num_outputs] = TGSI_SEMANTIC_COLOR;
127601e04c3fSmrg            fs_output_semantic_index[fs_num_outputs] = index;
127701e04c3fSmrg            outputMapping[attr] = fs_num_outputs;
127801e04c3fSmrg            break;
1279af69d88dSmrg         }
128001e04c3fSmrg         }
128101e04c3fSmrg
128201e04c3fSmrg         fs_num_outputs++;
12833464ebd5Sriastradh      }
1284af69d88dSmrg   }
12853464ebd5Sriastradh
12867ec681f3Smrg   ureg = ureg_create_with_screen(PIPE_SHADER_FRAGMENT, st->screen);
128701e04c3fSmrg   if (ureg == NULL)
128801e04c3fSmrg      return false;
1289af69d88dSmrg
12907ec681f3Smrg   ureg_setup_shader_info(ureg, &stfp->Base.info);
12917ec681f3Smrg
1292af69d88dSmrg   if (ST_DEBUG & DEBUG_MESA) {
129301e04c3fSmrg      _mesa_print_program(&stfp->Base);
129401e04c3fSmrg      _mesa_print_program_parameters(st->ctx, &stfp->Base);
1295af69d88dSmrg      debug_printf("\n");
1296af69d88dSmrg   }
1297af69d88dSmrg   if (write_all == GL_TRUE)
129801e04c3fSmrg      ureg_property(ureg, TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS, 1);
12993464ebd5Sriastradh
130001e04c3fSmrg   if (stfp->glsl_to_tgsi) {
1301af69d88dSmrg      st_translate_program(st->ctx,
130201e04c3fSmrg                           PIPE_SHADER_FRAGMENT,
1303af69d88dSmrg                           ureg,
1304af69d88dSmrg                           stfp->glsl_to_tgsi,
130501e04c3fSmrg                           &stfp->Base,
1306af69d88dSmrg                           /* inputs */
1307af69d88dSmrg                           fs_num_inputs,
1308af69d88dSmrg                           inputMapping,
130901e04c3fSmrg                           inputSlotToAttr,
1310af69d88dSmrg                           input_semantic_name,
1311af69d88dSmrg                           input_semantic_index,
1312af69d88dSmrg                           interpMode,
1313af69d88dSmrg                           /* outputs */
1314af69d88dSmrg                           fs_num_outputs,
1315af69d88dSmrg                           outputMapping,
1316af69d88dSmrg                           fs_output_semantic_name,
131701e04c3fSmrg                           fs_output_semantic_index);
131801e04c3fSmrg
131901e04c3fSmrg      free_glsl_to_tgsi_visitor(stfp->glsl_to_tgsi);
13207ec681f3Smrg   }
1321af69d88dSmrg
13227ec681f3Smrg   stfp->state.tokens = ureg_get_tokens(ureg, NULL);
132301e04c3fSmrg   ureg_destroy(ureg);
13243464ebd5Sriastradh
132501e04c3fSmrg   if (stfp->glsl_to_tgsi) {
132601e04c3fSmrg      stfp->glsl_to_tgsi = NULL;
132701e04c3fSmrg      st_store_ir_in_disk_cache(st, &stfp->Base, false);
13283464ebd5Sriastradh   }
13293464ebd5Sriastradh
13307ec681f3Smrg   return stfp->state.tokens != NULL;
133101e04c3fSmrg}
1332af69d88dSmrg
133301e04c3fSmrgstatic struct st_fp_variant *
133401e04c3fSmrgst_create_fp_variant(struct st_context *st,
13357ec681f3Smrg                     struct st_program *stfp,
133601e04c3fSmrg                     const struct st_fp_variant_key *key)
133701e04c3fSmrg{
133801e04c3fSmrg   struct pipe_context *pipe = st->pipe;
133901e04c3fSmrg   struct st_fp_variant *variant = CALLOC_STRUCT(st_fp_variant);
13407ec681f3Smrg   struct pipe_shader_state state = {0};
134101e04c3fSmrg   struct gl_program_parameter_list *params = stfp->Base.Parameters;
134201e04c3fSmrg   static const gl_state_index16 texcoord_state[STATE_LENGTH] =
13437ec681f3Smrg      { STATE_CURRENT_ATTRIB, VERT_ATTRIB_TEX0 };
134401e04c3fSmrg   static const gl_state_index16 scale_state[STATE_LENGTH] =
13457ec681f3Smrg      { STATE_PT_SCALE };
134601e04c3fSmrg   static const gl_state_index16 bias_state[STATE_LENGTH] =
13477ec681f3Smrg      { STATE_PT_BIAS };
13487ec681f3Smrg   static const gl_state_index16 alpha_ref_state[STATE_LENGTH] =
13497ec681f3Smrg      { STATE_ALPHA_REF };
13503464ebd5Sriastradh
135101e04c3fSmrg   if (!variant)
135201e04c3fSmrg      return NULL;
13533464ebd5Sriastradh
13547ec681f3Smrg   /* Translate ATI_fs to NIR at variant time because that's when we have the
13557ec681f3Smrg    * texture types.
13567ec681f3Smrg    */
13577ec681f3Smrg   if (stfp->ati_fs) {
13587ec681f3Smrg      const struct nir_shader_compiler_options *options =
13597ec681f3Smrg         st_get_nir_compiler_options(st, MESA_SHADER_FRAGMENT);
13607ec681f3Smrg
13617ec681f3Smrg      nir_shader *s = st_translate_atifs_program(stfp->ati_fs, key, &stfp->Base, options);
13627ec681f3Smrg
13637ec681f3Smrg      st_prog_to_nir_postprocess(st, s, &stfp->Base);
13647ec681f3Smrg
13657ec681f3Smrg      state.type = PIPE_SHADER_IR_NIR;
13667ec681f3Smrg      state.ir.nir = s;
13677ec681f3Smrg   } else if (stfp->state.type == PIPE_SHADER_IR_NIR) {
13687ec681f3Smrg      state.type = PIPE_SHADER_IR_NIR;
13697ec681f3Smrg      state.ir.nir = get_nir_shader(st, stfp);
13707ec681f3Smrg   }
13713464ebd5Sriastradh
13727ec681f3Smrg   if (state.type == PIPE_SHADER_IR_NIR) {
13737ec681f3Smrg      bool finalize = false;
13747ec681f3Smrg
13757ec681f3Smrg      if (key->clamp_color) {
13767ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_clamp_color_outputs);
13777ec681f3Smrg         finalize = true;
13787ec681f3Smrg      }
13797ec681f3Smrg
13807ec681f3Smrg      if (key->lower_flatshade) {
13817ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_flatshade);
13827ec681f3Smrg         finalize = true;
13837ec681f3Smrg      }
13847ec681f3Smrg
13857ec681f3Smrg      if (key->lower_alpha_func != COMPARE_FUNC_ALWAYS) {
13867ec681f3Smrg         _mesa_add_state_reference(params, alpha_ref_state);
13877ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_alpha_test, key->lower_alpha_func,
13887ec681f3Smrg                    false, alpha_ref_state);
13897ec681f3Smrg         finalize = true;
13907ec681f3Smrg      }
13917ec681f3Smrg
13927ec681f3Smrg      if (key->lower_two_sided_color) {
13937ec681f3Smrg         bool face_sysval = st->ctx->Const.GLSLFrontFacingIsSysVal;
13947ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_two_sided_color, face_sysval);
13957ec681f3Smrg         finalize = true;
13967ec681f3Smrg      }
13973464ebd5Sriastradh
139801e04c3fSmrg      if (key->persample_shading) {
13997ec681f3Smrg          nir_shader *shader = state.ir.nir;
14007ec681f3Smrg          nir_foreach_shader_in_variable(var, shader)
140101e04c3fSmrg             var->data.sample = true;
14027ec681f3Smrg          finalize = true;
14037ec681f3Smrg      }
14047ec681f3Smrg
14057ec681f3Smrg      if (key->lower_texcoord_replace) {
14067ec681f3Smrg         bool point_coord_is_sysval = st->ctx->Const.GLSLPointCoordIsSysVal;
14077ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_texcoord_replace,
14087ec681f3Smrg                    key->lower_texcoord_replace, point_coord_is_sysval, false);
14097ec681f3Smrg         finalize = true;
14107ec681f3Smrg      }
14117ec681f3Smrg
14127ec681f3Smrg      if (st->emulate_gl_clamp &&
14137ec681f3Smrg          (key->gl_clamp[0] || key->gl_clamp[1] || key->gl_clamp[2])) {
14147ec681f3Smrg         nir_lower_tex_options tex_opts = {0};
14157ec681f3Smrg         tex_opts.saturate_s = key->gl_clamp[0];
14167ec681f3Smrg         tex_opts.saturate_t = key->gl_clamp[1];
14177ec681f3Smrg         tex_opts.saturate_r = key->gl_clamp[2];
14187ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_tex, &tex_opts);
14197ec681f3Smrg         finalize = true;
14203464ebd5Sriastradh      }
14213464ebd5Sriastradh
142201e04c3fSmrg      assert(!(key->bitmap && key->drawpixels));
14233464ebd5Sriastradh
142401e04c3fSmrg      /* glBitmap */
142501e04c3fSmrg      if (key->bitmap) {
142601e04c3fSmrg         nir_lower_bitmap_options options = {0};
14273464ebd5Sriastradh
142801e04c3fSmrg         variant->bitmap_sampler = ffs(~stfp->Base.SamplersUsed) - 1;
142901e04c3fSmrg         options.sampler = variant->bitmap_sampler;
14307ec681f3Smrg         options.swizzle_xxxx = st->bitmap.tex_format == PIPE_FORMAT_R8_UNORM;
14313464ebd5Sriastradh
14327ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_bitmap, &options);
14337ec681f3Smrg         finalize = true;
143401e04c3fSmrg      }
14353464ebd5Sriastradh
143601e04c3fSmrg      /* glDrawPixels (color only) */
143701e04c3fSmrg      if (key->drawpixels) {
143801e04c3fSmrg         nir_lower_drawpixels_options options = {{0}};
143901e04c3fSmrg         unsigned samplers_used = stfp->Base.SamplersUsed;
14403464ebd5Sriastradh
144101e04c3fSmrg         /* Find the first unused slot. */
144201e04c3fSmrg         variant->drawpix_sampler = ffs(~samplers_used) - 1;
144301e04c3fSmrg         options.drawpix_sampler = variant->drawpix_sampler;
144401e04c3fSmrg         samplers_used |= (1 << variant->drawpix_sampler);
14453464ebd5Sriastradh
144601e04c3fSmrg         options.pixel_maps = key->pixelMaps;
144701e04c3fSmrg         if (key->pixelMaps) {
144801e04c3fSmrg            variant->pixelmap_sampler = ffs(~samplers_used) - 1;
144901e04c3fSmrg            options.pixelmap_sampler = variant->pixelmap_sampler;
145001e04c3fSmrg         }
14514a49301eSmrg
145201e04c3fSmrg         options.scale_and_bias = key->scaleAndBias;
145301e04c3fSmrg         if (key->scaleAndBias) {
145401e04c3fSmrg            _mesa_add_state_reference(params, scale_state);
145501e04c3fSmrg            memcpy(options.scale_state_tokens, scale_state,
145601e04c3fSmrg                   sizeof(options.scale_state_tokens));
145701e04c3fSmrg            _mesa_add_state_reference(params, bias_state);
145801e04c3fSmrg            memcpy(options.bias_state_tokens, bias_state,
145901e04c3fSmrg                   sizeof(options.bias_state_tokens));
146001e04c3fSmrg         }
14614a49301eSmrg
146201e04c3fSmrg         _mesa_add_state_reference(params, texcoord_state);
146301e04c3fSmrg         memcpy(options.texcoord_state_tokens, texcoord_state,
146401e04c3fSmrg                sizeof(options.texcoord_state_tokens));
146501e04c3fSmrg
14667ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_drawpixels, &options);
14677ec681f3Smrg         finalize = true;
146801e04c3fSmrg      }
146901e04c3fSmrg
14707ec681f3Smrg      bool need_lower_tex_src_plane = false;
14717ec681f3Smrg
14727ec681f3Smrg      if (unlikely(key->external.lower_nv12 || key->external.lower_iyuv ||
14737ec681f3Smrg                   key->external.lower_xy_uxvx || key->external.lower_yx_xuxv ||
14747ec681f3Smrg                   key->external.lower_ayuv || key->external.lower_xyuv ||
14757ec681f3Smrg                   key->external.lower_yuv || key->external.lower_yu_yv ||
14767ec681f3Smrg                   key->external.lower_y41x)) {
14777ec681f3Smrg
14787ec681f3Smrg         st_nir_lower_samplers(st->screen, state.ir.nir,
14797ec681f3Smrg                               stfp->shader_program, &stfp->Base);
14807ec681f3Smrg
148101e04c3fSmrg         nir_lower_tex_options options = {0};
148201e04c3fSmrg         options.lower_y_uv_external = key->external.lower_nv12;
148301e04c3fSmrg         options.lower_y_u_v_external = key->external.lower_iyuv;
14847ec681f3Smrg         options.lower_xy_uxvx_external = key->external.lower_xy_uxvx;
14857ec681f3Smrg         options.lower_yx_xuxv_external = key->external.lower_yx_xuxv;
14867ec681f3Smrg         options.lower_ayuv_external = key->external.lower_ayuv;
14877ec681f3Smrg         options.lower_xyuv_external = key->external.lower_xyuv;
14887ec681f3Smrg         options.lower_yuv_external = key->external.lower_yuv;
14897ec681f3Smrg         options.lower_yu_yv_external = key->external.lower_yu_yv;
14907ec681f3Smrg         options.lower_y41x_external = key->external.lower_y41x;
14917ec681f3Smrg         NIR_PASS_V(state.ir.nir, nir_lower_tex, &options);
14927ec681f3Smrg         finalize = true;
14937ec681f3Smrg         need_lower_tex_src_plane = true;
149401e04c3fSmrg      }
149501e04c3fSmrg
14967ec681f3Smrg      if (finalize || !st->allow_st_finalize_nir_twice) {
14977ec681f3Smrg         char *msg = st_finalize_nir(st, &stfp->Base, stfp->shader_program, state.ir.nir,
14987ec681f3Smrg                                     false, false);
14997ec681f3Smrg         free(msg);
15007ec681f3Smrg      }
15013464ebd5Sriastradh
15027ec681f3Smrg      /* This pass needs to happen *after* nir_lower_sampler */
15037ec681f3Smrg      if (unlikely(need_lower_tex_src_plane)) {
15047ec681f3Smrg         NIR_PASS_V(state.ir.nir, st_nir_lower_tex_src_plane,
150501e04c3fSmrg                    ~stfp->Base.SamplersUsed,
15067ec681f3Smrg                    key->external.lower_nv12 | key->external.lower_xy_uxvx |
15077ec681f3Smrg                       key->external.lower_yx_xuxv,
150801e04c3fSmrg                    key->external.lower_iyuv);
15097ec681f3Smrg         finalize = true;
151001e04c3fSmrg      }
151101e04c3fSmrg
15127ec681f3Smrg      if (finalize || !st->allow_st_finalize_nir_twice) {
15137ec681f3Smrg         /* Some of the lowering above may have introduced new varyings */
15147ec681f3Smrg         nir_shader_gather_info(state.ir.nir,
15157ec681f3Smrg                                nir_shader_get_entrypoint(state.ir.nir));
1516b9abf16eSmaya
15177ec681f3Smrg         struct pipe_screen *screen = st->screen;
15187ec681f3Smrg         if (screen->finalize_nir) {
15197ec681f3Smrg            char *msg = screen->finalize_nir(screen, state.ir.nir);
15207ec681f3Smrg            free(msg);
15217ec681f3Smrg         }
15227ec681f3Smrg      }
15237ec681f3Smrg
15247ec681f3Smrg      variant->base.driver_shader = st_create_nir_shader(st, &state);
152501e04c3fSmrg      variant->key = *key;
152601e04c3fSmrg
152701e04c3fSmrg      return variant;
1528af69d88dSmrg   }
15293464ebd5Sriastradh
15307ec681f3Smrg   state.tokens = stfp->state.tokens;
153101e04c3fSmrg
153201e04c3fSmrg   assert(!(key->bitmap && key->drawpixels));
153301e04c3fSmrg
153401e04c3fSmrg   /* Emulate features. */
153501e04c3fSmrg   if (key->clamp_color || key->persample_shading) {
153601e04c3fSmrg      const struct tgsi_token *tokens;
153701e04c3fSmrg      unsigned flags =
153801e04c3fSmrg         (key->clamp_color ? TGSI_EMU_CLAMP_COLOR_OUTPUTS : 0) |
153901e04c3fSmrg         (key->persample_shading ? TGSI_EMU_FORCE_PERSAMPLE_INTERP : 0);
154001e04c3fSmrg
15417ec681f3Smrg      tokens = tgsi_emulate(state.tokens, flags);
154201e04c3fSmrg
154301e04c3fSmrg      if (tokens) {
15447ec681f3Smrg         if (state.tokens != stfp->state.tokens)
15457ec681f3Smrg            tgsi_free_tokens(state.tokens);
15467ec681f3Smrg         state.tokens = tokens;
154701e04c3fSmrg      } else
154801e04c3fSmrg         fprintf(stderr, "mesa: cannot emulate deprecated features\n");
154901e04c3fSmrg   }
155001e04c3fSmrg
155101e04c3fSmrg   /* glBitmap */
155201e04c3fSmrg   if (key->bitmap) {
155301e04c3fSmrg      const struct tgsi_token *tokens;
155401e04c3fSmrg
155501e04c3fSmrg      variant->bitmap_sampler = ffs(~stfp->Base.SamplersUsed) - 1;
155601e04c3fSmrg
15577ec681f3Smrg      tokens = st_get_bitmap_shader(state.tokens,
155801e04c3fSmrg                                    st->internal_target,
155901e04c3fSmrg                                    variant->bitmap_sampler,
156001e04c3fSmrg                                    st->needs_texcoord_semantic,
156101e04c3fSmrg                                    st->bitmap.tex_format ==
15627ec681f3Smrg                                    PIPE_FORMAT_R8_UNORM);
156301e04c3fSmrg
156401e04c3fSmrg      if (tokens) {
15657ec681f3Smrg         if (state.tokens != stfp->state.tokens)
15667ec681f3Smrg            tgsi_free_tokens(state.tokens);
15677ec681f3Smrg         state.tokens = tokens;
156801e04c3fSmrg      } else
156901e04c3fSmrg         fprintf(stderr, "mesa: cannot create a shader for glBitmap\n");
157001e04c3fSmrg   }
157101e04c3fSmrg
157201e04c3fSmrg   /* glDrawPixels (color only) */
157301e04c3fSmrg   if (key->drawpixels) {
157401e04c3fSmrg      const struct tgsi_token *tokens;
157501e04c3fSmrg      unsigned scale_const = 0, bias_const = 0, texcoord_const = 0;
157601e04c3fSmrg
157701e04c3fSmrg      /* Find the first unused slot. */
157801e04c3fSmrg      variant->drawpix_sampler = ffs(~stfp->Base.SamplersUsed) - 1;
157901e04c3fSmrg
158001e04c3fSmrg      if (key->pixelMaps) {
158101e04c3fSmrg         unsigned samplers_used = stfp->Base.SamplersUsed |
158201e04c3fSmrg                                  (1 << variant->drawpix_sampler);
158301e04c3fSmrg
158401e04c3fSmrg         variant->pixelmap_sampler = ffs(~samplers_used) - 1;
158501e04c3fSmrg      }
158601e04c3fSmrg
158701e04c3fSmrg      if (key->scaleAndBias) {
158801e04c3fSmrg         scale_const = _mesa_add_state_reference(params, scale_state);
158901e04c3fSmrg         bias_const = _mesa_add_state_reference(params, bias_state);
159001e04c3fSmrg      }
159101e04c3fSmrg
159201e04c3fSmrg      texcoord_const = _mesa_add_state_reference(params, texcoord_state);
159301e04c3fSmrg
15947ec681f3Smrg      tokens = st_get_drawpix_shader(state.tokens,
159501e04c3fSmrg                                     st->needs_texcoord_semantic,
159601e04c3fSmrg                                     key->scaleAndBias, scale_const,
159701e04c3fSmrg                                     bias_const, key->pixelMaps,
159801e04c3fSmrg                                     variant->drawpix_sampler,
159901e04c3fSmrg                                     variant->pixelmap_sampler,
160001e04c3fSmrg                                     texcoord_const, st->internal_target);
160101e04c3fSmrg
160201e04c3fSmrg      if (tokens) {
16037ec681f3Smrg         if (state.tokens != stfp->state.tokens)
16047ec681f3Smrg            tgsi_free_tokens(state.tokens);
16057ec681f3Smrg         state.tokens = tokens;
160601e04c3fSmrg      } else
160701e04c3fSmrg         fprintf(stderr, "mesa: cannot create a shader for glDrawPixels\n");
160801e04c3fSmrg   }
160901e04c3fSmrg
16107ec681f3Smrg   if (unlikely(key->external.lower_nv12 || key->external.lower_iyuv ||
16117ec681f3Smrg                key->external.lower_xy_uxvx || key->external.lower_yx_xuxv)) {
161201e04c3fSmrg      const struct tgsi_token *tokens;
161301e04c3fSmrg
161401e04c3fSmrg      /* samplers inserted would conflict, but this should be unpossible: */
161501e04c3fSmrg      assert(!(key->bitmap || key->drawpixels));
161601e04c3fSmrg
16177ec681f3Smrg      tokens = st_tgsi_lower_yuv(state.tokens,
161801e04c3fSmrg                                 ~stfp->Base.SamplersUsed,
16197ec681f3Smrg                                 key->external.lower_nv12 ||
16207ec681f3Smrg                                    key->external.lower_xy_uxvx ||
16217ec681f3Smrg                                    key->external.lower_yx_xuxv,
162201e04c3fSmrg                                 key->external.lower_iyuv);
162301e04c3fSmrg      if (tokens) {
16247ec681f3Smrg         if (state.tokens != stfp->state.tokens)
16257ec681f3Smrg            tgsi_free_tokens(state.tokens);
16267ec681f3Smrg         state.tokens = tokens;
162701e04c3fSmrg      } else {
162801e04c3fSmrg         fprintf(stderr, "mesa: cannot create a shader for samplerExternalOES\n");
162901e04c3fSmrg      }
163001e04c3fSmrg   }
163101e04c3fSmrg
16327ec681f3Smrg   if (key->lower_depth_clamp) {
16337ec681f3Smrg      unsigned depth_range_const = _mesa_add_state_reference(params, depth_range_state);
16347ec681f3Smrg
16357ec681f3Smrg      const struct tgsi_token *tokens;
16367ec681f3Smrg      tokens = st_tgsi_lower_depth_clamp_fs(state.tokens, depth_range_const);
16377ec681f3Smrg      if (state.tokens != stfp->state.tokens)
16387ec681f3Smrg         tgsi_free_tokens(state.tokens);
16397ec681f3Smrg      state.tokens = tokens;
16403464ebd5Sriastradh   }
16413464ebd5Sriastradh
16427ec681f3Smrg   if (ST_DEBUG & DEBUG_PRINT_IR)
16437ec681f3Smrg      tgsi_dump(state.tokens, 0);
16447ec681f3Smrg
164501e04c3fSmrg   /* fill in variant */
16467ec681f3Smrg   variant->base.driver_shader = pipe->create_fs_state(pipe, &state);
164701e04c3fSmrg   variant->key = *key;
164801e04c3fSmrg
16497ec681f3Smrg   if (state.tokens != stfp->state.tokens)
16507ec681f3Smrg      tgsi_free_tokens(state.tokens);
165101e04c3fSmrg   return variant;
165201e04c3fSmrg}
165301e04c3fSmrg
165401e04c3fSmrg/**
165501e04c3fSmrg * Translate fragment program if needed.
165601e04c3fSmrg */
165701e04c3fSmrgstruct st_fp_variant *
165801e04c3fSmrgst_get_fp_variant(struct st_context *st,
16597ec681f3Smrg                  struct st_program *stfp,
166001e04c3fSmrg                  const struct st_fp_variant_key *key)
166101e04c3fSmrg{
166201e04c3fSmrg   struct st_fp_variant *fpv;
16633464ebd5Sriastradh
166401e04c3fSmrg   /* Search for existing variant */
16657ec681f3Smrg   for (fpv = st_fp_variant(stfp->variants); fpv;
16667ec681f3Smrg        fpv = st_fp_variant(fpv->base.next)) {
166701e04c3fSmrg      if (memcmp(&fpv->key, key, sizeof(*key)) == 0) {
166801e04c3fSmrg         break;
166901e04c3fSmrg      }
167001e04c3fSmrg   }
167101e04c3fSmrg
167201e04c3fSmrg   if (!fpv) {
167301e04c3fSmrg      /* create new */
16747ec681f3Smrg
16757ec681f3Smrg      if (stfp->variants != NULL) {
16767ec681f3Smrg         _mesa_perf_debug(st->ctx, MESA_DEBUG_SEVERITY_MEDIUM,
16777ec681f3Smrg                          "Compiling fragment shader variant (%s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
16787ec681f3Smrg                          key->bitmap ? "bitmap," : "",
16797ec681f3Smrg                          key->drawpixels ? "drawpixels," : "",
16807ec681f3Smrg                          key->scaleAndBias ? "scale_bias," : "",
16817ec681f3Smrg                          key->pixelMaps ? "pixel_maps," : "",
16827ec681f3Smrg                          key->clamp_color ? "clamp_color," : "",
16837ec681f3Smrg                          key->persample_shading ? "persample_shading," : "",
16847ec681f3Smrg                          key->fog ? "fog," : "",
16857ec681f3Smrg                          key->lower_depth_clamp ? "depth_clamp," : "",
16867ec681f3Smrg                          key->lower_two_sided_color ? "twoside," : "",
16877ec681f3Smrg                          key->lower_flatshade ? "flatshade," : "",
16887ec681f3Smrg                          key->lower_texcoord_replace ? "texcoord_replace," : "",
16897ec681f3Smrg                          key->lower_alpha_func ? "alpha_compare," : "",
16907ec681f3Smrg                          /* skipped ATI_fs targets */
16917ec681f3Smrg                          stfp->Base.ExternalSamplersUsed ? "external?," : "",
16927ec681f3Smrg                          key->gl_clamp[0] || key->gl_clamp[1] || key->gl_clamp[2] ? "GL_CLAMP," : "");
16937ec681f3Smrg      }
16947ec681f3Smrg
169501e04c3fSmrg      fpv = st_create_fp_variant(st, stfp, key);
169601e04c3fSmrg      if (fpv) {
16977ec681f3Smrg         fpv->base.st = key->st;
16987ec681f3Smrg
16997ec681f3Smrg         st_add_variant(&stfp->variants, &fpv->base);
170001e04c3fSmrg      }
170101e04c3fSmrg   }
170201e04c3fSmrg
170301e04c3fSmrg   return fpv;
170401e04c3fSmrg}
170501e04c3fSmrg
170601e04c3fSmrg/**
170701e04c3fSmrg * Translate a program. This is common code for geometry and tessellation
170801e04c3fSmrg * shaders.
170901e04c3fSmrg */
17107ec681f3Smrgbool
17117ec681f3Smrgst_translate_common_program(struct st_context *st,
17127ec681f3Smrg                            struct st_program *stp)
171301e04c3fSmrg{
17147ec681f3Smrg   struct gl_program *prog = &stp->Base;
17157ec681f3Smrg   enum pipe_shader_type stage =
17167ec681f3Smrg      pipe_shader_type_from_mesa(stp->Base.info.stage);
17177ec681f3Smrg   struct ureg_program *ureg = ureg_create_with_screen(stage, st->screen);
17187ec681f3Smrg
17197ec681f3Smrg   if (ureg == NULL)
17207ec681f3Smrg      return false;
17217ec681f3Smrg
17227ec681f3Smrg   ureg_setup_shader_info(ureg, &stp->Base.info);
17237ec681f3Smrg
172401e04c3fSmrg   ubyte inputSlotToAttr[VARYING_SLOT_TESS_MAX];
172501e04c3fSmrg   ubyte inputMapping[VARYING_SLOT_TESS_MAX];
172601e04c3fSmrg   ubyte outputMapping[VARYING_SLOT_TESS_MAX];
172701e04c3fSmrg   GLuint attr;
172801e04c3fSmrg
172901e04c3fSmrg   ubyte input_semantic_name[PIPE_MAX_SHADER_INPUTS];
173001e04c3fSmrg   ubyte input_semantic_index[PIPE_MAX_SHADER_INPUTS];
173101e04c3fSmrg   uint num_inputs = 0;
173201e04c3fSmrg
173301e04c3fSmrg   ubyte output_semantic_name[PIPE_MAX_SHADER_OUTPUTS];
173401e04c3fSmrg   ubyte output_semantic_index[PIPE_MAX_SHADER_OUTPUTS];
173501e04c3fSmrg   uint num_outputs = 0;
173601e04c3fSmrg
173701e04c3fSmrg   GLint i;
173801e04c3fSmrg
173901e04c3fSmrg   memset(inputSlotToAttr, 0, sizeof(inputSlotToAttr));
17403464ebd5Sriastradh   memset(inputMapping, 0, sizeof(inputMapping));
17413464ebd5Sriastradh   memset(outputMapping, 0, sizeof(outputMapping));
17427ec681f3Smrg   memset(&stp->state, 0, sizeof(stp->state));
17434a49301eSmrg
17444a49301eSmrg   /*
17454a49301eSmrg    * Convert Mesa program inputs to TGSI input register semantics.
17464a49301eSmrg    */
1747af69d88dSmrg   for (attr = 0; attr < VARYING_SLOT_MAX; attr++) {
174801e04c3fSmrg      if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) == 0)
174901e04c3fSmrg         continue;
17503464ebd5Sriastradh
175101e04c3fSmrg      unsigned slot = num_inputs++;
17524a49301eSmrg
175301e04c3fSmrg      inputMapping[attr] = slot;
175401e04c3fSmrg      inputSlotToAttr[slot] = attr;
17553464ebd5Sriastradh
175601e04c3fSmrg      unsigned semantic_name, semantic_index;
175701e04c3fSmrg      tgsi_get_gl_varying_semantic(attr, st->needs_texcoord_semantic,
175801e04c3fSmrg                                   &semantic_name, &semantic_index);
175901e04c3fSmrg      input_semantic_name[slot] = semantic_name;
176001e04c3fSmrg      input_semantic_index[slot] = semantic_index;
176101e04c3fSmrg   }
17623464ebd5Sriastradh
176301e04c3fSmrg   /* Also add patch inputs. */
176401e04c3fSmrg   for (attr = 0; attr < 32; attr++) {
176501e04c3fSmrg      if (prog->info.patch_inputs_read & (1u << attr)) {
176601e04c3fSmrg         GLuint slot = num_inputs++;
176701e04c3fSmrg         GLuint patch_attr = VARYING_SLOT_PATCH0 + attr;
17683464ebd5Sriastradh
176901e04c3fSmrg         inputMapping[patch_attr] = slot;
177001e04c3fSmrg         inputSlotToAttr[slot] = patch_attr;
177101e04c3fSmrg         input_semantic_name[slot] = TGSI_SEMANTIC_PATCH;
177201e04c3fSmrg         input_semantic_index[slot] = attr;
1773cdc920a0Smrg      }
17744a49301eSmrg   }
17754a49301eSmrg
17763464ebd5Sriastradh   /* initialize output semantics to defaults */
17773464ebd5Sriastradh   for (i = 0; i < PIPE_MAX_SHADER_OUTPUTS; i++) {
177801e04c3fSmrg      output_semantic_name[i] = TGSI_SEMANTIC_GENERIC;
177901e04c3fSmrg      output_semantic_index[i] = 0;
17803464ebd5Sriastradh   }
17813464ebd5Sriastradh
17824a49301eSmrg   /*
17833464ebd5Sriastradh    * Determine number of outputs, the (default) output register
17843464ebd5Sriastradh    * mapping and the semantic information for each output.
17854a49301eSmrg    */
1786af69d88dSmrg   for (attr = 0; attr < VARYING_SLOT_MAX; attr++) {
178701e04c3fSmrg      if (prog->info.outputs_written & BITFIELD64_BIT(attr)) {
178801e04c3fSmrg         GLuint slot = num_outputs++;
17893464ebd5Sriastradh
17903464ebd5Sriastradh         outputMapping[attr] = slot;
17913464ebd5Sriastradh
179201e04c3fSmrg         unsigned semantic_name, semantic_index;
179301e04c3fSmrg         tgsi_get_gl_varying_semantic(attr, st->needs_texcoord_semantic,
179401e04c3fSmrg                                      &semantic_name, &semantic_index);
179501e04c3fSmrg         output_semantic_name[slot] = semantic_name;
179601e04c3fSmrg         output_semantic_index[slot] = semantic_index;
17974a49301eSmrg      }
17983464ebd5Sriastradh   }
17994a49301eSmrg
180001e04c3fSmrg   /* Also add patch outputs. */
180101e04c3fSmrg   for (attr = 0; attr < 32; attr++) {
180201e04c3fSmrg      if (prog->info.patch_outputs_written & (1u << attr)) {
180301e04c3fSmrg         GLuint slot = num_outputs++;
180401e04c3fSmrg         GLuint patch_attr = VARYING_SLOT_PATCH0 + attr;
180501e04c3fSmrg
180601e04c3fSmrg         outputMapping[patch_attr] = slot;
180701e04c3fSmrg         output_semantic_name[slot] = TGSI_SEMANTIC_PATCH;
180801e04c3fSmrg         output_semantic_index[slot] = attr;
18093464ebd5Sriastradh      }
18104a49301eSmrg   }
18114a49301eSmrg
181201e04c3fSmrg   st_translate_program(st->ctx,
18137ec681f3Smrg                        stage,
181401e04c3fSmrg                        ureg,
18157ec681f3Smrg                        stp->glsl_to_tgsi,
181601e04c3fSmrg                        prog,
181701e04c3fSmrg                        /* inputs */
181801e04c3fSmrg                        num_inputs,
181901e04c3fSmrg                        inputMapping,
182001e04c3fSmrg                        inputSlotToAttr,
182101e04c3fSmrg                        input_semantic_name,
182201e04c3fSmrg                        input_semantic_index,
182301e04c3fSmrg                        NULL,
182401e04c3fSmrg                        /* outputs */
182501e04c3fSmrg                        num_outputs,
182601e04c3fSmrg                        outputMapping,
182701e04c3fSmrg                        output_semantic_name,
182801e04c3fSmrg                        output_semantic_index);
182901e04c3fSmrg
18307ec681f3Smrg   stp->state.tokens = ureg_get_tokens(ureg, NULL);
18317ec681f3Smrg
183201e04c3fSmrg   ureg_destroy(ureg);
18333464ebd5Sriastradh
18347ec681f3Smrg   st_translate_stream_output_info(prog);
18354a49301eSmrg
183601e04c3fSmrg   st_store_ir_in_disk_cache(st, prog, false);
18374a49301eSmrg
18387ec681f3Smrg   if (ST_DEBUG & DEBUG_PRINT_IR && ST_DEBUG & DEBUG_MESA)
183901e04c3fSmrg      _mesa_print_program(prog);
184001e04c3fSmrg
18417ec681f3Smrg   free_glsl_to_tgsi_visitor(stp->glsl_to_tgsi);
18427ec681f3Smrg   stp->glsl_to_tgsi = NULL;
184301e04c3fSmrg   return true;
184401e04c3fSmrg}
184501e04c3fSmrg
184601e04c3fSmrg
18473464ebd5Sriastradh/**
18483464ebd5Sriastradh * Vert/Geom/Frag programs have per-context variants.  Free all the
18493464ebd5Sriastradh * variants attached to the given program which match the given context.
18503464ebd5Sriastradh */
18513464ebd5Sriastradhstatic void
185201e04c3fSmrgdestroy_program_variants(struct st_context *st, struct gl_program *target)
18533464ebd5Sriastradh{
185401e04c3fSmrg   if (!target || target == &_mesa_DummyProgram)
18553464ebd5Sriastradh      return;
18563464ebd5Sriastradh
18577ec681f3Smrg   struct st_program *p = st_program(target);
18587ec681f3Smrg   struct st_variant *v, **prevPtr = &p->variants;
18597ec681f3Smrg   bool unbound = false;
18607ec681f3Smrg
18617ec681f3Smrg   for (v = p->variants; v; ) {
18627ec681f3Smrg      struct st_variant *next = v->next;
18637ec681f3Smrg      if (v->st == st) {
18647ec681f3Smrg         if (!unbound) {
18657ec681f3Smrg            st_unbind_program(st, p);
18667ec681f3Smrg            unbound = true;
18673464ebd5Sriastradh         }
18687ec681f3Smrg
18697ec681f3Smrg         /* unlink from list */
18707ec681f3Smrg         *prevPtr = next;
18717ec681f3Smrg         /* destroy this variant */
18727ec681f3Smrg         delete_variant(st, v, target->Target);
18733464ebd5Sriastradh      }
18747ec681f3Smrg      else {
18757ec681f3Smrg         prevPtr = &v->next;
18763464ebd5Sriastradh      }
18777ec681f3Smrg      v = next;
18783464ebd5Sriastradh   }
18793464ebd5Sriastradh}
18803464ebd5Sriastradh
18813464ebd5Sriastradh
18823464ebd5Sriastradh/**
18833464ebd5Sriastradh * Callback for _mesa_HashWalk.  Free all the shader's program variants
18843464ebd5Sriastradh * which match the given context.
18853464ebd5Sriastradh */
18863464ebd5Sriastradhstatic void
18877ec681f3Smrgdestroy_shader_program_variants_cb(void *data, void *userData)
18883464ebd5Sriastradh{
18893464ebd5Sriastradh   struct st_context *st = (struct st_context *) userData;
18903464ebd5Sriastradh   struct gl_shader *shader = (struct gl_shader *) data;
18913464ebd5Sriastradh
18923464ebd5Sriastradh   switch (shader->Type) {
18933464ebd5Sriastradh   case GL_SHADER_PROGRAM_MESA:
18943464ebd5Sriastradh      {
18953464ebd5Sriastradh         struct gl_shader_program *shProg = (struct gl_shader_program *) data;
18963464ebd5Sriastradh         GLuint i;
18973464ebd5Sriastradh
18987ec681f3Smrg         for (i = 0; i < ARRAY_SIZE(shProg->_LinkedShaders); i++) {
18997ec681f3Smrg            if (shProg->_LinkedShaders[i])
1900af69d88dSmrg               destroy_program_variants(st, shProg->_LinkedShaders[i]->Program);
19017ec681f3Smrg         }
19023464ebd5Sriastradh      }
19033464ebd5Sriastradh      break;
19043464ebd5Sriastradh   case GL_VERTEX_SHADER:
19053464ebd5Sriastradh   case GL_FRAGMENT_SHADER:
19063464ebd5Sriastradh   case GL_GEOMETRY_SHADER:
190701e04c3fSmrg   case GL_TESS_CONTROL_SHADER:
190801e04c3fSmrg   case GL_TESS_EVALUATION_SHADER:
190901e04c3fSmrg   case GL_COMPUTE_SHADER:
19103464ebd5Sriastradh      break;
19113464ebd5Sriastradh   default:
19123464ebd5Sriastradh      assert(0);
19133464ebd5Sriastradh   }
19143464ebd5Sriastradh}
19153464ebd5Sriastradh
19163464ebd5Sriastradh
19173464ebd5Sriastradh/**
19183464ebd5Sriastradh * Callback for _mesa_HashWalk.  Free all the program variants which match
19193464ebd5Sriastradh * the given context.
19203464ebd5Sriastradh */
19213464ebd5Sriastradhstatic void
19227ec681f3Smrgdestroy_program_variants_cb(void *data, void *userData)
19233464ebd5Sriastradh{
19243464ebd5Sriastradh   struct st_context *st = (struct st_context *) userData;
19253464ebd5Sriastradh   struct gl_program *program = (struct gl_program *) data;
19263464ebd5Sriastradh   destroy_program_variants(st, program);
19273464ebd5Sriastradh}
19283464ebd5Sriastradh
19293464ebd5Sriastradh
19303464ebd5Sriastradh/**
19313464ebd5Sriastradh * Walk over all shaders and programs to delete any variants which
19323464ebd5Sriastradh * belong to the given context.
19333464ebd5Sriastradh * This is called during context tear-down.
19343464ebd5Sriastradh */
19353464ebd5Sriastradhvoid
19363464ebd5Sriastradhst_destroy_program_variants(struct st_context *st)
19373464ebd5Sriastradh{
193801e04c3fSmrg   /* If shaders can be shared with other contexts, the last context will
193901e04c3fSmrg    * call DeleteProgram on all shaders, releasing everything.
194001e04c3fSmrg    */
194101e04c3fSmrg   if (st->has_shareable_shaders)
194201e04c3fSmrg      return;
194301e04c3fSmrg
19443464ebd5Sriastradh   /* ARB vert/frag program */
19453464ebd5Sriastradh   _mesa_HashWalk(st->ctx->Shared->Programs,
19463464ebd5Sriastradh                  destroy_program_variants_cb, st);
19473464ebd5Sriastradh
19483464ebd5Sriastradh   /* GLSL vert/frag/geom shaders */
19493464ebd5Sriastradh   _mesa_HashWalk(st->ctx->Shared->ShaderObjects,
19503464ebd5Sriastradh                  destroy_shader_program_variants_cb, st);
19513464ebd5Sriastradh}
1952af69d88dSmrg
1953af69d88dSmrg
195401e04c3fSmrg/**
195501e04c3fSmrg * Compile one shader variant.
195601e04c3fSmrg */
19577ec681f3Smrgstatic void
195801e04c3fSmrgst_precompile_shader_variant(struct st_context *st,
195901e04c3fSmrg                             struct gl_program *prog)
196001e04c3fSmrg{
196101e04c3fSmrg   switch (prog->Target) {
19627ec681f3Smrg   case GL_VERTEX_PROGRAM_ARB:
19637ec681f3Smrg   case GL_TESS_CONTROL_PROGRAM_NV:
19647ec681f3Smrg   case GL_TESS_EVALUATION_PROGRAM_NV:
19657ec681f3Smrg   case GL_GEOMETRY_PROGRAM_NV:
19667ec681f3Smrg   case GL_COMPUTE_PROGRAM_NV: {
19677ec681f3Smrg      struct st_program *p = (struct st_program *)prog;
19687ec681f3Smrg      struct st_common_variant_key key;
196901e04c3fSmrg
197001e04c3fSmrg      memset(&key, 0, sizeof(key));
1971b9abf16eSmaya
19727ec681f3Smrg      if (st->ctx->API == API_OPENGL_COMPAT &&
19737ec681f3Smrg          st->clamp_vert_color_in_shader &&
19747ec681f3Smrg          (prog->info.outputs_written & (VARYING_SLOT_COL0 |
19757ec681f3Smrg                                         VARYING_SLOT_COL1 |
19767ec681f3Smrg                                         VARYING_SLOT_BFC0 |
19777ec681f3Smrg                                         VARYING_SLOT_BFC1))) {
19787ec681f3Smrg         key.clamp_color = true;
19797ec681f3Smrg      }
198001e04c3fSmrg
19817ec681f3Smrg      key.st = st->has_shareable_shaders ? NULL : st;
19827ec681f3Smrg      st_get_common_variant(st, p, &key);
198301e04c3fSmrg      break;
198401e04c3fSmrg   }
198501e04c3fSmrg
198601e04c3fSmrg   case GL_FRAGMENT_PROGRAM_ARB: {
19877ec681f3Smrg      struct st_program *p = (struct st_program *)prog;
198801e04c3fSmrg      struct st_fp_variant_key key;
198901e04c3fSmrg
199001e04c3fSmrg      memset(&key, 0, sizeof(key));
1991b9abf16eSmaya
199201e04c3fSmrg      key.st = st->has_shareable_shaders ? NULL : st;
19937ec681f3Smrg      key.lower_alpha_func = COMPARE_FUNC_ALWAYS;
19947ec681f3Smrg      if (p->ati_fs) {
19957ec681f3Smrg         for (int i = 0; i < ARRAY_SIZE(key.texture_index); i++)
19967ec681f3Smrg            key.texture_index[i] = TEXTURE_2D_INDEX;
19977ec681f3Smrg      }
199801e04c3fSmrg      st_get_fp_variant(st, p, &key);
199901e04c3fSmrg      break;
200001e04c3fSmrg   }
200101e04c3fSmrg
200201e04c3fSmrg   default:
200301e04c3fSmrg      assert(0);
200401e04c3fSmrg   }
200501e04c3fSmrg}
20067ec681f3Smrg
20077ec681f3Smrgvoid
20087ec681f3Smrgst_serialize_nir(struct st_program *stp)
20097ec681f3Smrg{
20107ec681f3Smrg   if (!stp->serialized_nir) {
20117ec681f3Smrg      struct blob blob;
20127ec681f3Smrg      size_t size;
20137ec681f3Smrg
20147ec681f3Smrg      blob_init(&blob);
20157ec681f3Smrg      nir_serialize(&blob, stp->Base.nir, false);
20167ec681f3Smrg      blob_finish_get_buffer(&blob, &stp->serialized_nir, &size);
20177ec681f3Smrg      stp->serialized_nir_size = size;
20187ec681f3Smrg   }
20197ec681f3Smrg}
20207ec681f3Smrg
20217ec681f3Smrgvoid
20227ec681f3Smrgst_finalize_program(struct st_context *st, struct gl_program *prog)
20237ec681f3Smrg{
20247ec681f3Smrg   if (st->current_program[prog->info.stage] == prog) {
20257ec681f3Smrg      if (prog->info.stage == MESA_SHADER_VERTEX)
20267ec681f3Smrg         st->dirty |= ST_NEW_VERTEX_PROGRAM(st, (struct st_program *)prog);
20277ec681f3Smrg      else
20287ec681f3Smrg         st->dirty |= ((struct st_program *)prog)->affected_states;
20297ec681f3Smrg   }
20307ec681f3Smrg
20317ec681f3Smrg   if (prog->nir) {
20327ec681f3Smrg      nir_sweep(prog->nir);
20337ec681f3Smrg
20347ec681f3Smrg      /* This is only needed for ARB_vp/fp programs and when the disk cache
20357ec681f3Smrg       * is disabled. If the disk cache is enabled, GLSL programs are
20367ec681f3Smrg       * serialized in write_nir_to_cache.
20377ec681f3Smrg       */
20387ec681f3Smrg      st_serialize_nir(st_program(prog));
20397ec681f3Smrg   }
20407ec681f3Smrg
20417ec681f3Smrg   /* Always create the default variant of the program. */
20427ec681f3Smrg   st_precompile_shader_variant(st, prog);
20437ec681f3Smrg}
2044