17117f1b4Smrg 27117f1b4Smrg/* 37117f1b4Smrg * Mesa 3-D graphics library 47117f1b4Smrg * 57117f1b4Smrg * Copyright (C) 1999-2001 Brian Paul All Rights Reserved. 67117f1b4Smrg * 77117f1b4Smrg * Permission is hereby granted, free of charge, to any person obtaining a 87117f1b4Smrg * copy of this software and associated documentation files (the "Software"), 97117f1b4Smrg * to deal in the Software without restriction, including without limitation 107117f1b4Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 117117f1b4Smrg * and/or sell copies of the Software, and to permit persons to whom the 127117f1b4Smrg * Software is furnished to do so, subject to the following conditions: 137117f1b4Smrg * 147117f1b4Smrg * The above copyright notice and this permission notice shall be included 157117f1b4Smrg * in all copies or substantial portions of the Software. 167117f1b4Smrg * 177117f1b4Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 187117f1b4Smrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 197117f1b4Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20af69d88dSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 21af69d88dSmrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22af69d88dSmrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 23af69d88dSmrg * OTHER DEALINGS IN THE SOFTWARE. 247117f1b4Smrg */ 257117f1b4Smrg 267117f1b4Smrg/* 277117f1b4Smrg * x86 CPUID feature information. The raw data is returned by 287117f1b4Smrg * _mesa_identify_x86_cpu_features() and interpreted with the cpu_has_* 297117f1b4Smrg * helper macros. 307117f1b4Smrg * 317117f1b4Smrg * Gareth Hughes 327117f1b4Smrg */ 337117f1b4Smrg 347117f1b4Smrg#ifndef __COMMON_X86_FEATURES_H__ 357117f1b4Smrg#define __COMMON_X86_FEATURES_H__ 367117f1b4Smrg 377117f1b4Smrg#define X86_FEATURE_FPU (1<<0) 387117f1b4Smrg#define X86_FEATURE_CMOV (1<<1) 397117f1b4Smrg#define X86_FEATURE_MMXEXT (1<<2) 407117f1b4Smrg#define X86_FEATURE_MMX (1<<3) 417117f1b4Smrg#define X86_FEATURE_FXSR (1<<4) 427117f1b4Smrg#define X86_FEATURE_XMM (1<<5) 437117f1b4Smrg#define X86_FEATURE_XMM2 (1<<6) 447117f1b4Smrg#define X86_FEATURE_3DNOWEXT (1<<7) 457117f1b4Smrg#define X86_FEATURE_3DNOW (1<<8) 46af69d88dSmrg#define X86_FEATURE_SSE4_1 (1<<9) 477117f1b4Smrg 487117f1b4Smrg/* standard X86 CPU features */ 497117f1b4Smrg#define X86_CPU_FPU (1<<0) 507117f1b4Smrg#define X86_CPU_CMOV (1<<15) 517117f1b4Smrg#define X86_CPU_MMX (1<<23) 527117f1b4Smrg#define X86_CPU_XMM (1<<25) 537117f1b4Smrg#define X86_CPU_XMM2 (1<<26) 54af69d88dSmrg/* ECX. */ 55af69d88dSmrg#define X86_CPU_SSE4_1 (1<<19) 567117f1b4Smrg 577117f1b4Smrg/* extended X86 CPU features */ 587117f1b4Smrg#define X86_CPUEXT_MMX_EXT (1<<22) 597117f1b4Smrg#define X86_CPUEXT_3DNOW_EXT (1<<30) 607117f1b4Smrg#define X86_CPUEXT_3DNOW (1<<31) 617117f1b4Smrg 6201e04c3fSmrg#ifdef __MMX__ 6301e04c3fSmrg#define cpu_has_mmx 1 6401e04c3fSmrg#else 657117f1b4Smrg#define cpu_has_mmx (_mesa_x86_cpu_features & X86_FEATURE_MMX) 6601e04c3fSmrg#endif 6701e04c3fSmrg 687117f1b4Smrg#define cpu_has_mmxext (_mesa_x86_cpu_features & X86_FEATURE_MMXEXT) 6901e04c3fSmrg 707ec681f3Smrg#if defined(__SSE__) || (defined(_M_IX86_FP) && (_M_IX86_FP >= 1)) || defined(_M_X64) 7101e04c3fSmrg#define cpu_has_xmm 1 7201e04c3fSmrg#else 737117f1b4Smrg#define cpu_has_xmm (_mesa_x86_cpu_features & X86_FEATURE_XMM) 7401e04c3fSmrg#endif 7501e04c3fSmrg 767ec681f3Smrg#if defined(__SSE2__) || (defined(_M_IX86_FP) && (_M_IX86_FP >= 2)) || defined(_M_X64) 7701e04c3fSmrg#define cpu_has_xmm2 1 7801e04c3fSmrg#else 797117f1b4Smrg#define cpu_has_xmm2 (_mesa_x86_cpu_features & X86_FEATURE_XMM2) 8001e04c3fSmrg#endif 8101e04c3fSmrg 8201e04c3fSmrg#ifdef __3dNOW__ 8301e04c3fSmrg#define cpu_has_3dnow 1 8401e04c3fSmrg#else 857117f1b4Smrg#define cpu_has_3dnow (_mesa_x86_cpu_features & X86_FEATURE_3DNOW) 8601e04c3fSmrg#endif 8701e04c3fSmrg 887117f1b4Smrg#define cpu_has_3dnowext (_mesa_x86_cpu_features & X86_FEATURE_3DNOWEXT) 8901e04c3fSmrg 9001e04c3fSmrg#ifdef __SSE4_1__ 9101e04c3fSmrg#define cpu_has_sse4_1 1 9201e04c3fSmrg#else 93af69d88dSmrg#define cpu_has_sse4_1 (_mesa_x86_cpu_features & X86_FEATURE_SSE4_1) 9401e04c3fSmrg#endif 957117f1b4Smrg 967117f1b4Smrg#endif 977117f1b4Smrg 98