17ec681f3Smrg/*
27ec681f3Smrg * Copyright (C) 2018-2019 Alyssa Rosenzweig <alyssa@rosenzweig.io>
37ec681f3Smrg * Copyright (C) 2019-2020 Collabora, Ltd.
47ec681f3Smrg *
57ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
67ec681f3Smrg * copy of this software and associated documentation files (the "Software"),
77ec681f3Smrg * to deal in the Software without restriction, including without limitation
87ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
97ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the
107ec681f3Smrg * Software is furnished to do so, subject to the following conditions:
117ec681f3Smrg *
127ec681f3Smrg * The above copyright notice and this permission notice (including the next
137ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the
147ec681f3Smrg * Software.
157ec681f3Smrg *
167ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
177ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
187ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
197ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
207ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
217ec681f3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
227ec681f3Smrg * SOFTWARE.
237ec681f3Smrg */
247ec681f3Smrg
257ec681f3Smrg#include <math.h>
267ec681f3Smrg#include <inttypes.h>
277ec681f3Smrg#include "util/half_float.h"
287ec681f3Smrg#include "midgard.h"
297ec681f3Smrg#include "helpers.h"
307ec681f3Smrg#include "midgard_ops.h"
317ec681f3Smrg
327ec681f3Smrgvoid
337ec681f3Smrgmir_print_constant_component(FILE *fp, const midgard_constants *consts, unsigned c,
347ec681f3Smrg                             midgard_reg_mode reg_mode, bool half,
357ec681f3Smrg                             unsigned mod, midgard_alu_op op)
367ec681f3Smrg{
377ec681f3Smrg        bool is_sint = false, is_uint = false, is_hex = false;
387ec681f3Smrg        const char *opname = alu_opcode_props[op].name;
397ec681f3Smrg
407ec681f3Smrg        bool is_int = midgard_is_integer_op(op);
417ec681f3Smrg
427ec681f3Smrg        /* Add a sentinel name to prevent crashing */
437ec681f3Smrg        if (!opname)
447ec681f3Smrg                opname = "unknown";
457ec681f3Smrg
467ec681f3Smrg        if (is_int) {
477ec681f3Smrg                is_uint = midgard_is_unsigned_op(op);
487ec681f3Smrg
497ec681f3Smrg                if (!is_uint) {
507ec681f3Smrg                        /* Bit ops are easier to follow when the constant is printed in
517ec681f3Smrg                         * hexadecimal. Other operations starting with a 'i' are
527ec681f3Smrg                         * considered to operate on signed integers. That might not
537ec681f3Smrg                         * be true for all of them, but it's good enough for traces.
547ec681f3Smrg                         */
557ec681f3Smrg                        if (op >= midgard_alu_op_iand &&
567ec681f3Smrg                            op <= midgard_alu_op_ipopcnt)
577ec681f3Smrg                                is_hex = true;
587ec681f3Smrg                        else
597ec681f3Smrg                                is_sint = true;
607ec681f3Smrg                }
617ec681f3Smrg	}
627ec681f3Smrg
637ec681f3Smrg        if (half)
647ec681f3Smrg                reg_mode--;
657ec681f3Smrg
667ec681f3Smrg        switch (reg_mode) {
677ec681f3Smrg        case midgard_reg_mode_64:
687ec681f3Smrg                if (is_sint) {
697ec681f3Smrg                        fprintf(fp, "%"PRIi64, consts->i64[c]);
707ec681f3Smrg                } else if (is_uint) {
717ec681f3Smrg                        fprintf(fp, "%"PRIu64, consts->u64[c]);
727ec681f3Smrg                } else if (is_hex) {
737ec681f3Smrg                        fprintf(fp, "0x%"PRIX64, consts->u64[c]);
747ec681f3Smrg                } else {
757ec681f3Smrg                        double v = consts->f64[c];
767ec681f3Smrg
777ec681f3Smrg                        if (mod & MIDGARD_FLOAT_MOD_ABS) v = fabs(v);
787ec681f3Smrg                        if (mod & MIDGARD_FLOAT_MOD_NEG) v = -v;
797ec681f3Smrg
807ec681f3Smrg                        printf("%g", v);
817ec681f3Smrg                }
827ec681f3Smrg                break;
837ec681f3Smrg
847ec681f3Smrg        case midgard_reg_mode_32:
857ec681f3Smrg                if (is_sint) {
867ec681f3Smrg                        int64_t v;
877ec681f3Smrg
887ec681f3Smrg                        if (half && mod == midgard_int_zero_extend)
897ec681f3Smrg                                v = consts->u32[c];
907ec681f3Smrg                        else if (half && mod == midgard_int_left_shift)
917ec681f3Smrg                                v = (uint64_t)consts->u32[c] << 32;
927ec681f3Smrg                        else
937ec681f3Smrg                                v = consts->i32[c];
947ec681f3Smrg
957ec681f3Smrg                        fprintf(fp, "%"PRIi64, v);
967ec681f3Smrg                } else if (is_uint || is_hex) {
977ec681f3Smrg                        uint64_t v;
987ec681f3Smrg
997ec681f3Smrg                        if (half && mod == midgard_int_left_shift)
1007ec681f3Smrg                                v = (uint64_t)consts->u32[c] << 32;
1017ec681f3Smrg                        else
1027ec681f3Smrg                                v = consts->u32[c];
1037ec681f3Smrg
1047ec681f3Smrg                        fprintf(fp, is_uint ? "%"PRIu64 : "0x%"PRIX64, v);
1057ec681f3Smrg                } else {
1067ec681f3Smrg                        float v = consts->f32[c];
1077ec681f3Smrg
1087ec681f3Smrg                        if (mod & MIDGARD_FLOAT_MOD_ABS) v = fabsf(v);
1097ec681f3Smrg                        if (mod & MIDGARD_FLOAT_MOD_NEG) v = -v;
1107ec681f3Smrg
1117ec681f3Smrg                        fprintf(fp, "%g", v);
1127ec681f3Smrg                }
1137ec681f3Smrg                break;
1147ec681f3Smrg
1157ec681f3Smrg        case midgard_reg_mode_16:
1167ec681f3Smrg                if (is_sint) {
1177ec681f3Smrg                        int32_t v;
1187ec681f3Smrg
1197ec681f3Smrg                        if (half && mod == midgard_int_zero_extend)
1207ec681f3Smrg                                v = consts->u16[c];
1217ec681f3Smrg                        else if (half && mod == midgard_int_left_shift)
1227ec681f3Smrg                                v = (uint32_t)consts->u16[c] << 16;
1237ec681f3Smrg                        else
1247ec681f3Smrg                                v = consts->i16[c];
1257ec681f3Smrg
1267ec681f3Smrg                        fprintf(fp, "%d", v);
1277ec681f3Smrg                } else if (is_uint || is_hex) {
1287ec681f3Smrg                        uint32_t v;
1297ec681f3Smrg
1307ec681f3Smrg                        if (half && mod == midgard_int_left_shift)
1317ec681f3Smrg                                v = (uint32_t)consts->u16[c] << 16;
1327ec681f3Smrg                        else
1337ec681f3Smrg                                v = consts->u16[c];
1347ec681f3Smrg
1357ec681f3Smrg                        fprintf(fp, is_uint ? "%u" : "0x%X", v);
1367ec681f3Smrg                } else {
1377ec681f3Smrg                        float v = _mesa_half_to_float(consts->f16[c]);
1387ec681f3Smrg
1397ec681f3Smrg                        if (mod & MIDGARD_FLOAT_MOD_ABS) v = fabsf(v);
1407ec681f3Smrg                        if (mod & MIDGARD_FLOAT_MOD_NEG) v = -v;
1417ec681f3Smrg
1427ec681f3Smrg                        fprintf(fp, "%g", v);
1437ec681f3Smrg                }
1447ec681f3Smrg                break;
1457ec681f3Smrg
1467ec681f3Smrg        case midgard_reg_mode_8:
1477ec681f3Smrg                fprintf(fp, "0x%X", consts->u8[c]);
1487ec681f3Smrg
1497ec681f3Smrg                if (mod)
1507ec681f3Smrg                        fprintf(fp, " /* %u */", mod);
1517ec681f3Smrg
1527ec681f3Smrg                assert(!half); /* No 4-bit */
1537ec681f3Smrg
1547ec681f3Smrg                break;
1557ec681f3Smrg        }
1567ec681f3Smrg}
1577ec681f3Smrg
1587ec681f3Smrg
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