etnaviv_drmif.h revision d8807b2f 
1/*
2 * Copyright (C) 2014-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Christian Gmeiner <christian.gmeiner@gmail.com>
25 */
26
27#ifndef ETNAVIV_DRMIF_H_
28#define ETNAVIV_DRMIF_H_
29
30#include <xf86drm.h>
31#include <stdint.h>
32
33struct etna_bo;
34struct etna_pipe;
35struct etna_gpu;
36struct etna_device;
37struct etna_cmd_stream;
38
39enum etna_pipe_id {
40	ETNA_PIPE_3D = 0,
41	ETNA_PIPE_2D = 1,
42	ETNA_PIPE_VG = 2,
43	ETNA_PIPE_MAX
44};
45
46enum etna_param_id {
47	ETNA_GPU_MODEL                     = 0x1,
48	ETNA_GPU_REVISION                  = 0x2,
49	ETNA_GPU_FEATURES_0                = 0x3,
50	ETNA_GPU_FEATURES_1                = 0x4,
51	ETNA_GPU_FEATURES_2                = 0x5,
52	ETNA_GPU_FEATURES_3                = 0x6,
53	ETNA_GPU_FEATURES_4                = 0x7,
54	ETNA_GPU_FEATURES_5                = 0x8,
55	ETNA_GPU_FEATURES_6                = 0x9,
56
57	ETNA_GPU_STREAM_COUNT              = 0x10,
58	ETNA_GPU_REGISTER_MAX              = 0x11,
59	ETNA_GPU_THREAD_COUNT              = 0x12,
60	ETNA_GPU_VERTEX_CACHE_SIZE         = 0x13,
61	ETNA_GPU_SHADER_CORE_COUNT         = 0x14,
62	ETNA_GPU_PIXEL_PIPES               = 0x15,
63	ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE = 0x16,
64	ETNA_GPU_BUFFER_SIZE               = 0x17,
65	ETNA_GPU_INSTRUCTION_COUNT         = 0x18,
66	ETNA_GPU_NUM_CONSTANTS             = 0x19,
67	ETNA_GPU_NUM_VARYINGS              = 0x1a
68};
69
70/* bo flags: */
71#define DRM_ETNA_GEM_CACHE_CACHED       0x00010000
72#define DRM_ETNA_GEM_CACHE_WC           0x00020000
73#define DRM_ETNA_GEM_CACHE_UNCACHED     0x00040000
74#define DRM_ETNA_GEM_CACHE_MASK         0x000f0000
75/* map flags */
76#define DRM_ETNA_GEM_FORCE_MMU          0x00100000
77
78/* bo access flags: (keep aligned to ETNA_PREP_x) */
79#define DRM_ETNA_PREP_READ              0x01
80#define DRM_ETNA_PREP_WRITE             0x02
81#define DRM_ETNA_PREP_NOSYNC            0x04
82
83/* device functions:
84 */
85
86struct etna_device *etna_device_new(int fd);
87struct etna_device *etna_device_new_dup(int fd);
88struct etna_device *etna_device_ref(struct etna_device *dev);
89void etna_device_del(struct etna_device *dev);
90int etna_device_fd(struct etna_device *dev);
91
92/* gpu functions:
93 */
94
95struct etna_gpu *etna_gpu_new(struct etna_device *dev, unsigned int core);
96void etna_gpu_del(struct etna_gpu *gpu);
97int etna_gpu_get_param(struct etna_gpu *gpu, enum etna_param_id param,
98		uint64_t *value);
99
100
101/* pipe functions:
102 */
103
104struct etna_pipe *etna_pipe_new(struct etna_gpu *gpu, enum etna_pipe_id id);
105void etna_pipe_del(struct etna_pipe *pipe);
106int etna_pipe_wait(struct etna_pipe *pipe, uint32_t timestamp, uint32_t ms);
107int etna_pipe_wait_ns(struct etna_pipe *pipe, uint32_t timestamp, uint64_t ns);
108
109
110/* buffer-object functions:
111 */
112
113struct etna_bo *etna_bo_new(struct etna_device *dev,
114		uint32_t size, uint32_t flags);
115struct etna_bo *etna_bo_from_handle(struct etna_device *dev,
116		uint32_t handle, uint32_t size);
117struct etna_bo *etna_bo_from_name(struct etna_device *dev, uint32_t name);
118struct etna_bo *etna_bo_from_dmabuf(struct etna_device *dev, int fd);
119struct etna_bo *etna_bo_ref(struct etna_bo *bo);
120void etna_bo_del(struct etna_bo *bo);
121int etna_bo_get_name(struct etna_bo *bo, uint32_t *name);
122uint32_t etna_bo_handle(struct etna_bo *bo);
123int etna_bo_dmabuf(struct etna_bo *bo);
124uint32_t etna_bo_size(struct etna_bo *bo);
125void * etna_bo_map(struct etna_bo *bo);
126int etna_bo_cpu_prep(struct etna_bo *bo, uint32_t op);
127void etna_bo_cpu_fini(struct etna_bo *bo);
128
129
130/* cmd stream functions:
131 */
132
133struct etna_cmd_stream {
134	uint32_t *buffer;
135	uint32_t offset;	/* in 32-bit words */
136	uint32_t size;		/* in 32-bit words */
137};
138
139struct etna_cmd_stream *etna_cmd_stream_new(struct etna_pipe *pipe, uint32_t size,
140		void (*reset_notify)(struct etna_cmd_stream *stream, void *priv),
141		void *priv);
142void etna_cmd_stream_del(struct etna_cmd_stream *stream);
143uint32_t etna_cmd_stream_timestamp(struct etna_cmd_stream *stream);
144void etna_cmd_stream_flush(struct etna_cmd_stream *stream);
145void etna_cmd_stream_flush2(struct etna_cmd_stream *stream, int in_fence_fd,
146			    int *out_fence_fd);
147void etna_cmd_stream_finish(struct etna_cmd_stream *stream);
148
149static inline uint32_t etna_cmd_stream_avail(struct etna_cmd_stream *stream)
150{
151	static const uint32_t END_CLEARANCE = 2; /* LINK op code */
152
153	return stream->size - stream->offset - END_CLEARANCE;
154}
155
156static inline void etna_cmd_stream_reserve(struct etna_cmd_stream *stream, size_t n)
157{
158	if (etna_cmd_stream_avail(stream) < n)
159		etna_cmd_stream_flush(stream);
160}
161
162static inline void etna_cmd_stream_emit(struct etna_cmd_stream *stream, uint32_t data)
163{
164	stream->buffer[stream->offset++] = data;
165}
166
167static inline uint32_t etna_cmd_stream_get(struct etna_cmd_stream *stream, uint32_t offset)
168{
169	return stream->buffer[offset];
170}
171
172static inline void etna_cmd_stream_set(struct etna_cmd_stream *stream, uint32_t offset,
173		uint32_t data)
174{
175	stream->buffer[offset] = data;
176}
177
178static inline uint32_t etna_cmd_stream_offset(struct etna_cmd_stream *stream)
179{
180	return stream->offset;
181}
182
183struct etna_reloc {
184	struct etna_bo *bo;
185#define ETNA_RELOC_READ             0x0001
186#define ETNA_RELOC_WRITE            0x0002
187	uint32_t flags;
188	uint32_t offset;
189};
190
191void etna_cmd_stream_reloc(struct etna_cmd_stream *stream, const struct etna_reloc *r);
192
193#endif /* ETNAVIV_DRMIF_H_ */
194