1e88f27b3Smrg/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */ 2e88f27b3Smrg 3e88f27b3Smrg/* 4e88f27b3Smrg * Copyright (C) 2013 Rob Clark <robclark@freedesktop.org> 5e88f27b3Smrg * 6e88f27b3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 7e88f27b3Smrg * copy of this software and associated documentation files (the "Software"), 8e88f27b3Smrg * to deal in the Software without restriction, including without limitation 9e88f27b3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10e88f27b3Smrg * and/or sell copies of the Software, and to permit persons to whom the 11e88f27b3Smrg * Software is furnished to do so, subject to the following conditions: 12e88f27b3Smrg * 13e88f27b3Smrg * The above copyright notice and this permission notice (including the next 14e88f27b3Smrg * paragraph) shall be included in all copies or substantial portions of the 15e88f27b3Smrg * Software. 16e88f27b3Smrg * 17e88f27b3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18e88f27b3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19e88f27b3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20e88f27b3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21e88f27b3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22e88f27b3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 23e88f27b3Smrg * SOFTWARE. 24e88f27b3Smrg * 25e88f27b3Smrg * Authors: 26e88f27b3Smrg * Rob Clark <robclark@freedesktop.org> 27e88f27b3Smrg */ 28e88f27b3Smrg 29e88f27b3Smrg#include "kgsl_priv.h" 30e88f27b3Smrg 31e88f27b3Smrgstatic int set_memtype(struct fd_device *dev, uint32_t handle, uint32_t flags) 32e88f27b3Smrg{ 33e88f27b3Smrg struct drm_kgsl_gem_memtype req = { 34e88f27b3Smrg .handle = handle, 35e88f27b3Smrg .type = flags & DRM_FREEDRENO_GEM_TYPE_MEM_MASK, 36e88f27b3Smrg }; 37e88f27b3Smrg 38e88f27b3Smrg return drmCommandWrite(dev->fd, DRM_KGSL_GEM_SETMEMTYPE, 39e88f27b3Smrg &req, sizeof(req)); 40e88f27b3Smrg} 41e88f27b3Smrg 42e88f27b3Smrgstatic int bo_alloc(struct kgsl_bo *kgsl_bo) 43e88f27b3Smrg{ 44e88f27b3Smrg struct fd_bo *bo = &kgsl_bo->base; 45e88f27b3Smrg if (!kgsl_bo->offset) { 46e88f27b3Smrg struct drm_kgsl_gem_alloc req = { 47e88f27b3Smrg .handle = bo->handle, 48e88f27b3Smrg }; 49e88f27b3Smrg int ret; 50e88f27b3Smrg 51e88f27b3Smrg /* if the buffer is already backed by pages then this 52e88f27b3Smrg * doesn't actually do anything (other than giving us 53e88f27b3Smrg * the offset) 54e88f27b3Smrg */ 55e88f27b3Smrg ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_ALLOC, 56e88f27b3Smrg &req, sizeof(req)); 57e88f27b3Smrg if (ret) { 58e88f27b3Smrg ERROR_MSG("alloc failed: %s", strerror(errno)); 59e88f27b3Smrg return ret; 60e88f27b3Smrg } 61e88f27b3Smrg 62e88f27b3Smrg kgsl_bo->offset = req.offset; 63e88f27b3Smrg } 64e88f27b3Smrg 65e88f27b3Smrg return 0; 66e88f27b3Smrg} 67e88f27b3Smrg 68e88f27b3Smrgstatic int kgsl_bo_offset(struct fd_bo *bo, uint64_t *offset) 69e88f27b3Smrg{ 70e88f27b3Smrg struct kgsl_bo *kgsl_bo = to_kgsl_bo(bo); 71e88f27b3Smrg int ret = bo_alloc(kgsl_bo); 72e88f27b3Smrg if (ret) 73e88f27b3Smrg return ret; 74e88f27b3Smrg *offset = kgsl_bo->offset; 75e88f27b3Smrg return 0; 76e88f27b3Smrg} 77e88f27b3Smrg 78e88f27b3Smrgstatic int kgsl_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op) 79e88f27b3Smrg{ 80e88f27b3Smrg uint32_t timestamp = kgsl_bo_get_timestamp(to_kgsl_bo(bo)); 81e88f27b3Smrg 82e88f27b3Smrg if (op & DRM_FREEDRENO_PREP_NOSYNC) { 83e88f27b3Smrg uint32_t current; 84e88f27b3Smrg int ret; 85e88f27b3Smrg 86e88f27b3Smrg /* special case for is_idle().. we can't really handle that 87e88f27b3Smrg * properly in kgsl (perhaps we need a way to just disable 88e88f27b3Smrg * the bo-cache for kgsl?) 89e88f27b3Smrg */ 90e88f27b3Smrg if (!pipe) 91e88f27b3Smrg return -EBUSY; 92e88f27b3Smrg 93e88f27b3Smrg ret = kgsl_pipe_timestamp(to_kgsl_pipe(pipe), ¤t); 94e88f27b3Smrg if (ret) 95e88f27b3Smrg return ret; 96e88f27b3Smrg 97e88f27b3Smrg if (timestamp > current) 98e88f27b3Smrg return -EBUSY; 99e88f27b3Smrg 100e88f27b3Smrg return 0; 101e88f27b3Smrg } 102e88f27b3Smrg 103e88f27b3Smrg if (timestamp) 104e88f27b3Smrg fd_pipe_wait(pipe, timestamp); 105e88f27b3Smrg 106e88f27b3Smrg return 0; 107e88f27b3Smrg} 108e88f27b3Smrg 109e88f27b3Smrgstatic void kgsl_bo_cpu_fini(struct fd_bo *bo) 110e88f27b3Smrg{ 111e88f27b3Smrg} 112e88f27b3Smrg 1133f012e29Smrgstatic int kgsl_bo_madvise(struct fd_bo *bo, int willneed) 1143f012e29Smrg{ 1153f012e29Smrg return willneed; /* not supported by kgsl */ 1163f012e29Smrg} 1173f012e29Smrg 118e88f27b3Smrgstatic void kgsl_bo_destroy(struct fd_bo *bo) 119e88f27b3Smrg{ 120e88f27b3Smrg struct kgsl_bo *kgsl_bo = to_kgsl_bo(bo); 121e88f27b3Smrg free(kgsl_bo); 122e88f27b3Smrg 123e88f27b3Smrg} 124e88f27b3Smrg 1253f012e29Smrgstatic const struct fd_bo_funcs funcs = { 126e88f27b3Smrg .offset = kgsl_bo_offset, 127e88f27b3Smrg .cpu_prep = kgsl_bo_cpu_prep, 128e88f27b3Smrg .cpu_fini = kgsl_bo_cpu_fini, 1293f012e29Smrg .madvise = kgsl_bo_madvise, 130e88f27b3Smrg .destroy = kgsl_bo_destroy, 131e88f27b3Smrg}; 132e88f27b3Smrg 133e88f27b3Smrg/* allocate a buffer handle: */ 134e6188e58Smrgdrm_private int kgsl_bo_new_handle(struct fd_device *dev, 135e88f27b3Smrg uint32_t size, uint32_t flags, uint32_t *handle) 136e88f27b3Smrg{ 137e88f27b3Smrg struct drm_kgsl_gem_create req = { 138e88f27b3Smrg .size = size, 139e88f27b3Smrg }; 140e88f27b3Smrg int ret; 141e88f27b3Smrg 142e88f27b3Smrg ret = drmCommandWriteRead(dev->fd, DRM_KGSL_GEM_CREATE, 143e88f27b3Smrg &req, sizeof(req)); 144e88f27b3Smrg if (ret) 145e88f27b3Smrg return ret; 146e88f27b3Smrg 147e88f27b3Smrg // TODO make flags match msm driver, since kgsl is legacy.. 148e88f27b3Smrg // translate flags in kgsl.. 149e88f27b3Smrg 150e88f27b3Smrg set_memtype(dev, req.handle, flags); 151e88f27b3Smrg 152e88f27b3Smrg *handle = req.handle; 153e88f27b3Smrg 154e88f27b3Smrg return 0; 155e88f27b3Smrg} 156e88f27b3Smrg 157e88f27b3Smrg/* allocate a new buffer object */ 158e6188e58Smrgdrm_private struct fd_bo * kgsl_bo_from_handle(struct fd_device *dev, 159e88f27b3Smrg uint32_t size, uint32_t handle) 160e88f27b3Smrg{ 161e88f27b3Smrg struct kgsl_bo *kgsl_bo; 162e88f27b3Smrg struct fd_bo *bo; 163e88f27b3Smrg unsigned i; 164e88f27b3Smrg 165e88f27b3Smrg kgsl_bo = calloc(1, sizeof(*kgsl_bo)); 166e88f27b3Smrg if (!kgsl_bo) 167e88f27b3Smrg return NULL; 168e88f27b3Smrg 169e88f27b3Smrg bo = &kgsl_bo->base; 170e88f27b3Smrg bo->funcs = &funcs; 171e88f27b3Smrg 172e88f27b3Smrg for (i = 0; i < ARRAY_SIZE(kgsl_bo->list); i++) 173e88f27b3Smrg list_inithead(&kgsl_bo->list[i]); 174e88f27b3Smrg 175e88f27b3Smrg return bo; 176e88f27b3Smrg} 177e88f27b3Smrg 1787cdc0497Smrgdrm_public struct fd_bo * 179baaff307Smrgfd_bo_from_fbdev(struct fd_pipe *pipe, int fbfd, uint32_t size) 180e88f27b3Smrg{ 181e88f27b3Smrg struct fd_bo *bo; 182e88f27b3Smrg 183e88f27b3Smrg if (!is_kgsl_pipe(pipe)) 184e88f27b3Smrg return NULL; 185e88f27b3Smrg 186857b0bc6Smrg bo = fd_bo_new(pipe->dev, 1, 0); 187e88f27b3Smrg 188e88f27b3Smrg /* this is fugly, but works around a bug in the kernel.. 189e88f27b3Smrg * priv->memdesc.size never gets set, so getbufinfo ioctl 190e88f27b3Smrg * thinks the buffer hasn't be allocate and fails 191e88f27b3Smrg */ 192857b0bc6Smrg if (bo) { 193baaff307Smrg void *fbmem = drm_mmap(NULL, size, PROT_READ | PROT_WRITE, 194e88f27b3Smrg MAP_SHARED, fbfd, 0); 195e88f27b3Smrg struct kgsl_map_user_mem req = { 196e88f27b3Smrg .memtype = KGSL_USER_MEM_TYPE_ADDR, 197e88f27b3Smrg .len = size, 198e88f27b3Smrg .offset = 0, 199e88f27b3Smrg .hostptr = (unsigned long)fbmem, 200e88f27b3Smrg }; 201857b0bc6Smrg struct kgsl_bo *kgsl_bo = to_kgsl_bo(bo); 202e88f27b3Smrg int ret; 203857b0bc6Smrg 204e88f27b3Smrg ret = ioctl(to_kgsl_pipe(pipe)->fd, IOCTL_KGSL_MAP_USER_MEM, &req); 205e88f27b3Smrg if (ret) { 206e88f27b3Smrg ERROR_MSG("mapping user mem failed: %s", 207e88f27b3Smrg strerror(errno)); 208e88f27b3Smrg goto fail; 209e88f27b3Smrg } 210e88f27b3Smrg kgsl_bo->gpuaddr = req.gpuaddr; 211e88f27b3Smrg bo->map = fbmem; 212e88f27b3Smrg } 213e88f27b3Smrg 214e88f27b3Smrg return bo; 215e88f27b3Smrgfail: 216e88f27b3Smrg if (bo) 217e88f27b3Smrg fd_bo_del(bo); 218e88f27b3Smrg return NULL; 219e88f27b3Smrg} 220e88f27b3Smrg 221e6188e58Smrgdrm_private uint32_t kgsl_bo_gpuaddr(struct kgsl_bo *kgsl_bo, uint32_t offset) 222e88f27b3Smrg{ 223e88f27b3Smrg struct fd_bo *bo = &kgsl_bo->base; 224e88f27b3Smrg if (!kgsl_bo->gpuaddr) { 225e88f27b3Smrg struct drm_kgsl_gem_bufinfo req = { 226e88f27b3Smrg .handle = bo->handle, 227e88f27b3Smrg }; 228e88f27b3Smrg int ret; 229e88f27b3Smrg 230e88f27b3Smrg ret = bo_alloc(kgsl_bo); 231e88f27b3Smrg if (ret) { 232e88f27b3Smrg return ret; 233e88f27b3Smrg } 234e88f27b3Smrg 235e88f27b3Smrg ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO, 236e88f27b3Smrg &req, sizeof(req)); 237e88f27b3Smrg if (ret) { 238e88f27b3Smrg ERROR_MSG("get bufinfo failed: %s", strerror(errno)); 239e88f27b3Smrg return 0; 240e88f27b3Smrg } 241e88f27b3Smrg 242e88f27b3Smrg kgsl_bo->gpuaddr = req.gpuaddr[0]; 243e88f27b3Smrg } 244e88f27b3Smrg return kgsl_bo->gpuaddr + offset; 245e88f27b3Smrg} 246e88f27b3Smrg 247e88f27b3Smrg/* 248e88f27b3Smrg * Super-cheezy way to synchronization between mesa and ddx.. the 249e88f27b3Smrg * SET_ACTIVE ioctl gives us a way to stash a 32b # w/ a GEM bo, and 250e88f27b3Smrg * GET_BUFINFO gives us a way to retrieve it. We use this to stash 251e88f27b3Smrg * the timestamp of the last ISSUEIBCMDS on the buffer. 252e88f27b3Smrg * 253e88f27b3Smrg * To avoid an obscene amount of syscalls, we: 254e88f27b3Smrg * 1) Only set the timestamp for buffers w/ an flink name, ie. 255e88f27b3Smrg * only buffers shared across processes. This is enough to 256e88f27b3Smrg * catch the DRI2 buffers. 257e88f27b3Smrg * 2) Only set the timestamp for buffers submitted to the 3d ring 258e88f27b3Smrg * and only check the timestamps on buffers submitted to the 259e88f27b3Smrg * 2d ring. This should be enough to handle synchronizing of 260e88f27b3Smrg * presentation blit. We could do synchronization in the other 261e88f27b3Smrg * direction too, but that would be problematic if we are using 262e88f27b3Smrg * the 3d ring from DDX, since client side wouldn't know this. 263e88f27b3Smrg * 264e88f27b3Smrg * The waiting on timestamp happens before flush, and setting of 265e88f27b3Smrg * timestamp happens after flush. It is transparent to the user 266e88f27b3Smrg * of libdrm_freedreno as all the tracking of buffers happens via 267e88f27b3Smrg * _emit_reloc().. 268e88f27b3Smrg */ 269e88f27b3Smrg 270e6188e58Smrgdrm_private void kgsl_bo_set_timestamp(struct kgsl_bo *kgsl_bo, 271e6188e58Smrg uint32_t timestamp) 272e88f27b3Smrg{ 273e88f27b3Smrg struct fd_bo *bo = &kgsl_bo->base; 274e88f27b3Smrg if (bo->name) { 275e88f27b3Smrg struct drm_kgsl_gem_active req = { 276e88f27b3Smrg .handle = bo->handle, 277e88f27b3Smrg .active = timestamp, 278e88f27b3Smrg }; 279e88f27b3Smrg int ret; 280e88f27b3Smrg 281e88f27b3Smrg ret = drmCommandWrite(bo->dev->fd, DRM_KGSL_GEM_SET_ACTIVE, 282e88f27b3Smrg &req, sizeof(req)); 283e88f27b3Smrg if (ret) { 284e88f27b3Smrg ERROR_MSG("set active failed: %s", strerror(errno)); 285e88f27b3Smrg } 286e88f27b3Smrg } 287e88f27b3Smrg} 288e88f27b3Smrg 289e6188e58Smrgdrm_private uint32_t kgsl_bo_get_timestamp(struct kgsl_bo *kgsl_bo) 290e88f27b3Smrg{ 291e88f27b3Smrg struct fd_bo *bo = &kgsl_bo->base; 292e88f27b3Smrg uint32_t timestamp = 0; 293e88f27b3Smrg if (bo->name) { 294e88f27b3Smrg struct drm_kgsl_gem_bufinfo req = { 295e88f27b3Smrg .handle = bo->handle, 296e88f27b3Smrg }; 297e88f27b3Smrg int ret; 298e88f27b3Smrg 299e88f27b3Smrg ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO, 300e88f27b3Smrg &req, sizeof(req)); 301e88f27b3Smrg if (ret) { 302e88f27b3Smrg ERROR_MSG("get bufinfo failed: %s", strerror(errno)); 303e88f27b3Smrg return 0; 304e88f27b3Smrg } 305e88f27b3Smrg 306e88f27b3Smrg timestamp = req.active; 307e88f27b3Smrg } 308e88f27b3Smrg return timestamp; 309e88f27b3Smrg} 310