122944501Smrg/* 222944501Smrg * Copyright © 2008 Jérôme Glisse 322944501Smrg * All Rights Reserved. 422944501Smrg * 522944501Smrg * Permission is hereby granted, free of charge, to any person obtaining 622944501Smrg * a copy of this software and associated documentation files (the 722944501Smrg * "Software"), to deal in the Software without restriction, including 822944501Smrg * without limitation the rights to use, copy, modify, merge, publish, 922944501Smrg * distribute, sub license, and/or sell copies of the Software, and to 1022944501Smrg * permit persons to whom the Software is furnished to do so, subject to 1122944501Smrg * the following conditions: 1222944501Smrg * 1322944501Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 1422944501Smrg * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 1522944501Smrg * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 1622944501Smrg * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS 1722944501Smrg * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1822944501Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 1922944501Smrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 2022944501Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE. 2122944501Smrg * 2222944501Smrg * The above copyright notice and this permission notice (including the 2322944501Smrg * next paragraph) shall be included in all copies or substantial portions 2422944501Smrg * of the Software. 2522944501Smrg */ 2622944501Smrg/* 2722944501Smrg * Authors: 2822944501Smrg * Jérôme Glisse <glisse@freedesktop.org> 2922944501Smrg */ 3022944501Smrg#ifndef RADEON_BO_H 3122944501Smrg#define RADEON_BO_H 3222944501Smrg 3322944501Smrg#include <stdio.h> 3422944501Smrg#include <stdint.h> 3522944501Smrg 3622944501Smrg/* bo object */ 3722944501Smrg#define RADEON_BO_FLAGS_MACRO_TILE 1 3822944501Smrg#define RADEON_BO_FLAGS_MICRO_TILE 2 3922944501Smrg#define RADEON_BO_FLAGS_MICRO_TILE_SQUARE 0x20 4022944501Smrg 4122944501Smrgstruct radeon_bo_manager; 4222944501Smrgstruct radeon_cs; 4322944501Smrg 4422944501Smrgstruct radeon_bo { 4522944501Smrg void *ptr; 4622944501Smrg uint32_t flags; 4722944501Smrg uint32_t handle; 4822944501Smrg uint32_t size; 4922944501Smrg}; 5022944501Smrg 5122944501Smrg 5222944501Smrgvoid radeon_bo_debug(struct radeon_bo *bo, const char *op); 5322944501Smrg 5422944501Smrgstruct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom, 5522944501Smrg uint32_t handle, 5622944501Smrg uint32_t size, 5722944501Smrg uint32_t alignment, 5822944501Smrg uint32_t domains, 5922944501Smrg uint32_t flags); 6022944501Smrg 6122944501Smrgvoid radeon_bo_ref(struct radeon_bo *bo); 6222944501Smrgstruct radeon_bo *radeon_bo_unref(struct radeon_bo *bo); 6322944501Smrgint radeon_bo_map(struct radeon_bo *bo, int write); 6422944501Smrgint radeon_bo_unmap(struct radeon_bo *bo); 6522944501Smrgint radeon_bo_wait(struct radeon_bo *bo); 6622944501Smrgint radeon_bo_is_busy(struct radeon_bo *bo, uint32_t *domain); 6722944501Smrgint radeon_bo_set_tiling(struct radeon_bo *bo, uint32_t tiling_flags, uint32_t pitch); 6822944501Smrgint radeon_bo_get_tiling(struct radeon_bo *bo, uint32_t *tiling_flags, uint32_t *pitch); 6922944501Smrgint radeon_bo_is_static(struct radeon_bo *bo); 7022944501Smrgint radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, struct radeon_cs *cs); 7122944501Smrguint32_t radeon_bo_get_handle(struct radeon_bo *bo); 7222944501Smrguint32_t radeon_bo_get_src_domain(struct radeon_bo *bo); 7322944501Smrg#endif 74