amdgpu_test.c revision 00a23bda
13f012e29Smrg/* 23f012e29Smrg * Copyright 2014 Advanced Micro Devices, Inc. 33f012e29Smrg * 43f012e29Smrg * Permission is hereby granted, free of charge, to any person obtaining a 53f012e29Smrg * copy of this software and associated documentation files (the "Software"), 63f012e29Smrg * to deal in the Software without restriction, including without limitation 73f012e29Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 83f012e29Smrg * and/or sell copies of the Software, and to permit persons to whom the 93f012e29Smrg * Software is furnished to do so, subject to the following conditions: 103f012e29Smrg * 113f012e29Smrg * The above copyright notice and this permission notice shall be included in 123f012e29Smrg * all copies or substantial portions of the Software. 133f012e29Smrg * 143f012e29Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 153f012e29Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 163f012e29Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 173f012e29Smrg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 183f012e29Smrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 193f012e29Smrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 203f012e29Smrg * OTHER DEALINGS IN THE SOFTWARE. 213f012e29Smrg * 223f012e29Smrg*/ 233f012e29Smrg 243f012e29Smrg#ifdef HAVE_CONFIG_H 253f012e29Smrg#include "config.h" 263f012e29Smrg#endif 273f012e29Smrg 283f012e29Smrg#include <string.h> 293f012e29Smrg#include <stdio.h> 303f012e29Smrg#include <stdlib.h> 313f012e29Smrg#include <unistd.h> 323f012e29Smrg#include <string.h> 333f012e29Smrg#include <ctype.h> 343f012e29Smrg#include <fcntl.h> 353f012e29Smrg#include <errno.h> 363f012e29Smrg#include <signal.h> 373f012e29Smrg#include <time.h> 383f012e29Smrg#include <sys/types.h> 393f012e29Smrg#include <sys/stat.h> 403f012e29Smrg#include <sys/ioctl.h> 413f012e29Smrg#include <sys/time.h> 423f012e29Smrg#include <stdarg.h> 433f012e29Smrg#include <stdint.h> 443f012e29Smrg 453f012e29Smrg#include "drm.h" 463f012e29Smrg#include "xf86drmMode.h" 473f012e29Smrg#include "xf86drm.h" 483f012e29Smrg 493f012e29Smrg#include "CUnit/Basic.h" 503f012e29Smrg 513f012e29Smrg#include "amdgpu_test.h" 5200a23bdaSmrg#include "amdgpu_internal.h" 5300a23bdaSmrg 5400a23bdaSmrg/* Test suite names */ 5500a23bdaSmrg#define BASIC_TESTS_STR "Basic Tests" 5600a23bdaSmrg#define BO_TESTS_STR "BO Tests" 5700a23bdaSmrg#define CS_TESTS_STR "CS Tests" 5800a23bdaSmrg#define VCE_TESTS_STR "VCE Tests" 5900a23bdaSmrg#define VCN_TESTS_STR "VCN Tests" 6000a23bdaSmrg#define UVD_ENC_TESTS_STR "UVD ENC Tests" 6100a23bdaSmrg#define DEADLOCK_TESTS_STR "Deadlock Tests" 6200a23bdaSmrg#define VM_TESTS_STR "VM Tests" 633f012e29Smrg 643f012e29Smrg/** 653f012e29Smrg * Open handles for amdgpu devices 663f012e29Smrg * 673f012e29Smrg */ 683f012e29Smrgint drm_amdgpu[MAX_CARDS_SUPPORTED]; 693f012e29Smrg 70037b3c26Smrg/** Open render node to test */ 71037b3c26Smrgint open_render_node = 0; /* By default run most tests on primary node */ 72037b3c26Smrg 733f012e29Smrg/** The table of all known test suites to run */ 743f012e29Smrgstatic CU_SuiteInfo suites[] = { 753f012e29Smrg { 7600a23bdaSmrg .pName = BASIC_TESTS_STR, 773f012e29Smrg .pInitFunc = suite_basic_tests_init, 783f012e29Smrg .pCleanupFunc = suite_basic_tests_clean, 793f012e29Smrg .pTests = basic_tests, 803f012e29Smrg }, 813f012e29Smrg { 8200a23bdaSmrg .pName = BO_TESTS_STR, 833f012e29Smrg .pInitFunc = suite_bo_tests_init, 843f012e29Smrg .pCleanupFunc = suite_bo_tests_clean, 853f012e29Smrg .pTests = bo_tests, 863f012e29Smrg }, 873f012e29Smrg { 8800a23bdaSmrg .pName = CS_TESTS_STR, 893f012e29Smrg .pInitFunc = suite_cs_tests_init, 903f012e29Smrg .pCleanupFunc = suite_cs_tests_clean, 913f012e29Smrg .pTests = cs_tests, 923f012e29Smrg }, 933f012e29Smrg { 9400a23bdaSmrg .pName = VCE_TESTS_STR, 953f012e29Smrg .pInitFunc = suite_vce_tests_init, 963f012e29Smrg .pCleanupFunc = suite_vce_tests_clean, 973f012e29Smrg .pTests = vce_tests, 983f012e29Smrg }, 99d8807b2fSmrg { 10000a23bdaSmrg .pName = VCN_TESTS_STR, 101d8807b2fSmrg .pInitFunc = suite_vcn_tests_init, 102d8807b2fSmrg .pCleanupFunc = suite_vcn_tests_clean, 103d8807b2fSmrg .pTests = vcn_tests, 104d8807b2fSmrg }, 105d8807b2fSmrg { 10600a23bdaSmrg .pName = UVD_ENC_TESTS_STR, 107d8807b2fSmrg .pInitFunc = suite_uvd_enc_tests_init, 108d8807b2fSmrg .pCleanupFunc = suite_uvd_enc_tests_clean, 109d8807b2fSmrg .pTests = uvd_enc_tests, 110d8807b2fSmrg }, 11100a23bdaSmrg { 11200a23bdaSmrg .pName = DEADLOCK_TESTS_STR, 11300a23bdaSmrg .pInitFunc = suite_deadlock_tests_init, 11400a23bdaSmrg .pCleanupFunc = suite_deadlock_tests_clean, 11500a23bdaSmrg .pTests = deadlock_tests, 11600a23bdaSmrg }, 11700a23bdaSmrg { 11800a23bdaSmrg .pName = VM_TESTS_STR, 11900a23bdaSmrg .pInitFunc = suite_vm_tests_init, 12000a23bdaSmrg .pCleanupFunc = suite_vm_tests_clean, 12100a23bdaSmrg .pTests = vm_tests, 12200a23bdaSmrg }, 12300a23bdaSmrg 1243f012e29Smrg CU_SUITE_INFO_NULL, 1253f012e29Smrg}; 1263f012e29Smrg 12700a23bdaSmrgtypedef CU_BOOL (*active__stat_func)(void); 12800a23bdaSmrg 12900a23bdaSmrgtypedef struct Suites_Active_Status { 13000a23bdaSmrg char* pName; 13100a23bdaSmrg active__stat_func pActive; 13200a23bdaSmrg}Suites_Active_Status; 1333f012e29Smrg 13400a23bdaSmrgstatic CU_BOOL always_active() 13500a23bdaSmrg{ 13600a23bdaSmrg return CU_TRUE; 13700a23bdaSmrg} 13800a23bdaSmrg 13900a23bdaSmrgstatic Suites_Active_Status suites_active_stat[] = { 14000a23bdaSmrg { 14100a23bdaSmrg .pName = BASIC_TESTS_STR, 14200a23bdaSmrg .pActive = always_active, 14300a23bdaSmrg }, 14400a23bdaSmrg { 14500a23bdaSmrg .pName = BO_TESTS_STR, 14600a23bdaSmrg .pActive = always_active, 14700a23bdaSmrg }, 14800a23bdaSmrg { 14900a23bdaSmrg .pName = CS_TESTS_STR, 15000a23bdaSmrg .pActive = suite_cs_tests_enable, 15100a23bdaSmrg }, 15200a23bdaSmrg { 15300a23bdaSmrg .pName = VCE_TESTS_STR, 15400a23bdaSmrg .pActive = suite_vce_tests_enable, 15500a23bdaSmrg }, 15600a23bdaSmrg { 15700a23bdaSmrg .pName = VCN_TESTS_STR, 15800a23bdaSmrg .pActive = suite_vcn_tests_enable, 15900a23bdaSmrg }, 16000a23bdaSmrg { 16100a23bdaSmrg .pName = UVD_ENC_TESTS_STR, 16200a23bdaSmrg .pActive = suite_uvd_enc_tests_enable, 16300a23bdaSmrg }, 16400a23bdaSmrg { 16500a23bdaSmrg .pName = DEADLOCK_TESTS_STR, 16600a23bdaSmrg .pActive = suite_deadlock_tests_enable, 16700a23bdaSmrg }, 16800a23bdaSmrg { 16900a23bdaSmrg .pName = VM_TESTS_STR, 17000a23bdaSmrg .pActive = suite_vm_tests_enable, 17100a23bdaSmrg }, 17200a23bdaSmrg}; 17300a23bdaSmrg 17400a23bdaSmrg 17500a23bdaSmrg/* 17600a23bdaSmrg * Display information about all suites and their tests 17700a23bdaSmrg * 17800a23bdaSmrg * NOTE: Must be run after registry is initialized and suites registered. 17900a23bdaSmrg */ 1803f012e29Smrgstatic void display_test_suites(void) 1813f012e29Smrg{ 1823f012e29Smrg int iSuite; 1833f012e29Smrg int iTest; 18400a23bdaSmrg CU_pSuite pSuite = NULL; 18500a23bdaSmrg CU_pTest pTest = NULL; 1863f012e29Smrg 1873f012e29Smrg printf("Suites\n"); 1883f012e29Smrg 1893f012e29Smrg for (iSuite = 0; suites[iSuite].pName != NULL; iSuite++) { 19000a23bdaSmrg 19100a23bdaSmrg pSuite = CU_get_suite_by_index((unsigned int) iSuite + 1, 19200a23bdaSmrg CU_get_registry()); 19300a23bdaSmrg 19400a23bdaSmrg if (!pSuite) { 19500a23bdaSmrg fprintf(stderr, "Invalid suite id : %d\n", iSuite + 1); 19600a23bdaSmrg continue; 19700a23bdaSmrg } 19800a23bdaSmrg 19900a23bdaSmrg printf("Suite id = %d: Name '%s status: %s'\n", 20000a23bdaSmrg iSuite + 1, suites[iSuite].pName, 20100a23bdaSmrg pSuite->fActive ? "ENABLED" : "DISABLED"); 20200a23bdaSmrg 20300a23bdaSmrg 2043f012e29Smrg 2053f012e29Smrg for (iTest = 0; suites[iSuite].pTests[iTest].pName != NULL; 2063f012e29Smrg iTest++) { 20700a23bdaSmrg 20800a23bdaSmrg pTest = CU_get_test_by_index((unsigned int) iTest + 1, 20900a23bdaSmrg pSuite); 21000a23bdaSmrg 21100a23bdaSmrg if (!pTest) { 21200a23bdaSmrg fprintf(stderr, "Invalid test id : %d\n", iTest + 1); 21300a23bdaSmrg continue; 21400a23bdaSmrg } 21500a23bdaSmrg 21600a23bdaSmrg printf("Test id %d: Name: '%s status: %s'\n", iTest + 1, 21700a23bdaSmrg suites[iSuite].pTests[iTest].pName, 21800a23bdaSmrg pSuite->fActive && pTest->fActive ? 21900a23bdaSmrg "ENABLED" : "DISABLED"); 2203f012e29Smrg } 2213f012e29Smrg } 2223f012e29Smrg} 2233f012e29Smrg 2243f012e29Smrg 2253f012e29Smrg/** Help string for command line parameters */ 226037b3c26Smrgstatic const char usage[] = 22700a23bdaSmrg "Usage: %s [-hlpr] [<-s <suite id>> [-t <test id>] [-f]] " 228037b3c26Smrg "[-b <pci_bus_id> [-d <pci_device_id>]]\n" 229037b3c26Smrg "where:\n" 230037b3c26Smrg " l - Display all suites and their tests\n" 231037b3c26Smrg " r - Run the tests on render node\n" 232037b3c26Smrg " b - Specify device's PCI bus id to run tests\n" 233037b3c26Smrg " d - Specify device's PCI device id to run tests (optional)\n" 234037b3c26Smrg " p - Display information of AMDGPU devices in system\n" 23500a23bdaSmrg " f - Force executing inactive suite or test\n" 236037b3c26Smrg " h - Display this help\n"; 2373f012e29Smrg/** Specified options strings for getopt */ 23800a23bdaSmrgstatic const char options[] = "hlrps:t:b:d:f"; 239037b3c26Smrg 240037b3c26Smrg/* Open AMD devices. 241037b3c26Smrg * Return the number of AMD device openned. 242037b3c26Smrg */ 243037b3c26Smrgstatic int amdgpu_open_devices(int open_render_node) 244037b3c26Smrg{ 245037b3c26Smrg drmDevicePtr devices[MAX_CARDS_SUPPORTED]; 246037b3c26Smrg int i; 247037b3c26Smrg int drm_node; 248037b3c26Smrg int amd_index = 0; 249037b3c26Smrg int drm_count; 250037b3c26Smrg int fd; 251037b3c26Smrg drmVersionPtr version; 252037b3c26Smrg 253037b3c26Smrg drm_count = drmGetDevices2(0, devices, MAX_CARDS_SUPPORTED); 254037b3c26Smrg 255037b3c26Smrg if (drm_count < 0) { 256037b3c26Smrg fprintf(stderr, 257037b3c26Smrg "drmGetDevices2() returned an error %d\n", 258037b3c26Smrg drm_count); 259037b3c26Smrg return 0; 260037b3c26Smrg } 261037b3c26Smrg 262037b3c26Smrg for (i = 0; i < drm_count; i++) { 263037b3c26Smrg /* If this is not PCI device, skip*/ 264037b3c26Smrg if (devices[i]->bustype != DRM_BUS_PCI) 265037b3c26Smrg continue; 266037b3c26Smrg 267037b3c26Smrg /* If this is not AMD GPU vender ID, skip*/ 268037b3c26Smrg if (devices[i]->deviceinfo.pci->vendor_id != 0x1002) 269037b3c26Smrg continue; 270037b3c26Smrg 271037b3c26Smrg if (open_render_node) 272037b3c26Smrg drm_node = DRM_NODE_RENDER; 273037b3c26Smrg else 274037b3c26Smrg drm_node = DRM_NODE_PRIMARY; 275037b3c26Smrg 276037b3c26Smrg fd = -1; 277037b3c26Smrg if (devices[i]->available_nodes & 1 << drm_node) 278037b3c26Smrg fd = open( 279037b3c26Smrg devices[i]->nodes[drm_node], 280037b3c26Smrg O_RDWR | O_CLOEXEC); 281037b3c26Smrg 282037b3c26Smrg /* This node is not available. */ 283037b3c26Smrg if (fd < 0) continue; 284037b3c26Smrg 285037b3c26Smrg version = drmGetVersion(fd); 286037b3c26Smrg if (!version) { 287037b3c26Smrg fprintf(stderr, 288037b3c26Smrg "Warning: Cannot get version for %s." 289037b3c26Smrg "Error is %s\n", 290037b3c26Smrg devices[i]->nodes[drm_node], 291037b3c26Smrg strerror(errno)); 292037b3c26Smrg close(fd); 293037b3c26Smrg continue; 294037b3c26Smrg } 295037b3c26Smrg 296037b3c26Smrg if (strcmp(version->name, "amdgpu")) { 297037b3c26Smrg /* This is not AMDGPU driver, skip.*/ 298037b3c26Smrg drmFreeVersion(version); 299037b3c26Smrg close(fd); 300037b3c26Smrg continue; 301037b3c26Smrg } 302037b3c26Smrg 303037b3c26Smrg drmFreeVersion(version); 304037b3c26Smrg 305037b3c26Smrg drm_amdgpu[amd_index] = fd; 306037b3c26Smrg amd_index++; 307037b3c26Smrg } 308037b3c26Smrg 309037b3c26Smrg drmFreeDevices(devices, drm_count); 310037b3c26Smrg return amd_index; 311037b3c26Smrg} 312037b3c26Smrg 313037b3c26Smrg/* Close AMD devices. 314037b3c26Smrg */ 315037b3c26Smrgstatic void amdgpu_close_devices() 316037b3c26Smrg{ 317037b3c26Smrg int i; 318037b3c26Smrg for (i = 0; i < MAX_CARDS_SUPPORTED; i++) 319037b3c26Smrg if (drm_amdgpu[i] >=0) 320037b3c26Smrg close(drm_amdgpu[i]); 321037b3c26Smrg} 322037b3c26Smrg 323037b3c26Smrg/* Print AMD devices information */ 324037b3c26Smrgstatic void amdgpu_print_devices() 325037b3c26Smrg{ 326037b3c26Smrg int i; 327037b3c26Smrg drmDevicePtr device; 328037b3c26Smrg 329037b3c26Smrg /* Open the first AMD devcie to print driver information. */ 330037b3c26Smrg if (drm_amdgpu[0] >=0) { 331037b3c26Smrg /* Display AMD driver version information.*/ 332037b3c26Smrg drmVersionPtr retval = drmGetVersion(drm_amdgpu[0]); 333037b3c26Smrg 334037b3c26Smrg if (retval == NULL) { 335037b3c26Smrg perror("Cannot get version for AMDGPU device"); 336037b3c26Smrg return; 337037b3c26Smrg } 338037b3c26Smrg 339037b3c26Smrg printf("Driver name: %s, Date: %s, Description: %s.\n", 340037b3c26Smrg retval->name, retval->date, retval->desc); 341037b3c26Smrg drmFreeVersion(retval); 342037b3c26Smrg } 343037b3c26Smrg 344037b3c26Smrg /* Display information of AMD devices */ 345037b3c26Smrg printf("Devices:\n"); 346037b3c26Smrg for (i = 0; i < MAX_CARDS_SUPPORTED && drm_amdgpu[i] >=0; i++) 347037b3c26Smrg if (drmGetDevice2(drm_amdgpu[i], 348037b3c26Smrg DRM_DEVICE_GET_PCI_REVISION, 349037b3c26Smrg &device) == 0) { 350037b3c26Smrg if (device->bustype == DRM_BUS_PCI) { 351037b3c26Smrg printf("PCI "); 352037b3c26Smrg printf(" domain:%04x", 353037b3c26Smrg device->businfo.pci->domain); 354037b3c26Smrg printf(" bus:%02x", 355037b3c26Smrg device->businfo.pci->bus); 356037b3c26Smrg printf(" device:%02x", 357037b3c26Smrg device->businfo.pci->dev); 358037b3c26Smrg printf(" function:%01x", 359037b3c26Smrg device->businfo.pci->func); 360037b3c26Smrg printf(" vendor_id:%04x", 361037b3c26Smrg device->deviceinfo.pci->vendor_id); 362037b3c26Smrg printf(" device_id:%04x", 363037b3c26Smrg device->deviceinfo.pci->device_id); 364037b3c26Smrg printf(" subvendor_id:%04x", 365037b3c26Smrg device->deviceinfo.pci->subvendor_id); 366037b3c26Smrg printf(" subdevice_id:%04x", 367037b3c26Smrg device->deviceinfo.pci->subdevice_id); 368037b3c26Smrg printf(" revision_id:%02x", 369037b3c26Smrg device->deviceinfo.pci->revision_id); 370037b3c26Smrg printf("\n"); 371037b3c26Smrg } 372037b3c26Smrg drmFreeDevice(&device); 373037b3c26Smrg } 374037b3c26Smrg} 375037b3c26Smrg 376037b3c26Smrg/* Find a match AMD device in PCI bus 377037b3c26Smrg * Return the index of the device or -1 if not found 378037b3c26Smrg */ 379d8807b2fSmrgstatic int amdgpu_find_device(uint8_t bus, uint16_t dev) 380037b3c26Smrg{ 381037b3c26Smrg int i; 382037b3c26Smrg drmDevicePtr device; 383037b3c26Smrg 384d8807b2fSmrg for (i = 0; i < MAX_CARDS_SUPPORTED && drm_amdgpu[i] >= 0; i++) { 385037b3c26Smrg if (drmGetDevice2(drm_amdgpu[i], 386037b3c26Smrg DRM_DEVICE_GET_PCI_REVISION, 387037b3c26Smrg &device) == 0) { 388037b3c26Smrg if (device->bustype == DRM_BUS_PCI) 389d8807b2fSmrg if ((bus == 0xFF || device->businfo.pci->bus == bus) && 390d8807b2fSmrg device->deviceinfo.pci->device_id == dev) { 391037b3c26Smrg drmFreeDevice(&device); 392037b3c26Smrg return i; 393037b3c26Smrg } 394037b3c26Smrg 395037b3c26Smrg drmFreeDevice(&device); 396037b3c26Smrg } 397d8807b2fSmrg } 398037b3c26Smrg 399037b3c26Smrg return -1; 400037b3c26Smrg} 4013f012e29Smrg 40200a23bdaSmrgstatic void amdgpu_disable_suites() 40300a23bdaSmrg{ 40400a23bdaSmrg amdgpu_device_handle device_handle; 40500a23bdaSmrg uint32_t major_version, minor_version, family_id; 40600a23bdaSmrg int i; 40700a23bdaSmrg int size = sizeof(suites_active_stat) / sizeof(suites_active_stat[0]); 40800a23bdaSmrg 40900a23bdaSmrg if (amdgpu_device_initialize(drm_amdgpu[0], &major_version, 41000a23bdaSmrg &minor_version, &device_handle)) 41100a23bdaSmrg return; 41200a23bdaSmrg 41300a23bdaSmrg family_id = device_handle->info.family_id; 41400a23bdaSmrg 41500a23bdaSmrg if (amdgpu_device_deinitialize(device_handle)) 41600a23bdaSmrg return; 41700a23bdaSmrg 41800a23bdaSmrg /* Set active status for suites based on their policies */ 41900a23bdaSmrg for (i = 0; i < size; ++i) 42000a23bdaSmrg if (amdgpu_set_suite_active(suites_active_stat[i].pName, 42100a23bdaSmrg suites_active_stat[i].pActive())) 42200a23bdaSmrg fprintf(stderr, "suite deactivation failed - %s\n", CU_get_error_msg()); 42300a23bdaSmrg 42400a23bdaSmrg /* Explicitly disable specific tests due to known bugs or preferences */ 42500a23bdaSmrg /* 42600a23bdaSmrg * BUG: Compute ring stalls and never recovers when the address is 42700a23bdaSmrg * written after the command already submitted 42800a23bdaSmrg */ 42900a23bdaSmrg if (amdgpu_set_test_active(DEADLOCK_TESTS_STR, "compute ring block test", CU_FALSE)) 43000a23bdaSmrg fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg()); 43100a23bdaSmrg 43200a23bdaSmrg if (amdgpu_set_test_active(BO_TESTS_STR, "Metadata", CU_FALSE)) 43300a23bdaSmrg fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg()); 43400a23bdaSmrg 43500a23bdaSmrg if (amdgpu_set_test_active(BASIC_TESTS_STR, "bo eviction Test", CU_FALSE)) 43600a23bdaSmrg fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg()); 43700a23bdaSmrg 43800a23bdaSmrg /* This test was ran on GFX8 and GFX9 only */ 43900a23bdaSmrg if (family_id < AMDGPU_FAMILY_VI || family_id > AMDGPU_FAMILY_RV) 44000a23bdaSmrg if (amdgpu_set_test_active(BASIC_TESTS_STR, "Sync dependency Test", CU_FALSE)) 44100a23bdaSmrg fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg()); 44200a23bdaSmrg} 44300a23bdaSmrg 4443f012e29Smrg/* The main() function for setting up and running the tests. 4453f012e29Smrg * Returns a CUE_SUCCESS on successful running, another 4463f012e29Smrg * CUnit error code on failure. 4473f012e29Smrg */ 4483f012e29Smrgint main(int argc, char **argv) 4493f012e29Smrg{ 4503f012e29Smrg int c; /* Character received from getopt */ 4513f012e29Smrg int i = 0; 4523f012e29Smrg int suite_id = -1; /* By default run everything */ 4533f012e29Smrg int test_id = -1; /* By default run all tests in the suite */ 454037b3c26Smrg int pci_bus_id = -1; /* By default PC bus ID is not specified */ 455037b3c26Smrg int pci_device_id = 0; /* By default PC device ID is zero */ 456037b3c26Smrg int display_devices = 0;/* By default not to display devices' info */ 4573f012e29Smrg CU_pSuite pSuite = NULL; 4583f012e29Smrg CU_pTest pTest = NULL; 459037b3c26Smrg int test_device_index; 46000a23bdaSmrg int display_list = 0; 46100a23bdaSmrg int force_run = 0; 4623f012e29Smrg 4633f012e29Smrg for (i = 0; i < MAX_CARDS_SUPPORTED; i++) 4643f012e29Smrg drm_amdgpu[i] = -1; 4653f012e29Smrg 4663f012e29Smrg 4673f012e29Smrg /* Parse command line string */ 4683f012e29Smrg opterr = 0; /* Do not print error messages from getopt */ 4693f012e29Smrg while ((c = getopt(argc, argv, options)) != -1) { 4703f012e29Smrg switch (c) { 4713f012e29Smrg case 'l': 47200a23bdaSmrg display_list = 1; 47300a23bdaSmrg break; 4743f012e29Smrg case 's': 4753f012e29Smrg suite_id = atoi(optarg); 4763f012e29Smrg break; 4773f012e29Smrg case 't': 4783f012e29Smrg test_id = atoi(optarg); 4793f012e29Smrg break; 480037b3c26Smrg case 'b': 481037b3c26Smrg pci_bus_id = atoi(optarg); 482037b3c26Smrg break; 483037b3c26Smrg case 'd': 484d8807b2fSmrg sscanf(optarg, "%x", &pci_device_id); 485037b3c26Smrg break; 486037b3c26Smrg case 'p': 487037b3c26Smrg display_devices = 1; 488037b3c26Smrg break; 489037b3c26Smrg case 'r': 490037b3c26Smrg open_render_node = 1; 491037b3c26Smrg break; 49200a23bdaSmrg case 'f': 49300a23bdaSmrg force_run = 1; 49400a23bdaSmrg break; 4953f012e29Smrg case '?': 4963f012e29Smrg case 'h': 4973f012e29Smrg fprintf(stderr, usage, argv[0]); 4983f012e29Smrg exit(EXIT_SUCCESS); 4993f012e29Smrg default: 5003f012e29Smrg fprintf(stderr, usage, argv[0]); 5013f012e29Smrg exit(EXIT_FAILURE); 5023f012e29Smrg } 5033f012e29Smrg } 5043f012e29Smrg 505037b3c26Smrg if (amdgpu_open_devices(open_render_node) <= 0) { 506037b3c26Smrg perror("Cannot open AMDGPU device"); 5073f012e29Smrg exit(EXIT_FAILURE); 5083f012e29Smrg } 5093f012e29Smrg 510037b3c26Smrg if (drm_amdgpu[0] < 0) { 511037b3c26Smrg perror("Cannot open AMDGPU device"); 5123f012e29Smrg exit(EXIT_FAILURE); 5133f012e29Smrg } 5143f012e29Smrg 515037b3c26Smrg if (display_devices) { 516037b3c26Smrg amdgpu_print_devices(); 517037b3c26Smrg amdgpu_close_devices(); 518037b3c26Smrg exit(EXIT_SUCCESS); 519037b3c26Smrg } 5203f012e29Smrg 521d8807b2fSmrg if (pci_bus_id > 0 || pci_device_id) { 522037b3c26Smrg /* A device was specified to run the test */ 523d8807b2fSmrg test_device_index = amdgpu_find_device(pci_bus_id, 524d8807b2fSmrg pci_device_id); 525037b3c26Smrg 526037b3c26Smrg if (test_device_index >= 0) { 527037b3c26Smrg /* Most tests run on device of drm_amdgpu[0]. 528037b3c26Smrg * Swap the chosen device to drm_amdgpu[0]. 529037b3c26Smrg */ 530037b3c26Smrg i = drm_amdgpu[0]; 531037b3c26Smrg drm_amdgpu[0] = drm_amdgpu[test_device_index]; 532037b3c26Smrg drm_amdgpu[test_device_index] = i; 533037b3c26Smrg } else { 534037b3c26Smrg fprintf(stderr, 535037b3c26Smrg "The specified GPU device does not exist.\n"); 536037b3c26Smrg exit(EXIT_FAILURE); 537037b3c26Smrg } 538037b3c26Smrg } 5393f012e29Smrg 5403f012e29Smrg /* Initialize test suites to run */ 5413f012e29Smrg 5423f012e29Smrg /* initialize the CUnit test registry */ 5433f012e29Smrg if (CUE_SUCCESS != CU_initialize_registry()) { 544037b3c26Smrg amdgpu_close_devices(); 5453f012e29Smrg return CU_get_error(); 5463f012e29Smrg } 5473f012e29Smrg 5483f012e29Smrg /* Register suites. */ 5493f012e29Smrg if (CU_register_suites(suites) != CUE_SUCCESS) { 5503f012e29Smrg fprintf(stderr, "suite registration failed - %s\n", 5513f012e29Smrg CU_get_error_msg()); 5523f012e29Smrg CU_cleanup_registry(); 553037b3c26Smrg amdgpu_close_devices(); 5543f012e29Smrg exit(EXIT_FAILURE); 5553f012e29Smrg } 5563f012e29Smrg 5573f012e29Smrg /* Run tests using the CUnit Basic interface */ 5583f012e29Smrg CU_basic_set_mode(CU_BRM_VERBOSE); 5593f012e29Smrg 56000a23bdaSmrg /* Disable suites and individual tests based on misc. conditions */ 56100a23bdaSmrg amdgpu_disable_suites(); 56200a23bdaSmrg 56300a23bdaSmrg if (display_list) { 56400a23bdaSmrg display_test_suites(); 56500a23bdaSmrg goto end; 56600a23bdaSmrg } 56700a23bdaSmrg 5683f012e29Smrg if (suite_id != -1) { /* If user specify particular suite? */ 5693f012e29Smrg pSuite = CU_get_suite_by_index((unsigned int) suite_id, 5703f012e29Smrg CU_get_registry()); 5713f012e29Smrg 5723f012e29Smrg if (pSuite) { 57300a23bdaSmrg 57400a23bdaSmrg if (force_run) 57500a23bdaSmrg CU_set_suite_active(pSuite, CU_TRUE); 57600a23bdaSmrg 5773f012e29Smrg if (test_id != -1) { /* If user specify test id */ 5783f012e29Smrg pTest = CU_get_test_by_index( 5793f012e29Smrg (unsigned int) test_id, 5803f012e29Smrg pSuite); 58100a23bdaSmrg if (pTest) { 58200a23bdaSmrg if (force_run) 58300a23bdaSmrg CU_set_test_active(pTest, CU_TRUE); 58400a23bdaSmrg 5853f012e29Smrg CU_basic_run_test(pSuite, pTest); 58600a23bdaSmrg } 5873f012e29Smrg else { 5883f012e29Smrg fprintf(stderr, "Invalid test id: %d\n", 5893f012e29Smrg test_id); 5903f012e29Smrg CU_cleanup_registry(); 591037b3c26Smrg amdgpu_close_devices(); 5923f012e29Smrg exit(EXIT_FAILURE); 5933f012e29Smrg } 5943f012e29Smrg } else 5953f012e29Smrg CU_basic_run_suite(pSuite); 5963f012e29Smrg } else { 5973f012e29Smrg fprintf(stderr, "Invalid suite id : %d\n", 5983f012e29Smrg suite_id); 5993f012e29Smrg CU_cleanup_registry(); 600037b3c26Smrg amdgpu_close_devices(); 6013f012e29Smrg exit(EXIT_FAILURE); 6023f012e29Smrg } 6033f012e29Smrg } else 6043f012e29Smrg CU_basic_run_tests(); 6053f012e29Smrg 60600a23bdaSmrgend: 6073f012e29Smrg CU_cleanup_registry(); 608037b3c26Smrg amdgpu_close_devices(); 6093f012e29Smrg return CU_get_error(); 6103f012e29Smrg} 611