amdgpu_test.h revision d8807b2f 
1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22*/
23
24#ifndef _AMDGPU_TEST_H_
25#define _AMDGPU_TEST_H_
26
27#include "amdgpu.h"
28#include "amdgpu_drm.h"
29
30/**
31 * Define max. number of card in system which we are able to handle
32 */
33#define MAX_CARDS_SUPPORTED     4
34
35/* Forward reference for array to keep "drm" handles */
36extern int drm_amdgpu[MAX_CARDS_SUPPORTED];
37
38/* Global variables */
39extern int open_render_node;
40
41/*************************  Basic test suite ********************************/
42
43/*
44 * Define basic test suite to serve as the starting point for future testing
45*/
46
47/**
48 * Initialize basic test suite
49 */
50int suite_basic_tests_init();
51
52/**
53 * Deinitialize basic test suite
54 */
55int suite_basic_tests_clean();
56
57/**
58 * Tests in basic test suite
59 */
60extern CU_TestInfo basic_tests[];
61
62/**
63 * Initialize bo test suite
64 */
65int suite_bo_tests_init();
66
67/**
68 * Deinitialize bo test suite
69 */
70int suite_bo_tests_clean();
71
72/**
73 * Tests in bo test suite
74 */
75extern CU_TestInfo bo_tests[];
76
77/**
78 * Initialize cs test suite
79 */
80int suite_cs_tests_init();
81
82/**
83 * Deinitialize cs test suite
84 */
85int suite_cs_tests_clean();
86
87/**
88 * Tests in cs test suite
89 */
90extern CU_TestInfo cs_tests[];
91
92/**
93 * Initialize vce test suite
94 */
95int suite_vce_tests_init();
96
97/**
98 * Deinitialize vce test suite
99 */
100int suite_vce_tests_clean();
101
102/**
103 * Tests in vce test suite
104 */
105extern CU_TestInfo vce_tests[];
106
107/**
108+ * Initialize vcn test suite
109+ */
110int suite_vcn_tests_init();
111
112/**
113+ * Deinitialize vcn test suite
114+ */
115int suite_vcn_tests_clean();
116
117/**
118+ * Tests in vcn test suite
119+ */
120extern CU_TestInfo vcn_tests[];
121
122/**
123 * Initialize uvd enc test suite
124 */
125int suite_uvd_enc_tests_init();
126
127/**
128 * Deinitialize uvd enc test suite
129 */
130int suite_uvd_enc_tests_clean();
131
132/**
133 * Tests in uvd enc test suite
134 */
135extern CU_TestInfo uvd_enc_tests[];
136
137/**
138 * Helper functions
139 */
140static inline amdgpu_bo_handle gpu_mem_alloc(
141					amdgpu_device_handle device_handle,
142					uint64_t size,
143					uint64_t alignment,
144					uint32_t type,
145					uint64_t flags,
146					uint64_t *vmc_addr,
147					amdgpu_va_handle *va_handle)
148{
149	struct amdgpu_bo_alloc_request req = {0};
150	amdgpu_bo_handle buf_handle;
151	int r;
152
153	CU_ASSERT_NOT_EQUAL(vmc_addr, NULL);
154
155	req.alloc_size = size;
156	req.phys_alignment = alignment;
157	req.preferred_heap = type;
158	req.flags = flags;
159
160	r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
161	CU_ASSERT_EQUAL(r, 0);
162
163	r = amdgpu_va_range_alloc(device_handle,
164				  amdgpu_gpu_va_range_general,
165				  size, alignment, 0, vmc_addr,
166				  va_handle, 0);
167	CU_ASSERT_EQUAL(r, 0);
168
169	r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0, AMDGPU_VA_OP_MAP);
170	CU_ASSERT_EQUAL(r, 0);
171
172	return buf_handle;
173}
174
175static inline int gpu_mem_free(amdgpu_bo_handle bo,
176			       amdgpu_va_handle va_handle,
177			       uint64_t vmc_addr,
178			       uint64_t size)
179{
180	int r;
181
182	r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP);
183	CU_ASSERT_EQUAL(r, 0);
184
185	r = amdgpu_va_range_free(va_handle);
186	CU_ASSERT_EQUAL(r, 0);
187
188	r = amdgpu_bo_free(bo);
189	CU_ASSERT_EQUAL(r, 0);
190
191	return 0;
192}
193
194static inline int
195amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size,
196			unsigned alignment, unsigned heap, uint64_t flags,
197			amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address,
198			amdgpu_va_handle *va_handle)
199{
200	struct amdgpu_bo_alloc_request request = {};
201	amdgpu_bo_handle buf_handle;
202	amdgpu_va_handle handle;
203	uint64_t vmc_addr;
204	int r;
205
206	request.alloc_size = size;
207	request.phys_alignment = alignment;
208	request.preferred_heap = heap;
209	request.flags = flags;
210
211	r = amdgpu_bo_alloc(dev, &request, &buf_handle);
212	if (r)
213		return r;
214
215	r = amdgpu_va_range_alloc(dev,
216				  amdgpu_gpu_va_range_general,
217				  size, alignment, 0, &vmc_addr,
218				  &handle, 0);
219	if (r)
220		goto error_va_alloc;
221
222	r = amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_MAP);
223	if (r)
224		goto error_va_map;
225
226	r = amdgpu_bo_cpu_map(buf_handle, cpu);
227	if (r)
228		goto error_cpu_map;
229
230	*bo = buf_handle;
231	*mc_address = vmc_addr;
232	*va_handle = handle;
233
234	return 0;
235
236error_cpu_map:
237	amdgpu_bo_cpu_unmap(buf_handle);
238
239error_va_map:
240	amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP);
241
242error_va_alloc:
243	amdgpu_bo_free(buf_handle);
244	return r;
245}
246
247static inline int
248amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle,
249			 uint64_t mc_addr, uint64_t size)
250{
251	amdgpu_bo_cpu_unmap(bo);
252	amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP);
253	amdgpu_va_range_free(va_handle);
254	amdgpu_bo_free(bo);
255
256	return 0;
257
258}
259
260static inline int
261amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1,
262		   amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list)
263{
264	amdgpu_bo_handle resources[] = {bo1, bo2};
265
266	return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list);
267}
268
269#endif  /* #ifdef _AMDGPU_TEST_H_ */
270