xf86drm.h revision bf6cc7dc
122944501Smrg/**
222944501Smrg * \file xf86drm.h
322944501Smrg * OS-independent header for DRM user-level library interface.
422944501Smrg *
522944501Smrg * \author Rickard E. (Rik) Faith <faith@valinux.com>
622944501Smrg */
722944501Smrg
822944501Smrg/*
922944501Smrg * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
1022944501Smrg * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
1122944501Smrg * All Rights Reserved.
1222944501Smrg *
1322944501Smrg * Permission is hereby granted, free of charge, to any person obtaining a
1422944501Smrg * copy of this software and associated documentation files (the "Software"),
1522944501Smrg * to deal in the Software without restriction, including without limitation
1622944501Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1722944501Smrg * and/or sell copies of the Software, and to permit persons to whom the
1822944501Smrg * Software is furnished to do so, subject to the following conditions:
1922944501Smrg *
2022944501Smrg * The above copyright notice and this permission notice (including the next
2122944501Smrg * paragraph) shall be included in all copies or substantial portions of the
2222944501Smrg * Software.
2322944501Smrg *
2422944501Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
2522944501Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
2622944501Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
2722944501Smrg * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
2822944501Smrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
2922944501Smrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
3022944501Smrg * DEALINGS IN THE SOFTWARE.
3122944501Smrg *
3222944501Smrg */
3322944501Smrg
3422944501Smrg#ifndef _XF86DRM_H_
3522944501Smrg#define _XF86DRM_H_
3622944501Smrg
3722944501Smrg#include <stdarg.h>
382e6867f6Smrg#if 1
392e6867f6Smrg#include <sys/atomic.h>
402e6867f6Smrg#else
4122944501Smrg#include <sys/types.h>
422e6867f6Smrg#endif
4322944501Smrg#include <stdint.h>
4422944501Smrg#include <drm.h>
4522944501Smrg
46fe517fc9Smrg#if defined(__cplusplus)
4720131375Smrgextern "C" {
4820131375Smrg#endif
4920131375Smrg
5022944501Smrg#ifndef DRM_MAX_MINOR
5122944501Smrg#define DRM_MAX_MINOR   16
5222944501Smrg#endif
5322944501Smrg
5422944501Smrg#if defined(__linux__)
5522944501Smrg
5622944501Smrg#define DRM_IOCTL_NR(n)		_IOC_NR(n)
5722944501Smrg#define DRM_IOC_VOID		_IOC_NONE
5822944501Smrg#define DRM_IOC_READ		_IOC_READ
5922944501Smrg#define DRM_IOC_WRITE		_IOC_WRITE
6022944501Smrg#define DRM_IOC_READWRITE	_IOC_READ|_IOC_WRITE
6122944501Smrg#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
6222944501Smrg
6322944501Smrg#else /* One of the *BSDs */
6422944501Smrg
6522944501Smrg#include <sys/ioccom.h>
6622944501Smrg#define DRM_IOCTL_NR(n)         ((n) & 0xff)
6722944501Smrg#define DRM_IOC_VOID            IOC_VOID
6822944501Smrg#define DRM_IOC_READ            IOC_OUT
6922944501Smrg#define DRM_IOC_WRITE           IOC_IN
7022944501Smrg#define DRM_IOC_READWRITE       IOC_INOUT
7122944501Smrg#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
7222944501Smrg
7322944501Smrg#endif
7422944501Smrg
7522944501Smrg				/* Defaults, if nothing set in xf86config */
7622944501Smrg#define DRM_DEV_UID	 0
7722944501Smrg#define DRM_DEV_GID	 0
7822944501Smrg/* Default /dev/dri directory permissions 0755 */
7922944501Smrg#define DRM_DEV_DIRMODE	 	\
8022944501Smrg	(S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH)
8122944501Smrg#define DRM_DEV_MODE	 (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
8222944501Smrg
83fe517fc9Smrg#ifdef __OpenBSD__
84fe517fc9Smrg#define DRM_DIR_NAME  "/dev"
85fe517fc9Smrg#define DRM_DEV_NAME  "%s/drm%d"
86fe517fc9Smrg#define DRM_CONTROL_DEV_NAME  "%s/drmC%d"
87fe517fc9Smrg#define DRM_RENDER_DEV_NAME  "%s/drmR%d"
88fe517fc9Smrg#else
8922944501Smrg#define DRM_DIR_NAME  "/dev/dri"
9022944501Smrg#define DRM_DEV_NAME  "%s/card%d"
9122944501Smrg#define DRM_CONTROL_DEV_NAME  "%s/controlD%d"
92424e9256Smrg#define DRM_RENDER_DEV_NAME  "%s/renderD%d"
9322944501Smrg#define DRM_PROC_NAME "/proc/dri/" /* For backward Linux compatibility */
94fe517fc9Smrg#endif
9522944501Smrg
9622944501Smrg#define DRM_ERR_NO_DEVICE  (-1001)
9722944501Smrg#define DRM_ERR_NO_ACCESS  (-1002)
9822944501Smrg#define DRM_ERR_NOT_ROOT   (-1003)
9922944501Smrg#define DRM_ERR_INVALID    (-1004)
10022944501Smrg#define DRM_ERR_NO_FD      (-1005)
10122944501Smrg
10222944501Smrg#define DRM_AGP_NO_HANDLE 0
10322944501Smrg
10422944501Smrgtypedef unsigned int  drmSize,     *drmSizePtr;	    /**< For mapped regions */
10522944501Smrgtypedef void          *drmAddress, **drmAddressPtr; /**< For mapped regions */
10622944501Smrg
10720131375Smrg#if (__GNUC__ >= 3)
10820131375Smrg#define DRM_PRINTFLIKE(f, a) __attribute__ ((format(__printf__, f, a)))
10920131375Smrg#else
11020131375Smrg#define DRM_PRINTFLIKE(f, a)
11120131375Smrg#endif
11220131375Smrg
11322944501Smrgtypedef struct _drmServerInfo {
11420131375Smrg  int (*debug_print)(const char *format, va_list ap) DRM_PRINTFLIKE(1,0);
11522944501Smrg  int (*load_module)(const char *name);
11622944501Smrg  void (*get_perms)(gid_t *, mode_t *);
11722944501Smrg} drmServerInfo, *drmServerInfoPtr;
11822944501Smrg
11922944501Smrgtypedef struct drmHashEntry {
12022944501Smrg    int      fd;
12122944501Smrg    void     (*f)(int, void *, void *);
12222944501Smrg    void     *tagTable;
12322944501Smrg} drmHashEntry;
12422944501Smrg
12522944501Smrgextern int drmIoctl(int fd, unsigned long request, void *arg);
12622944501Smrgextern void *drmGetHashTable(void);
12722944501Smrgextern drmHashEntry *drmGetEntry(int fd);
12822944501Smrg
12922944501Smrg/**
13022944501Smrg * Driver version information.
13122944501Smrg *
13222944501Smrg * \sa drmGetVersion() and drmSetVersion().
13322944501Smrg */
13422944501Smrgtypedef struct _drmVersion {
13522944501Smrg    int     version_major;        /**< Major version */
13622944501Smrg    int     version_minor;        /**< Minor version */
13722944501Smrg    int     version_patchlevel;   /**< Patch level */
13822944501Smrg    int     name_len; 	          /**< Length of name buffer */
13922944501Smrg    char    *name;	          /**< Name of driver */
14022944501Smrg    int     date_len;             /**< Length of date buffer */
14122944501Smrg    char    *date;                /**< User-space buffer to hold date */
14222944501Smrg    int     desc_len;	          /**< Length of desc buffer */
14322944501Smrg    char    *desc;                /**< User-space buffer to hold desc */
14422944501Smrg} drmVersion, *drmVersionPtr;
14522944501Smrg
14622944501Smrgtypedef struct _drmStats {
14722944501Smrg    unsigned long count;	     /**< Number of data */
14822944501Smrg    struct {
14922944501Smrg	unsigned long value;	     /**< Value from kernel */
15022944501Smrg	const char    *long_format;  /**< Suggested format for long_name */
15122944501Smrg	const char    *long_name;    /**< Long name for value */
15222944501Smrg	const char    *rate_format;  /**< Suggested format for rate_name */
15322944501Smrg	const char    *rate_name;    /**< Short name for value per second */
15422944501Smrg	int           isvalue;       /**< True if value (vs. counter) */
15522944501Smrg	const char    *mult_names;   /**< Multiplier names (e.g., "KGM") */
15622944501Smrg	int           mult;          /**< Multiplier value (e.g., 1024) */
15722944501Smrg	int           verbose;       /**< Suggest only in verbose output */
15822944501Smrg    } data[15];
15922944501Smrg} drmStatsT;
16022944501Smrg
16122944501Smrg
16222944501Smrg				/* All of these enums *MUST* match with the
16322944501Smrg                                   kernel implementation -- so do *NOT*
16422944501Smrg                                   change them!  (The drmlib implementation
16522944501Smrg                                   will just copy the flags instead of
16622944501Smrg                                   translating them.) */
16722944501Smrgtypedef enum {
16822944501Smrg    DRM_FRAME_BUFFER    = 0,      /**< WC, no caching, no core dump */
16922944501Smrg    DRM_REGISTERS       = 1,      /**< no caching, no core dump */
17022944501Smrg    DRM_SHM             = 2,      /**< shared, cached */
17122944501Smrg    DRM_AGP             = 3,	  /**< AGP/GART */
17222944501Smrg    DRM_SCATTER_GATHER  = 4,	  /**< PCI scatter/gather */
17322944501Smrg    DRM_CONSISTENT      = 5	  /**< PCI consistent */
17422944501Smrg} drmMapType;
17522944501Smrg
17622944501Smrgtypedef enum {
17722944501Smrg    DRM_RESTRICTED      = 0x0001, /**< Cannot be mapped to client-virtual */
17822944501Smrg    DRM_READ_ONLY       = 0x0002, /**< Read-only in client-virtual */
17922944501Smrg    DRM_LOCKED          = 0x0004, /**< Physical pages locked */
18022944501Smrg    DRM_KERNEL          = 0x0008, /**< Kernel requires access */
18122944501Smrg    DRM_WRITE_COMBINING = 0x0010, /**< Use write-combining, if available */
18222944501Smrg    DRM_CONTAINS_LOCK   = 0x0020, /**< SHM page that contains lock */
18322944501Smrg    DRM_REMOVABLE	= 0x0040  /**< Removable mapping */
18422944501Smrg} drmMapFlags;
18522944501Smrg
18622944501Smrg/**
18722944501Smrg * \warning These values *MUST* match drm.h
18822944501Smrg */
18922944501Smrgtypedef enum {
19022944501Smrg    /** \name Flags for DMA buffer dispatch */
19122944501Smrg    /*@{*/
19222944501Smrg    DRM_DMA_BLOCK        = 0x01, /**<
19322944501Smrg				  * Block until buffer dispatched.
19422944501Smrg				  *
19522944501Smrg				  * \note the buffer may not yet have been
19622944501Smrg				  * processed by the hardware -- getting a
19722944501Smrg				  * hardware lock with the hardware quiescent
19822944501Smrg				  * will ensure that the buffer has been
19922944501Smrg				  * processed.
20022944501Smrg				  */
20122944501Smrg    DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
20222944501Smrg    DRM_DMA_PRIORITY     = 0x04, /**< High priority dispatch */
20322944501Smrg    /*@}*/
20422944501Smrg
20522944501Smrg    /** \name Flags for DMA buffer request */
20622944501Smrg    /*@{*/
20722944501Smrg    DRM_DMA_WAIT         = 0x10, /**< Wait for free buffers */
20822944501Smrg    DRM_DMA_SMALLER_OK   = 0x20, /**< Smaller-than-requested buffers OK */
20922944501Smrg    DRM_DMA_LARGER_OK    = 0x40  /**< Larger-than-requested buffers OK */
21022944501Smrg    /*@}*/
21122944501Smrg} drmDMAFlags;
21222944501Smrg
21322944501Smrgtypedef enum {
21422944501Smrg    DRM_PAGE_ALIGN       = 0x01,
21522944501Smrg    DRM_AGP_BUFFER       = 0x02,
21622944501Smrg    DRM_SG_BUFFER        = 0x04,
21722944501Smrg    DRM_FB_BUFFER        = 0x08,
21822944501Smrg    DRM_PCI_BUFFER_RO    = 0x10
21922944501Smrg} drmBufDescFlags;
22022944501Smrg
22122944501Smrgtypedef enum {
22222944501Smrg    DRM_LOCK_READY      = 0x01, /**< Wait until hardware is ready for DMA */
22322944501Smrg    DRM_LOCK_QUIESCENT  = 0x02, /**< Wait until hardware quiescent */
22422944501Smrg    DRM_LOCK_FLUSH      = 0x04, /**< Flush this context's DMA queue first */
22522944501Smrg    DRM_LOCK_FLUSH_ALL  = 0x08, /**< Flush all DMA queues first */
22622944501Smrg				/* These *HALT* flags aren't supported yet
22722944501Smrg                                   -- they will be used to support the
22822944501Smrg                                   full-screen DGA-like mode. */
22922944501Smrg    DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
23022944501Smrg    DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
23122944501Smrg} drmLockFlags;
23222944501Smrg
23322944501Smrgtypedef enum {
23422944501Smrg    DRM_CONTEXT_PRESERVED = 0x01, /**< This context is preserved and
23522944501Smrg				     never swapped. */
23622944501Smrg    DRM_CONTEXT_2DONLY    = 0x02  /**< This context is for 2D rendering only. */
23722944501Smrg} drm_context_tFlags, *drm_context_tFlagsPtr;
23822944501Smrg
23922944501Smrgtypedef struct _drmBufDesc {
24022944501Smrg    int              count;	  /**< Number of buffers of this size */
24122944501Smrg    int              size;	  /**< Size in bytes */
24222944501Smrg    int              low_mark;	  /**< Low water mark */
24322944501Smrg    int              high_mark;	  /**< High water mark */
24422944501Smrg} drmBufDesc, *drmBufDescPtr;
24522944501Smrg
24622944501Smrgtypedef struct _drmBufInfo {
24722944501Smrg    int              count;	  /**< Number of buffers described in list */
24822944501Smrg    drmBufDescPtr    list;	  /**< List of buffer descriptions */
24922944501Smrg} drmBufInfo, *drmBufInfoPtr;
25022944501Smrg
25122944501Smrgtypedef struct _drmBuf {
25222944501Smrg    int              idx;	  /**< Index into the master buffer list */
25322944501Smrg    int              total;	  /**< Buffer size */
25422944501Smrg    int              used;	  /**< Amount of buffer in use (for DMA) */
25522944501Smrg    drmAddress       address;	  /**< Address */
25622944501Smrg} drmBuf, *drmBufPtr;
25722944501Smrg
25822944501Smrg/**
25922944501Smrg * Buffer mapping information.
26022944501Smrg *
26122944501Smrg * Used by drmMapBufs() and drmUnmapBufs() to store information about the
26222944501Smrg * mapped buffers.
26322944501Smrg */
26422944501Smrgtypedef struct _drmBufMap {
26522944501Smrg    int              count;	  /**< Number of buffers mapped */
26622944501Smrg    drmBufPtr        list;	  /**< Buffers */
26722944501Smrg} drmBufMap, *drmBufMapPtr;
26822944501Smrg
26922944501Smrgtypedef struct _drmLock {
27022944501Smrg    volatile unsigned int lock;
27122944501Smrg    char                      padding[60];
27222944501Smrg    /* This is big enough for most current (and future?) architectures:
27322944501Smrg       DEC Alpha:              32 bytes
27422944501Smrg       Intel Merced:           ?
27522944501Smrg       Intel P5/PPro/PII/PIII: 32 bytes
27622944501Smrg       Intel StrongARM:        32 bytes
27722944501Smrg       Intel i386/i486:        16 bytes
27822944501Smrg       MIPS:                   32 bytes (?)
27922944501Smrg       Motorola 68k:           16 bytes
28022944501Smrg       Motorola PowerPC:       32 bytes
28122944501Smrg       Sun SPARC:              32 bytes
28222944501Smrg    */
28322944501Smrg} drmLock, *drmLockPtr;
28422944501Smrg
28522944501Smrg/**
28622944501Smrg * Indices here refer to the offset into
28722944501Smrg * list in drmBufInfo
28822944501Smrg */
28922944501Smrgtypedef struct _drmDMAReq {
29022944501Smrg    drm_context_t    context;  	  /**< Context handle */
29122944501Smrg    int           send_count;     /**< Number of buffers to send */
29222944501Smrg    int           *send_list;     /**< List of handles to buffers */
29322944501Smrg    int           *send_sizes;    /**< Lengths of data to send, in bytes */
29422944501Smrg    drmDMAFlags   flags;          /**< Flags */
29522944501Smrg    int           request_count;  /**< Number of buffers requested */
29622944501Smrg    int           request_size;	  /**< Desired size of buffers requested */
29722944501Smrg    int           *request_list;  /**< Buffer information */
29822944501Smrg    int           *request_sizes; /**< Minimum acceptable sizes */
29922944501Smrg    int           granted_count;  /**< Number of buffers granted at this size */
30022944501Smrg} drmDMAReq, *drmDMAReqPtr;
30122944501Smrg
30222944501Smrgtypedef struct _drmRegion {
30322944501Smrg    drm_handle_t     handle;
30422944501Smrg    unsigned int  offset;
30522944501Smrg    drmSize       size;
30622944501Smrg    drmAddress    map;
30722944501Smrg} drmRegion, *drmRegionPtr;
30822944501Smrg
30922944501Smrgtypedef struct _drmTextureRegion {
31022944501Smrg    unsigned char next;
31122944501Smrg    unsigned char prev;
31222944501Smrg    unsigned char in_use;
31322944501Smrg    unsigned char padding;	/**< Explicitly pad this out */
31422944501Smrg    unsigned int  age;
31522944501Smrg} drmTextureRegion, *drmTextureRegionPtr;
31622944501Smrg
31722944501Smrg
31822944501Smrgtypedef enum {
31922944501Smrg    DRM_VBLANK_ABSOLUTE = 0x0,	/**< Wait for specific vblank sequence number */
32022944501Smrg    DRM_VBLANK_RELATIVE = 0x1,	/**< Wait for given number of vblanks */
32120131375Smrg    /* bits 1-6 are reserved for high crtcs */
32220131375Smrg    DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
32322944501Smrg    DRM_VBLANK_EVENT = 0x4000000,	/**< Send event instead of blocking */
32422944501Smrg    DRM_VBLANK_FLIP = 0x8000000,	/**< Scheduled buffer swap should flip */
32522944501Smrg    DRM_VBLANK_NEXTONMISS = 0x10000000,	/**< If missed, wait for next vblank */
32622944501Smrg    DRM_VBLANK_SECONDARY = 0x20000000,	/**< Secondary display controller */
32722944501Smrg    DRM_VBLANK_SIGNAL   = 0x40000000	/* Send signal instead of blocking */
32822944501Smrg} drmVBlankSeqType;
32920131375Smrg#define DRM_VBLANK_HIGH_CRTC_SHIFT 1
33022944501Smrg
33122944501Smrgtypedef struct _drmVBlankReq {
33222944501Smrg	drmVBlankSeqType type;
33322944501Smrg	unsigned int sequence;
33422944501Smrg	unsigned long signal;
33522944501Smrg} drmVBlankReq, *drmVBlankReqPtr;
33622944501Smrg
33722944501Smrgtypedef struct _drmVBlankReply {
33822944501Smrg	drmVBlankSeqType type;
33922944501Smrg	unsigned int sequence;
34022944501Smrg	long tval_sec;
34122944501Smrg	long tval_usec;
34222944501Smrg} drmVBlankReply, *drmVBlankReplyPtr;
34322944501Smrg
34422944501Smrgtypedef union _drmVBlank {
34522944501Smrg	drmVBlankReq request;
34622944501Smrg	drmVBlankReply reply;
34722944501Smrg} drmVBlank, *drmVBlankPtr;
34822944501Smrg
34922944501Smrgtypedef struct _drmSetVersion {
35022944501Smrg	int drm_di_major;
35122944501Smrg	int drm_di_minor;
35222944501Smrg	int drm_dd_major;
35322944501Smrg	int drm_dd_minor;
35422944501Smrg} drmSetVersion, *drmSetVersionPtr;
35522944501Smrg
35622944501Smrg#define __drm_dummy_lock(lock) (*(__volatile__ unsigned int *)lock)
35722944501Smrg
35822944501Smrg#define DRM_LOCK_HELD  0x80000000U /**< Hardware lock is held */
35922944501Smrg#define DRM_LOCK_CONT  0x40000000U /**< Hardware lock is contended */
36022944501Smrg
3612e6867f6Smrg#if 1
3622e6867f6Smrg
3632e6867f6Smrg#define DRM_CAS(lock, old, new, __ret)	\
3642e6867f6Smrg (__ret = atomic_cas_uint(&__drm_dummy_lock(lock), (old), (new)) != (old));
3652e6867f6Smrg
3662e6867f6Smrg#elif defined(__GNUC__) && (__GNUC__ >= 2)
36722944501Smrg# if defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__)
36822944501Smrg				/* Reflect changes here to drmP.h */
36922944501Smrg#define DRM_CAS(lock,old,new,__ret)                                    \
37022944501Smrg	do {                                                           \
37122944501Smrg                int __dummy;	/* Can't mark eax as clobbered */      \
37222944501Smrg		__asm__ __volatile__(                                  \
37322944501Smrg			"lock ; cmpxchg %4,%1\n\t"                     \
37422944501Smrg                        "setnz %0"                                     \
37522944501Smrg			: "=d" (__ret),                                \
37622944501Smrg   			  "=m" (__drm_dummy_lock(lock)),               \
37722944501Smrg                          "=a" (__dummy)                               \
37822944501Smrg			: "2" (old),                                   \
37922944501Smrg			  "r" (new));                                  \
38022944501Smrg	} while (0)
38122944501Smrg
38222944501Smrg#elif defined(__alpha__)
38322944501Smrg
38422944501Smrg#define	DRM_CAS(lock, old, new, ret)		\
38522944501Smrg	do {					\
38622944501Smrg		int tmp, old32;			\
38722944501Smrg		__asm__ __volatile__(		\
38822944501Smrg		"	addl	$31, %5, %3\n"	\
38922944501Smrg		"1:	ldl_l	%0, %2\n"	\
39022944501Smrg		"	cmpeq	%0, %3, %1\n"	\
39122944501Smrg		"	beq	%1, 2f\n"	\
39222944501Smrg		"	mov	%4, %0\n"	\
39322944501Smrg		"	stl_c	%0, %2\n"	\
39422944501Smrg		"	beq	%0, 3f\n"	\
39522944501Smrg		"	mb\n"			\
39622944501Smrg		"2:	cmpeq	%1, 0, %1\n"	\
39722944501Smrg		".subsection 2\n"		\
39822944501Smrg		"3:	br	1b\n"		\
39922944501Smrg		".previous"			\
40022944501Smrg		: "=&r"(tmp), "=&r"(ret),	\
40122944501Smrg		  "=m"(__drm_dummy_lock(lock)),	\
40222944501Smrg		  "=&r"(old32)			\
40322944501Smrg		: "r"(new), "r"(old)		\
40422944501Smrg		: "memory");			\
40522944501Smrg	} while (0)
40622944501Smrg
40722944501Smrg#elif defined(__sparc__)
40822944501Smrg
40922944501Smrg#define DRM_CAS(lock,old,new,__ret)				\
41022944501Smrgdo {	register unsigned int __old __asm("o0");		\
41122944501Smrg	register unsigned int __new __asm("o1");		\
41222944501Smrg	register volatile unsigned int *__lock __asm("o2");	\
41322944501Smrg	__old = old;						\
41422944501Smrg	__new = new;						\
41522944501Smrg	__lock = (volatile unsigned int *)lock;			\
41622944501Smrg	__asm__ __volatile__(					\
41722944501Smrg		/*"cas [%2], %3, %0"*/				\
41822944501Smrg		".word 0xd3e29008\n\t"				\
41922944501Smrg		/*"membar #StoreStore | #StoreLoad"*/		\
42022944501Smrg		".word 0x8143e00a"				\
42122944501Smrg		: "=&r" (__new)					\
42222944501Smrg		: "0" (__new),					\
42322944501Smrg		  "r" (__lock),					\
42422944501Smrg		  "r" (__old)					\
42522944501Smrg		: "memory");					\
42622944501Smrg	__ret = (__new != __old);				\
42722944501Smrg} while(0)
42822944501Smrg
42922944501Smrg#elif defined(__ia64__)
43022944501Smrg
43122944501Smrg#ifdef __INTEL_COMPILER
43222944501Smrg/* this currently generates bad code (missing stop bits)... */
43322944501Smrg#include <ia64intrin.h>
43422944501Smrg
43522944501Smrg#define DRM_CAS(lock,old,new,__ret)					      \
43622944501Smrg	do {								      \
43722944501Smrg		unsigned long __result, __old = (old) & 0xffffffff;		\
43822944501Smrg		__mf();							      	\
43922944501Smrg		__result = _InterlockedCompareExchange_acq(&__drm_dummy_lock(lock), (new), __old);\
44022944501Smrg		__ret = (__result) != (__old);					\
44122944501Smrg/*		__ret = (__sync_val_compare_and_swap(&__drm_dummy_lock(lock), \
44222944501Smrg						     (old), (new))	      \
44322944501Smrg			 != (old));					      */\
44422944501Smrg	} while (0)
44522944501Smrg
44622944501Smrg#else
44722944501Smrg#define DRM_CAS(lock,old,new,__ret)					  \
44822944501Smrg	do {								  \
44922944501Smrg		unsigned int __result, __old = (old);			  \
45022944501Smrg		__asm__ __volatile__(					  \
45122944501Smrg			"mf\n"						  \
45222944501Smrg			"mov ar.ccv=%2\n"				  \
45322944501Smrg			";;\n"						  \
45422944501Smrg			"cmpxchg4.acq %0=%1,%3,ar.ccv"			  \
45522944501Smrg			: "=r" (__result), "=m" (__drm_dummy_lock(lock))  \
45622944501Smrg			: "r" ((unsigned long)__old), "r" (new)			  \
45722944501Smrg			: "memory");					  \
45822944501Smrg		__ret = (__result) != (__old);				  \
45922944501Smrg	} while (0)
46022944501Smrg
46122944501Smrg#endif
46222944501Smrg
46322944501Smrg#elif defined(__powerpc__)
46422944501Smrg
46522944501Smrg#define DRM_CAS(lock,old,new,__ret)			\
46622944501Smrg	do {						\
46722944501Smrg		__asm__ __volatile__(			\
46822944501Smrg			"sync;"				\
46922944501Smrg			"0:    lwarx %0,0,%1;"		\
47022944501Smrg			"      xor. %0,%3,%0;"		\
47122944501Smrg			"      bne 1f;"			\
47222944501Smrg			"      stwcx. %2,0,%1;"		\
47322944501Smrg			"      bne- 0b;"		\
47422944501Smrg			"1:    "			\
47522944501Smrg			"sync;"				\
47622944501Smrg		: "=&r"(__ret)				\
47722944501Smrg		: "r"(lock), "r"(new), "r"(old)		\
47822944501Smrg		: "cr0", "memory");			\
47922944501Smrg	} while (0)
48022944501Smrg
48122944501Smrg#endif /* architecture */
48222944501Smrg#endif /* __GNUC__ >= 2 */
48322944501Smrg
48422944501Smrg#ifndef DRM_CAS
48522944501Smrg#define DRM_CAS(lock,old,new,ret) do { ret=1; } while (0) /* FAST LOCK FAILS */
48622944501Smrg#endif
48722944501Smrg
48822944501Smrg#if defined(__alpha__)
48922944501Smrg#define DRM_CAS_RESULT(_result)		long _result
49022944501Smrg#elif defined(__powerpc__)
49122944501Smrg#define DRM_CAS_RESULT(_result)		int _result
49222944501Smrg#else
49322944501Smrg#define DRM_CAS_RESULT(_result)		char _result
49422944501Smrg#endif
49522944501Smrg
49622944501Smrg#define DRM_LIGHT_LOCK(fd,lock,context)                                \
49722944501Smrg	do {                                                           \
49822944501Smrg                DRM_CAS_RESULT(__ret);                                 \
49922944501Smrg		DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret);     \
50022944501Smrg                if (__ret) drmGetLock(fd,context,0);                   \
50122944501Smrg        } while(0)
50222944501Smrg
50322944501Smrg				/* This one counts fast locks -- for
50422944501Smrg                                   benchmarking only. */
50522944501Smrg#define DRM_LIGHT_LOCK_COUNT(fd,lock,context,count)                    \
50622944501Smrg	do {                                                           \
50722944501Smrg                DRM_CAS_RESULT(__ret);                                 \
50822944501Smrg		DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret);     \
50922944501Smrg                if (__ret) drmGetLock(fd,context,0);                   \
51022944501Smrg                else       ++count;                                    \
51122944501Smrg        } while(0)
51222944501Smrg
51322944501Smrg#define DRM_LOCK(fd,lock,context,flags)                                \
51422944501Smrg	do {                                                           \
51522944501Smrg		if (flags) drmGetLock(fd,context,flags);               \
51622944501Smrg		else       DRM_LIGHT_LOCK(fd,lock,context);            \
51722944501Smrg	} while(0)
51822944501Smrg
51922944501Smrg#define DRM_UNLOCK(fd,lock,context)                                    \
52022944501Smrg	do {                                                           \
52122944501Smrg                DRM_CAS_RESULT(__ret);                                 \
52222944501Smrg		DRM_CAS(lock,DRM_LOCK_HELD|context,context,__ret);     \
52322944501Smrg                if (__ret) drmUnlock(fd,context);                      \
52422944501Smrg        } while(0)
52522944501Smrg
52622944501Smrg				/* Simple spin locks */
52722944501Smrg#define DRM_SPINLOCK(spin,val)                                         \
52822944501Smrg	do {                                                           \
52922944501Smrg            DRM_CAS_RESULT(__ret);                                     \
53022944501Smrg	    do {                                                       \
53122944501Smrg		DRM_CAS(spin,0,val,__ret);                             \
53222944501Smrg		if (__ret) while ((spin)->lock);                       \
53322944501Smrg	    } while (__ret);                                           \
53422944501Smrg	} while(0)
53522944501Smrg
53622944501Smrg#define DRM_SPINLOCK_TAKE(spin,val)                                    \
53722944501Smrg	do {                                                           \
53822944501Smrg            DRM_CAS_RESULT(__ret);                                     \
53922944501Smrg            int  cur;                                                  \
54022944501Smrg	    do {                                                       \
54122944501Smrg                cur = (*spin).lock;                                    \
54222944501Smrg		DRM_CAS(spin,cur,val,__ret);                           \
54322944501Smrg	    } while (__ret);                                           \
54422944501Smrg	} while(0)
54522944501Smrg
54622944501Smrg#define DRM_SPINLOCK_COUNT(spin,val,count,__ret)                       \
54722944501Smrg	do {                                                           \
54822944501Smrg            int  __i;                                                  \
54922944501Smrg            __ret = 1;                                                 \
55022944501Smrg            for (__i = 0; __ret && __i < count; __i++) {               \
55122944501Smrg		DRM_CAS(spin,0,val,__ret);                             \
55222944501Smrg		if (__ret) for (;__i < count && (spin)->lock; __i++);  \
55322944501Smrg	    }                                                          \
55422944501Smrg	} while(0)
55522944501Smrg
55622944501Smrg#define DRM_SPINUNLOCK(spin,val)                                       \
55722944501Smrg	do {                                                           \
55822944501Smrg            DRM_CAS_RESULT(__ret);                                     \
55922944501Smrg            if ((*spin).lock == val) { /* else server stole lock */    \
56022944501Smrg	        do {                                                   \
56122944501Smrg		    DRM_CAS(spin,val,0,__ret);                         \
56222944501Smrg	        } while (__ret);                                       \
56322944501Smrg            }                                                          \
56422944501Smrg	} while(0)
56522944501Smrg
56622944501Smrg
56722944501Smrg
56822944501Smrg/* General user-level programmer's API: unprivileged */
56922944501Smrgextern int           drmAvailable(void);
57022944501Smrgextern int           drmOpen(const char *name, const char *busid);
571424e9256Smrg
572424e9256Smrg#define DRM_NODE_PRIMARY 0
573424e9256Smrg#define DRM_NODE_CONTROL 1
574424e9256Smrg#define DRM_NODE_RENDER  2
575fe517fc9Smrg#define DRM_NODE_MAX     3
576fe517fc9Smrg
577424e9256Smrgextern int           drmOpenWithType(const char *name, const char *busid,
578424e9256Smrg                                     int type);
579424e9256Smrg
580424e9256Smrgextern int           drmOpenControl(int minor);
581424e9256Smrgextern int           drmOpenRender(int minor);
58222944501Smrgextern int           drmClose(int fd);
58322944501Smrgextern drmVersionPtr drmGetVersion(int fd);
58422944501Smrgextern drmVersionPtr drmGetLibVersion(int fd);
58520131375Smrgextern int           drmGetCap(int fd, uint64_t capability, uint64_t *value);
58622944501Smrgextern void          drmFreeVersion(drmVersionPtr);
58722944501Smrgextern int           drmGetMagic(int fd, drm_magic_t * magic);
58822944501Smrgextern char          *drmGetBusid(int fd);
58922944501Smrgextern int           drmGetInterruptFromBusID(int fd, int busnum, int devnum,
59022944501Smrg					      int funcnum);
59122944501Smrgextern int           drmGetMap(int fd, int idx, drm_handle_t *offset,
59222944501Smrg			       drmSize *size, drmMapType *type,
59322944501Smrg			       drmMapFlags *flags, drm_handle_t *handle,
59422944501Smrg			       int *mtrr);
59522944501Smrgextern int           drmGetClient(int fd, int idx, int *auth, int *pid,
59622944501Smrg				  int *uid, unsigned long *magic,
59722944501Smrg				  unsigned long *iocs);
59822944501Smrgextern int           drmGetStats(int fd, drmStatsT *stats);
59922944501Smrgextern int           drmSetInterfaceVersion(int fd, drmSetVersion *version);
60022944501Smrgextern int           drmCommandNone(int fd, unsigned long drmCommandIndex);
60122944501Smrgextern int           drmCommandRead(int fd, unsigned long drmCommandIndex,
60222944501Smrg                                    void *data, unsigned long size);
60322944501Smrgextern int           drmCommandWrite(int fd, unsigned long drmCommandIndex,
60422944501Smrg                                     void *data, unsigned long size);
60522944501Smrgextern int           drmCommandWriteRead(int fd, unsigned long drmCommandIndex,
60622944501Smrg                                         void *data, unsigned long size);
60722944501Smrg
60822944501Smrg/* General user-level programmer's API: X server (root) only  */
60922944501Smrgextern void          drmFreeBusid(const char *busid);
61022944501Smrgextern int           drmSetBusid(int fd, const char *busid);
61122944501Smrgextern int           drmAuthMagic(int fd, drm_magic_t magic);
61222944501Smrgextern int           drmAddMap(int fd,
61322944501Smrg			       drm_handle_t offset,
61422944501Smrg			       drmSize size,
61522944501Smrg			       drmMapType type,
61622944501Smrg			       drmMapFlags flags,
61722944501Smrg			       drm_handle_t * handle);
61822944501Smrgextern int	     drmRmMap(int fd, drm_handle_t handle);
61922944501Smrgextern int	     drmAddContextPrivateMapping(int fd, drm_context_t ctx_id,
62022944501Smrg						 drm_handle_t handle);
62122944501Smrg
62222944501Smrgextern int           drmAddBufs(int fd, int count, int size,
62322944501Smrg				drmBufDescFlags flags,
62422944501Smrg				int agp_offset);
62522944501Smrgextern int           drmMarkBufs(int fd, double low, double high);
62622944501Smrgextern int           drmCreateContext(int fd, drm_context_t * handle);
62722944501Smrgextern int           drmSetContextFlags(int fd, drm_context_t context,
62822944501Smrg					drm_context_tFlags flags);
62922944501Smrgextern int           drmGetContextFlags(int fd, drm_context_t context,
63022944501Smrg					drm_context_tFlagsPtr flags);
63122944501Smrgextern int           drmAddContextTag(int fd, drm_context_t context, void *tag);
63222944501Smrgextern int           drmDelContextTag(int fd, drm_context_t context);
63322944501Smrgextern void          *drmGetContextTag(int fd, drm_context_t context);
63422944501Smrgextern drm_context_t * drmGetReservedContextList(int fd, int *count);
63522944501Smrgextern void          drmFreeReservedContextList(drm_context_t *);
63622944501Smrgextern int           drmSwitchToContext(int fd, drm_context_t context);
63722944501Smrgextern int           drmDestroyContext(int fd, drm_context_t handle);
63822944501Smrgextern int           drmCreateDrawable(int fd, drm_drawable_t * handle);
63922944501Smrgextern int           drmDestroyDrawable(int fd, drm_drawable_t handle);
64022944501Smrgextern int           drmUpdateDrawableInfo(int fd, drm_drawable_t handle,
64122944501Smrg					   drm_drawable_info_type_t type,
64222944501Smrg					   unsigned int num, void *data);
64322944501Smrgextern int           drmCtlInstHandler(int fd, int irq);
64422944501Smrgextern int           drmCtlUninstHandler(int fd);
64520131375Smrgextern int           drmSetClientCap(int fd, uint64_t capability,
64620131375Smrg				     uint64_t value);
64722944501Smrg
6482b90624aSmrgextern int           drmCrtcGetSequence(int fd, uint32_t crtcId,
6492b90624aSmrg					uint64_t *sequence, uint64_t *ns);
6502b90624aSmrgextern int           drmCrtcQueueSequence(int fd, uint32_t crtcId,
6512b90624aSmrg					  uint32_t flags, uint64_t sequence,
6522b90624aSmrg					  uint64_t *sequence_queued,
6532b90624aSmrg					  uint64_t user_data);
65422944501Smrg/* General user-level programmer's API: authenticated client and/or X */
65522944501Smrgextern int           drmMap(int fd,
65622944501Smrg			    drm_handle_t handle,
65722944501Smrg			    drmSize size,
65822944501Smrg			    drmAddressPtr address);
65922944501Smrgextern int           drmUnmap(drmAddress address, drmSize size);
66022944501Smrgextern drmBufInfoPtr drmGetBufInfo(int fd);
66122944501Smrgextern drmBufMapPtr  drmMapBufs(int fd);
66222944501Smrgextern int           drmUnmapBufs(drmBufMapPtr bufs);
66322944501Smrgextern int           drmDMA(int fd, drmDMAReqPtr request);
66422944501Smrgextern int           drmFreeBufs(int fd, int count, int *list);
66522944501Smrgextern int           drmGetLock(int fd,
66622944501Smrg			        drm_context_t context,
66722944501Smrg			        drmLockFlags flags);
66822944501Smrgextern int           drmUnlock(int fd, drm_context_t context);
66922944501Smrgextern int           drmFinish(int fd, int context, drmLockFlags flags);
67022944501Smrgextern int	     drmGetContextPrivateMapping(int fd, drm_context_t ctx_id,
67122944501Smrg						 drm_handle_t * handle);
67222944501Smrg
67322944501Smrg/* AGP/GART support: X server (root) only */
67422944501Smrgextern int           drmAgpAcquire(int fd);
67522944501Smrgextern int           drmAgpRelease(int fd);
67622944501Smrgextern int           drmAgpEnable(int fd, unsigned long mode);
67722944501Smrgextern int           drmAgpAlloc(int fd, unsigned long size,
67822944501Smrg				 unsigned long type, unsigned long *address,
67922944501Smrg				 drm_handle_t *handle);
68022944501Smrgextern int           drmAgpFree(int fd, drm_handle_t handle);
68122944501Smrgextern int 	     drmAgpBind(int fd, drm_handle_t handle,
68222944501Smrg				unsigned long offset);
68322944501Smrgextern int           drmAgpUnbind(int fd, drm_handle_t handle);
68422944501Smrg
68522944501Smrg/* AGP/GART info: authenticated client and/or X */
68622944501Smrgextern int           drmAgpVersionMajor(int fd);
68722944501Smrgextern int           drmAgpVersionMinor(int fd);
68822944501Smrgextern unsigned long drmAgpGetMode(int fd);
68922944501Smrgextern unsigned long drmAgpBase(int fd); /* Physical location */
69022944501Smrgextern unsigned long drmAgpSize(int fd); /* Bytes */
69122944501Smrgextern unsigned long drmAgpMemoryUsed(int fd);
69222944501Smrgextern unsigned long drmAgpMemoryAvail(int fd);
69322944501Smrgextern unsigned int  drmAgpVendorId(int fd);
69422944501Smrgextern unsigned int  drmAgpDeviceId(int fd);
69522944501Smrg
69622944501Smrg/* PCI scatter/gather support: X server (root) only */
69722944501Smrgextern int           drmScatterGatherAlloc(int fd, unsigned long size,
69822944501Smrg					   drm_handle_t *handle);
69922944501Smrgextern int           drmScatterGatherFree(int fd, drm_handle_t handle);
70022944501Smrg
70122944501Smrgextern int           drmWaitVBlank(int fd, drmVBlankPtr vbl);
70222944501Smrg
70322944501Smrg/* Support routines */
70422944501Smrgextern void          drmSetServerInfo(drmServerInfoPtr info);
70522944501Smrgextern int           drmError(int err, const char *label);
70622944501Smrgextern void          *drmMalloc(int size);
70722944501Smrgextern void          drmFree(void *pt);
70822944501Smrg
70922944501Smrg/* Hash table routines */
71022944501Smrgextern void *drmHashCreate(void);
71122944501Smrgextern int  drmHashDestroy(void *t);
71222944501Smrgextern int  drmHashLookup(void *t, unsigned long key, void **value);
71322944501Smrgextern int  drmHashInsert(void *t, unsigned long key, void *value);
71422944501Smrgextern int  drmHashDelete(void *t, unsigned long key);
71522944501Smrgextern int  drmHashFirst(void *t, unsigned long *key, void **value);
71622944501Smrgextern int  drmHashNext(void *t, unsigned long *key, void **value);
71722944501Smrg
71822944501Smrg/* PRNG routines */
71922944501Smrgextern void          *drmRandomCreate(unsigned long seed);
72022944501Smrgextern int           drmRandomDestroy(void *state);
72122944501Smrgextern unsigned long drmRandom(void *state);
72222944501Smrgextern double        drmRandomDouble(void *state);
72322944501Smrg
72422944501Smrg/* Skip list routines */
72522944501Smrg
72622944501Smrgextern void *drmSLCreate(void);
72722944501Smrgextern int  drmSLDestroy(void *l);
72822944501Smrgextern int  drmSLLookup(void *l, unsigned long key, void **value);
72922944501Smrgextern int  drmSLInsert(void *l, unsigned long key, void *value);
73022944501Smrgextern int  drmSLDelete(void *l, unsigned long key);
73122944501Smrgextern int  drmSLNext(void *l, unsigned long *key, void **value);
73222944501Smrgextern int  drmSLFirst(void *l, unsigned long *key, void **value);
73322944501Smrgextern void drmSLDump(void *l);
73422944501Smrgextern int  drmSLLookupNeighbors(void *l, unsigned long key,
73522944501Smrg				 unsigned long *prev_key, void **prev_value,
73622944501Smrg				 unsigned long *next_key, void **next_value);
73722944501Smrg
73822944501Smrgextern int drmOpenOnce(void *unused, const char *BusID, int *newlyopened);
739424e9256Smrgextern int drmOpenOnceWithType(const char *BusID, int *newlyopened, int type);
74022944501Smrgextern void drmCloseOnce(int fd);
741a7d7de1eSmrgextern void drmMsg(const char *format, ...) DRM_PRINTFLIKE(1, 2);
74222944501Smrg
74322944501Smrgextern int drmSetMaster(int fd);
74422944501Smrgextern int drmDropMaster(int fd);
745bf6cc7dcSmrgextern int drmIsMaster(int fd);
74622944501Smrg
7472b90624aSmrg#define DRM_EVENT_CONTEXT_VERSION 4
74822944501Smrg
74922944501Smrgtypedef struct _drmEventContext {
75022944501Smrg
75122944501Smrg	/* This struct is versioned so we can add more pointers if we
75222944501Smrg	 * add more events. */
75322944501Smrg	int version;
75422944501Smrg
75522944501Smrg	void (*vblank_handler)(int fd,
75622944501Smrg			       unsigned int sequence,
75722944501Smrg			       unsigned int tv_sec,
75822944501Smrg			       unsigned int tv_usec,
75922944501Smrg			       void *user_data);
76022944501Smrg
76122944501Smrg	void (*page_flip_handler)(int fd,
76222944501Smrg				  unsigned int sequence,
76322944501Smrg				  unsigned int tv_sec,
76422944501Smrg				  unsigned int tv_usec,
76522944501Smrg				  void *user_data);
76622944501Smrg
7670655efefSmrg	void (*page_flip_handler2)(int fd,
7680655efefSmrg				   unsigned int sequence,
7690655efefSmrg				   unsigned int tv_sec,
7700655efefSmrg				   unsigned int tv_usec,
7710655efefSmrg				   unsigned int crtc_id,
7720655efefSmrg				   void *user_data);
7730655efefSmrg
7742b90624aSmrg	void (*sequence_handler)(int fd,
7752b90624aSmrg				 uint64_t sequence,
7762b90624aSmrg				 uint64_t ns,
7772b90624aSmrg				 uint64_t user_data);
77822944501Smrg} drmEventContext, *drmEventContextPtr;
77922944501Smrg
78022944501Smrgextern int drmHandleEvent(int fd, drmEventContextPtr evctx);
78122944501Smrg
78222944501Smrgextern char *drmGetDeviceNameFromFd(int fd);
7832ee35494Smrg
7842ee35494Smrg/* Improved version of drmGetDeviceNameFromFd which attributes for any type of
7852ee35494Smrg * device/node - card, control or renderD.
7862ee35494Smrg */
7872ee35494Smrgextern char *drmGetDeviceNameFromFd2(int fd);
788424e9256Smrgextern int drmGetNodeTypeFromFd(int fd);
78922944501Smrg
79020131375Smrgextern int drmPrimeHandleToFD(int fd, uint32_t handle, uint32_t flags, int *prime_fd);
79120131375Smrgextern int drmPrimeFDToHandle(int fd, int prime_fd, uint32_t *handle);
79220131375Smrg
793424e9256Smrgextern char *drmGetPrimaryDeviceNameFromFd(int fd);
794424e9256Smrgextern char *drmGetRenderDeviceNameFromFd(int fd);
795424e9256Smrg
7962ee35494Smrg#define DRM_BUS_PCI       0
7972ee35494Smrg#define DRM_BUS_USB       1
7982ee35494Smrg#define DRM_BUS_PLATFORM  2
7992ee35494Smrg#define DRM_BUS_HOST1X    3
800fe517fc9Smrg
801fe517fc9Smrgtypedef struct _drmPciBusInfo {
802fe517fc9Smrg    uint16_t domain;
803fe517fc9Smrg    uint8_t bus;
804fe517fc9Smrg    uint8_t dev;
805fe517fc9Smrg    uint8_t func;
806fe517fc9Smrg} drmPciBusInfo, *drmPciBusInfoPtr;
807fe517fc9Smrg
808fe517fc9Smrgtypedef struct _drmPciDeviceInfo {
809fe517fc9Smrg    uint16_t vendor_id;
810fe517fc9Smrg    uint16_t device_id;
811fe517fc9Smrg    uint16_t subvendor_id;
812fe517fc9Smrg    uint16_t subdevice_id;
813fe517fc9Smrg    uint8_t revision_id;
814fe517fc9Smrg} drmPciDeviceInfo, *drmPciDeviceInfoPtr;
815fe517fc9Smrg
8162ee35494Smrgtypedef struct _drmUsbBusInfo {
8172ee35494Smrg    uint8_t bus;
8182ee35494Smrg    uint8_t dev;
8192ee35494Smrg} drmUsbBusInfo, *drmUsbBusInfoPtr;
8202ee35494Smrg
8212ee35494Smrgtypedef struct _drmUsbDeviceInfo {
8222ee35494Smrg    uint16_t vendor;
8232ee35494Smrg    uint16_t product;
8242ee35494Smrg} drmUsbDeviceInfo, *drmUsbDeviceInfoPtr;
8252ee35494Smrg
8262ee35494Smrg#define DRM_PLATFORM_DEVICE_NAME_LEN 512
8272ee35494Smrg
8282ee35494Smrgtypedef struct _drmPlatformBusInfo {
8292ee35494Smrg    char fullname[DRM_PLATFORM_DEVICE_NAME_LEN];
8302ee35494Smrg} drmPlatformBusInfo, *drmPlatformBusInfoPtr;
8312ee35494Smrg
8322ee35494Smrgtypedef struct _drmPlatformDeviceInfo {
8332ee35494Smrg    char **compatible; /* NULL terminated list of compatible strings */
8342ee35494Smrg} drmPlatformDeviceInfo, *drmPlatformDeviceInfoPtr;
8352ee35494Smrg
8362ee35494Smrg#define DRM_HOST1X_DEVICE_NAME_LEN 512
8372ee35494Smrg
8382ee35494Smrgtypedef struct _drmHost1xBusInfo {
8392ee35494Smrg    char fullname[DRM_HOST1X_DEVICE_NAME_LEN];
8402ee35494Smrg} drmHost1xBusInfo, *drmHost1xBusInfoPtr;
8412ee35494Smrg
8422ee35494Smrgtypedef struct _drmHost1xDeviceInfo {
8432ee35494Smrg    char **compatible; /* NULL terminated list of compatible strings */
8442ee35494Smrg} drmHost1xDeviceInfo, *drmHost1xDeviceInfoPtr;
8452ee35494Smrg
846fe517fc9Smrgtypedef struct _drmDevice {
847fe517fc9Smrg    char **nodes; /* DRM_NODE_MAX sized array */
848fe517fc9Smrg    int available_nodes; /* DRM_NODE_* bitmask */
849fe517fc9Smrg    int bustype;
850fe517fc9Smrg    union {
851fe517fc9Smrg        drmPciBusInfoPtr pci;
8522ee35494Smrg        drmUsbBusInfoPtr usb;
8532ee35494Smrg        drmPlatformBusInfoPtr platform;
8542ee35494Smrg        drmHost1xBusInfoPtr host1x;
855fe517fc9Smrg    } businfo;
856fe517fc9Smrg    union {
857fe517fc9Smrg        drmPciDeviceInfoPtr pci;
8582ee35494Smrg        drmUsbDeviceInfoPtr usb;
8592ee35494Smrg        drmPlatformDeviceInfoPtr platform;
8602ee35494Smrg        drmHost1xDeviceInfoPtr host1x;
861fe517fc9Smrg    } deviceinfo;
862fe517fc9Smrg} drmDevice, *drmDevicePtr;
863fe517fc9Smrg
864fe517fc9Smrgextern int drmGetDevice(int fd, drmDevicePtr *device);
865fe517fc9Smrgextern void drmFreeDevice(drmDevicePtr *device);
866fe517fc9Smrg
867fe517fc9Smrgextern int drmGetDevices(drmDevicePtr devices[], int max_devices);
868fe517fc9Smrgextern void drmFreeDevices(drmDevicePtr devices[], int count);
869fe517fc9Smrg
8702ee35494Smrg#define DRM_DEVICE_GET_PCI_REVISION (1 << 0)
8712ee35494Smrgextern int drmGetDevice2(int fd, uint32_t flags, drmDevicePtr *device);
8722ee35494Smrgextern int drmGetDevices2(uint32_t flags, drmDevicePtr devices[], int max_devices);
8732ee35494Smrg
8740655efefSmrgextern int drmDevicesEqual(drmDevicePtr a, drmDevicePtr b);
8750655efefSmrg
8760655efefSmrgextern int drmSyncobjCreate(int fd, uint32_t flags, uint32_t *handle);
8770655efefSmrgextern int drmSyncobjDestroy(int fd, uint32_t handle);
8780655efefSmrgextern int drmSyncobjHandleToFD(int fd, uint32_t handle, int *obj_fd);
8790655efefSmrgextern int drmSyncobjFDToHandle(int fd, int obj_fd, uint32_t *handle);
8800655efefSmrg
8810655efefSmrgextern int drmSyncobjImportSyncFile(int fd, uint32_t handle, int sync_file_fd);
8820655efefSmrgextern int drmSyncobjExportSyncFile(int fd, uint32_t handle, int *sync_file_fd);
8832b90624aSmrgextern int drmSyncobjWait(int fd, uint32_t *handles, unsigned num_handles,
8842b90624aSmrg			  int64_t timeout_nsec, unsigned flags,
8852b90624aSmrg			  uint32_t *first_signaled);
8862b90624aSmrgextern int drmSyncobjReset(int fd, const uint32_t *handles, uint32_t handle_count);
8872b90624aSmrgextern int drmSyncobjSignal(int fd, const uint32_t *handles, uint32_t handle_count);
888bf6cc7dcSmrgextern int drmSyncobjTimelineSignal(int fd, const uint32_t *handles,
889bf6cc7dcSmrg				    uint64_t *points, uint32_t handle_count);
890bf6cc7dcSmrgextern int drmSyncobjTimelineWait(int fd, uint32_t *handles, uint64_t *points,
891bf6cc7dcSmrg				  unsigned num_handles,
892bf6cc7dcSmrg				  int64_t timeout_nsec, unsigned flags,
893bf6cc7dcSmrg				  uint32_t *first_signaled);
894bf6cc7dcSmrgextern int drmSyncobjQuery(int fd, uint32_t *handles, uint64_t *points,
895bf6cc7dcSmrg			   uint32_t handle_count);
896bf6cc7dcSmrgextern int drmSyncobjTransfer(int fd,
897bf6cc7dcSmrg			      uint32_t dst_handle, uint64_t dst_point,
898bf6cc7dcSmrg			      uint32_t src_handle, uint64_t src_point,
899bf6cc7dcSmrg			      uint32_t flags);
9000655efefSmrg
901fe517fc9Smrg#if defined(__cplusplus)
90220131375Smrg}
90320131375Smrg#endif
90420131375Smrg
90522944501Smrg#endif
906