xf86drm.h revision 22944501
1/** 2 * \file xf86drm.h 3 * OS-independent header for DRM user-level library interface. 4 * 5 * \author Rickard E. (Rik) Faith <faith@valinux.com> 6 */ 7 8/* 9 * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. 10 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 11 * All Rights Reserved. 12 * 13 * Permission is hereby granted, free of charge, to any person obtaining a 14 * copy of this software and associated documentation files (the "Software"), 15 * to deal in the Software without restriction, including without limitation 16 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 17 * and/or sell copies of the Software, and to permit persons to whom the 18 * Software is furnished to do so, subject to the following conditions: 19 * 20 * The above copyright notice and this permission notice (including the next 21 * paragraph) shall be included in all copies or substantial portions of the 22 * Software. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 27 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 28 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 29 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 30 * DEALINGS IN THE SOFTWARE. 31 * 32 */ 33 34#ifndef _XF86DRM_H_ 35#define _XF86DRM_H_ 36 37#include <stdarg.h> 38#include <sys/types.h> 39#include <stdint.h> 40#include <drm.h> 41 42#ifndef DRM_MAX_MINOR 43#define DRM_MAX_MINOR 16 44#endif 45 46#if defined(__linux__) 47 48#define DRM_IOCTL_NR(n) _IOC_NR(n) 49#define DRM_IOC_VOID _IOC_NONE 50#define DRM_IOC_READ _IOC_READ 51#define DRM_IOC_WRITE _IOC_WRITE 52#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 53#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 54 55#else /* One of the *BSDs */ 56 57#include <sys/ioccom.h> 58#define DRM_IOCTL_NR(n) ((n) & 0xff) 59#define DRM_IOC_VOID IOC_VOID 60#define DRM_IOC_READ IOC_OUT 61#define DRM_IOC_WRITE IOC_IN 62#define DRM_IOC_READWRITE IOC_INOUT 63#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 64 65#endif 66 67 /* Defaults, if nothing set in xf86config */ 68#define DRM_DEV_UID 0 69#define DRM_DEV_GID 0 70/* Default /dev/dri directory permissions 0755 */ 71#define DRM_DEV_DIRMODE \ 72 (S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH) 73#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) 74 75#define DRM_DIR_NAME "/dev/dri" 76#define DRM_DEV_NAME "%s/card%d" 77#define DRM_CONTROL_DEV_NAME "%s/controlD%d" 78#define DRM_PROC_NAME "/proc/dri/" /* For backward Linux compatibility */ 79 80#define DRM_ERR_NO_DEVICE (-1001) 81#define DRM_ERR_NO_ACCESS (-1002) 82#define DRM_ERR_NOT_ROOT (-1003) 83#define DRM_ERR_INVALID (-1004) 84#define DRM_ERR_NO_FD (-1005) 85 86#define DRM_AGP_NO_HANDLE 0 87 88typedef unsigned int drmSize, *drmSizePtr; /**< For mapped regions */ 89typedef void *drmAddress, **drmAddressPtr; /**< For mapped regions */ 90 91typedef struct _drmServerInfo { 92 int (*debug_print)(const char *format, va_list ap); 93 int (*load_module)(const char *name); 94 void (*get_perms)(gid_t *, mode_t *); 95} drmServerInfo, *drmServerInfoPtr; 96 97typedef struct drmHashEntry { 98 int fd; 99 void (*f)(int, void *, void *); 100 void *tagTable; 101} drmHashEntry; 102 103extern int drmIoctl(int fd, unsigned long request, void *arg); 104extern void *drmGetHashTable(void); 105extern drmHashEntry *drmGetEntry(int fd); 106 107/** 108 * Driver version information. 109 * 110 * \sa drmGetVersion() and drmSetVersion(). 111 */ 112typedef struct _drmVersion { 113 int version_major; /**< Major version */ 114 int version_minor; /**< Minor version */ 115 int version_patchlevel; /**< Patch level */ 116 int name_len; /**< Length of name buffer */ 117 char *name; /**< Name of driver */ 118 int date_len; /**< Length of date buffer */ 119 char *date; /**< User-space buffer to hold date */ 120 int desc_len; /**< Length of desc buffer */ 121 char *desc; /**< User-space buffer to hold desc */ 122} drmVersion, *drmVersionPtr; 123 124typedef struct _drmStats { 125 unsigned long count; /**< Number of data */ 126 struct { 127 unsigned long value; /**< Value from kernel */ 128 const char *long_format; /**< Suggested format for long_name */ 129 const char *long_name; /**< Long name for value */ 130 const char *rate_format; /**< Suggested format for rate_name */ 131 const char *rate_name; /**< Short name for value per second */ 132 int isvalue; /**< True if value (vs. counter) */ 133 const char *mult_names; /**< Multiplier names (e.g., "KGM") */ 134 int mult; /**< Multiplier value (e.g., 1024) */ 135 int verbose; /**< Suggest only in verbose output */ 136 } data[15]; 137} drmStatsT; 138 139 140 /* All of these enums *MUST* match with the 141 kernel implementation -- so do *NOT* 142 change them! (The drmlib implementation 143 will just copy the flags instead of 144 translating them.) */ 145typedef enum { 146 DRM_FRAME_BUFFER = 0, /**< WC, no caching, no core dump */ 147 DRM_REGISTERS = 1, /**< no caching, no core dump */ 148 DRM_SHM = 2, /**< shared, cached */ 149 DRM_AGP = 3, /**< AGP/GART */ 150 DRM_SCATTER_GATHER = 4, /**< PCI scatter/gather */ 151 DRM_CONSISTENT = 5 /**< PCI consistent */ 152} drmMapType; 153 154typedef enum { 155 DRM_RESTRICTED = 0x0001, /**< Cannot be mapped to client-virtual */ 156 DRM_READ_ONLY = 0x0002, /**< Read-only in client-virtual */ 157 DRM_LOCKED = 0x0004, /**< Physical pages locked */ 158 DRM_KERNEL = 0x0008, /**< Kernel requires access */ 159 DRM_WRITE_COMBINING = 0x0010, /**< Use write-combining, if available */ 160 DRM_CONTAINS_LOCK = 0x0020, /**< SHM page that contains lock */ 161 DRM_REMOVABLE = 0x0040 /**< Removable mapping */ 162} drmMapFlags; 163 164/** 165 * \warning These values *MUST* match drm.h 166 */ 167typedef enum { 168 /** \name Flags for DMA buffer dispatch */ 169 /*@{*/ 170 DRM_DMA_BLOCK = 0x01, /**< 171 * Block until buffer dispatched. 172 * 173 * \note the buffer may not yet have been 174 * processed by the hardware -- getting a 175 * hardware lock with the hardware quiescent 176 * will ensure that the buffer has been 177 * processed. 178 */ 179 DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 180 DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 181 /*@}*/ 182 183 /** \name Flags for DMA buffer request */ 184 /*@{*/ 185 DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 186 DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 187 DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 188 /*@}*/ 189} drmDMAFlags; 190 191typedef enum { 192 DRM_PAGE_ALIGN = 0x01, 193 DRM_AGP_BUFFER = 0x02, 194 DRM_SG_BUFFER = 0x04, 195 DRM_FB_BUFFER = 0x08, 196 DRM_PCI_BUFFER_RO = 0x10 197} drmBufDescFlags; 198 199typedef enum { 200 DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 201 DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 202 DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 203 DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 204 /* These *HALT* flags aren't supported yet 205 -- they will be used to support the 206 full-screen DGA-like mode. */ 207 DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 208 DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 209} drmLockFlags; 210 211typedef enum { 212 DRM_CONTEXT_PRESERVED = 0x01, /**< This context is preserved and 213 never swapped. */ 214 DRM_CONTEXT_2DONLY = 0x02 /**< This context is for 2D rendering only. */ 215} drm_context_tFlags, *drm_context_tFlagsPtr; 216 217typedef struct _drmBufDesc { 218 int count; /**< Number of buffers of this size */ 219 int size; /**< Size in bytes */ 220 int low_mark; /**< Low water mark */ 221 int high_mark; /**< High water mark */ 222} drmBufDesc, *drmBufDescPtr; 223 224typedef struct _drmBufInfo { 225 int count; /**< Number of buffers described in list */ 226 drmBufDescPtr list; /**< List of buffer descriptions */ 227} drmBufInfo, *drmBufInfoPtr; 228 229typedef struct _drmBuf { 230 int idx; /**< Index into the master buffer list */ 231 int total; /**< Buffer size */ 232 int used; /**< Amount of buffer in use (for DMA) */ 233 drmAddress address; /**< Address */ 234} drmBuf, *drmBufPtr; 235 236/** 237 * Buffer mapping information. 238 * 239 * Used by drmMapBufs() and drmUnmapBufs() to store information about the 240 * mapped buffers. 241 */ 242typedef struct _drmBufMap { 243 int count; /**< Number of buffers mapped */ 244 drmBufPtr list; /**< Buffers */ 245} drmBufMap, *drmBufMapPtr; 246 247typedef struct _drmLock { 248 volatile unsigned int lock; 249 char padding[60]; 250 /* This is big enough for most current (and future?) architectures: 251 DEC Alpha: 32 bytes 252 Intel Merced: ? 253 Intel P5/PPro/PII/PIII: 32 bytes 254 Intel StrongARM: 32 bytes 255 Intel i386/i486: 16 bytes 256 MIPS: 32 bytes (?) 257 Motorola 68k: 16 bytes 258 Motorola PowerPC: 32 bytes 259 Sun SPARC: 32 bytes 260 */ 261} drmLock, *drmLockPtr; 262 263/** 264 * Indices here refer to the offset into 265 * list in drmBufInfo 266 */ 267typedef struct _drmDMAReq { 268 drm_context_t context; /**< Context handle */ 269 int send_count; /**< Number of buffers to send */ 270 int *send_list; /**< List of handles to buffers */ 271 int *send_sizes; /**< Lengths of data to send, in bytes */ 272 drmDMAFlags flags; /**< Flags */ 273 int request_count; /**< Number of buffers requested */ 274 int request_size; /**< Desired size of buffers requested */ 275 int *request_list; /**< Buffer information */ 276 int *request_sizes; /**< Minimum acceptable sizes */ 277 int granted_count; /**< Number of buffers granted at this size */ 278} drmDMAReq, *drmDMAReqPtr; 279 280typedef struct _drmRegion { 281 drm_handle_t handle; 282 unsigned int offset; 283 drmSize size; 284 drmAddress map; 285} drmRegion, *drmRegionPtr; 286 287typedef struct _drmTextureRegion { 288 unsigned char next; 289 unsigned char prev; 290 unsigned char in_use; 291 unsigned char padding; /**< Explicitly pad this out */ 292 unsigned int age; 293} drmTextureRegion, *drmTextureRegionPtr; 294 295 296typedef enum { 297 DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 298 DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 299 DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ 300 DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ 301 DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 302 DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 303 DRM_VBLANK_SIGNAL = 0x40000000 /* Send signal instead of blocking */ 304} drmVBlankSeqType; 305 306typedef struct _drmVBlankReq { 307 drmVBlankSeqType type; 308 unsigned int sequence; 309 unsigned long signal; 310} drmVBlankReq, *drmVBlankReqPtr; 311 312typedef struct _drmVBlankReply { 313 drmVBlankSeqType type; 314 unsigned int sequence; 315 long tval_sec; 316 long tval_usec; 317} drmVBlankReply, *drmVBlankReplyPtr; 318 319typedef union _drmVBlank { 320 drmVBlankReq request; 321 drmVBlankReply reply; 322} drmVBlank, *drmVBlankPtr; 323 324typedef struct _drmSetVersion { 325 int drm_di_major; 326 int drm_di_minor; 327 int drm_dd_major; 328 int drm_dd_minor; 329} drmSetVersion, *drmSetVersionPtr; 330 331#define __drm_dummy_lock(lock) (*(__volatile__ unsigned int *)lock) 332 333#define DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 334#define DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 335 336#if defined(__GNUC__) && (__GNUC__ >= 2) 337# if defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__) 338 /* Reflect changes here to drmP.h */ 339#define DRM_CAS(lock,old,new,__ret) \ 340 do { \ 341 int __dummy; /* Can't mark eax as clobbered */ \ 342 __asm__ __volatile__( \ 343 "lock ; cmpxchg %4,%1\n\t" \ 344 "setnz %0" \ 345 : "=d" (__ret), \ 346 "=m" (__drm_dummy_lock(lock)), \ 347 "=a" (__dummy) \ 348 : "2" (old), \ 349 "r" (new)); \ 350 } while (0) 351 352#elif defined(__alpha__) 353 354#define DRM_CAS(lock, old, new, ret) \ 355 do { \ 356 int tmp, old32; \ 357 __asm__ __volatile__( \ 358 " addl $31, %5, %3\n" \ 359 "1: ldl_l %0, %2\n" \ 360 " cmpeq %0, %3, %1\n" \ 361 " beq %1, 2f\n" \ 362 " mov %4, %0\n" \ 363 " stl_c %0, %2\n" \ 364 " beq %0, 3f\n" \ 365 " mb\n" \ 366 "2: cmpeq %1, 0, %1\n" \ 367 ".subsection 2\n" \ 368 "3: br 1b\n" \ 369 ".previous" \ 370 : "=&r"(tmp), "=&r"(ret), \ 371 "=m"(__drm_dummy_lock(lock)), \ 372 "=&r"(old32) \ 373 : "r"(new), "r"(old) \ 374 : "memory"); \ 375 } while (0) 376 377#elif defined(__sparc__) 378 379#define DRM_CAS(lock,old,new,__ret) \ 380do { register unsigned int __old __asm("o0"); \ 381 register unsigned int __new __asm("o1"); \ 382 register volatile unsigned int *__lock __asm("o2"); \ 383 __old = old; \ 384 __new = new; \ 385 __lock = (volatile unsigned int *)lock; \ 386 __asm__ __volatile__( \ 387 /*"cas [%2], %3, %0"*/ \ 388 ".word 0xd3e29008\n\t" \ 389 /*"membar #StoreStore | #StoreLoad"*/ \ 390 ".word 0x8143e00a" \ 391 : "=&r" (__new) \ 392 : "0" (__new), \ 393 "r" (__lock), \ 394 "r" (__old) \ 395 : "memory"); \ 396 __ret = (__new != __old); \ 397} while(0) 398 399#elif defined(__ia64__) 400 401#ifdef __INTEL_COMPILER 402/* this currently generates bad code (missing stop bits)... */ 403#include <ia64intrin.h> 404 405#define DRM_CAS(lock,old,new,__ret) \ 406 do { \ 407 unsigned long __result, __old = (old) & 0xffffffff; \ 408 __mf(); \ 409 __result = _InterlockedCompareExchange_acq(&__drm_dummy_lock(lock), (new), __old);\ 410 __ret = (__result) != (__old); \ 411/* __ret = (__sync_val_compare_and_swap(&__drm_dummy_lock(lock), \ 412 (old), (new)) \ 413 != (old)); */\ 414 } while (0) 415 416#else 417#define DRM_CAS(lock,old,new,__ret) \ 418 do { \ 419 unsigned int __result, __old = (old); \ 420 __asm__ __volatile__( \ 421 "mf\n" \ 422 "mov ar.ccv=%2\n" \ 423 ";;\n" \ 424 "cmpxchg4.acq %0=%1,%3,ar.ccv" \ 425 : "=r" (__result), "=m" (__drm_dummy_lock(lock)) \ 426 : "r" ((unsigned long)__old), "r" (new) \ 427 : "memory"); \ 428 __ret = (__result) != (__old); \ 429 } while (0) 430 431#endif 432 433#elif defined(__powerpc__) 434 435#define DRM_CAS(lock,old,new,__ret) \ 436 do { \ 437 __asm__ __volatile__( \ 438 "sync;" \ 439 "0: lwarx %0,0,%1;" \ 440 " xor. %0,%3,%0;" \ 441 " bne 1f;" \ 442 " stwcx. %2,0,%1;" \ 443 " bne- 0b;" \ 444 "1: " \ 445 "sync;" \ 446 : "=&r"(__ret) \ 447 : "r"(lock), "r"(new), "r"(old) \ 448 : "cr0", "memory"); \ 449 } while (0) 450 451#endif /* architecture */ 452#endif /* __GNUC__ >= 2 */ 453 454#ifndef DRM_CAS 455#define DRM_CAS(lock,old,new,ret) do { ret=1; } while (0) /* FAST LOCK FAILS */ 456#endif 457 458#if defined(__alpha__) 459#define DRM_CAS_RESULT(_result) long _result 460#elif defined(__powerpc__) 461#define DRM_CAS_RESULT(_result) int _result 462#else 463#define DRM_CAS_RESULT(_result) char _result 464#endif 465 466#define DRM_LIGHT_LOCK(fd,lock,context) \ 467 do { \ 468 DRM_CAS_RESULT(__ret); \ 469 DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret); \ 470 if (__ret) drmGetLock(fd,context,0); \ 471 } while(0) 472 473 /* This one counts fast locks -- for 474 benchmarking only. */ 475#define DRM_LIGHT_LOCK_COUNT(fd,lock,context,count) \ 476 do { \ 477 DRM_CAS_RESULT(__ret); \ 478 DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret); \ 479 if (__ret) drmGetLock(fd,context,0); \ 480 else ++count; \ 481 } while(0) 482 483#define DRM_LOCK(fd,lock,context,flags) \ 484 do { \ 485 if (flags) drmGetLock(fd,context,flags); \ 486 else DRM_LIGHT_LOCK(fd,lock,context); \ 487 } while(0) 488 489#define DRM_UNLOCK(fd,lock,context) \ 490 do { \ 491 DRM_CAS_RESULT(__ret); \ 492 DRM_CAS(lock,DRM_LOCK_HELD|context,context,__ret); \ 493 if (__ret) drmUnlock(fd,context); \ 494 } while(0) 495 496 /* Simple spin locks */ 497#define DRM_SPINLOCK(spin,val) \ 498 do { \ 499 DRM_CAS_RESULT(__ret); \ 500 do { \ 501 DRM_CAS(spin,0,val,__ret); \ 502 if (__ret) while ((spin)->lock); \ 503 } while (__ret); \ 504 } while(0) 505 506#define DRM_SPINLOCK_TAKE(spin,val) \ 507 do { \ 508 DRM_CAS_RESULT(__ret); \ 509 int cur; \ 510 do { \ 511 cur = (*spin).lock; \ 512 DRM_CAS(spin,cur,val,__ret); \ 513 } while (__ret); \ 514 } while(0) 515 516#define DRM_SPINLOCK_COUNT(spin,val,count,__ret) \ 517 do { \ 518 int __i; \ 519 __ret = 1; \ 520 for (__i = 0; __ret && __i < count; __i++) { \ 521 DRM_CAS(spin,0,val,__ret); \ 522 if (__ret) for (;__i < count && (spin)->lock; __i++); \ 523 } \ 524 } while(0) 525 526#define DRM_SPINUNLOCK(spin,val) \ 527 do { \ 528 DRM_CAS_RESULT(__ret); \ 529 if ((*spin).lock == val) { /* else server stole lock */ \ 530 do { \ 531 DRM_CAS(spin,val,0,__ret); \ 532 } while (__ret); \ 533 } \ 534 } while(0) 535 536 537 538/* General user-level programmer's API: unprivileged */ 539extern int drmAvailable(void); 540extern int drmOpen(const char *name, const char *busid); 541extern int drmOpenControl(int minor); 542extern int drmClose(int fd); 543extern drmVersionPtr drmGetVersion(int fd); 544extern drmVersionPtr drmGetLibVersion(int fd); 545extern void drmFreeVersion(drmVersionPtr); 546extern int drmGetMagic(int fd, drm_magic_t * magic); 547extern char *drmGetBusid(int fd); 548extern int drmGetInterruptFromBusID(int fd, int busnum, int devnum, 549 int funcnum); 550extern int drmGetMap(int fd, int idx, drm_handle_t *offset, 551 drmSize *size, drmMapType *type, 552 drmMapFlags *flags, drm_handle_t *handle, 553 int *mtrr); 554extern int drmGetClient(int fd, int idx, int *auth, int *pid, 555 int *uid, unsigned long *magic, 556 unsigned long *iocs); 557extern int drmGetStats(int fd, drmStatsT *stats); 558extern int drmSetInterfaceVersion(int fd, drmSetVersion *version); 559extern int drmCommandNone(int fd, unsigned long drmCommandIndex); 560extern int drmCommandRead(int fd, unsigned long drmCommandIndex, 561 void *data, unsigned long size); 562extern int drmCommandWrite(int fd, unsigned long drmCommandIndex, 563 void *data, unsigned long size); 564extern int drmCommandWriteRead(int fd, unsigned long drmCommandIndex, 565 void *data, unsigned long size); 566 567/* General user-level programmer's API: X server (root) only */ 568extern void drmFreeBusid(const char *busid); 569extern int drmSetBusid(int fd, const char *busid); 570extern int drmAuthMagic(int fd, drm_magic_t magic); 571extern int drmAddMap(int fd, 572 drm_handle_t offset, 573 drmSize size, 574 drmMapType type, 575 drmMapFlags flags, 576 drm_handle_t * handle); 577extern int drmRmMap(int fd, drm_handle_t handle); 578extern int drmAddContextPrivateMapping(int fd, drm_context_t ctx_id, 579 drm_handle_t handle); 580 581extern int drmAddBufs(int fd, int count, int size, 582 drmBufDescFlags flags, 583 int agp_offset); 584extern int drmMarkBufs(int fd, double low, double high); 585extern int drmCreateContext(int fd, drm_context_t * handle); 586extern int drmSetContextFlags(int fd, drm_context_t context, 587 drm_context_tFlags flags); 588extern int drmGetContextFlags(int fd, drm_context_t context, 589 drm_context_tFlagsPtr flags); 590extern int drmAddContextTag(int fd, drm_context_t context, void *tag); 591extern int drmDelContextTag(int fd, drm_context_t context); 592extern void *drmGetContextTag(int fd, drm_context_t context); 593extern drm_context_t * drmGetReservedContextList(int fd, int *count); 594extern void drmFreeReservedContextList(drm_context_t *); 595extern int drmSwitchToContext(int fd, drm_context_t context); 596extern int drmDestroyContext(int fd, drm_context_t handle); 597extern int drmCreateDrawable(int fd, drm_drawable_t * handle); 598extern int drmDestroyDrawable(int fd, drm_drawable_t handle); 599extern int drmUpdateDrawableInfo(int fd, drm_drawable_t handle, 600 drm_drawable_info_type_t type, 601 unsigned int num, void *data); 602extern int drmCtlInstHandler(int fd, int irq); 603extern int drmCtlUninstHandler(int fd); 604 605/* General user-level programmer's API: authenticated client and/or X */ 606extern int drmMap(int fd, 607 drm_handle_t handle, 608 drmSize size, 609 drmAddressPtr address); 610extern int drmUnmap(drmAddress address, drmSize size); 611extern drmBufInfoPtr drmGetBufInfo(int fd); 612extern drmBufMapPtr drmMapBufs(int fd); 613extern int drmUnmapBufs(drmBufMapPtr bufs); 614extern int drmDMA(int fd, drmDMAReqPtr request); 615extern int drmFreeBufs(int fd, int count, int *list); 616extern int drmGetLock(int fd, 617 drm_context_t context, 618 drmLockFlags flags); 619extern int drmUnlock(int fd, drm_context_t context); 620extern int drmFinish(int fd, int context, drmLockFlags flags); 621extern int drmGetContextPrivateMapping(int fd, drm_context_t ctx_id, 622 drm_handle_t * handle); 623 624/* AGP/GART support: X server (root) only */ 625extern int drmAgpAcquire(int fd); 626extern int drmAgpRelease(int fd); 627extern int drmAgpEnable(int fd, unsigned long mode); 628extern int drmAgpAlloc(int fd, unsigned long size, 629 unsigned long type, unsigned long *address, 630 drm_handle_t *handle); 631extern int drmAgpFree(int fd, drm_handle_t handle); 632extern int drmAgpBind(int fd, drm_handle_t handle, 633 unsigned long offset); 634extern int drmAgpUnbind(int fd, drm_handle_t handle); 635 636/* AGP/GART info: authenticated client and/or X */ 637extern int drmAgpVersionMajor(int fd); 638extern int drmAgpVersionMinor(int fd); 639extern unsigned long drmAgpGetMode(int fd); 640extern unsigned long drmAgpBase(int fd); /* Physical location */ 641extern unsigned long drmAgpSize(int fd); /* Bytes */ 642extern unsigned long drmAgpMemoryUsed(int fd); 643extern unsigned long drmAgpMemoryAvail(int fd); 644extern unsigned int drmAgpVendorId(int fd); 645extern unsigned int drmAgpDeviceId(int fd); 646 647/* PCI scatter/gather support: X server (root) only */ 648extern int drmScatterGatherAlloc(int fd, unsigned long size, 649 drm_handle_t *handle); 650extern int drmScatterGatherFree(int fd, drm_handle_t handle); 651 652extern int drmWaitVBlank(int fd, drmVBlankPtr vbl); 653 654/* Support routines */ 655extern void drmSetServerInfo(drmServerInfoPtr info); 656extern int drmError(int err, const char *label); 657extern void *drmMalloc(int size); 658extern void drmFree(void *pt); 659 660/* Hash table routines */ 661extern void *drmHashCreate(void); 662extern int drmHashDestroy(void *t); 663extern int drmHashLookup(void *t, unsigned long key, void **value); 664extern int drmHashInsert(void *t, unsigned long key, void *value); 665extern int drmHashDelete(void *t, unsigned long key); 666extern int drmHashFirst(void *t, unsigned long *key, void **value); 667extern int drmHashNext(void *t, unsigned long *key, void **value); 668 669/* PRNG routines */ 670extern void *drmRandomCreate(unsigned long seed); 671extern int drmRandomDestroy(void *state); 672extern unsigned long drmRandom(void *state); 673extern double drmRandomDouble(void *state); 674 675/* Skip list routines */ 676 677extern void *drmSLCreate(void); 678extern int drmSLDestroy(void *l); 679extern int drmSLLookup(void *l, unsigned long key, void **value); 680extern int drmSLInsert(void *l, unsigned long key, void *value); 681extern int drmSLDelete(void *l, unsigned long key); 682extern int drmSLNext(void *l, unsigned long *key, void **value); 683extern int drmSLFirst(void *l, unsigned long *key, void **value); 684extern void drmSLDump(void *l); 685extern int drmSLLookupNeighbors(void *l, unsigned long key, 686 unsigned long *prev_key, void **prev_value, 687 unsigned long *next_key, void **next_value); 688 689extern int drmOpenOnce(void *unused, const char *BusID, int *newlyopened); 690extern void drmCloseOnce(int fd); 691extern void drmMsg(const char *format, ...); 692 693extern int drmSetMaster(int fd); 694extern int drmDropMaster(int fd); 695 696#define DRM_EVENT_CONTEXT_VERSION 2 697 698typedef struct _drmEventContext { 699 700 /* This struct is versioned so we can add more pointers if we 701 * add more events. */ 702 int version; 703 704 void (*vblank_handler)(int fd, 705 unsigned int sequence, 706 unsigned int tv_sec, 707 unsigned int tv_usec, 708 void *user_data); 709 710 void (*page_flip_handler)(int fd, 711 unsigned int sequence, 712 unsigned int tv_sec, 713 unsigned int tv_usec, 714 void *user_data); 715 716} drmEventContext, *drmEventContextPtr; 717 718extern int drmHandleEvent(int fd, drmEventContextPtr evctx); 719 720extern char *drmGetDeviceNameFromFd(int fd); 721 722#endif 723