pci_tools.h revision 28d65773
14f5e7dd7Smrg/*
228d65773Smrg * Copyright © 2007 Sun Microsystems, Inc.  All rights reserved.
328d65773Smrg *
44f5e7dd7Smrg * Permission is hereby granted, free of charge, to any person obtaining a
528d65773Smrg * copy of this software and associated documentation files (the "Software"),
628d65773Smrg * to deal in the Software without restriction, including without limitation
728d65773Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
828d65773Smrg * and/or sell copies of the Software, and to permit persons to whom the
928d65773Smrg * Software is furnished to do so, subject to the following conditions:
1028d65773Smrg *
1128d65773Smrg * The above copyright notice and this permission notice (including the next
1228d65773Smrg * paragraph) shall be included in all copies or substantial portions of the
1328d65773Smrg * Software.
1428d65773Smrg *
1528d65773Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1628d65773Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1728d65773Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1828d65773Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1928d65773Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2028d65773Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
2128d65773Smrg * DEALINGS IN THE SOFTWARE.
224f5e7dd7Smrg */
234f5e7dd7Smrg#ifndef _SYS_PCI_TOOLS_H
244f5e7dd7Smrg#define	_SYS_PCI_TOOLS_H
254f5e7dd7Smrg
264f5e7dd7Smrg#pragma ident	"@(#)pci_tools.h	1.4	05/09/28 SMI"
274f5e7dd7Smrg
284f5e7dd7Smrg#include <sys/modctl.h>
294f5e7dd7Smrg
304f5e7dd7Smrg#ifdef	__cplusplus
314f5e7dd7Smrgextern "C" {
324f5e7dd7Smrg#endif
334f5e7dd7Smrg
344f5e7dd7Smrg/*
354f5e7dd7Smrg * Versioning. Have different versions for userland program and drivers, so
364f5e7dd7Smrg * they can all stay in sync with each other.
374f5e7dd7Smrg */
384f5e7dd7Smrg#define	PCITOOL_USER_VERSION	1
394f5e7dd7Smrg#define	PCITOOL_DRVR_VERSION	1
404f5e7dd7Smrg
414f5e7dd7Smrg/* File suffixes for nexus pcitool nodes. */
424f5e7dd7Smrg#define	PCI_MINOR_REG	"reg"
434f5e7dd7Smrg#define	PCI_MINOR_INTR	"intr"
444f5e7dd7Smrg
454f5e7dd7Smrg/*
464f5e7dd7Smrg * Ioctls for PCI tools.
474f5e7dd7Smrg */
484f5e7dd7Smrg#define	PCITOOL_IOC		(('P' << 24) | ('C' << 16) | ('T' << 8))
494f5e7dd7Smrg
504f5e7dd7Smrg/* Read/write a device on a PCI bus, in physical space. */
514f5e7dd7Smrg#define	PCITOOL_DEVICE_GET_REG	(PCITOOL_IOC | 1)
524f5e7dd7Smrg#define	PCITOOL_DEVICE_SET_REG	(PCITOOL_IOC | 2)
534f5e7dd7Smrg
544f5e7dd7Smrg/* Read/write the PCI nexus bridge, in physical space. */
554f5e7dd7Smrg#define	PCITOOL_NEXUS_GET_REG	(PCITOOL_IOC | 3)
564f5e7dd7Smrg#define	PCITOOL_NEXUS_SET_REG	(PCITOOL_IOC | 4)
574f5e7dd7Smrg
584f5e7dd7Smrg/* Get/set interrupt-CPU mapping for PCI devices. */
594f5e7dd7Smrg#define	PCITOOL_DEVICE_GET_INTR	(PCITOOL_IOC | 5)
604f5e7dd7Smrg#define	PCITOOL_DEVICE_SET_INTR	(PCITOOL_IOC | 6)
614f5e7dd7Smrg
624f5e7dd7Smrg/* Return the number of supported interrupts on a PCI bus. */
634f5e7dd7Smrg#define	PCITOOL_DEVICE_NUM_INTR	(PCITOOL_IOC | 7)
644f5e7dd7Smrg
654f5e7dd7Smrg
664f5e7dd7Smrg/*
674f5e7dd7Smrg * This file contains data structures for the pci tool.
684f5e7dd7Smrg */
694f5e7dd7Smrg#define	PCITOOL_CONFIG	0
704f5e7dd7Smrg#define	PCITOOL_BAR0	1
714f5e7dd7Smrg#define	PCITOOL_BAR1	2
724f5e7dd7Smrg#define	PCITOOL_BAR2	3
734f5e7dd7Smrg#define	PCITOOL_BAR3	4
744f5e7dd7Smrg#define	PCITOOL_BAR4	5
754f5e7dd7Smrg#define	PCITOOL_BAR5	6
764f5e7dd7Smrg#define	PCITOOL_ROM	7
774f5e7dd7Smrg
784f5e7dd7Smrg/*
794f5e7dd7Smrg * Pass this through barnum to signal to use a base addr instead.
804f5e7dd7Smrg * This is for platforms which do not have a way to automatically map
814f5e7dd7Smrg * a selected bank to a base addr.
824f5e7dd7Smrg */
834f5e7dd7Smrg#define	PCITOOL_BASE	0xFF
844f5e7dd7Smrg
854f5e7dd7Smrg/*
864f5e7dd7Smrg * BAR corresponding to space desired.
874f5e7dd7Smrg */
884f5e7dd7Smrgtypedef enum {
894f5e7dd7Smrg    config = PCITOOL_CONFIG,
904f5e7dd7Smrg    bar0 = PCITOOL_BAR0,
914f5e7dd7Smrg    bar1 = PCITOOL_BAR1,
924f5e7dd7Smrg    bar2 = PCITOOL_BAR2,
934f5e7dd7Smrg    bar3 = PCITOOL_BAR3,
944f5e7dd7Smrg    bar4 = PCITOOL_BAR4,
954f5e7dd7Smrg    bar5 = PCITOOL_BAR5,
964f5e7dd7Smrg    rom = PCITOOL_ROM
974f5e7dd7Smrg} pcitool_bars_t;
984f5e7dd7Smrg
994f5e7dd7Smrg
1004f5e7dd7Smrg/*
1014f5e7dd7Smrg * PCITOOL error numbers.
1024f5e7dd7Smrg */
1034f5e7dd7Smrg
1044f5e7dd7Smrgtypedef enum {
1054f5e7dd7Smrg	PCITOOL_SUCCESS = 0x0,
1064f5e7dd7Smrg	PCITOOL_INVALID_CPUID,
1074f5e7dd7Smrg	PCITOOL_INVALID_INO,
1084f5e7dd7Smrg	PCITOOL_PENDING_INTRTIMEOUT,
1094f5e7dd7Smrg	PCITOOL_REGPROP_NOTWELLFORMED,
1104f5e7dd7Smrg	PCITOOL_INVALID_ADDRESS,
1114f5e7dd7Smrg	PCITOOL_NOT_ALIGNED,
1124f5e7dd7Smrg	PCITOOL_OUT_OF_RANGE,
1134f5e7dd7Smrg	PCITOOL_END_OF_RANGE,
1144f5e7dd7Smrg	PCITOOL_ROM_DISABLED,
1154f5e7dd7Smrg	PCITOOL_ROM_WRITE,
1164f5e7dd7Smrg	PCITOOL_IO_ERROR,
1174f5e7dd7Smrg	PCITOOL_INVALID_SIZE
1184f5e7dd7Smrg} pcitool_errno_t;
1194f5e7dd7Smrg
1204f5e7dd7Smrg
1214f5e7dd7Smrg/*
1224f5e7dd7Smrg * PCITOOL_DEVICE_SET_INTR ioctl data structure to re-assign the interrupts.
1234f5e7dd7Smrg */
1244f5e7dd7Smrgtypedef struct pcitool_intr_set {
1254f5e7dd7Smrg	uint16_t user_version;	/* Userland program version - to krnl */
1264f5e7dd7Smrg	uint16_t drvr_version;	/* Driver version - from kernel */
1274f5e7dd7Smrg	uint32_t ino;		/* interrupt to set - to kernel */
1284f5e7dd7Smrg	uint32_t cpu_id;	/* to: cpu to set / from: old cpu returned */
1294f5e7dd7Smrg	pcitool_errno_t status;	/* from kernel */
1304f5e7dd7Smrg} pcitool_intr_set_t;
1314f5e7dd7Smrg
1324f5e7dd7Smrg
1334f5e7dd7Smrg/*
1344f5e7dd7Smrg * PCITOOL_DEVICE_GET_INTR ioctl data structure to dump out the
1354f5e7dd7Smrg * ino mapping information.
1364f5e7dd7Smrg */
1374f5e7dd7Smrg
1384f5e7dd7Smrgtypedef struct pcitool_intr_dev {
1394f5e7dd7Smrg	uint32_t	dev_inst;	/* device instance - from kernel */
1404f5e7dd7Smrg	char		driver_name[MAXMODCONFNAME];	/* from kernel */
1414f5e7dd7Smrg	char		path[MAXPATHLEN]; /* device path - from kernel */
1424f5e7dd7Smrg} pcitool_intr_dev_t;
1434f5e7dd7Smrg
1444f5e7dd7Smrg
1454f5e7dd7Smrgtypedef struct pcitool_intr_get {
1464f5e7dd7Smrg	uint16_t user_version;		/* Userland program version - to krnl */
1474f5e7dd7Smrg	uint16_t drvr_version;		/* Driver version - from kernel */
1484f5e7dd7Smrg	uint32_t	ino;		/* interrupt number - to kernel */
1494f5e7dd7Smrg	uint8_t		num_devs_ret;	/* room for this # of devs to be */
1504f5e7dd7Smrg					/* returned - to kernel */
1514f5e7dd7Smrg					/* # devs returned - from kernel */
1524f5e7dd7Smrg	uint8_t		num_devs;	/* # devs on this ino - from kernel */
1534f5e7dd7Smrg					/* intrs enabled for devs if > 0 */
1544f5e7dd7Smrg	uint8_t		ctlr;		/* controller number - from kernel */
1554f5e7dd7Smrg	uint32_t	cpu_id;		/* cpu of interrupt - from kernel */
1564f5e7dd7Smrg	pcitool_errno_t status;		/* returned status - from kernel */
1574f5e7dd7Smrg	pcitool_intr_dev_t	dev[1];	/* start of variable device list */
1584f5e7dd7Smrg					/* from kernel */
1594f5e7dd7Smrg} pcitool_intr_get_t;
1604f5e7dd7Smrg
1614f5e7dd7Smrg/*
1624f5e7dd7Smrg * Get the size needed to return the number of devices wanted.
1634f5e7dd7Smrg * Can't say num_devs - 1 as num_devs may be unsigned.
1644f5e7dd7Smrg */
1654f5e7dd7Smrg#define	PCITOOL_IGET_SIZE(num_devs) \
1664f5e7dd7Smrg	(sizeof (pcitool_intr_get_t) - \
1674f5e7dd7Smrg	sizeof (pcitool_intr_dev_t) + \
1684f5e7dd7Smrg	(num_devs * sizeof (pcitool_intr_dev_t)))
1694f5e7dd7Smrg
1704f5e7dd7Smrg/*
1714f5e7dd7Smrg * Size and endian fields for acc_attr bitmask.
1724f5e7dd7Smrg */
1734f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_SIZE_MASK	0x3
1744f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_SIZE_1		0x0
1754f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_SIZE_2		0x1
1764f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_SIZE_4		0x2
1774f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_SIZE_8		0x3
1784f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_SIZE(x)	(1 << (x & PCITOOL_ACC_ATTR_SIZE_MASK))
1794f5e7dd7Smrg
1804f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_ENDN_MASK	0x100
1814f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_ENDN_LTL	0x0
1824f5e7dd7Smrg#define	PCITOOL_ACC_ATTR_ENDN_BIG	0x100
1834f5e7dd7Smrg#define	PCITOOL_ACC_IS_BIG_ENDIAN(x)	(x & PCITOOL_ACC_ATTR_ENDN_BIG)
1844f5e7dd7Smrg
1854f5e7dd7Smrg/*
1864f5e7dd7Smrg * Data structure to read and write to pci device registers.
1874f5e7dd7Smrg * This is the argument to the following ioctls:
1884f5e7dd7Smrg *	PCITOOL_DEVICE_SET/GET_REG
1894f5e7dd7Smrg *	PCITOOL_NEXUS_SET/GET_REG
1904f5e7dd7Smrg */
1914f5e7dd7Smrgtypedef struct pcitool_reg {
1924f5e7dd7Smrg	uint16_t	user_version;	/* Userland program version - to krnl */
1934f5e7dd7Smrg	uint16_t	drvr_version;	/* Driver version - from kernel */
1944f5e7dd7Smrg	uint8_t		bus_no;		/* pci bus - to kernel */
1954f5e7dd7Smrg	uint8_t		dev_no;		/* pci dev - to kernel */
1964f5e7dd7Smrg	uint8_t		func_no;	/* pci function - to kernel */
1974f5e7dd7Smrg	uint8_t		barnum;		/* bank (DEVCTL_NEXUS_SET/GET_REG) or */
1984f5e7dd7Smrg					/*   BAR from pcitools_bar_t */
1994f5e7dd7Smrg					/*   (DEVCTL_DEVICE_SET/GET_REG) */
2004f5e7dd7Smrg					/*   to kernel */
2014f5e7dd7Smrg	uint64_t	offset;		/* to kernel */
2024f5e7dd7Smrg	uint32_t	acc_attr;	/* access attributes - to kernel */
2034f5e7dd7Smrg	uint32_t	padding1;	/* 8-byte align next uint64_t for X86 */
2044f5e7dd7Smrg	uint64_t	data;		/* to/from kernel, 64-bit alignment */
2054f5e7dd7Smrg	uint32_t	status;		/* from kernel */
2064f5e7dd7Smrg	uint32_t	padding2;	/* 8-byte align next uint64_t for X86 */
2074f5e7dd7Smrg	uint64_t	phys_addr;	/* from kernel, 64-bit alignment */
2084f5e7dd7Smrg} pcitool_reg_t;
2094f5e7dd7Smrg
2104f5e7dd7Smrg
2114f5e7dd7Smrg#ifdef	__cplusplus
2124f5e7dd7Smrg}
2134f5e7dd7Smrg#endif
2144f5e7dd7Smrg
2154f5e7dd7Smrg#endif	/* _SYS_PCI_TOOLS_H */
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