1e49c54bcSmrgcommit 7025aefcdf9673665588cf291c5d71beb39cce89 2e49c54bcSmrgAuthor: Shashank Sharma <shashank.sharma@amd.com> 3e49c54bcSmrgDate: Wed Feb 22 18:00:23 2023 +0100 4e49c54bcSmrg 5e49c54bcSmrg Bump version for the 23.0.0 release 6e49c54bcSmrg 7e49c54bcSmrg This release includes some bug fixes. 8e49c54bcSmrg 9e49c54bcSmrg Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> 10e49c54bcSmrg 11e49c54bcSmrgcommit 6ee320917093ad0f7d68e516d3224d3c04ca13ee 12e49c54bcSmrgAuthor: Shashank Sharma <shashank.sharma@amd.com> 13e49c54bcSmrgDate: Mon Nov 28 13:08:36 2022 +0100 14e49c54bcSmrg 15e49c54bcSmrg config: Add hotplug driver name 16e49c54bcSmrg 17e49c54bcSmrg This patch adds the PCI-hotplug handler driver name in the 18e49c54bcSmrg DDX config file with respect to Xorg commit:82bf391c 19e49c54bcSmrg 20e49c54bcSmrg Cc: Alexander Deucher <alexander.deucher@amd.com> 21e49c54bcSmrg Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> 22e49c54bcSmrg 23e49c54bcSmrgcommit 2ec854d48e0e44fc60c3955663f700cbefea3553 24e49c54bcSmrgAuthor: Mario Kleiner <mario.kleiner.de@gmail.com> 25e49c54bcSmrgDate: Fri Nov 11 02:18:07 2022 +0100 26e49c54bcSmrg 27e49c54bcSmrg Fix primary output handling in amdgpu_crtc_covering_box(). 28e49c54bcSmrg 29e49c54bcSmrg Commit e39a3ee07c9dea73b0452b71b1ef633b6cd6f389 30e49c54bcSmrg tries to reintroduce the RandR primary output as a tie breaker 31e49c54bcSmrg in amdgpu_crtc_covering_box(), but that function wrongly 32e49c54bcSmrg assigns a void* devPrivate, which is actually a xf86CrtcPtr, 33e49c54bcSmrg to the RRCrtcPtr primary_crtc, a pointer target type mismatch! 34e49c54bcSmrg 35e49c54bcSmrg This causes a later pointer comparison of primary_crtc with 36e49c54bcSmrg RRCrtcPtr crtc to always fail, so that the user selected 37e49c54bcSmrg primary output can not ever successfully act as a tie-breaker 38e49c54bcSmrg when multiple candidate crtcs cover the same box area, 39e49c54bcSmrg defeating the whole purpose of that commit! Not sure how 40e49c54bcSmrg this failure could have ever evaded any basic testing. 41e49c54bcSmrg 42e49c54bcSmrg Fix this trivially by assigning the right variable. 43e49c54bcSmrg 44e49c54bcSmrg Successfully tested on a multi-display setup, verifying 45e49c54bcSmrg that the primary output now works as tie breaker as 46e49c54bcSmrg intended. 47e49c54bcSmrg 48e49c54bcSmrg Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> 49e49c54bcSmrg Fixes: e39a3ee07c9d ("Prefer crtc of primary output for synchronization when screen has to crtcs with the same coverage") 50e49c54bcSmrg 51e49c54bcSmrgcommit 9c959fac3af28d191105f63236096ad456dca614 52e49c54bcSmrgAuthor: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> 53e49c54bcSmrgDate: Thu Sep 29 16:42:09 2022 +0200 54e49c54bcSmrg 55e49c54bcSmrg Use DRM_CAP_CURSOR_WIDTH/HEIGHT if possible 56e49c54bcSmrg 57e49c54bcSmrg There's no need to hardcode the cursor size if the kernel can 58e49c54bcSmrg report the value it wants. 59e49c54bcSmrg 60e49c54bcSmrgcommit 4e011b91fa3ef58b85327d3429889efd934b3531 61e49c54bcSmrgAuthor: Alan Coopersmith <alan.coopersmith@oracle.com> 62e49c54bcSmrgDate: Tue Aug 2 15:03:19 2022 -0700 63e49c54bcSmrg 64e49c54bcSmrg gitlab CI: enable gitlab's builtin static analysis 65e49c54bcSmrg 66e49c54bcSmrg Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com> 67e49c54bcSmrg 68e49c54bcSmrgcommit dc81177ef342bf8c2aa5a6fd6687c7a09b4f9709 69e49c54bcSmrgAuthor: tiancyin <tianci.yin@amd.com> 70e49c54bcSmrgDate: Wed Aug 10 16:46:15 2022 +0800 71e49c54bcSmrg 72e49c54bcSmrg Fix screen corruption on secondary GPU 73e49c54bcSmrg 74e49c54bcSmrg [why] 75e49c54bcSmrg On RHEL9+, xorg-server.pc shows that the Xorg no longer depends on dri, 76e49c54bcSmrg and dri.pc provides "/opt/amdgpu/include" path for pkg-config, this 77e49c54bcSmrg cause pkg-config no longer output "-I/opt/amdgpu/include", consequently 78e49c54bcSmrg the configure can't find gbm.h and HAVE_GBM_BO_USE_LINEAR is not 79e49c54bcSmrg declared, that cause the corruption. 80e49c54bcSmrg 81e49c54bcSmrg [how] 82e49c54bcSmrg Since the gbm.pc also provides the "/opt/amdgpu/include" path, in module 83e49c54bcSmrg dependence checking, GBM_CFLAGS get this path, so just explicitly add 84e49c54bcSmrg GBM_CFLAGS into CPPFLAGS can fix this issue. 85e49c54bcSmrg 86e49c54bcSmrg Signed-off-by: tiancyin <tianci.yin@amd.com> 87e49c54bcSmrg 88e49c54bcSmrgcommit a3a012b649eb9b3066abefe163a72854514792fa 89e49c54bcSmrgAuthor: Kai-Heng Feng <kai.heng.feng@canonical.com> 90e49c54bcSmrgDate: Mon Aug 8 10:49:11 2022 +0800 91e49c54bcSmrg 92e49c54bcSmrg Initialize present extension for GPU screen 93e49c54bcSmrg 94e49c54bcSmrg Some laptops have the external outputs routed to dGPU, when the external 95e49c54bcSmrg output over dGPU is the only display in reverse prime mode, we need 96e49c54bcSmrg present extension so fake CRTC won't be used. 97e49c54bcSmrg 98e49c54bcSmrgcommit f3f57a58342c286808220bdbe6dc6bb7098763b9 99e49c54bcSmrgAuthor: Lukasz Spintzyk <lukasz.spintzyk@displaylink.com> 100e49c54bcSmrgDate: Fri Jun 11 14:54:35 2021 +0200 101e49c54bcSmrg 102e49c54bcSmrg Do not consider disabled crtc anymore when looking for xf86crtc covering drawable. 103e49c54bcSmrg 104e49c54bcSmrg This is commit is removing obsolete switch done in 105e49c54bcSmrg 106e49c54bcSmrg xf86-video-ati at sha 61d0aec40e2521488c2fe43e7a6823e5c87d94d7: video: add option to include disabled CRTCs in best CRTC search 107e49c54bcSmrg This is not required anymore as with commit done in 108e49c54bcSmrg xorg-server at sha 5c5c1b77982a9af7279a90bc3c2be48adaa9c778: present: Add Present extension 109e49c54bcSmrg That in case of lack of crtc is using fake_crtc with render 1Hz frequency 110e49c54bcSmrg 111e49c54bcSmrg When consider_disabled is removed then amdgpu_pick_best_crtc is doing the same what rr_crtc_covering_box is doing 112e49c54bcSmrg so it can be reimplemented to reuse that function. 113e49c54bcSmrg 114e49c54bcSmrg Signed-off-by: Łukasz Spintzyk <lukasz.spintzyk@synaptics.com> 115e49c54bcSmrg Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com> 116e49c54bcSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 117e49c54bcSmrg 118e49c54bcSmrgcommit e39a3ee07c9dea73b0452b71b1ef633b6cd6f389 119e49c54bcSmrgAuthor: Lukasz Spintzyk <lukasz.spintzyk@displaylink.com> 120e49c54bcSmrgDate: Mon Jun 21 11:41:40 2021 +0200 121e49c54bcSmrg 122e49c54bcSmrg Prefer crtc of primary output for synchronization when screen has to crtcs with the same coverage 123e49c54bcSmrg 124e49c54bcSmrg This is adjusting randr_crtc_covering_drawable to cover scenario fixed in 125e49c54bcSmrg 9151f3b1c2ebcc34e63195888ba696f2183ba5e2 126e49c54bcSmrg 127e49c54bcSmrg Signed-off-by: Łukasz Spintzyk <lukasz.spintzyk@synaptics.com> 128e49c54bcSmrg Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com> 129e49c54bcSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 130e49c54bcSmrg 131e49c54bcSmrgcommit 92fb43b8e96bbda77e03b7313ccbba75a304a1b1 132e49c54bcSmrgAuthor: Lukasz Spintzyk <lukasz.spintzyk@displaylink.com> 133e49c54bcSmrgDate: Fri Jun 11 08:52:58 2021 +0200 134e49c54bcSmrg 135e49c54bcSmrg Use randr_crtc_covering_drawable used in modesetting 136e49c54bcSmrg 137e49c54bcSmrg Use implementation from modesetting driver that is fixing issue: 138e49c54bcSmrg https://gitlab.freedesktop.org/xorg/xserver/-/issues/1028 139e49c54bcSmrg 140e49c54bcSmrg Instead of returning primary crtc as fallback we can now find and return crtc that belongs to secondary outputs. 141e49c54bcSmrg 142e49c54bcSmrg v2: 143e49c54bcSmrg restore original naming scheme for amdgpu_crtc_is_enabled, amdgpu_box_intersect, amdgpu_box_area functions 144e49c54bcSmrg 145e49c54bcSmrg Signed-off-by: Łukasz Spintzyk <lukasz.spintzyk@synaptics.com> 146e49c54bcSmrg Signed-off-by: Emilia Majewska <emilia.majewska@synaptics.com> 147e49c54bcSmrg Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com> 148e49c54bcSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 149e49c54bcSmrg 150e49c54bcSmrgcommit 57740ae2357ca7b973f78be31327365aaa60ed41 151e49c54bcSmrgAuthor: Łukasz Spintzyk <lukasz.spintzyk@synaptics.com> 152e49c54bcSmrgDate: Tue Jun 22 07:36:42 2021 +0200 153e49c54bcSmrg 154e49c54bcSmrg amdgpu: fixup driver for new X server ABI 155e49c54bcSmrg 156e49c54bcSmrg Signed-off-by: Łukasz Spintzyk <lukasz.spintzyk@synaptics.com> 157e49c54bcSmrg Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com> 158e49c54bcSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 159e49c54bcSmrg 160e49c54bcSmrgcommit 89b3eb9fffe2ead4257eee6d65accbac135aedc9 161e49c54bcSmrgAuthor: Alan Coopersmith <alan.coopersmith@oracle.com> 162e49c54bcSmrgDate: Sat Feb 19 12:07:46 2022 -0800 163e49c54bcSmrg 164e49c54bcSmrg Update URLs to reflect gitlab migration 165e49c54bcSmrg 166e49c54bcSmrg Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com> 167e49c54bcSmrg 168e49c54bcSmrgcommit 533bd30ceaa373788b3d0bfd4d486f0f1c624d0c 169e49c54bcSmrgAuthor: Shashank Sharma <shashank.sharma@amd.com> 170e49c54bcSmrgDate: Tue Feb 22 16:25:01 2022 +0100 171e49c54bcSmrg 172e49c54bcSmrg Bump version for the 22.0.0 release 173e49c54bcSmrg 174e49c54bcSmrg This release includes some bug fixes and one minor feature. 175e49c54bcSmrg 176e49c54bcSmrg Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> 177e49c54bcSmrg 178e49c54bcSmrgcommit 402bfdead7d512726c01359c03fcd37b4efdc975 179e49c54bcSmrgAuthor: Alan Coopersmith <alan.coopersmith@oracle.com> 180e49c54bcSmrgDate: Mon Jan 17 14:20:53 2022 -0800 181e49c54bcSmrg 182e49c54bcSmrg Build xz tarballs instead of bzip2 183e49c54bcSmrg 184e49c54bcSmrg Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com> 185e49c54bcSmrg 186e49c54bcSmrgcommit c21bcdd1cbdc340a80d1ebfbf02376e2dad9c67c 187e49c54bcSmrgAuthor: Jesse Zhang <jesse.zhang@amd.com> 188e49c54bcSmrgDate: Wed Feb 16 16:11:44 2022 +0100 189e49c54bcSmrg 190e49c54bcSmrg glamor: unset AMDGPU_CREATE_PIXMAP_SCANOUT on shared pixmap 191e49c54bcSmrg 192e49c54bcSmrg While running multi-display test(for both APUs and DGPUs), if 193e49c54bcSmrg the screen setting mode is changed from "single mode" to "share mode", 194e49c54bcSmrg the screen shows tiled distortion, due to wrongly created pixmap. 195e49c54bcSmrg This is a regression. 196e49c54bcSmrg 197e49c54bcSmrg Fixes: 0732f81a2c67 ("glamor: Make pixmap scanout compatible if its dimensions are") 198e49c54bcSmrg Closes: https://gitlab.freedesktop.org/xorg/driver/xf86-video-amdgpu/-/issues/48 199e49c54bcSmrg 200e49c54bcSmrg Acked-by: Shashank Sharma <shashank.sharma@amd.com> 201e49c54bcSmrg Signed-off-by: Jesse Zhang <jesse.zhang@amd.com> 202e49c54bcSmrg Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> 203e49c54bcSmrg 204e49c54bcSmrgcommit 8bc148f0c14f6a6df1c3643a774e00a00c7942c6 205e49c54bcSmrgAuthor: Alan Coopersmith <alan.coopersmith@oracle.com> 206e49c54bcSmrgDate: Mon Jan 17 14:25:12 2022 -0800 207e49c54bcSmrg 208e49c54bcSmrg Fix spelling/wording issues 209e49c54bcSmrg 210e49c54bcSmrg Found by using: 211e49c54bcSmrg codespell --builtin clear,rare,usage,informal,code,names 212e49c54bcSmrg 213e49c54bcSmrg Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com> 214e49c54bcSmrg 215e49c54bcSmrgcommit 65c127366a22c03d2ffcdcdf91eec28cac733e83 216e49c54bcSmrgAuthor: Mario Kleiner <mario.kleiner.de@gmail.com> 217e49c54bcSmrgDate: Tue Jan 25 03:44:47 2022 +0100 218e49c54bcSmrg 219e49c54bcSmrg Add option for non-vsynced flips for "secondary" outputs. 220e49c54bcSmrg 221e49c54bcSmrg This is a straightforward port of a patch with the same name 222e49c54bcSmrg "modesetting: Add option for non-vsynced flips for "secondary" 223e49c54bcSmrg outputs." from X-Server master / X-Server 21.1. See server MR 742. 224e49c54bcSmrg The description below is therefore identical to that X-Server commit: 225e49c54bcSmrg 226e49c54bcSmrg Whenever an unredirected fullscreen window uses pageflipping for a 227e49c54bcSmrg DRI3/Present PresentPixmap() operation and the X-Screen has more than 228e49c54bcSmrg one active output, multiple crtc's need to execute pageflips. Only 229e49c54bcSmrg after the last flip has completed can the PresentPixmap operation 230e49c54bcSmrg as a whole complete. 231e49c54bcSmrg 232e49c54bcSmrg If a sync_flip is requested for the present, then the current 233e49c54bcSmrg implementation will synchronize each pageflip to the vblank of 234e49c54bcSmrg its associated crtc. This provides tear-free image presentation 235e49c54bcSmrg across all outputs, but introduces a different artifact, if not 236e49c54bcSmrg all outputs run at the same refresh rate with perfect synchrony: 237e49c54bcSmrg The slowest output throttles the presentation rate, and present 238e49c54bcSmrg completion is delayed to flip completion of the "latest" output 239e49c54bcSmrg to complete. This means degraded performance, e.g., a dual-display 240e49c54bcSmrg setup with a 144 Hz monitor and a 60 Hz monitor will always be 241e49c54bcSmrg throttled to at most 60 fps. It also means non-constant present 242e49c54bcSmrg rate if refresh cycles drift against each other, creating complex 243e49c54bcSmrg "beat patterns", tremors, stutters and periodic slowdowns - quite 244e49c54bcSmrg irritating! 245e49c54bcSmrg 246e49c54bcSmrg Such a scenario will be especially annoying if one uses multiple 247e49c54bcSmrg outputs in "mirror mode" aka "clone mode". One output will usually 248e49c54bcSmrg be the "production output" with the highest quality and fastest 249e49c54bcSmrg display attached, whereas a secondary mirror output just has a 250e49c54bcSmrg cheaper display for monitoring attached. Users care about perfect 251e49c54bcSmrg and perfectly timed tear-free presentation on the "production output", 252e49c54bcSmrg but cares less about quality on the secondary "mirror output". They 253e49c54bcSmrg are willing to trade quality on secondary outputs away in exchange 254e49c54bcSmrg for better presentation timing on the "production output". 255e49c54bcSmrg 256e49c54bcSmrg One example use case for such production + monitoring displays are 257e49c54bcSmrg neuroscience / medical science applications where one high quality 258e49c54bcSmrg display device is used to present visual animations to test subjects 259e49c54bcSmrg or patients in a fMRI scanner room (production display), whereas 260e49c54bcSmrg an operator monitors the same visual animations from a control room 261e49c54bcSmrg on a lower quality display. Presentation timing needs to be perfect, 262e49c54bcSmrg and animations high-speed and tear-free for the production display, 263e49c54bcSmrg whereas quality and timing don't matter for the monitoring display. 264e49c54bcSmrg 265e49c54bcSmrg This commit gives users the option to choose such a trade-off as 266e49c54bcSmrg opt-in: 267e49c54bcSmrg 268e49c54bcSmrg It adds a new boolean option "AsyncFlipSecondaries" to the device section 269e49c54bcSmrg of xorg.conf. If this option is specified as true, then DRI3 pageflip 270e49c54bcSmrg behaviour changes as follows: 271e49c54bcSmrg 272e49c54bcSmrg 1. The "reference crtc" for a windows PresentPixmap operation does a 273e49c54bcSmrg vblank synced flip, or a DRM_MODE_PAGE_FLIP_ASYNC non-synchronized 274e49c54bcSmrg flip, as requested by the caller, just as in the past. Typically 275e49c54bcSmrg flips will be requested to be vblank synchronized for tear-free 276e49c54bcSmrg presentation. The "reference crtc" is the one chosen by the caller 277e49c54bcSmrg to drive presentation timing (as specified by PresentPixmap()'s 278e49c54bcSmrg "target_msc", "divisor", "remainder" parameters and implemented by 279e49c54bcSmrg vblank events) and to deliver Present completion timestamps (msc 280e49c54bcSmrg and ust) extracted from its pageflip completion event. 281e49c54bcSmrg 282e49c54bcSmrg 2. All other crtc's, which also page-flip in a multi-display configuration, 283e49c54bcSmrg will try to flip with DRM_MODE_PAGE_FLIP_ASYNC, ie. immediately and 284e49c54bcSmrg not synchronized to vblank. This allows the PresentPixmap operation 285e49c54bcSmrg to complete with little delay compared to a single-display present, 286e49c54bcSmrg especially if the different crtc's run at different video refresh 287e49c54bcSmrg rates or their refresh cycles are not perfectly synchronized, but 288e49c54bcSmrg drift against each other. The downside is potential tearing artifacts 289e49c54bcSmrg on all outputs apart from the one of the "reference crtc". 290e49c54bcSmrg 291e49c54bcSmrg Successfully tested on a AMD gpu with single-display and dual-display 292e49c54bcSmrg setups, and with single-X-Screen as well as dual-X-Screen "ZaphodHeads" 293e49c54bcSmrg configurations. 294e49c54bcSmrg 295e49c54bcSmrg Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> 296e49c54bcSmrg 297e49c54bcSmrgcommit 69365526d0a477e0d7842571a72266631c77742d 298e49c54bcSmrgAuthor: Dor Askayo <dor.askayo@gmail.com> 299e49c54bcSmrgDate: Sat Aug 21 19:11:05 2021 +0300 300e49c54bcSmrg 301e49c54bcSmrg glamor: Set AMDGPU_CREATE_PIXMAP_SCANOUT on DRI2 and shared pixmaps 302e49c54bcSmrg 303e49c54bcSmrg The scanout usage flag wasn't applied for DRI2 and shared pixmaps 304e49c54bcSmrg in 0732f81a2c67, resulting in GPU artifacts in some scenarios. 305e49c54bcSmrg 306e49c54bcSmrg Fixes: 0732f81a2c67 ("glamor: Make pixmap scanout compatible if its 307e49c54bcSmrg dimensions are") 308e49c54bcSmrg Closes: https://gitlab.freedesktop.org/xorg/driver/xf86-video-amdgpu/-/issues/41 309e49c54bcSmrg Signed-off-by: Dor Askayo <dor.askayo@gmail.com> 310e49c54bcSmrg Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> 311e49c54bcSmrg Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> 312e49c54bcSmrg 31346845023Smrgcommit 0d68a91dce88eeacd15bf1159ddc6200a01b1f2e 31446845023SmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 31546845023SmrgDate: Thu Jul 29 13:20:16 2021 -0400 31646845023Smrg 31746845023Smrg Bump version for the 21.0.0 release 31846845023Smrg 31946845023Smrg Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> 32046845023Smrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 32146845023Smrg 32246845023Smrgcommit aedbf47ffc9459c3654b66d8abf6d4f8515c4815 32346845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 32446845023SmrgDate: Mon Apr 26 15:00:54 2021 +0200 32546845023Smrg 32646845023Smrg Include xf86drm.h instead of sarea.h 32746845023Smrg 32846845023Smrg Fixes build against current xorg-x11-server-devel from Fedora 32946845023Smrg 34/35/rawhide. 33046845023Smrg 33146845023Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 33246845023Smrg 33346845023Smrgcommit 6ed48634443e15a45f48e3a4ddf91e46041ad38f 33446845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 33546845023SmrgDate: Tue Feb 2 12:45:54 2021 +0100 33646845023Smrg 33746845023Smrg Drop dri.h includes 33846845023Smrg 33946845023Smrg Not needed anymore. 34046845023Smrg 34146845023Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 34246845023Smrg 34346845023Smrgcommit 6234a1b2652f469071c0c9b0d8b0f4a8079efe74 34446845023SmrgAuthor: Likun Gao <Likun.Gao@amd.com> 34546845023SmrgDate: Fri Oct 30 12:23:20 2020 +0800 34646845023Smrg 34746845023Smrg Fix drmmode_crtc_scanout_create logic 34846845023Smrg 34946845023Smrg If crtc scanout create successfully, the function of 35046845023Smrg drmmode_crtc_scanout_create should return TURE. 35146845023Smrg This will fix the regression caused by commit: "Make 35246845023Smrg drmmode_crtc_scanout_create/destroy static" (442efe73), as it will 35346845023Smrg result to some function (such as drmmode_set_scanout_pixmap) go to wrong 35446845023Smrg code path and result to NULL pointer. 35546845023Smrg Fixes: 442efe73 ("Make drmmode_crtc_scanout_create/destroy static") 35646845023Smrg 35746845023Smrg Signed-off-by: Likun Gao <Likun.Gao@amd.com> 35846845023Smrg Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> 35946845023Smrg 36046845023Smrgcommit 6bd3dc6bd8af238868154f24a37ff13cc9aa2705 36146845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 36246845023SmrgDate: Fri Aug 28 10:50:50 2020 +0200 36346845023Smrg 36446845023Smrg Check for AMDGPU_CREATE_PIXMAP_SCANOUT in amdgpu_glamor_create_pixmap 36546845023Smrg 36646845023Smrg We must not call glamor_create_pixmap or fbCreatePixmap when it's set. 36746845023Smrg 36846845023Smrg Closes: https://gitlab.freedesktop.org/xorg/driver/xf86-video-amdgpu/-/issues/21 36946845023Smrg 37046845023Smrgcommit 2202cdfb0ac79591b6d3a51634e3b9f507970d55 37146845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 37246845023SmrgDate: Fri Jul 10 11:24:02 2020 +0200 37346845023Smrg 37446845023Smrg Replace a few more instances of "master" 37546845023Smrg 37646845023Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 37746845023Smrg 37846845023Smrgcommit 0d1d479ecca424120ae1b0f16f9009aec64e5164 37946845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 38046845023SmrgDate: Fri Jul 10 11:13:21 2020 +0200 38146845023Smrg 38246845023Smrg Fix build against ABI_VIDEODRV_VERSION 25.2 38346845023Smrg 38446845023Smrg Use primary/secondary instead of master/slave where applicable. 38546845023Smrg 38646845023Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 38746845023Smrg 38846845023Smrgcommit 442efe73dd579dc36445a3b232937abbed9d2fbb 38946845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 39046845023SmrgDate: Wed Apr 22 16:47:33 2020 +0200 39146845023Smrg 39246845023Smrg Make drmmode_crtc_scanout_create/destroy static 39346845023Smrg 39446845023Smrg And the latter inline. 39546845023Smrg 39646845023Smrgcommit 99f3c82e940e35642757ccd6dc5267004e1122f6 39746845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 39846845023SmrgDate: Tue Apr 21 19:02:41 2020 +0200 39946845023Smrg 40046845023Smrg Drop struct drmmode_scanout altogether in favour of PixmapPtrs 40146845023Smrg 40246845023Smrgcommit cfce4b3e6b05b1be14b7ce716dbfb9a15e7e21f4 40346845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 40446845023SmrgDate: Tue Apr 21 18:48:06 2020 +0200 40546845023Smrg 40646845023Smrg Drop bo/width/height members from struct drmmode_scanout 40746845023Smrg 40846845023Smrg The pixmap is all we really need. 40946845023Smrg 41046845023Smrgcommit 680b9a2976f9eb8010c8160c425c2194fb5429d1 41146845023SmrgAuthor: Niclas Zeising <zeising@daemonic.se> 41246845023SmrgDate: Wed Apr 15 10:34:32 2020 +0200 41346845023Smrg 41446845023Smrg Fix return value check of drmIoctl() 41546845023Smrg 41646845023Smrg When the drmModeSetCursor2() call was replaced with bare drmIoctl() call in 41746845023Smrg b344e155, a bug was introduced. With the use of drmModeSetCursor2(), 41846845023Smrg the return value from drmIoctl() (which calls ioctl()) were mangled, if 41946845023Smrg they were negative, they were replaced by -errno by a wrapper function 42046845023Smrg in xf86drMode.c in libdrm. After replacing drmModeSetCursor2() with the 42146845023Smrg call to drmIoctl(), this mangling no longer happens, and we need to 42246845023Smrg explicitly check if the call to drmIoctl() fails, which is indicated by 42346845023Smrg returning -1, and then why it failed, by checking errno. 42446845023Smrg If the error indicated by errno is EINVAL, then we can't use the 42546845023Smrg DRM_IOCTL_MODE_CURSOR2 ioctl(), and need to fall back to the 42646845023Smrg DRM_IOCTL_MODE_CURSOR ioctl(). 42746845023Smrg 42846845023Smrg This bug can manifest itself by an invisible hw cursor on systems where the 42946845023Smrg DRM_IOCTL_MODE_CURSOR2 is not implemented by the graphics driver. 43046845023Smrg 43146845023Smrg Signed-off-by: Niclas Zeising <zeising@daemonic.se> 43246845023Smrg 43346845023Smrgcommit e923642bae6077f71a8f251fe885342757737224 43446845023SmrgAuthor: Peter Hutterer <peter.hutterer@who-t.net> 43546845023SmrgDate: Fri May 8 11:14:32 2020 +1000 43646845023Smrg 43746845023Smrg gitlab CI: update to use the latest CI templates 43846845023Smrg 43946845023Smrg Repository was moved there from wayland/ci-templates, and let's update to the 44046845023Smrg most recent version.. 44146845023Smrg 44246845023Smrg No real functional changes, we're just making use of the various CI template 44346845023Smrg bits and bobs now, specifically the FDO_* variables and the 44446845023Smrg .fdo.container-build and .fdo.distribution-image templates. 44546845023Smrg 44646845023Smrg Signed-off-by: Peter Hutterer <peter.hutterer@who-t.net> 44746845023Smrg 44846845023Smrgcommit 0732f81a2c67354ddfa7a495bee6b0997c6ef244 44946845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 45046845023SmrgDate: Tue Apr 21 10:54:47 2020 +0200 45146845023Smrg 45246845023Smrg glamor: Make pixmap scanout compatible if its dimensions are 45346845023Smrg 45446845023Smrg Namely, if its dimensions match those of the screen pixmap (enough that 45546845023Smrg it could stand in for it). When that's the case, the pixmap may end up 45646845023Smrg being scanned out directly due to page flipping via the Present 45746845023Smrg extension, e.g. with xfwm4 --vblank=xpresent . 45846845023Smrg 45946845023Smrg v2: 46046845023Smrg * Use AMDGPU_CREATE_PIXMAP_SCANOUT instead of second-guessing in 46146845023Smrg amdgpu_alloc_pixmap_bo, fixes corruption when resizing from smaller 46246845023Smrg to larger virtual size via RandR. 46346845023Smrg 46446845023Smrg Closes: https://gitlab.freedesktop.org/xorg/driver/xf86-video-amdgpu/-/issues/10 46546845023Smrg 46646845023Smrgcommit cb27a5b1120266e4baaa3eb784ff041977ded43f 46746845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 46846845023SmrgDate: Fri Nov 29 16:37:32 2019 +0100 46946845023Smrg 47046845023Smrg Handle NULL fb_ptr in pixmap_get_fb 47146845023Smrg 47246845023Smrg This can happen when HW acceleration is disabled. 47346845023Smrg 47446845023Smrg Fixes https://gitlab.freedesktop.org/xorg/driver/xf86-video-ati/issues/188 47546845023Smrg (ported from radeon commit 4d84cf438e7f1bebf0053035ef0292e9fed257d1) 47646845023Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 47746845023Smrg 47846845023Smrgcommit e2cd67abb4aa8b5c942b46dd66dac091b9fad7ad 47946845023SmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 48046845023SmrgDate: Mon Mar 16 17:43:54 2020 +0100 48146845023Smrg 48246845023Smrg Bail from amdgpu_pixmap_get_handle with ShadowFB 48346845023Smrg 48446845023Smrg There's no pixmap private in that case. The callers handle this 48546845023Smrg gracefully. 48646845023Smrg 48746845023Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 48846845023Smrg 48946845023Smrgcommit 42a3148ae14c6fd0d2e2e9013971188ca721d8f8 49046845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 49146845023SmrgDate: Sat Dec 10 18:53:37 2016 +0000 49246845023Smrg 49346845023Smrg Factor out common code to amdgpu_probe() 49446845023Smrg 49546845023Smrg Keep the distinct pci/platform screen management in the separate probe 49646845023Smrg entry point and fold the rest into a single function. 49746845023Smrg 49846845023Smrg v2: Rebase 49946845023Smrg 50046845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 50146845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 50246845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 50346845023Smrg 50446845023Smrgcommit eeaaf370854b63966f0b5adbd00d2e6809b773c1 50546845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 50646845023SmrgDate: Sat Mar 31 15:00:16 2018 +0100 50746845023Smrg 50846845023Smrg Introduce amdgpu_device_setup helper 50946845023Smrg 51046845023Smrg It folds the device specifics (open fd, device init) into a single 51146845023Smrg place. 51246845023Smrg 51346845023Smrg v2: 51446845023Smrg - Rebase 51546845023Smrg - Pass pAMDGPUEnt to amdgpu_device_setup (Michel) 51646845023Smrg 51746845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 51846845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 51946845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 52046845023Smrg 52146845023Smrgcommit 1c9742e304f4d198628cdc9487049cde472c7285 52246845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 52346845023SmrgDate: Sat Mar 31 14:27:52 2018 +0100 52446845023Smrg 52546845023Smrg Kill off drmOpen/Close/drmSetInterfaceVersion in favour of drmDevices 52646845023Smrg 52746845023Smrg The former has very subtle semantics (see the implementation in libdrm 52846845023Smrg for details) which were required in the UMS days. 52946845023Smrg 53046845023Smrg With drmDevices around, we have enough information to build our 53146845023Smrg heuristics and avoid drmOpen all together. 53246845023Smrg 53346845023Smrg In the odd case drmGetDevices2() can take a few extra cycles, so use a 53446845023Smrg reasonably sized local array. 53546845023Smrg 53646845023Smrg v2: 53746845023Smrg - Rebase 53846845023Smrg - Rework now that amdgpu_kernel_mode_enabled() is staying 53946845023Smrg - Keep amdgpu_bus_id() 54046845023Smrg - Use local drmDevice array. 54146845023Smrg 54246845023Smrg v3: 54346845023Smrg - Correct error handling (Michel) 54446845023Smrg - Preserve the "am I master" check (Michel) 54546845023Smrg - Always initialise the fd variable 54646845023Smrg 54746845023Smrg v4: 54846845023Smrg - Don't print "-1" on drmGetDevices2 failure (Michel) 54946845023Smrg - Use uppercase DRM (Michel) 55046845023Smrg 55146845023Smrg v5: 55246845023Smrg - Rebase on top of amdgpu_bus_id() rework 55346845023Smrg - Pass both pci and platform dev to amdgpu_kernel_open_fd() (Michel) 55446845023Smrg - Indent local_drmIsMaster() with tabs (Michel) 55546845023Smrg 55646845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 55746845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 55846845023Smrg 55946845023Smrgcommit 2dd730784e632056c75a0fd62b33206b5fc01602 56046845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 56146845023SmrgDate: Tue Jul 16 22:04:57 2019 +0100 56246845023Smrg 56346845023Smrg Use the device_id straight from gpu_info 56446845023Smrg 56546845023Smrg This way we can remove the PciInfo and Chipset from the AMDGPUInfoRec. 56646845023Smrg 56746845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 56846845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 56946845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 57046845023Smrg 57146845023Smrgcommit 655b3c55b9a6233091d4dc5d2e80a0373aa3e2d6 57246845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 57346845023SmrgDate: Wed Jul 17 00:04:39 2019 +0100 57446845023Smrg 57546845023Smrg Reuse the existing busid string 57646845023Smrg 57746845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 57846845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 57946845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 58046845023Smrg 58146845023Smrgcommit b357a8474074d911d1c03572d4d9db3ee420633a 58246845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 58346845023SmrgDate: Wed Jul 17 00:01:51 2019 +0100 58446845023Smrg 58546845023Smrg Store the busid string in AMDGPUEnt 58646845023Smrg 58746845023Smrg This way we can reuse it, instead of redoing it later on. 58846845023Smrg 58946845023Smrg v2: Pass the AMDGPUEnt as argument. 59046845023Smrg v3: free() the string at AMDGPUFreeRec (Michel) 59146845023Smrg v4: Inline amdgpu_bus_id, move at top of mdgpu_kernel_open_fd (Michel) 59246845023Smrg 59346845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 59446845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v3) 59546845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 59646845023Smrg 59746845023Smrgcommit 2c0c154a838060eb683599faf9cbfa3e66dd42c8 59846845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 59946845023SmrgDate: Tue Jul 16 23:39:30 2019 +0100 60046845023Smrg 60146845023Smrg Remove NULL check after a "cannot fail" function 60246845023Smrg 60346845023Smrg XNFasprintf cannot fail - aka busid cannot be NULL. 60446845023Smrg 60546845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 60646845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 60746845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 60846845023Smrg 60946845023Smrgcommit 16ae0d06c6711a36c814618e06bf2be53079af81 61046845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 61146845023SmrgDate: Tue Jul 16 23:37:05 2019 +0100 61246845023Smrg 61346845023Smrg Fixup the amdgpu_bus_id() string format 61446845023Smrg 61546845023Smrg The func is a u, instead of a signed int. 61646845023Smrg 61746845023Smrg v2: Drop the precision - s/1u/u/ (Michel) 61846845023Smrg 61946845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 62046845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 62146845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 62246845023Smrg 62346845023Smrgcommit abbe23fae70b7f3bc7033d7603d331570677d431 62446845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 62546845023SmrgDate: Sat Dec 10 14:30:16 2016 +0000 62646845023Smrg 62746845023Smrg Remove drmCheckModesettingSupported and kernel module loading, on Linux 62846845023Smrg 62946845023Smrg The former of these is a UMS artefact which gives incorrect and 63046845023Smrg misleading promise whether KMS is supported. Not to mention that 63146845023Smrg AMDGPU is a only KMS driver. 63246845023Smrg 63346845023Smrg In a similar fashion xf86LoadKernelModule() is a relic of the times, 63446845023Smrg where platforms had no scheme of detecting and loading the appropriate 63546845023Smrg kernel module. 63646845023Smrg 63746845023Smrg Notes: 63846845023Smrg - Since there is no reply from Robert the code is still around, behind 63946845023Smrg a FreeBSD guard. 64046845023Smrg - If FreeBSD still needs this they should look and fix it ASAP, as: 64146845023Smrg - wayland itself or compositors do _not_ load kernel modules 64246845023Smrg - the kernel module should be loaded early to control the clocks/fan, 64346845023Smrg hence temperature of the card 64446845023Smrg 64546845023Smrg v2: Keep the code as FreeBSD only, add 'Notes' in the commit message. 64646845023Smrg 64746845023Smrg Cc: Robert Millan <rmh@freebsd.org> 64846845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 64946845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 65046845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 65146845023Smrg 65246845023Smrgcommit 0b3bc7addf9b5989bfad7c2c31979a15f5ba701d 65346845023SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 65446845023SmrgDate: Sat Dec 10 14:28:19 2016 +0000 65546845023Smrg 65646845023Smrg Use ODEV_ATTRIB_PATH where possible for the device node. 65746845023Smrg 65846845023Smrg Use the device node path, if the server knows it. 65946845023Smrg 66046845023Smrg Note: 66146845023Smrg ODEV_ATTRIB_PATH was introduced with xserver 1.13 - the minimum version 66246845023Smrg required to build amdgpu. Yet it's defined in xf86platformBus.h. With 66346845023Smrg the header included only when XSERVER_PLATFORM_BUS is set. 66446845023Smrg 66546845023Smrg Keep things obvious and use a ODEV_ATTRIB_PATH guard. 66646845023Smrg 66746845023Smrg v2: Rebase, add commit message 66846845023Smrg 66946845023Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 67046845023Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 67146845023Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 67246845023Smrg 67346845023Smrgcommit edcbe5f52ddfceee3d66d69bbcebbceac06b6d0d 67446845023SmrgAuthor: Adam Jackson <ajax@redhat.com> 67546845023SmrgDate: Tue Feb 4 16:38:06 2020 -0500 67646845023Smrg 67746845023Smrg Fix link failure with gcc 10 67846845023Smrg 67946845023Smrg Without the 'extern' this looks like a definition not just a 68046845023Smrg declaration, in every file that includes the header. gcc 10 is stricter 68146845023Smrg about this kind of multiple definition. 68246845023Smrg 68346845023Smrgcommit fd66f5c0bea2b7c22a47bfd5eb1f22d32d166d9c 68446845023SmrgAuthor: Adam Jackson <ajax@redhat.com> 68546845023SmrgDate: Wed Oct 30 12:33:09 2019 -0400 68646845023Smrg 68746845023Smrg kms: Handle changes to SourceValidate call chain in xserver 19 68846845023Smrg 68946845023Smrg xserver 19 expects the SourceValidate hook to always be filled in with 69046845023Smrg something valid. For earlier servers it's harmless to simply fill this 69146845023Smrg in with a do-nothing function instead of NULL. 69246845023Smrg 69346845023Smrg Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> 69446845023Smrg 69577d6d1ecSmrgcommit b467d2569a003da05ad222b0dc095bee5eec450a 69677d6d1ecSmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 69777d6d1ecSmrgDate: Fri Oct 11 17:10:10 2019 +0200 69877d6d1ecSmrg 69977d6d1ecSmrg Bump version for the 19.1.0 release 70077d6d1ecSmrg 70177d6d1ecSmrgcommit a1b7263277c033e109629829c370c0e95978e061 70277d6d1ecSmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 70377d6d1ecSmrgDate: Thu Sep 26 15:56:59 2019 +0200 70477d6d1ecSmrg 70577d6d1ecSmrg Don't unreference FBs of pixmaps from different screens in LeaveVT 70677d6d1ecSmrg 70777d6d1ecSmrg FindClientResourcesByType finds pixmaps from all screens, but trying to 70877d6d1ecSmrg process ones from other screens here makes no sense and likely results 70977d6d1ecSmrg in a crash or memory corruption. 71077d6d1ecSmrg 71177d6d1ecSmrg Fixes: c16ff42f927d ("Make all active CRTCs scan out an all-black 71277d6d1ecSmrg framebuffer in LeaveVT") 71377d6d1ecSmrg (Ported from radeon commit 2faaecc69b127248718e759c6c98c84d56dd1b6b) 71477d6d1ecSmrg 71577d6d1ecSmrgcommit 5b8bc9fc505c551dcd9b0ed5ab835a49fa4f9fda 71677d6d1ecSmrgAuthor: Michel Dänzer <mdaenzer@redhat.com> 71777d6d1ecSmrgDate: Wed Sep 18 12:55:45 2019 +0200 71877d6d1ecSmrg 71977d6d1ecSmrg Don't set up black scanout buffer if LeaveVT is called from CloseScreen 72077d6d1ecSmrg 72177d6d1ecSmrg Avoids a crash described in 72277d6d1ecSmrg https://gitlab.freedesktop.org/xorg/driver/xf86-video-amdgpu/merge_requests/43#note_223718 72377d6d1ecSmrg 72477d6d1ecSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 72577d6d1ecSmrg 72677d6d1ecSmrgcommit e6fce59a071220967fcd4e2c9e4a262c72870761 72777d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 72877d6d1ecSmrgDate: Wed Jul 24 16:05:05 2019 +0200 72977d6d1ecSmrg 73077d6d1ecSmrg present: Don't check pixmap pitch in check_flip with non-DC >= 3.34 73177d6d1ecSmrg 73277d6d1ecSmrg The current non-DC kernel driver also handles flipping between different 73377d6d1ecSmrg pitches correctly. 73477d6d1ecSmrg 73577d6d1ecSmrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 73677d6d1ecSmrg 73777d6d1ecSmrgcommit 5bb2580b266468f87843b5585ae64e056b63bb88 73877d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 73977d6d1ecSmrgDate: Wed Jul 24 15:55:19 2019 +0200 74077d6d1ecSmrg 74177d6d1ecSmrg present: Don't check pixmap pitch in check_flip with current DC 74277d6d1ecSmrg 74377d6d1ecSmrg Current DC handles flipping between different pitches correctly. 74477d6d1ecSmrg 74577d6d1ecSmrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 74677d6d1ecSmrg 74777d6d1ecSmrgcommit ac66086613cbd0974b421cd5eda872adc15242ed 74877d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 74977d6d1ecSmrgDate: Wed Jul 24 15:45:21 2019 +0200 75077d6d1ecSmrg 75177d6d1ecSmrg present: Also check pixmap pitch in check_flip with current xserver 75277d6d1ecSmrg 75377d6d1ecSmrg The corresponding check in the xserver Present code was removed again, 75477d6d1ecSmrg because flipping between different pitches can work in some cases. 75577d6d1ecSmrg 75677d6d1ecSmrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 75777d6d1ecSmrg 75877d6d1ecSmrgcommit 98f172eb2d2353e19edd8167f22215ce596811f8 75977d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 76077d6d1ecSmrgDate: Mon Jul 29 18:54:24 2019 +0200 76177d6d1ecSmrg 76277d6d1ecSmrg gitlab-ci: Use templates from wayland/ci-templates 76377d6d1ecSmrg 76477d6d1ecSmrg These are already used by xserver, Mesa and some other projects. 76577d6d1ecSmrg 76677d6d1ecSmrg Current Debian testing brings e.g. GCC 8.3.0 and clang 7.0.1. 76777d6d1ecSmrg 76877d6d1ecSmrgcommit 87f41ace4920fd2069794211683659eb25b025a6 76977d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 77077d6d1ecSmrgDate: Fri Jul 5 12:43:53 2019 +0200 77177d6d1ecSmrg 77277d6d1ecSmrg Don't disable page flipping completely with SW cursor 77377d6d1ecSmrg 77477d6d1ecSmrg Even with SW cursor, page flipping can be used while no X cursor is 77577d6d1ecSmrg visible. 77677d6d1ecSmrg 77777d6d1ecSmrg Occurred to me in the context of xorg/xserver#828. 77877d6d1ecSmrg 77977d6d1ecSmrgcommit 7d3fef72e0c871e1677e9e544f4cae5e238b5c52 78077d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 78177d6d1ecSmrgDate: Thu May 9 17:39:49 2019 +0200 78277d6d1ecSmrg 78377d6d1ecSmrg present: Check that we can get a KMS FB for flipping 78477d6d1ecSmrg 78577d6d1ecSmrg This can legitimately fail if the pixmap's storage is shared from 78677d6d1ecSmrg another device, e.g. when using PRIME render offloading. 78777d6d1ecSmrg 78877d6d1ecSmrgcommit ea19a5207054bb159fc7fb6d88e0ceb10c3da010 78977d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 79077d6d1ecSmrgDate: Thu Jun 6 11:02:15 2019 +0200 79177d6d1ecSmrg 79277d6d1ecSmrg Remove dri2_drawable_crtc parameter consider_disabled 79377d6d1ecSmrg 79477d6d1ecSmrg All callers were passing TRUE. 79577d6d1ecSmrg 79677d6d1ecSmrg Reviewed-and-tested-by: Flora Cui <flora.cui@amd.com> 79777d6d1ecSmrg 79877d6d1ecSmrgcommit 3109f088fdbd89c2ee8078625d4f073852492656 79977d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 80077d6d1ecSmrgDate: Thu Jun 6 11:22:09 2019 +0200 80177d6d1ecSmrg 80277d6d1ecSmrg dri2: Re-use previous CRTC when possible if pick_best_crtc returns NULL 80377d6d1ecSmrg 80477d6d1ecSmrg This way, the MSC will continue ticking at the rate of (the last mode 80577d6d1ecSmrg which was enabled for) that CRTC, instead of the client running 80677d6d1ecSmrg unthrottled. 80777d6d1ecSmrg 80877d6d1ecSmrg Reviewed-and-tested-by: Flora Cui <flora.cui@amd.com> 80977d6d1ecSmrg 81077d6d1ecSmrgcommit fb06fb814700a47464abd756e1111dcc76d0d776 81177d6d1ecSmrgAuthor: Flora Cui <flora.cui@amd.com> 81277d6d1ecSmrgDate: Wed May 29 14:18:50 2019 +0800 81377d6d1ecSmrg 81477d6d1ecSmrg dri2: reply to client for WaitMSC request in any case 81577d6d1ecSmrg 81677d6d1ecSmrg otherwise client would wait for reply forever and desktop appears hang. 81777d6d1ecSmrg 81877d6d1ecSmrg Signed-off-by: Flora Cui <flora.cui@amd.com> 81977d6d1ecSmrg Acked-by: Feifei Xu <Feifei.Xu@amd.com> 82077d6d1ecSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 82177d6d1ecSmrg 82277d6d1ecSmrgcommit 4b17533fcb30842caf0035ba593b7d986520cc85 82377d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 82477d6d1ecSmrgDate: Tue Apr 30 17:50:15 2019 +0200 82577d6d1ecSmrg 82677d6d1ecSmrg dri3: Always flush glamor before sharing pixmap storage with clients 82777d6d1ecSmrg 82877d6d1ecSmrg Even if glamor_gbm_bo_from_pixmap / glamor_fd_from_pixmap themselves 82977d6d1ecSmrg don't trigger any drawing, there could already be unflushed drawing to 83077d6d1ecSmrg the pixmap whose storage we share with a client. 83177d6d1ecSmrg 83277d6d1ecSmrgcommit bf61e6d7ac1a5754b1026d7f80acf25ef622c491 83377d6d1ecSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 83477d6d1ecSmrgDate: Thu Apr 18 19:21:40 2019 +0200 83577d6d1ecSmrg 83677d6d1ecSmrg Retry get_fb_ptr in get_fb 83777d6d1ecSmrg 83877d6d1ecSmrg If get_fb_ptr returns NULL, try again after pixmap_get_handle, it should 83977d6d1ecSmrg work then. 84077d6d1ecSmrg 84177d6d1ecSmrg Fixes spurious Present page flipping failures using "normal" pixmaps 84277d6d1ecSmrg which aren't shared with direct rendering clients, e.g. with a 84377d6d1ecSmrg compositor using the RENDER extension. 84477d6d1ecSmrg 84577d6d1ecSmrg Bugzilla: https://bugs.freedesktop.org/110417 84677d6d1ecSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 84777d6d1ecSmrg 848852bcc3bSmrgcommit bd4ffd4ebbdf1c43ab9e1ef9ba8b812fd2dde4a4 849852bcc3bSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 850852bcc3bSmrgDate: Tue Mar 19 18:44:31 2019 +0100 851852bcc3bSmrg 852852bcc3bSmrg Bump version for the 19.0.1 release 853852bcc3bSmrg 854852bcc3bSmrgcommit 6ee857726166f495abcd68e4ff60e3a09593d079 855852bcc3bSmrgAuthor: Dave Airlie <airlied@redhat.com> 856852bcc3bSmrgDate: Mon Mar 23 11:33:23 2015 +1000 857852bcc3bSmrg 858852bcc3bSmrg modesetting: add tile property support 859852bcc3bSmrg 860852bcc3bSmrg This adds tiling support to the driver, it retrieves the tile info from 861852bcc3bSmrg the kernel and translates it into the server format and exposes the 862852bcc3bSmrg property. 863852bcc3bSmrg 864852bcc3bSmrg (Ported from xserver commits 8fb8bbb3062f1a06621ab7030a9e89d5e8367b35 865852bcc3bSmrg and 6abdb54a11dac4e8854ff94ecdcb90a14321ab31) 866852bcc3bSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 867852bcc3bSmrg 86890f2b693Smrgcommit 9534bf3bb33d14cd3a5af08e36ef42b309647fc7 86990f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 87090f2b693SmrgDate: Wed Mar 6 12:05:14 2019 +0100 87190f2b693Smrg 87290f2b693Smrg Bump version for the 19.0.0 release 87390f2b693Smrg 87490f2b693Smrgcommit a2b32e72fdaff3007a79b84929997d8176c2d512 87590f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 87690f2b693SmrgDate: Fri Mar 1 17:42:08 2019 +0100 87790f2b693Smrg 87890f2b693Smrg present: Don't check tiling parameters with DC & DRM minor version >= 31 87990f2b693Smrg 88090f2b693Smrg Current DC handles any changes of tiling parameters for flips. 88190f2b693Smrg 88290f2b693Smrg v2: 88390f2b693Smrg * Just check all tiling bits if DRM minor < 31 or DC is disabled. 88490f2b693Smrg 88590f2b693Smrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 88690f2b693Smrg 88790f2b693Smrgcommit 2798244be78df3ef3a7841597577506bfbe50156 88890f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 88990f2b693SmrgDate: Fri Mar 1 17:47:24 2019 +0100 89090f2b693Smrg 89190f2b693Smrg Make drmmode_cm_enabled an inline function 89290f2b693Smrg 89390f2b693Smrg So that it can be used outside of drmmode_display.c as well. 89490f2b693Smrg 89590f2b693Smrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 89690f2b693Smrg 89790f2b693Smrgcommit 72653455e4f652ca6c7c290c7f1e8a889b77f5ce 89890f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 89990f2b693SmrgDate: Fri Mar 1 17:35:48 2019 +0100 90090f2b693Smrg 90190f2b693Smrg Revert "Remove set but unused amdgpu_dri2::pKernelDRMVersion" 90290f2b693Smrg 90390f2b693Smrg This reverts commit 720a61000aeb139005bd8125908cec66a6e69554. 90490f2b693Smrg 90590f2b693Smrg We're going to make use of it now. 90690f2b693Smrg 90790f2b693Smrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 90890f2b693Smrg 90990f2b693Smrgcommit 28cd209ebf20561e65d14fa2e8bbfaedf6965948 91090f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 91190f2b693SmrgDate: Wed Feb 27 17:35:26 2019 +0100 91290f2b693Smrg 91390f2b693Smrg Revert "gitlab-ci: Only run docker-image stage if relevant source files change" 91490f2b693Smrg 91590f2b693Smrg This reverts commit 9c23076b9e81c36ac2408c491f9b2d546829ee8e. 91690f2b693Smrg 91790f2b693Smrg Some scenarios have come to light where this failed to ensure the docker 91890f2b693Smrg image exists: 91990f2b693Smrg 92090f2b693Smrg * If the master branch of a forked repository is used for an MR which 92190f2b693Smrg doesn't modify .gitlab-ci.yml, the docker-image job may not run. 92290f2b693Smrg * If the docker-image job of the first pipeline in a forked repository 92390f2b693Smrg is cancelled or fails for any reason, and .gitlab-ci.yml isn't 92490f2b693Smrg modified for the next pipeline run. 92590f2b693Smrg 92690f2b693Smrgcommit 09be74a3d1dd9604336d9a27f98d132b262dcbaf 92790f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 92890f2b693SmrgDate: Thu Feb 28 17:31:55 2019 +0100 92990f2b693Smrg 93090f2b693Smrg dri2: Call drm_queue_handle_deferred in dri2_deferred_event 93190f2b693Smrg 93290f2b693Smrg drm_queue_handler just puts the event on the signalled list; without 93390f2b693Smrg calling drm_queue_handle_deferred, actual processing of the event may be 93490f2b693Smrg delayed indefinitely, e.g. until another event arrives from the kernel. 93590f2b693Smrg 93690f2b693Smrg This could result in DRI2 clients hanging during DPMS off. 93790f2b693Smrg 93890f2b693Smrg Fixes: 739181c8d3334 "Add amdgpu_drm_handle_event wrapper for 93990f2b693Smrg drmHandleEvent" 94090f2b693Smrg Reviewed-by: Aaron Liu <aaron.liu@amd.com> 94190f2b693Smrg Tested-by: Aaron Liu <aaron.liu@amd.com> 94290f2b693Smrg 94390f2b693Smrgcommit a636f42b496b0604ca00a144690ece61d1a88a27 94490f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 94590f2b693SmrgDate: Wed Feb 27 18:43:27 2019 +0100 94690f2b693Smrg 94790f2b693Smrg present: Check that flip and screen pixmap pitches match 94890f2b693Smrg 94990f2b693Smrg If they don't, flipping will result in corrupted display. 95090f2b693Smrg 95190f2b693Smrg Test case: 95290f2b693Smrg 95390f2b693Smrg * Run Xorg at 1920x1080 with no window manager 95490f2b693Smrg * glxgears -geometry 2048x1080 95590f2b693Smrg 95690f2b693Smrg The Present extension code in xserver 1.21 will check for this. 95790f2b693Smrg 95890f2b693Smrg Tested-by: Jax Lin <jax.lin@amd.com> 95990f2b693Smrg 96090f2b693Smrgcommit bd090f389f19f1f4a3f662ffdd891345a3899539 96190f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 96290f2b693SmrgDate: Tue Feb 12 17:57:17 2019 +0100 96390f2b693Smrg 96490f2b693Smrg Call amdgpu_present_set_screen_vrr from amdgpu_vrr_property_update 96590f2b693Smrg 96690f2b693Smrg If the window is currently flipping. 96790f2b693Smrg 96890f2b693Smrg This might make a difference when the property gets disabled: Variable 96990f2b693Smrg refresh will now be disabled immediately in that case, instead of only 97090f2b693Smrg when the window can no longer use page flipping at all. 97190f2b693Smrg 97290f2b693Smrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 97390f2b693Smrg 97490f2b693Smrgcommit d9be5d712d469595e1e610f7294bc670ca3b1985 97590f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 97690f2b693SmrgDate: Tue Feb 12 12:26:25 2019 +0100 97790f2b693Smrg 97890f2b693Smrg Make use of property request wrappers for VRR property 97990f2b693Smrg 98090f2b693Smrg Instead of scanning for PropertyNotify events. Reasons: 98190f2b693Smrg 98290f2b693Smrg * Works even if no client listens to PropertyNotify events for the 98390f2b693Smrg window. 98490f2b693Smrg * No overhead on delivery of unrelated events, and no overhead at all 98590f2b693Smrg if Option "VariableRefresh" is disabled. 98690f2b693Smrg 98790f2b693Smrg v2: 98890f2b693Smrg * Use shorter variable name amdgpu_vrr_atom. 98990f2b693Smrg * Call MakeAtom regardless of info->instance_id, for robustness vs VRR 99090f2b693Smrg being enabled in some but not all AMDGPU screens. 99190f2b693Smrg 99290f2b693Smrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 99390f2b693Smrg 99490f2b693Smrgcommit ef8fbe33b7d97f7fb5518db9c0e4d2dcbf2fab6f 99590f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 99690f2b693SmrgDate: Thu Jan 17 18:41:11 2019 +0100 99790f2b693Smrg 99890f2b693Smrg Wrap change/delete window property request handlers 99990f2b693Smrg 100090f2b693Smrg Preparation for the following change. 100190f2b693Smrg 100290f2b693Smrg v2: 100390f2b693Smrg * Add comments explaining what the wrappers are wrapping. 100490f2b693Smrg * Use global amdgpu_property_vectors_wrapped to keep track of whether 100590f2b693Smrg the vectors need to be (un)wrapped, for robustness against VRR being 100690f2b693Smrg enabled in some but not all AMDGPU screens. 100790f2b693Smrg 100890f2b693Smrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 100990f2b693Smrg 101090f2b693Smrgcommit 09a45ff8fe3ac07bafa3a0822b1598c41f9ca200 101190f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 101290f2b693SmrgDate: Tue Feb 12 13:01:04 2019 +0100 101390f2b693Smrg 101490f2b693Smrg Don't enable the VRR support code for GPU screens 101590f2b693Smrg 101690f2b693Smrg Windows aren't associated with GPU screens, and amdgpu_present_flip is 101790f2b693Smrg never called for them, so VRR can never actually be enabled for them. 101890f2b693Smrg 101990f2b693Smrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 102090f2b693Smrg 102190f2b693Smrgcommit 2a3d00dc7ed2b4fca698e2d699e1b94da6d0ddb8 102290f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 102390f2b693SmrgDate: Tue Feb 12 18:12:23 2019 +0100 102490f2b693Smrg 102590f2b693Smrg Don't register a window private if VRR is disabled 102690f2b693Smrg 102790f2b693Smrg It's not used in that case. 102890f2b693Smrg 102990f2b693Smrg Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 103090f2b693Smrg 103190f2b693Smrgcommit 5f91be77e059d0c4a4268ec10cbd9aa1052f53eb 103290f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 103390f2b693SmrgDate: Mon Feb 11 18:32:07 2019 +0100 103490f2b693Smrg 103590f2b693Smrg gitlab-ci: Don't rely on $CI_PROJECT_NAME 103690f2b693Smrg 103790f2b693Smrg The name of a forked repository can be changed later, in which case this 103890f2b693Smrg would fail to refer to the main repository. 103990f2b693Smrg 104090f2b693Smrg Pointed out by Eric Engestrom in 104190f2b693Smrg https://gitlab.freedesktop.org/mesa/mesa/merge_requests/224 . 104290f2b693Smrg 104390f2b693Smrgcommit 9c23076b9e81c36ac2408c491f9b2d546829ee8e 104490f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 104590f2b693SmrgDate: Thu Feb 7 17:35:13 2019 +0100 104690f2b693Smrg 104790f2b693Smrg gitlab-ci: Only run docker-image stage if relevant source files change 104890f2b693Smrg 104990f2b693Smrg Otherwise there's normally no need to run it. It will also run when a 105090f2b693Smrg new branch is created, which ensures that the docker image always exists 105190f2b693Smrg (e.g. in a newly forked repository). 105290f2b693Smrg 105390f2b693Smrg Inspired by https://gitlab.freedesktop.org/mesa/mesa/merge_requests/143 105490f2b693Smrg 105590f2b693Smrgcommit 9045fb310f88780e250e60b80431ca153330e61b 105690f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 105790f2b693SmrgDate: Thu Jan 24 18:31:40 2019 +0100 105890f2b693Smrg 105990f2b693Smrg Keep waiting for a pending flip if drm_handle_event returns 0 106090f2b693Smrg 106190f2b693Smrg drm_wait_pending_flip stopped waiting if drm_handle_event returned 0, 106290f2b693Smrg but that might have processed only some unrelated DRM events. As long as 106390f2b693Smrg the flip is pending, we have to keep waiting for its completion event. 106490f2b693Smrg 106590f2b693Smrg Noticed while working on the previous fix. 106690f2b693Smrg 106790f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 106890f2b693Smrg 106990f2b693Smrgcommit 3ff2cc225f6bc08364ee007fa54e9d0150adaf11 107090f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 107190f2b693SmrgDate: Tue Jan 22 18:36:56 2019 +0100 107290f2b693Smrg 107390f2b693Smrg Call drmHandleEvent again if it was interrupted by a signal 107490f2b693Smrg 107590f2b693Smrg drmHandleEvent can be interrupted by a signal in read(), in which case 107690f2b693Smrg it doesn't process any events but returns -1, which 107790f2b693Smrg drm_handle_event propagated to its callers. This could cause the 107890f2b693Smrg following failure cascade: 107990f2b693Smrg 108090f2b693Smrg 1. drm_wait_pending_flip stopped waiting for a pending flip. 108190f2b693Smrg 2. Its caller cleared drmmode_crtc->flip_pending before the flip 108290f2b693Smrg completed. 108390f2b693Smrg 3. Another flip was attempted but got an unexpected EBUSY error because 108490f2b693Smrg the previous flip was still pending. 108590f2b693Smrg 4. TearFree was disabled due to the error. 108690f2b693Smrg 108790f2b693Smrg The solution is to call drmHandleEvent if it was interrupted by a 108890f2b693Smrg signal. We can do that in drm_handle_event, because when that is called, 108990f2b693Smrg either it is known that there are events ready to be processed, or the 109090f2b693Smrg caller has to wait for events to arrive anyway. 109190f2b693Smrg 109290f2b693Smrg v2: 109390f2b693Smrg * Use ErrorF instead of xf86DrvMsg with hard-coded screen 0. 109490f2b693Smrg 109590f2b693Smrg Bugzilla: https://bugs.freedesktop.org/109364 109690f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> # v1 109790f2b693Smrg 109890f2b693Smrgcommit e72a02ba1d35743fefd939458b9d8cddce86e7f5 109990f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 110090f2b693SmrgDate: Wed Jan 16 10:26:59 2019 +0100 110190f2b693Smrg 110290f2b693Smrg Only update drmmode_crtc->flip_pending after actually submitting a flip 110390f2b693Smrg 110490f2b693Smrg And only clear it if it matches the framebuffer of the completed flip 110590f2b693Smrg being processed. 110690f2b693Smrg 110790f2b693Smrg Fixes 110890f2b693Smrg 110990f2b693Smrg (WW) AMDGPU(0): flip queue failed: Device or resource busy 111090f2b693Smrg (WW) AMDGPU(0): Page flip failed: Device or resource busy 111190f2b693Smrg (EE) AMDGPU(0): present flip failed 111290f2b693Smrg 111390f2b693Smrg due to clobbering drmmode_crtc->flip_pending. 111490f2b693Smrg 111590f2b693Smrg Reproducer: Enable TearFree, run warzone2100 fullscreen, toggle 111690f2b693Smrg Vertical sync on/off under Video Options. Discovered while investigating 111790f2b693Smrg https://bugs.freedesktop.org/109364 . 111890f2b693Smrg 111990f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 112090f2b693Smrg 112190f2b693Smrgcommit a1b479c7d0066c481af920f297d6af9009dda11e 112290f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 112390f2b693SmrgDate: Tue Jan 15 17:55:27 2019 +0100 112490f2b693Smrg 112590f2b693Smrg Don't allow TearFree scanout flips to complete in the same vblank period 112690f2b693Smrg 112790f2b693Smrg We were using a relative target of 0, meaning "complete the flip ASAP". 112890f2b693Smrg This could result in the flip sometimes, but not always completing in 112990f2b693Smrg the same vertical blank period where the corresponding drawing occurred, 113090f2b693Smrg potentially causing judder artifacts with applications updating their 113190f2b693Smrg window contents synchronized to the display refresh. A good way to test 113290f2b693Smrg this is the vsynctester.com site in a windowed browser, where the judder 113390f2b693Smrg results in the large "VSYNC" text intermittently appearing red or cyan 113490f2b693Smrg instead of the expected gray. 113590f2b693Smrg 113690f2b693Smrg To avoid this, use a relative target MSC of 1, meaning that if a 113790f2b693Smrg vertical blank period is in progress, the flip will only complete in the 113890f2b693Smrg next one. 113990f2b693Smrg 114090f2b693Smrg Reported by Julian Tempel and Brandon Wright in 114190f2b693Smrg https://bugs.freedesktop.org/106175 . 114290f2b693Smrg 114390f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 114490f2b693Smrg 114590f2b693Smrgcommit bf326f2ea19daa6c8da23d6788ff301ae70b8e69 114690f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 114790f2b693SmrgDate: Thu Jan 10 18:33:04 2019 +0100 114890f2b693Smrg 114990f2b693Smrg glamor: Avoid glamor_create_pixmap for pixmaps backing windows 115090f2b693Smrg 115190f2b693Smrg If the compositing manager uses direct rendering (as is usually the case 115290f2b693Smrg these days), the storage of a pixmap allocated by glamor_create_pixmap 115390f2b693Smrg needs to be reallocated for sharing it with the compositing manager. 115490f2b693Smrg Instead, allocate pixmap storage which can be shared directly. 115590f2b693Smrg 115690f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 115790f2b693Smrg 115890f2b693Smrgcommit ebd32b1c07208f8dbe853e089f5e4b7c6a7a658a 115990f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 116090f2b693SmrgDate: Wed Jan 9 18:57:08 2019 +0100 116190f2b693Smrg 116290f2b693Smrg dri2: Flush in dri2_create_buffer2 after calling glamor_set_pixmap_bo 116390f2b693Smrg 116490f2b693Smrg To make sure the client can't use the shared pixmap storage for direct 116590f2b693Smrg rendering first, which could produce garbage. 116690f2b693Smrg 116790f2b693Smrg Bugzilla: https://bugs.freedesktop.org/109235 116890f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 116990f2b693Smrg 117090f2b693Smrgcommit d168532ee739f7e33a2798051e64ba445dd3859f 117190f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 117290f2b693SmrgDate: Wed Jan 9 17:24:11 2019 +0100 117390f2b693Smrg 117490f2b693Smrg dri3: Flush if necessary in dri3_fd_from_pixmap 117590f2b693Smrg 117690f2b693Smrg To make sure the client can't use the shared pixmap storage for direct 117790f2b693Smrg rendering first, which could produce garbage. 117890f2b693Smrg 117990f2b693Smrg Bugzilla: https://bugs.freedesktop.org/109235 118090f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 118190f2b693Smrg 118290f2b693Smrgcommit 2058c4c469b172d4a3b0443f75466d84281a64c7 118390f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 118490f2b693SmrgDate: Thu Jan 10 17:03:04 2019 +0100 118590f2b693Smrg 118690f2b693Smrg Only call drmmode_validate_leases if RandR is enabled 118790f2b693Smrg 118890f2b693Smrg It would crash if RandR is disabled, e.g. because Xinerama is enabled. 118990f2b693Smrg 119090f2b693Smrg Bugzilla: https://bugs.freedesktop.org/109230 119190f2b693Smrg (Ported from radeon commit b1c01698f577577e4a88bad0ae08fb5d998e7ebb) 119290f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 119390f2b693Smrg 119490f2b693Smrgcommit f3c0939a0cbb93c367ece3d41dc69824f585af42 119590f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 119690f2b693SmrgDate: Thu Jan 10 17:00:12 2019 +0100 119790f2b693Smrg 119890f2b693Smrg Only call drmmode_uevent_init if RandR is enabled 119990f2b693Smrg 120090f2b693Smrg There's no point in listening for hotplug events if RandR is disabled, 120190f2b693Smrg as there's no other mechanism for them to be propagated. We were already 120290f2b693Smrg mostly ignoring them in that case. 120390f2b693Smrg 120490f2b693Smrg Inspired by 120590f2b693Smrg https://gitlab.freedesktop.org/xorg/driver/xf86-video-intel/commit/1a489142c8e6a4828348cc9afbd0f430d3b1e2d8 120690f2b693Smrg (via https://bugs.freedesktop.org/109230#c11). 120790f2b693Smrg (Ported from radeon commit 38db1bbcfc019c92884c7819a6630c70e543f6b2) 120890f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 120990f2b693Smrg 121090f2b693Smrgcommit f3ddda618ec86650ed85f8b140a5db1394676748 121190f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 121290f2b693SmrgDate: Mon Dec 17 17:54:05 2018 +0100 121390f2b693Smrg 121490f2b693Smrg gitlab-ci: Use kaniko instead of docker-in-docker for image generation 121590f2b693Smrg 121690f2b693Smrg kaniko can also work in unprivileged runners. 121790f2b693Smrg 121890f2b693Smrg Based on v2 of 121990f2b693Smrg https://gitlab.freedesktop.org/xorg/xserver/merge_requests/92 . 122090f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 122190f2b693Smrg 122290f2b693Smrgcommit b689dc5081493377a31759d24a8dc9fcde12948a 122390f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 122490f2b693SmrgDate: Tue Dec 18 16:39:28 2018 +0100 122590f2b693Smrg 122690f2b693Smrg Remove superfluous vrr_flipping field and clean up related code 122790f2b693Smrg 122890f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 122990f2b693Smrg 123090f2b693Smrgcommit 233a0be82d5c317e58002f4daf836d4f95048465 123190f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 123290f2b693SmrgDate: Tue Dec 18 16:42:53 2018 +0100 123390f2b693Smrg 123490f2b693Smrg Don't clear info->flip_window in present_unflip 123590f2b693Smrg 123690f2b693Smrg present_unflip can get called between present_check_flip and 123790f2b693Smrg present_flip, in which case the latter would pass a NULL WindowPtr to 123890f2b693Smrg the former, resulting in a crash. 123990f2b693Smrg 124090f2b693Smrg present_flip should never get called for a window which has already been 124190f2b693Smrg destroyed, so there's no need to clear info->flip_window. 124290f2b693Smrg 124390f2b693Smrg Bugzilla: https://bugs.freedesktop.org/109067 124490f2b693Smrg Fixes: 2d18b37159edc "Check last flip window instead of screen root 124590f2b693Smrg before flipping" 124690f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 124790f2b693Smrg 124890f2b693Smrgcommit d4eab5d108c4569f3a9e2892704ea89b7ee797b6 124990f2b693SmrgAuthor: Mario Kleiner <mario.kleiner.de@gmail.com> 125090f2b693SmrgDate: Wed Dec 19 07:56:15 2018 +0100 125190f2b693Smrg 125290f2b693Smrg Fix crash when page flipping in multi-X-Screen/Zaphod mode 125390f2b693Smrg 125490f2b693Smrg amdgpu_do_pageflip() indexed the flipdata->fb[] array 125590f2b693Smrg indexing over config->num_crtc, but the flip completion 125690f2b693Smrg routines, e.g., drmmode_flip_handler(), index that array 125790f2b693Smrg via the crtc hw id from drmmode_get_crtc_id(crtc). 125890f2b693Smrg 125990f2b693Smrg This is mismatched and causes indexing into the wrong 126090f2b693Smrg array slot at flip completion -> Server crash. 126190f2b693Smrg 126290f2b693Smrg Always use drmmode_get_crtc_id(crtc) for indexing into 126390f2b693Smrg the array to fix this. 126490f2b693Smrg 126590f2b693Smrg Tested on a dual-X-Screen setup with one video output 126690f2b693Smrg assigned to each X-Screen, page-flipping an OpenGL app 126790f2b693Smrg on either of both X-Screens. This used to crash when 126890f2b693Smrg flipping on X-Screen 1, now it doesn't anymore. 126990f2b693Smrg 127090f2b693Smrg Fixes: 9b6782c821e0 "Store FB for each CRTC in drmmode_flipdata_rec" 127190f2b693Smrg (Ported from radeon commit 0058fd2ebf4c900b12f129984e98886a7ac84b2f) 127290f2b693Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 127390f2b693Smrg Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> 127490f2b693Smrg 127590f2b693Smrgcommit 0d60233d26ec70d4e1faa343b438e33829c6d5e4 127690f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 127790f2b693SmrgDate: Thu Nov 22 19:02:20 2018 +0100 127890f2b693Smrg 127990f2b693Smrg Use two HW cursor buffers per CRTC 128090f2b693Smrg 128190f2b693Smrg Switch to the other buffer when xf86_config->cursor changes. Avoids 128290f2b693Smrg these issues possible when re-using the same buffer: 128390f2b693Smrg 128490f2b693Smrg * The HW may intermittently display a mix of the old and new cursor 128590f2b693Smrg images. 128690f2b693Smrg * If the hotspot changes, the HW may intermittently display the new 128790f2b693Smrg cursor image at the location corresponding to the old image's hotspot. 128890f2b693Smrg 128990f2b693Smrg Bugzilla: https://bugs.freedesktop.org/108832 129090f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 129190f2b693Smrg 129290f2b693Smrgcommit b04697de5270e8e45744a7025c24df1f454a4cf0 129390f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 129490f2b693SmrgDate: Fri Nov 23 18:41:00 2018 +0100 129590f2b693Smrg 129690f2b693Smrg Update cursor position in drmmode_show_cursor if hotspot changed 129790f2b693Smrg 129890f2b693Smrg The cursor position is updated to be consistent with the new hotspot in 129990f2b693Smrg the same ioctl call. 130090f2b693Smrg 130190f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 130290f2b693Smrg 130390f2b693Smrgcommit b344e1559e936046ef02c777fc4f6bcefa3830bc 130490f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 130590f2b693SmrgDate: Fri Nov 23 18:22:25 2018 +0100 130690f2b693Smrg 130790f2b693Smrg Use drmIoctl in drmmode_show_cursor 130890f2b693Smrg 130990f2b693Smrg This should be functionally equivalent to what drmModeSetCursor(2) do 131090f2b693Smrg behind the scenes, but allows for new tricks in following changes. 131190f2b693Smrg 131290f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 131390f2b693Smrg 131490f2b693Smrgcommit e95044e45350870fa7e237860e89ade91ac03550 131590f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 131690f2b693SmrgDate: Thu Nov 22 17:54:45 2018 +0100 131790f2b693Smrg 131890f2b693Smrg Drop AMDGPUInfoRec::cursor_buffer array 131990f2b693Smrg 132090f2b693Smrg Not needed or even useful for anything. 132190f2b693Smrg 132290f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 132390f2b693Smrg 132490f2b693Smrgcommit 13c85e8a136e8626ba84656c6f8321394750f5c7 132590f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 132690f2b693SmrgDate: Thu Nov 22 17:50:19 2018 +0100 132790f2b693Smrg 132890f2b693Smrg Don't use GBM for allocating HW cursor BOs 132990f2b693Smrg 133090f2b693Smrg GBM doesn't really buy us anything for the cursor BOs. This simplifies 133190f2b693Smrg the code and following changes. 133290f2b693Smrg 133390f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 133490f2b693Smrg 133590f2b693Smrgcommit bcfa6c258fdf41a9928f8a3c78fc528d0fafee25 133690f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 133790f2b693SmrgDate: Wed Nov 21 18:32:04 2018 +0100 133890f2b693Smrg 133990f2b693Smrg Automatically try re-enabling TearFree after a flip failed 134090f2b693Smrg 134190f2b693Smrg Specifically, after both the page flip and vblank ioctls failed, but 134290f2b693Smrg then the vblank ioctl started working again. This can happen 134390f2b693Smrg intermittently e.g. when hotplugging a DP display. Previously, TearFree 134490f2b693Smrg would stay disabled in that case until a modeset was triggered somehow. 134590f2b693Smrg 134690f2b693Smrg Bugzilla: https://bugs.freedesktop.org/103791 134790f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 134890f2b693Smrg 134990f2b693Smrgcommit 4e7a24ac5a64e402146953ec5850d13c05742116 135090f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 135190f2b693SmrgDate: Wed Nov 21 17:54:18 2018 +0100 135290f2b693Smrg 135390f2b693Smrg Cancel pending scanout update in drmmode_crtc_scanout_update 135490f2b693Smrg 135590f2b693Smrg drmmode_crtc_scanout_update does the equivalent of a scanout update, 135690f2b693Smrg so no need to do it again. This might also avoid issues if there's a 135790f2b693Smrg pending scanout update at this point. 135890f2b693Smrg 135990f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 136090f2b693Smrg 136190f2b693Smrgcommit 500fadb16285146e91f62fce3a0ce1360ca684ba 136290f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 136390f2b693SmrgDate: Wed Nov 21 12:42:22 2018 +0100 136490f2b693Smrg 136590f2b693Smrg Perform scanout buffer update immediately if drmmode_wait_vblank fails 136690f2b693Smrg 136790f2b693Smrg Otherwise the damaged screen contents may never be displayed in that 136890f2b693Smrg case. 136990f2b693Smrg 137090f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 137190f2b693Smrg 137290f2b693Smrgcommit be862ed459b06ab7dfc80b5c3d1e2ac7e9327a6e 137390f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 137490f2b693SmrgDate: Tue Dec 11 11:47:16 2018 +0100 137590f2b693Smrg 137690f2b693Smrg Generate docker image as part of CI pipeline 137790f2b693Smrg 137890f2b693Smrg This removes the dependency on an externally generated docker image, and 137990f2b693Smrg should make it easier to update the docker image or make other changes 138090f2b693Smrg related to it. 138190f2b693Smrg 138290f2b693Smrg v2: 138390f2b693Smrg * If the image doesn't exist, try pulling it from the main repo's 138490f2b693Smrg registry. 138590f2b693Smrg * Use debian:testing-slim as the base, might result in a slightly 138690f2b693Smrg smaller image. 138790f2b693Smrg 138890f2b693Smrg v3: 138990f2b693Smrg * Prevent installation of packages which are only recommended, for an 139090f2b693Smrg even smaller image. 139190f2b693Smrg * Add recommendation to remove new image from source repository in 139290f2b693Smrg favour of the main repository's. 139390f2b693Smrg 139490f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> # v2 139590f2b693Smrg 139690f2b693Smrgcommit b11ee02c4596ddee3c9ff2141be5c91815efacc3 139790f2b693SmrgAuthor: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 139890f2b693SmrgDate: Thu Oct 4 09:51:40 2018 -0400 139990f2b693Smrg 140090f2b693Smrg Support CRTC variable refresh for windows using Present flips 140190f2b693Smrg 140290f2b693Smrg This patch adds support for setting the CRTC variable refresh property 140390f2b693Smrg for suitable windows flipping via the Present extension. 140490f2b693Smrg 140590f2b693Smrg The "VariableRefresh" Option is added to AMDGPU in this patch. This 140690f2b693Smrg option defaults to false, and must be set to "true" in an X conf 140790f2b693Smrg file for variable refresh support in the driver. 140890f2b693Smrg 140990f2b693Smrg In order for a window to be suitable for variable refresh it must have 141090f2b693Smrg the _VARIABLE_REFRESH property with a 32-bit CARDINAL value of 1. 141190f2b693Smrg 141290f2b693Smrg Then the window must pass the checks required to be suitable for 141390f2b693Smrg Present extension flips - it must cover the entire X screen and no 141490f2b693Smrg other window may already be flipping. 141590f2b693Smrg 141690f2b693Smrg With these conditions met every CRTC for the X screen will have their 141790f2b693Smrg variable refresh property set to true. 141890f2b693Smrg 141990f2b693Smrg Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 142090f2b693Smrg 142190f2b693Smrgcommit 2d18b37159edc526c73a36143fe9b5d6b75e610a 142290f2b693SmrgAuthor: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 142390f2b693SmrgDate: Tue Nov 13 09:08:01 2018 -0500 142490f2b693Smrg 142590f2b693Smrg Check last flip window instead of screen root before flipping 142690f2b693Smrg 142790f2b693Smrg A significant amount of time can pass between the X call into 142890f2b693Smrg check_flip for a window and when amdgpu_present_flip actually occurs. 142990f2b693Smrg To ensure that flipping is still possible there was an additional check 143090f2b693Smrg performed on screen->root in amdgpu_present_flip - but what should 143190f2b693Smrg be checked instead is the window itself. This only really worked before 143290f2b693Smrg because X ensures that the window has the same dimensions as the screen 143390f2b693Smrg to allow for present extension flipping. 143490f2b693Smrg 143590f2b693Smrg This patch tracks the flip window between calls to check_flip and flip 143690f2b693Smrg and uses that window instead of screen->root. 143790f2b693Smrg 143890f2b693Smrg Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> 143990f2b693Smrg 144090f2b693Smrgcommit 13c94a373b4858a2d2aa14c22b5f98d53c84c0d9 144190f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 144290f2b693SmrgDate: Thu Nov 15 16:40:46 2018 +0100 144390f2b693Smrg 144490f2b693Smrg Skip gamma correction of cursor data if premultiplied R/G/B > alpha 144590f2b693Smrg 144690f2b693Smrg The un-premultiplied R/G/B values would overflow the gamma LUT, so just 144790f2b693Smrg pass through the data unchanged, and leave it up to the HW how to 144890f2b693Smrg interpret such weird premultiplied alpha pixels. 144990f2b693Smrg 145090f2b693Smrg Bugzilla: https://bugs.freedesktop.org/108355 145190f2b693Smrg 145290f2b693Smrgcommit 51ba6dddee40c3688d4c7b12eabeab516ed153b7 145390f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 145490f2b693SmrgDate: Fri Nov 9 11:00:04 2018 +0100 145590f2b693Smrg 145690f2b693Smrg Move deferred vblank events to separate drm_vblank_deferred list 145790f2b693Smrg 145890f2b693Smrg It was still possible for nested xorg_list_for_each_entry_safe loops 145990f2b693Smrg to occur over the drm_vblank_signalled list, which could mess up that 146090f2b693Smrg list. Moving deferred events to a separate list allows processing the 146190f2b693Smrg drm_vblank_signalled list without xorg_list_for_each_entry_safe. 146290f2b693Smrg 146390f2b693Smrg v2: 146490f2b693Smrg * Refactor drm_handle_vblank_signalled helper function, less code 146590f2b693Smrg duplication => better readability (Alex Deucher) 146690f2b693Smrg 146790f2b693Smrg Bugzilla: https://bugs.freedesktop.org/108600 146890f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 146990f2b693Smrg 147090f2b693Smrgcommit e2c7369cae65069aa93eed1c0b678f975ce5c274 147190f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 147290f2b693SmrgDate: Mon Nov 5 19:02:31 2018 +0100 147390f2b693Smrg 147490f2b693Smrg Explicitly keep track of whether a DRM event is for a flip or not 147590f2b693Smrg 147690f2b693Smrg When an async flip is performed, and TearFree is enabled on the CRTC 147790f2b693Smrg used for timing, we schedule a vblank event for completing the page 147890f2b693Smrg flip. The DRM event queuing code treated this event like a vblank event, 147990f2b693Smrg but it needs to be treated like a page flip event. 148090f2b693Smrg 148190f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 148290f2b693Smrg 148390f2b693Smrgcommit eda571222f5a6be47f8897e82d85199bb9d95251 148490f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 148590f2b693SmrgDate: Mon Nov 5 18:07:54 2018 +0100 148690f2b693Smrg 148790f2b693Smrg Use drm_abort_one in drm_queue_handler 148890f2b693Smrg 148990f2b693Smrg At this point, we've already established that e->handler is NULL, no 149090f2b693Smrg need to check again in drm_queue_handle_one. This also makes it clearer 149190f2b693Smrg what's happening. 149290f2b693Smrg 149390f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 149490f2b693Smrg 149590f2b693Smrgcommit 426f9a49655f01863cf4d898f525e5f95984e0c4 149690f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 149790f2b693SmrgDate: Tue Nov 6 12:06:20 2018 +0100 149890f2b693Smrg 149990f2b693Smrg Relax detection of non-premultiplied alpha cursor data 150090f2b693Smrg 150190f2b693Smrg The stricter detection broke the cursor in some games. Apparently those 150290f2b693Smrg use cursor data with premultiplied alpha, but with some pixels having 150390f2b693Smrg r/g/b values larger than the alpha value (which corresponds to original 150490f2b693Smrg r/g/b values > 1.0), triggering the workaround. 150590f2b693Smrg 150690f2b693Smrg Relax the detection to match what's in the X server since 1.18.4, but 150790f2b693Smrg keep the workaround for older versions. 150890f2b693Smrg 150990f2b693Smrg Bugzilla: https://bugs.freedesktop.org/108650 151090f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 151190f2b693Smrg 151290f2b693Smrgcommit a9da219e13bd0cdec65554382b5cd15abc3e3778 151390f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 151490f2b693SmrgDate: Wed Nov 14 09:58:28 2018 +0100 151590f2b693Smrg 151690f2b693Smrg Add README.md to EXTRA_DIST 151790f2b693Smrg 151890f2b693Smrg Otherwise it isn't included in the generated tarballs. 151990f2b693Smrg 152090f2b693Smrg Suggested-by: Alan Coopersmith <alan.coopersmith@oracle.com> 152190f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 152290f2b693Smrg 152390f2b693Smrgcommit 1cb338253af9c539fc1f13fc12b255ed6303f8b1 152490f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 152590f2b693SmrgDate: Wed Oct 24 18:07:31 2018 +0200 152690f2b693Smrg 152790f2b693Smrg man: This driver supports colour depths 8, 15 and 16 152890f2b693Smrg 152990f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 153090f2b693Smrg 153190f2b693Smrgcommit 0734cdf544ffd3f2ac8749ad0e4bf43f8a5cea50 153290f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 153390f2b693SmrgDate: Fri Oct 5 12:35:37 2018 +0200 153490f2b693Smrg 153590f2b693Smrg glamor: Can work at depth >= 15 with current xserver Git master 153690f2b693Smrg 153790f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 153890f2b693Smrg 153990f2b693Smrgcommit ad6dfb0124860cf67730bde85867f81d9258c84d 154090f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 154190f2b693SmrgDate: Fri Oct 19 11:02:41 2018 +0200 154290f2b693Smrg 154390f2b693Smrg Detect and fix up non-premultiplied cursor data 154490f2b693Smrg 154590f2b693Smrg X server >= 1.18 already had code for this, but it only caught cases 154690f2b693Smrg where some pixels have 0 for alpha and non-0 for a non-alpha component. 154790f2b693Smrg Turns out some apps (e.g. the Civilization VI game) use 154890f2b693Smrg non-premultiplied cursor data which doesn't have such pixels, but can 154990f2b693Smrg still result in visual artifacts. 155090f2b693Smrg 155190f2b693Smrg This uses the method suggested by Kamil in 155290f2b693Smrg https://bugs.freedesktop.org/92309#c19: check for pixels where any 155390f2b693Smrg colour component value is larger than the alpha value, which isn't 155490f2b693Smrg possible with premultiplied alpha. 155590f2b693Smrg 155690f2b693Smrg There can still be non-premultiplied data which won't be caught by this, 155790f2b693Smrg but that should result in slightly incorrect colours and/or blending at 155890f2b693Smrg the worst, not wildly incorrect colours such as shown in the bug report 155990f2b693Smrg below. 156090f2b693Smrg 156190f2b693Smrg v2: 156290f2b693Smrg * Disable the check with current xserver Git master, which already does 156390f2b693Smrg the same check now. 156490f2b693Smrg 156590f2b693Smrg Bugzilla: https://bugs.freedesktop.org/108355 156690f2b693Smrg Suggested-by: Kamil Páral <kamil.paral@gmail.com> 156790f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 156890f2b693Smrg 156990f2b693Smrgcommit c9d43c1deb9a9cfc41a8d6439caf46d12d220853 157090f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 157190f2b693SmrgDate: Thu Oct 4 12:54:13 2018 +0200 157290f2b693Smrg 157390f2b693Smrg Allow up to six instances in Zaphod mode 157490f2b693Smrg 157590f2b693Smrg Corresponding to up to six CRTCs being available in the hardware. 157690f2b693Smrg 157790f2b693Smrg v2: 157890f2b693Smrg * Move instance overflow check from PreInit to the probe hooks, in 157990f2b693Smrg order to further minimize wasted effort. 158090f2b693Smrg 158190f2b693Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> # v1 158290f2b693Smrg 158390f2b693Smrgcommit aa572683d86174be2bfc09d4e173ae2a9907d40e 158490f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 158590f2b693SmrgDate: Wed Oct 10 17:28:35 2018 +0200 158690f2b693Smrg 158790f2b693Smrg Fix condition for calling set_pixmap_bo in drmmode_xf86crtc_resize 158890f2b693Smrg 158990f2b693Smrg This matches CreateScreenResources_KMS. 159090f2b693Smrg 159190f2b693Smrg Fixes crash when resizing the screen (e.g. using xrandr) with depth < 159290f2b693Smrg 24. 159390f2b693Smrg 159490f2b693Smrg Bugzilla: https://bugs.freedesktop.org/104914 159590f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 159690f2b693Smrg 159790f2b693Smrgcommit 05a1ba9abc941dec616ef7f836f4c54ac93ff9be 159890f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 159990f2b693SmrgDate: Tue Oct 2 18:01:14 2018 +0200 160090f2b693Smrg 160190f2b693Smrg Add GitLab CI configuration 160290f2b693Smrg 160390f2b693Smrg Builds the driver against all supported versions of xserver, with both 160490f2b693Smrg gcc and clang for xserver >= 1.18 (older versions cause warnings with 160590f2b693Smrg clang). Compiler warnings are treated as errors. 160690f2b693Smrg 160790f2b693Smrg The xserver 1.15 build uses standalone glamor, the xserver 1.13 & 1.14 160890f2b693Smrg builds use --disable-glamor. 160990f2b693Smrg 161090f2b693Smrg With the latest xserver version, make install and make distcheck are 161190f2b693Smrg tested as well. 161290f2b693Smrg 161390f2b693Smrgcommit babbd38057559471ab3cb6970010b9a4adf1ef3d 161490f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 161590f2b693SmrgDate: Tue Oct 2 17:55:03 2018 +0200 161690f2b693Smrg 161790f2b693Smrg Fix --disable-glamor build 161890f2b693Smrg 161990f2b693Smrg We were still relying on the glamor.h header being picked up implicitly. 162090f2b693Smrg 162190f2b693Smrgcommit b6ee7f92cfaa2c134bee101cf89983db73f4c28d 162290f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 162390f2b693SmrgDate: Tue Oct 2 17:52:10 2018 +0200 162490f2b693Smrg 162590f2b693Smrg Cast return value of amdgpu_get_marketing_name to char* 162690f2b693Smrg 162790f2b693Smrg Avoids compiler warning with xserver < 1.16: 162890f2b693Smrg 162990f2b693Smrg ../../src/amdgpu_kms.c: In function ‘AMDGPUPreInitChipType_KMS’: 163090f2b693Smrg ../../src/amdgpu_kms.c:1203:17: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] 163190f2b693Smrg pScrn->chipset = amdgpu_get_marketing_name(pAMDGPUEnt->pDev); 163290f2b693Smrg ^ 163390f2b693Smrg 163490f2b693Smrgcommit 955373a3e69baa241a1f267e96d04ddb902f689f 163590f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 163690f2b693SmrgDate: Tue Sep 25 18:40:01 2018 +0200 163790f2b693Smrg 163890f2b693Smrg Make wait_pending_flip / handle_deferred symmetric in set_mode_major 163990f2b693Smrg 164090f2b693Smrg We were always calling the latter, but not always the former, which 164190f2b693Smrg could result in handling deferred DRM events prematurely. 164290f2b693Smrg 164390f2b693Smrg Acked-by: Slava Abramov <slava.abramov@amd.com> 164490f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 164590f2b693Smrg 164690f2b693Smrgcommit 0cd2c337d2c02b8ec2bd994d6124b4aaaad10741 164790f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 164890f2b693SmrgDate: Thu Sep 20 17:35:40 2018 +0200 164990f2b693Smrg 165090f2b693Smrg Handle pending scanout update in drmmode_crtc_scanout_free 165190f2b693Smrg 165290f2b693Smrg We have to wait for a pending scanout flip or abort a pending scanout 165390f2b693Smrg update, otherwise the corresponding event handler will likely crash 165490f2b693Smrg after drmmode_crtc_scanout_free cleaned up the data structures. 165590f2b693Smrg 165690f2b693Smrg Fixes crash after VT switch while dedicated scanout pixmaps are enabled 165790f2b693Smrg for any CRTC. 165890f2b693Smrg 165990f2b693Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 166090f2b693Smrg 166190f2b693Smrgcommit ac5b6f96e97aaf95f4e668b4057006b221cffaec 166290f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 166390f2b693SmrgDate: Thu Sep 20 18:53:05 2018 +0200 166490f2b693Smrg 166590f2b693Smrg Convert README to markdown 166690f2b693Smrg 166790f2b693Smrg And update it a little for the current Gitlab infrastructure. 166890f2b693Smrg 166990f2b693Smrgcommit 451fe96809771ed4e2be3851a65f5360ba9912cb 167090f2b693SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 167190f2b693SmrgDate: Thu Sep 20 18:48:43 2018 +0200 167290f2b693Smrg 167390f2b693Smrg Post-release version bump 167490f2b693Smrg 167535d5b7c7Smrgcommit d5e17dc4c78aee5d37de399728066b9be881e044 167635d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 167735d5b7c7SmrgDate: Fri Sep 14 17:00:17 2018 +0200 167835d5b7c7Smrg 167935d5b7c7Smrg Bump version for the 18.1.0 release 168035d5b7c7Smrg 168135d5b7c7Smrgcommit 6572be49b713a26eca14f16e1854cabf28101288 168235d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 168335d5b7c7SmrgDate: Thu Sep 13 11:44:21 2018 +0200 168435d5b7c7Smrg 168535d5b7c7Smrg Bail from drmmode_cm_init if there's no CRTC 168635d5b7c7Smrg 168735d5b7c7Smrg We would crash due to dereferencing the NULL mode_res->crtc pointer. 168835d5b7c7Smrg 168935d5b7c7Smrg Bugzilla: https://bugs.freedesktop.org/107913 169035d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 169135d5b7c7Smrg 169235d5b7c7Smrgcommit ca5eb9894fff153c0a1df7bdc4a4745713309e27 169335d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 169435d5b7c7SmrgDate: Wed Aug 29 18:50:45 2018 +0200 169535d5b7c7Smrg 169635d5b7c7Smrg Bail early from drm_wait_pending_flip if there's no pending flip 169735d5b7c7Smrg 169835d5b7c7Smrg No need to process any events in that case. 169935d5b7c7Smrg 170035d5b7c7Smrg v2: 170135d5b7c7Smrg * Re-check drmmode_crtc->flip_pending after processing each event 170235d5b7c7Smrg 170335d5b7c7Smrgcommit a923bedfd91d39977dbf95f296cf9b68439490f2 170435d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 170535d5b7c7SmrgDate: Fri Aug 31 12:44:37 2018 +0200 170635d5b7c7Smrg 170735d5b7c7Smrg Do not push the CM_GAMMA_LUT property values in drmmode_crtc_cm_init 170835d5b7c7Smrg 170935d5b7c7Smrg The crtc->gamma_lut values aren't initialized yet at this point, and 171035d5b7c7Smrg the property values are pushed again from drmmode_setup_colormap 171135d5b7c7Smrg anyway. 171235d5b7c7Smrg 171335d5b7c7Smrg Fixes intermittent flicker due to random gamma LUT values during server 171435d5b7c7Smrg startup. 171535d5b7c7Smrg 171635d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 171735d5b7c7Smrg 171835d5b7c7Smrgcommit 26770be44b89b83bf39c28f2fe284c8cb92ed0c0 171935d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 172035d5b7c7SmrgDate: Wed Aug 29 18:49:19 2018 +0200 172135d5b7c7Smrg 172235d5b7c7Smrg Don't use xorg_list_for_each_entry_safe for signalled flips 172335d5b7c7Smrg 172435d5b7c7Smrg drm_wait_pending_flip can get called from drm_handle_event, in which 172535d5b7c7Smrg case xorg_list_for_each_entry_safe can end up processing the same entry 172635d5b7c7Smrg in both. To avoid this, just process the first list entry until the list 172735d5b7c7Smrg is empty. 172835d5b7c7Smrg 172935d5b7c7Smrgcommit 7eea3e2cd74eed22e982319144e18ae5b1087b78 173035d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 173135d5b7c7SmrgDate: Wed Aug 29 18:41:19 2018 +0200 173235d5b7c7Smrg 173335d5b7c7Smrg Always delete entry from list in drm_queue_handler 173435d5b7c7Smrg 173535d5b7c7Smrg We left entries without a handler hook in the list, so the list could 173635d5b7c7Smrg keep taking longer to process and use up more memory. 173735d5b7c7Smrg 173835d5b7c7Smrgcommit b804d7f85d8a07389ba7d3f9b8af8773f852f1c7 173935d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 174035d5b7c7SmrgDate: Wed Aug 29 17:34:55 2018 +0200 174135d5b7c7Smrg 174235d5b7c7Smrg glamor: Handle ihandle == -1 in amdgpu_glamor_set_shared_pixmap_backing 174335d5b7c7Smrg 174435d5b7c7Smrg (Ported from radeon commit de88ea2755611bdcb18d91d8234d2ab5be8ff2e9) 174535d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 174635d5b7c7Smrg 174735d5b7c7Smrgcommit ae2a450cb98707c4cab8a8265a284cf708bcd43d 174835d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 174935d5b7c7SmrgDate: Wed Aug 29 17:31:49 2018 +0200 175035d5b7c7Smrg 175135d5b7c7Smrg Handle ihandle == -1 in amdgpu_set_shared_pixmap_backing 175235d5b7c7Smrg 175335d5b7c7Smrg It means to stop using the shared pixmap backing. 175435d5b7c7Smrg 175535d5b7c7Smrg (Ported from radeon commit 1799680f7bd84e0618f34f4c7486799521ddaf83) 175635d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 175735d5b7c7Smrg 175835d5b7c7Smrgcommit 34e851d1f284da5afcfe449f349cf1eb5e962408 175935d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 176035d5b7c7SmrgDate: Fri Aug 24 17:18:10 2018 +0200 176135d5b7c7Smrg 176235d5b7c7Smrg Use AC_CONFIG_MACRO_DIR instead of AC_CONFIG_MACRO_DIRS 176335d5b7c7Smrg 176435d5b7c7Smrg Older versions of autoconf only supported the former. 176535d5b7c7Smrg 176635d5b7c7Smrg (Cherry picked from radeon commit cba8fe4d64819aaa8ba516aa68dbe6d2aa153046) 176735d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 176835d5b7c7Smrg 176935d5b7c7Smrgcommit afdfa2a1b6d4b594e0ed345b32279d4a2fd5e188 177035d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 177135d5b7c7SmrgDate: Fri Aug 24 17:17:43 2018 +0200 177235d5b7c7Smrg 177335d5b7c7Smrg Add m4 directory 177435d5b7c7Smrg 177535d5b7c7Smrg Although normally it only warns about it, under some circumstances, 177635d5b7c7Smrg aclocal can error out if this directory doesn't exist. 177735d5b7c7Smrg 177835d5b7c7Smrg Reported-by: John Lumby <johnlumby@hotmail.com> 177935d5b7c7Smrg (Cherry picked from radeon commit 7b01c10137aba24c8f61dd9b2a19ea257ad24371) 178035d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 178135d5b7c7Smrg 178235d5b7c7Smrgcommit f6cd72e64e85896b6d155bee0930e59771dcb701 178335d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 178435d5b7c7SmrgDate: Thu Aug 16 16:31:01 2018 +0200 178535d5b7c7Smrg 178635d5b7c7Smrg Use correct FB handle in amdgpu_do_pageflip 178735d5b7c7Smrg 178835d5b7c7Smrg We were always using the handle of the client provided FB, which 178935d5b7c7Smrg prevented RandR transforms from working, and could result in a black 179035d5b7c7Smrg screen. 179135d5b7c7Smrg 179235d5b7c7Smrg Fixes: 9b6782c821e0 "Store FB for each CRTC in drmmode_flipdata_rec" 179335d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 179435d5b7c7Smrg 179535d5b7c7Smrgcommit 85cd8eef0cbed7b409b07f58d76dacd34aa3ddea 179635d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 179735d5b7c7SmrgDate: Tue Jul 24 18:58:27 2018 +0200 179835d5b7c7Smrg 179935d5b7c7Smrg Remove drmmode_crtc_private_rec::present_vblank_* related code 180035d5b7c7Smrg 180135d5b7c7Smrg Not needed anymore with the more robust mechanisms for preventing nested 180235d5b7c7Smrg drmHandleEvent calls introduced in the previous changes. 180335d5b7c7Smrg 180435d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 180535d5b7c7Smrg 180635d5b7c7Smrgcommit e52872da69ecc84dafb3355839e35b0383f0d228 180735d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 180835d5b7c7SmrgDate: Fri Jul 20 16:56:22 2018 +0200 180935d5b7c7Smrg 181035d5b7c7Smrg Defer vblank event handling while waiting for a pending flip 181135d5b7c7Smrg 181235d5b7c7Smrg This is to avoid submitting more flips while we are waiting for pending 181335d5b7c7Smrg ones to complete. 181435d5b7c7Smrg 181535d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 181635d5b7c7Smrg 181735d5b7c7Smrgcommit 739181c8d3334ff14b5a607895dfdeb29b0d9020 181835d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 181935d5b7c7SmrgDate: Wed Jul 25 13:00:15 2018 +0200 182035d5b7c7Smrg 182135d5b7c7Smrg Add amdgpu_drm_handle_event wrapper for drmHandleEvent 182235d5b7c7Smrg 182335d5b7c7Smrg Instead of processing DRM events directly from drmHandleEvent's 182435d5b7c7Smrg callbacks, there are three phases: 182535d5b7c7Smrg 182635d5b7c7Smrg 1. drmHandleEvent is called, and signalled events are re-queued to 182735d5b7c7Smrg _signalled lists from its callbacks. 182835d5b7c7Smrg 2. Signalled page flip completion events are processed. 182935d5b7c7Smrg 3. Signalled vblank events are processed. 183035d5b7c7Smrg 183135d5b7c7Smrg This should make sure that we never call drmHandleEvent from one of its 183235d5b7c7Smrg callbacks, which would usually result in blocking forever. 183335d5b7c7Smrg 183435d5b7c7Smrgcommit 6029794e8a35417faf825491a89b85f713c77fc1 183535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 183635d5b7c7SmrgDate: Fri Jul 20 17:07:23 2018 +0200 183735d5b7c7Smrg 183835d5b7c7Smrg Add amdgpu_drm_wait_pending_flip function 183935d5b7c7Smrg 184035d5b7c7Smrg Replacing the drmmode_crtc_wait_pending_event macro. 184135d5b7c7Smrg 184235d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 184335d5b7c7Smrg 184435d5b7c7Smrgcommit 0148283984c77f7a6e97026edc3093497547e0a4 184535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 184635d5b7c7SmrgDate: Fri Jul 20 16:37:05 2018 +0200 184735d5b7c7Smrg 184835d5b7c7Smrg Move DRM event queue related initialization to amdgpu_drm_queue_init 184935d5b7c7Smrg 185035d5b7c7Smrg And make amdgpu_drm_queue_handler not directly accessible outside of 185135d5b7c7Smrg amdgpu_drm_queue.c. 185235d5b7c7Smrg 185335d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 185435d5b7c7Smrg 185535d5b7c7Smrgcommit 7f65a8c9e03bddf2378aaa928460632ed6b1a688 185635d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 185735d5b7c7SmrgDate: Fri Aug 3 17:52:28 2018 +0200 185835d5b7c7Smrg 185935d5b7c7Smrg glamor: Check glamor module version for depth 30 support 186035d5b7c7Smrg 186135d5b7c7Smrg Instead of the Xorg version. This should allow glamor backported from 186235d5b7c7Smrg xserver >= 1.20 to work with older Xorg versions. 186335d5b7c7Smrg 186435d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 186535d5b7c7Smrg 186635d5b7c7Smrgcommit 08c4d42f43f80baa4bbc2ff9d0a422202cdc3538 186735d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 186835d5b7c7SmrgDate: Thu Aug 2 18:41:04 2018 +0200 186935d5b7c7Smrg 187035d5b7c7Smrg glamor: Use glamor_egl_create_textured_pixmap_from_gbm_bo when possible 187135d5b7c7Smrg 187235d5b7c7Smrg Inspired by the modesetting driver. 187335d5b7c7Smrg 187435d5b7c7Smrg (Ported from radeon commit db28d35ce9fd07a2a4703f3df0633d4c8291ff9b) 187535d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 187635d5b7c7Smrg 187735d5b7c7Smrgcommit 9b6782c821e0bdc53336d98f87ddde752faf7902 187835d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 187935d5b7c7SmrgDate: Fri Jul 27 17:55:11 2018 +0200 188035d5b7c7Smrg 188135d5b7c7Smrg Store FB for each CRTC in drmmode_flipdata_rec 188235d5b7c7Smrg 188335d5b7c7Smrg We were only storing the FB provided by the client, but on CRTCs with 188435d5b7c7Smrg TearFree enabled, we use a separate FB. This could cause 188535d5b7c7Smrg drmmode_flip_handler to fail to clear drmmode_crtc->flip_pending, which 188635d5b7c7Smrg could result in a hang when waiting for the pending flip to complete. We 188735d5b7c7Smrg were trying to avoid that by always clearing drmmode_crtc->flip_pending 188835d5b7c7Smrg when TearFree is enabled, but that wasn't reliable, because 188935d5b7c7Smrg drmmode_crtc->tear_free can already be FALSE at this point when 189035d5b7c7Smrg disabling TearFree. 189135d5b7c7Smrg 189235d5b7c7Smrg Now that we're keeping track of each CRTC's flip FB separately, 189335d5b7c7Smrg drmmode_flip_handler can reliably clear flip_pending, and we no longer 189435d5b7c7Smrg need the TearFree hack. 189535d5b7c7Smrg 189635d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 189735d5b7c7Smrg 189835d5b7c7Smrgcommit 2989d40ef74d9966e8e8df2ef7727b2cc48d4960 189935d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 190035d5b7c7SmrgDate: Wed Jul 25 18:37:48 2018 +0200 190135d5b7c7Smrg 190235d5b7c7Smrg glamor: Set AMDGPU_CREATE_PIXMAP_DRI2 for DRI3 pixmaps 190335d5b7c7Smrg 190435d5b7c7Smrg Not doing this resulted in falling back to software for DRI3 client 190535d5b7c7Smrg presentation operations with ShadowPrimary. 190635d5b7c7Smrg 190735d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 190835d5b7c7Smrg 190935d5b7c7Smrgcommit f3b2ed37d683f8616a0a31ff63133ddb8fe1a4a3 191035d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 191135d5b7c7SmrgDate: Mon Jul 23 18:42:39 2018 +0200 191235d5b7c7Smrg 191335d5b7c7Smrg Use strcpy for RandR output property names 191435d5b7c7Smrg 191535d5b7c7Smrg Instead of strncpy with the string length. Avoids new warnings with GCC 191635d5b7c7Smrg 8: 191735d5b7c7Smrg 191835d5b7c7Smrg ../../src/drmmode_display.c: In function ‘drmmode_output_create_resources’: 191935d5b7c7Smrg ../../src/drmmode_display.c:2240:2: warning: ‘strncpy’ output truncated before terminating nul copying 8 bytes from a string of the same length [-Wstringop-truncation] 192035d5b7c7Smrg strncpy(tearfree_prop->name, "TearFree", 8); 192135d5b7c7Smrg ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 192235d5b7c7Smrg ../../src/drmmode_display.c:2244:2: warning: ‘strncpy’ output truncated before terminating nul copying 3 bytes from a string of the same length [-Wstringop-truncation] 192335d5b7c7Smrg strncpy(tearfree_prop->enums[0].name, "off", 3); 192435d5b7c7Smrg ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 192535d5b7c7Smrg ../../src/drmmode_display.c:2245:2: warning: ‘strncpy’ output truncated before terminating nul copying 2 bytes from a string of the same length [-Wstringop-truncation] 192635d5b7c7Smrg strncpy(tearfree_prop->enums[1].name, "on", 2); 192735d5b7c7Smrg ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 192835d5b7c7Smrg ../../src/drmmode_display.c:2247:2: warning: ‘strncpy’ output truncated before terminating nul copying 4 bytes from a string of the same length [-Wstringop-truncation] 192935d5b7c7Smrg strncpy(tearfree_prop->enums[2].name, "auto", 4); 193035d5b7c7Smrg ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 193135d5b7c7Smrg 193235d5b7c7Smrg Reviewed-by: Slava Abramov <slava.abramov@amd.com> 193335d5b7c7Smrg 193435d5b7c7Smrgcommit 5f06d6b8ba570b500956ad26fee711d5ac427818 193535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 193635d5b7c7SmrgDate: Tue Jul 17 19:00:51 2018 +0200 193735d5b7c7Smrg 193835d5b7c7Smrg Remove drmmode_terminate_leases 193935d5b7c7Smrg 194035d5b7c7Smrg The RandR screen private is already freed when our CloseScreen runs, so 194135d5b7c7Smrg this can't do anything useful. This cleanup has to be done by the X 194235d5b7c7Smrg server itself. 194335d5b7c7Smrg 194435d5b7c7Smrgcommit 7cc2d4515a63845a027214daf4d391cf56e35bb3 194535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 194635d5b7c7SmrgDate: Thu Jul 19 16:59:22 2018 +0200 194735d5b7c7Smrg 194835d5b7c7Smrg Remove AMDGPUInfoRec::fbcon_pixmap 194935d5b7c7Smrg 195035d5b7c7Smrg We always destroy the fbcon pixmap in drmmode_copy_fb anyway. 195135d5b7c7Smrg 195235d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 195335d5b7c7Smrg 195435d5b7c7Smrgcommit 46d87187c6a0b8f941cc6f30af1f53a98ff2e635 195535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 195635d5b7c7SmrgDate: Thu Jul 19 12:37:42 2018 +0200 195735d5b7c7Smrg 195835d5b7c7Smrg Don't use DRM_IOCTL_GEM_FLINK in create_pixmap_for_fbcon 195935d5b7c7Smrg 196035d5b7c7Smrg We don't need it. 196135d5b7c7Smrg 196235d5b7c7Smrgcommit b8d8416792488f7b15c94234d7e0e35d5ce10ed9 196335d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 196435d5b7c7SmrgDate: Thu Jul 19 11:36:19 2018 +0200 196535d5b7c7Smrg 196635d5b7c7Smrg Free previous xf86CrtcRec gamma LUT memory 196735d5b7c7Smrg 196835d5b7c7Smrg We were leaking it. 196935d5b7c7Smrg 197035d5b7c7Smrg Also, don't bother allocating new memory if it's already the expected 197135d5b7c7Smrg size. 197235d5b7c7Smrg 197335d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 197435d5b7c7Smrg 197535d5b7c7Smrgcommit ae8e02c6fc4ef5d5340b8cd4739e66b19b9e3386 197635d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 197735d5b7c7SmrgDate: Fri Jul 13 10:38:56 2018 +0200 197835d5b7c7Smrg 197935d5b7c7Smrg Hardcode "non-desktop" RandR property name 198035d5b7c7Smrg 198135d5b7c7Smrg It's a bit silly to require current randrproto just for this definition, 198235d5b7c7Smrg which can't really change anyway. 198335d5b7c7Smrg 198435d5b7c7Smrg Suggested-by: Qiang Yu <qiang.yu@amd.com> 198535d5b7c7Smrg Reviewed-by: Qiang Yu <Qiang.Yu@amd.com> 198635d5b7c7Smrg 198735d5b7c7Smrgcommit 1247be21704dd185ce26097e11b3685815ffac4f 198835d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 198935d5b7c7SmrgDate: Fri Jul 13 18:30:04 2018 +0200 199035d5b7c7Smrg 199135d5b7c7Smrg Support gamma correction & colormaps at depth 30 as well 199235d5b7c7Smrg 199335d5b7c7Smrg Only supported with the advanced colour management properties available 199435d5b7c7Smrg with DC as of kernel 4.17. 199535d5b7c7Smrg 199635d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 199735d5b7c7Smrg 199835d5b7c7Smrgcommit 9dfbae76b179285d142b97852211b900ebfae51d 199935d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 200035d5b7c7SmrgDate: Tue Jul 10 18:13:39 2018 +0200 200135d5b7c7Smrg 200235d5b7c7Smrg Move flush from radeon_scanout_do_update to its callers 200335d5b7c7Smrg 200435d5b7c7Smrg No functional change intended. 200535d5b7c7Smrg 200635d5b7c7Smrg (Ported from radeon commit 90b94d40449f665f2d12874598062a5e5e5b64cd) 200735d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 200835d5b7c7Smrg 200935d5b7c7Smrgcommit ace6ea016ce0013a34e1d4637aeacbf4d0e83c79 201035d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 201135d5b7c7SmrgDate: Tue Jul 10 18:11:04 2018 +0200 201235d5b7c7Smrg 201335d5b7c7Smrg glamor: Bail CreatePixmap on unsupported pixmap depth 201435d5b7c7Smrg 201535d5b7c7Smrg Fixes crash in that case. 201635d5b7c7Smrg 201735d5b7c7Smrg Bugzilla: https://bugs.freedesktop.org/106293 201835d5b7c7Smrg (Ported from radeon commit 65c9dfea4e841b7d6f795c7489fede58c5e9631f) 201935d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 202035d5b7c7Smrg 202135d5b7c7Smrgcommit c160302abcdb18eec35c377d80e34f5bd857df45 202235d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 202335d5b7c7SmrgDate: Thu May 17 09:50:50 2018 +0200 202435d5b7c7Smrg 202535d5b7c7Smrg Bail from dri2_create_buffer2 if we can't get a pixmap 202635d5b7c7Smrg 202735d5b7c7Smrg We would store the NULL pointer and continue, which would lead to a 202835d5b7c7Smrg crash down the road. 202935d5b7c7Smrg 203035d5b7c7Smrg Bugzilla: https://bugs.freedesktop.org/106293 203135d5b7c7Smrg (Ported from radeon commit 3dcfce8d0f495d09d7836caf98ef30d625b78a13) 203235d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 203335d5b7c7Smrg 203435d5b7c7Smrgcommit 61040bdfa360975614fb47aa7ea1b3a1abac3427 203535d5b7c7SmrgAuthor: Keith Packard <keithp@keithp.com> 203635d5b7c7SmrgDate: Mon Feb 12 13:51:56 2018 -0800 203735d5b7c7Smrg 203835d5b7c7Smrg Add RandR leases support 203935d5b7c7Smrg 204035d5b7c7Smrg Signed-off-by: Keith Packard <keithp@keithp.com> 204135d5b7c7Smrg (Ported from xserver commit e4e3447603b5fd3a38a92c3f972396d1f81168ad) 204235d5b7c7Smrg Reviewed-by: Keith Packard <keithp@keithp.com> 204335d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 204435d5b7c7Smrg 204535d5b7c7Smrgcommit ab7e39c5a03e24c3ce3ee2f22ada7572bc2d9aa7 204635d5b7c7SmrgAuthor: Keith Packard <keithp@keithp.com> 204735d5b7c7SmrgDate: Mon Feb 12 13:51:55 2018 -0800 204835d5b7c7Smrg 204935d5b7c7Smrg modesetting: Create CONNECTOR_ID properties for outputs [v2] 205035d5b7c7Smrg 205135d5b7c7Smrg This lets a DRM client map between X outputs and kernel connectors. 205235d5b7c7Smrg 205335d5b7c7Smrg v2: 205435d5b7c7Smrg Change CONNECTOR_ID to enum -- Adam Jackson <ajax@nwnk.net> 205535d5b7c7Smrg 205635d5b7c7Smrg Signed-off-by: Keith Packard <keithp@keithp.com> 205735d5b7c7Smrg (Ported from xserver commit 023d4aba8d45e9e3630b944ecfb650c081799b96) 205835d5b7c7Smrg Reviewed-by: Keith Packard <keithp@keithp.com> 205935d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 206035d5b7c7Smrg 206135d5b7c7Smrgcommit 14db71a606128c4a207f43298809af279b77e2a8 206235d5b7c7SmrgAuthor: Keith Packard <keithp@keithp.com> 206335d5b7c7SmrgDate: Mon Feb 12 13:51:53 2018 -0800 206435d5b7c7Smrg 206535d5b7c7Smrg modesetting: Record non-desktop kernel property at PreInit time 206635d5b7c7Smrg 206735d5b7c7Smrg Save any value of the kernel non-desktop property in the xf86Output 206835d5b7c7Smrg structure to avoid non-desktop outputs in the default configuration. 206935d5b7c7Smrg 207035d5b7c7Smrg [Also bump randrproto requirement to a version that defines 207135d5b7c7Smrg RR_PROPERTY_NON_DESKTOP - ajax] 207235d5b7c7Smrg 207335d5b7c7Smrg Signed-off-by: Keith Packard <keithp@keithp.com> 207435d5b7c7Smrg (Ported from xserver commit b91c787c4cd2d20685db69426c539938c556128a) 207535d5b7c7Smrg Reviewed-by: Keith Packard <keithp@keithp.com> 207635d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 207735d5b7c7Smrg 207835d5b7c7Smrgcommit baea4fa492f635cdfe746a84be2e337d9aeae8a9 207935d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 208035d5b7c7SmrgDate: Tue Jun 26 19:02:21 2018 +0200 208135d5b7c7Smrg 208235d5b7c7Smrg Call drmmode_crtc_gamma_do_set from drmmode_setup_colormap 208335d5b7c7Smrg 208435d5b7c7Smrg Instead of from drmmode_set_mode_major. There's no need to re-set the 208535d5b7c7Smrg gamma LUT on every modeset, the kernel should preserve it. 208635d5b7c7Smrg 208735d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 208835d5b7c7Smrg 208935d5b7c7Smrgcommit 19a40758be04e1d451a030f452efb49e8aaad541 209035d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 209135d5b7c7SmrgDate: Wed Jun 27 18:36:43 2018 +0200 209235d5b7c7Smrg 209335d5b7c7Smrg Remove #if 0'd code 209435d5b7c7Smrg 209535d5b7c7Smrg This has always been disabled, no need to keep it. 209635d5b7c7Smrg 209735d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 209835d5b7c7Smrg Reviewed-by: Slava Abramov <slava.abramov@amd.com> 209935d5b7c7Smrg 210035d5b7c7Smrgcommit 8e98195e58f77fd1f354b2707360bd4445aef5b4 210135d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 210235d5b7c7SmrgDate: Tue Jun 26 18:40:23 2018 +0200 210335d5b7c7Smrg 210435d5b7c7Smrg Don't apply gamma to HW cursor data if colour management is enabled 210535d5b7c7Smrg 210635d5b7c7Smrg In that case (with DC as of 4.17 kernels), the display hardware applies 210735d5b7c7Smrg gamma to the HW cursor. 210835d5b7c7Smrg 210935d5b7c7Smrg v2: 211035d5b7c7Smrg * Also use all 0s when alpha == 0 in the gamma passthrough case. 211135d5b7c7Smrg 211235d5b7c7Smrg Bugzilla: https://bugs.freedesktop.org/106578 211335d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 211435d5b7c7Smrg 211535d5b7c7Smrgcommit 606075b852d8e1d40ed0a56b5a928abdd7012f95 211635d5b7c7SmrgAuthor: Leo Li (Sunpeng) <sunpeng.li@amd.com> 211735d5b7c7SmrgDate: Fri Jun 15 17:05:52 2018 -0400 211835d5b7c7Smrg 211935d5b7c7Smrg Also compose LUT when setting legacy gamma 212035d5b7c7Smrg 212135d5b7c7Smrg We compose the two LUTs when pushing non-legacy gamma changes, and the 212235d5b7c7Smrg same needs to be done when setting legacy gamma. 212335d5b7c7Smrg 212435d5b7c7Smrg To do so, we just call push_cm_prop() on the gamma LUT. It will compose 212535d5b7c7Smrg the LUTs for us, and fall back to using legacy LUT (upscaled to non- 212635d5b7c7Smrg legacy size) if non-legacy is unavailable. 212735d5b7c7Smrg 212835d5b7c7Smrg It's also possible that the Kernel has no support support for non- 212935d5b7c7Smrg legacy color. In which case, we fall back to legacy gamma. 213035d5b7c7Smrg 213135d5b7c7Smrg v2: Remove per-CRTC check for color management support. 213235d5b7c7Smrg 213335d5b7c7Smrg Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 213435d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 213535d5b7c7Smrg 213635d5b7c7Smrgcommit e0a4c0e2155a5fcfad747ea5bddcf5b4b551f151 213735d5b7c7SmrgAuthor: Leo Li (Sunpeng) <sunpeng.li@amd.com> 213835d5b7c7SmrgDate: Fri Jun 15 17:12:48 2018 -0400 213935d5b7c7Smrg 214035d5b7c7Smrg Compose non-legacy with legacy regamma LUT 214135d5b7c7Smrg 214235d5b7c7Smrg Frequently, a user may have non-legacy gamma enabled for monitor 214335d5b7c7Smrg correction, while using legacy gamma for things like 214435d5b7c7Smrg redshift/nightlight. 214535d5b7c7Smrg 214635d5b7c7Smrg To do so, we compose the two LUTs. Legacy gamma will be applied first, 214735d5b7c7Smrg then non-legacy. i.e. non-legacy_LUT(legacy_LUT(in_color)). 214835d5b7c7Smrg 214935d5b7c7Smrg Note that the staged gamma LUT within the driver-private CRTC will 215035d5b7c7Smrg always contain the non-legacy LUT. This is to ensure that we have a 215135d5b7c7Smrg cached copy for future compositions. 215235d5b7c7Smrg 215335d5b7c7Smrg v2: Don't compose LUTs if legacy gamma is disabled (which is the case 215435d5b7c7Smrg for deep 30bpp color). The legacy LUT won't be computed here, 215535d5b7c7Smrg causing composition to spit out something invalid. 215635d5b7c7Smrg 215735d5b7c7Smrg v3: Use LUT sizes that are now cached in drmmode. 215835d5b7c7Smrg 215935d5b7c7Smrg Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 216035d5b7c7Smrg 216135d5b7c7Smrg [ Michel Dänzer: Replace "crtc->funcs->gamma_set == NULL" with 216235d5b7c7Smrg !crtc->funcs->gamma_set ] 216335d5b7c7Smrg 216435d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 216535d5b7c7Smrg 216635d5b7c7Smrgcommit e1fe46013c281f4644ca49915ae0ff081582a5b9 216735d5b7c7SmrgAuthor: Leo Li (Sunpeng) <sunpeng.li@amd.com> 216835d5b7c7SmrgDate: Fri Jun 15 17:05:39 2018 -0400 216935d5b7c7Smrg 217035d5b7c7Smrg Enable setting of color properties via RandR 217135d5b7c7Smrg 217235d5b7c7Smrg Setting a color property involves: 217335d5b7c7Smrg 1. Staging the property onto the driver-private CRTC object 217435d5b7c7Smrg 2. Pushing the staged property into kernel DRM, for HW programming 217535d5b7c7Smrg 217635d5b7c7Smrg Add a function to do the staging, and execute the above steps in 217735d5b7c7Smrg output_property_set. 217835d5b7c7Smrg 217935d5b7c7Smrg v2: 218035d5b7c7Smrg - Remove per-CRTC check for color management support in stage_cm_prop. 218135d5b7c7Smrg - Use switch statement instead of if statements. 218235d5b7c7Smrg 218335d5b7c7Smrg Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 218435d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 218535d5b7c7Smrg 218635d5b7c7Smrgcommit 29de2859e296b4e9f0b4ae7564c353c5518f3f08 218735d5b7c7SmrgAuthor: Leo Li (Sunpeng) <sunpeng.li@amd.com> 218835d5b7c7SmrgDate: Fri Jun 15 17:05:28 2018 -0400 218935d5b7c7Smrg 219035d5b7c7Smrg Update color properties on output_get_property 219135d5b7c7Smrg 219235d5b7c7Smrg Notify RandR of any updated color properties on the output's CRTC when 219335d5b7c7Smrg its get_property() hook is called. 219435d5b7c7Smrg 219535d5b7c7Smrg v2: Remove per-CRTC check for color management support. 219635d5b7c7Smrg 219735d5b7c7Smrg Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 219835d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 219935d5b7c7Smrg 220035d5b7c7Smrgcommit 639acf54b4de6f62000d12cc6dbf4f5e49cae888 220135d5b7c7SmrgAuthor: Leo Li (Sunpeng) <sunpeng.li@amd.com> 220235d5b7c7SmrgDate: Fri Jun 15 17:04:58 2018 -0400 220335d5b7c7Smrg 220435d5b7c7Smrg Configure color properties when creating output resources 220535d5b7c7Smrg 220635d5b7c7Smrg List color management properties on outputs if there is kernel support. 220735d5b7c7Smrg Otherwise, don't list them at all. 220835d5b7c7Smrg 220935d5b7c7Smrg v2: 221035d5b7c7Smrg - Use switch statement in configure_and_change 221135d5b7c7Smrg - Also configure LUT sizes for outputs that don't have an attached CRTC. 221235d5b7c7Smrg We can do this since LUT sizes are now cached on the drmmode object. 221335d5b7c7Smrg 221435d5b7c7Smrg Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 221535d5b7c7Smrg 221635d5b7c7Smrg [ Michel Dänzer: Drop const from data pointer declaration in 221735d5b7c7Smrg rr_configure_and_change_cm_property, to avoid warning when building 221835d5b7c7Smrg against xserver 1.13 ] 221935d5b7c7Smrg 222035d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 222135d5b7c7Smrg 222235d5b7c7Smrgcommit 3cf5a281d8481c997029dae164d6fdeca66b9447 222335d5b7c7SmrgAuthor: Leo Li (Sunpeng) <sunpeng.li@amd.com> 222435d5b7c7SmrgDate: Fri Jun 15 17:04:44 2018 -0400 222535d5b7c7Smrg 222635d5b7c7Smrg Initialize color properties on CRTC during CRTC init 222735d5b7c7Smrg 222835d5b7c7Smrg And destroy them on the CRTC destroy hook. 222935d5b7c7Smrg 223035d5b7c7Smrg When initializing color management properties on the private 223135d5b7c7Smrg drmmode_crtc, we want to: 223235d5b7c7Smrg 223335d5b7c7Smrg 1. Default its color transform matrix (CTM) to identity 223435d5b7c7Smrg 2. Program hardware with default color management values (SRGB for 223535d5b7c7Smrg de/regamma, identity for CTM) 223635d5b7c7Smrg 223735d5b7c7Smrg It's possible that cm initialization fails due to memory error or DRM 223835d5b7c7Smrg error. In which case, the RandR state may not reflect the actual 223935d5b7c7Smrg hardware state. 224035d5b7c7Smrg 224135d5b7c7Smrg v2: 224235d5b7c7Smrg - Use switch statement in push_cm_prop 224335d5b7c7Smrg - Get rid of per-CRTC cm support checks. Keep it simple and only check 224435d5b7c7Smrg the first CRTC, since kernel will always report all or nothing for AMD 224535d5b7c7Smrg hardware. 224635d5b7c7Smrg - Remove per-CRTC LUT size caching, drmmode now holds that. Update 224735d5b7c7Smrg commit message to reflect this. 224835d5b7c7Smrg 224935d5b7c7Smrg Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 225035d5b7c7Smrg 225135d5b7c7Smrg [ Michel Dänzer: Replace "drmmode_crtc->ctm == NULL" with 225235d5b7c7Smrg !drmmode_crtc->ctm ] 225335d5b7c7Smrg 225435d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 225535d5b7c7Smrg 225635d5b7c7Smrgcommit 810ed133cd67b3deb38d1af87e252a094e9ee8f2 225735d5b7c7SmrgAuthor: Leo Li (Sunpeng) <sunpeng.li@amd.com> 225835d5b7c7SmrgDate: Fri Jun 15 17:02:57 2018 -0400 225935d5b7c7Smrg 226035d5b7c7Smrg Cache color property IDs and LUT sizes during pre-init 226135d5b7c7Smrg 226235d5b7c7Smrg DRM creates property types with unique IDs during kernel driver init. 226335d5b7c7Smrg Cache the color property IDs on DDX init for use later, when we need 226435d5b7c7Smrg to modify these properties. Also cache the (de)gamma LUT sizes, since 226535d5b7c7Smrg they are the same for all CRTCs on AMD hardware. 226635d5b7c7Smrg 226735d5b7c7Smrg Since these values are the same regardless of the CRTC, they can be 226835d5b7c7Smrg cached within the private drmmode_rec object. We can also use any color- 226935d5b7c7Smrg management-enabled CRTC to initially fetch them. 227035d5b7c7Smrg 227135d5b7c7Smrg Also introduce an enumeration of possible color management properties, 227235d5b7c7Smrg to provide a easy and unified way of referring to them. 227335d5b7c7Smrg 227435d5b7c7Smrg v2: 227535d5b7c7Smrg - Reorder cm property enum so that LUT sizes are at the end. This allows 227635d5b7c7Smrg us to use DEGAMMA_LUT_SIZE as an anchor for iterating over mutable cm 227735d5b7c7Smrg properties. 227835d5b7c7Smrg - Cache (de)gamma LUT sizes within drmmode, since it's the same for all 227935d5b7c7Smrg CRTCs on AMD hardware. Update commit message to reflect this. 228035d5b7c7Smrg 228135d5b7c7Smrg Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 228235d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 228335d5b7c7Smrg 228435d5b7c7Smrgcommit 940c8b39f79789d4d5ddb8ab8d25a8ae05932756 228535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 228635d5b7c7SmrgDate: Tue Jun 12 18:45:08 2018 +0200 228735d5b7c7Smrg 228835d5b7c7Smrg Check dimensions passed to drmmode_xf86crtc_resize 228935d5b7c7Smrg 229035d5b7c7Smrg When enabling a secondary GPU output, Xorg can try resizing the screen 229135d5b7c7Smrg beyond the limit advertised by the driver, leading to drmModeAddFB 229235d5b7c7Smrg failing and primary GPU outputs turning off. Check for this and bail 229335d5b7c7Smrg instead. 229435d5b7c7Smrg 229535d5b7c7Smrgcommit 74124f2c17dbb4b752707bb7eee398ae099e8a2c 229635d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 229735d5b7c7SmrgDate: Fri May 18 12:31:57 2018 +0200 229835d5b7c7Smrg 229935d5b7c7Smrg Use drmmode_crtc_dpms in drmmode_set_desired_modes 230035d5b7c7Smrg 230135d5b7c7Smrg Simplifies the latter slightly. 230235d5b7c7Smrg 230335d5b7c7Smrg Reviewed-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 230435d5b7c7Smrg 230535d5b7c7Smrgcommit ceeacb455cd058492a493aac954deab8455804b5 230635d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 230735d5b7c7SmrgDate: Fri May 18 12:13:23 2018 +0200 230835d5b7c7Smrg 230935d5b7c7Smrg Call drmmode_do_crtc_dpms from drmmode_crtc_dpms as well 231035d5b7c7Smrg 231135d5b7c7Smrg Leo pointed out that drmmode_do_crtc_dpms wasn't getting called when 231235d5b7c7Smrg turning off an output with 231335d5b7c7Smrg 231435d5b7c7Smrg xrandr --output <output> --off 231535d5b7c7Smrg 231635d5b7c7Smrg This meant that the vblank sequence number and timestamp wouldn't be 231735d5b7c7Smrg saved before turning off the CRTC in this case. 231835d5b7c7Smrg 231935d5b7c7Smrg Reported-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 232035d5b7c7Smrg Reviewed-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> 232135d5b7c7Smrg 232235d5b7c7Smrgcommit e8e688f3852fb06b0c34ed5bce47c9493bcd1613 232335d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 232435d5b7c7SmrgDate: Wed May 16 16:49:20 2018 +0200 232535d5b7c7Smrg 232635d5b7c7Smrg Replace 'foo == NULL' with '!foo' 232735d5b7c7Smrg 232835d5b7c7Smrg Shorter and sweeter. :) 232935d5b7c7Smrg 233035d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 233135d5b7c7Smrg 233235d5b7c7Smrgcommit 103bd6f44cc5f1a6cd6cc9a5cb34d0419c4cece9 233335d5b7c7SmrgAuthor: Slava Grigorev <slava.grigorev@amd.com> 233435d5b7c7SmrgDate: Fri Apr 27 13:04:36 2018 -0400 233535d5b7c7Smrg 233635d5b7c7Smrg Include xf86platformBus.h unconditionally 233735d5b7c7Smrg 233835d5b7c7Smrg Compilation failed with XSERVER_PLATFORM_BUS undefined: 233935d5b7c7Smrg 234035d5b7c7Smrg ../../src/amdgpu_probe.c: In function ‘amdgpu_kernel_open_fd’: 234135d5b7c7Smrg ../../src/amdgpu_probe.c:133:21: error: dereferencing pointer to incomplete type ‘struct xf86_platform_device’ 234235d5b7c7Smrg dev = platform_dev->pdev; 234335d5b7c7Smrg ^~ 234435d5b7c7Smrg 234535d5b7c7Smrg Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> 234635d5b7c7Smrg 234735d5b7c7Smrg [ Michel Dänzer: 234835d5b7c7Smrg * Fixed remaining preprocessor guards to work with xserver 1.13 234935d5b7c7Smrg * Touched up commit log ] 235035d5b7c7Smrg 235135d5b7c7Smrgcommit 04947b83cce3a7782e59dece2c7797cc396c1e05 235235d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 235335d5b7c7SmrgDate: Thu Apr 26 17:58:08 2018 +0200 235435d5b7c7Smrg 235535d5b7c7Smrg Wait for pending flips in drmmode_output_set_tear_free 235635d5b7c7Smrg 235735d5b7c7Smrg This prevents a nested call to drmHandleEvent, which would hang. 235835d5b7c7Smrg 235935d5b7c7Smrg Fixes hangs when disabling TearFree on a CRTC while a DRI3 client is 236035d5b7c7Smrg page flipping. 236135d5b7c7Smrg 236235d5b7c7Smrg Reviewed-by: Samuel Li <Samuel.Li@amd.com> 236335d5b7c7Smrg 236435d5b7c7Smrgcommit fa30f4601de7a44edfb4a95873bd648946fd4292 236535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 236635d5b7c7SmrgDate: Thu Apr 26 17:55:30 2018 +0200 236735d5b7c7Smrg 236835d5b7c7Smrg Refactor drmmode_output_set_tear_free helper 236935d5b7c7Smrg 237035d5b7c7Smrg Preparation for the following fix, no functional change intended. 237135d5b7c7Smrg 237235d5b7c7Smrg Reviewed-by: Samuel Li <Samuel.Li@amd.com> 237335d5b7c7Smrg 237435d5b7c7Smrgcommit 7db0c8e9d7586cff4312d4b93684d35de3e6376f 237535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 237635d5b7c7SmrgDate: Tue Apr 24 11:56:03 2018 +0200 237735d5b7c7Smrg 237835d5b7c7Smrg Set drmmode_crtc->scanout_id = 0 when TearFree is disabled 237935d5b7c7Smrg 238035d5b7c7Smrg When disabling TearFree, drmmode_crtc->scanout_id could remain as 1, 238135d5b7c7Smrg but drmmode_set_mode_major would destroy drmmode_crtc->scanout[1], so 238235d5b7c7Smrg scanout_do_update() would keep bailing, and the scanout buffer would 238335d5b7c7Smrg stop being updated. 238435d5b7c7Smrg 238535d5b7c7Smrg Fixes freeze after disabling TearFree on a CRTC with active RandR 238635d5b7c7Smrg rotation or other transform. 238735d5b7c7Smrg 238835d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 238935d5b7c7Smrg 239035d5b7c7Smrgcommit 8e544b4a0de6717feb4abf00052d57c5b726b5ce 239135d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 239235d5b7c7SmrgDate: Mon Apr 23 18:52:02 2018 +0200 239335d5b7c7Smrg 239435d5b7c7Smrg Simplify drmmode_handle_transform 239535d5b7c7Smrg 239635d5b7c7Smrg Set crtc->driverIsPerformingTransform for any case we can handle before 239735d5b7c7Smrg calling xf86CrtcRotate. We already clear it afterwards when the latter 239835d5b7c7Smrg clears crtc->transform_in_use. 239935d5b7c7Smrg 240035d5b7c7Smrg This should allow our separate scanout buffer mechanism to be used in 240135d5b7c7Smrg more cases. 240235d5b7c7Smrg 240335d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 240435d5b7c7Smrg 240535d5b7c7Smrgcommit 463477661c88cab3a87746499e5838c5b9f9a13b 240635d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 240735d5b7c7SmrgDate: Mon Apr 23 18:44:06 2018 +0200 240835d5b7c7Smrg 240935d5b7c7Smrg Don't call scanout_flip/update with a legacy RandR scanout buffer 241035d5b7c7Smrg 241135d5b7c7Smrg It means we are not using our own scanout buffers. 241235d5b7c7Smrg 241335d5b7c7Smrg Fixes crash when TearFree is supposed to be enabled, but 241435d5b7c7Smrg drmmode_handle_transform doesn't set crtc->driverIsPerformingTransform. 241535d5b7c7Smrg 241635d5b7c7Smrg Bugzilla: https://bugs.freedesktop.org/105736 241735d5b7c7Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 241835d5b7c7Smrg 241935d5b7c7Smrgcommit 72c3e9c7308fbcdf85708b72f9be14a5f2f8e7b5 242035d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 242135d5b7c7SmrgDate: Thu Mar 8 19:07:21 2018 +0100 242235d5b7c7Smrg 242335d5b7c7Smrg Simplify drmmode_crtc_scanout_update 242435d5b7c7Smrg 242535d5b7c7Smrg Use our own BoxRec for the extents, and RegionEmpty for clearing the 242635d5b7c7Smrg scanout damage region. 242735d5b7c7Smrg 242835d5b7c7Smrgcommit 4dcda0b48d62944c841cd9540f4ad4c7ac8dee47 242935d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 243035d5b7c7SmrgDate: Fri Apr 20 17:34:55 2018 +0200 243135d5b7c7Smrg 243235d5b7c7Smrg Update RandR CRTC state if set_mode_major fails in set_desired_modes 243335d5b7c7Smrg 243435d5b7c7Smrg Without this, RandR would report the CRTC and its outputs as enabled, 243535d5b7c7Smrg even though they were actually off due to the failure. 243635d5b7c7Smrg 243735d5b7c7Smrgcommit 36d01989cd842588f12fdae5b2cba5fdcf9c91dd 243835d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 243935d5b7c7SmrgDate: Wed Apr 18 11:17:02 2018 +0200 244035d5b7c7Smrg 244135d5b7c7Smrg Abort scanout_update_pending event when possible 244235d5b7c7Smrg 244335d5b7c7Smrg We don't need to wait for a non-TearFree scanout update before scanning 244435d5b7c7Smrg out from the screen pixmap or before flipping, as the scanout update 244535d5b7c7Smrg won't be visible anyway. Instead, just abort it. 244635d5b7c7Smrg 244735d5b7c7Smrgcommit 04a5c5f7cfacad8d9ccffe81e388cc3da2036cb5 244835d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 244935d5b7c7SmrgDate: Wed Apr 18 11:03:14 2018 +0200 245035d5b7c7Smrg 245135d5b7c7Smrg Track DRM event queue sequence number in scanout_update_pending 245235d5b7c7Smrg 245335d5b7c7Smrg Preparation for next change, no behaviour change intended. 245435d5b7c7Smrg 245535d5b7c7Smrgcommit 8fcc3a9b43d3907052a83a96e5a2423afab5ad3f 245635d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 245735d5b7c7SmrgDate: Wed Apr 18 11:18:59 2018 +0200 245835d5b7c7Smrg 245935d5b7c7Smrg Ignore AMDGPU_DRM_QUEUE_ERROR (0) in amdgpu_drm_abort_entry 246035d5b7c7Smrg 246135d5b7c7Smrg This allows a following change to be slightly simpler. 246235d5b7c7Smrg 246335d5b7c7Smrgcommit 720a61000aeb139005bd8125908cec66a6e69554 246435d5b7c7SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 246535d5b7c7SmrgDate: Wed Apr 4 15:29:51 2018 +0100 246635d5b7c7Smrg 246735d5b7c7Smrg Remove set but unused amdgpu_dri2::pKernelDRMVersion 246835d5b7c7Smrg 246935d5b7c7Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 247035d5b7c7Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 247135d5b7c7Smrg 247235d5b7c7Smrgcommit 7fb8b49895e225b3908c8bd186539de23afe91d1 247335d5b7c7SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 247435d5b7c7SmrgDate: Wed Apr 4 15:29:50 2018 +0100 247535d5b7c7Smrg 247635d5b7c7Smrg Do not export the DriverRec AMDGPU 247735d5b7c7Smrg 247835d5b7c7Smrg Unused externally and should not be exported. 247935d5b7c7Smrg 248035d5b7c7Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 248135d5b7c7Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 248235d5b7c7Smrg 248335d5b7c7Smrgcommit 00c128b45fc196c3a3a788ddb4453e7521be5860 248435d5b7c7SmrgAuthor: Emil Velikov <emil.velikov@collabora.com> 248535d5b7c7SmrgDate: Wed Apr 4 15:29:36 2018 +0100 248635d5b7c7Smrg 248735d5b7c7Smrg Move amdgpu_bus_id/amgpu_kernel_mode within amdgpu_kernel_open_fd 248835d5b7c7Smrg 248935d5b7c7Smrg Small step towards unifying the code paths and removing a handful of 249035d5b7c7Smrg duplication. 249135d5b7c7Smrg 249235d5b7c7Smrg Signed-off-by: Emil Velikov <emil.velikov@collabora.com> 249335d5b7c7Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 249435d5b7c7Smrg 249535d5b7c7Smrgcommit 9f6a8905611b5b1d8fcd31bebbc9af7ca1355cc3 249635d5b7c7SmrgAuthor: Jim Qu <Jim.Qu@amd.com> 249735d5b7c7SmrgDate: Tue Apr 17 19:11:16 2018 +0800 249835d5b7c7Smrg 249935d5b7c7Smrg Wait for pending scanout update before calling drmmode_crtc_scanout_free 250035d5b7c7Smrg 250135d5b7c7Smrg There is a case that when set screen from reverse to normal, the old 250235d5b7c7Smrg scanout damage is freed in modesetting before scanout update handler, 250335d5b7c7Smrg so it causes segment fault issue. 250435d5b7c7Smrg 250535d5b7c7Smrg Signed-off-by: Jim Qu <Jim.Qu@amd.com> 250635d5b7c7Smrg 250735d5b7c7Smrg [ Michel Dänzer: Only call drmmode_crtc_wait_pending_event before 250835d5b7c7Smrg drmmode_crtc_scanout_free is actually called, slightly tweak commit 250935d5b7c7Smrg message ] 251035d5b7c7Smrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 251135d5b7c7Smrg 251235d5b7c7Smrgcommit c6f1559eba551a5a3bf374c7e7e875928f3b138d 251335d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 251435d5b7c7SmrgDate: Wed Apr 18 10:41:46 2018 +0200 251535d5b7c7Smrg 251635d5b7c7Smrg Post-release version bump 251735d5b7c7Smrg 251835d5b7c7Smrgcommit 9f37a44473ded8c669897379acbc750362c15ec6 251935d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 252035d5b7c7SmrgDate: Thu Mar 15 16:34:19 2018 +0100 252135d5b7c7Smrg 252235d5b7c7Smrg Bump version for 18.0.1 release 252335d5b7c7Smrg 252435d5b7c7Smrgcommit 8af989546907ad9fb491d940e1936d3bfc89276b 252535d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 252635d5b7c7SmrgDate: Thu Mar 8 18:48:28 2018 +0100 252735d5b7c7Smrg 252835d5b7c7Smrg Pass extents to amdgpu_scanout_do_update by value 252935d5b7c7Smrg 253035d5b7c7Smrg amdgpu_scanout_extents_intersect could leave the scanout damage region 253135d5b7c7Smrg in an invalid state, triggering debugging checks in pixman: 253235d5b7c7Smrg 253335d5b7c7Smrg *** BUG *** 253435d5b7c7Smrg In pixman_region_append_non_o: The expression r->x1 < r->x2 was false 253535d5b7c7Smrg Set a breakpoint on '_pixman_log_error' to debug 253635d5b7c7Smrg 253735d5b7c7Smrgcommit 29649652a08ece7e07741be161b067a4484455ca 253835d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 253935d5b7c7SmrgDate: Wed Mar 7 17:51:25 2018 +0100 254035d5b7c7Smrg 254135d5b7c7Smrg Wrap the whole miPointerScreenFuncRec, instead of only Set/MoveCursor 254235d5b7c7Smrg 254335d5b7c7Smrg We were clobbering entries in mi's global miSpritePointerFuncs struct, 254435d5b7c7Smrg which cannot work correctly with multiple primary screens. Instead, 254535d5b7c7Smrg assign a pointer to our own wrapper struct to PointPriv->spriteFuncs. 254635d5b7c7Smrg 254735d5b7c7Smrg Fixes crashes with multiple primary screens. 254835d5b7c7Smrg 254935d5b7c7Smrg Fixes: 69e20839bfeb ("Keep track of how many SW cursors are visible on 255035d5b7c7Smrg each screen") 255135d5b7c7Smrg Reported-by: Mario Kleiner <mario.kleiner.de@gmail.com> 255235d5b7c7Smrg 255335d5b7c7Smrgcommit b4a28bdcfa7089e1cf708490ddf048b7df4c7eed 255435d5b7c7SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 255535d5b7c7SmrgDate: Tue Mar 6 17:59:26 2018 +0100 255635d5b7c7Smrg 255735d5b7c7Smrg Only change Set/MoveCursor hooks from what we expect 255835d5b7c7Smrg 255935d5b7c7Smrg Since xf86CursorCloseScreen runs after AMDGPUCloseScreen_KMS, 256035d5b7c7Smrg PointPriv->spriteFuncs doesn't point to the same struct in the latter as 256135d5b7c7Smrg in AMDGPUCursorInit_KMS. So we were restoring info->Set/MoveCursor to 256235d5b7c7Smrg the wrong struct. Then in the next server generation, 256335d5b7c7Smrg info->Set/MoveCursor would end up pointing to 256435d5b7c7Smrg drmmode_sprite_set/move_cursor, resulting in an infinite loop if one of 256535d5b7c7Smrg them was called. 256635d5b7c7Smrg 256735d5b7c7Smrg To avoid this, only change the Set/MoveCursor hooks if their values 256835d5b7c7Smrg match our expectations, otherwise leave them as is. This is kind of a 256935d5b7c7Smrg hack, but the alternative would be invasive and thus risky changes to 257035d5b7c7Smrg the way we're wrapping CloseScreen, and it's not even clear that can 257135d5b7c7Smrg work without changing xserver code. 257235d5b7c7Smrg 257335d5b7c7Smrg Fixes: 69e20839bfeb ("Keep track of how many SW cursors are visible on 257435d5b7c7Smrg each screen") 257535d5b7c7Smrg (Ported from radeon commit 504b8721b17a672caf1ed3eab087027c02458cab) 257635d5b7c7Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 257735d5b7c7Smrg 257824b90cf4Smrgcommit 5cfba7b6221779832be915993765cb128a561087 257924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 258024b90cf4SmrgDate: Fri Mar 2 18:10:40 2018 +0100 258124b90cf4Smrg 258224b90cf4Smrg Bump version for 18.0.0 release 258324b90cf4Smrg 258424b90cf4Smrgcommit 374cb8fef4fdbb648af089ee80803ec78321f1b2 258524b90cf4SmrgAuthor: Keith Packard <keithp@keithp.com> 258624b90cf4SmrgDate: Thu Dec 21 18:54:34 2017 -0800 258724b90cf4Smrg 258824b90cf4Smrg modesetting: Update property values at detect and uevent time 258924b90cf4Smrg 259024b90cf4Smrg We were updating the link-status property when a uevent came in, but 259124b90cf4Smrg we also want to update the non-desktop property, and potentially 259224b90cf4Smrg others as well. We also want to check at detect time in case we don't 259324b90cf4Smrg get a hotplug event. 259424b90cf4Smrg 259524b90cf4Smrg This patch updates every property provided by the kernel, sending 259624b90cf4Smrg changes to DIX so it can track things as well. 259724b90cf4Smrg 259824b90cf4Smrg Signed-off-by: Keith Packard <keithp@keithp.com> 259924b90cf4Smrg 260024b90cf4Smrg (Ported from xserver commit a12485ed846b852ca14d17d1e58c8b0f2399e577, 260124b90cf4Smrg slightly modifying logic to reduce indentation depth) 260224b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 260324b90cf4Smrg 260424b90cf4Smrgcommit 10054b6c3d9a755b30abb43020121b9631fa296d 260524b90cf4SmrgAuthor: Daniel Martin <consume.noise@gmail.com> 260624b90cf4SmrgDate: Mon Nov 20 10:47:41 2017 +0100 260724b90cf4Smrg 260824b90cf4Smrg modesetting: Reset output_id if drmModeGetConnector failed 260924b90cf4Smrg 261024b90cf4Smrg If drmModeGetConnector() fails in drmmode_output_detect(), we have to 261124b90cf4Smrg reset the output_id to -1 too. 261224b90cf4Smrg 261324b90cf4Smrg Yet another spot leading to a potential NULL dereference when handling 261424b90cf4Smrg the mode_output member as output_id was != -1. Though, this case should 261524b90cf4Smrg be very hard to hit. 261624b90cf4Smrg 261724b90cf4Smrg Signed-off-by: Daniel Martin <consume.noise@gmail.com> 261824b90cf4Smrg 261924b90cf4Smrg (Ported from xserver commit 6804875662363764683a86c1614e4cf3cc70a20a) 262024b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 262124b90cf4Smrg 262224b90cf4Smrgcommit fb58e06acd6c6bd59de2dbdadbca27eb1dd0025b 262324b90cf4SmrgAuthor: Daniel Martin <consume.noise@gmail.com> 262424b90cf4SmrgDate: Mon Oct 23 10:31:21 2017 +0200 262524b90cf4Smrg 262624b90cf4Smrg modesetting: Use helper to fetch drmModeProperty(Blob)s 262724b90cf4Smrg 262824b90cf4Smrg Replace the various loops to lookup drmModeProperty(Blob)s by 262924b90cf4Smrg introducing helper functions. 263024b90cf4Smrg 263124b90cf4Smrg Signed-off-by: Daniel Martin <consume.noise@gmail.com> 263224b90cf4Smrg 263324b90cf4Smrg (Ported from xserver commit f44935cdb7321af242ce9f242975f096807b97f7) 263424b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 263524b90cf4Smrg 263624b90cf4Smrgcommit 7854ace03f12207600ec8159ef8b2c5a562c4aee 263724b90cf4SmrgAuthor: Christoph Haag <haagch@frickel.club> 263824b90cf4SmrgDate: Thu Mar 1 15:07:00 2018 +0100 263924b90cf4Smrg 264024b90cf4Smrg fix include order for present.h configure test 264124b90cf4Smrg 264224b90cf4Smrg xorg-server.h defines _XSERVER64 which is used in X.h to choose the 264324b90cf4Smrg correct definition of XID 264424b90cf4Smrg 264524b90cf4Smrg this prevents a failure in the present.h configure test that disables 264624b90cf4Smrg DRI3 on X.Org 1.20 264724b90cf4Smrg 264824b90cf4Smrg Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> 264924b90cf4Smrg 265024b90cf4Smrgcommit e3aae7a24296f640c0153d1459f3e0820485468a 265124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 265224b90cf4SmrgDate: Fri Feb 16 17:15:24 2018 +0100 265324b90cf4Smrg 265424b90cf4Smrg Disable all unused CRTCs before setting desired modes 265524b90cf4Smrg 265624b90cf4Smrg This might avoid modeset failures in some cases where a CRTC which isn't 265724b90cf4Smrg used by Xorg was enabled before. 265824b90cf4Smrg 265924b90cf4Smrgcommit f5ac5f385f41d1547cfd7ccc8bb35a537a8fffeb 266024b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 266124b90cf4SmrgDate: Thu Feb 15 18:37:09 2018 +0100 266224b90cf4Smrg 266324b90cf4Smrg Don't bail from drmmode_set_desired_modes immediately 266424b90cf4Smrg 266524b90cf4Smrg If we fail to find or set the mode for a CRTC, keep trying for the 266624b90cf4Smrg remaining CRTCs, and only return FALSE if we failed for all CRTCs that 266724b90cf4Smrg should be on. 266824b90cf4Smrg 266924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 267024b90cf4Smrg Acked-by: Harry Wentland <harry.wentland@amd.com> 267124b90cf4Smrg 267224b90cf4Smrgcommit 37c7260bdef3a53b0f0295a531f33938e9aad8cf 267324b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 267424b90cf4SmrgDate: Wed Feb 14 19:06:33 2018 +0100 267524b90cf4Smrg 267624b90cf4Smrg If glamor is too old for depth 30, fall back to ShadowFB 267724b90cf4Smrg 267824b90cf4Smrg Instead of not starting up at all. 267924b90cf4Smrg 268024b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 268124b90cf4Smrg 268224b90cf4Smrgcommit 63b0c73a99fdf0eb7550a88df3a0052ce784e758 268324b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 268424b90cf4SmrgDate: Wed Feb 14 18:50:18 2018 +0100 268524b90cf4Smrg 268624b90cf4Smrg Revert "Guard against pAMDGPUEnt == NULL in AMDGPUFreeRec" 268724b90cf4Smrg 268824b90cf4Smrg This reverts commit a23d1ff700d486138c624c2023d8d251c73709af. 268924b90cf4Smrg 269024b90cf4Smrg pAMDGPUEnt cannot be NULL anymore here now that we no longer call 269124b90cf4Smrg AMDGPUFreeRec directly from AMDGPUPreInit_KMS. 269224b90cf4Smrg 269324b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 269424b90cf4Smrg 269524b90cf4Smrgcommit 103b7285845b786929fb509083c57e074c48f9be 269624b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 269724b90cf4SmrgDate: Tue Feb 13 19:11:00 2018 +0100 269824b90cf4Smrg 269924b90cf4Smrg Don't call AMDGPUFreeRec from AMDGPUPreInit_KMS 270024b90cf4Smrg 270124b90cf4Smrg If the latter fails, Xorg will call AMDGPUFreeScreen_KMS, which calls 270224b90cf4Smrg the former. 270324b90cf4Smrg 270424b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 270524b90cf4Smrg 270624b90cf4Smrgcommit a23d1ff700d486138c624c2023d8d251c73709af 270724b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 270824b90cf4SmrgDate: Tue Feb 13 18:57:48 2018 +0100 270924b90cf4Smrg 271024b90cf4Smrg Guard against pAMDGPUEnt == NULL in AMDGPUFreeRec 271124b90cf4Smrg 271224b90cf4Smrg This can happen if PreInit fails early. 271324b90cf4Smrg 271424b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 271524b90cf4Smrg 271624b90cf4Smrgcommit b3095710b7c240ddefce794033a77033806f639d 271724b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 271824b90cf4SmrgDate: Tue Feb 13 18:26:06 2018 +0100 271924b90cf4Smrg 272024b90cf4Smrg Always use screen depth/bpp for KMS framebuffers 272124b90cf4Smrg 272224b90cf4Smrg DRI clients can use depth 32 pixmaps while the screen is depth 24, in 272324b90cf4Smrg which case page flipping would fail. 272424b90cf4Smrg 272524b90cf4Smrg Reported-by: Mario Kleiner <mario.kleiner.de@gmail.com> 272624b90cf4Smrg (Ported from radeon commit 733f606dd6ca8350e6e7f0858bfff5454ddc98ed) 272724b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 272824b90cf4Smrg 272924b90cf4Smrgcommit 6aee5770fb913713bb1b9a1af8f0d0892a66f21a 273024b90cf4SmrgAuthor: Hawking Zhang <Hawking.Zhang@amd.com> 273124b90cf4SmrgDate: Sat Jul 16 00:09:21 2016 +0800 273224b90cf4Smrg 273324b90cf4Smrg Add 30bit RGB color format support 273424b90cf4Smrg 273524b90cf4Smrg Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> 273624b90cf4Smrg 273724b90cf4Smrg [ Michel Dänzer: 273824b90cf4Smrg * Require Xorg >= 1.19.99.1 for depth 30, otherwise it can't work with glamor 273924b90cf4Smrg * Update manpage, per radeon commit 274024b90cf4Smrg 574bfab4bf1fcd95163a8f33cea2889189429d30 ] 274124b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 274224b90cf4Smrg 274324b90cf4Smrgcommit ec397f7d3bfc89a5d8b8429c96e1b9572f6ee47d 274424b90cf4SmrgAuthor: Qiang Yu <Qiang.Yu@amd.com> 274524b90cf4SmrgDate: Thu Nov 2 14:00:23 2017 +0800 274624b90cf4Smrg 274724b90cf4Smrg Disable gamma set when deep color 274824b90cf4Smrg 274924b90cf4Smrg gamma set is disabled in kernel driver when deep color. 275024b90cf4Smrg Enable it will confuse the user. 275124b90cf4Smrg 275224b90cf4Smrg Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> 275324b90cf4Smrg 275424b90cf4Smrg [ Michel Dänzer: Align drmmode_pre_init change with radeon commit 275524b90cf4Smrg 1f1d4b1fa7d4b22dd8553f7e71251bf17ca7a7b1 ] 275624b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 275724b90cf4Smrg 275824b90cf4Smrgcommit c849081e24377a81afc1a05f2a5634b1e60c67db 275924b90cf4SmrgAuthor: Mario Kleiner <mario.kleiner.de@gmail.com> 276024b90cf4SmrgDate: Mon Feb 12 18:18:46 2018 +0100 276124b90cf4Smrg 276224b90cf4Smrg Define per x-screen individual drmmode_crtc_funcs 276324b90cf4Smrg 276424b90cf4Smrg This allows to en-/disable some functions depending on individual screen 276524b90cf4Smrg settings. 276624b90cf4Smrg 276724b90cf4Smrg Prep work for more efficient depth 30 support. 276824b90cf4Smrg 276924b90cf4Smrg Suggested-by: Michel Dänzer <michel.daenzer@amd.com> 277024b90cf4Smrg Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> 277124b90cf4Smrg (Ported from radeon commit 21f6753462464acfd3c452393328c977a375ce26) 277224b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 277324b90cf4Smrg 277424b90cf4Smrgcommit 348023cea43e0474352df0c2aa6345eb0b25c2f7 277524b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 277624b90cf4SmrgDate: Mon Jan 22 18:23:18 2018 +0100 277724b90cf4Smrg 277824b90cf4Smrg Fix linear check in amdgpu_glamor_share_pixmap_backing 277924b90cf4Smrg 278024b90cf4Smrg We were incorrectly interpreting the tiling information. 278124b90cf4Smrg 278224b90cf4Smrg Reported-by: Marek Olšák <marek.olsak@amd.com> 278324b90cf4Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 278424b90cf4Smrg Reviewed-by: Marek Olšák <marek.olsak@amd.com> 278524b90cf4Smrg 278624b90cf4Smrgcommit 69e20839bfeb3ee0b0a732d72de0a32d6c5435fc 278724b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 278824b90cf4SmrgDate: Fri Dec 22 18:33:58 2017 +0100 278924b90cf4Smrg 279024b90cf4Smrg Keep track of how many SW cursors are visible on each screen 279124b90cf4Smrg 279224b90cf4Smrg And use this to determine when we cannot use page flipping for DRI 279324b90cf4Smrg clients. We previously did this based on whether the HW cursor cannot 279424b90cf4Smrg be used on at least one CRTC, which had at least two issues: 279524b90cf4Smrg 279624b90cf4Smrg * Even while the HW cursor cannot be used, no SW cursor may actually be 279724b90cf4Smrg visible (e.g. because all cursors are disabled), in which case we can 279824b90cf4Smrg use page flipping for DRI clients anyway 279924b90cf4Smrg * Even while the HW cursor can be used, there may be SW cursors visible 280024b90cf4Smrg from non-core pointer devices, in which case we cannot use page 280124b90cf4Smrg flipping for DRI clients anyway 280224b90cf4Smrg 280324b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 280424b90cf4Smrg 280524b90cf4Smrgcommit dfccaa7043ccb157a1f8be7313123792bb7e7001 280624b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 280724b90cf4SmrgDate: Fri Dec 22 17:09:07 2017 +0100 280824b90cf4Smrg 280924b90cf4Smrg Move cursor related ScreenInit calls into AMDGPUCursorInit_KMS 281024b90cf4Smrg 281124b90cf4Smrg And bail if xf86_cursors_init fails. 281224b90cf4Smrg 281324b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 281424b90cf4Smrg 281524b90cf4Smrgcommit 1d65ac395971571094df21ca0408d5972c6b56ec 281624b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 281724b90cf4SmrgDate: Wed Nov 15 18:22:27 2017 +0100 281824b90cf4Smrg 281924b90cf4Smrg Add amdgpu_dirty_src_drawable helper 282024b90cf4Smrg 282124b90cf4Smrg Allows tidying up amdgpu_dirty_src_equals and redisplay_dirty slightly. 282224b90cf4Smrg 282324b90cf4Smrg v2: 282424b90cf4Smrg * Different approach for amdgpu_dirty_master 282524b90cf4Smrg 282624b90cf4Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 282724b90cf4Smrg 282824b90cf4Smrgcommit 3a4f7422913093ed9e26b73ecd7f9e773478cb1e 282924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 283024b90cf4SmrgDate: Wed Nov 8 18:44:25 2017 +0100 283124b90cf4Smrg 283224b90cf4Smrg Use correct ScrnInfoPtr in redisplay_dirty 283324b90cf4Smrg 283424b90cf4Smrg We used the destination pixmap's screen for flushing glamor. But when 283524b90cf4Smrg we are the master screen, the destination pixmap is from the slave 283624b90cf4Smrg screen. 283724b90cf4Smrg 283824b90cf4Smrg Fixes crash when the slave screen isn't using glamor as well. 283924b90cf4Smrg 284024b90cf4Smrg Bugzilla: https://bugs.freedesktop.org/103613 284124b90cf4Smrg Fixes: e15b23663cd1 ("Adapt to PixmapDirtyUpdateRec::src being a 284224b90cf4Smrg DrawablePtr") 284324b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 284424b90cf4Smrg 284524b90cf4Smrgcommit 875339c1064f666a2391b4a5a495eddda9407ab6 284624b90cf4SmrgAuthor: Daniel Martin <consume.noise@gmail.com> 284724b90cf4SmrgDate: Fri Oct 20 10:05:35 2017 +0200 284824b90cf4Smrg 284924b90cf4Smrg modesetting: Check crtc before searching link-status property 285024b90cf4Smrg 285124b90cf4Smrg No need to lookup the link-status property if we don't have a crtc. 285224b90cf4Smrg 285324b90cf4Smrg Signed-off-by: Daniel Martin <consume.noise@gmail.com> 285424b90cf4Smrg (Ported from xserver commit 8d7f7e24261e68459e6f0a865e243473f65fe7ad) 285524b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 285624b90cf4Smrg 285724b90cf4Smrgcommit 91cd0ceab2cabba75e3552d0fbfcfc55f6d132ee 285824b90cf4SmrgAuthor: Keith Packard <keithp@keithp.com> 285924b90cf4SmrgDate: Mon Sep 25 16:18:22 2017 -0700 286024b90cf4Smrg 286124b90cf4Smrg modesetting: Skip no-longer-present connectors when resetting BAD links 286224b90cf4Smrg 286324b90cf4Smrg Outputs may have NULL mode_output (connector) pointers if the 286424b90cf4Smrg connector disappears while the server is running. Skip these when 286524b90cf4Smrg resetting outputs with BAD link status. 286624b90cf4Smrg 286724b90cf4Smrg (Ported from xserver commit 37f4e7651a2fd51efa613a08a1e705553be33e76) 286824b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 286924b90cf4Smrg 287024b90cf4Smrgcommit f6b39bcd45cb06976ba8a3600df77fc471c63995 287124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 287224b90cf4SmrgDate: Thu Oct 19 18:02:05 2017 +0200 287324b90cf4Smrg 287424b90cf4Smrg Always call drmModeFreeProperty after drmModeGetProperty 287524b90cf4Smrg 287624b90cf4Smrg We were not doing so in all cases, leaking memory allocated by the 287724b90cf4Smrg latter. 287824b90cf4Smrg 287924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 288024b90cf4Smrg 288124b90cf4Smrgcommit 84aad09f18fed6b52b0c073f0bbd675a6de07807 288224b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 288324b90cf4SmrgDate: Thu Oct 19 17:54:13 2017 +0200 288424b90cf4Smrg 288524b90cf4Smrg Call TimerFree for timer created in LeaveVT 288624b90cf4Smrg 288724b90cf4Smrg We were leaking the memory allocated by TimerSet. 288824b90cf4Smrg 288924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 289024b90cf4Smrg 289124b90cf4Smrgcommit cfccf4c4e7e5c73fe4040fabeb1b43283cf29b33 289224b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 289324b90cf4SmrgDate: Thu Oct 19 17:41:44 2017 +0200 289424b90cf4Smrg 289524b90cf4Smrg Free memory returned by xf86GetEntityInfo 289624b90cf4Smrg 289724b90cf4Smrg We were leaking it. 289824b90cf4Smrg 289924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 290024b90cf4Smrg 290124b90cf4Smrgcommit 9d84934309e4ccd9a43c73d958b8ff10ef2fc990 290224b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 290324b90cf4SmrgDate: Thu Oct 19 17:28:53 2017 +0200 290424b90cf4Smrg 290524b90cf4Smrg Free pAMDGPUEnt memory in AMDGPUFreeRec 290624b90cf4Smrg 290724b90cf4Smrg We were freeing it earlier but then still trying to access it in 290824b90cf4Smrg AMDGPUFreeRec. 290924b90cf4Smrg 291024b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 291124b90cf4Smrg 291224b90cf4Smrgcommit b67a2b62b20c17db7471f5bbea591ab55806cb29 291324b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 291424b90cf4SmrgDate: Thu Oct 19 16:46:35 2017 +0200 291524b90cf4Smrg 291624b90cf4Smrg Bail if there's a problem with ShadowFB 291724b90cf4Smrg 291824b90cf4Smrg If we hit a problem while setting up ShadowFB, just carrying on trying 291924b90cf4Smrg to set up HW acceleration instead is unlikely to work. 292024b90cf4Smrg 292124b90cf4Smrg (Ported from radeon commit 7d435354099119234d443b07e2df1c7b9f97cf3c) 292224b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 292324b90cf4Smrg 292424b90cf4Smrgcommit 55396cc45c9aae3b1985ced1044b6b93064667c3 292524b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 292624b90cf4SmrgDate: Thu Oct 19 16:20:03 2017 +0200 292724b90cf4Smrg 292824b90cf4Smrg Fix VT switching with ShadowFB 292924b90cf4Smrg 293024b90cf4Smrg We were trying to call acceleration specific functions from LeaveVT. 293124b90cf4Smrg Instead, memset the scanout buffer to all 0 in LeaveVT and allocate a 293224b90cf4Smrg new one in EnterVT. 293324b90cf4Smrg 293424b90cf4Smrg Bugzilla: https://bugs.freedesktop.org/102948 293524b90cf4Smrg Fixes: c16ff42f927d ("Make all active CRTCs scan out an all-black 293624b90cf4Smrg framebuffer in LeaveVT") 293724b90cf4Smrg (Ported from radeon commit 34da04daec82077571558ac3fe1ec0c1203a01ad) 293824b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 293924b90cf4Smrg 294024b90cf4Smrgcommit 2f72be038d22c54620e436af30121dd89f79a003 294124b90cf4SmrgAuthor: Darren Salt <devspam@moreofthesa.me.uk> 294224b90cf4SmrgDate: Wed Sep 13 03:22:19 2017 +0100 294324b90cf4Smrg 294424b90cf4Smrg Clarify when TearFree is automatically enabled. 294524b90cf4Smrg 294624b90cf4Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 294724b90cf4Smrg 294824b90cf4Smrgcommit 2ce59dfa1c57655137fcc7ccdf15a341e51383ff 294924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 295024b90cf4SmrgDate: Thu Oct 5 11:15:34 2017 +0200 295124b90cf4Smrg 295224b90cf4Smrg Post-release version bump 295324b90cf4Smrg 295424b90cf4Smrgcommit cf1767a9a58a3ec95622a7b8ca661113e2148da9 295524b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 295624b90cf4SmrgDate: Fri Sep 8 16:19:48 2017 +0900 295724b90cf4Smrg 295824b90cf4Smrg Bump version for 1.4.0 release 295924b90cf4Smrg 296024b90cf4Smrgcommit 114de91e3548cd30b709b19f1447f597e71175e0 296124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 296224b90cf4SmrgDate: Thu Aug 31 17:59:08 2017 +0900 296324b90cf4Smrg 296424b90cf4Smrg Require xserver >= 1.13 296524b90cf4Smrg 296624b90cf4Smrg xserver 1.13.0 was released on September 6th, 2012, almost 5 years ago. 296724b90cf4Smrg 296824b90cf4Smrg This allows cleaning up a bunch of backwards compatibility code. 296924b90cf4Smrg 297024b90cf4Smrg (Ported from radeon commit 5cdd334b3402c2431deb3a87a8d04ef590da53ee) 297124b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 297224b90cf4Smrg 297324b90cf4Smrgcommit 456e5841233a8a79c23ad13649bbdaf8428b50f3 297424b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 297524b90cf4SmrgDate: Wed Aug 30 17:17:49 2017 +0900 297624b90cf4Smrg 297724b90cf4Smrg Use a timer for unreferencing the all-black FB 297824b90cf4Smrg 297924b90cf4Smrg The timer fires 1 second after LeaveVT. This gives the next DRM master 298024b90cf4Smrg enough time to set up scanout of its own buffers. 298124b90cf4Smrg 298224b90cf4Smrg Fixes prolonged intermittent black screen when switching from Xorg to 298324b90cf4Smrg e.g. the GDM Wayland mode login VT. 298424b90cf4Smrg 298524b90cf4Smrg Fixes: c16ff42f927d ("Make all active CRTCs scan out an all-black 298624b90cf4Smrg framebuffer in LeaveVT") 298724b90cf4Smrg (Ported from radeon commit 9d9c565c84601f4c6c73ad769f86491088683f7a) 298824b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 298924b90cf4Smrg 299024b90cf4Smrgcommit 639076efb06cdf13a211a8df1acb00c3908992b9 299124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 299224b90cf4SmrgDate: Tue Aug 29 17:24:18 2017 +0900 299324b90cf4Smrg 299424b90cf4Smrg Remove drmmode_scanout_free 299524b90cf4Smrg 299624b90cf4Smrg Not used anymore. 299724b90cf4Smrg 299824b90cf4Smrg (Cherry picked from radeon commit e4a3df19d588a4310fcb889ef34e205d0e92e4d7) 299924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 300024b90cf4Smrg 300124b90cf4Smrgcommit c16ff42f927df805619a5255bc383841474daff8 300224b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 300324b90cf4SmrgDate: Tue Aug 29 17:06:58 2017 +0900 300424b90cf4Smrg 300524b90cf4Smrg Make all active CRTCs scan out an all-black framebuffer in LeaveVT 300624b90cf4Smrg 300724b90cf4Smrg And destroy all other FBs. This is so that other DRM masters can only 300824b90cf4Smrg get access to this all-black FB, not to any other FB we created, while 300924b90cf4Smrg we're switched away and not DRM master. 301024b90cf4Smrg 301124b90cf4Smrg Fixes: b09fde0d81e0 ("Use reference counting for tracking KMS 301224b90cf4Smrg framebuffer lifetimes") 301324b90cf4Smrg (Ported from radeon commit 06a465484101f21e99d3a0a62fb03440bcaff93e) 301424b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 301524b90cf4Smrg 301624b90cf4Smrgcommit 19672625df0531c12acc05999ea09ea763e5db59 301724b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 301824b90cf4SmrgDate: Tue Aug 29 17:05:19 2017 +0900 301924b90cf4Smrg 302024b90cf4Smrg Create amdgpu_master_screen helper 302124b90cf4Smrg 302224b90cf4Smrg Preparatory, no functional change intended yet. 302324b90cf4Smrg 302424b90cf4Smrg (Ported from radeon commit 7f0cd68d1b0c132e32ae736371bce3e12ed33c7a) 302524b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 302624b90cf4Smrg 302724b90cf4Smrgcommit 6b376c8d73b20c92755527edb0527a233886e4eb 302824b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 302924b90cf4SmrgDate: Tue Aug 29 16:56:56 2017 +0900 303024b90cf4Smrg 303124b90cf4Smrg Create amdgpu_pixmap_get_fb_ptr helper 303224b90cf4Smrg 303324b90cf4Smrg Preparatory, no functional change intended yet. 303424b90cf4Smrg 303524b90cf4Smrg Also inline amdgpu_pixmap_create_fb into amdgpu_pixmap_get_fb, since 303624b90cf4Smrg there's only one call-site. 303724b90cf4Smrg 303824b90cf4Smrg (Ported from radeon commit 20f6b56fdb74d88086e8e094013fedbb14e50a24) 303924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 304024b90cf4Smrg 304124b90cf4Smrgcommit 5af396253f6a03fa3f8f92e81da231dd581b50c9 304224b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 304324b90cf4SmrgDate: Tue Aug 29 16:54:10 2017 +0900 304424b90cf4Smrg 304524b90cf4Smrg Create drmmode_set_mode helper 304624b90cf4Smrg 304724b90cf4Smrg Preparatory, no functional change intended yet. 304824b90cf4Smrg 304924b90cf4Smrg (Ported from radeon commit 4bc992c31059eb50e22df4ebf5b92d08411f41ef) 305024b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 305124b90cf4Smrg 305224b90cf4Smrgcommit 1afd4a526c97e77ec882988e35d4977880b9d16c 305324b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 305424b90cf4SmrgDate: Tue Aug 29 16:46:33 2017 +0900 305524b90cf4Smrg 305624b90cf4Smrg Create amdgpu_pixmap_clear helper 305724b90cf4Smrg 305824b90cf4Smrg Preparatory, no functional change intended yet. 305924b90cf4Smrg 306024b90cf4Smrg (Ported from radeon commit 3f6210ca2c8ef60d59efc8139151d3b9838bb875) 306124b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 306224b90cf4Smrg 306324b90cf4Smrgcommit 0de05767adb79d417284dae83e9a77857633fd80 306424b90cf4SmrgAuthor: Martin Peres <martin.peres@linux.intel.com> 306524b90cf4SmrgDate: Tue Aug 22 18:43:24 2017 +0900 306624b90cf4Smrg 306724b90cf4Smrg modesetting: re-set the crtc's mode when link-status goes BAD 306824b90cf4Smrg 306924b90cf4Smrg Despite all the careful planning of the kernel, a link may become 307024b90cf4Smrg insufficient to handle the currently-set mode. At this point, the 307124b90cf4Smrg kernel should mark this particular configuration as being broken 307224b90cf4Smrg and potentially prune the mode before setting the offending connector's 307324b90cf4Smrg link-status to BAD and send the userspace a hotplug event. This may 307424b90cf4Smrg happen right after a modeset or later on. 307524b90cf4Smrg 307624b90cf4Smrg Upon receiving a hot-plug event, we iterate through the connectors to 307724b90cf4Smrg re-apply the currently-set mode on all the connectors that have a 307824b90cf4Smrg link-status property set to BAD. The kernel may be able to get the 307924b90cf4Smrg link to work by dropping to using a lower link bpp (with the same 308024b90cf4Smrg display bpp). However, the modeset may fail if the kernel has pruned 308124b90cf4Smrg the mode, so to make users aware of this problem a warning is outputed 308224b90cf4Smrg in the logs to warn about having a potentially-black display. 308324b90cf4Smrg 308424b90cf4Smrg This patch does not modify the current behaviour of always propagating 308524b90cf4Smrg the events to the randr clients. This allows desktop environments to 308624b90cf4Smrg re-probe the connectors and select a new resolution based on the new 308724b90cf4Smrg (currated) mode list if a mode disapeared. This behaviour is expected in 308824b90cf4Smrg order to pass the Display Port compliance tests. 308924b90cf4Smrg 309024b90cf4Smrg (Ported from xserver commit bcee1b76aa0db8525b491485e90b8740763d7de6) 309124b90cf4Smrg 309224b90cf4Smrg [ Michel: Bump libdrm dependency to >= 2.4.78 for 309324b90cf4Smrg DRM_MODE_LINK_STATUS_BAD ] 309424b90cf4Smrg (Ported from radeon commit 0472a605e0ec8fec1892bbc3a84698b7ef9c5296) 309524b90cf4Smrg Acked-by: Harry Wentland <harry.wentland@amd.com> 309624b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 309724b90cf4Smrg 309824b90cf4Smrgcommit a2ee5c36c7d4fdcd067fdc1ef424be474f1ad2cb 309924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 310024b90cf4SmrgDate: Fri Aug 18 17:24:45 2017 +0900 310124b90cf4Smrg 310224b90cf4Smrg Make amdgpu_scanout_do_update take a PixmapPtr instead of a DrawablePtr 310324b90cf4Smrg 310424b90cf4Smrg All callers were already passing in a pixmap. 310524b90cf4Smrg 310624b90cf4Smrg This allows simplifying the rotated scanout case slightly. 310724b90cf4Smrg 310824b90cf4Smrg (Ported from radeon commit d822a0f47070374ad0c1a97b559bae27724dc52a) 310924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 311024b90cf4Smrg 311124b90cf4Smrgcommit 828fb44cf953f78bd65d8f391bdabe2b1b3d53ae 311224b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 311324b90cf4SmrgDate: Fri Aug 18 17:22:12 2017 +0900 311424b90cf4Smrg 311524b90cf4Smrg Use xorg_list_append for the DRM event list 311624b90cf4Smrg 311724b90cf4Smrg We were adding entries at the start of the list, i.e. the list was 311824b90cf4Smrg ordered from most recently added to least recently added. However, the 311924b90cf4Smrg corresponding DRM events are generally expected to arrive in the same 312024b90cf4Smrg order as they are queued, which means that amdgpu_drm_queue_alloc would 312124b90cf4Smrg generally have to traverse the whole list to find the entry 312224b90cf4Smrg corresponding to an arrived event. Fix this by adding entries at the end 312324b90cf4Smrg of the list. 312424b90cf4Smrg 312524b90cf4Smrg (Ported from radeon commit 3e24770b1b472fc15df56d06f5f04778c9db63dd) 312624b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 312724b90cf4Smrg 312824b90cf4Smrgcommit 22740f86d028cdd0f556543df7444516a86f923b 312924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 313024b90cf4SmrgDate: Fri Aug 18 17:15:54 2017 +0900 313124b90cf4Smrg 313224b90cf4Smrg Consolidate amdgpu_scanout_flip_abort/handler helpers 313324b90cf4Smrg 313424b90cf4Smrg While at it, make them use crtc->driver_private. 313524b90cf4Smrg 313624b90cf4Smrg (Ported from radeon commit 36ce7920136c0d723c9397a84e7dd5926a9c7943) 313724b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 313824b90cf4Smrg 313924b90cf4Smrgcommit 2692508ae8920ce62f488a9384444c1645964913 314024b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 314124b90cf4SmrgDate: Fri Aug 18 17:12:15 2017 +0900 314224b90cf4Smrg 314324b90cf4Smrg Always allow DRI2 page flipping with TearFree 314424b90cf4Smrg 314524b90cf4Smrg Even if TearFree is enabled for the CRTC we're synchronizing to. 314624b90cf4Smrg 314724b90cf4Smrg (Ported from radeon commit d314cbfb228bb4b8762714f98d0c114a8ee3f061) 314824b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 314924b90cf4Smrg 315024b90cf4Smrgcommit 8c82878c6ef1b984ba289383dc17152192c916ee 315124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 315224b90cf4SmrgDate: Fri Aug 18 16:57:13 2017 +0900 315324b90cf4Smrg 315424b90cf4Smrg Always allow Present page flipping with TearFree 315524b90cf4Smrg 315624b90cf4Smrg Even if TearFree is active for the the CRTC we're synchronizing to. In 315724b90cf4Smrg that case, for Present flips synchronized to vertical blank, the other 315824b90cf4Smrg scanout buffer is immediately synchronized and flipped to during the 315924b90cf4Smrg target vertical blank period. For Present flips not synchronized to 316024b90cf4Smrg vertical blank, we simply use the MSC and timestamp values of the last 316124b90cf4Smrg vertical blank period for timing purposes, and let the normal TearFree 316224b90cf4Smrg mechanism handle display updates. 316324b90cf4Smrg 316424b90cf4Smrg (Ported from radeon commit 4445765af5b97d0cfd10889fe6d6f58f2ce85659) 316524b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 316624b90cf4Smrg 316724b90cf4Smrgcommit d8e8f0107bb3e83a787917f4db16a7a54ce4768b 316824b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 316924b90cf4SmrgDate: Fri Aug 18 16:46:18 2017 +0900 317024b90cf4Smrg 317124b90cf4Smrg Pass extents to amdgpu_scanout_do_update 317224b90cf4Smrg 317324b90cf4Smrg Preparation for following change, no functional change intended yet. 317424b90cf4Smrg 317524b90cf4Smrg (Ported from radeon commit 65e0c5ea1b4adff21d673dbf54af99704c429627) 317624b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 317724b90cf4Smrg 317824b90cf4Smrgcommit cc1dfb88eb6714fcdcb9b576a70f400a5d0d58ca 317924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 318024b90cf4SmrgDate: Fri Aug 18 16:34:50 2017 +0900 318124b90cf4Smrg 318224b90cf4Smrg Add source drawable parameter to amdgpu_scanout_do_update 318324b90cf4Smrg 318424b90cf4Smrg Preparation for following changes, no functional change intended yet. 318524b90cf4Smrg 318624b90cf4Smrg (Ported from radeon commit 1443270e52e8562bd8dc3603f301963bd4027cef) 318724b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 318824b90cf4Smrg 318924b90cf4Smrgcommit b82d1b6063a36facc9cdd0e0189fdb6932be94e2 319024b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 319124b90cf4SmrgDate: Fri Aug 18 16:23:39 2017 +0900 319224b90cf4Smrg 319324b90cf4Smrg Handle multiple "pending" Present flips 319424b90cf4Smrg 319524b90cf4Smrg The xserver Present code can submit a flip in response to notifying it 319624b90cf4Smrg that a vblank event arrived. This can happen before the completion event 319724b90cf4Smrg of the previous flip is processed. In that case, we were clearing the 319824b90cf4Smrg drmmode_crtc->flip_pending field prematurely. 319924b90cf4Smrg 320024b90cf4Smrg Prevent this by only clearing drmmode_crtc->flip_pending when it matches 320124b90cf4Smrg the framebuffer being scanned out since the flip whose completion event 320224b90cf4Smrg we're processing. 320324b90cf4Smrg 320424b90cf4Smrg (Ported from radeon commit 7c10ee9c88378d773c0bcf651fdc5d9f2c6dc5e5) 320524b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 320624b90cf4Smrg 320724b90cf4Smrgcommit 2cbe7f2dff5eef159486f875b3ec67516c85862d 320824b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 320924b90cf4SmrgDate: Fri Aug 18 16:13:17 2017 +0900 321024b90cf4Smrg 321124b90cf4Smrg Wait for pending flips synchronously before turning off a CRTC 321224b90cf4Smrg 321324b90cf4Smrg Allows removing drmmode_clear_pending_flip and the pending_dpms_mode 321424b90cf4Smrg field and cleaning up the code considerably. 321524b90cf4Smrg 321624b90cf4Smrg (Ported from radeon commit e6d7dc2070f4d21a6900916bb70a31839112882c) 321724b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 321824b90cf4Smrg 321924b90cf4Smrgcommit e8d0bfab276d47338c337955b9d2fcbff3af225f 322024b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 322124b90cf4SmrgDate: Fri Aug 18 16:11:41 2017 +0900 322224b90cf4Smrg 322324b90cf4Smrg Create drmmode_crtc_wait_pending_event helper macro 322424b90cf4Smrg 322524b90cf4Smrg Preparation for following change, no functional change intended yet. 322624b90cf4Smrg 322724b90cf4Smrg (Ported from radeon commit f87acdbfb1b0b6d2769764772a52ea8b81675e20) 322824b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 322924b90cf4Smrg 323024b90cf4Smrgcommit fd5b78b7edff2021111bca37642b8b508f0c3328 323124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 323224b90cf4SmrgDate: Fri Aug 18 15:12:35 2017 +0900 323324b90cf4Smrg 323424b90cf4Smrg Create drmmode_wait_vblank helper 323524b90cf4Smrg 323624b90cf4Smrg Allows cleaning up the code considerably. 323724b90cf4Smrg 323824b90cf4Smrg (Ported from radeon commit 99f1d7a474af3683fe1a66f50c0bb8935478ff0a) 323924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 324024b90cf4Smrg 324124b90cf4Smrgcommit 24b2718992e4bbc859c07e5b29b571f53314045d 324224b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 324324b90cf4SmrgDate: Fri Aug 18 15:03:52 2017 +0900 324424b90cf4Smrg 324524b90cf4Smrg Pass reference CRTC to amdgpu_do_pageflip directly 324624b90cf4Smrg 324724b90cf4Smrg Simplifies the code slightly. 324824b90cf4Smrg 324924b90cf4Smrg (Ported from radeon commit 49cc61ab970ee28d4509b4e2dd0a57165136889f) 325024b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 325124b90cf4Smrg 325224b90cf4Smrgcommit 87a1f577f1de62f6b628bbe221cd8d551531e708 325324b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 325424b90cf4SmrgDate: Fri Aug 18 14:56:10 2017 +0900 325524b90cf4Smrg 325624b90cf4Smrg Remove drmmode_crtc->scanout_destroy[] array 325724b90cf4Smrg 325824b90cf4Smrg No longer necessary since we're reference counting framebuffers. 325924b90cf4Smrg 326024b90cf4Smrg (Ported from radeon commit 3f120fa1d5d921656a367751bc079e020e9ab105) 326124b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 326224b90cf4Smrg 326324b90cf4Smrgcommit e15b23663cd1a6f85394253b3fb566b55828b1c5 326424b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 326524b90cf4SmrgDate: Tue Apr 18 18:21:24 2017 +0900 326624b90cf4Smrg 326724b90cf4Smrg Adapt to PixmapDirtyUpdateRec::src being a DrawablePtr 326824b90cf4Smrg 326924b90cf4Smrgcommit 9caa9dd9cc5eb9882c4bb85275bc318948dab71f 327024b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 327124b90cf4SmrgDate: Wed Aug 2 19:07:40 2017 +0900 327224b90cf4Smrg 327324b90cf4Smrg Allow DRI page flipping when some CRTCs use separate scanout buffers 327424b90cf4Smrg 327524b90cf4Smrg As long as the CRTC we're synchronizing to doesn't. 327624b90cf4Smrg 327724b90cf4Smrg (Ported from radeon commit 5309bde0c4e28adf2b167191c6d7011a19e31eed) 327824b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 327924b90cf4Smrg 328024b90cf4Smrgcommit 4441c7c6dde2d71bd44c3031c5679ee3186ea8f9 328124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 328224b90cf4SmrgDate: Tue Aug 1 17:29:16 2017 +0900 328324b90cf4Smrg 328424b90cf4Smrg Add drmmode_crtc_can_flip helper 328524b90cf4Smrg 328624b90cf4Smrg To reduce code duplication between DRI2 and Present. No functional 328724b90cf4Smrg change intended yet. 328824b90cf4Smrg 328924b90cf4Smrg (Ported from radeon commit 9bc3eef74452d924f9101c024f66ad9b14c404c8) 329024b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 329124b90cf4Smrg 329224b90cf4Smrgcommit 3e08409344a2fd504429522507592f98555bec05 329324b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 329424b90cf4SmrgDate: Wed Aug 2 19:03:40 2017 +0900 329524b90cf4Smrg 329624b90cf4Smrg Use root window (pixmap) instead of screen pixmap for scanout updates 329724b90cf4Smrg 329824b90cf4Smrg Preparation for following changes, no functional change intended yet. 329924b90cf4Smrg 330024b90cf4Smrg (Ported from radeon commit c2d26890691ec105858f086b63170ad94c6f7f05) 330124b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 330224b90cf4Smrg 330324b90cf4Smrgcommit 35106fc0a948957cbb7e1e9649c89993a3d5c95c 330424b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 330524b90cf4SmrgDate: Thu Jul 27 15:22:02 2017 +0900 330624b90cf4Smrg 330724b90cf4Smrg Only handle reflection in the driver with Xorg < 1.16 330824b90cf4Smrg 330924b90cf4Smrg Xorg doesn't handle the hardware cursor correctly in that case for 331024b90cf4Smrg rotation and general transforms, and we can't force the SW cursor. 331124b90cf4Smrg 331224b90cf4Smrg Fixes: ba2aa0a8c12a ("Handle rotation in the driver also with Xorg 331324b90cf4Smrg 1.12-1.18") 331424b90cf4Smrg (Cherry picked from radeon commit 7d7abf99b5441ddb04dbee99bc8fa7abc30d4c46) 331524b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 331624b90cf4Smrg 331724b90cf4Smrgcommit a47c0093338d80d84e7033ad15d051925d542ca0 331824b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 331924b90cf4SmrgDate: Wed Jul 26 16:46:14 2017 +0900 332024b90cf4Smrg 332124b90cf4Smrg autogen.sh: Pass -f to autoreconf 332224b90cf4Smrg 332324b90cf4Smrg To ensure that any existing copies of autotools files will be replaced 332424b90cf4Smrg with the current versions. 332524b90cf4Smrg 332624b90cf4Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 332724b90cf4Smrg 332824b90cf4Smrgcommit 842bad4b951296ca25f47b50cb358e502bf30ebb 332924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 333024b90cf4SmrgDate: Wed Jul 26 16:44:00 2017 +0900 333124b90cf4Smrg 333224b90cf4Smrg Makefile.am: Set ACLOCAL_AMFLAGS = -I m4 333324b90cf4Smrg 333424b90cf4Smrg Suggested by one of the tools called by autoreconf. 333524b90cf4Smrg 333624b90cf4Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 333724b90cf4Smrg 333824b90cf4Smrgcommit 227b399badaad9bbef0be5a776ce008d0d243449 333924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 334024b90cf4SmrgDate: Wed Jul 26 16:42:58 2017 +0900 334124b90cf4Smrg 334224b90cf4Smrg Add AC_CONFIG_MACRO_DIRS([m4]) to configure.ac 334324b90cf4Smrg 334424b90cf4Smrg Suggested by one of the tools called by autoreconf. 334524b90cf4Smrg 334624b90cf4Smrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 334724b90cf4Smrg 334824b90cf4Smrgcommit 4d36306bcebb8548455a21eae6a7216a9439d9e4 334924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 335024b90cf4SmrgDate: Thu Jul 13 17:40:58 2017 +0900 335124b90cf4Smrg 335224b90cf4Smrg If a TearFree flip fails, fall back to non-TearFree operation 335324b90cf4Smrg 335424b90cf4Smrg In order to avoid possible freeze / log file spam in that case. 335524b90cf4Smrg 335624b90cf4Smrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99769 335724b90cf4Smrg (Ported from radeon commit 94dc2b80f3ef0b2c17c20501d824fb0447d52e7a) 335824b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 335924b90cf4Smrg 336024b90cf4Smrgcommit 88147c1a532a9275eb57e14d8c11be41bf4c1fe1 336124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 336224b90cf4SmrgDate: Thu Jul 13 17:35:55 2017 +0900 336324b90cf4Smrg 336424b90cf4Smrg Use drmmode_crtc->scanout_id instead of 0 to check for scanout buffer 336524b90cf4Smrg 336624b90cf4Smrg Preparation for following change, no functional change intended. 336724b90cf4Smrg 336824b90cf4Smrg (Ported from radeon commit aff267ee36cc6a703a532f91f82adc1ba1425ff3) 336924b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 337024b90cf4Smrg 337124b90cf4Smrgcommit e90721ba654d70db5eeb1cf552308c73151530ee 337224b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 337324b90cf4SmrgDate: Tue Jun 27 18:13:05 2017 +0900 337424b90cf4Smrg 337524b90cf4Smrg Only call drmmode_scanout_free for non-GPU screens in LeaveVT 337624b90cf4Smrg 337724b90cf4Smrg Destroying the scanout buffers of GPU screens resulted in a crash when 337824b90cf4Smrg switching back to the Xorg VT. 337924b90cf4Smrg 338024b90cf4Smrg Fixes: b10ecdbd89b0 ("Use drmmode_crtc_scanout_* helpers for RandR 1.4 338124b90cf4Smrg scanout pixmaps") 338224b90cf4Smrg (Ported from radeon commit c9dd28cb0c9c3de676eadac61e727732510f6b9b) 338324b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 338424b90cf4Smrg 338524b90cf4Smrgcommit 1b6ff5fd9933c00ec1ec90dfc62e0b531927749b 338624b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 338724b90cf4SmrgDate: Thu Jun 22 16:27:32 2017 +0900 338824b90cf4Smrg 338924b90cf4Smrg Improve drmmode_fb_reference debugging code 339024b90cf4Smrg 339124b90cf4Smrg If a reference count is <= 0, call FatalError with the call location 339224b90cf4Smrg (in case it doesn't get resolved in the backtrace printed by 339324b90cf4Smrg FatalError). 339424b90cf4Smrg 339524b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 339624b90cf4Smrg 339724b90cf4Smrgcommit af7221e1c4d2dbdfd488eb0976a835584ea8441c 339824b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 339924b90cf4SmrgDate: Wed Jun 21 19:01:54 2017 +0900 340024b90cf4Smrg 340124b90cf4Smrg Increase reference count of FB assigned to drmmode_crtc->flip_pending 340224b90cf4Smrg 340324b90cf4Smrg Otherwise, it could happen that we destroy the FB before the flip 340424b90cf4Smrg completes, resulting in use-after-free and most likely a crash. 340524b90cf4Smrg 340624b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 340724b90cf4Smrg 340824b90cf4Smrgcommit 184d50e008b9b31f4dda1425e255af068b6ab068 340924b90cf4SmrgAuthor: Adam Jackson <ajax@redhat.com> 341024b90cf4SmrgDate: Tue Jun 13 09:36:21 2017 -0400 341124b90cf4Smrg 341224b90cf4Smrg modesetting: Validate the atom for enum properties 341324b90cf4Smrg 341424b90cf4Smrg The client could have said anything here, and if what they said doesn't 341524b90cf4Smrg actually name an atom NameForAtom() will return NULL, and strcmp() will 341624b90cf4Smrg be unhappy about that. 341724b90cf4Smrg 341824b90cf4Smrg [copied from xserver d4995a3936ae283b9080fdaa0905daa669ebacfc] 341924b90cf4Smrg 342024b90cf4Smrg Signed-off-by: Adam Jackson <ajax@redhat.com> 342124b90cf4Smrg Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> 342224b90cf4Smrg 342324b90cf4Smrgcommit bbdac40e2af472d37aa0f4f26df77a0b1b12a830 342424b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 342524b90cf4SmrgDate: Thu Jun 8 10:46:26 2017 +0900 342624b90cf4Smrg 342724b90cf4Smrg Improve AMDGPUPreInitAccel_KMS log messages 342824b90cf4Smrg 342924b90cf4Smrg Now it should always be clear in the log file why acceleration isn't 343024b90cf4Smrg enabled. 343124b90cf4Smrg 343224b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 343324b90cf4Smrg 343424b90cf4Smrgcommit b09fde0d81e07fbe96139289098b4d4b9f5e3c35 343524b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 343624b90cf4SmrgDate: Thu May 11 19:04:11 2017 +0900 343724b90cf4Smrg 343824b90cf4Smrg Use reference counting for tracking KMS framebuffer lifetimes 343924b90cf4Smrg 344024b90cf4Smrg References are held by the pixmaps corresponding to the FBs (so 344124b90cf4Smrg the same KMS FB can be reused as long as the pixmap exists) and by the 344224b90cf4Smrg CRTCs scanning out from them (so a KMS FB is only destroyed once it's 344324b90cf4Smrg not being scanned out anymore, preventing intermittent black screens and 344424b90cf4Smrg worse issues due to a CRTC turning off when it should be on). 344524b90cf4Smrg 344624b90cf4Smrg v2: 344724b90cf4Smrg * Only increase reference count in drmmode_fb_reference if it was sane 344824b90cf4Smrg before 344924b90cf4Smrg * Make drmmode_fb_reference's indentation match the rest of 345024b90cf4Smrg drmmode_display.h 345124b90cf4Smrg 345224b90cf4Smrg (Ported from radeon commit 55e513b978b2afc52b7cafc5bfcb0d1dc78d75f6) 345324b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 345424b90cf4Smrg 345524b90cf4Smrgcommit 000e5eaeb20607508c5c5371654615a30a8a1b0b 345624b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 345724b90cf4SmrgDate: Wed May 24 10:12:55 2017 +0900 345824b90cf4Smrg 345924b90cf4Smrg Update URLs 346024b90cf4Smrg 346124b90cf4Smrg * Point to the amd-gfx mailing list 346224b90cf4Smrg * Specify the component in all bugzilla URLs 346324b90cf4Smrg * Use https:// for all HTML URLs 346424b90cf4Smrg 346524b90cf4Smrg (Ported from radeon commit d80d01a73c2eaba2e3649b7bc0a3541b3ff782f6) 346624b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 346724b90cf4Smrg 346824b90cf4Smrgcommit 2ea2d4d827f086098be198f110ca822ed2c290cd 346924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 347024b90cf4SmrgDate: Fri May 12 19:01:18 2017 +0900 347124b90cf4Smrg 347224b90cf4Smrg Simplify tracking of PRIME scanout pixmap 347324b90cf4Smrg 347424b90cf4Smrg Remember the shared pixmap passed to drmmode_set_scanout_pixmap for each 347524b90cf4Smrg CRTC, and just compare against that. 347624b90cf4Smrg 347724b90cf4Smrg Fixes leaving stale entries in ScreenRec::pixmap_dirty_list under some 347824b90cf4Smrg circumstances, which would usually result in use-after-free and a crash 347924b90cf4Smrg down the line. 348024b90cf4Smrg 348124b90cf4Smrg (Ported from radeon commit 7dc68e26755466f9056f8c72195ab8690660693d) 348224b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 348324b90cf4Smrg 348424b90cf4Smrgcommit 8cb41b962eb06b9cb1b3a573a4087e4d89f733fb 348524b90cf4SmrgAuthor: Eric Anholt <eric@anholt.net> 348624b90cf4SmrgDate: Wed May 17 16:11:52 2017 +0900 348724b90cf4Smrg 348824b90cf4Smrg Use plain glamor_egl_create_textured_screen(). 348924b90cf4Smrg 349024b90cf4Smrg Since 5064ffab631 (2014), glamor's implementation of _ext just drops the 349124b90cf4Smrg back_pixmap arg, which we were passing NULL (the default) to anyway. 349224b90cf4Smrg 349324b90cf4Smrg Signed-off-by: Eric Anholt <eric@anholt.net> 349424b90cf4Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 349524b90cf4Smrg (Ported from radeon commit 2b7d77b90108911777a11ecaa63435552000c958) 349624b90cf4Smrg 349724b90cf4Smrgcommit e900e48a11a93cde7d8d2d7bdb4a15ec705c56b1 349824b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 349924b90cf4SmrgDate: Wed May 10 18:37:56 2017 +0900 350024b90cf4Smrg 350124b90cf4Smrg Don't enable DRI3 without glamor 350224b90cf4Smrg 350324b90cf4Smrg Can't work currently. Fixes crash when trying to run a DRI3 client when 350424b90cf4Smrg glamor isn't enabled. 350524b90cf4Smrg 350624b90cf4Smrg Bugzilla: https://bugs.freedesktop.org/100968 350724b90cf4Smrg 350824b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 350924b90cf4Smrg 351024b90cf4Smrgcommit 462ac3341e5bfbded9086d3d9043821d19352b3e 351124b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 351224b90cf4SmrgDate: Tue May 2 17:58:55 2017 +0900 351324b90cf4Smrg 351424b90cf4Smrg Remove unused struct members from drmmode_display.h 351524b90cf4Smrg 351624b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 351724b90cf4Smrg 351824b90cf4Smrgcommit 82fa615f38137add75f9cd4bb49c48dd88de916f 351924b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 352024b90cf4SmrgDate: Tue May 2 11:53:25 2017 +0900 352124b90cf4Smrg 352224b90cf4Smrg Apply gamma correction to HW cursor 352324b90cf4Smrg 352424b90cf4Smrg The display hardware CLUT we're currently using for gamma correction 352524b90cf4Smrg doesn't affect the HW cursor, so we have to apply it manually when 352624b90cf4Smrg uploading the HW cursor data. 352724b90cf4Smrg 352824b90cf4Smrg This currently only works in depth 24/32. 352924b90cf4Smrg 353024b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 353124b90cf4Smrg 353224b90cf4Smrgcommit 981bac185cfd74ae50dffc28f57cf34623a9595f 353324b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 353424b90cf4SmrgDate: Thu Mar 23 18:51:38 2017 +0900 353524b90cf4Smrg 353624b90cf4Smrg Don't set modes before AMDGPUWindowExposures_oneshot is called 353724b90cf4Smrg 353824b90cf4Smrg The root window contents may be undefined before that, so we don't want 353924b90cf4Smrg to show anything yet. 354024b90cf4Smrg 354124b90cf4Smrg Fixes a crash on startup with rotation and virtual resolution set in 354224b90cf4Smrg xorg.conf. 354324b90cf4Smrg 354424b90cf4Smrg Bugzilla: https://bugs.freedesktop.org/100276 354524b90cf4Smrg Fixes: ad53635af150 ("Move DPMS check from amdgpu_scanout_do_update to 354624b90cf4Smrg amdgpu_scanout_flip") 354724b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 354824b90cf4Smrg 354924b90cf4Smrgcommit 51e17041cb89806c934c5cf795207940a6aaccfe 355024b90cf4SmrgAuthor: Daniel Stone <daniels@collabora.com> 355124b90cf4SmrgDate: Mon Apr 10 17:36:01 2017 +0900 355224b90cf4Smrg 355324b90cf4Smrg Set correct DRM event context version 355424b90cf4Smrg 355524b90cf4Smrg DRM_EVENT_CONTEXT_VERSION is the latest context version supported by 355624b90cf4Smrg whatever version of libdrm is present. We were blindly asserting we 355724b90cf4Smrg supported whatever version that may be, even if we actually didn't. 355824b90cf4Smrg 355924b90cf4Smrg Set the version as 2, which should be bumped only with the appropriate 356024b90cf4Smrg version checks. 356124b90cf4Smrg 356224b90cf4Smrg Signed-off-by: Daniel Stone <daniels@collabora.com> 356324b90cf4Smrg (Ported from xserver commit 0c8e6ed85810e96d84173a52d628863802a78d82) 356424b90cf4Smrg v2: Remove second paragraph of commit log, we always initialize 356524b90cf4Smrg page_flip_handler2 = NULL (Emil Velikov) 356624b90cf4Smrg Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> 356724b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> # v1 356824b90cf4Smrg 356924b90cf4Smrgcommit 67d155e62f5e09af242b0181527c162576dae02e 357024b90cf4SmrgAuthor: Nicholas Molloy <nick.a.molloy@gmail.com> 357124b90cf4SmrgDate: Sun Mar 26 02:38:40 2017 +1300 357224b90cf4Smrg 357324b90cf4Smrg Fix a misspelling of 'acceleration' in amdgpu_kms.c 357424b90cf4Smrg 357524b90cf4Smrg Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> 357624b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 357724b90cf4Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 357824b90cf4Smrg 357924b90cf4Smrgcommit 165b51447643ce37f391f25ca6aecb8d76fabaa3 358024b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 358124b90cf4SmrgDate: Wed Mar 22 18:58:32 2017 +0900 358224b90cf4Smrg 358324b90cf4Smrg manpage: Don't put "'" at the beginning of a line 358424b90cf4Smrg 358524b90cf4Smrg It caused the whole line to be dropped. 358624b90cf4Smrg 358724b90cf4Smrg Fixes: af0b24c1aca4 ("Allow toggling TearFree at runtime via output 358824b90cf4Smrg property") 358924b90cf4Smrg Reported-by: Andy Furniss <adf.lists@gmail.com> 359024b90cf4Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 359124b90cf4Smrg 359224b90cf4Smrgcommit 1b476d417f85fd1b97e813adbbf4970db07adf5c 359324b90cf4SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 359424b90cf4SmrgDate: Thu Mar 23 18:03:56 2017 +0900 359524b90cf4Smrg 359624b90cf4Smrg Post-release version bump 359724b90cf4Smrg 359811bf0794Smrgcommit 804e30e14e51f94403a0721ef2aae28f1fa9e9f2 359911bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 360011bf0794SmrgDate: Thu Mar 16 17:28:11 2017 +0900 360111bf0794Smrg 360211bf0794Smrg Bump version for 1.3.0 release 360311bf0794Smrg 360411bf0794Smrgcommit 3a8582944ed3fef1b75f8871489e6e19963e2ea6 360511bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 360611bf0794SmrgDate: Thu Mar 9 15:56:59 2017 +0900 360711bf0794Smrg 360811bf0794Smrg Pass TRUE to drmmode_set_desired_modes the first time for GPU screens 360911bf0794Smrg 361011bf0794Smrg This is the only place we call drmmode_set_desired_modes for GPU screens 361111bf0794Smrg during server startup. Without this change, the display outputs of 361211bf0794Smrg secondary GPUs may stay on even while Xorg isn't using them. 361311bf0794Smrg 361411bf0794Smrg (Ported from radeon commit 9a71445094b728f3d78db8f6808b4782ee19a453) 361511bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 361611bf0794Smrg 361711bf0794Smrgcommit 82b15a4da156e18da4c8fc0093500c32b549e487 361811bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 361911bf0794SmrgDate: Thu Mar 9 15:47:24 2017 +0900 362011bf0794Smrg 362111bf0794Smrg Skip some initialization steps for GPU screens 362211bf0794Smrg 362311bf0794Smrg Xorg doesn't use the following functionality of GPU screens, so don't 362411bf0794Smrg bother initializing it: 362511bf0794Smrg 362611bf0794Smrg * DRI page flipping 362711bf0794Smrg * DRI3 / Present / SYNC fences 362811bf0794Smrg * XVideo / XvMC 362911bf0794Smrg * Root window with background None 363011bf0794Smrg 363111bf0794Smrg (Ported from radeon commit 67ae5e00a748ad52cf92738d401afff2947b1891) 363211bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 363311bf0794Smrg 363411bf0794Smrgcommit fa85331f0ce27e16a9338516518433955133840e 363511bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 363611bf0794SmrgDate: Tue Mar 7 18:02:29 2017 +0900 363711bf0794Smrg 363811bf0794Smrg glamor: Use glamor_finish when available 363911bf0794Smrg 364011bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 364111bf0794Smrg 364211bf0794Smrgcommit 7884e38e94c2cbd6c205f556f2b31ad59b4089b4 364311bf0794SmrgAuthor: Hans De Goede <hdegoede@redhat.com> 364411bf0794SmrgDate: Tue Oct 18 16:48:40 2016 +0200 364511bf0794Smrg 364611bf0794Smrg amdgpu_probe: Do not close server managed drm fds 364711bf0794Smrg 364811bf0794Smrg This fixes the xserver only seeing AMD/ATI devices supported by the amdgpu 364911bf0794Smrg driver, as by the time xf86-video-ati gets a chance to probe them, the 365011bf0794Smrg fd has been closed. 365111bf0794Smrg 365211bf0794Smrg This fixes e.g. Xorg not seeing the dGPU on a Lenovo Thinkpad E465 laptop 365311bf0794Smrg with a CARRIZO iGPU and a HAINAN dGPU. 365411bf0794Smrg 365511bf0794Smrg Signed-off-by: Hans de Goede <hdegoede@redhat.com> 365611bf0794Smrg 365711bf0794Smrg v2: Rebased on top of new patch 1. 365811bf0794Smrg 365911bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 366011bf0794Smrg 366111bf0794Smrgcommit a2c360fa1d33d6a5aa64c396197e119ff77d1379 366211bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 366311bf0794SmrgDate: Mon Mar 6 18:59:23 2017 +0900 366411bf0794Smrg 366511bf0794Smrg Refactor amdgpu_kernel_close_fd helper 366611bf0794Smrg 366711bf0794Smrg Preparation for the following change. 366811bf0794Smrg 366911bf0794Smrg Assign pAMDGPUEnt->fd = -1 instead of 0 when we're not using the file 367011bf0794Smrg descriptor anymore. 367111bf0794Smrg 367211bf0794Smrg Reviewed-by: Hans de Goede <hdegoede@redhat.com> 367311bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 367411bf0794Smrg 367511bf0794Smrgcommit 947017194d07e32876a43ee0efc45fdc71385748 367611bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 367711bf0794SmrgDate: Fri Mar 3 17:59:19 2017 +0900 367811bf0794Smrg 367911bf0794Smrg glamor: Don't flush in BlockHandler with Xorg >= 1.19 368011bf0794Smrg 368111bf0794Smrg This was only necessary with older versions for driving the FBO cache 368211bf0794Smrg expiry mechanism. 368311bf0794Smrg 368411bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 368511bf0794Smrg 368611bf0794Smrgcommit 86907a5e4ce33154167b330570491f88218725d3 368711bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 368811bf0794SmrgDate: Mon Mar 6 18:23:41 2017 +0900 368911bf0794Smrg 369011bf0794Smrg Only define transform_region for XF86_CRTC_VERSION >= 4 369111bf0794Smrg 369211bf0794Smrg Not used with older versions of Xorg. Fixes warning in that case: 369311bf0794Smrg 369411bf0794Smrg ../../src/amdgpu_kms.c:328:1: warning: ‘transform_region’ defined but not used [-Wunused-function] 369511bf0794Smrg transform_region(RegionPtr region, struct pict_f_transform *transform, 369611bf0794Smrg ^~~~~~~~~~~~~~~~ 369711bf0794Smrg 369811bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 369911bf0794Smrg 370011bf0794Smrgcommit 8d2b7d1758e3fcac520a18a0684c073f0ac62389 370111bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 370211bf0794SmrgDate: Mon Mar 6 18:09:58 2017 +0900 370311bf0794Smrg 370411bf0794Smrg Use local implementation of RegionDuplicate for older xserver 370511bf0794Smrg 370611bf0794Smrg It was only added in xserver 1.15. Fixes build against older xserver. 370711bf0794Smrg 370811bf0794Smrg Reported-by: Pali Rohár <pali.rohar@gmail.com> 370911bf0794Smrg (Ported from radeon commit 80cc892ee1ce54fad3cb7dd11bd9df18c359136f) 371011bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 371111bf0794Smrg 371211bf0794Smrgcommit cd73100114a18642d9c40f1df33cef8311e96a8b 371311bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 371411bf0794SmrgDate: Mon Mar 6 18:07:19 2017 +0900 371511bf0794Smrg 371611bf0794Smrg Don't use pScrn->is_gpu in AMDGPUCreateScreenResources_KMS 371711bf0794Smrg 371811bf0794Smrg Looks like this snuck in accidentally. 371911bf0794Smrg 372011bf0794Smrg Brings us back in line with the radeon driver, and fixes the build 372111bf0794Smrg against older versions of xserver which didn't have the is_gpu field 372211bf0794Smrg yet. 372311bf0794Smrg 372411bf0794Smrg Fixes: 6bab8fabb37e ("Remove info->dri2.drm_fd and info->drmmode->fd") 372511bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 372611bf0794Smrg 372711bf0794Smrgcommit 351baa89b9b0ecfb6c666af3a2d10c559a9224a9 372811bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 372911bf0794SmrgDate: Fri Mar 3 16:44:15 2017 +0900 373011bf0794Smrg 373111bf0794Smrg Don't call amdgpu_glamor_flush in drmmode_copy_fb 373211bf0794Smrg 373311bf0794Smrg AMDGPUWindowExposures_oneshot takes care of it. 373411bf0794Smrg 373511bf0794Smrg (Ported from radeon commit d63881623f0686a66a2e3e3c1f84e496aa52ec6b) 373611bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 373711bf0794Smrg 373811bf0794Smrgcommit ad53635af150cda9b8da413be5a011d74f972ac7 373911bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 374011bf0794SmrgDate: Fri Mar 3 16:41:49 2017 +0900 374111bf0794Smrg 374211bf0794Smrg Move DPMS check from amdgpu_scanout_do_update to amdgpu_scanout_flip 374311bf0794Smrg 374411bf0794Smrg When amdgpu_scanout_do_update is called from 374511bf0794Smrg drmmode_crtc_scanout_update, drmmode_crtc->pending_dpms_mode may still 374611bf0794Smrg be != DPMSModeOn, e.g. during server startup. 374711bf0794Smrg 374811bf0794Smrg Fixes intermittently showing garbage with TearFree enabled. 374911bf0794Smrg 375011bf0794Smrg (Ported from radeon commit cc9d6b7db9c2078be1e530a64af6d517c6a42024) 375111bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 375211bf0794Smrg 375311bf0794Smrgcommit 378bd05c849ad3092f138bdc8917d35d0b967389 375411bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 375511bf0794SmrgDate: Fri Mar 3 16:36:24 2017 +0900 375611bf0794Smrg 375711bf0794Smrg Call drmmode_set_desired_modes from a WindowExposures hook 375811bf0794Smrg 375911bf0794Smrg This is the earliest opportunity where the root window contents are 376011bf0794Smrg guaranteed to be initialized, and prevents drmmode_set_mode_major from 376111bf0794Smrg getting called before drmmode_set_desired_modes via AMDGPUUnblank -> 376211bf0794Smrg drmmode_crtc_dpms. Also, in contrast to the BlockHandler hook, this is 376311bf0794Smrg called when running Xorg with -pogo. 376411bf0794Smrg 376511bf0794Smrg Fixes intermittently showing garbage on server startup or after server 376611bf0794Smrg reset. 376711bf0794Smrg 376811bf0794Smrg As a bonus, this avoids trouble due to higher layers (e.g. the tigervnc 376911bf0794Smrg Xorg module) calling AMDGPUBlockHandler_oneshot repeatedly even after 377011bf0794Smrg we set pScreen->BlockHandler = AMDGPUBlockHandler_KMS. 377111bf0794Smrg 377211bf0794Smrg Bugzilla: https://bugs.freedesktop.org/99457 377311bf0794Smrg (Ported from radeon commits 0a12bf1085505017068dfdfd31d23133e51b45b9 and 377411bf0794Smrg f0e7948e1c0e984fc27f235f365639e9cf628291) 377511bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 377611bf0794Smrg 377711bf0794Smrgcommit 8d4d73e05ce34eb353daec7b2c0e7c844113c7de 377811bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 377911bf0794SmrgDate: Fri Mar 3 16:34:16 2017 +0900 378011bf0794Smrg 378111bf0794Smrg present: Flush before flipping 378211bf0794Smrg 378311bf0794Smrg This isn't necessary for DRI clients, but the Present extension can also 378411bf0794Smrg be used for presenting normal pixmaps rendered to via the X11 protocol. 378511bf0794Smrg 378611bf0794Smrg (Ported from radeon commit 9035b6abea557828e672ee455f0c84e43da0906f) 378711bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 378811bf0794Smrg 378911bf0794Smrgcommit 88725b68cad92418c9bb03cb7f20526ce238d64e 379011bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 379111bf0794SmrgDate: Fri Mar 3 16:30:27 2017 +0900 379211bf0794Smrg 379311bf0794Smrg present: Use async flip for unflip if possible 379411bf0794Smrg 379511bf0794Smrg In that case, unflip operations should finish faster in general. 379611bf0794Smrg 379711bf0794Smrg (Ported from radeon commit 0a4eb0e12f0c9c653cf4cea6fd62e1a507eb261c) 379811bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 379911bf0794Smrg 380011bf0794Smrgcommit b31489c086b4bc50c824e85fa26d97c0f43afb20 380111bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 380211bf0794SmrgDate: Fri Mar 3 16:28:41 2017 +0900 380311bf0794Smrg 380411bf0794Smrg present: Also flush before using a flip to unflip 380511bf0794Smrg 380611bf0794Smrg Not doing so might result in intermittently scanning out stale contents 380711bf0794Smrg of the screen pixmap. 380811bf0794Smrg 380911bf0794Smrg (Ported from radeon commit 9a951a3e551db58ba50e7a594521ceac54d90615) 381011bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 381111bf0794Smrg 381211bf0794Smrgcommit f6a3c87c3097e8d5c1d2159bc90d6541a46ed8be 381311bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 381411bf0794SmrgDate: Fri Mar 3 16:26:26 2017 +0900 381511bf0794Smrg 381611bf0794Smrg present: Wait for GPU idle before setting modes for unflip 381711bf0794Smrg 381811bf0794Smrg To make sure the screen pixmap contents are up to date when it starts 381911bf0794Smrg being scanned out. 382011bf0794Smrg 382111bf0794Smrg (Ported from radeon commit 244d4bc7f8c8f6bc90f49556c0b9344c8aa40295) 382211bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 382311bf0794Smrg 382411bf0794Smrgcommit 012ffffb45119059f3610fb8fd6ae103186b3e3c 382511bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 382611bf0794SmrgDate: Fri Mar 3 16:22:39 2017 +0900 382711bf0794Smrg 382811bf0794Smrg present: Only call drmModeRmFB after setting modes for unflip 382911bf0794Smrg 383011bf0794Smrg Fixes display intermittently blanking when a modeset is used for unflip. 383111bf0794Smrg 383211bf0794Smrg (Ported from radeon commit 3ff29e5a14451916bc66b4e0028e9a317f0723f8) 383311bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 383411bf0794Smrg 383511bf0794Smrgcommit f4719bb473df897012f8830f46e99cb781d67b6f 383611bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 383711bf0794SmrgDate: Fri Mar 3 16:19:11 2017 +0900 383811bf0794Smrg 383911bf0794Smrg Use drmmode_crtc_scanout_free in drmmode_fini 384011bf0794Smrg 384111bf0794Smrg We were leaking drmmode_crtc->scanout_damage, which caused trouble on 384211bf0794Smrg server reset. Fixes server reset with active separate scanout pixmaps. 384311bf0794Smrg 384411bf0794Smrg (Cherry picked from radeon commit 0c29deb5a97d9a57e994cc0053c49ddf7aca6ecb) 384511bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 384611bf0794Smrg 384711bf0794Smrgcommit af0b24c1aca4cba2692d5aa410e63cb536478dbe 384811bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 384911bf0794SmrgDate: Thu Mar 2 17:24:03 2017 +0900 385011bf0794Smrg 385111bf0794Smrg Allow toggling TearFree at runtime via output property 385211bf0794Smrg 385311bf0794Smrg Option "TearFree" now sets the default value of the output property. 385411bf0794Smrg See the manpage update for details. 385511bf0794Smrg 385611bf0794Smrg TearFree is now enabled by default for outputs using rotation or other 385711bf0794Smrg RandR transforms, and for RandR 1.4 slave outputs. 385811bf0794Smrg 385911bf0794Smrg (Ported from radeon commit 58cd1600057e41aade0106d4acf78e23eac6e44f) 386011bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 386111bf0794Smrg 386211bf0794Smrgcommit 77853f02e5b879e7042f55c672cf2d8e6955309f 386311bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 386411bf0794SmrgDate: Thu Mar 2 17:19:59 2017 +0900 386511bf0794Smrg 386611bf0794Smrg Factor out drmmode_crtc_scanout_update helper 386711bf0794Smrg 386811bf0794Smrg Cleanup in preparation for following change, no functional change 386911bf0794Smrg intended. 387011bf0794Smrg 387111bf0794Smrg (Ported from radeon commit 305e2cbf335837a2ab6a24e9ff65815afe038296) 387211bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 387311bf0794Smrg 387411bf0794Smrgcommit d25cc3b2b3b2d257aea247b85fea405d7e84e5b1 387511bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 387611bf0794SmrgDate: Thu Mar 2 17:15:03 2017 +0900 387711bf0794Smrg 387811bf0794Smrg Factor out amdgpu_prime_dirty_to_crtc helper 387911bf0794Smrg 388011bf0794Smrg Cleanup in preparation for the following change, no functional change 388111bf0794Smrg intended. 388211bf0794Smrg 388311bf0794Smrg (Ported from radeon commit 649644a88347a6d03de68f8c41db03a82deeb23b) 388411bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 388511bf0794Smrg 388611bf0794Smrgcommit a6d363008e2b55f0aa6151be1a99f01b97870e91 388711bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 388811bf0794SmrgDate: Thu Mar 2 17:13:06 2017 +0900 388911bf0794Smrg 389011bf0794Smrg Don't destroy current FB if drmModeAddFB fails 389111bf0794Smrg 389211bf0794Smrg It would probably result in a black screen. 389311bf0794Smrg 389411bf0794Smrg (Ported from radeon commit 1351e48efe7a2c28eab447e16f36a00fbd02ae48) 389511bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 389611bf0794Smrg 389711bf0794Smrgcommit 53926db2355de0a324c205703a0377b498136f65 389811bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 389911bf0794SmrgDate: Thu Mar 2 17:08:19 2017 +0900 390011bf0794Smrg 390111bf0794Smrg Fix flip event data leak if calloc or drmModeAddFB fails 390211bf0794Smrg 390311bf0794Smrg (Ported from radeon commit 481394e3c9f9f7d88bb66fe9ae8834c87952a8ab) 390411bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 390511bf0794Smrg 390611bf0794Smrgcommit 45a8ec6257c370eecf43b6b8010863e37b704872 390711bf0794SmrgAuthor: Mihail Konev <k.mvc@ya.ru> 390811bf0794SmrgDate: Thu Mar 2 17:04:36 2017 +0900 390911bf0794Smrg 391011bf0794Smrg autogen: add default patch prefix 391111bf0794Smrg 391211bf0794Smrg (Ported from radeon commit 8e6a4e96b7b27559e186f71b5547abb0a80b96dd) 391311bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 391411bf0794Smrg 391511bf0794Smrgcommit ba2aa0a8c12a2bea1e8be01ca3134b518d4cb0f2 391611bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 391711bf0794SmrgDate: Thu Mar 2 16:55:38 2017 +0900 391811bf0794Smrg 391911bf0794Smrg Handle rotation in the driver also with Xorg 1.12-1.18 392011bf0794Smrg 392111bf0794Smrg We cannot use the HW cursor in that case, but in turn we get more 392211bf0794Smrg efficient and less teary updates of rotated outputs. 392311bf0794Smrg 392411bf0794Smrg (Ported from radeon commit f2bc882f1c1082bed9f496cfab6c8f07a76bc122) 392511bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 392611bf0794Smrg 392711bf0794Smrgcommit 7f3abf35a2e1225ffd6a777b23f6a7a6355c1691 392811bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 392911bf0794SmrgDate: Thu Mar 2 16:47:06 2017 +0900 393011bf0794Smrg 393111bf0794Smrg Fold drmmode_crtc_scanout_allocate into drmmode_crtc_scanout_create 393211bf0794Smrg 393311bf0794Smrg Not used anywhere else anymore. 393411bf0794Smrg 393511bf0794Smrg (Ported from radeon commit ae921a3150f69c38b5b3c88a9e37d54fdf0d5093) 393611bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 393711bf0794Smrg 393811bf0794Smrgcommit 03c2db3c67bf5ad3c0744add9e0bb611b6cd3df7 393911bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 394011bf0794SmrgDate: Thu Mar 2 16:42:04 2017 +0900 394111bf0794Smrg 394211bf0794Smrg Call drmmode_crtc_scanout_create in drmmode_crtc_shadow_allocate as well 394311bf0794Smrg 394411bf0794Smrg Calling drmmode_crtc_scanout_allocate in drmmode_crtc_shadow_allocate 394511bf0794Smrg resulted in drmmode_crtc_scanout_create called from 394611bf0794Smrg drmmode_crtc_shadow_create passing an uninitialized pitch value to 394711bf0794Smrg drmmode_create_bo_pixmap. 394811bf0794Smrg 394911bf0794Smrg Fixes issues such as failure to allocate the scanout pixmap or visual 395011bf0794Smrg corruption and GPUVM faults when attempting to use rotation with Xorg 395111bf0794Smrg <1.19. 395211bf0794Smrg 395311bf0794Smrg Bugzilla: https://bugs.freedesktop.org/99916 395411bf0794Smrg Fixes: 5f7123808833 ("Pass pitch from drmmode_crtc_scanout_allocate to 395511bf0794Smrg drmmode_create_bo_pixmap") 395611bf0794Smrg (Ported from radeon commit 987a34adb319923ad36e2b47a26837248f187c3e) 395711bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 395811bf0794Smrg 395911bf0794Smrgcommit 49b092563cb3958911d28a006f155b4f4e38ed73 396011bf0794SmrgAuthor: Emil Velikov <emil.l.velikov@gmail.com> 396111bf0794SmrgDate: Thu Jan 26 11:10:12 2017 +0900 396211bf0794Smrg 396311bf0794Smrg autogen.sh: use quoted string variables 396411bf0794Smrg 396511bf0794Smrg Place quotes around the $srcdir, $ORIGDIR and $0 variables to prevent 396611bf0794Smrg fall-outs, when they contain space. 396711bf0794Smrg 396811bf0794Smrg Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> 396911bf0794Smrg Reviewed-by: Peter Hutterer <peter.hutterer@who-t.net> 397011bf0794Smrg Signed-off-by: Peter Hutterer <peter.hutterer@who-t.net> 397111bf0794Smrg 397211bf0794Smrgcommit 457fcc5935c659aab5b88cf26d065180b47ed632 397311bf0794SmrgAuthor: Peter Hutterer <peter.hutterer@who-t.net> 397411bf0794SmrgDate: Thu Jan 26 11:09:07 2017 +0900 397511bf0794Smrg 397611bf0794Smrg autogen.sh: use exec instead of waiting for configure to finish 397711bf0794Smrg 397811bf0794Smrg Syncs the invocation of configure with the one from the server. 397911bf0794Smrg 398011bf0794Smrg Signed-off-by: Peter Hutterer <peter.hutterer@who-t.net> 398111bf0794Smrg Reviewed-by: Emil Velikov <emil.velikov@collabora.com> 398211bf0794Smrg 398311bf0794Smrgcommit 5f712380883357d03c9934a753ef302e109aeb14 398411bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 398511bf0794SmrgDate: Fri Jan 6 17:42:25 2017 +0900 398611bf0794Smrg 398711bf0794Smrg Pass pitch from drmmode_crtc_scanout_allocate to drmmode_create_bo_pixmap 398811bf0794Smrg 398911bf0794Smrg Mostly to align with radeon commit 399011bf0794Smrg ea30d856ba5e7274c8ea499293b8b0e721b8e082, but also gets rid of a 399111bf0794Smrg gbm_bo_get_stride call. 399211bf0794Smrg 399311bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 399411bf0794Smrg 399511bf0794Smrgcommit b5c189473dba2cffc9e4df310ce5c86ceca99a94 399611bf0794SmrgAuthor: Jammy Zhou <Jammy.Zhou@amd.com> 399711bf0794SmrgDate: Tue Dec 13 12:32:39 2016 +0900 399811bf0794Smrg 399911bf0794Smrg Use render node for DRI3 if available 400011bf0794Smrg 400111bf0794Smrg Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> 400211bf0794Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 400311bf0794Smrg [ Second attempt, let's see if there's any fallout this time... ] 400411bf0794Smrg 400511bf0794Smrgcommit edd276185d42962a13faf9ec9eeebc754ef284e7 400611bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 400711bf0794SmrgDate: Thu Dec 15 12:42:44 2016 +0900 400811bf0794Smrg 400911bf0794Smrg Simplify drmmode_handle_uevents 401011bf0794Smrg 401111bf0794Smrg No functional change intended. 401211bf0794Smrg 401311bf0794Smrg Reviewed-by: Jim Qu <Jim.Qu@amd.com> 401411bf0794Smrg 401511bf0794Smrgcommit 732cf4d3a248b288532ad0f3443da49e08dc7507 401611bf0794SmrgAuthor: jimqu <Jim.Qu@amd.com> 401711bf0794SmrgDate: Tue Dec 13 16:33:26 2016 +0800 401811bf0794Smrg 401911bf0794Smrg udev_monitor_receive_device() will block when hotplug monitor 402011bf0794Smrg 402111bf0794Smrg udev_monitor_receive_device() will block and wait for the event of udev 402211bf0794Smrg use select() to ensure that this will not block. 402311bf0794Smrg 402411bf0794Smrg Signed-off-by: JimQu <Jim.Qu@amd.com> 402511bf0794Smrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 402611bf0794Smrg 402711bf0794Smrgcommit d60ea478cf2215ded7e1acf5817a0dae07e54026 402811bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 402911bf0794SmrgDate: Wed Nov 30 16:28:27 2016 +0900 403011bf0794Smrg 403111bf0794Smrg Call amdgpu_drm_abort_entry on failure to flip to a scanout pixmap 403211bf0794Smrg 403311bf0794Smrg Fixes leaking the corresponding struct amdgpu_drm_queue list entry in 403411bf0794Smrg that case. 403511bf0794Smrg 403611bf0794Smrg (Ported from radeon commit e2942449171fe628a7726e59bcaab65e27d88563) 403711bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 403811bf0794Smrg 403911bf0794Smrgcommit aea70298ef0d53fc81aa1fd22c8566920a856223 404011bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 404111bf0794SmrgDate: Wed Nov 30 16:27:10 2016 +0900 404211bf0794Smrg 404311bf0794Smrg Call ValidateGC after ChangeClip in amdgpu_sync_scanout_pixmaps 404411bf0794Smrg 404511bf0794Smrg The wrong order meant that the clipping region wasn't actually applied, 404611bf0794Smrg so it always copied the full contents from the other scanout pixmap. 404711bf0794Smrg 404811bf0794Smrg (Ported from radeon commit 14c3f59f5157885ad8f941f0bad6c0c5e3db12f8) 404911bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 405011bf0794Smrg 405111bf0794Smrgcommit 0f79c30619168c6845b143c6ed94ade307383068 405211bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 405311bf0794SmrgDate: Wed Nov 30 16:25:52 2016 +0900 405411bf0794Smrg 405511bf0794Smrg Fix amdgpu_scanout_extents_intersect for GPU screens 405611bf0794Smrg 405711bf0794Smrg Fixes incorrect screen updates with TearFree enabled on PRIME slave 405811bf0794Smrg outputs which are not located at (0, 0). 405911bf0794Smrg 406011bf0794Smrg (Ported from radeon commit a995f5830916a0fee5126263d1bfe48632be3a15) 406111bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 406211bf0794Smrg 406311bf0794Smrgcommit 082b6b8ca1878f4b7ab0b25d16b85ba40748ac57 406411bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 406511bf0794SmrgDate: Wed Nov 30 16:21:28 2016 +0900 406611bf0794Smrg 406711bf0794Smrg Take current scanout_id into account everywhere involved with TearFree 406811bf0794Smrg 406911bf0794Smrg Fixes various potential issues with TearFree enabled, e.g. outputs 407011bf0794Smrg freezing after display configuration changes. 407111bf0794Smrg 407211bf0794Smrg (Ported from radeon commit e543ef3a2fb304cbe3a965fb780632af2e4186f4) 407311bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 407411bf0794Smrg 407511bf0794Smrgcommit 82729b1f3b9d57f3002ac2689bfbf37ece0bc3f2 407611bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 407711bf0794SmrgDate: Mon Nov 28 17:47:17 2016 +0900 407811bf0794Smrg 407911bf0794Smrg Add amdgpu_is_gpu_screen helper 408011bf0794Smrg 408111bf0794Smrg This will hopefully decrease the chance of accidentally breaking the 408211bf0794Smrg build against xserver < 1.13 in the future. 408311bf0794Smrg 408411bf0794Smrg (Ported from radeon commit f130b10e63f7526360b41aa0918b4940f63f662a) 408511bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 408611bf0794Smrg 408711bf0794Smrgcommit 7fe2a8ed67ef82916a1eb5b241c5a602a26e10b2 408811bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 408911bf0794SmrgDate: Tue Nov 22 16:50:59 2016 +0900 409011bf0794Smrg 409111bf0794Smrg Don't install Flush/EventCallback for GPU screens 409211bf0794Smrg 409311bf0794Smrg Their purpose is to flush GPU rendering commands corresponding to damage 409411bf0794Smrg events, but there can be no damage events corresponding to GPU screen 409511bf0794Smrg rendering operations. 409611bf0794Smrg 409711bf0794Smrg (Ported from radeon commits 13c6bc5e382765fe567091e1c616c0a26eec04ca and 409811bf0794Smrg 487aa62a2a23b86e4ea4714fdfd465c9e513141f) 409911bf0794Smrg 410011bf0794Smrg v2: Squash in radeon fix for build against xserver < 1.13 410111bf0794Smrg 410211bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) 410311bf0794Smrg 410411bf0794Smrgcommit ff31320644b4d17b9b3f0abd612c99769d3d9643 410511bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 410611bf0794SmrgDate: Fri Nov 25 18:34:40 2016 +0900 410711bf0794Smrg 410811bf0794Smrg Make libdrm >= 2.4.72 requirement explicit 410911bf0794Smrg 411011bf0794Smrg And drop compatibility code for older versions. 411111bf0794Smrg 411211bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 411311bf0794Smrg 411411bf0794Smrgcommit f9ba1e8fd48cd967a09c4e083b277505d08d3849 411511bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 411611bf0794SmrgDate: Tue Nov 22 16:30:59 2016 +0900 411711bf0794Smrg 411811bf0794Smrg Use DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags when available 411911bf0794Smrg 412011bf0794Smrg (Ported from radeon commits 1106b2f773ad0611c729b27f4c192a26b43ef1e7 412111bf0794Smrg and 5fea5ef2f07eee4a0f94baab427010b936f1d4b4) 412211bf0794Smrg 412311bf0794Smrg v2: 412411bf0794Smrg * Squash in radeon fix for TearFree regression 412511bf0794Smrg * Remove preprocessor guards for compatibility with libdrm < 2.4.72 412611bf0794Smrg (Emil Velikov) 412711bf0794Smrg 412811bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 412911bf0794Smrg 413011bf0794Smrgcommit e8aa4e7ea59f00d5527654b7181a05aab8c78928 413111bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 413211bf0794SmrgDate: Wed Oct 26 18:38:20 2016 +0900 413311bf0794Smrg 413411bf0794Smrg Remove generated header files 413511bf0794Smrg 413611bf0794Smrg No longer used. 413711bf0794Smrg 413811bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 413911bf0794Smrg 414011bf0794Smrgcommit d69fd22b6d13052d667929a0e3db61829ce1396e 414111bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 414211bf0794SmrgDate: Wed Oct 26 18:36:18 2016 +0900 414311bf0794Smrg 414411bf0794Smrg Stop using AMDGPU(Unique)Chipsets 414511bf0794Smrg 414611bf0794Smrg Use libdrm_amdgpu's amdgpu_get_marketing_name for the chipset name, or 414711bf0794Smrg "Unknown AMD Radeon GPU" as a fallback. 414811bf0794Smrg 414911bf0794Smrg v2: Require libdrm_amdgpu >= 2.4.72 for amdgpu_get_marketing_name 415011bf0794Smrg 415111bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) 415211bf0794Smrg 415311bf0794Smrgcommit 8a5ff54af32a75ae56d3369a828a50ae28dd1acd 415411bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 415511bf0794SmrgDate: Wed Oct 26 18:09:18 2016 +0900 415611bf0794Smrg 415711bf0794Smrg Stop using AMDGPUPciChipsets 415811bf0794Smrg 415911bf0794Smrg Not actually used by Xorg. 416011bf0794Smrg 416111bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 416211bf0794Smrg 416311bf0794Smrgcommit 298eaf58a57efa6acc53d374eea239b6bb55c0f8 416411bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 416511bf0794SmrgDate: Wed Oct 26 18:05:58 2016 +0900 416611bf0794Smrg 416711bf0794Smrg Remove amdpciids.h 416811bf0794Smrg 416911bf0794Smrg Not useful anymore. 417011bf0794Smrg 417111bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 417211bf0794Smrg 417311bf0794Smrgcommit a0881d55fe80d639d31cdfeadd6014322c037791 417411bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 417511bf0794SmrgDate: Wed Oct 26 18:02:39 2016 +0900 417611bf0794Smrg 417711bf0794Smrg Stop using generated amdgpu_device_match 417811bf0794Smrg 417911bf0794Smrg Just match on PCI device ID 0x1002. 418011bf0794Smrg 418111bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 418211bf0794Smrg 418311bf0794Smrgcommit 40ddc52b2ae32b17ef7eea1602fdf59b63f06f17 418411bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 418511bf0794SmrgDate: Wed Oct 26 17:42:36 2016 +0900 418611bf0794Smrg 418711bf0794Smrg Use family information from libdrm_amdgpu / kernel 418811bf0794Smrg 418911bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 419011bf0794Smrg 419111bf0794Smrgcommit 5c9d1c5097e326c69f1be4427c62a0d348e8a4a6 419211bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 419311bf0794SmrgDate: Wed Oct 26 17:32:56 2016 +0900 419411bf0794Smrg 419511bf0794Smrg Move struct amdgpu_gpu_info out of amdgpu_get_tile_config 419611bf0794Smrg 419711bf0794Smrg Preparation for the following change, no functional change intended. 419811bf0794Smrg 419911bf0794Smrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 420011bf0794Smrg 420111bf0794Smrgcommit adf7dabdf9c8acd674190e25050b0885a05d0e92 420211bf0794SmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 420311bf0794SmrgDate: Mon Nov 21 17:50:22 2016 +0900 420411bf0794Smrg 420511bf0794Smrg Post-release version bump 420611bf0794Smrg 4207504d986fSmrgcommit a00032050873fc99f3ceaa3293468dad1d94d4b1 4208504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4209504d986fSmrgDate: Thu Nov 17 15:17:10 2016 +0900 4210504d986fSmrg 4211504d986fSmrg Bump version for 1.2.0 release 4212504d986fSmrg 4213504d986fSmrgcommit a446b3af9b055056e9fb0f37069b08b979eba277 4214504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4215504d986fSmrgDate: Thu Nov 17 15:13:59 2016 +0900 4216504d986fSmrg 4217504d986fSmrg manpage updates for the 1.2.0 release 4218504d986fSmrg 4219504d986fSmrg Option "TearFree" is now effective for arbitrary transforms as well. 4220504d986fSmrg 4221504d986fSmrg Point to the amd-gfx mailing list instead of xorg-driver-ati. 4222504d986fSmrg 4223504d986fSmrgcommit 24e36c7044a24294d5709c0306efacc8de6df072 4224504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4225504d986fSmrgDate: Thu Nov 10 12:30:10 2016 +0900 4226504d986fSmrg 4227504d986fSmrg Use pAMDGPUEnt to find both screens of a GPU in amdgpu_mode_hotplug 4228504d986fSmrg 4229504d986fSmrg Fixes misbehaviour when hotplugging DisplayPort connectors on secondary 4230504d986fSmrg GPUs. 4231504d986fSmrg 4232504d986fSmrg Fixes: 14606e127f4b ("Handle Zaphod mode correctly in amdgpu_mode_hotplug") 4233504d986fSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98626 4234504d986fSmrg (Ported from radeon commit 9760ef33cba5795eddeda4d5c2fcbe2dcce21689) 4235504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4236504d986fSmrg 4237504d986fSmrgcommit 257be5b0853814a557a5337878a4311acbc89856 4238504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4239504d986fSmrgDate: Thu Nov 10 12:28:03 2016 +0900 4240504d986fSmrg 4241504d986fSmrg Refactor amdgpu_mode_hotplug 4242504d986fSmrg 4243504d986fSmrg Preparation for the next change, no functional change intended. 4244504d986fSmrg 4245504d986fSmrg (Cherry picked from radeon commit 35bec4937d89b48a79acfcb4f814b7370cb631b2) 4246504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4247504d986fSmrg 4248504d986fSmrgcommit 1352a1d2f78cb0433d421ef86bfce2a5a1646807 4249504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4250504d986fSmrgDate: Wed Nov 2 12:35:55 2016 +0900 4251504d986fSmrg 4252504d986fSmrg Check Xorg version at runtime instead of build time in two places 4253504d986fSmrg 4254504d986fSmrg This means that all possible paths can be handled as intended, no matter 4255504d986fSmrg which Xorg version the driver happened to be compiled against. 4256504d986fSmrg 4257504d986fSmrg (Ported from radeon commit 350a2645a1b127227ff294c0b62d20000d0fd48a) 4258504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4259504d986fSmrg 4260504d986fSmrgcommit 5da43c5da8adc139d57d89975a52eef91a5595e1 4261504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4262504d986fSmrgDate: Tue Nov 1 16:01:24 2016 +0900 4263504d986fSmrg 4264504d986fSmrg Require xserver 1.10 or newer 4265504d986fSmrg 4266504d986fSmrg 1.10.0 was released in February 2011. 4267504d986fSmrg 4268504d986fSmrg We've been accidentally requiring 1.10 or newer since c7d27c94cb65 ("Keep 4269504d986fSmrg track of damage event related flushes per-client"). 4270504d986fSmrg 4271504d986fSmrg (Ported from radeon commit 5df36de39952c3a26cb2fbc125f298139a9dd5bc) 4272504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4273504d986fSmrg 4274504d986fSmrgcommit dd4a740714e481b09312a04883aa6e0f5200ca81 4275504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4276504d986fSmrgDate: Thu Oct 27 11:22:36 2016 +0900 4277504d986fSmrg 4278504d986fSmrg present: Check tiling info for flips 4279504d986fSmrg 4280504d986fSmrg The kernel driver doesn't handle flipping between buffers with 4281504d986fSmrg different tiling parameters correctly. 4282504d986fSmrg 4283504d986fSmrg Fixes display corruption with fullscreen apps using different tiling 4284504d986fSmrg modes (e.g. due to R600_DEBUG=notiling or R600_DEBUG=no2d) via DRI3. 4285504d986fSmrg 4286504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4287504d986fSmrg 4288504d986fSmrgcommit 3c1f4386ba7d0b6c16bdd2b2178f978f2f154ba8 4289504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4290504d986fSmrgDate: Wed Oct 26 16:19:01 2016 +0900 4291504d986fSmrg 4292504d986fSmrg Consume all available udev events at once 4293504d986fSmrg 4294504d986fSmrg We get multiple udev events for actions like docking a laptop into its 4295504d986fSmrg station or plugging a monitor to the station. By consuming as many 4296504d986fSmrg events as we can, we reduce the number of output re-evalutions. 4297504d986fSmrg 4298504d986fSmrg It depends on the timing how many events can be consumed at once. 4299504d986fSmrg 4300504d986fSmrg (Inspired by xserver commit 363f4273dd4aec3e26cc57ecb6c20f27e6c813d8) 4301504d986fSmrg (Ported from radeon commit 22b5ce9548393ba2ff73ee234ecd82eeaf0ef6c4) 4302504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4303504d986fSmrg 4304504d986fSmrgcommit c87dff3257e797cfd80d208c9a612b21978ff4eb 4305504d986fSmrgAuthor: Hans de Goede <hdegoede@redhat.com> 4306504d986fSmrgDate: Wed Oct 26 16:17:04 2016 +0900 4307504d986fSmrg 4308504d986fSmrg PRIME: Fix swapping of provider sink / source capabilities 4309504d986fSmrg 4310504d986fSmrg When a card has import capability it can be an offload _sink_, not a 4311504d986fSmrg source and vice versa for export capability. 4312504d986fSmrg 4313504d986fSmrg This went unnoticed sofar because most gpus have both import and export 4314504d986fSmrg capability. 4315504d986fSmrg 4316504d986fSmrg Signed-off-by: Hans de Goede <hdegoede@redhat.com> 4317504d986fSmrg (Ported from xserver commit 94a1c77259ce39ba59ad87615df39b570ffab435) 4318504d986fSmrg (Ported from radeon commit 82d3c8f5500d2a6fb1495e217a0b79c396f1534c) 4319504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4320504d986fSmrg 4321504d986fSmrgcommit 9c4416422f2d07dbfa7c0b18beb1353f122fc1a1 4322504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4323504d986fSmrgDate: Wed Oct 26 16:15:42 2016 +0900 4324504d986fSmrg 4325504d986fSmrg Always call PixmapStopDirtyTracking in drmmode_set_scanout_pixmap 4326504d986fSmrg 4327504d986fSmrg Otherwise, we may leak screen->pixmap_dirty_list entries if 4328504d986fSmrg drmmode_set_scanout_pixmap is called repatedly with ppix != NULL, which 4329504d986fSmrg can happen from RRReplaceScanoutPixmap. 4330504d986fSmrg 4331504d986fSmrg (Inspired by xserver commit b773a9c8126222e5fed2904d012fbf917a9f22fd) 4332504d986fSmrg (Ported from radeon commit 6c940446ddadf418ee4959e46fa552b6c1cf6704) 4333504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4334504d986fSmrg 4335504d986fSmrgcommit 0a91f11c03400e3f92a2b048505f39e7de7e87fc 4336504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4337504d986fSmrgDate: Wed Oct 26 16:14:45 2016 +0900 4338504d986fSmrg 4339504d986fSmrg Don't rely on randr_crtc->scanout_pixmap in drmmode_set_scanout_pixmap 4340504d986fSmrg 4341504d986fSmrg RRReplaceScanoutPixmap may set randr_crtc->scanout_pixmap = NULL before 4342504d986fSmrg we get here. 4343504d986fSmrg 4344504d986fSmrg (Inspired by xserver commit f4c37eeee7953df1fe0e3196eda452acf0078e61) 4345504d986fSmrg v2: Always return TRUE in the if (!ppix) block. 4346504d986fSmrg (Cherry picked from radeon commit 61df12e2377cbb19a19ca9d5624df8959822da9f) 4347504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4348504d986fSmrg 4349504d986fSmrgcommit b37f4774880bfd0cbe50273ac0d9c539d81995f9 4350504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4351504d986fSmrgDate: Tue Oct 25 16:30:46 2016 +0900 4352504d986fSmrg 4353504d986fSmrg Sayōnara, AM_MAINTAINER_MODE! 4354504d986fSmrg 4355504d986fSmrg If --enable-maintainer-mode got lost from config.status for any reason, 4356504d986fSmrg builds would fail in mysterious ways after changing between different 4357504d986fSmrg Git commits. 4358504d986fSmrg 4359504d986fSmrg There are more reasons for dropping it in the automake manual: 4360504d986fSmrg 4361504d986fSmrg https://www.gnu.org/software/automake/manual/html_node/maintainer_002dmode.html 4362504d986fSmrg 4363504d986fSmrg I'm not aware of any reason why --disable-maintainer-mode would ever be 4364504d986fSmrg useful with this project. 4365504d986fSmrg 4366504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4367504d986fSmrg (Cherry picked from radeon commit 49cf3b5032a7ce40afe514b7092440e3e19e05aa) 4368504d986fSmrg 4369504d986fSmrgcommit c8d9ad0e188d3da3a35006a00536d61e23305830 4370504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4371504d986fSmrgDate: Wed Oct 19 18:16:47 2016 +0900 4372504d986fSmrg 4373504d986fSmrg Order unique chipsets according to first appearance in ati_pciids.csv 4374504d986fSmrg 4375504d986fSmrg Instead of lexically. This makes it more likely for similar generations 4376504d986fSmrg to be close to each other in the list of unique chipsets. 4377504d986fSmrg 4378504d986fSmrg (Ported from radeon commit 1ce1b1656acc6211deb2091ff7f28d51b6daf86b, 4379504d986fSmrg plus change $numunique++ => ++$numunique to fix OLAND getting listed 4380504d986fSmrg twice) 4381504d986fSmrg 4382504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4383504d986fSmrg 4384504d986fSmrgcommit 7cc04035c55788261cda89a915c433c2add6cad9 4385504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4386504d986fSmrgDate: Wed Sep 28 15:59:22 2016 +0900 4387504d986fSmrg 4388504d986fSmrg Enable HW cursor support with PRIME slave output & Xorg > 1.18.99.901 4389504d986fSmrg 4390504d986fSmrg Supported since Xorg 1.18.99.2, but buggy until 1.18.99.901. 4391504d986fSmrg 4392504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4393504d986fSmrg 4394504d986fSmrgcommit d42773eb45baff5933730e26878a0b45fcf07b65 4395504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4396504d986fSmrgDate: Wed Sep 28 18:17:53 2016 +0900 4397504d986fSmrg 4398504d986fSmrg Rotate and reflect cursor hotspot position for drmModeSetCursor2 4399504d986fSmrg 4400504d986fSmrg We were always passing the hotspot position in the X screen coordinate 4401504d986fSmrg space, but drmModeSetCursor2 needs it in the CRTC coordinate space. The 4402504d986fSmrg wrong hotspot position would cause the kernel driver to adjust the 4403504d986fSmrg HW cursor position incorrectly when the hotspot position changed. 4404504d986fSmrg 4405504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4406504d986fSmrg 4407504d986fSmrgcommit bdee9f4dd4f21015e7696e06c4b485ab2b3a16dc 4408504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4409504d986fSmrgDate: Wed Aug 31 16:46:56 2016 +0900 4410504d986fSmrg 4411504d986fSmrg Add support for ScreenPtr::SyncSharedPixmap 4412504d986fSmrg 4413504d986fSmrg This allows deferring shared pixmap updates between different drivers. 4414504d986fSmrg 4415504d986fSmrg (Ported from radeon commit 53be26b00e83f871f0afd39caa5a7a1d6ec4aea1) 4416504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4417504d986fSmrg 4418504d986fSmrgcommit 97d7386caf7ba53d2cf398b8a9bb65d0a2a4770a 4419504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4420504d986fSmrgDate: Fri Sep 16 16:36:23 2016 +0900 4421504d986fSmrg 4422504d986fSmrg Untangle HAS_XORG_CONF_DIR / --with-xorg-conf-dir lines in configure.ac 4423504d986fSmrg 4424504d986fSmrg $sysconfigdir used to be part of the default --with-xorg-conf-dir value, 4425504d986fSmrg but it no longer is. 4426504d986fSmrg 4427504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4428504d986fSmrg 4429504d986fSmrgcommit aa8a3fa2468094cd37959179e8417ba7ba0a326c 4430504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4431504d986fSmrgDate: Fri Sep 16 15:59:16 2016 +0900 4432504d986fSmrg 4433504d986fSmrg Fix handling of configure option --with-xorg-conf-dir 4434504d986fSmrg 4435504d986fSmrg There were two problems: 4436504d986fSmrg 4437504d986fSmrg I accidentally changed the variable name in the AC_ARG_WITH stanza from 4438504d986fSmrg configdir to xorgconfigdir, so specifying --with-xorg-conf-dir wouldn't 4439504d986fSmrg work correctly. Fix this back to configdir. 4440504d986fSmrg 4441504d986fSmrg If neither --with-xorg-conf-dir nor --prefix is specified on the command 4442504d986fSmrg line, the $prefix variable doesn't contain "/usr/local" (the default 4443504d986fSmrg prefix) yet at this point but "NONE". So make install would attempt to 4444504d986fSmrg install 10-amdgpu.conf in ${DESTDIR}NONE/share/X11/xorg.conf.d/ . Fix 4445504d986fSmrg this by leaving ${prefix} verbatim in the default value, to be resolved 4446504d986fSmrg by make. 4447504d986fSmrg 4448504d986fSmrg Also print the configdir value along with the values of other similar 4449504d986fSmrg configuration variables. 4450504d986fSmrg 4451504d986fSmrg Reported-by: Timo Aaltonen <tjaalton@debian.org> 4452504d986fSmrg Reviewed-by: Julien Cristau <jcristau@debian.org> 4453504d986fSmrg 4454504d986fSmrgcommit cd3acb75718dfd42dd25d58b4e7bd4db27b659d8 4455504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4456504d986fSmrgDate: Wed Sep 14 18:33:42 2016 +0900 4457504d986fSmrg 4458504d986fSmrg Use --with-xorg-conf-dir=$prefix/share/X11/xorg.conf.d by default 4459504d986fSmrg 4460504d986fSmrg We were using the result of `pkg-config --variable=sysconfigdir 4461504d986fSmrg xorg-server` before, which may not be inside $prefix, so make install 4462504d986fSmrg might fail for 10-amdgpu.conf . 4463504d986fSmrg 4464504d986fSmrg Fixes make distcheck in that case, and possibly also 10-amdgpu.conf 4465504d986fSmrg seemingly missing from some distribution packages. 4466504d986fSmrg 4467504d986fSmrg This matches what some (though not all) input drivers are doing for their 4468504d986fSmrg xorg.conf.d snippets. 4469504d986fSmrg 4470504d986fSmrgcommit 0f8df8584ad61a3e47fe303b34cd7b0c4ed08bb0 4471504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4472504d986fSmrgDate: Thu Sep 8 18:14:49 2016 +0900 4473504d986fSmrg 4474504d986fSmrg Make TearFree effective with PRIME slave scanout 4475504d986fSmrg 4476504d986fSmrg TearFree can now prevent tearing with any possible display 4477504d986fSmrg configuration. 4478504d986fSmrg 4479504d986fSmrg Note that there may still be inter-GPU tearing if the primary GPU uses 4480504d986fSmrg a different driver. 4481504d986fSmrg 4482504d986fSmrg (Ported from radeon commit 38797a33117222dadbc89e5f21ed8cd5deef9bea) 4483504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4484504d986fSmrg 4485504d986fSmrgcommit d6feed2cd78fe879aba4860a6d9bc2e388b9f135 4486504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4487504d986fSmrgDate: Thu Sep 8 17:56:24 2016 +0900 4488504d986fSmrg 4489504d986fSmrg Synchronize scanout pixmaps for TearFree 4490504d986fSmrg 4491504d986fSmrg Copy the damaged areas which are still valid in the other scanout pixmap 4492504d986fSmrg from there, then only copy the remaining damaged area from the screen 4493504d986fSmrg pixmap. 4494504d986fSmrg 4495504d986fSmrg This is slightly more efficient (only needs one Damage record instead of 4496504d986fSmrg two, and only needs to copy each screen update across PCIe once with 4497504d986fSmrg ShadowPrimary and a discrete GPU), and will be significantly more 4498504d986fSmrg efficient for PRIME with the following change. 4499504d986fSmrg 4500504d986fSmrg (Ported from radeon commit eda1f3df6aaed683036369fe8820da4dac3c2ae2) 4501504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4502504d986fSmrg 4503504d986fSmrgcommit 4927b84ec84bc0cb5055686cca6be54390f82803 4504504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4505504d986fSmrgDate: Thu Sep 8 17:52:25 2016 +0900 4506504d986fSmrg 4507504d986fSmrg Move up amdgpu_scanout_extents_intersect 4508504d986fSmrg 4509504d986fSmrg Will be needed higher up by the following changes. No functional change. 4510504d986fSmrg 4511504d986fSmrg (Ported from radeon commit 2f6e5fb15f1a9ce523c85550e493f8bda9d0c00f) 4512504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4513504d986fSmrg 4514504d986fSmrgcommit 1c725f63961746258f6138b47037ec18bf508d78 4515504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4516504d986fSmrgDate: Thu Sep 8 17:45:32 2016 +0900 4517504d986fSmrg 4518504d986fSmrg Factor out transform_region helper 4519504d986fSmrg 4520504d986fSmrg (Ported from radeon commit 5a57005178fc13b6f7e513458ca6dae72a3e5783) 4521504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4522504d986fSmrg 4523504d986fSmrgcommit c92842764f95fa09e145d81f80e9fa39ea8c453c 4524504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4525504d986fSmrgDate: Thu Sep 8 17:26:18 2016 +0900 4526504d986fSmrg 4527504d986fSmrg Only copy from screen pixmap to shared pixmap on demand for slave scanout 4528504d986fSmrg 4529504d986fSmrg Only copy once for each time we update the corresponding scanout pixmap. 4530504d986fSmrg This can significantly reduce the bandwidth usage when there are 4531504d986fSmrg frequent updates to the screen pixmap. 4532504d986fSmrg 4533504d986fSmrg This initial implementation only works when both the master and slave 4534504d986fSmrg screens use this driver. 4535504d986fSmrg 4536504d986fSmrg (Ported from radeon commit 99232f64db52812a843cd616d263d3a6b90eef3d) 4537504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4538504d986fSmrg 4539504d986fSmrgcommit 61ceefe17fe9e6ffbaaad0e216b2bd37fd39f47d 4540504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4541504d986fSmrgDate: Thu Sep 8 17:15:03 2016 +0900 4542504d986fSmrg 4543504d986fSmrg Track damage accurately for RandR 1.4 slave scanout 4544504d986fSmrg 4545504d986fSmrg This further reduces the PCIe bandwidth usage. 4546504d986fSmrg 4547504d986fSmrg (Ported from radeon commit b0867063abb197b9134166706d99fcbe5f204bb5, 4548504d986fSmrg plus leak fix from 5a57005178fc13b6f7e513458ca6dae72a3e5783) 4549504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4550504d986fSmrg 4551504d986fSmrgcommit 6d31fb124d4418e64c949bde9ed1facf95967762 4552504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4553504d986fSmrgDate: Thu Sep 8 17:04:05 2016 +0900 4554504d986fSmrg 4555504d986fSmrg Handle RandR 1.4 slave dirty updates via amdgpu_drm_queue 4556504d986fSmrg 4557504d986fSmrg This reduces PCIe bandwidth usage and tearing. 4558504d986fSmrg 4559504d986fSmrg (Ported from radeon commit ad0a0656dd0e74683e6d7789decba827aa29c221) 4560504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4561504d986fSmrg 4562504d986fSmrgcommit b10ecdbd89b0a60a990c78c3e53bab6c4c96fe9f 4563504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4564504d986fSmrgDate: Thu Sep 8 16:48:59 2016 +0900 4565504d986fSmrg 4566504d986fSmrg Use drmmode_crtc_scanout_* helpers for RandR 1.4 scanout pixmaps 4567504d986fSmrg 4568504d986fSmrg This should allow using multiple CRTCs via RandR 1.4 even with xserver 4569504d986fSmrg < 1.17. It also simplifies the code a little, and paves the way for 4570504d986fSmrg following changes. 4571504d986fSmrg 4572504d986fSmrg (Ported from radeon commits 4cfa4615f79f64062e5e771cd45dd7048f48b4f6 4573504d986fSmrg and a92c27484703abc7c410b6ae0e4b8d1efbbb8e6f) 4574504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4575504d986fSmrg 4576504d986fSmrgcommit 9565981f751b0884cbfa885b8f3af3d41a965a2b 4577504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4578504d986fSmrgDate: Wed Sep 7 18:49:54 2016 +0900 4579504d986fSmrg 4580504d986fSmrg Wait for pending flips to complete before turning off an output or CRTC 4581504d986fSmrg 4582504d986fSmrg At least with older kernels, the flip may never complete otherwise, 4583504d986fSmrg which can result in us hanging in drmmode_set_mode_major. 4584504d986fSmrg 4585504d986fSmrg Fixes: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-ati/+bug/1577170 4586504d986fSmrg 4587504d986fSmrg (Ported from radeon commits 9090309e057dc703d1a5bffd88e6cae14108cfc3, 4588504d986fSmrg e520ce0ec0adf91ddce5c932d4b3f9477fd49304, 4589504d986fSmrg a36fdaff40d5b4795a1400c348a80eee94892212 and 4590504d986fSmrg 4bd2d01552f18153afa03a8947b22eebf3d67c6b) 4591504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4592504d986fSmrg 4593504d986fSmrgcommit c7d27c94cb656899746898c2e55407c3e3d7cdc8 4594504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4595504d986fSmrgDate: Wed Sep 7 18:28:23 2016 +0900 4596504d986fSmrg 4597504d986fSmrg Keep track of damage event related flushes per-client 4598504d986fSmrg 4599504d986fSmrg This further reduces the compositing slowdown due to flushing overhead, 4600504d986fSmrg by only flushing when the X server actually sends XDamageNotify events 4601504d986fSmrg to a client, and there hasn't been a flush yet in the meantime. 4602504d986fSmrg 4603504d986fSmrg (Ported from radeon commit 121a6de72da5fcf9a32408eff36b2235f3dfbcfe) 4604504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4605504d986fSmrg 4606504d986fSmrgcommit 58773d1945cfa8155d8a6c5eb3f95097535604ef 4607504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4608504d986fSmrgDate: Wed Sep 7 18:14:10 2016 +0900 4609504d986fSmrg 4610504d986fSmrg Use EventCallback to avoid flushing every time in the FlushCallback 4611504d986fSmrg 4612504d986fSmrg We only need to flush for XDamageNotify events. 4613504d986fSmrg 4614504d986fSmrg Significantly reduces compositing slowdown due to flushing overhead, in 4615504d986fSmrg particular with glamor. 4616504d986fSmrg 4617504d986fSmrg (Ported from radeon commit 9a1afbf61fbb2827c86bd86d295fa0848980d60b) 4618504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4619504d986fSmrg 4620504d986fSmrgcommit d166d04f6951f6a48d7d5ce5d31bba857fe0cb06 4621504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4622504d986fSmrgDate: Wed Sep 7 18:03:05 2016 +0900 4623504d986fSmrg 4624504d986fSmrg Add explicit AMDGPU_DRM_QUEUE_ERROR define 4625504d986fSmrg 4626504d986fSmrg Should make the amdgpu_drm_queue_alloc error handling clearer, and gets 4627504d986fSmrg rid of a compile warning about it returning NULL. 4628504d986fSmrg 4629504d986fSmrg (Ported from radeon commit a37af701768b12d86868a831a79f1e02ee4968cf) 4630504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4631504d986fSmrg 4632504d986fSmrgcommit 6a1ba044c2b71081e6060d0c096917d6238f2145 4633504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4634504d986fSmrgDate: Mon Aug 29 16:43:59 2016 +0900 4635504d986fSmrg 4636504d986fSmrg Only list each unique chipset family once in the log file 4637504d986fSmrg 4638504d986fSmrg Acked-by: Christian König <christian.koenig@amd.com> 4639504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4640504d986fSmrg 4641504d986fSmrgcommit 7d050d15d49ef25e86e7abe88dafb52370715640 4642504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4643504d986fSmrgDate: Mon Aug 29 16:13:20 2016 +0900 4644504d986fSmrg 4645504d986fSmrg Add missing Kaveri PCI ID (1318) 4646504d986fSmrg 4647504d986fSmrg Found by comparing src/pcidb/ati_pciids.csv with xf86-video-ati. 4648504d986fSmrg 4649504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4650504d986fSmrg 4651504d986fSmrgcommit aa5492660958e359bdc2107cba9a211ff988c90e 4652504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4653504d986fSmrgDate: Mon Aug 29 15:52:48 2016 +0900 4654504d986fSmrg 4655504d986fSmrg Add Mullins PCI IDs 4656504d986fSmrg 4657504d986fSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97472 4658504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4659504d986fSmrg 4660504d986fSmrgcommit 73c8dc000ad6b2b53ba3aa7155f5e8f6b55623b7 4661504d986fSmrgAuthor: Qiang Yu <Qiang.Yu@amd.com> 4662504d986fSmrgDate: Mon Aug 22 19:13:26 2016 +0800 4663504d986fSmrg 4664504d986fSmrg DRI2: Fix amdgpu_dri2_exchange_buffers width/height copy'n'paste error 4665504d986fSmrg 4666504d986fSmrg Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> 4667504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4668504d986fSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 4669504d986fSmrg 4670504d986fSmrgcommit 5a4d3267ac3823fe58b51b0b9075b82375d7180c 4671504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4672504d986fSmrgDate: Wed Aug 17 18:57:01 2016 +0900 4673504d986fSmrg 4674504d986fSmrg Remove unused lut_r/g/b arrays from drmmode_crtc_private_rec 4675504d986fSmrg 4676504d986fSmrg Fixes: 1091f28e1fa2 ("Remove drmmode_load_palette") 4677504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4678504d986fSmrg 4679504d986fSmrgcommit c4364520691d18961f0a6b77071baeeffaa80a11 4680504d986fSmrgAuthor: Marek Olšák <marek.olsak@amd.com> 4681504d986fSmrgDate: Fri Aug 19 12:42:38 2016 +0200 4682504d986fSmrg 4683504d986fSmrg Fix cursor size for SI 4684504d986fSmrg 4685504d986fSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 4686504d986fSmrg Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net> 4687504d986fSmrg 4688504d986fSmrgcommit 2eb5d77b841e55e7328df4b95c0d41fec30ce10f 4689504d986fSmrgAuthor: Ronie Salgado <roniesalg@gmail.com> 4690504d986fSmrgDate: Thu Feb 11 03:00:14 2016 -0300 4691504d986fSmrg 4692504d986fSmrg Add SI PCI IDs 4693504d986fSmrg 4694504d986fSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 4695504d986fSmrg 4696504d986fSmrgcommit abd1a7901c95e4bc78415cf1b7923623b9177152 4697504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4698504d986fSmrgDate: Wed Jun 29 17:54:26 2016 +0900 4699504d986fSmrg 4700504d986fSmrg DRI2: Add interpolated_vblanks in amdgpu_dri2_get_crtc_msc 4701504d986fSmrg 4702504d986fSmrg We need that in amdgpu_dri2_drawable_crtc as well for priv->vblank_delta 4703504d986fSmrg to work as intended. 4704504d986fSmrg 4705504d986fSmrg amdgpu_dri2_get_msc was already doing this. 4706504d986fSmrg 4707504d986fSmrg Fixes hangs in some cases when using VDPAU via DRI2 and moving the 4708504d986fSmrg window between CRTCs. 4709504d986fSmrg 4710504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4711504d986fSmrg 4712504d986fSmrgcommit 978242977e5dc905e1d5a46b1b0d34b356c7af26 4713504d986fSmrgAuthor: Qiang Yu <Qiang.Yu@amd.com> 4714504d986fSmrgDate: Wed Jul 13 19:25:12 2016 +0800 4715504d986fSmrg 4716504d986fSmrg Fix amdgpu_mode_hotplug crash on multi GPU platform. 4717504d986fSmrg 4718504d986fSmrg On multi GPU platform, some screen is created by other GPU DDX. 4719504d986fSmrg 4720504d986fSmrg Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> 4721504d986fSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 4722504d986fSmrg 4723504d986fSmrgcommit fdd1209e26128b3e894f2867fac3a1b08fe1f29e 4724504d986fSmrgAuthor: Keith Packard <keithp@keithp.com> 4725504d986fSmrgDate: Tue Jul 19 09:16:32 2016 -0700 4726504d986fSmrg 4727504d986fSmrg Use NotifyFd for drm fd 4728504d986fSmrg 4729504d986fSmrg NotifyFd is available after API 22, and must be used after API 23. 4730504d986fSmrg 4731504d986fSmrg Signed-off-by: Keith Packard <keithp@keithp.com> 4732504d986fSmrg 4733504d986fSmrgcommit 17c0cf49746a20fb25610c24a40c441f88c08365 4734504d986fSmrgAuthor: Adam Jackson <ajax@redhat.com> 4735504d986fSmrgDate: Tue Jul 19 10:03:56 2016 -0400 4736504d986fSmrg 4737504d986fSmrg Adapt Block/WakeupHandler signature for ABI 23 4738504d986fSmrg 4739504d986fSmrg Signed-off-by: Adam Jackson <ajax@redhat.com> 4740504d986fSmrg 4741504d986fSmrgcommit b5e2b964b7884c205a7c0fa578e05e867c176fcc 4742504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4743504d986fSmrgDate: Wed Jul 6 17:46:56 2016 +0900 4744504d986fSmrg 4745504d986fSmrg Only use RandR APIs if RandR is enabled 4746504d986fSmrg 4747504d986fSmrg Fixes crash with Xinerama enabled, which disables RandR. 4748504d986fSmrg 4749504d986fSmrg Fixes: https://bugs.debian.org/827984 4750504d986fSmrg 4751504d986fSmrg (Ported from radeon commit 3be841d0ae7d505cef325993205b12d15e98dba9) 4752504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4753504d986fSmrg 4754504d986fSmrgcommit 84496ebc89a9973347c774c13ff6f4667fcdbe69 4755504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4756504d986fSmrgDate: Wed Jul 6 17:43:36 2016 +0900 4757504d986fSmrg 4758504d986fSmrg Add .editorconfig file 4759504d986fSmrg 4760504d986fSmrg Basically a conversion from .dir-locals.el. EditorConfig supports many 4761504d986fSmrg more editors and IDEs. 4762504d986fSmrg 4763504d986fSmrg (Ported from radeon commit aa07b365d7b0610411e118f105e49daff5f5a5cf) 4764504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4765504d986fSmrg 4766504d986fSmrgcommit a576430526cbc404de64b30e1377a356644e8024 4767504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4768504d986fSmrgDate: Fri Jun 24 16:28:25 2016 +0900 4769504d986fSmrg 4770504d986fSmrg Clear damage in amdgpu_scanout_update if it doesn't intersect the CRTC 4771504d986fSmrg 4772504d986fSmrg There's no need to test that same damage again. 4773504d986fSmrg 4774504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4775504d986fSmrg 4776504d986fSmrgcommit ede7f2bcae63be65e05e3029bfe7c742e5978932 4777504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4778504d986fSmrgDate: Fri Jun 24 16:19:15 2016 +0900 4779504d986fSmrg 4780504d986fSmrg Remove w/h parameters from amdgpu_scanout_extents_intersect 4781504d986fSmrg 4782504d986fSmrg We can use the dimensions of the CRTC's mode instead. 4783504d986fSmrg 4784504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4785504d986fSmrg 4786504d986fSmrgcommit bf000ea7ef91f5ecb59fc3c1ab8ed9eddcc0841d 4787504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4788504d986fSmrgDate: Thu Jun 23 17:28:16 2016 +0900 4789504d986fSmrg 4790504d986fSmrg Make the dedicated scanout mechanism work with arbitrary transforms v2 4791504d986fSmrg 4792504d986fSmrg This makes TearFree work with arbitrary transforms, and makes transforms 4793504d986fSmrg work better even without TearFree, with xserver >= 1.12. 4794504d986fSmrg 4795504d986fSmrg v2: Preserve clamping of transformed damage extents to CRTC boundaries. 4796504d986fSmrg 4797504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4798504d986fSmrg 4799504d986fSmrgcommit d96dabc71b1b32dc4b422a9633cdd4e0e95da052 4800504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4801504d986fSmrgDate: Thu Jun 23 16:27:45 2016 +0900 4802504d986fSmrg 4803504d986fSmrg Destroy all dedicated scanout buffers during CloseScreen 4804504d986fSmrg 4805504d986fSmrg Fixes leaking active scanout buffers across a server reset, which also 4806504d986fSmrg fixes server reset with glamor and active scanout buffers. 4807504d986fSmrg 4808504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4809504d986fSmrg 4810504d986fSmrgcommit 1091f28e1fa239ee1a973d84a8376fa4a95d7247 4811504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4812504d986fSmrgDate: Thu Jun 23 12:47:04 2016 +0900 4813504d986fSmrg 4814504d986fSmrg Remove drmmode_load_palette 4815504d986fSmrg 4816504d986fSmrg Not used by any supported version of xserver. 4817504d986fSmrg 4818504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4819504d986fSmrg 4820504d986fSmrgcommit 4d506c23c9a628204fa23607931557b07ada3e31 4821504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4822504d986fSmrgDate: Wed Jun 22 17:16:24 2016 +0900 4823504d986fSmrg 4824504d986fSmrg present: Separate checks for flips vs unflips v2 4825504d986fSmrg 4826504d986fSmrg All unflip checks apply to flips as well, but not vice versa. 4827504d986fSmrg 4828504d986fSmrg v2: Add comment above amdgpu_present_check_unflip (Alex) 4829504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4830504d986fSmrg 4831504d986fSmrgcommit decabd574f90d3df397c80ec931b3fde8a4afb49 4832504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4833504d986fSmrgDate: Wed Jun 22 17:43:41 2016 +0900 4834504d986fSmrg 4835504d986fSmrg dri2: Don't allow flipping when using a dedicated scanout buffer 4836504d986fSmrg 4837504d986fSmrg Fixes issues when mixing rotation and page flipping with current xserver 4838504d986fSmrg Git master. 4839504d986fSmrg 4840504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4841504d986fSmrg 4842504d986fSmrgcommit 3ed28ce7cd26f89969617ba901ff253091d0d469 4843504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4844504d986fSmrgDate: Wed Jun 22 16:54:01 2016 +0900 4845504d986fSmrg 4846504d986fSmrg present: Don't allow flipping when using a dedicated scanout buffer 4847504d986fSmrg 4848504d986fSmrg Fixes issues when mixing rotation and page flipping with current xserver 4849504d986fSmrg Git master. 4850504d986fSmrg 4851504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4852504d986fSmrg 4853504d986fSmrgcommit 9c3324715fd395fd486ea341654d78f4f298b97f 4854504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4855504d986fSmrgDate: Wed Jun 22 16:12:32 2016 +0900 4856504d986fSmrg 4857504d986fSmrg Make sure drmmode_crtc->scanout[] are destroyed when not needed 4858504d986fSmrg 4859504d986fSmrg We failed to do this when going back to scanning out directly from the 4860504d986fSmrg screen pixmap. 4861504d986fSmrg 4862504d986fSmrg As a bonus, since we now destroy drmmode_crtc->scanout[] after setting 4863504d986fSmrg the new scanout buffer, we may avoid the CRTC turning off intermittently 4864504d986fSmrg in this case. 4865504d986fSmrg 4866504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4867504d986fSmrg 4868504d986fSmrgcommit 3bce0519a4008cf87c0e31a7a579e10f5dcdd2f3 4869504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4870504d986fSmrgDate: Wed Jun 22 16:19:07 2016 +0900 4871504d986fSmrg 4872504d986fSmrg Simplify drmmode_set_mode_major error handling 4873504d986fSmrg 4874504d986fSmrg Initialize ret = FALSE and only set it to TRUE when we've succeeded. 4875504d986fSmrg 4876504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4877504d986fSmrg 4878504d986fSmrgcommit a3ca1500703837cbb8d49c554199a25dea7d5e1e 4879504d986fSmrgAuthor: Hans de Goede <hdegoede@redhat.com> 4880504d986fSmrgDate: Wed Jun 1 15:14:32 2016 +0200 4881504d986fSmrg 4882504d986fSmrg Only add main fb if necessary 4883504d986fSmrg 4884504d986fSmrg If we're doing reverse-prime; or doing rotation the main fb is not used, 4885504d986fSmrg and there is no reason to add it in this case. 4886504d986fSmrg 4887504d986fSmrg Signed-off-by: Hans de Goede <hdegoede@redhat.com> 4888504d986fSmrg (Ported from xserver commit 4313122dea0df9affc280ee698e929489061ccc6) 4889504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4890504d986fSmrg 4891504d986fSmrgcommit 9ca1c24235ff5ab2e028333fc326e2eff008c574 4892504d986fSmrgAuthor: Hans de Goede <hdegoede@redhat.com> 4893504d986fSmrgDate: Wed Jun 1 15:11:05 2016 +0200 4894504d986fSmrg 4895504d986fSmrg Remove unnecessary fb addition from drmmode_xf86crtc_resize 4896504d986fSmrg 4897504d986fSmrg drmmode_set_mode_major() is the only user of drmmode->fb_id and will 4898504d986fSmrg create it if necessary. 4899504d986fSmrg 4900504d986fSmrg Signed-off-by: Hans de Goede <hdegoede@redhat.com> 4901504d986fSmrg (Ported from xserver commit 877453212166fdc912e0d687cdecee11aba563b5) 4902504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4903504d986fSmrg 4904504d986fSmrgcommit 0d42082108c264568e2aadd15ace70e72388bc65 4905504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4906504d986fSmrgDate: Wed Jun 22 19:01:03 2016 +0900 4907504d986fSmrg 4908504d986fSmrg Call amdgpu_glamor_create_screen_resources after ModifyPixmapHeader 4909504d986fSmrg 4910504d986fSmrg Otherwise, glamor doesn't pick up the new screen pixmap size and 4911504d986fSmrg continues using the old size, leaving garbage in some areas after 4912504d986fSmrg enlarging the screen. 4913504d986fSmrg 4914504d986fSmrg Fixes regression from commit c315c00e44afc91a7c8e2eab5af836d9643ebb88 4915504d986fSmrg ("Propagate failure from amdgpu_set_pixmap_bo"). 4916504d986fSmrg 4917504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4918504d986fSmrg 4919504d986fSmrgcommit e7e71eabbbccdeabcae1bc6fffabc27c272090ab 4920504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4921504d986fSmrgDate: Mon Mar 28 18:49:15 2016 +0900 4922504d986fSmrg 4923504d986fSmrg Adapt to XF86_CRTC_VERSION 7 4924504d986fSmrg 4925504d986fSmrg Now the HW cursor can be used with TearFree rotation. 4926504d986fSmrg 4927504d986fSmrg This also allows always using the separate scanout pixmap mechanism for 4928504d986fSmrg rotation, so that should be much smoother even without TearFree enabled. 4929504d986fSmrg 4930504d986fSmrg (Ported from radeon commit 7835558acdce318130ba4a09ef936fd675e3197d) 4931504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4932504d986fSmrg 4933504d986fSmrgcommit 7f7f9825caf3983902491da27c16d14cd8bf9b7d 4934504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4935504d986fSmrgDate: Mon Jun 13 18:58:49 2016 +0900 4936504d986fSmrg 4937504d986fSmrg Free priv in amdgpu_set_pixmap_bo also if priv->bo == NULL 4938504d986fSmrg 4939504d986fSmrg Fixes memory leak when destroying pixmaps with priv->bo == NULL. 4940504d986fSmrg 4941504d986fSmrg Reported-by: Qiang Yu <qiang.yu@amd.com> 4942504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4943504d986fSmrg 4944504d986fSmrgcommit 397aedafee437c125b8ac1feafb1c3b466842aeb 4945504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4946504d986fSmrgDate: Mon Jun 13 18:34:11 2016 +0900 4947504d986fSmrg 4948504d986fSmrg glamor: Fix leak of pixmap private when replacing BO 4949504d986fSmrg 4950504d986fSmrg Reported-by: Qiang Yu <qiang.yu@amd.com> 4951504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4952504d986fSmrg 4953504d986fSmrgcommit 5b4a8a7a6ed70a50be252fa9b34d3b3a17cdf91a 4954504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4955504d986fSmrgDate: Tue Jun 14 19:00:18 2016 +0900 4956504d986fSmrg 4957504d986fSmrg Use amdgpu_set_pixmap_bo in amdgpu_set_shared_pixmap_backing 4958504d986fSmrg 4959504d986fSmrg Fixes leaking any existing pixmap private. 4960504d986fSmrg 4961504d986fSmrg While we're at it, also fix leaking the GBM BO if 4962504d986fSmrg amdgpu_glamor_create_textured_pixmap fails. 4963504d986fSmrg 4964504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4965504d986fSmrg 4966504d986fSmrgcommit c315c00e44afc91a7c8e2eab5af836d9643ebb88 4967504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4968504d986fSmrgDate: Wed Jun 15 17:20:36 2016 +0900 4969504d986fSmrg 4970504d986fSmrg Propagate failure from amdgpu_set_pixmap_bo 4971504d986fSmrg 4972504d986fSmrg Preparation for the following fixes. 4973504d986fSmrg 4974504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4975504d986fSmrg 4976504d986fSmrgcommit 74602c4221e3c84949fd69f690cbc66dcae384ea 4977504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4978504d986fSmrgDate: Tue Jun 14 18:53:34 2016 +0900 4979504d986fSmrg 4980504d986fSmrg glamor: Make amdgpu_glamor_create_textured_pixmap take amdgpu_buffer* 4981504d986fSmrg 4982504d986fSmrg Preparation for the following fixes. 4983504d986fSmrg 4984504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4985504d986fSmrg 4986504d986fSmrgcommit 0007c2f018ba663303d91d847e7c085269a23062 4987504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 4988504d986fSmrgDate: Wed Jun 8 16:27:33 2016 +0900 4989504d986fSmrg 4990504d986fSmrg glamor: Reallocate linear pixmap BO if necessary for DRI2 PRIME 4991504d986fSmrg 4992504d986fSmrg Fixes corruption when using DRI2 PRIME render offloading with the master 4993504d986fSmrg screen using this driver. 4994504d986fSmrg 4995504d986fSmrg Reported-by: Qiang Yu <qiang.yu@amd.com> 4996504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 4997504d986fSmrg Tested-by: Qiang Yu <qiang.yu@amd.com> 4998504d986fSmrg 4999504d986fSmrgcommit 5518bf5d793439b5bab369e5fc18de9a4a3b9dd6 5000504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5001504d986fSmrgDate: Wed Jun 8 16:44:26 2016 +0900 5002504d986fSmrg 5003504d986fSmrg Move DRI2's local fixup_glamor helper to amdgpu_glamor_set_pixmap_bo v2 5004504d986fSmrg 5005504d986fSmrg So it can be used outside of the DRI2 code. 5006504d986fSmrg 5007504d986fSmrg v2: Keep pixmap refcnt increment in amdgpu_dri2_create_buffer2 (Qiang Yu) 5008504d986fSmrg 5009504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5010504d986fSmrg Tested-by: Qiang Yu <qiang.yu@amd.com> (v1) 5011504d986fSmrg 5012504d986fSmrgcommit 641f4647b7f51dfd2da330376cd10fa9702b6423 5013504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5014504d986fSmrgDate: Wed Jun 8 16:39:10 2016 +0900 5015504d986fSmrg 5016504d986fSmrg Consolidate get_drawable_pixmap helper 5017504d986fSmrg 5018504d986fSmrg There were two static helpers for the same purpose. Consolidate them 5019504d986fSmrg into a single inline helper which can be used anywhere. 5020504d986fSmrg 5021504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5022504d986fSmrg Tested-by: Qiang Yu <qiang.yu@amd.com> 5023504d986fSmrg 5024504d986fSmrgcommit 8e40f190e4704c2802bf0f073f17e742786d0f18 5025504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5026504d986fSmrgDate: Wed Jun 8 16:00:21 2016 +0900 5027504d986fSmrg 5028504d986fSmrg Add amdgpu_pixmap_get_tiling_info 5029504d986fSmrg 5030504d986fSmrg Retrieves the tiling information about a pixmap BO from the kernel 5031504d986fSmrg driver. 5032504d986fSmrg 5033504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5034504d986fSmrg Tested-by: Qiang Yu <qiang.yu@amd.com> 5035504d986fSmrg 5036504d986fSmrgcommit e7eeb6ad1133b6023d34b4489959ae330a8e15dd 5037504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5038504d986fSmrgDate: Wed Jun 8 15:42:01 2016 +0900 5039504d986fSmrg 5040504d986fSmrg Remove amdgpu_share_pixmap_backing 5041504d986fSmrg 5042504d986fSmrg Not used anymore. 5043504d986fSmrg 5044504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5045504d986fSmrg Tested-by: Qiang Yu <qiang.yu@amd.com> 5046504d986fSmrg 5047504d986fSmrgcommit b36c77695ba77b59a0ccd868454e3af4fc04d5ff 5048504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5049504d986fSmrgDate: Wed Jun 8 15:38:57 2016 +0900 5050504d986fSmrg 5051504d986fSmrg glamor: Fix amdgpu_glamor_share_pixmap_backing for priv->bo == NULL 5052504d986fSmrg 5053504d986fSmrg Fixes crash when running a compositor and DRI_PRIME client via DRI2. 5054504d986fSmrg 5055504d986fSmrg Reported-by: Qiang Yu <qiang.yu@amd.com> 5056504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5057504d986fSmrg Tested-by: Qiang Yu <qiang.yu@amd.com> 5058504d986fSmrg 5059504d986fSmrgcommit 60ced5026ebc34d9f32c7618430b6a7ef7c8eb4b 5060504d986fSmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 5061504d986fSmrgDate: Tue May 17 16:59:41 2016 -0400 5062504d986fSmrg 5063504d986fSmrg add missing bonaire pci id 5064504d986fSmrg 5065504d986fSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 5066504d986fSmrg 5067504d986fSmrgcommit 8e89448ee00da16e05e6777f34bb75d2dd6f7025 5068504d986fSmrgAuthor: Flora Cui <Flora.Cui@amd.com> 5069504d986fSmrgDate: Tue May 17 11:02:09 2016 +0800 5070504d986fSmrg 5071504d986fSmrg Add more Polaris 11 PCI IDs 5072504d986fSmrg 5073504d986fSmrg Signed-off-by: Flora Cui <Flora.Cui@amd.com> 5074504d986fSmrg Reviewed-by: Christian König <christian.koenig@amd.com> 5075504d986fSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 5076504d986fSmrg 5077504d986fSmrgcommit a59b23d64285741a7a25e314343f6261046d980f 5078504d986fSmrgAuthor: Flora Cui <Flora.Cui@amd.com> 5079504d986fSmrgDate: Mon May 16 17:25:34 2016 +0800 5080504d986fSmrg 5081504d986fSmrg Add more Polaris 10 PCI IDs 5082504d986fSmrg 5083504d986fSmrg Signed-off-by: Flora Cui <Flora.Cui@amd.com> 5084504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5085504d986fSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5086504d986fSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 5087504d986fSmrg 5088504d986fSmrgcommit 14606e127f4b6eb0b00fd42cec13d524a67e4c4a 5089504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5090504d986fSmrgDate: Thu May 12 16:38:56 2016 +0900 5091504d986fSmrg 5092504d986fSmrg Handle Zaphod mode correctly in amdgpu_mode_hotplug 5093504d986fSmrg 5094504d986fSmrg We need to scan both screens of the entity for existing connectors, and 5095504d986fSmrg enumerate DVI & HDMI connectors consistently regardless of which screen 5096504d986fSmrg they're assigned to. 5097504d986fSmrg 5098504d986fSmrg Fixes crash when hot-(un)plugging connectors in Zaphod mode. 5099504d986fSmrg 5100504d986fSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93415 5101504d986fSmrg (Ported from radeon commit c801f9f10a5d72d935faf21e72f7e7808fb4f05f) 5102504d986fSmrg 5103504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5104504d986fSmrg 5105504d986fSmrgcommit 861da1d5c243f51d6c1f76e5b13e5184aa608776 5106504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5107504d986fSmrgDate: Thu May 12 16:34:30 2016 +0900 5108504d986fSmrg 5109504d986fSmrg Enable DRI3 by default when building for Xorg >= 1.18.3 5110504d986fSmrg 5111504d986fSmrg Seems to work well enough in general now. 5112504d986fSmrg 5113504d986fSmrg (Ported from radeon commit 1181b9c582f10b6c523e4b2988e2ce87ecf3d367) 5114504d986fSmrg 5115504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5116504d986fSmrg 5117504d986fSmrgcommit 86f991838824494e68ac277fa27cbd88c23a5ee8 5118504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5119504d986fSmrgDate: Tue May 10 15:57:04 2016 +0900 5120504d986fSmrg 5121504d986fSmrg present: Support async flips 5122504d986fSmrg 5123504d986fSmrg The xserver Present code only calls radeon_present_flip with 5124504d986fSmrg sync_flip=FALSE if radeon_present_screen_init sets 5125504d986fSmrg PresentCapabilityAsync, and the latter only sets it if the kernel driver 5126504d986fSmrg advertises support for async flips. 5127504d986fSmrg 5128504d986fSmrg (Ported from radeon commit 1ca677309720e2f6c953c9e76f5b34c22a4416c6) 5129504d986fSmrg 5130504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5131504d986fSmrg 5132504d986fSmrgcommit 744ac5faff7f58e26fa76974b6bdc345ea4c7c79 5133504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5134504d986fSmrgDate: Tue May 10 15:47:55 2016 +0900 5135504d986fSmrg 5136504d986fSmrg Add support for async flips to radeon_do_pageflip 5137504d986fSmrg 5138504d986fSmrg Will be used by the next change. No functional change here. 5139504d986fSmrg 5140504d986fSmrg (Ported from radeon commit 90a915c62d012e99193833aecc93974e68880c60) 5141504d986fSmrg 5142504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5143504d986fSmrg 5144504d986fSmrgcommit 4822ec7a23d2253c88bc403f17abb6d7a053528c 5145504d986fSmrgAuthor: Flora Cui <flora.cui@amd.com> 5146504d986fSmrgDate: Tue May 10 17:14:00 2016 +0900 5147504d986fSmrg 5148504d986fSmrg add strato pci id 5149504d986fSmrg 5150504d986fSmrg Signed-off-by: Flora Cui <flora.cui@amd.com> 5151504d986fSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 5152504d986fSmrg 5153504d986fSmrgcommit b93006714b8de972060492cfa311320921a73773 5154504d986fSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 5155504d986fSmrgDate: Tue Apr 12 08:48:33 2016 -0400 5156504d986fSmrg 5157504d986fSmrg dri3: Return NULL from amdgpu_dri3_pixmap_from_fd if calloc fails. 5158504d986fSmrg 5159504d986fSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 5160504d986fSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5161504d986fSmrg 5162504d986fSmrgcommit a0bbb373f902e0ffc14570c85faec7e44134f62e 5163504d986fSmrgAuthor: Qiang Yu <Qiang.Yu@amd.com> 5164504d986fSmrgDate: Fri Apr 8 17:29:17 2016 +0800 5165504d986fSmrg 5166504d986fSmrg Remove RR_Capability_SinkOutput for GPU without CRTC. 5167504d986fSmrg 5168504d986fSmrg Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> 5169504d986fSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5170504d986fSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5171504d986fSmrg 5172504d986fSmrgcommit 1a29c4bcc0a286b14f37ab942eb0cad47bc4f337 5173504d986fSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5174504d986fSmrgDate: Mon Apr 11 16:27:40 2016 +0900 5175504d986fSmrg 5176504d986fSmrg Post 1.1.0 release version bump 5177504d986fSmrg 5178d6c0b56eSmrgcommit a04f4015d6afef20c2b79e2779f6555836ee2b07 5179d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5180d6c0b56eSmrgDate: Thu Apr 7 16:47:25 2016 +0900 5181d6c0b56eSmrg 5182d6c0b56eSmrg Bump version for 1.1.0 release 5183d6c0b56eSmrg 5184d6c0b56eSmrgcommit aed1c17c43b2c0c983f6fc0973a5224d0faf32d9 5185d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5186d6c0b56eSmrgDate: Mon Apr 4 18:28:02 2016 +0900 5187d6c0b56eSmrg 5188d6c0b56eSmrg glamor: Force GPU rendering to/from pixmaps created via DRI3 5189d6c0b56eSmrg 5190d6c0b56eSmrg Fixes crash when running DRI3 clients with ShadowPrimary enabled. 5191d6c0b56eSmrg 5192d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94799 5193d6c0b56eSmrg 5194d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5195d6c0b56eSmrg 5196d6c0b56eSmrgcommit faf9d720b7d650f5f1ea657a874d08eac3972e60 5197d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5198d6c0b56eSmrgDate: Fri Apr 1 16:09:51 2016 +0900 5199d6c0b56eSmrg 5200d6c0b56eSmrg Update manpage entry for Option "TearFree" 5201d6c0b56eSmrg 5202d6c0b56eSmrg It's now effective for rotation as well. 5203d6c0b56eSmrg 5204d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5205d6c0b56eSmrg 5206d6c0b56eSmrgcommit 5ba95c3abeb8df82aa8d33a47596eae6403ea7af 5207d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5208d6c0b56eSmrgDate: Fri Apr 1 15:29:26 2016 +0900 5209d6c0b56eSmrg 5210d6c0b56eSmrg Identify DRM event queue entries by sequence number instead of by pointer 5211d6c0b56eSmrg 5212d6c0b56eSmrg If the memory for an entry was allocated at the same address as that for 5213d6c0b56eSmrg a previously cancelled entry, the handler could theoretically be called 5214d6c0b56eSmrg prematurely, triggered by the DRM event which was submitted for the 5215d6c0b56eSmrg cancelled entry. 5216d6c0b56eSmrg 5217d6c0b56eSmrg (Ported from radeon commit 4693b1bd5b5c381e8b7b68a6f7f0c6696d6a68df) 5218d6c0b56eSmrg 5219d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5220d6c0b56eSmrg 5221d6c0b56eSmrgcommit 8ecfa69b5a833bd4c39e773a6acfd7eef9144d13 5222d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5223d6c0b56eSmrgDate: Wed Mar 30 18:33:00 2016 +0900 5224d6c0b56eSmrg 5225d6c0b56eSmrg DRI3: Refuse to open DRM file descriptor for ssh clients 5226d6c0b56eSmrg 5227d6c0b56eSmrg Fixes hangs when attempting to use DRI3 on display connections forwarded 5228d6c0b56eSmrg via SSH. 5229d6c0b56eSmrg 5230d6c0b56eSmrg Don't do this for Xorg > 1.18.99.1 since the corresponding xserver 5231d6c0b56eSmrg change has landed in Git master. 5232d6c0b56eSmrg 5233d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93261 5234d6c0b56eSmrg 5235d6c0b56eSmrg (Ported from radeon commit 0b3aac1de9db42bfca545fa331e4985836682ec7) 5236d6c0b56eSmrg 5237d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5238d6c0b56eSmrg 5239d6c0b56eSmrgcommit b2a2e114eec0967f7b67f030fbab8983cf980489 5240d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5241d6c0b56eSmrgDate: Fri Mar 25 11:55:34 2016 +0900 5242d6c0b56eSmrg 5243d6c0b56eSmrg Revert "Use render node for DRI3 if available" 5244d6c0b56eSmrg 5245d6c0b56eSmrg This reverts commit ea558e645786b08d75307716036045170e97b43e. 5246d6c0b56eSmrg 5247d6c0b56eSmrg It broke VDPAU<->GL interop with DRI3 enabled, because the Gallium VDPAU 5248d6c0b56eSmrg code doesn't support DRI3 yet. We can consider re-enabling this once 5249d6c0b56eSmrg there is a Mesa release where the Gallium VDPAU code supports DRI3. 5250d6c0b56eSmrg 5251d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94675 5252d6c0b56eSmrg 5253d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5254d6c0b56eSmrg 5255d6c0b56eSmrgcommit e31a2d668a1b5ebaf75d423c8123cbc8e0dcbae9 5256d6c0b56eSmrgAuthor: Flora Cui <Flora.Cui@amd.com> 5257d6c0b56eSmrgDate: Wed Nov 18 16:44:13 2015 +0800 5258d6c0b56eSmrg 5259d6c0b56eSmrg add polaris10 pci id 5260d6c0b56eSmrg 5261d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5262d6c0b56eSmrg Signed-off-by: Flora Cui <Flora.Cui@amd.com> 5263d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 5264d6c0b56eSmrg 5265d6c0b56eSmrgcommit 6e09b8deb77f76b9bb7d393cc1ad924ebba62eff 5266d6c0b56eSmrgAuthor: Flora Cui <Flora.Cui@amd.com> 5267d6c0b56eSmrgDate: Thu Nov 5 14:16:39 2015 +0800 5268d6c0b56eSmrg 5269d6c0b56eSmrg add polaris11 pci id 5270d6c0b56eSmrg 5271d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5272d6c0b56eSmrg Signed-off-by: Flora Cui <Flora.Cui@amd.com> 5273d6c0b56eSmrg Reviewed-By: Jammy Zhou <Jammy.Zhou@amd.com> 5274d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5275d6c0b56eSmrg 5276d6c0b56eSmrgcommit 7d32c43fff4c8df32cce150223094f793e036cf3 5277d6c0b56eSmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 5278d6c0b56eSmrgDate: Wed Oct 28 17:28:23 2015 -0400 5279d6c0b56eSmrg 5280d6c0b56eSmrg add Polaris chip families 5281d6c0b56eSmrg 5282d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5283d6c0b56eSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 5284d6c0b56eSmrg 5285d6c0b56eSmrgcommit fbf9ae18cd241b8b78936aa30441e5fbfd9ba1c5 5286d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5287d6c0b56eSmrgDate: Thu Mar 24 19:05:15 2016 +0900 5288d6c0b56eSmrg 5289d6c0b56eSmrg Require xserver 1.9 or newer 5290d6c0b56eSmrg 5291d6c0b56eSmrg 1.9.0 was released in August 2010. 5292d6c0b56eSmrg 5293d6c0b56eSmrg We were already unintentionally relying on things not available in 1.8 5294d6c0b56eSmrg for at least a year, and nobody has complained. 5295d6c0b56eSmrg 5296d6c0b56eSmrg (Ported from radeon commit e592f32f8b5f5873fcc18b10a69dd5e4ccf11073) 5297d6c0b56eSmrg 5298d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5299d6c0b56eSmrg 5300d6c0b56eSmrgcommit 912db5fbbc6b9b1121c8a03168cb4bd870474376 5301d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5302d6c0b56eSmrgDate: Thu Mar 24 18:59:05 2016 +0900 5303d6c0b56eSmrg 5304d6c0b56eSmrg Fix build against older versions of xserver 5305d6c0b56eSmrg 5306d6c0b56eSmrg Also slightly clean up the error handling in amdgpu_scanout_do_update. 5307d6c0b56eSmrg 5308d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94614 5309d6c0b56eSmrg 5310d6c0b56eSmrg (Ported from radeon commit bde466e5d44cad64b4e4eceaa5de80fdbf86356e) 5311d6c0b56eSmrg 5312d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5313d6c0b56eSmrg 5314d6c0b56eSmrgcommit 3fb6280ab3b104b02841c7cab8ed68c1d463c834 5315d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5316d6c0b56eSmrgDate: Thu Mar 24 18:56:44 2016 +0900 5317d6c0b56eSmrg 5318d6c0b56eSmrg DRI3 only works with acceleration 5319d6c0b56eSmrg 5320d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94214 5321d6c0b56eSmrg 5322d6c0b56eSmrg (Ported from radeon commit d21ac4669a8b2cdd4eec5e5a94d1950b7423b8b5) 5323d6c0b56eSmrg 5324d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5325d6c0b56eSmrg 5326d6c0b56eSmrgcommit 3177fe817a5f2de4ed10860866a0dd6d6c6ba816 5327d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5328d6c0b56eSmrgDate: Thu Mar 24 18:51:59 2016 +0900 5329d6c0b56eSmrg 5330d6c0b56eSmrg Check for xf86CursorResetCursor 5331d6c0b56eSmrg 5332d6c0b56eSmrg If it's available, Xorg calls it on each mode configuration change. It 5333d6c0b56eSmrg does what xf86_reload_cursors does (and more), so we don't need to call 5334d6c0b56eSmrg the latter anymore. 5335d6c0b56eSmrg 5336d6c0b56eSmrg (Ported from radeon commit d670c5c9851b4eff21c845d26c7d7e4eb5ee0fa9) 5337d6c0b56eSmrg 5338d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5339d6c0b56eSmrg 5340d6c0b56eSmrgcommit a3dfce7b24e1ea01c1aa62926025a545312cbe13 5341d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5342d6c0b56eSmrgDate: Thu Mar 24 18:45:46 2016 +0900 5343d6c0b56eSmrg 5344d6c0b56eSmrg Don't try DRI2/Present flipping while the HW cursor can't be used 5345d6c0b56eSmrg 5346d6c0b56eSmrg Flipping doesn't interact correctly with SW cursor: A flip makes the SW 5347d6c0b56eSmrg cursor disappear. It will only appear again when the cursor is moved, 5348d6c0b56eSmrg but it will be surrounded by corruption, because the SW cursor code 5349d6c0b56eSmrg will restore stale screen contents at the old cursor location before 5350d6c0b56eSmrg drawing the cursor at the new location. 5351d6c0b56eSmrg 5352d6c0b56eSmrg (Ported from radeon commit 7f3d0780ca65a90117c2a61362dbc0899bd9c0b0) 5353d6c0b56eSmrg 5354d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5355d6c0b56eSmrg 5356d6c0b56eSmrgcommit ba9be8f32f0321689133e17c1681809dec8c6cf1 5357d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5358d6c0b56eSmrgDate: Thu Mar 24 18:44:30 2016 +0900 5359d6c0b56eSmrg 5360d6c0b56eSmrg Factor out HW cursor checking code into drmmode_can_use_hw_cursor 5361d6c0b56eSmrg 5362d6c0b56eSmrg And add a check for RandR 1.4 multihead. 5363d6c0b56eSmrg 5364d6c0b56eSmrg (Ported from radeon commit 3de480e83c0a1824838d662d6d67c9fe85277298) 5365d6c0b56eSmrg 5366d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5367d6c0b56eSmrg 5368d6c0b56eSmrgcommit 4a60b4b1851a3cbc2d8ad9048d68eeb6947cf132 5369d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5370d6c0b56eSmrgDate: Thu Mar 24 12:03:38 2016 +0900 5371d6c0b56eSmrg 5372d6c0b56eSmrg Call AMDGPUBlockHandler_KMS before setting initial modes 5373d6c0b56eSmrg 5374d6c0b56eSmrg Doing it the other way around meant that there was still a possibility 5375d6c0b56eSmrg for the front buffer contents to be uninitialized when they start being 5376d6c0b56eSmrg scanned out. 5377d6c0b56eSmrg 5378d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5379d6c0b56eSmrg 5380d6c0b56eSmrgcommit 37bd79652a8ec612b94a1863e8c580b1cfaf3960 5381d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5382d6c0b56eSmrgDate: Fri Mar 18 18:51:00 2016 +0900 5383d6c0b56eSmrg 5384d6c0b56eSmrg present: Return rotated CRTCs from amdgpu_present_get_crtc 5385d6c0b56eSmrg 5386d6c0b56eSmrg Sync-to-vblank works fine with rotation. We're still checking for 5387d6c0b56eSmrg rotation in amdgpu_present_check_flip. 5388d6c0b56eSmrg 5389d6c0b56eSmrg Returning NULL from here resulted in the xserver present code falling 5390d6c0b56eSmrg back to the fake CRTC running at 1 fps. 5391d6c0b56eSmrg 5392d6c0b56eSmrg (Ported from radeon commit a03271de5ecdaa7790d1316e993c4450b91fe936) 5393d6c0b56eSmrg 5394d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5395d6c0b56eSmrg 5396d6c0b56eSmrgcommit 6b930fb3285dea4a6440e31099c96f08da508d49 5397d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5398d6c0b56eSmrgDate: Fri Mar 18 18:47:10 2016 +0900 5399d6c0b56eSmrg 5400d6c0b56eSmrg present: Clear drmmode->fb_id before calling set_mode_major for unflip 5401d6c0b56eSmrg 5402d6c0b56eSmrg Without this, drmmode_set_mode_major may just re-set the FB for the 5403d6c0b56eSmrg last flipped BO, in which case the display will probably freeze. 5404d6c0b56eSmrg 5405d6c0b56eSmrg Reproduction recipe: Enable rotation while a fullscreen client is 5406d6c0b56eSmrg flipping. 5407d6c0b56eSmrg 5408d6c0b56eSmrg (Ported from radeon commit 40191d82370eb7e58bd34c44966cbf44c3703229) 5409d6c0b56eSmrg 5410d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5411d6c0b56eSmrg 5412d6c0b56eSmrgcommit 6889e091442b6ba1b9351e72bd067425e87d96e9 5413d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5414d6c0b56eSmrgDate: Fri Mar 18 18:18:04 2016 +0900 5415d6c0b56eSmrg 5416d6c0b56eSmrg Make Option "TearFree" effective for rotated/reflected outputs as well 5417d6c0b56eSmrg 5418d6c0b56eSmrg Support varies by xserver version: 5419d6c0b56eSmrg 5420d6c0b56eSmrg < 1.12: No support for the driver handling rotation/reflection 5421d6c0b56eSmrg 1.12-1.15: Support for driver handling rotation/reflection, but there's 5422d6c0b56eSmrg a bug preventing the HW cursor from being visible everywhere 5423d6c0b56eSmrg it should be on rotated outputs, so we can only support 5424d6c0b56eSmrg TearFree for reflection. 5425d6c0b56eSmrg >= 1.16: While the bug above is still there (fixes pending review), 5426d6c0b56eSmrg the driver can force SW cursor for rotated outputs, so we 5427d6c0b56eSmrg can support TearFree for rotation as well. 5428d6c0b56eSmrg 5429d6c0b56eSmrg (Ported from radeon commit 798c4fd16d339b1ad5fd729cc884be084c60e38b) 5430d6c0b56eSmrg 5431d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5432d6c0b56eSmrg 5433d6c0b56eSmrgcommit da4e0c66fcbcf63143372720e3d606a462332e3a 5434d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5435d6c0b56eSmrgDate: Fri Mar 18 18:15:34 2016 +0900 5436d6c0b56eSmrg 5437d6c0b56eSmrg Consolidate pScreen usage in drmmode_set_mode_major 5438d6c0b56eSmrg 5439d6c0b56eSmrg We were already relying on pScrn->pScreen being non-NULL in some cases, 5440d6c0b56eSmrg which is supposedly always true ever since this function is no longer 5441d6c0b56eSmrg getting called from ScreenInit. 5442d6c0b56eSmrg 5443d6c0b56eSmrg (Ported from radeon commit eb611a2e4ecce7a1ab85fd72b9b78e3269311dd5) 5444d6c0b56eSmrg 5445d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5446d6c0b56eSmrg 5447d6c0b56eSmrgcommit 0bbf09dd7ef54133b3e534becb3ba15c0cf3eed2 5448d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5449d6c0b56eSmrgDate: Fri Mar 18 18:14:28 2016 +0900 5450d6c0b56eSmrg 5451d6c0b56eSmrg Remove check for XF86_CRTC_VERSION 3 5452d6c0b56eSmrg 5453d6c0b56eSmrg We require xserver >= 1.8, which was already at version 3. 5454d6c0b56eSmrg 5455d6c0b56eSmrg (Ported from radeon commit 06602171386e538081c298645fb7ca1a70fe80cc) 5456d6c0b56eSmrg 5457d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5458d6c0b56eSmrg 5459d6c0b56eSmrgcommit 3485ca0051a224d00135d4024a97a6c4e85a9644 5460d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5461d6c0b56eSmrgDate: Fri Mar 18 18:07:07 2016 +0900 5462d6c0b56eSmrg 5463d6c0b56eSmrg Deal with modesets and page flips crossing on a CRTC 5464d6c0b56eSmrg 5465d6c0b56eSmrg If we set a mode while a flip is pending, the kernel driver may program 5466d6c0b56eSmrg the flip to the hardware after the modeset. If that happens, the hardware 5467d6c0b56eSmrg will display the BO from the flip, whereas we will assume it displays the 5468d6c0b56eSmrg BO from the modeset. In other words, the display will most likely freeze, 5469d6c0b56eSmrg at least until another modeset. 5470d6c0b56eSmrg 5471d6c0b56eSmrg Prevent this condition by waiting for a pending flip to finish before 5472d6c0b56eSmrg setting a mode. 5473d6c0b56eSmrg 5474d6c0b56eSmrg Fixes display freezing when setting rotation or a transform with 5475d6c0b56eSmrg TearFree enabled. 5476d6c0b56eSmrg 5477d6c0b56eSmrg (Ported from radeon commit a88985f5d1e39caca49ceb65678aaa9cb622a0d2) 5478d6c0b56eSmrg 5479d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5480d6c0b56eSmrg 5481d6c0b56eSmrgcommit b9d00fa7aaf946d985897380bfa42faafbf1b3fb 5482d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5483d6c0b56eSmrgDate: Fri Mar 18 17:18:00 2016 +0900 5484d6c0b56eSmrg 5485d6c0b56eSmrg Make DRM event queue xf86CrtcPtr based instead of ScrnInfoPtr based 5486d6c0b56eSmrg 5487d6c0b56eSmrg This allows for a minor simplification of the code. 5488d6c0b56eSmrg 5489d6c0b56eSmrg (Ported from radeon commit f5d968cbba3c9b7ec202161f2157d8d64778c817) 5490d6c0b56eSmrg 5491d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5492d6c0b56eSmrg 5493d6c0b56eSmrgcommit e0ed26151bfeadf309da53d001751c0a014dbd24 5494d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5495d6c0b56eSmrgDate: Fri Mar 18 17:11:47 2016 +0900 5496d6c0b56eSmrg 5497d6c0b56eSmrg Remove amdgpu_scanout_flip_handler 5498d6c0b56eSmrg 5499d6c0b56eSmrg No longer necessary now that amdgpu_drm_queue_handler can handle 5500d6c0b56eSmrg e->handler == NULL. 5501d6c0b56eSmrg 5502d6c0b56eSmrg (Ported from radeon commit d5dbb07db22d5420c81dfebc060f0dd86e7b8a20) 5503d6c0b56eSmrg 5504d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5505d6c0b56eSmrg 5506d6c0b56eSmrgcommit acd5da56f502d6ad115501e77bce06fe72b1895c 5507d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5508d6c0b56eSmrgDate: Fri Mar 18 17:14:49 2016 +0900 5509d6c0b56eSmrg 5510d6c0b56eSmrg DRI2: Also clear dri2_flipping when client disconnects before event 5511d6c0b56eSmrg 5512d6c0b56eSmrg Fixes the following problem: 5513d6c0b56eSmrg 5514d6c0b56eSmrg With DRI3 enabled, run glxgears with LIBGL_DRI3_DISABLE=1, make it 5515d6c0b56eSmrg fullscreen and press Escape while it's still fullscreen. This could 5516d6c0b56eSmrg result in dri2_flipping not getting cleared, spuriously preventing apps 5517d6c0b56eSmrg using DRI3 from flipping. 5518d6c0b56eSmrg 5519d6c0b56eSmrg (Ported from radeon commit e87365117acbd80b7d80fbb5eb30890ef7153291) 5520d6c0b56eSmrg 5521d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5522d6c0b56eSmrg 5523d6c0b56eSmrgcommit a58bfa98208cc092014d3f36a08714eb1e0d8814 5524d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5525d6c0b56eSmrgDate: Fri Mar 18 17:07:47 2016 +0900 5526d6c0b56eSmrg 5527d6c0b56eSmrg drm_queue: Don't abort events immediately from amdgpu_drm_abort_client 5528d6c0b56eSmrg 5529d6c0b56eSmrg Keep them around until the DRM event arrives, but then call the abort 5530d6c0b56eSmrg functions instead of the handler functions. 5531d6c0b56eSmrg 5532d6c0b56eSmrg This is a prerequisite for the following fix. 5533d6c0b56eSmrg 5534d6c0b56eSmrg (Ported from radeon commit 3989766edde85d1abe7024577b98fc9b007bc02a) 5535d6c0b56eSmrg 5536d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5537d6c0b56eSmrg 5538d6c0b56eSmrgcommit e4888df6e32bb817bf0d6166a22b19c14e189a84 5539d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5540d6c0b56eSmrgDate: Fri Mar 18 17:04:10 2016 +0900 5541d6c0b56eSmrg 5542d6c0b56eSmrg Fix RandR CRTC transforms 5543d6c0b56eSmrg 5544d6c0b56eSmrg Currently, Xorg will only transform the cursor as of the first time the 5545d6c0b56eSmrg cursor image changes after a transform is set. 5546d6c0b56eSmrg 5547d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80678 5548d6c0b56eSmrg 5549d6c0b56eSmrg (Ported from radeon commit 9483a3d777919b224f70c3b4d01e4b320a57db31) 5550d6c0b56eSmrg 5551d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5552d6c0b56eSmrg 5553d6c0b56eSmrgcommit 43af92ede0968f2108f9562aa4c2c861ac703617 5554d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5555d6c0b56eSmrgDate: Fri Mar 18 16:58:07 2016 +0900 5556d6c0b56eSmrg 5557d6c0b56eSmrg Build RandR 1.4 provider name from chipset name and bus ID 5558d6c0b56eSmrg 5559d6c0b56eSmrg Instead of just "amdgpu", it's now e.g. "TONGA @ pci:0000:01:00.0". 5560d6c0b56eSmrg 5561d6c0b56eSmrg (Ported from radeon commit c7cf00487cd6d4a5d0f39d5b92ff04f6420d6a32) 5562d6c0b56eSmrg 5563d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5564d6c0b56eSmrg 5565d6c0b56eSmrgcommit 5ec1797a2858d693d18d21326e2307d71555e1db 5566d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5567d6c0b56eSmrgDate: Wed Feb 24 17:33:49 2016 +0900 5568d6c0b56eSmrg 5569d6c0b56eSmrg DRI2: Use amdgpu_pixmap_get_handle 5570d6c0b56eSmrg 5571d6c0b56eSmrg Now we can share pixmaps with no struct amdgpu_buffer via DRI2. 5572d6c0b56eSmrg 5573d6c0b56eSmrg Fixes VDPAU video playback freezing when using an OpenGL compositor with 5574d6c0b56eSmrg DRI3 enabled and mpv VAAPI hardware decoding with OpenGL output. 5575d6c0b56eSmrg 5576d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89755 5577d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93804 5578d6c0b56eSmrg 5579d6c0b56eSmrg (ported from radeon commit f8b0f23e9f4af9f9097ee5e72d53b45173163c41) 5580d6c0b56eSmrg 5581d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5582d6c0b56eSmrg 5583d6c0b56eSmrgcommit df60c635e1e632233de9dd4b01d63c2b963003f8 5584d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5585d6c0b56eSmrgDate: Wed Feb 24 17:06:43 2016 +0900 5586d6c0b56eSmrg 5587d6c0b56eSmrg glamor: Avoid generating GEM flink names for BOs shared via DRI3 (v2) 5588d6c0b56eSmrg 5589d6c0b56eSmrg We can't create our own struct amdgpu_buffer representation in this case 5590d6c0b56eSmrg because destroying that would make the GEM handle inaccessible to glamor 5591d6c0b56eSmrg as well. So just get the handle directly via dma-buf. 5592d6c0b56eSmrg 5593d6c0b56eSmrg (ported from radeon commit 391900a670addec39515f924265bfa9f8bfa9ec0, 5594d6c0b56eSmrg extended to cache BO handles in the private for non-DRI3 pixmaps as 5595d6c0b56eSmrg well) 5596d6c0b56eSmrg 5597d6c0b56eSmrg v2: Swap whole pixmap privates instead of just BOs in 5598d6c0b56eSmrg amdgpu_dri2_exchange_buffers to avoid invalidating cached BO handles 5599d6c0b56eSmrg 5600d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5601d6c0b56eSmrg 5602d6c0b56eSmrgcommit e463b849f3e9d7b69e64a65619a22e00e78d297b 5603d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5604d6c0b56eSmrgDate: Tue Feb 23 18:10:29 2016 +0900 5605d6c0b56eSmrg 5606d6c0b56eSmrg Make amdgpu_do_pageflip take a pixmap instead of a BO 5607d6c0b56eSmrg 5608d6c0b56eSmrg (inspired by radeon commit 7b4fc4a677d252d01c2bf80d162bc35814059eaa) 5609d6c0b56eSmrg 5610d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5611d6c0b56eSmrg 5612d6c0b56eSmrgcommit 1ee341f9d909f3b7ba2984fc912dabdb98c34b19 5613d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5614d6c0b56eSmrgDate: Tue Feb 23 18:42:19 2016 +0900 5615d6c0b56eSmrg 5616d6c0b56eSmrg Add amdgpu_pixmap_get_handle helper 5617d6c0b56eSmrg 5618d6c0b56eSmrg (inspired by radeon commits dfad91fffb5bd013785223b42d78886df839eacf 5619d6c0b56eSmrg and ccbda955ebae1d457d35293833f12791e0f9fb0b) 5620d6c0b56eSmrg 5621d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5622d6c0b56eSmrg 5623d6c0b56eSmrgcommit a36bbfd98b96426bbe0be3923c64da7ec0e565d0 5624d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5625d6c0b56eSmrgDate: Mon Feb 15 18:41:51 2016 +0900 5626d6c0b56eSmrg 5627d6c0b56eSmrg HAS_DIRTYTRACKING_ROTATION also supports multiple CRTCs 5628d6c0b56eSmrg 5629d6c0b56eSmrg (ported from radeon commit ff9a6b6f079a8419f4e6fadfee778060618bf735) 5630d6c0b56eSmrg 5631d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5632d6c0b56eSmrg 5633d6c0b56eSmrgcommit a37746ffceaed83e48e48fb05439be7e020dd2ea 5634d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5635d6c0b56eSmrgDate: Mon Feb 15 18:35:54 2016 +0900 5636d6c0b56eSmrg 5637d6c0b56eSmrg Load fb module before glamoregl/shadow modules 5638d6c0b56eSmrg 5639d6c0b56eSmrg Fixes unresolved symbols on some systems. 5640d6c0b56eSmrg 5641d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93105 5642d6c0b56eSmrg (ported from radeon commit 78fbca095ae9887a2d3de48bb07975e2d1126e68) 5643d6c0b56eSmrg 5644d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5645d6c0b56eSmrg 5646d6c0b56eSmrgcommit 59c0a6807110eca829c6708e16585a38f39a5c17 5647d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5648d6c0b56eSmrgDate: Mon Feb 15 18:28:13 2016 +0900 5649d6c0b56eSmrg 5650d6c0b56eSmrg Don't advertise any PRIME offloading capabilities without acceleration 5651d6c0b56eSmrg 5652d6c0b56eSmrg Acceleration is required even for display offloading. Trying to enable 5653d6c0b56eSmrg display offloading without acceleration resulted in a crash. 5654d6c0b56eSmrg 5655d6c0b56eSmrg (ported from radeon commit b19417e2fddf4df725951aea5ad5e9558338f59e) 5656d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5657d6c0b56eSmrg 5658d6c0b56eSmrgcommit a3eac85d812ecc605436e6bd5b9ee7ebf307e3d3 5659d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5660d6c0b56eSmrgDate: Tue Jan 26 16:12:28 2016 +0900 5661d6c0b56eSmrg 5662d6c0b56eSmrg Only map front buffer if glamor acceleration is disabled (v2) 5663d6c0b56eSmrg 5664d6c0b56eSmrg Otherwise the front buffer may not be accessible by the CPU, because Mesa 5665d6c0b56eSmrg sets the AMDGPU_GEM_CREATE_NO_CPU_ACCESS flag for tiled buffers, because 5666d6c0b56eSmrg accessing tiled buffers with the CPU makes little sense. 5667d6c0b56eSmrg 5668d6c0b56eSmrg v2: Also handle Option "AccelMethod" "none" 5669d6c0b56eSmrg 5670d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5671d6c0b56eSmrg 5672d6c0b56eSmrgcommit 2fcb7dadd3c71cd405cbbaafc777697538ca9c29 5673d6c0b56eSmrgAuthor: jimqu <Jim.Qu@amd.com> 5674d6c0b56eSmrgDate: Mon Jan 25 09:47:00 2016 +0800 5675d6c0b56eSmrg 5676d6c0b56eSmrg glamor: Return NullPixmap on failure to create shareable pixmap 5677d6c0b56eSmrg 5678d6c0b56eSmrg If we were asked to create a shareable pixmap, it doesn't make sense 5679d6c0b56eSmrg to return a pixmap which isn't shareable. Doing so caused trouble down 5680d6c0b56eSmrg the line such as a crash with older versions of glamor when trying to 5681d6c0b56eSmrg use GLX pixmaps of bpp < 32 via DRI2. 5682d6c0b56eSmrg 5683d6c0b56eSmrg Signed-off-by: JimQu <jim.qu@amd.com> 5684d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5685d6c0b56eSmrg 5686d6c0b56eSmrgcommit 5269a2228bff6023c1a7f3e8534027e1d7addc25 5687d6c0b56eSmrgAuthor: jimqu <Jim.Qu@amd.com> 5688d6c0b56eSmrgDate: Mon Jan 25 10:12:02 2016 +0800 5689d6c0b56eSmrg 5690d6c0b56eSmrg Move amdgpu_glamor_destroy_pixmap before amdgpu_glamor_create_pixmap 5691d6c0b56eSmrg 5692d6c0b56eSmrg The next commit will call the former from the latter. No functional 5693d6c0b56eSmrg change. 5694d6c0b56eSmrg 5695d6c0b56eSmrg Signed-off-by: JimQu <jim.qu@amd.com> 5696d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5697d6c0b56eSmrg 5698d6c0b56eSmrgcommit 54c959c163288caa87f612911b70df73f87d29d6 5699d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 5700d6c0b56eSmrgDate: Wed Jan 20 09:37:36 2016 -0500 5701d6c0b56eSmrg 5702d6c0b56eSmrg Move memset() after variable declarations 5703d6c0b56eSmrg 5704d6c0b56eSmrg To make the code more "C" like move the function calls 5705d6c0b56eSmrg after the variable declarations. 5706d6c0b56eSmrg 5707d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 5708d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5709d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5710d6c0b56eSmrg 5711d6c0b56eSmrgcommit 8853b07ae8169c409740c40d45cd335bd608f2a7 5712d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5713d6c0b56eSmrgDate: Tue Jan 19 17:35:11 2016 +0900 5714d6c0b56eSmrg 5715d6c0b56eSmrg Set the RandR primary output on startup if Xorg hasn't 5716d6c0b56eSmrg 5717d6c0b56eSmrg Fixes xrandr (XRRGetOutputPrimary) not reporting any output as primary 5718d6c0b56eSmrg after startup. 5719d6c0b56eSmrg 5720d6c0b56eSmrg (Ported from radeon commit b16856b25086ffb27365ac2249b8da921066ce62) 5721d6c0b56eSmrg 5722d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5723d6c0b56eSmrg 5724d6c0b56eSmrgcommit bd5c65daceaf633c36fcec86ff061df10c364bc0 5725d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5726d6c0b56eSmrgDate: Thu Jan 7 15:53:41 2016 +0900 5727d6c0b56eSmrg 5728d6c0b56eSmrg Only call amdgpu_bus_id once in each probe path (v2) 5729d6c0b56eSmrg 5730d6c0b56eSmrg Instead of up to twice as before. 5731d6c0b56eSmrg 5732d6c0b56eSmrg v2: Remove free(busIdString) call from amdgpu_kernel_mode_enabled, the 5733d6c0b56eSmrg bus ID string is now managed by its callers. 5734d6c0b56eSmrg 5735d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) 5736d6c0b56eSmrg 5737d6c0b56eSmrgcommit 6e42c58375a4c3229da93c27bbd104af145c6163 5738d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5739d6c0b56eSmrgDate: Thu Jan 7 15:57:38 2016 +0900 5740d6c0b56eSmrg 5741d6c0b56eSmrg Remove pci_dev test from amdgpu_get_scrninfo 5742d6c0b56eSmrg 5743d6c0b56eSmrg The pci_dev parameter can never be NULL since we only support KMS. 5744d6c0b56eSmrg 5745d6c0b56eSmrg Reported-by: Tom St Denis <tom.stdenis@amd.com> 5746d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5747d6c0b56eSmrg 5748d6c0b56eSmrgcommit 8e09180798a06af5afa030d754938e4ca06e272f 5749d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5750d6c0b56eSmrgDate: Thu Jan 7 15:35:35 2016 +0900 5751d6c0b56eSmrg 5752d6c0b56eSmrg Re-use PCI bus ID code from kernel_open_fd in kernel_mode_enabled 5753d6c0b56eSmrg 5754d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5755d6c0b56eSmrg 5756d6c0b56eSmrgcommit 4eb9cedca080b30c57ded349a397620ee7d0cd46 5757d6c0b56eSmrgAuthor: Mykola Lysenko <Mykola.Lysenko@amd.com> 5758d6c0b56eSmrgDate: Wed Jan 13 14:03:55 2016 +0800 5759d6c0b56eSmrg 5760d6c0b56eSmrg Initialize drmmode_crtc dpms_mode to DPMSModeOff 5761d6c0b56eSmrg 5762d6c0b56eSmrg This disables query of disabled pipes for drmWaitVBlank on X start 5763d6c0b56eSmrg 5764d6c0b56eSmrg Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com> 5765d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5766d6c0b56eSmrg 5767d6c0b56eSmrgcommit 1d0b0c1794e65e581a48aa9fb19679d928d82a5d 5768d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5769d6c0b56eSmrgDate: Thu Dec 10 18:08:12 2015 +0900 5770d6c0b56eSmrg 5771d6c0b56eSmrg sync: Check if miSyncShmScreenInit symbol is resolved at runtime 5772d6c0b56eSmrg 5773d6c0b56eSmrg It may be disabled in the Xorg build, either explicitly or because the 5774d6c0b56eSmrg xshmfence library isn't available. 5775d6c0b56eSmrg 5776d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5777d6c0b56eSmrg 5778d6c0b56eSmrgcommit f4107f67f147e2500582fc36cf0f0f76bc1ef098 5779d6c0b56eSmrgAuthor: Mykola Lysenko <Mykola.Lysenko@amd.com> 5780d6c0b56eSmrgDate: Wed Dec 23 11:58:47 2015 -0500 5781d6c0b56eSmrg 5782d6c0b56eSmrg Check for NULL koutput in drmmode_output_dpms 5783d6c0b56eSmrg 5784d6c0b56eSmrg This situation happens whit start of usage of DRM DP MST framework, 5785d6c0b56eSmrg when connectors created and destroyed dynamically. 5786d6c0b56eSmrg 5787d6c0b56eSmrg Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com> 5788d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5789d6c0b56eSmrg 5790d6c0b56eSmrgcommit ea558e645786b08d75307716036045170e97b43e 5791d6c0b56eSmrgAuthor: Jammy Zhou <Jammy.Zhou@amd.com> 5792d6c0b56eSmrgDate: Fri Nov 20 17:03:05 2015 +0800 5793d6c0b56eSmrg 5794d6c0b56eSmrg Use render node for DRI3 if available 5795d6c0b56eSmrg 5796d6c0b56eSmrg Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> 5797d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 5798d6c0b56eSmrg 5799d6c0b56eSmrgcommit 43c2dc1aab682d5b6ad49d24983d6382c4f305bb 5800d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5801d6c0b56eSmrgDate: Thu Nov 19 17:05:05 2015 +0900 5802d6c0b56eSmrg 5803d6c0b56eSmrg glamor: Deal with glamor_egl_destroy_textured_pixmap being removed 5804d6c0b56eSmrg 5805d6c0b56eSmrg When it's not available, it's safe to call down to the glamor 5806d6c0b56eSmrg DestroyPixmap hook instead. 5807d6c0b56eSmrg 5808d6c0b56eSmrg (ported from radeon commit 10b7c3def58bb34acc38f076bc230e25b454ab79) 5809d6c0b56eSmrg 5810d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5811d6c0b56eSmrg 5812d6c0b56eSmrgcommit 84cab5738a315e9825bd0864c4f0fc5b03eb81a1 5813d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5814d6c0b56eSmrgDate: Thu Nov 19 16:44:22 2015 +0900 5815d6c0b56eSmrg 5816d6c0b56eSmrg glamor: Restore all ScreenRec hooks during CloseScreen 5817d6c0b56eSmrg 5818d6c0b56eSmrg (ported from radeon commit 535e5438b2c32f774b9c8c27ee0289b4749548ef) 5819d6c0b56eSmrg 5820d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5821d6c0b56eSmrg 5822d6c0b56eSmrgcommit a00c050c2e5667ed815c51979a3cadb5146136ff 5823d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5824d6c0b56eSmrgDate: Thu Nov 19 17:55:53 2015 +0900 5825d6c0b56eSmrg 5826d6c0b56eSmrg Post 1.0.0 release version bump 5827d6c0b56eSmrg 5828d6c0b56eSmrgcommit 755e6ff2337cf615e3ba0854ccd533baec7144db 5829d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5830d6c0b56eSmrgDate: Thu Nov 19 17:28:19 2015 +0900 5831d6c0b56eSmrg 5832d6c0b56eSmrg Bump version for 1.0.0 release 5833d6c0b56eSmrg 5834d6c0b56eSmrgcommit 49c7d2be99aaf6d040e553065bdc461ce8d4769a 5835d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5836d6c0b56eSmrgDate: Thu Nov 19 17:14:54 2015 +0900 5837d6c0b56eSmrg 5838d6c0b56eSmrg Add amdgpu_pixmap.h to src/Makefile.am's EXTRA_DIST 5839d6c0b56eSmrg 5840d6c0b56eSmrg Fixes make distcheck. 5841d6c0b56eSmrg 5842d6c0b56eSmrgcommit d069ec5d27f5c8d2ab17b759b85293ef4113acf3 5843d6c0b56eSmrgAuthor: Stephen Chandler Paul <cpaul@redhat.com> 5844d6c0b56eSmrgDate: Wed Nov 11 18:10:55 2015 +0900 5845d6c0b56eSmrg 5846d6c0b56eSmrg Handle failures in setting a CRTC to a DRM mode properly 5847d6c0b56eSmrg 5848d6c0b56eSmrg This fixes a bug where running the card out of PPLL's when hotplugging 5849d6c0b56eSmrg another monitor would result in all of the displays going blank and 5850d6c0b56eSmrg failing to work properly until X was restarted or the user switched to 5851d6c0b56eSmrg another VT. 5852d6c0b56eSmrg 5853d6c0b56eSmrg [Michel Dänzer: Pass errno instead of -ret to strerror()] 5854d6c0b56eSmrg 5855d6c0b56eSmrg Signed-off-by: Stephen Chandler Paul <cpaul@redhat.com> 5856d6c0b56eSmrg (ported from radeon commit 7186a8713ba004de4991f21c1a9fc4abc62aeff4) 5857d6c0b56eSmrg 5858d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5859d6c0b56eSmrg 5860d6c0b56eSmrgcommit c8bddcf6c97b1338be3715f1fc5e0b17ce71c195 5861d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5862d6c0b56eSmrgDate: Wed Nov 11 18:09:59 2015 +0900 5863d6c0b56eSmrg 5864d6c0b56eSmrg Call xf86CrtcRotate from initial drmmode_set_desired_modes call 5865d6c0b56eSmrg 5866d6c0b56eSmrg Fixes various problems when rotation is specified in xorg.conf. 5867d6c0b56eSmrg 5868d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92475 5869d6c0b56eSmrg 5870d6c0b56eSmrg (ported from radeon commit 548e97b3b7d1e94075a54ca2bb4eb683025098a7) 5871d6c0b56eSmrg 5872d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5873d6c0b56eSmrg 5874d6c0b56eSmrgcommit 12815156f38ce3357f03901a78402db834577d11 5875d6c0b56eSmrgAuthor: Emil Velikov <emil.l.velikov@gmail.com> 5876d6c0b56eSmrgDate: Wed Nov 11 18:04:01 2015 +0900 5877d6c0b56eSmrg 5878d6c0b56eSmrg Do not link amdgpu_drv.so against libpciaccess 5879d6c0b56eSmrg 5880d6c0b56eSmrg Not used directly. 5881d6c0b56eSmrg 5882d6c0b56eSmrg Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> 5883d6c0b56eSmrg (ported from radeon commit fcb32231a38f9461d12720cbf72f63502197a711) 5884d6c0b56eSmrg 5885d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5886d6c0b56eSmrg 5887d6c0b56eSmrgcommit a02982b0ae0b79d2f183a1628edc05cafed8703a 5888d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5889d6c0b56eSmrgDate: Wed Nov 11 17:59:14 2015 +0900 5890d6c0b56eSmrg 5891d6c0b56eSmrg Skip disabled CRTCs in amdgpu_scanout_(do_)update 5892d6c0b56eSmrg 5893d6c0b56eSmrg The vblank / page flip ioctls don't work as expected for a disabled CRTC. 5894d6c0b56eSmrg 5895d6c0b56eSmrg (ported from radeon commit acc11877423ecd81a6e0a7f38466f80e43efee20) 5896d6c0b56eSmrg 5897d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5898d6c0b56eSmrg 5899d6c0b56eSmrgcommit 0ddd20600d0046afd17aa47ffebe86dfd91a2215 5900d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5901d6c0b56eSmrgDate: Wed Nov 11 17:44:16 2015 +0900 5902d6c0b56eSmrg 5903d6c0b56eSmrg Prefer drmModeSetCursor2 over drmModeSetCursor 5904d6c0b56eSmrg 5905d6c0b56eSmrg The former includes information about the position of the hotspot within 5906d6c0b56eSmrg the cursor image. 5907d6c0b56eSmrg 5908d6c0b56eSmrg Copied from xf86-video-modesetting. 5909d6c0b56eSmrg 5910d6c0b56eSmrg (ported from radeon commit c9f8f642fd495937400618a4fc25ecae3f8888fc) 5911d6c0b56eSmrg 5912d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5913d6c0b56eSmrg 5914d6c0b56eSmrgcommit 83a47c0ebe17caa79d12a8b2f94b59cc945452f5 5915d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5916d6c0b56eSmrgDate: Wed Nov 11 17:37:54 2015 +0900 5917d6c0b56eSmrg 5918d6c0b56eSmrg PRIME: Don't advertise offload capabilities when acceleration is disabled 5919d6c0b56eSmrg 5920d6c0b56eSmrg Xorg tends to crash if the user tries to actually use the offload 5921d6c0b56eSmrg capabilities with acceleration disabled. 5922d6c0b56eSmrg 5923d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57200 5924d6c0b56eSmrg (ported from radeon commit c74de9fec13fac2c836bb2a07ae6f90e1d61e667) 5925d6c0b56eSmrg 5926d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5927d6c0b56eSmrg 5928d6c0b56eSmrgcommit 560b7fe6dc66405762020f00e9a05918a36f3a17 5929d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5930d6c0b56eSmrgDate: Wed Nov 11 17:31:34 2015 +0900 5931d6c0b56eSmrg 5932d6c0b56eSmrg Rename Option "NoAccel" to "Accel" 5933d6c0b56eSmrg 5934d6c0b56eSmrg Removes the need for a double negation when forcing acceleration on. 5935d6c0b56eSmrg 5936d6c0b56eSmrg Note that this change is backwards compatible, as the option parser 5937d6c0b56eSmrg automagically handles the 'No' prefix. 5938d6c0b56eSmrg 5939d6c0b56eSmrg (ported from radeon commit cc615d06db0332fc6e673b55632bcc7bf957b44b) 5940d6c0b56eSmrg 5941d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5942d6c0b56eSmrg 5943d6c0b56eSmrgcommit ad77ad32c4a723447d3191d527cfa6de9f54d7ce 5944d6c0b56eSmrgAuthor: Adam Jackson <ajax@redhat.com> 5945d6c0b56eSmrgDate: Wed Nov 11 17:20:21 2015 +0900 5946d6c0b56eSmrg 5947d6c0b56eSmrg Use own thunk function instead of shadowUpdatePackedWeak 5948d6c0b56eSmrg 5949d6c0b56eSmrg I plan to delete the Weak functions from a future server. 5950d6c0b56eSmrg 5951d6c0b56eSmrg Signed-off-by: Adam Jackson <ajax@redhat.com> 5952d6c0b56eSmrg (ported from radeon commit 851b2cf8714618843725f6d067915375485ade9d) 5953d6c0b56eSmrg 5954d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5955d6c0b56eSmrg 5956d6c0b56eSmrgcommit f5ccea99c03b62acf3a25984aba617c665d80b7c 5957d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5958d6c0b56eSmrgDate: Wed Nov 11 17:16:58 2015 +0900 5959d6c0b56eSmrg 5960d6c0b56eSmrg dri2: Handle PRIME for source buffer as well in amdgpu_dri2_copy_region2 5961d6c0b56eSmrg 5962d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77810 5963d6c0b56eSmrg 5964d6c0b56eSmrg (ported from radeon commit c84230d686c078aac1dc98d82153f8b02521b2e1) 5965d6c0b56eSmrg 5966d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5967d6c0b56eSmrg 5968d6c0b56eSmrgcommit 92e7c93d2f9c3036da1a17d7fccccb6f9e9eaa3d 5969d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5970d6c0b56eSmrgDate: Mon Nov 2 18:29:24 2015 +0900 5971d6c0b56eSmrg 5972d6c0b56eSmrg Move scrn/info declaration inside USE_GLAMOR in amdgpu_dri3_fd_from_pixmap 5973d6c0b56eSmrg 5974d6c0b56eSmrg Fixes warning when building with --disable-glamor: 5975d6c0b56eSmrg 5976d6c0b56eSmrg ../../src/amdgpu_dri3.c: In function 'amdgpu_dri3_fd_from_pixmap': 5977d6c0b56eSmrg ../../src/amdgpu_dri3.c:135:16: warning: unused variable 'info' [-Wunused-variable] 5978d6c0b56eSmrg AMDGPUInfoPtr info = AMDGPUPTR(scrn); 5979d6c0b56eSmrg ^ 5980d6c0b56eSmrg 5981d6c0b56eSmrg Reported-by: Jammy Zhou <Jammy.Zhou@amd.com> 5982d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5983d6c0b56eSmrg 5984d6c0b56eSmrgcommit c9bd1399a13cea2e1331af2c826ca054b88db071 5985d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5986d6c0b56eSmrgDate: Mon Nov 2 18:21:50 2015 +0900 5987d6c0b56eSmrg 5988d6c0b56eSmrg Call AMDGPUFreeRec from AMDGPUFreeScreen_KMS even if info == NULL 5989d6c0b56eSmrg 5990d6c0b56eSmrg It's safe now. 5991d6c0b56eSmrg 5992d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 5993d6c0b56eSmrg 5994d6c0b56eSmrgcommit fb8444e731765588c0ff1e9053c1c7b73f5f0907 5995d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 5996d6c0b56eSmrgDate: Mon Nov 2 18:20:41 2015 +0900 5997d6c0b56eSmrg 5998d6c0b56eSmrg Don't use AMDGPUEntPriv in AMDGPUFreeRec 5999d6c0b56eSmrg 6000d6c0b56eSmrg It crashes if info == NULL. 6001d6c0b56eSmrg 6002d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6003d6c0b56eSmrg 6004d6c0b56eSmrgcommit 8e7ee03f55c2f3874f6e84daeb5700f8b8037a51 6005d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6006d6c0b56eSmrgDate: Wed Oct 28 17:53:27 2015 +0900 6007d6c0b56eSmrg 6008d6c0b56eSmrg Remove amdgpu_reference_drm_fd 6009d6c0b56eSmrg 6010d6c0b56eSmrg Increase pAMDGPUEnt->fd_ref in the probe code instead when we're reusing 6011d6c0b56eSmrg the existing fd. 6012d6c0b56eSmrg 6013d6c0b56eSmrg The previous reference counting was imbalanced, so pAMDGPUEnt->fd_ref 6014d6c0b56eSmrg could never go to 0. 6015d6c0b56eSmrg 6016d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 6017d6c0b56eSmrg 6018d6c0b56eSmrgcommit 6bab8fabb37eb131e131ce59446c214ded28f779 6019d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6020d6c0b56eSmrgDate: Wed Oct 28 17:44:09 2015 +0900 6021d6c0b56eSmrg 6022d6c0b56eSmrg Remove info->dri2.drm_fd and info->drmmode->fd 6023d6c0b56eSmrg 6024d6c0b56eSmrg Use pAMDGPUEnt->fd everywhere instead. 6025d6c0b56eSmrg 6026d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 6027d6c0b56eSmrg 6028d6c0b56eSmrgcommit 0530e39cc6b7340163e7f6bb6d82719d102ee6e9 6029d6c0b56eSmrgAuthor: Jammy Zhou <jammy.zhou@amd.com> 6030d6c0b56eSmrgDate: Thu Oct 29 17:08:01 2015 +0900 6031d6c0b56eSmrg 6032d6c0b56eSmrg Pass struct pci_device *pci_dev directly to amdgpu_get_scrninfo 6033d6c0b56eSmrg 6034d6c0b56eSmrg Instead of throwing away the type information by passing it as a void*. 6035d6c0b56eSmrg 6036d6c0b56eSmrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 6037d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6038d6c0b56eSmrg 6039d6c0b56eSmrgcommit edf72afee3a25eae9827b4de3a013b541b78e213 6040d6c0b56eSmrgAuthor: Jammy Zhou <Jammy.Zhou@amd.com> 6041d6c0b56eSmrgDate: Wed Oct 28 21:24:29 2015 +0800 6042d6c0b56eSmrg 6043d6c0b56eSmrg Fix crash in PCI probe path (v4) 6044d6c0b56eSmrg 6045d6c0b56eSmrg The crash is caused by the NULL value returned by AMDGPUPTR(pScrn), 6046d6c0b56eSmrg because the driverPrivate is not allocated yet in PciProbe phase, 6047d6c0b56eSmrg and it is usually done in the PreInit phase. 6048d6c0b56eSmrg 6049d6c0b56eSmrg Use pAMDGPUEnt->fd instead of info->dri2.drm_fd to avoid AMDGPUInfoPtr 6050d6c0b56eSmrg related code in amdgpu_open_drm_master, so that the crash can be fixed. 6051d6c0b56eSmrg 6052d6c0b56eSmrg v4: (md) Remove unused parameter entity_num, split out logically 6053d6c0b56eSmrg separate changes 6054d6c0b56eSmrg v3: some more cleanup 6055d6c0b56eSmrg v2: switch to pAMDGPUEnt->fd, and update the commit message 6056d6c0b56eSmrg 6057d6c0b56eSmrg Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> 6058d6c0b56eSmrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 6059d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v3) 6060d6c0b56eSmrg 6061d6c0b56eSmrgcommit cef725121eb0e56aa54d9c4665e36047373f4db7 6062d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6063d6c0b56eSmrgDate: Wed Oct 28 17:56:13 2015 +0900 6064d6c0b56eSmrg 6065d6c0b56eSmrg Remove dead code from probe paths 6066d6c0b56eSmrg 6067d6c0b56eSmrg amdgpu_get_scrninfo allocates the memory pointed to by pAMDGPUEnt just 6068d6c0b56eSmrg before it calls amdgpu_open_drm_master, so pAMDGPUEnt->fd is always 0 6069d6c0b56eSmrg in the latter. 6070d6c0b56eSmrg 6071d6c0b56eSmrg Also, no need to clear pAMDGPUEnt->fd just before freeing the memory 6072d6c0b56eSmrg it's stored in. 6073d6c0b56eSmrg 6074d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 6075d6c0b56eSmrg 6076d6c0b56eSmrgcommit 3b0a3c89b53b3ebe21a9d703a4dbff6e57c65a57 6077d6c0b56eSmrgAuthor: Samuel Li <samuel.li@amd.com> 6078d6c0b56eSmrgDate: Thu Oct 22 12:50:21 2015 -0400 6079d6c0b56eSmrg 6080d6c0b56eSmrg Add Stoney support 6081d6c0b56eSmrg 6082d6c0b56eSmrg (agd): rebase 6083d6c0b56eSmrg 6084d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6085d6c0b56eSmrg Signed-off-by: Samuel Li <samuel.li@amd.com> 6086d6c0b56eSmrg 6087d6c0b56eSmrgcommit 9c8b7ebe15eec7abd5dc10ad6ccecbc57225494a 6088d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6089d6c0b56eSmrgDate: Wed Oct 21 17:18:44 2015 +0900 6090d6c0b56eSmrg 6091d6c0b56eSmrg Revert "Handle RandR CRTC transforms properly" 6092d6c0b56eSmrg 6093d6c0b56eSmrg This reverts commit 175251645fec1a3d19f498e1cd1e655374c67801. 6094d6c0b56eSmrg 6095d6c0b56eSmrg I accidentally pushed this patch. 6096d6c0b56eSmrg 6097d6c0b56eSmrgcommit 0a6ba4bf50128464a30951721b0c72e748fb89bc 6098d6c0b56eSmrgAuthor: Darren Powell <darren.powell@amd.com> 6099d6c0b56eSmrgDate: Tue Oct 20 16:56:54 2015 -0400 6100d6c0b56eSmrg 6101d6c0b56eSmrg Add Option "TearFree" to manpage 6102d6c0b56eSmrg 6103d6c0b56eSmrg This was missed in commit c57da33308a81fa575179238a0415abcb8b34908. 6104d6c0b56eSmrg 6105d6c0b56eSmrg Signed-off-by: Darren Powell <darren.powell@amd.com> 6106d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6107d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6108d6c0b56eSmrg 6109d6c0b56eSmrgcommit 175251645fec1a3d19f498e1cd1e655374c67801 6110d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6111d6c0b56eSmrgDate: Thu Oct 15 16:35:51 2015 +0900 6112d6c0b56eSmrg 6113d6c0b56eSmrg Handle RandR CRTC transforms properly 6114d6c0b56eSmrg 6115d6c0b56eSmrgcommit 6000aef4e2f0a121b94023484406fb6f04688f74 6116d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6117d6c0b56eSmrgDate: Wed Oct 14 13:25:59 2015 -0400 6118d6c0b56eSmrg 6119d6c0b56eSmrg Clean up amdgpu_dri2_create_buffer2() 6120d6c0b56eSmrg 6121d6c0b56eSmrg Remove the depth_pixmap variable from the function and clear 6122d6c0b56eSmrg out any dead/odd behaviour that results. 6123d6c0b56eSmrg 6124d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6125d6c0b56eSmrg 6126d6c0b56eSmrgcommit 21e72fb2418b5cc7fc849a9cf951186e209036b0 6127d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6128d6c0b56eSmrgDate: Fri Oct 9 18:38:47 2015 +0900 6129d6c0b56eSmrg 6130d6c0b56eSmrg Properly handle drmModeAddFB failure in drmmode_crtc_scanout_allocate 6131d6c0b56eSmrg 6132d6c0b56eSmrg We were printing an error message, but not propagating the failure. That 6133d6c0b56eSmrg would probably lead to trouble down the road. 6134d6c0b56eSmrg 6135d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6136d6c0b56eSmrg 6137d6c0b56eSmrgcommit 8da1d0c870e1081d77925807d6e3bbc61a23f54f 6138d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6139d6c0b56eSmrgDate: Fri Oct 9 18:59:16 2015 +0900 6140d6c0b56eSmrg 6141d6c0b56eSmrg Eliminate redundant data parameter from drmmode_crtc_scanout_create 6142d6c0b56eSmrg 6143d6c0b56eSmrg drmmode_crtc_scanout_create just needs to call 6144d6c0b56eSmrg drmmode_crtc_scanout_allocate when scanout->bo is NULL. 6145d6c0b56eSmrg 6146d6c0b56eSmrg This makes it clearer to the reader / compiler that 6147d6c0b56eSmrg drmmode_crtc_scanout_create doesn't dereference scanout->bo when it's 6148d6c0b56eSmrg NULL. 6149d6c0b56eSmrg 6150d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6151d6c0b56eSmrg 6152d6c0b56eSmrgcommit dc40582d5ff94d812cbc08f95cf14b80cd0f410d 6153d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6154d6c0b56eSmrgDate: Wed Oct 7 16:19:22 2015 +0900 6155d6c0b56eSmrg 6156d6c0b56eSmrg Don't advertise rotation support without hardware acceleration v2 6157d6c0b56eSmrg 6158d6c0b56eSmrg Rotation currently doesn't work without acceleration (doesn't actually 6159d6c0b56eSmrg rotate with Option "NoAccel", crashes with Option "AccelMethod" "none" 6160d6c0b56eSmrg or when glamor fails to initialize) and would probably be too slow 6161d6c0b56eSmrg anyway. 6162d6c0b56eSmrg 6163d6c0b56eSmrg v2: Also remove now dead code checking for ShadowFB from 6164d6c0b56eSmrg drmmode_crtc_scanout_allocate(). 6165d6c0b56eSmrg 6166d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6167d6c0b56eSmrg 6168d6c0b56eSmrgcommit 460560502a1bdf26d06f3c30df46fa9f28ffb9e5 6169d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6170d6c0b56eSmrgDate: Tue Oct 6 08:49:54 2015 -0400 6171d6c0b56eSmrg 6172d6c0b56eSmrg Simplify drmmode_set_mode_major() and avoid leaking memory. 6173d6c0b56eSmrg 6174d6c0b56eSmrg The function would leak the memory allocated for output_ids. This 6175d6c0b56eSmrg patch addresses that as well as simplifies the logic somewhat. 6176d6c0b56eSmrg 6177d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6178d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6179d6c0b56eSmrg 6180d6c0b56eSmrgcommit 56398d6651dfc4935cbd117ad861e1800077c73c 6181d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6182d6c0b56eSmrgDate: Tue Oct 6 08:43:12 2015 -0400 6183d6c0b56eSmrg 6184d6c0b56eSmrg Avoid NULL dereference if drmmode_crtc_scanout_allocate fails 6185d6c0b56eSmrg 6186d6c0b56eSmrg This avoids a NULL dereference if the memory allocation fails. 6187d6c0b56eSmrg 6188d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6189d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6190d6c0b56eSmrg 6191d6c0b56eSmrgcommit 4b92b960c7705be8b3a5dee17b2341864d7ca9bb 6192d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6193d6c0b56eSmrgDate: Mon Oct 5 10:00:09 2015 -0400 6194d6c0b56eSmrg 6195d6c0b56eSmrg cleanup the entity rec 6196d6c0b56eSmrg 6197d6c0b56eSmrg Based on radeon commit: b32a0a3de84a44b9af4f1ca8be19f10d7fa31b12 6198d6c0b56eSmrg 6199d6c0b56eSmrg Some of these were set, some of them were 6200d6c0b56eSmrg always opposites, so clean things up. 6201d6c0b56eSmrg 6202d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6203d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6204d6c0b56eSmrg 6205d6c0b56eSmrgcommit fe100fd6bf483228eaf64b959c56a68e8dac4447 6206d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6207d6c0b56eSmrgDate: Mon Oct 5 10:45:33 2015 -0400 6208d6c0b56eSmrg 6209d6c0b56eSmrg present: Handle DPMS off in radeon_present_get_ust_msc 6210d6c0b56eSmrg 6211d6c0b56eSmrg Based on radeon commit: 95f5d09e3667ded027ae648c97eb4737d8bf67c5 6212d6c0b56eSmrg 6213d6c0b56eSmrg The DRM_IOCTL_WAIT_VBLANK ioctl may return an error during DPMS off, 6214d6c0b56eSmrg which would trigger an error message in drmmode_crtc_get_ust_msc. 6215d6c0b56eSmrg 6216d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6217d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6218d6c0b56eSmrg 6219d6c0b56eSmrgcommit bfa925a04815cee5fd57b99447cb2ee0e158036c 6220d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6221d6c0b56eSmrgDate: Mon Oct 5 10:10:51 2015 -0400 6222d6c0b56eSmrg 6223d6c0b56eSmrg present: Look at all CRTCs to determine if we can flip 6224d6c0b56eSmrg 6225d6c0b56eSmrg Based on radeon commit 211862b777d0be251a4662f5dd24f2d400544c09 6226d6c0b56eSmrg 6227d6c0b56eSmrg Inspired by modesetting driver change by Kenneth Graunke. 6228d6c0b56eSmrg 6229d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6230d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6231d6c0b56eSmrg 6232d6c0b56eSmrgcommit a1e47e76322619ed037ebce27974a4e3792940c2 6233d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6234d6c0b56eSmrgDate: Mon Oct 5 10:41:22 2015 -0400 6235d6c0b56eSmrg 6236d6c0b56eSmrg present: Fall back to modeset for unflip operation 6237d6c0b56eSmrg 6238d6c0b56eSmrg Based on radeon commit: 802d33e474a82262d9cdf11b03568b0c4929cd0d 6239d6c0b56eSmrg 6240d6c0b56eSmrg It's not always possible to use the page flip ioctl for this, e.g. 6241d6c0b56eSmrg during DPMS off. We were previously just skipping the unflip in that 6242d6c0b56eSmrg case, which could result in hangs when setting DPMS off while a 6243d6c0b56eSmrg fullscreen Present app is running, e.g. at the GNOME3 lock screen. 6244d6c0b56eSmrg 6245d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6246d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6247d6c0b56eSmrg 6248d6c0b56eSmrgcommit bac21dfc8e60a07f08158b13fab1f3a9b9d27d1b 6249d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6250d6c0b56eSmrgDate: Mon Oct 5 10:37:50 2015 -0400 6251d6c0b56eSmrg 6252d6c0b56eSmrg Don't attempt a DRI2/Present page flip while the other one is flipping 6253d6c0b56eSmrg 6254d6c0b56eSmrg Based on radeon commit 49f5b0bc301414df049e00d226034e3d6e56421b 6255d6c0b56eSmrg 6256d6c0b56eSmrg Fixes corrupted display and hangs when switching between DRI2 and DRI3 6257d6c0b56eSmrg fullscreen apps, e.g. a compositor using DRI3 and a fullscreen app using 6258d6c0b56eSmrg DRI2 or vice versa. 6259d6c0b56eSmrg 6260d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6261d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6262d6c0b56eSmrg 6263d6c0b56eSmrgcommit a5f7f2e68bad1935f5ad52286033237467f77302 6264d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6265d6c0b56eSmrgDate: Mon Oct 5 13:12:23 2015 -0400 6266d6c0b56eSmrg 6267d6c0b56eSmrg Move amdgpu_drm_handler/abort_proc fields to drmmode_flipdata_re 6268d6c0b56eSmrg 6269d6c0b56eSmrg Based on radeon commit de5ddd09db82141b263338dcf0c28e01f58268ee 6270d6c0b56eSmrg 6271d6c0b56eSmrg Their values are the same for all DRM flip ioctl calls within a single 6272d6c0b56eSmrg radeon_do_pageflip() call. 6273d6c0b56eSmrg 6274d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6275d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6276d6c0b56eSmrg 6277d6c0b56eSmrgcommit e14e3560bff2537d3ad4c93d2b31442a122cde66 6278d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6279d6c0b56eSmrgDate: Mon Oct 5 13:08:43 2015 -0400 6280d6c0b56eSmrg 6281d6c0b56eSmrg Simplify amdgpu_do_pageflip() error handling slightly more 6282d6c0b56eSmrg 6283d6c0b56eSmrg Based on radeon commit e8c0f6319fbf4c3ea11e22ab1a68837031bdec8c 6284d6c0b56eSmrg 6285d6c0b56eSmrg We don't need the local variable old_fb_id. 6286d6c0b56eSmrg 6287d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6288d6c0b56eSmrg 6289d6c0b56eSmrg [ Michel Dänzer: fix up slightly to better match radeon formatting ] 6290d6c0b56eSmrg 6291d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6292d6c0b56eSmrg 6293d6c0b56eSmrgcommit e9621ec0e2400f62db320c560a739b29258edb87 6294d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6295d6c0b56eSmrgDate: Mon Oct 5 09:34:47 2015 -0400 6296d6c0b56eSmrg 6297d6c0b56eSmrg Increase robustness against DRM page flip ioctl failures 6298d6c0b56eSmrg 6299d6c0b56eSmrg Based on radeon commit 8fc22360d5520469c82092ccb0fcf2af330c573f 6300d6c0b56eSmrg 6301d6c0b56eSmrg Centralize cleanup, only clean up things that have been allocated for 6302d6c0b56eSmrg the failed ioctl call. 6303d6c0b56eSmrg 6304d6c0b56eSmrg Fixes double-free after a flip ioctl failure. 6305d6c0b56eSmrg 6306d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89681 6307d6c0b56eSmrg 6308d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6309d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6310d6c0b56eSmrg 6311d6c0b56eSmrgcommit db3bb2061b9ac16b0922d9afae99874820356a04 6312d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6313d6c0b56eSmrgDate: Tue Sep 29 13:07:04 2015 -0400 6314d6c0b56eSmrg 6315d6c0b56eSmrg Clean up allocation in AMDGPUInitVideo() 6316d6c0b56eSmrg 6317d6c0b56eSmrg The allocation of the adapters should use the correct sizeof (even if 6318d6c0b56eSmrg allocating an array of pointers). 6319d6c0b56eSmrg 6320d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6321d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6322d6c0b56eSmrg 6323d6c0b56eSmrgcommit 94caf7ac777134b8396aa762a506053179bbb4c6 6324d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6325d6c0b56eSmrgDate: Thu Oct 1 13:08:41 2015 -0400 6326d6c0b56eSmrg 6327d6c0b56eSmrg Avoid leaking memory on output. 6328d6c0b56eSmrg 6329d6c0b56eSmrg Based on radeon commit 63dc36dc49f93cb00111b497ab6805194bc9d240 6330d6c0b56eSmrg 6331d6c0b56eSmrg and 2nd patch: 6332d6c0b56eSmrg 6333d6c0b56eSmrg Proper leak fix, previous leak fix was bogus. 6334d6c0b56eSmrg 6335d6c0b56eSmrg Based on radeon commit b8ec9ed4fe86952763b963c86f0af0dcae69aa6c 6336d6c0b56eSmrg 6337d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6338d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6339d6c0b56eSmrg 6340d6c0b56eSmrgcommit f035faec041cb5df65c78effa58eb50197cedf88 6341d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6342d6c0b56eSmrgDate: Thu Oct 1 12:56:05 2015 -0400 6343d6c0b56eSmrg 6344d6c0b56eSmrg add support for DP 1.2 display hotplug 6345d6c0b56eSmrg 6346d6c0b56eSmrg Based on radeon commit 2f11dcd43966cf2ee26e61960fd72e6644f5e037 6347d6c0b56eSmrg 6348d6c0b56eSmrg > This allows for dynamic creation of conneectors when the 6349d6c0b56eSmrg > kernel tells us. 6350d6c0b56eSmrg > 6351d6c0b56eSmrg > v2: fix dpms off crash 6352d6c0b56eSmrg 6353d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6354d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6355d6c0b56eSmrg 6356d6c0b56eSmrgcommit aee72b29210d79dbf41bde6eef16d7fe817e6cf4 6357d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6358d6c0b56eSmrgDate: Thu Oct 1 12:29:36 2015 -0400 6359d6c0b56eSmrg 6360d6c0b56eSmrg move output name creation to its own function 6361d6c0b56eSmrg 6362d6c0b56eSmrg Based on radeon commit c88424d1f4aaa78b569e5d44f0b4a47de2f422f4 6363d6c0b56eSmrg 6364d6c0b56eSmrg > The secondary indent is deliberate to make the next patch more 6365d6c0b56eSmrg > parseable for mst support. 6366d6c0b56eSmrg 6367d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6368d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6369d6c0b56eSmrg 6370d6c0b56eSmrgcommit 0846abeace649d27a5f2c17373e717f92d246797 6371d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6372d6c0b56eSmrgDate: Thu Oct 1 12:13:21 2015 -0400 6373d6c0b56eSmrg 6374d6c0b56eSmrg stop caching mode resources 6375d6c0b56eSmrg 6376d6c0b56eSmrg Based on radeon commit 32b003cb7657e07d5af6338ad44d768eda87fd33 6377d6c0b56eSmrg 6378d6c0b56eSmrg > This is step one towards MST connector hotplug support, 6379d6c0b56eSmrg > it stop caching the mode resources structure, and 6380d6c0b56eSmrg > just passes a pointer to it around. 6381d6c0b56eSmrg 6382d6c0b56eSmrg With a few tweaks to match the state of the AMDGPU tree. 6383d6c0b56eSmrg 6384d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6385d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6386d6c0b56eSmrg 6387d6c0b56eSmrgcommit 4ca8f957e0b417b099f625470db98a54531a731d 6388d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6389d6c0b56eSmrgDate: Thu Oct 1 13:16:15 2015 -0400 6390d6c0b56eSmrg 6391d6c0b56eSmrg Silence type mismatch warning. 6392d6c0b56eSmrg 6393d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6394d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6395d6c0b56eSmrg 6396d6c0b56eSmrgcommit a79735ab1499c1f7814036d1b19ff465705c5f45 6397d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6398d6c0b56eSmrgDate: Thu Oct 1 10:51:07 2015 -0400 6399d6c0b56eSmrg 6400d6c0b56eSmrg Add support for server managed fds 6401d6c0b56eSmrg 6402d6c0b56eSmrg Based on radeon commit ed0cfbb4fe77146b0b38f777bc28f3a4ea6da07f 6403d6c0b56eSmrg 6404d6c0b56eSmrg and 2nd patch: 6405d6c0b56eSmrg 6406d6c0b56eSmrg Fix building on older servers without xf86platformBus.h 6407d6c0b56eSmrg 6408d6c0b56eSmrg Based on radeon commit b50da3b96c212086cb58501dbe988d64f1f35b6d 6409d6c0b56eSmrg 6410d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6411d6c0b56eSmrg 6412d6c0b56eSmrg [ Michel Dänzer: Fixed up amdgpu_kernel_open_fd() not to need 6413d6c0b56eSmrg AMDGPUEntPriv(), which doesn't work yet at that point ] 6414d6c0b56eSmrg 6415d6c0b56eSmrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> 6416d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6417d6c0b56eSmrg 6418d6c0b56eSmrgcommit b93934a9ed5e92f3a6eac6554c5c4fa2967a6dd0 6419d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6420d6c0b56eSmrgDate: Thu Oct 1 10:05:36 2015 -0400 6421d6c0b56eSmrg 6422d6c0b56eSmrg Add amdgpu_open_drm_master helper function 6423d6c0b56eSmrg 6424d6c0b56eSmrg Based on radeon commit 3d7861fe112f25874319d4cdc12b745fbcd359cf 6425d6c0b56eSmrg 6426d6c0b56eSmrg > This is a preparation patch for adding server-managed-fd support without it 6427d6c0b56eSmrg > turning into a goto fest. 6428d6c0b56eSmrg 6429d6c0b56eSmrg With appropriate modifications because the open call stack is different 6430d6c0b56eSmrg in the amdgpu tree. 6431d6c0b56eSmrg 6432d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6433d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6434d6c0b56eSmrg 6435d6c0b56eSmrgcommit f5c3fd0b57cf9e392bf591110568637937a1d338 6436d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6437d6c0b56eSmrgDate: Thu Oct 1 09:13:57 2015 -0400 6438d6c0b56eSmrg 6439d6c0b56eSmrg Cleaning up for server-fd support 6440d6c0b56eSmrg 6441d6c0b56eSmrg Based on radeon commit a63342ad15408071437c80b411d14196f3288aed 6442d6c0b56eSmrg 6443d6c0b56eSmrg > radeon_open_drm_master get rid of unnecessary goto 6444d6c0b56eSmrg 6445d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6446d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6447d6c0b56eSmrg 6448d6c0b56eSmrgcommit 3055724aef76a624718f26d5f0f9e9d567ffbcfb 6449d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6450d6c0b56eSmrgDate: Thu Sep 24 13:08:31 2015 -0400 6451d6c0b56eSmrg 6452d6c0b56eSmrg Simplify pick best crtc to fold two loops into one 6453d6c0b56eSmrg 6454d6c0b56eSmrg This patch folds the two for loops from amdgpu_pick_best_crtc() into 6455d6c0b56eSmrg one to reduce the LOC and make the routine easier to read. 6456d6c0b56eSmrg 6457d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6458d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6459d6c0b56eSmrg 6460d6c0b56eSmrgcommit 9945b4ae1664ab815b39ff07e7b66cfa7f942dfa 6461d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6462d6c0b56eSmrgDate: Wed Sep 9 09:38:02 2015 -0400 6463d6c0b56eSmrg 6464d6c0b56eSmrg Avoid use-after-free in drmmode_output_destroy() 6465d6c0b56eSmrg 6466d6c0b56eSmrg The encoders array is freed before potentially all of the elements of 6467d6c0b56eSmrg the array are individually freed. 6468d6c0b56eSmrg 6469d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6470d6c0b56eSmrg Reviewed-by: Christian König <christian.koenig@amd.com> 6471d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6472d6c0b56eSmrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> (cosmetic fixups) 6473d6c0b56eSmrg 6474d6c0b56eSmrgcommit 36b3faebdd1d2090a286616eeeb131d15e9a1386 6475d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6476d6c0b56eSmrgDate: Wed Sep 9 09:36:59 2015 -0400 6477d6c0b56eSmrg 6478d6c0b56eSmrg Avoid use-after-free in amdgpu_kernel_open_fd() 6479d6c0b56eSmrg 6480d6c0b56eSmrg If the device cannot be opened avoid re-using busid after it has been 6481d6c0b56eSmrg freed. 6482d6c0b56eSmrg 6483d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6484d6c0b56eSmrg Reviewed-by: Christian König <christian.koenig@amd.com> 6485d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6486d6c0b56eSmrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> (cosmetic fixups) 6487d6c0b56eSmrg 6488d6c0b56eSmrgcommit 8823c3d4c6db70cff7699b31088f2d92db8faaf4 6489d6c0b56eSmrgAuthor: Tom St Denis <tom.stdenis@amd.com> 6490d6c0b56eSmrgDate: Wed Sep 9 09:34:38 2015 -0400 6491d6c0b56eSmrg 6492d6c0b56eSmrg dri2: Avoid calculation with undefined msc value 6493d6c0b56eSmrg 6494d6c0b56eSmrg If the get_msc() call fails for any reason we should avoid updating the 6495d6c0b56eSmrg vblank counter delta with undefined data. 6496d6c0b56eSmrg 6497d6c0b56eSmrg Signed-off-by: Tom St Denis <tom.stdenis@amd.com> 6498d6c0b56eSmrg Reviewed-by: Christian König <christian.koenig@amd.com> 6499d6c0b56eSmrg Acked-by: Alex Deucher <alexander.deucher@amd.com> 6500d6c0b56eSmrg Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> (minor fixups) 6501d6c0b56eSmrg 6502d6c0b56eSmrgcommit 63948ea091a9b324327ade7ec4fc5d67ca7e6f6f 6503d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6504d6c0b56eSmrgDate: Fri Aug 14 18:41:57 2015 +0900 6505d6c0b56eSmrg 6506d6c0b56eSmrg DRI2: Keep MSC monotonic when moving window between CRTCs 6507d6c0b56eSmrg 6508d6c0b56eSmrg This mirrors the DRI3 implementation in xserver. Fixes VDPAU video 6509d6c0b56eSmrg playback hanging when moving the window between CRTCs. 6510d6c0b56eSmrg 6511d6c0b56eSmrg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66384 6512d6c0b56eSmrg 6513d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6514d6c0b56eSmrg 6515d6c0b56eSmrgcommit 55a4461bd95698cb8d52f9f6c28583f8f81afb4e 6516d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6517d6c0b56eSmrgDate: Fri Aug 7 11:46:31 2015 +0900 6518d6c0b56eSmrg 6519d6c0b56eSmrg Wait for scanout BO initialization to finish before setting mode 6520d6c0b56eSmrg 6521d6c0b56eSmrg This should avoid intermittent artifacts which could sometimes be visible 6522d6c0b56eSmrg when setting a new scanout pixmap, e.g. on server startup or when 6523d6c0b56eSmrg changing resolutions. 6524d6c0b56eSmrg 6525d6c0b56eSmrg (Ported from radeon commit 3791fceabf2cb037467dc41c15364e9f9ec1e47e) 6526d6c0b56eSmrg 6527d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6528d6c0b56eSmrg 6529d6c0b56eSmrgcommit 4c425e9c5c038504a0f0498dd800ab1fb40bf0c5 6530d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6531d6c0b56eSmrgDate: Fri Aug 7 12:39:24 2015 +0900 6532d6c0b56eSmrg 6533d6c0b56eSmrg glamor: Add amdgpu_glamor_finish to wait for glamor rendering to finish 6534d6c0b56eSmrg 6535d6c0b56eSmrg This is a bit sneaky, because it calls glFinish directly from the driver, 6536d6c0b56eSmrg but it seems to work fine. 6537d6c0b56eSmrg 6538d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6539d6c0b56eSmrg 6540d6c0b56eSmrgcommit bb989e173dc364a7d68e50d7e819d0e0ee133d2f 6541d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6542d6c0b56eSmrgDate: Fri Aug 7 11:43:48 2015 +0900 6543d6c0b56eSmrg 6544d6c0b56eSmrg Only call drmmode_copy_fb (at most) once on server startup 6545d6c0b56eSmrg 6546d6c0b56eSmrg It doesn't make sense to copy the screen contents from console when VT 6547d6c0b56eSmrg switching back to Xorg or when Xorg resets. 6548d6c0b56eSmrg 6549d6c0b56eSmrg Fixes intermittent artifacts when VT switching back from console to the 6550d6c0b56eSmrg gdm login screen. 6551d6c0b56eSmrg 6552d6c0b56eSmrg (Ported from radeon commit 4e3dfa69e4630df2e0ec0f5b81d61159757c4664) 6553d6c0b56eSmrg 6554d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6555d6c0b56eSmrg 6556d6c0b56eSmrgcommit ebe2c020fbf2ef8de01fc50b201ab23ddb9fb13b 6557d6c0b56eSmrgAuthor: Mario Kleiner <mario.kleiner.de@gmail.com> 6558d6c0b56eSmrgDate: Mon Aug 10 23:34:40 2015 +0200 6559d6c0b56eSmrg 6560d6c0b56eSmrg Make selection between DRI2 and DRI3 consistent with other drivers. (v2) 6561d6c0b56eSmrg 6562d6c0b56eSmrg Add Option "DRI" to allow selection of maximum DRI level. 6563d6c0b56eSmrg 6564d6c0b56eSmrg This allows the user to select the maximum level of DRI 6565d6c0b56eSmrg implementation to use, DRI2 or DRI3. It replaces the old 6566d6c0b56eSmrg option "DRI3" which had exactly the same purpose, but 6567d6c0b56eSmrg differs from the method used in both intel ddx and nouveau ddx. 6568d6c0b56eSmrg Make this consistent before a new stable driver is released. 6569d6c0b56eSmrg 6570d6c0b56eSmrg v2: Retain handling of old Option "DRI3" for backwards 6571d6c0b56eSmrg compatibility, but Option "DRI" will take precedence 6572d6c0b56eSmrg over "DRI3" if both are provided. 6573d6c0b56eSmrg 6574d6c0b56eSmrg Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> 6575d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6576d6c0b56eSmrg 6577d6c0b56eSmrgcommit c9611a2aa0f8d3bb55c552353740d60f6e4f63a0 6578d6c0b56eSmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 6579d6c0b56eSmrgDate: Tue Jul 7 22:46:34 2015 -0400 6580d6c0b56eSmrg 6581d6c0b56eSmrg add fiji pci id 6582d6c0b56eSmrg 6583d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6584d6c0b56eSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 6585d6c0b56eSmrg 6586d6c0b56eSmrgcommit 2622ac1554761b8824bfbbb2e3051a632ee38ce7 6587d6c0b56eSmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 6588d6c0b56eSmrgDate: Tue Jul 7 22:46:08 2015 -0400 6589d6c0b56eSmrg 6590d6c0b56eSmrg Add fiji support 6591d6c0b56eSmrg 6592d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6593d6c0b56eSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 6594d6c0b56eSmrg 6595d6c0b56eSmrgcommit 7a49d8728d17875206a84fd1023f62b37c4a9f51 6596d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6597d6c0b56eSmrgDate: Thu Aug 6 18:21:30 2015 +0900 6598d6c0b56eSmrg 6599d6c0b56eSmrg On screen resize, clear the new buffer before displaying it 6600d6c0b56eSmrg 6601d6c0b56eSmrg Fixes garbage being intermittently visible during a screen resize. 6602d6c0b56eSmrg 6603d6c0b56eSmrg (Ported from radeon commit 80f3d727f93cb6efedd2b39338d2301035965fe2) 6604d6c0b56eSmrg 6605d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6606d6c0b56eSmrg 6607d6c0b56eSmrgcommit 9f988bf1dc9d4cb92926c051ed8f15e9ba58a016 6608d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6609d6c0b56eSmrgDate: Thu Aug 6 17:50:11 2015 +0900 6610d6c0b56eSmrg 6611d6c0b56eSmrg Make drmmode_copy_fb() work with glamor 6612d6c0b56eSmrg 6613d6c0b56eSmrg Needed for Xorg -background none. 6614d6c0b56eSmrg 6615d6c0b56eSmrg (Ported from radeon commit 3999bf88cdb192fe2f30b03bd2ed6f6a3f9f9057) 6616d6c0b56eSmrg 6617d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6618d6c0b56eSmrg 6619d6c0b56eSmrgcommit 13cf61bd8d46b0059f26120a8902da6f86e6bd11 6620d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6621d6c0b56eSmrgDate: Thu Aug 6 17:46:38 2015 +0900 6622d6c0b56eSmrg 6623d6c0b56eSmrg Update scanout pixmap contents before setting a mode with it 6624d6c0b56eSmrg 6625d6c0b56eSmrg This ensures the scanout pixmaps used for Option "TearFree" and Option 6626d6c0b56eSmrg "ShadowPrimary" have been initialized when their initial mode is set. 6627d6c0b56eSmrg 6628d6c0b56eSmrg (Ported from radeon commit a4a8cdbcc10c1c5f07485a2af9e9e81e490c3e1d) 6629d6c0b56eSmrg 6630d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6631d6c0b56eSmrg 6632d6c0b56eSmrgcommit 15050aabf256c17250d1fca0bfac97fc6707b195 6633d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6634d6c0b56eSmrgDate: Thu Aug 6 17:37:11 2015 +0900 6635d6c0b56eSmrg 6636d6c0b56eSmrg Defer initial modeset until the first BlockHandler invocation 6637d6c0b56eSmrg 6638d6c0b56eSmrg This ensures that the screen pixmap contents have been initialized when 6639d6c0b56eSmrg the initial modes are set. 6640d6c0b56eSmrg 6641d6c0b56eSmrg (Ported from radeon commits 673e1c7637687c74fc9bdeeeffb7ace0d04b734f and 6642d6c0b56eSmrg 1584dc545c78e0bce8d4b4b9f26b568e2c211453) 6643d6c0b56eSmrg 6644d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6645d6c0b56eSmrg 6646d6c0b56eSmrgcommit 96b5364496222f1b3afb9caad458f16f156b6c47 6647d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6648d6c0b56eSmrgDate: Thu Aug 6 17:32:45 2015 +0900 6649d6c0b56eSmrg 6650d6c0b56eSmrg Defer initial drmmode_copy_fb call until root window creation 6651d6c0b56eSmrg 6652d6c0b56eSmrg That's late enough for acceleration to be fully initialized, but still 6653d6c0b56eSmrg early enough to set pScreen->canDoBGNoneRoot. 6654d6c0b56eSmrg 6655d6c0b56eSmrg (Ported from radeon commit 37874a4eeace5df04b02c8fc28f67b824e3f0f5f) 6656d6c0b56eSmrg 6657d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6658d6c0b56eSmrg 6659d6c0b56eSmrgcommit 0fb45f2bba89379ba25d4c863091937b6384bda9 6660d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6661d6c0b56eSmrgDate: Thu Aug 6 17:25:53 2015 +0900 6662d6c0b56eSmrg 6663d6c0b56eSmrg Only copy fbcon BO contents if bgNoneRoot is TRUE 6664d6c0b56eSmrg 6665d6c0b56eSmrg Otherwise, the X server will initialize the screen pixmap contents 6666d6c0b56eSmrg anyway. 6667d6c0b56eSmrg 6668d6c0b56eSmrg (Ported from radeon commit 39c497f3efca5ca08343b884f44c93215dcdef31) 6669d6c0b56eSmrg 6670d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6671d6c0b56eSmrg 6672d6c0b56eSmrgcommit cac553d3b691d26eaad24fbdcba06097b6728a6d 6673d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6674d6c0b56eSmrgDate: Thu Aug 6 17:20:22 2015 +0900 6675d6c0b56eSmrg 6676d6c0b56eSmrg Add .dir-locals.el file with Emacs indentation settings 6677d6c0b56eSmrg 6678d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6679d6c0b56eSmrg 6680d6c0b56eSmrgcommit ea32253541959cc36a40fb0118200a8f493dc98a 6681d6c0b56eSmrgAuthor: Jammy Zhou <Jammy.Zhou@amd.com> 6682d6c0b56eSmrgDate: Wed Jul 15 11:26:28 2015 +0800 6683d6c0b56eSmrg 6684d6c0b56eSmrg Adapt to the interface change of amdgpu_bo_alloc v3 6685d6c0b56eSmrg 6686d6c0b56eSmrg The amdgpu_bo_alloc_result structure is removed from libdrm_amdgpu, 6687d6c0b56eSmrg and the amdgpu_bo_handle is returned directly 6688d6c0b56eSmrg 6689d6c0b56eSmrg v2: remove the va_map/unmap 6690d6c0b56eSmrg v3: simply the code a bit 6691d6c0b56eSmrg 6692d6c0b56eSmrg Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> 6693d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6694d6c0b56eSmrg 6695d6c0b56eSmrgcommit 3010d3259d3bc74263d526e54e02bc169c8d4b4d 6696d6c0b56eSmrgAuthor: Mario Kleiner <mario.kleiner.de@gmail.com> 6697d6c0b56eSmrgDate: Wed Jul 15 09:54:59 2015 +0200 6698d6c0b56eSmrg 6699d6c0b56eSmrg Allow/Fix use of multiple ZaphodHead outputs per x-screen. 6700d6c0b56eSmrg 6701d6c0b56eSmrg Defining multiple ZaphodHead outputs per x-screen in a 6702d6c0b56eSmrg multiple x-screen's per gpu configuration caused all 6703d6c0b56eSmrg outputs except one per x-screen to go dark, because 6704d6c0b56eSmrg there was a fixed mapping x-screen number -> crtc number, 6705d6c0b56eSmrg limiting the number of crtc's per x-screen to one. 6706d6c0b56eSmrg 6707d6c0b56eSmrg On a ZaphodHead's setup, be more clever and assign 6708d6c0b56eSmrg as many crtc's to a given x-screen as there are 6709d6c0b56eSmrg ZaphodHeads defined for that screen, assuming 6710d6c0b56eSmrg there are enough unused crtc's available. 6711d6c0b56eSmrg 6712d6c0b56eSmrg (Ported from radeon commit afab7839fc15722dbaa7203d00fe7f6ce5336b9d) 6713d6c0b56eSmrg 6714d6c0b56eSmrg Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> 6715d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6716d6c0b56eSmrg 6717d6c0b56eSmrgcommit 159c5d460a330cf0a24678f3c6c3e2fbaf23c571 6718d6c0b56eSmrgAuthor: Dave Airlie <airlied@gmail.com> 6719d6c0b56eSmrgDate: Tue Jul 14 17:04:14 2015 +0900 6720d6c0b56eSmrg 6721d6c0b56eSmrg Adopt for new X server dirty tracking APIs. 6722d6c0b56eSmrg 6723d6c0b56eSmrg Signed-off-by: Dave Airlie <airlied@redhat.com> 6724d6c0b56eSmrg 6725d6c0b56eSmrg (Ported from radeon commit b6d871bf299c7d0f106c07ee4d8bd3b2337f53cc) 6726d6c0b56eSmrg 6727d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6728d6c0b56eSmrg 6729d6c0b56eSmrgcommit 7b3212e33cd36fb6f122774df27b56ec4e1a22b8 6730d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6731d6c0b56eSmrgDate: Thu Jul 9 17:57:29 2015 +0900 6732d6c0b56eSmrg 6733d6c0b56eSmrg DRI2: Don't ignore rotated CRTCs in amdgpu_dri2_drawable_crtc 6734d6c0b56eSmrg 6735d6c0b56eSmrg Waiting for vblank interrupts works fine with rotated CRTCs. The only 6736d6c0b56eSmrg case we can't handle with rotation is page flipping, which is handled 6737d6c0b56eSmrg in can_exchange(). 6738d6c0b56eSmrg 6739d6c0b56eSmrg This fixes gnome-shell hanging on rotation, probably because 6740d6c0b56eSmrg amdgpu_dri2_get_msc returned MSC/UST 0 for rotated CRTCs. 6741d6c0b56eSmrg 6742d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 6743d6c0b56eSmrg 6744d6c0b56eSmrgcommit 5587a7b43d02d6371ed4675a6260427492ebad94 6745d6c0b56eSmrgAuthor: Piotr Redlewski <predlewski@gmail.com> 6746d6c0b56eSmrgDate: Wed Jul 8 20:59:14 2015 +0200 6747d6c0b56eSmrg 6748d6c0b56eSmrg Do not try to enable already enabled CRTCs in DPMS hook 6749d6c0b56eSmrg 6750d6c0b56eSmrg (Ported from radeon commit a8ed62010d5012dfb27773595c446b217f3c00c5) 6751d6c0b56eSmrg 6752d6c0b56eSmrg Signed-off-by: Piotr Redlewski <predlewski@gmail.com> 6753d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6754d6c0b56eSmrg 6755d6c0b56eSmrgcommit b176e63df20b345cb378fe962afd14eed43421d3 6756d6c0b56eSmrgAuthor: Piotr Redlewski <predlewski@gmail.com> 6757d6c0b56eSmrgDate: Sun Jun 28 23:20:22 2015 +0200 6758d6c0b56eSmrg 6759d6c0b56eSmrg Enable/disable CRTCs in DPMS hook 6760d6c0b56eSmrg 6761d6c0b56eSmrg The CRTC DPMS hook hasn't enabled or disabled hardware CRTCs. 6762d6c0b56eSmrg 6763d6c0b56eSmrg (Based on radeon commit 48e5be1d5a82c1e0ccf6b7d52924c92a630e52a8) 6764d6c0b56eSmrg 6765d6c0b56eSmrg Signed-off-by: Piotr Redlewski <predlewski@gmail.com> 6766d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6767d6c0b56eSmrg 6768d6c0b56eSmrgcommit d94d4a609c593b46ab718544ee24c25530732f22 6769d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6770d6c0b56eSmrgDate: Thu Jun 11 17:49:33 2015 +0900 6771d6c0b56eSmrg 6772d6c0b56eSmrg Handle CRTC DPMS from output DPMS hooks 6773d6c0b56eSmrg 6774d6c0b56eSmrg This fixes at least two issues: 6775d6c0b56eSmrg 6776d6c0b56eSmrg The CRTC DPMS hook isn't called after a modeset, so the vertical blank 6777d6c0b56eSmrg interrupt emulation code considered the CRTC disabled after a modeset. As 6778d6c0b56eSmrg a side effect, page flipping was no longer used after a modeset. 6779d6c0b56eSmrg 6780d6c0b56eSmrg This change also makes sure the vertical blank interrupt emulation code 6781d6c0b56eSmrg runs before the hardware CRTC is disabled and after it's enabled from the 6782d6c0b56eSmrg output DPMS hook. The wrong order could cause gnome-shell to hang after 6783d6c0b56eSmrg a suspend/resume and/or DPMS off/on cycle. 6784d6c0b56eSmrg 6785d6c0b56eSmrg (Ported from radeon commit c4ae0e2cbcc0e2ebf9f13ee92d59b5120254a1dc) 6786d6c0b56eSmrg 6787d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6788d6c0b56eSmrg 6789d6c0b56eSmrgcommit c57da33308a81fa575179238a0415abcb8b34908 6790d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6791d6c0b56eSmrgDate: Tue Jun 9 12:39:21 2015 +0900 6792d6c0b56eSmrg 6793d6c0b56eSmrg Add Option "TearFree" 6794d6c0b56eSmrg 6795d6c0b56eSmrg Avoids tearing by flipping between two scanout BOs per (non-rotated) CRTC 6796d6c0b56eSmrg 6797d6c0b56eSmrg (Cherry picked from radeon commit 43159ef400c3b18b9f4d3e6fa1c4aef2d60d38fe) 6798d6c0b56eSmrg 6799d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6800d6c0b56eSmrg 6801d6c0b56eSmrgcommit bd0aca09770543fa77b934e1728a832c9c2dc90c 6802d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6803d6c0b56eSmrgDate: Tue Jun 9 11:57:59 2015 +0900 6804d6c0b56eSmrg 6805d6c0b56eSmrg glamor: Remove the stride member of struct radeon_pixmap 6806d6c0b56eSmrg 6807d6c0b56eSmrg Its value was always the same as that of the PixmapRec devKind member. 6808d6c0b56eSmrg 6809d6c0b56eSmrg (Cherry picked from radeon commit ed401f5b4f07375db17ff05e294907ec95fc946d) 6810d6c0b56eSmrg 6811d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6812d6c0b56eSmrg 6813d6c0b56eSmrgcommit e5dfb6c2667994701ee451bf82c4142cbf343405 6814d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6815d6c0b56eSmrgDate: Wed Mar 18 16:23:24 2015 +0900 6816d6c0b56eSmrg 6817d6c0b56eSmrg glamor: Add Option "ShadowPrimary" 6818d6c0b56eSmrg 6819d6c0b56eSmrg When this option is enabled, most pixmaps (including the screen pixmap) 6820d6c0b56eSmrg are allocated in system RAM and mostly accessed by the CPU. Changed areas 6821d6c0b56eSmrg of the screen pixmap are copied to dedicated per-CRTC scanout pixmaps 6822d6c0b56eSmrg regularly, triggered by the vblank interrupt. 6823d6c0b56eSmrg 6824d6c0b56eSmrg (Cherry picked from radeon commits ae92d1765fa370a8d94c2856ad6c45d273ec3c69 6825d6c0b56eSmrg and 1af044d7eee211fd4b248c236280274a68334da5) 6826d6c0b56eSmrg 6827d6c0b56eSmrg [ Michel Dänzer: Additional adjustements for the amdgpu driver ] 6828d6c0b56eSmrg 6829d6c0b56eSmrg Signed-off-by: Darren Powell <darren.powell@amd.com> 6830d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6831d6c0b56eSmrg 6832d6c0b56eSmrgcommit 08da7b691d556735dcc22b1351c886a5079dfd3f 6833d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6834d6c0b56eSmrgDate: Wed Jun 10 16:21:21 2015 +0900 6835d6c0b56eSmrg 6836d6c0b56eSmrg Add AMDGPU_CREATE_PIXMAP_GTT flag 6837d6c0b56eSmrg 6838d6c0b56eSmrg When set, the pixmap memory is allocated in GTT instead of in VRAM. 6839d6c0b56eSmrg 6840d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6841d6c0b56eSmrg 6842d6c0b56eSmrgcommit 59bdb578266a2637fda8d11168b9332f6845157c 6843d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6844d6c0b56eSmrgDate: Wed Jun 10 12:04:29 2015 +0900 6845d6c0b56eSmrg 6846d6c0b56eSmrg Factor out amdgpu_bo_get_handle helper 6847d6c0b56eSmrg 6848d6c0b56eSmrg The helper transparently handles BOs allocated from GBM and 6849d6c0b56eSmrg libdrm_amdgpu. 6850d6c0b56eSmrg 6851d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6852d6c0b56eSmrg 6853d6c0b56eSmrgcommit 9a6eff506b6804481a6e8139d362355fc5ffdbfb 6854d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6855d6c0b56eSmrgDate: Wed Jun 10 12:10:24 2015 +0900 6856d6c0b56eSmrg 6857d6c0b56eSmrg Set AMDGPU_BO_FLAGS_GBM for cursor buffers allocated from GBM 6858d6c0b56eSmrg 6859d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6860d6c0b56eSmrg 6861d6c0b56eSmrgcommit d3ea8a69b02b308f8f23662be6e0c7bd81c1a2c9 6862d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6863d6c0b56eSmrgDate: Fri May 29 18:53:50 2015 +0900 6864d6c0b56eSmrg 6865d6c0b56eSmrg glamor: Add wrappers for the X server rendering hooks 6866d6c0b56eSmrg 6867d6c0b56eSmrg They can choose between using the GPU or CPU for the operation. 6868d6c0b56eSmrg 6869d6c0b56eSmrg (cherry picked from radeon commits eea79472a84672ee4dc7adc4487cec6a4037048a 6870d6c0b56eSmrg and e58fc380ccf2a581d28f041fd74b963626ca5404) 6871d6c0b56eSmrg 6872d6c0b56eSmrg Signed-off-by: Darren Powell <darren.powell@amd.com> 6873d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6874d6c0b56eSmrg 6875d6c0b56eSmrgcommit 895e4d73d5f042afa13065b64a78f5625ecb5612 6876d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6877d6c0b56eSmrgDate: Fri May 29 18:53:40 2015 +0900 6878d6c0b56eSmrg 6879d6c0b56eSmrg glamor: Remove unused function radeon_glamor_pixmap_is_offscreen 6880d6c0b56eSmrg 6881d6c0b56eSmrg (cherry picked from radeon commit 2fa021f77372ca93375a3d13a0c43a9089674899) 6882d6c0b56eSmrg 6883d6c0b56eSmrg Signed-off-by: Darren Powell <darren.powell@amd.com> 6884d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6885d6c0b56eSmrg 6886d6c0b56eSmrgcommit cc5671c587d575b2a7d2802d17e8af0384a2cea5 6887d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6888d6c0b56eSmrgDate: Fri May 29 18:53:36 2015 +0900 6889d6c0b56eSmrg 6890d6c0b56eSmrg Add RADEON_CREATE_PIXMAP_SCANOUT flag 6891d6c0b56eSmrg 6892d6c0b56eSmrg It means that the pixmap is used for scanout exclusively. 6893d6c0b56eSmrg 6894d6c0b56eSmrg (cherry picked from radeon commit e96349ba6281fd18b8bf9c76629128276b065e6c) 6895d6c0b56eSmrg 6896d6c0b56eSmrg Signed-off-by: Darren Powell <darren.powell@amd.com> 6897d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6898d6c0b56eSmrg 6899d6c0b56eSmrgcommit 21834953ee64920438dee1c94f3a1e53dc58b82d 6900d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6901d6c0b56eSmrgDate: Fri May 29 18:53:32 2015 +0900 6902d6c0b56eSmrg 6903d6c0b56eSmrg Split out struct drmmode_scanout for rotation shadow buffer information 6904d6c0b56eSmrg 6905d6c0b56eSmrg Will be used for other kinds of dedicated scanout buffers as well. 6906d6c0b56eSmrg 6907d6c0b56eSmrg (cherry picked from radeon commit 9be7dd382e86d2b804de81d4e2af7431b2e16843) 6908d6c0b56eSmrg 6909d6c0b56eSmrg Signed-off-by: Darren Powell <darren.powell@amd.com> 6910d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6911d6c0b56eSmrg 6912d6c0b56eSmrgcommit e4e4f7b83e7d7e43993fa0793d666d6dec2980f8 6913d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6914d6c0b56eSmrgDate: Fri May 29 18:53:21 2015 +0900 6915d6c0b56eSmrg 6916d6c0b56eSmrg Rename scanout_pixmap_x field to prime_pixmap_x 6917d6c0b56eSmrg 6918d6c0b56eSmrg To avoid confusion with upcoming changes. 6919d6c0b56eSmrg 6920d6c0b56eSmrg (cherry picked from radeon commit c32b0530302739f6512755bccf281c2300617376) 6921d6c0b56eSmrg 6922d6c0b56eSmrg Signed-off-by: Darren Powell <darren.powell@amd.com> 6923d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6924d6c0b56eSmrg 6925d6c0b56eSmrgcommit edfff6b1a3a19953644b8052b30076f76f7dc337 6926d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6927d6c0b56eSmrgDate: Tue Jun 2 17:04:21 2015 +0900 6928d6c0b56eSmrg 6929d6c0b56eSmrg Add DRI3 support 6930d6c0b56eSmrg 6931d6c0b56eSmrg Must be enabled with 6932d6c0b56eSmrg 6933504d986fSmrg Option "DRI3" 6934d6c0b56eSmrg 6935d6c0b56eSmrg in xorg.conf. 6936d6c0b56eSmrg 6937d6c0b56eSmrg (Cherry picked from radeon commits 64e1e4dbdd3caee6f5d8f6b6c094b4533fa94953, 6938d6c0b56eSmrg 694e04720b886060fe3eefdce59741f218c8269f, 6939d6c0b56eSmrg f940fd741b15f03393037c5bb904cd74f012de9d, 6940d6c0b56eSmrg fcd37f65f485291084c174666bd605e215bf1398, 6941d6c0b56eSmrg 4b0997e56dec0053cb2cb793e0f4ae35055ff7e6, 6942d6c0b56eSmrg f68d9b5ba0c91a725b5eec9386c61bea8824c299 and 6943d6c0b56eSmrg 98fb4199e63fedd4607cddee64bf602d6398df81) 6944d6c0b56eSmrg 6945d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6946d6c0b56eSmrg 6947d6c0b56eSmrgcommit d295b5b3310bc5c23d232c4be4170165a057c090 6948d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6949d6c0b56eSmrgDate: Tue Jun 2 17:01:06 2015 +0900 6950d6c0b56eSmrg 6951d6c0b56eSmrg amdgpu_set_shared_pixmap_backing: Add support for GBM / glamor v2 6952d6c0b56eSmrg 6953d6c0b56eSmrg v2: Initialize reference count of imported GBM BOs to 1, fixes leaking 6954d6c0b56eSmrg them. 6955d6c0b56eSmrg 6956d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> [v1] 6957d6c0b56eSmrg 6958d6c0b56eSmrgcommit 03ad0fa0185d215f7d4234006e04406af1ab63ca 6959d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6960d6c0b56eSmrgDate: Fri May 29 18:53:45 2015 +0900 6961d6c0b56eSmrg 6962d6c0b56eSmrg glamor: Add radeon_pixmap parameter to radeon_glamor_create_textured_pixmap 6963d6c0b56eSmrg 6964d6c0b56eSmrg (cherry picked from radeon commit 051d46382656ffc3e6cac1aab3aee7efdf5b623a) 6965d6c0b56eSmrg 6966d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 6967d6c0b56eSmrg Signed-off-by: Darren Powell <darren.powell@amd.com> 6968d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6969d6c0b56eSmrg 6970d6c0b56eSmrgcommit fafb8c6ac925ad16073e5a60dbf60d5add11bb25 6971d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6972d6c0b56eSmrgDate: Tue Jun 2 17:00:46 2015 +0900 6973d6c0b56eSmrg 6974d6c0b56eSmrg Add support for the Present extension 6975d6c0b56eSmrg 6976d6c0b56eSmrg (Cherry picked from radeon commits 3c65fb849e1ba9fb6454bcaa55b696548902f3fc, 6977d6c0b56eSmrg 694e04720b886060fe3eefdce59741f218c8269f, 6978d6c0b56eSmrg e3be8b0a8cf484ff16597413a6172788178e80c8, 6979d6c0b56eSmrg 80eede245d1eda27eaba108b0761a24bfd69aff6 and 6980d6c0b56eSmrg 5f82a720374c9c1caebb42bfbeea1f0cf8847d28) 6981d6c0b56eSmrg 6982d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6983d6c0b56eSmrg 6984d6c0b56eSmrgcommit 5b51f0e7e396ea946ef85429a8e9be5c1d5c39c3 6985d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 6986d6c0b56eSmrgDate: Tue Jun 2 16:58:27 2015 +0900 6987d6c0b56eSmrg 6988d6c0b56eSmrg Add support for SYNC extension fences 6989d6c0b56eSmrg 6990d6c0b56eSmrg (Cherry picked from radeon commits 8fc9a241ab59ffbcdc178d6415332c88a54e85fe, 6991d6c0b56eSmrg af1862a37570fa512a525ab47d72b30400d2e2d6, 6992d6c0b56eSmrg aa7825eb29cdf6ac9d7b28ad18186807ff384687, 6993d6c0b56eSmrg af6076241c0d322b295a4e898407ae2472bd8eb4 and 6994d6c0b56eSmrg d64a13ebe0ecd241ee3260dbffd8f4a01e254183) 6995d6c0b56eSmrg 6996d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 6997d6c0b56eSmrg 6998d6c0b56eSmrgcommit a30060d22a42688371166a861e5050fdd5ce8f7b 6999d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7000d6c0b56eSmrgDate: Mon Jun 1 18:33:33 2015 +0900 7001d6c0b56eSmrg 7002d6c0b56eSmrg DRI2: Split out helper for getting UST and MSC of a specific CRTC 7003d6c0b56eSmrg 7004d6c0b56eSmrg (Cherry picked from radeon commits 76c2923ac5c7230a8b2f9f8329c308d28b44d9c0 7005d6c0b56eSmrg and d7c82731a8bf3d381bc571b94d80d9bb2dd6e40d) 7006d6c0b56eSmrg 7007d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7008d6c0b56eSmrg 7009d6c0b56eSmrgcommit 9a554a683b970660b467566cf05b921393705a20 7010d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7011d6c0b56eSmrgDate: Mon Jun 1 17:32:56 2015 +0900 7012d6c0b56eSmrg 7013d6c0b56eSmrg DRI2: Use helper functions for DRM event queue management 7014d6c0b56eSmrg 7015d6c0b56eSmrg This is mostly in preparation for Present support, but it also simplifies 7016d6c0b56eSmrg the DRI2 specific code a little. 7017d6c0b56eSmrg 7018d6c0b56eSmrg (Cherry picked from radeon commit 6c3a721cde9317233072b573f9502348dcd21b16) 7019d6c0b56eSmrg 7020d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7021d6c0b56eSmrg 7022d6c0b56eSmrgcommit e6164ad340f65ff8ee6f6a6934302591af875a43 7023d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7024d6c0b56eSmrgDate: Mon Jun 1 17:29:30 2015 +0900 7025d6c0b56eSmrg 7026d6c0b56eSmrg DRI2: Move amdgpu_dri2_flip_event_handler 7027d6c0b56eSmrg 7028d6c0b56eSmrg In preparation for the next change, which will modify it to a static 7029d6c0b56eSmrg function which needs to be in the new place. No functional change. 7030d6c0b56eSmrg 7031d6c0b56eSmrg (Cherry picked from radeon commit c3fa22a479e61d1899fa9d327d9c4e2a7f64b0c1) 7032d6c0b56eSmrg 7033d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7034d6c0b56eSmrg 7035d6c0b56eSmrgcommit 5419e13da7ec3cffd43510ac88106076ea81124c 7036d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7037d6c0b56eSmrgDate: Mon Jun 1 17:25:23 2015 +0900 7038d6c0b56eSmrg 7039d6c0b56eSmrg DRI2: Remove superfluous assignments to *_info->frame 7040d6c0b56eSmrg 7041d6c0b56eSmrg That field is only used for page flipping. 7042d6c0b56eSmrg 7043d6c0b56eSmrg (Cherry picked from radeon commit 65045112fdc8a9fa36e0e00f46739a6152b775ff) 7044d6c0b56eSmrg 7045d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7046d6c0b56eSmrg 7047d6c0b56eSmrgcommit f4c2b640be17ab1f8694b35d4cb74ccfce3d1385 7048d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7049d6c0b56eSmrgDate: Mon Jun 1 17:11:30 2015 +0900 7050d6c0b56eSmrg 7051d6c0b56eSmrg DRI2: Simplify blit fallback handling for scheduled swaps 7052d6c0b56eSmrg 7053d6c0b56eSmrg Also use amdgpu_dri2_schedule_event when possible. 7054d6c0b56eSmrg 7055d6c0b56eSmrg (Cherry picked from radeon commit ad27f16f308079d06a2b1c788b3cb0947531253a) 7056d6c0b56eSmrg 7057d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7058d6c0b56eSmrg 7059d6c0b56eSmrgcommit 13a7284e061081a12180b375d66f9b8394cf8753 7060d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7061d6c0b56eSmrgDate: Mon Jun 1 16:58:00 2015 +0900 7062d6c0b56eSmrg 7063d6c0b56eSmrg Add DRM event queue helpers 7064d6c0b56eSmrg 7065d6c0b56eSmrg (Cherry picked from radeon commit b4af8a327ed8420f0ff4ea0f113f4a59406ed4d3) 7066d6c0b56eSmrg 7067d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7068d6c0b56eSmrg 7069d6c0b56eSmrgcommit eb7c6958dff5cb8b0aad02d1d5673483dae4e3d4 7070d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7071d6c0b56eSmrgDate: Mon Jun 1 16:52:40 2015 +0900 7072d6c0b56eSmrg 7073d6c0b56eSmrg Move xorg_list backwards compatibility to new amdgpu_list.h header 7074d6c0b56eSmrg 7075d6c0b56eSmrg (Cherry picked from radeon commits 7c3470f4b659206ed23f761948936ede3a2dba3d 7076d6c0b56eSmrg and 4a98f60117c387a228d5cbaadb6e298fb4e865df) 7077d6c0b56eSmrg 7078d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7079d6c0b56eSmrg 7080d6c0b56eSmrgcommit 69d161a54b4ea0d8033a0873210f2857c91ceae8 7081d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7082d6c0b56eSmrgDate: Mon Jun 1 16:46:30 2015 +0900 7083d6c0b56eSmrg 7084d6c0b56eSmrg Require at least xserver 1.8 7085d6c0b56eSmrg 7086d6c0b56eSmrg So we can rely on the list.h header. 7087d6c0b56eSmrg 7088d6c0b56eSmrg xserver 1.8 was released in April 2010. 7089d6c0b56eSmrg 7090d6c0b56eSmrg (Cherry picked from radeon commit 7388d0b6c54b9d536fdb161e3aa61b326627b939) 7091d6c0b56eSmrg 7092d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7093d6c0b56eSmrg 7094d6c0b56eSmrgcommit 7363156b7c077def2aaf9a4573410817f5e92610 7095d6c0b56eSmrgAuthor: Jammy Zhou <Jammy.Zhou@amd.com> 7096d6c0b56eSmrgDate: Sat May 30 00:31:44 2015 +0800 7097d6c0b56eSmrg 7098d6c0b56eSmrg Check GBM_BO_USE_LINEAR correctly v2 7099d6c0b56eSmrg 7100d6c0b56eSmrg v2: remove the check for gbm.h 7101d6c0b56eSmrg 7102d6c0b56eSmrg Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> 7103d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 7104d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> [v1] 7105d6c0b56eSmrg 7106d6c0b56eSmrgcommit e75e9f39c95b8b563885882bf29d776861cd6ca3 7107d6c0b56eSmrgAuthor: Brian Paterni <bpaterni@gmail.com> 7108d6c0b56eSmrgDate: Sat May 16 15:00:14 2015 -0500 7109d6c0b56eSmrg 7110d6c0b56eSmrg extend conditional group GBM_BO_USE_LINEAR 7111d6c0b56eSmrg over both usages 7112d6c0b56eSmrg 7113d6c0b56eSmrg Fixes 'GBM_BO_USE_LINEAR' undeclared error when compiling against older 7114d6c0b56eSmrg libgbm 7115d6c0b56eSmrg 7116d6c0b56eSmrg Signed-off-by: Brian Paterni <bpaterni@gmail.com> 7117d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 7118d6c0b56eSmrg 7119d6c0b56eSmrgcommit 37b389ee9e13f065fb080d1269f9a6aed616c210 7120d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7121d6c0b56eSmrgDate: Fri May 15 10:24:24 2015 +0900 7122d6c0b56eSmrg 7123d6c0b56eSmrg glamor: Deal with glamor_glyphs_init being removed from xserver 7124d6c0b56eSmrg 7125d6c0b56eSmrg Port of radeon commit 818c180c8932233b214a35ba0647af82f7bcec3d. 7126d6c0b56eSmrg 7127d6c0b56eSmrgcommit 22917044e419023d487f816e0d4f094695b55fa6 7128d6c0b56eSmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 7129d6c0b56eSmrgDate: Tue May 12 13:29:00 2015 -0400 7130d6c0b56eSmrg 7131d6c0b56eSmrg add some new tonga pci ids 7132d6c0b56eSmrg 7133d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 7134d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 7135d6c0b56eSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 7136d6c0b56eSmrg 7137d6c0b56eSmrgcommit e71be4a22799ec4c02051b75c5fed16a3a953c7b 7138d6c0b56eSmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 7139d6c0b56eSmrgDate: Tue May 12 13:25:02 2015 -0400 7140d6c0b56eSmrg 7141d6c0b56eSmrg add new bonaire pci id 7142d6c0b56eSmrg 7143d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 7144d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 7145d6c0b56eSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 7146d6c0b56eSmrg 7147d6c0b56eSmrgcommit b795d1e137b34a314b4b41d025d96ca9251d6bbe 7148d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7149d6c0b56eSmrgDate: Thu May 7 18:05:32 2015 +0900 7150d6c0b56eSmrg 7151d6c0b56eSmrg Link against libgbm 7152d6c0b56eSmrg 7153d6c0b56eSmrg Fixes unresolved symbol "gbm_create_device". 7154d6c0b56eSmrg 7155d6c0b56eSmrg Reported-and-Tested-by: Brian Paterni <bpaterni@gmail.com> 7156d6c0b56eSmrg 7157d6c0b56eSmrgcommit 7e3b27390a03e423772717fca3c757cf5cc4d7b4 7158d6c0b56eSmrgAuthor: Jammy Zhou <Jammy.Zhou@amd.com> 7159d6c0b56eSmrgDate: Tue May 12 05:34:49 2015 +0800 7160d6c0b56eSmrg 7161d6c0b56eSmrg Disable tiling for PRIME shared pixmap 7162d6c0b56eSmrg 7163d6c0b56eSmrg Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> 7164d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 7165d6c0b56eSmrg 7166d6c0b56eSmrgcommit 4840f918ab7d61b4f55bcdff3afdac7b34e45d88 7167d6c0b56eSmrgAuthor: Jammy Zhou <Jammy.Zhou@amd.com> 7168d6c0b56eSmrgDate: Tue May 12 00:09:42 2015 +0800 7169d6c0b56eSmrg 7170d6c0b56eSmrg Use gbm_bo_get_fd to get DMA_BUF fd 7171d6c0b56eSmrg 7172d6c0b56eSmrg When GBM is used for buffer allocation, gbm_bo_get_fd should be 7173d6c0b56eSmrg used to get the DMA_BUF fd. 7174d6c0b56eSmrg 7175d6c0b56eSmrg Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> 7176d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 7177d6c0b56eSmrg 7178d6c0b56eSmrgcommit b69c5b3cc2d7da3bb85acd687db9b5a021258914 7179d6c0b56eSmrgAuthor: Marek Olšák <marek.olsak@amd.com> 7180d6c0b56eSmrgDate: Fri Mar 27 22:56:37 2015 +0100 7181d6c0b56eSmrg 7182d6c0b56eSmrg ddx: use amdgpu_query_crtc_from_id 7183d6c0b56eSmrg 7184d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 7185d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7186d6c0b56eSmrg 7187d6c0b56eSmrgcommit 91aa694a7da7b690a3e5d59a1a8fa42cbb3ebda4 7188d6c0b56eSmrgAuthor: Marek Olšák <marek.olsak@amd.com> 7189d6c0b56eSmrgDate: Fri Mar 27 22:22:35 2015 +0100 7190d6c0b56eSmrg 7191d6c0b56eSmrg ddx: remove AMDGPUIsAccelWorking 7192d6c0b56eSmrg 7193d6c0b56eSmrg libdrm fails to initialize without acceleration, so this always returns true. 7194d6c0b56eSmrg 7195d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 7196d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7197d6c0b56eSmrg 7198d6c0b56eSmrgcommit afc33040f862e2e13ba7f132bb363cf16fb6a1d7 7199d6c0b56eSmrgAuthor: Marek Olšák <marek.olsak@amd.com> 7200d6c0b56eSmrgDate: Fri Mar 27 22:14:37 2015 +0100 7201d6c0b56eSmrg 7202d6c0b56eSmrg ddx: enable acceleration by default on Hawaii 7203d6c0b56eSmrg 7204d6c0b56eSmrg Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> 7205d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7206d6c0b56eSmrg 7207d6c0b56eSmrgcommit 8a34a8149860ac15e83ccdbd8d9a527d8d3e5997 7208d6c0b56eSmrgAuthor: Jammy Zhou <Jammy.Zhou@amd.com> 7209d6c0b56eSmrgDate: Mon Apr 27 14:27:34 2015 +0800 7210d6c0b56eSmrg 7211d6c0b56eSmrg Remove throttling from amdgpu_dri2_copy_region2 7212d6c0b56eSmrg 7213d6c0b56eSmrg Throttling should be handled by the client-side drivers. 7214d6c0b56eSmrg 7215d6c0b56eSmrg Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> 7216d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 7217d6c0b56eSmrg 7218d6c0b56eSmrgcommit 9f61a5506b1028d30c99cb5866abcec35d5c9cb8 7219d6c0b56eSmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 7220d6c0b56eSmrgDate: Fri Apr 24 11:47:32 2015 -0400 7221d6c0b56eSmrg 7222d6c0b56eSmrg fixup README 7223d6c0b56eSmrg 7224d6c0b56eSmrg Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> 7225d6c0b56eSmrg Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 7226d6c0b56eSmrg 7227d6c0b56eSmrgcommit a49ad11af18dad74506c2f69d7bbda07b67529d2 7228d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7229d6c0b56eSmrgDate: Fri Apr 24 09:57:27 2015 +0900 7230d6c0b56eSmrg 7231d6c0b56eSmrg Add 10-amdgpu.conf xorg.conf.d snippet 7232d6c0b56eSmrg 7233d6c0b56eSmrg This instructs Xorg >= 1.16 to try loading the amdgpu driver for devices 7234d6c0b56eSmrg managed by the amdgpu kernel driver. 7235d6c0b56eSmrg 7236d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7237d6c0b56eSmrg 7238d6c0b56eSmrgcommit fa4aed6cf56048a6520eac57514e38db3685cd15 7239d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7240d6c0b56eSmrgDate: Fri Apr 24 09:53:33 2015 +0900 7241d6c0b56eSmrg 7242d6c0b56eSmrg Document Option "AccelMethod" in the manpage 7243d6c0b56eSmrg 7244d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7245d6c0b56eSmrg 7246d6c0b56eSmrgcommit fe4a4b6836252cc8caa642a32fb3910c8590076b 7247d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7248d6c0b56eSmrgDate: Fri Apr 24 09:52:04 2015 +0900 7249d6c0b56eSmrg 7250d6c0b56eSmrg Fix build when gbm.h doesn't define GBM_BO_USE_LINEAR 7251d6c0b56eSmrg 7252d6c0b56eSmrg Option "AccelMethod" "none" is ignored in that case. 7253d6c0b56eSmrg 7254d6c0b56eSmrg Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 7255d6c0b56eSmrg 7256d6c0b56eSmrgcommit 84df3e7114fb71b5e10c1a6f7869ab1505fef5b0 7257d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7258d6c0b56eSmrgDate: Fri Apr 24 09:51:22 2015 +0900 7259d6c0b56eSmrg 7260d6c0b56eSmrg glamor: Handle GLAMOR_* flags removed from xserver 7261d6c0b56eSmrg 7262d6c0b56eSmrg The behaviour is the same as when the removed flags were passed in. 7263d6c0b56eSmrg 7264d6c0b56eSmrg (cherry picked from radeon commit b16609b453bb1a181198cf27778f205dc23fb642) 7265d6c0b56eSmrg 7266d6c0b56eSmrg Reviewed-by: Christian König <christian.koenig@amd.com> 7267d6c0b56eSmrg 7268d6c0b56eSmrgcommit b947f4bf4efa8841bea4d306d0b0d21c7511c724 7269d6c0b56eSmrgAuthor: Michel Dänzer <michel.daenzer@amd.com> 7270d6c0b56eSmrgDate: Fri Apr 24 09:50:51 2015 +0900 7271d6c0b56eSmrg 7272d6c0b56eSmrg Move #include "radeon_glamor.h" from amdgpu_drv.h to where it's needed 7273d6c0b56eSmrg 7274d6c0b56eSmrg (cherry picked from radeon commit 4b8adebb80158bcf81ada83bb88517febe931b12) 7275d6c0b56eSmrg 7276d6c0b56eSmrg Reviewed-by: Christian König <christian.koenig@amd.com> 7277d6c0b56eSmrg 7278d6c0b56eSmrgcommit ff62bf6e9dce55dbde92baf4fa30193c7344ee8a 7279d6c0b56eSmrgAuthor: Alex Deucher <alexander.deucher@amd.com> 7280d6c0b56eSmrgDate: Mon Apr 20 11:57:52 2015 -0400 7281d6c0b56eSmrg 7282d6c0b56eSmrg amdgpu: add the xf86-video-amdgpu driver 7283d6c0b56eSmrg 7284d6c0b56eSmrg This adds the new xf86-video-amdgpu driver for 7285d6c0b56eSmrg newer AMD GPUs. 7286d6c0b56eSmrg 7287 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 7288