amdgpu_drv.h revision 504d986f
1/* 2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and 3 * VA Linux Systems Inc., Fremont, California. 4 * 5 * All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining 8 * a copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation on the rights to use, copy, modify, merge, 11 * publish, distribute, sublicense, and/or sell copies of the Software, 12 * and to permit persons to whom the Software is furnished to do so, 13 * subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the 16 * next paragraph) shall be included in all copies or substantial 17 * portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 22 * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR 23 * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 24 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 26 * DEALINGS IN THE SOFTWARE. 27 */ 28 29/* 30 * Authors: 31 * Kevin E. Martin <martin@xfree86.org> 32 * Rickard E. Faith <faith@valinux.com> 33 * Alan Hourihane <alanh@fairlite.demon.co.uk> 34 * 35 */ 36 37#ifndef _AMDGPU_DRV_H_ 38#define _AMDGPU_DRV_H_ 39 40#include <stdlib.h> /* For abs() */ 41#include <unistd.h> /* For usleep() */ 42#include <sys/time.h> /* For gettimeofday() */ 43 44#include "config.h" 45 46#include "xf86str.h" 47#include "compiler.h" 48 49/* PCI support */ 50#include "xf86Pci.h" 51 52#include "fb.h" 53 54/* Cursor Support */ 55#include "xf86Cursor.h" 56 57/* DDC support */ 58#include "xf86DDC.h" 59 60/* Xv support */ 61#include "xf86xv.h" 62 63#include "amdgpu_probe.h" 64 65/* DRI support */ 66#include "xf86drm.h" 67#include "amdgpu_drm.h" 68 69#ifdef DAMAGE 70#include "damage.h" 71#include "globals.h" 72#endif 73 74#include "xf86Crtc.h" 75#include "X11/Xatom.h" 76 77#include "amdgpu_dri2.h" 78#include "drmmode_display.h" 79#include "amdgpu_bo_helper.h" 80 81/* Render support */ 82#ifdef RENDER 83#include "picturestr.h" 84#endif 85 86#include "compat-api.h" 87 88#include "simple_list.h" 89#include "amdpciids.h" 90 91struct _SyncFence; 92 93#ifndef MAX 94#define MAX(a,b) ((a)>(b)?(a):(b)) 95#endif 96#ifndef MIN 97#define MIN(a,b) ((a)>(b)?(b):(a)) 98#endif 99 100#if HAVE_BYTESWAP_H 101#include <byteswap.h> 102#elif defined(USE_SYS_ENDIAN_H) 103#include <sys/endian.h> 104#else 105#define bswap_16(value) \ 106 ((((value) & 0xff) << 8) | ((value) >> 8)) 107 108#define bswap_32(value) \ 109 (((uint32_t)bswap_16((uint16_t)((value) & 0xffff)) << 16) | \ 110 (uint32_t)bswap_16((uint16_t)((value) >> 16))) 111 112#define bswap_64(value) \ 113 (((uint64_t)bswap_32((uint32_t)((value) & 0xffffffff)) \ 114 << 32) | \ 115 (uint64_t)bswap_32((uint32_t)((value) >> 32))) 116#endif 117 118#if X_BYTE_ORDER == X_BIG_ENDIAN 119#define le32_to_cpu(x) bswap_32(x) 120#define le16_to_cpu(x) bswap_16(x) 121#define cpu_to_le32(x) bswap_32(x) 122#define cpu_to_le16(x) bswap_16(x) 123#else 124#define le32_to_cpu(x) (x) 125#define le16_to_cpu(x) (x) 126#define cpu_to_le32(x) (x) 127#define cpu_to_le16(x) (x) 128#endif 129 130/* Provide substitutes for gcc's __FUNCTION__ on other compilers */ 131#if !defined(__GNUC__) && !defined(__FUNCTION__) 132#define __FUNCTION__ __func__ /* C99 */ 133#endif 134 135typedef enum { 136 OPTION_ACCEL, 137 OPTION_SW_CURSOR, 138 OPTION_PAGE_FLIP, 139#ifdef RENDER 140 OPTION_SUBPIXEL_ORDER, 141#endif 142 OPTION_ZAPHOD_HEADS, 143 OPTION_ACCEL_METHOD, 144 OPTION_DRI3, 145 OPTION_DRI, 146 OPTION_SHADOW_PRIMARY, 147 OPTION_TEAR_FREE, 148 OPTION_DELETE_DP12, 149} AMDGPUOpts; 150 151#if XF86_CRTC_VERSION >= 5 152#define AMDGPU_PIXMAP_SHARING 1 153#endif 154 155#define AMDGPU_VSYNC_TIMEOUT 20000 /* Maximum wait for VSYNC (in usecs) */ 156 157/* Buffer are aligned on 4096 byte boundaries */ 158#define AMDGPU_GPU_PAGE_SIZE 4096 159#define AMDGPU_BUFFER_ALIGN (AMDGPU_GPU_PAGE_SIZE - 1) 160 161#define xFixedToFloat(f) (((float) (f)) / 65536) 162 163#define AMDGPU_LOGLEVEL_DEBUG 4 164 165/* Other macros */ 166#define AMDGPU_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) 167#define AMDGPU_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1)) 168#define AMDGPUPTR(pScrn) ((AMDGPUInfoPtr)(pScrn)->driverPrivate) 169 170#define CURSOR_WIDTH 64 171#define CURSOR_HEIGHT 64 172 173#define CURSOR_WIDTH_CIK 128 174#define CURSOR_HEIGHT_CIK 128 175 176#define AMDGPU_BO_FLAGS_GBM 0x1 177 178struct amdgpu_buffer { 179 union { 180 struct gbm_bo *gbm; 181 amdgpu_bo_handle amdgpu; 182 } bo; 183 void *cpu_ptr; 184 uint32_t ref_count; 185 uint32_t flags; 186}; 187 188struct amdgpu_client_priv { 189 uint_fast32_t needs_flush; 190}; 191 192typedef struct { 193 EntityInfoPtr pEnt; 194 pciVideoPtr PciInfo; 195 int Chipset; 196 AMDGPUChipFamily ChipFamily; 197 struct gbm_device *gbm; 198 199 Bool(*CloseScreen) (CLOSE_SCREEN_ARGS_DECL); 200 201 void (*BlockHandler) (BLOCKHANDLER_ARGS_DECL); 202 203 void (*CreateFence) (ScreenPtr pScreen, struct _SyncFence *pFence, 204 Bool initially_triggered); 205 206 int pix24bpp; /* Depth of pixmap for 24bpp fb */ 207 Bool dac6bits; /* Use 6 bit DAC? */ 208 209 int pixel_bytes; 210 211 Bool directRenderingEnabled; 212 struct amdgpu_dri2 dri2; 213 214 /* accel */ 215 PixmapPtr fbcon_pixmap; 216 int callback_event_type; 217 uint_fast32_t gpu_flushed; 218 uint_fast32_t gpu_synced; 219 Bool use_glamor; 220 Bool force_accel; 221 Bool shadow_primary; 222 Bool tear_free; 223 224 /* general */ 225 OptionInfoPtr Options; 226 227 DisplayModePtr currentMode; 228 229 CreateScreenResourcesProcPtr CreateScreenResources; 230 CreateWindowProcPtr CreateWindow; 231 232 Bool IsSecondary; 233 234 Bool shadow_fb; 235 void *fb_shadow; 236 struct amdgpu_buffer *front_buffer; 237 struct amdgpu_buffer *cursor_buffer[32]; 238 239 uint64_t vram_size; 240 uint64_t gart_size; 241 drmmode_rec drmmode; 242 Bool drmmode_inited; 243 /* r6xx+ tile config */ 244 Bool have_tiling_info; 245 int group_bytes; 246 247 /* kms pageflipping */ 248 Bool allowPageFlip; 249 250 /* cursor size */ 251 int cursor_w; 252 int cursor_h; 253 254 /* If bit n of this field is set, xf86_config->crtc[n] currently can't 255 * use the HW cursor 256 */ 257 unsigned hwcursor_disabled; 258 259 struct { 260 CreateGCProcPtr SavedCreateGC; 261 RegionPtr (*SavedCopyArea)(DrawablePtr, DrawablePtr, GCPtr, 262 int, int, int, int, int, int); 263 void (*SavedPolyFillRect)(DrawablePtr, GCPtr, int, xRectangle*); 264 CloseScreenProcPtr SavedCloseScreen; 265 GetImageProcPtr SavedGetImage; 266 GetSpansProcPtr SavedGetSpans; 267 CreatePixmapProcPtr SavedCreatePixmap; 268 DestroyPixmapProcPtr SavedDestroyPixmap; 269 CopyWindowProcPtr SavedCopyWindow; 270 ChangeWindowAttributesProcPtr SavedChangeWindowAttributes; 271 BitmapToRegionProcPtr SavedBitmapToRegion; 272#ifdef RENDER 273 CompositeProcPtr SavedComposite; 274 TrianglesProcPtr SavedTriangles; 275 GlyphsProcPtr SavedGlyphs; 276 TrapezoidsProcPtr SavedTrapezoids; 277 AddTrapsProcPtr SavedAddTraps; 278 UnrealizeGlyphProcPtr SavedUnrealizeGlyph; 279#endif 280#ifdef AMDGPU_PIXMAP_SHARING 281 SharePixmapBackingProcPtr SavedSharePixmapBacking; 282 SetSharedPixmapBackingProcPtr SavedSetSharedPixmapBacking; 283#endif 284 } glamor; 285 286} AMDGPUInfoRec, *AMDGPUInfoPtr; 287 288 289/* amdgpu_dri3.c */ 290Bool amdgpu_dri3_screen_init(ScreenPtr screen); 291 292/* amdgpu_kms.c */ 293void amdgpu_scanout_update_handler(xf86CrtcPtr crtc, uint32_t frame, 294 uint64_t usec, void *event_data); 295 296/* amdgpu_present.c */ 297Bool amdgpu_present_screen_init(ScreenPtr screen); 298 299/* amdgpu_sync.c */ 300extern Bool amdgpu_sync_init(ScreenPtr screen); 301extern void amdgpu_sync_close(ScreenPtr screen); 302 303/* amdgpu_video.c */ 304extern void AMDGPUInitVideo(ScreenPtr pScreen); 305extern void AMDGPUResetVideo(ScrnInfoPtr pScrn); 306extern xf86CrtcPtr amdgpu_pick_best_crtc(ScrnInfoPtr pScrn, 307 Bool consider_disabled, 308 int x1, int x2, int y1, int y2); 309 310extern AMDGPUEntPtr AMDGPUEntPriv(ScrnInfoPtr pScrn); 311 312drmVBlankSeqType amdgpu_populate_vbl_request_type(xf86CrtcPtr crtc); 313 314#endif /* _AMDGPU_DRV_H_ */ 315