1943345d3Smrg/*
2943345d3Smrg * ark
3943345d3Smrg */
4943345d3Smrg
5943345d3Smrg#ifndef _ARK_H
6943345d3Smrg#define _ARK_H
7943345d3Smrg
8943345d3Smrg#include "xf86.h"
9943345d3Smrg#include "xf86Pci.h"
103e51e026Smrg#ifdef HAVE_XAA_H
11943345d3Smrg#include "xaa.h"
123e51e026Smrg#endif
13943345d3Smrg#include "vgaHW.h"
14943345d3Smrg
153e51e026Smrg#include "compat-api.h"
163e51e026Smrg#define PCI_VENDOR_ARK			0xEDD8
173e51e026Smrg#define PCI_CHIP_1000PV			0xA091
183e51e026Smrg#define PCI_CHIP_2000PV			0xA099
193e51e026Smrg#define PCI_CHIP_2000MT			0xA0A1
203e51e026Smrg#define PCI_CHIP_2000MI			0xA0A9
213e51e026Smrg
22943345d3Smrgtypedef struct _ARKRegRec {
23943345d3Smrg	unsigned char		sr10, sr11, sr12, sr13, sr14,
24943345d3Smrg				sr15, sr16, sr17, sr18, sr20,
25943345d3Smrg				sr21, sr22, sr23, sr24, sr25,
26943345d3Smrg				sr26, sr27, sr28, sr29, sr2a,
27943345d3Smrg				sr2b;
28943345d3Smrg	unsigned char		sr1c, sr1d;
29943345d3Smrg	unsigned char		cr40, cr41, cr42, cr44, cr46;
30943345d3Smrg	unsigned char		dac_command;
31943345d3Smrg	unsigned char		stg_17xx[3];
32943345d3Smrg	unsigned char		gendac[6];
33943345d3Smrg} ARKRegRec, *ARKRegPtr;
34943345d3Smrg
35943345d3Smrg
36943345d3Smrgtypedef struct _ARKRec {
37f67b85aaSmrg#ifndef XSERVER_LIBPCIACCESS
38943345d3Smrg	pciVideoPtr		PciInfo;
39943345d3Smrg	PCITAG			PciTag;
40f67b85aaSmrg#else
41f67b85aaSmrg	struct pci_device       *PciInfo;
42f67b85aaSmrg#endif
43943345d3Smrg	EntityInfoPtr		pEnt;
44943345d3Smrg	CARD32			IOAddress;
453e51e026Smrg	pointer			FBBase;
463e51e026Smrg	pointer			MMIOBase;
47943345d3Smrg	unsigned long		videoRam;
48943345d3Smrg	OptionInfoPtr		Options;
49943345d3Smrg	unsigned int		Flags;
50943345d3Smrg	Bool			NoAccel;
51943345d3Smrg	CARD32			Bus;
523e51e026Smrg#ifdef HAVE_XAA_H
53943345d3Smrg	XAAInfoRecPtr		pXAA;
543e51e026Smrg#endif
55943345d3Smrg	int			Chipset, ChipRev;
56943345d3Smrg	int			clock_mult;
57943345d3Smrg	int			dac_width;
58943345d3Smrg	int			multiplex_threshold;
59943345d3Smrg	int			ramdac;
60943345d3Smrg	ARKRegRec		SavedRegs;	/* original mode */
61943345d3Smrg	ARKRegRec		ModeRegs;	/* current mode */
623e51e026Smrg	Bool			(*CloseScreen)(CLOSE_SCREEN_ARGS_DECL);
63943345d3Smrg} ARKRec, *ARKPtr;
64943345d3Smrg
65943345d3Smrg
66943345d3Smrg#define ARKPTR(p)	((ARKPtr)((p)->driverPrivate))
67943345d3Smrg
68943345d3Smrg
69943345d3Smrg#define DRIVER_NAME	"ark"
70f67b85aaSmrg#define DRIVER_VERSION	PACKAGE_VERSION
71f67b85aaSmrg#define VERSION_MAJOR	PACKAGE_VERSION_MAJOR
72f67b85aaSmrg#define VERSION_MINOR	PACKAGE_VERSION_MINOR
73f67b85aaSmrg#define PATCHLEVEL	PACKAGE_VERSION_PATCHLEVEL
74943345d3Smrg#define ARK_VERSION	((VERSION_MAJOR << 24) | \
75943345d3Smrg			 (VERSION_MINOR << 16) | \
76943345d3Smrg			  PATCHLEVEL)
77943345d3Smrg
78943345d3Smrg#define	ZOOMDAC		0x404
79943345d3Smrg#define ATT490		0x101
80943345d3Smrg
81943345d3SmrgBool ARKAccelInit(ScreenPtr pScreen);
82943345d3Smrg
83943345d3Smrg#define rdinx(port, ind)	(outb((port), (ind)), inb((port) + 1))
84943345d3Smrg#define wrinx(port, ind, val)						\
85943345d3Smrg    do {								\
86943345d3Smrg	outb((port), (ind));  outb((port) + 1, (val));			\
87943345d3Smrg    } while(0)
88943345d3Smrg#define modinx(port, ind, mask, bits)					\
89943345d3Smrg    do {								\
90943345d3Smrg	unsigned char tmp;						\
91943345d3Smrg	tmp = (rdinx((port), (ind)) & ~(mask)) | ((bits) & (mask));	\
92943345d3Smrg	wrinx((port), (ind), tmp);					\
93943345d3Smrg    } while(0)
94943345d3Smrg
95943345d3Smrg#endif /* _ARK_H */
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