ast.h revision b410ddbe
115fb4814Smrg/* 215fb4814Smrg * Copyright (c) 2005 ASPEED Technology Inc. 315fb4814Smrg * 415fb4814Smrg * Permission to use, copy, modify, distribute, and sell this software and its 515fb4814Smrg * documentation for any purpose is hereby granted without fee, provided that 615fb4814Smrg * the above copyright notice appear in all copies and that both that 715fb4814Smrg * copyright notice and this permission notice appear in supporting 815fb4814Smrg * documentation, and that the name of the authors not be used in 915fb4814Smrg * advertising or publicity pertaining to distribution of the software without 1015fb4814Smrg * specific, written prior permission. The authors makes no representations 1115fb4814Smrg * about the suitability of this software for any purpose. It is provided 1215fb4814Smrg * "as is" without express or implied warranty. 1315fb4814Smrg * 1415fb4814Smrg * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 1515fb4814Smrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 1615fb4814Smrg * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 1715fb4814Smrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 1815fb4814Smrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 1915fb4814Smrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 2015fb4814Smrg * PERFORMANCE OF THIS SOFTWARE. 2115fb4814Smrg */ 2215fb4814Smrg 2315fb4814Smrg#include <string.h> 2415fb4814Smrg#include <stdlib.h> 2515fb4814Smrg 26de78e416Smrg#include "ast_pcirename.h" 27de78e416Smrg 2815fb4814Smrg/* Compiler Options */ 2915fb4814Smrg#define Accel_2D 3015fb4814Smrg/* #define MMIO_2D */ 3115fb4814Smrg#define HWC 32de78e416Smrg/* #define PATCH_ABI_VERSION */ 3315fb4814Smrg 3415fb4814Smrg/* Vendor & Device Info */ 3515fb4814Smrg#ifndef PCI_VENDOR_AST 3615fb4814Smrg#define PCI_VENDOR_AST 0x1A03 3715fb4814Smrg#endif 3815fb4814Smrg 3915fb4814Smrg#ifndef PCI_CHIP_AST2000 4015fb4814Smrg#define PCI_CHIP_AST2000 0x2000 4115fb4814Smrg#endif 4215fb4814Smrg 43de78e416Smrg#ifndef PCI_CHIP_AST2100 44de78e416Smrg#define PCI_CHIP_AST2100 0x2010 45de78e416Smrg#endif 46de78e416Smrg 47de78e416Smrgtypedef enum _CHIP_ID { 48de78e416Smrg VGALegacy, 49de78e416Smrg AST2000, 50de78e416Smrg AST2100, 51de78e416Smrg AST1100, 52de78e416Smrg AST2200, 53b410ddbeSmrg AST2150, 54b410ddbeSmrg AST2300 55de78e416Smrg} CHIP_ID; 56de78e416Smrg 5715fb4814Smrg/* AST REC Info */ 5815fb4814Smrg#define AST_NAME "AST" 5915fb4814Smrg#define AST_DRIVER_NAME "ast" 60de78e416Smrg#define AST_MAJOR_VERSION PACKAGE_VERSION_MAJOR 61de78e416Smrg#define AST_MINOR_VERSION PACKAGE_VERSION_MINOR 62de78e416Smrg#define AST_PATCH_VERSION PACKAGE_VERSION_PATCHLEVEL 6315fb4814Smrg#define AST_VERSION \ 6415fb4814Smrg ((AST_MAJOR_VERSION << 20) | (AST_MINOR_VERSION << 10) | AST_PATCH_VERSION) 6515fb4814Smrg 6615fb4814Smrg/* Customized Info */ 6715fb4814Smrg#define DEFAULT_VIDEOMEM_SIZE 0x00800000 6815fb4814Smrg#define DEFAULT_MMIO_SIZE 0x00020000 6915fb4814Smrg#define DEFAULT_CMDQ_SIZE 0x00100000 7015fb4814Smrg#define MIN_CMDQ_SIZE 0x00040000 7115fb4814Smrg#define CMD_QUEUE_GUARD_BAND 0x00000020 7215fb4814Smrg#define DEFAULT_HWC_NUM 0x00000002 7315fb4814Smrg 74de78e416Smrg/* Patch Info */ 75de78e416Smrg#define ABI_VIDEODRV_VERSION_PATCH SET_ABI_VERSION(0, 5) 76de78e416Smrg 7715fb4814Smrg/* Data Type Definition */ 7815fb4814Smrgtypedef INT32 LONG; 7915fb4814Smrgtypedef CARD8 UCHAR; 8015fb4814Smrgtypedef CARD16 USHORT; 8115fb4814Smrgtypedef CARD32 ULONG; 8215fb4814Smrg 8315fb4814Smrg/* Data Structure Definition */ 8415fb4814Smrgtypedef struct _ASTRegRec { 8515fb4814Smrg UCHAR ExtCRTC[0x50]; 8615fb4814Smrg 8715fb4814Smrg} ASTRegRec, *ASTRegPtr; 8815fb4814Smrg 8915fb4814Smrgtypedef struct _VIDEOMODE { 9015fb4814Smrg 9115fb4814Smrg int ScreenWidth; 9215fb4814Smrg int ScreenHeight; 9315fb4814Smrg int bitsPerPixel; 9415fb4814Smrg int ScreenPitch; 9515fb4814Smrg 9615fb4814Smrg} VIDEOMODE, *PVIDEOMODE; 9715fb4814Smrg 9815fb4814Smrgtypedef struct { 9915fb4814Smrg 10015fb4814Smrg ULONG ulCMDQSize; 10115fb4814Smrg ULONG ulCMDQType; 10215fb4814Smrg 10315fb4814Smrg ULONG ulCMDQOffsetAddr; 10415fb4814Smrg UCHAR *pjCMDQVirtualAddr; 10515fb4814Smrg 10615fb4814Smrg UCHAR *pjCmdQBasePort; 10715fb4814Smrg UCHAR *pjWritePort; 10815fb4814Smrg UCHAR *pjReadPort; 10915fb4814Smrg UCHAR *pjEngStatePort; 11015fb4814Smrg 11115fb4814Smrg ULONG ulCMDQMask; 11215fb4814Smrg ULONG ulCurCMDQueueLen; 11315fb4814Smrg 11415fb4814Smrg ULONG ulWritePointer; 11515fb4814Smrg ULONG ulReadPointer; 11615fb4814Smrg 11715fb4814Smrg ULONG ulReadPointer_OK; /* for Eng_DBGChk */ 11815fb4814Smrg 11915fb4814Smrg} CMDQINFO, *PCMDQINFO; 12015fb4814Smrg 12115fb4814Smrgtypedef struct { 12215fb4814Smrg 12315fb4814Smrg int HWC_NUM; 12415fb4814Smrg int HWC_NUM_Next; 12515fb4814Smrg 12615fb4814Smrg ULONG ulHWCOffsetAddr; 12715fb4814Smrg UCHAR *pjHWCVirtualAddr; 12815fb4814Smrg 12915fb4814Smrg USHORT cursortype; 13015fb4814Smrg USHORT width; 13115fb4814Smrg USHORT height; 13215fb4814Smrg USHORT offset_x; 13315fb4814Smrg USHORT offset_y; 13415fb4814Smrg ULONG fg; 13515fb4814Smrg ULONG bg; 136de78e416Smrg 137de78e416Smrg UCHAR cursorpattern[1024]; 13815fb4814Smrg 13915fb4814Smrg} HWCINFO, *PHWCINFO; 14015fb4814Smrg 14115fb4814Smrgtypedef struct _ASTRec { 14215fb4814Smrg 14315fb4814Smrg EntityInfoPtr pEnt; 144de78e416Smrg#ifndef XSERVER_LIBPCIACCESS 145de78e416Smrg pciVideoPtr PciInfo; 146de78e416Smrg PCITAG PciTag; 147de78e416Smrg#else 148de78e416Smrg struct pci_device *PciInfo; 149de78e416Smrg#endif 15015fb4814Smrg 15115fb4814Smrg OptionInfoPtr Options; 15215fb4814Smrg DisplayModePtr ModePtr; 15315fb4814Smrg FBLinearPtr pCMDQPtr; 15415fb4814Smrg XAAInfoRecPtr AccelInfoPtr; 15515fb4814Smrg xf86CursorInfoPtr HWCInfoPtr; 15615fb4814Smrg FBLinearPtr pHWCPtr; 15715fb4814Smrg 15815fb4814Smrg CloseScreenProcPtr CloseScreen; 15915fb4814Smrg ScreenBlockHandlerProcPtr BlockHandler; 160de78e416Smrg 161de78e416Smrg UCHAR jChipType; 162de78e416Smrg UCHAR jDRAMType; 16315fb4814Smrg 16415fb4814Smrg Bool noAccel; 16515fb4814Smrg Bool noHWC; 16615fb4814Smrg Bool MMIO2D; 16715fb4814Smrg int ENGCaps; 16815fb4814Smrg int DBGSelect; 169de78e416Smrg Bool VGA2Clone; 17015fb4814Smrg 17115fb4814Smrg ULONG FBPhysAddr; /* Frame buffer physical address */ 17215fb4814Smrg ULONG MMIOPhysAddr; /* MMIO region physical address */ 17315fb4814Smrg ULONG BIOSPhysAddr; /* BIOS physical address */ 17415fb4814Smrg 17515fb4814Smrg UCHAR *FBVirtualAddr; /* Map of frame buffer */ 17615fb4814Smrg UCHAR *MMIOVirtualAddr; /* Map of MMIO region */ 17715fb4814Smrg 17815fb4814Smrg unsigned long FbMapSize; 17915fb4814Smrg unsigned long MMIOMapSize; 18015fb4814Smrg 18115fb4814Smrg IOADDRESS IODBase; /* Base of PIO memory area */ 18215fb4814Smrg IOADDRESS PIOOffset; 18315fb4814Smrg IOADDRESS RelocateIO; 18415fb4814Smrg 18515fb4814Smrg VIDEOMODE VideoModeInfo; 18615fb4814Smrg ASTRegRec SavedReg; 18715fb4814Smrg CMDQINFO CMDQInfo; 18815fb4814Smrg HWCINFO HWCInfo; 18915fb4814Smrg ULONG ulCMDReg; 19015fb4814Smrg Bool EnableClip; 191de78e416Smrg 192de78e416Smrg int clip_left; 193de78e416Smrg int clip_top; 194de78e416Smrg int clip_right; 195de78e416Smrg int clip_bottom; 19615fb4814Smrg 19715fb4814Smrg} ASTRec, *ASTRecPtr; 19815fb4814Smrg 19915fb4814Smrg#define ASTPTR(p) ((ASTRecPtr)((p)->driverPrivate)) 20015fb4814Smrg 20115fb4814Smrg/* Include Files */ 20215fb4814Smrg#include "ast_mode.h" 20315fb4814Smrg#include "ast_vgatool.h" 20415fb4814Smrg#include "ast_2dtool.h" 20515fb4814Smrg#include "ast_cursor.h" 206