ast_mode.c revision 15fb4814
1/* 2 * Copyright (c) 2005 ASPEED Technology Inc. 3 * 4 * Permission to use, copy, modify, distribute, and sell this software and its 5 * documentation for any purpose is hereby granted without fee, provided that 6 * the above copyright notice appear in all copies and that both that 7 * copyright notice and this permission notice appear in supporting 8 * documentation, and that the name of the authors not be used in 9 * advertising or publicity pertaining to distribution of the software without 10 * specific, written prior permission. The authors makes no representations 11 * about the suitability of this software for any purpose. It is provided 12 * "as is" without express or implied warranty. 13 * 14 * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 16 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 20 * PERFORMANCE OF THIS SOFTWARE. 21 */ 22 23#ifdef HAVE_CONFIG_H 24#include <config.h> 25#endif 26#include "xf86.h" 27#include "xf86_OSproc.h" 28#include "xf86Resources.h" 29#include "xf86RAC.h" 30#include "xf86cmap.h" 31#include "compiler.h" 32#include "mibstore.h" 33#include "vgaHW.h" 34#include "mipointer.h" 35#include "micmap.h" 36 37#include "fb.h" 38#include "regionstr.h" 39#include "xf86xv.h" 40#include <X11/extensions/Xv.h> 41#include "vbe.h" 42 43#include "xf86PciInfo.h" 44#include "xf86Pci.h" 45 46/* framebuffer offscreen manager */ 47#include "xf86fbman.h" 48 49/* include xaa includes */ 50#include "xaa.h" 51#include "xaarop.h" 52 53/* H/W cursor support */ 54#include "xf86Cursor.h" 55 56/* Driver specific headers */ 57#include "ast.h" 58 59VBIOS_STDTABLE_STRUCT StdTable[] = { 60 /* MD_2_3_400 */ 61 { 62 0x67, 63 {0x00,0x03,0x00,0x02}, 64 {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, 65 0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00, 66 0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3, 67 0xff}, 68 {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, 69 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, 70 0x0c,0x00,0x0f,0x08}, 71 {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 72 0xff} 73 }, 74 /* Mode12/ExtEGATable */ 75 { 76 0xe3, 77 {0x01,0x0f,0x00,0x06}, 78 {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, 79 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 80 0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3, 81 0xff}, 82 {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, 83 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, 84 0x01,0x00,0x0f,0x00}, 85 {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 86 0xff} 87 }, 88 /* ExtVGATable */ 89 { 90 0x2f, 91 {0x01,0x0f,0x00,0x0e}, 92 {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, 93 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 94 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, 95 0xff}, 96 {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 97 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, 98 0x01,0x00,0x00,0x00}, 99 {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f, 100 0xff} 101 }, 102 /* ExtHiCTable */ 103 { 104 0x2f, 105 {0x01,0x0f,0x00,0x0e}, 106 {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, 107 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 108 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, 109 0xff}, 110 {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 111 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, 112 0x01,0x00,0x00,0x00}, 113 {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 114 0xff} 115 }, 116 /* ExtTrueCTable */ 117 { 118 0x2f, 119 {0x01,0x0f,0x00,0x0e}, 120 {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, 121 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 122 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, 123 0xff}, 124 {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 125 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, 126 0x01,0x00,0x00,0x00}, 127 {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 128 0xff} 129 }, 130}; 131 132VBIOS_ENHTABLE_STRUCT Res640x480Table[] = { 133 { 800, 640, 8, 96, 525, 480, 2, 2, VCLK28_322, /* 60Hz */ 134 (SyncNN | HBorder | VBorder | Charx8Dot), 60, 1, 0x2E }, 135 { 832, 640, 16, 40, 520, 480, 1, 3, VCLK31_5, /* 72Hz */ 136 (SyncNN | HBorder | VBorder | Charx8Dot), 72, 2, 0x2E }, 137 { 840, 640, 16, 64, 500, 480, 1, 3, VCLK31_5, /* 75Hz */ 138 (SyncNN | Charx8Dot) , 75, 3, 0x2E }, 139 { 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* 85Hz */ 140 (SyncNN | Charx8Dot) , 85, 4, 0x2E }, 141 { 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* end */ 142 (SyncNN | Charx8Dot) , 0xFF, 4, 0x2E }, 143}; 144 145 146VBIOS_ENHTABLE_STRUCT Res800x600Table[] = { 147 {1024, 800, 24, 72, 625, 600, 1, 2, VCLK36, /* 56Hz */ 148 (SyncPP | Charx8Dot), 56, 1, 0x30 }, 149 {1056, 800, 40, 128, 628, 600, 1, 4, VCLK40, /* 60Hz */ 150 (SyncPP | Charx8Dot), 60, 2, 0x30 }, 151 {1040, 800, 56, 120, 666, 600, 37, 6, VCLK50, /* 72Hz */ 152 (SyncPP | Charx8Dot), 72, 3, 0x30 }, 153 {1056, 800, 16, 80, 625, 600, 1, 3, VCLK49_5, /* 75Hz */ 154 (SyncPP | Charx8Dot), 75, 4, 0x30 }, 155 {1048, 800, 32, 64, 631, 600, 1, 3, VCLK56_25, /* 85Hz */ 156 (SyncPP | Charx8Dot), 85, 5, 0x30 }, 157 {1048, 800, 32, 64, 631, 600, 1, 3, VCLK56_25, /* end */ 158 (SyncPP | Charx8Dot), 0xFF, 5, 0x30 }, 159}; 160 161 162VBIOS_ENHTABLE_STRUCT Res1024x768Table[] = { 163 {1344, 1024, 24, 136, 806, 768, 3, 6, VCLK65, /* 60Hz */ 164 (SyncNN | Charx8Dot), 60, 1, 0x31 }, 165 {1328, 1024, 24, 136, 806, 768, 3, 6, VCLK75, /* 70Hz */ 166 (SyncNN | Charx8Dot), 70, 2, 0x31 }, 167 {1312, 1024, 16, 96, 800, 768, 1, 3, VCLK78_75, /* 75Hz */ 168 (SyncPP | Charx8Dot), 75, 3, 0x31 }, 169 {1376, 1024, 48, 96, 808, 768, 1, 3, VCLK94_5, /* 85Hz */ 170 (SyncPP | Charx8Dot), 85, 4, 0x31 }, 171 {1376, 1024, 48, 96, 808, 768, 1, 3, VCLK94_5, /* end */ 172 (SyncPP | Charx8Dot), 0xFF, 4, 0x31 }, 173}; 174 175VBIOS_ENHTABLE_STRUCT Res1280x1024Table[] = { 176 {1688, 1280, 48, 112, 1066, 1024, 1, 3, VCLK108, /* 60Hz */ 177 (SyncPP | Charx8Dot), 60, 1, 0x32 }, 178 {1688, 1280, 16, 144, 1066, 1024, 1, 3, VCLK135, /* 75Hz */ 179 (SyncPP | Charx8Dot), 75, 2, 0x32 }, 180 {1728, 1280, 64, 160, 1072, 1024, 1, 3, VCLK157_5, /* 85Hz */ 181 (SyncPP | Charx8Dot), 85, 3, 0x32 }, 182 {1728, 1280, 64, 160, 1072, 1024, 1, 3, VCLK157_5, /* end */ 183 (SyncPP | Charx8Dot), 0xFF, 3, 0x32 }, 184}; 185 186VBIOS_ENHTABLE_STRUCT Res1600x1200Table[] = { 187 {2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162, /* 60Hz */ 188 (SyncPP | Charx8Dot), 60, 1, 0x33 }, 189 {2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162, /* end */ 190 (SyncPP | Charx8Dot), 60, 1, 0x33 }, 191}; 192 193VBIOS_DCLK_INFO DCLKTable [] = { 194 {0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */ 195 {0x95, 0x62, 0x03}, /* 01: VCLK28_322 */ 196 {0x67, 0x63, 0x01}, /* 02: VCLK31_5 */ 197 {0x76, 0x63, 0x01}, /* 03: VCLK36 */ 198 {0xEE, 0x67, 0x01}, /* 04: VCLK40 */ 199 {0x82, 0x62, 0x01}, /* 05: VCLK49_5 */ 200 {0xC6, 0x64, 0x01}, /* 06: VCLK50 */ 201 {0x94, 0x62, 0x01}, /* 07: VCLK56_25 */ 202 {0x80, 0x64, 0x00}, /* 08: VCLK65 */ 203 {0x7B, 0x63, 0x00}, /* 09: VCLK75 */ 204 {0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */ 205 {0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */ 206 {0x8E, 0x62, 0x00}, /* 0C: VCLK108 */ 207 {0x85, 0x24, 0x00}, /* 0D: VCLK135 */ 208 {0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */ 209 {0x6A, 0x22, 0x00}, /* 0F: VCLK162 */ 210}; 211 212VBIOS_DAC_INFO DAC_TEXT[] = { 213 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x2a }, { 0x00, 0x2a, 0x00 }, { 0x00, 0x2a, 0x2a }, 214 { 0x2a, 0x00, 0x00 }, { 0x2a, 0x00, 0x2a }, { 0x2a, 0x2a, 0x00 }, { 0x2a, 0x2a, 0x2a }, 215 { 0x00, 0x00, 0x15 }, { 0x00, 0x00, 0x3f }, { 0x00, 0x2a, 0x15 }, { 0x00, 0x2a, 0x3f }, 216 { 0x2a, 0x00, 0x15 }, { 0x2a, 0x00, 0x3f }, { 0x2a, 0x2a, 0x15 }, { 0x2a, 0x2a, 0x3f }, 217 { 0x00, 0x15, 0x00 }, { 0x00, 0x15, 0x2a }, { 0x00, 0x3f, 0x00 }, { 0x00, 0x3f, 0x2a }, 218 { 0x2a, 0x15, 0x00 }, { 0x2a, 0x15, 0x2a }, { 0x2a, 0x3f, 0x00 }, { 0x2a, 0x3f, 0x2a }, 219 { 0x00, 0x15, 0x15 }, { 0x00, 0x15, 0x3f }, { 0x00, 0x3f, 0x15 }, { 0x00, 0x3f, 0x3f }, 220 { 0x2a, 0x15, 0x15 }, { 0x2a, 0x15, 0x3f }, { 0x2a, 0x3f, 0x15 }, { 0x2a, 0x3f, 0x3f }, 221 { 0x15, 0x00, 0x00 }, { 0x15, 0x00, 0x2a }, { 0x15, 0x2a, 0x00 }, { 0x15, 0x2a, 0x2a }, 222 { 0x3f, 0x00, 0x00 }, { 0x3f, 0x00, 0x2a }, { 0x3f, 0x2a, 0x00 }, { 0x3f, 0x2a, 0x2a }, 223 { 0x15, 0x00, 0x15 }, { 0x15, 0x00, 0x3f }, { 0x15, 0x2a, 0x15 }, { 0x15, 0x2a, 0x3f }, 224 { 0x3f, 0x00, 0x15 }, { 0x3f, 0x00, 0x3f }, { 0x3f, 0x2a, 0x15 }, { 0x3f, 0x2a, 0x3f }, 225 { 0x15, 0x15, 0x00 }, { 0x15, 0x15, 0x2a }, { 0x15, 0x3f, 0x00 }, { 0x15, 0x3f, 0x2a }, 226 { 0x3f, 0x15, 0x00 }, { 0x3f, 0x15, 0x2a }, { 0x3f, 0x3f, 0x00 }, { 0x3f, 0x3f, 0x2a }, 227 { 0x15, 0x15, 0x15 }, { 0x15, 0x15, 0x3f }, { 0x15, 0x3f, 0x15 }, { 0x15, 0x3f, 0x3f }, 228 { 0x3f, 0x15, 0x15 }, { 0x3f, 0x15, 0x3f }, { 0x3f, 0x3f, 0x15 }, { 0x3f, 0x3f, 0x3f }, 229}; 230 231VBIOS_DAC_INFO DAC_EGA[] = { 232 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x2a }, { 0x00, 0x2a, 0x00 }, { 0x00, 0x2a, 0x2a }, 233 { 0x2a, 0x00, 0x00 }, { 0x2a, 0x00, 0x2a }, { 0x2a, 0x2a, 0x00 }, { 0x2a, 0x2a, 0x2a }, 234 { 0x00, 0x00, 0x15 }, { 0x00, 0x00, 0x3f }, { 0x00, 0x2a, 0x15 }, { 0x00, 0x2a, 0x3f }, 235 { 0x2a, 0x00, 0x15 }, { 0x2a, 0x00, 0x3f }, { 0x2a, 0x2a, 0x15 }, { 0x2a, 0x2a, 0x3f }, 236 { 0x00, 0x15, 0x00 }, { 0x00, 0x15, 0x2a }, { 0x00, 0x3f, 0x00 }, { 0x00, 0x3f, 0x2a }, 237 { 0x2a, 0x15, 0x00 }, { 0x2a, 0x15, 0x2a }, { 0x2a, 0x3f, 0x00 }, { 0x2a, 0x3f, 0x2a }, 238 { 0x00, 0x15, 0x15 }, { 0x00, 0x15, 0x3f }, { 0x00, 0x3f, 0x15 }, { 0x00, 0x3f, 0x3f }, 239 { 0x2a, 0x15, 0x15 }, { 0x2a, 0x15, 0x3f }, { 0x2a, 0x3f, 0x15 }, { 0x2a, 0x3f, 0x3f }, 240 { 0x15, 0x00, 0x00 }, { 0x15, 0x00, 0x2a }, { 0x15, 0x2a, 0x00 }, { 0x15, 0x2a, 0x2a }, 241 { 0x3f, 0x00, 0x00 }, { 0x3f, 0x00, 0x2a }, { 0x3f, 0x2a, 0x00 }, { 0x3f, 0x2a, 0x2a }, 242 { 0x15, 0x00, 0x15 }, { 0x15, 0x00, 0x3f }, { 0x15, 0x2a, 0x15 }, { 0x15, 0x2a, 0x3f }, 243 { 0x3f, 0x00, 0x15 }, { 0x3f, 0x00, 0x3f }, { 0x3f, 0x2a, 0x15 }, { 0x3f, 0x2a, 0x3f }, 244 { 0x15, 0x15, 0x00 }, { 0x15, 0x15, 0x2a }, { 0x15, 0x3f, 0x00 }, { 0x15, 0x3f, 0x2a }, 245 { 0x3f, 0x15, 0x00 }, { 0x3f, 0x15, 0x2a }, { 0x3f, 0x3f, 0x00 }, { 0x3f, 0x3f, 0x2a }, 246 { 0x15, 0x15, 0x15 }, { 0x15, 0x15, 0x3f }, { 0x15, 0x3f, 0x15 }, { 0x15, 0x3f, 0x3f }, 247 { 0x3f, 0x15, 0x15 }, { 0x3f, 0x15, 0x3f }, { 0x3f, 0x3f, 0x15 }, { 0x3f, 0x3f, 0x3f }, 248}; 249 250VBIOS_DAC_INFO DAC_VGA[] = { 251 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x2a }, { 0x00, 0x2a, 0x00 }, { 0x00, 0x2a, 0x2a }, 252 { 0x2a, 0x00, 0x00 }, { 0x2a, 0x00, 0x2a }, { 0x2a, 0x15, 0x00 }, { 0x2a, 0x2a, 0x2a }, 253 { 0x15, 0x15, 0x15 }, { 0x15, 0x15, 0x3f }, { 0x15, 0x3f, 0x15 }, { 0x15, 0x3f, 0x3f }, 254 { 0x3f, 0x15, 0x15 }, { 0x3f, 0x15, 0x3f }, { 0x3f, 0x3f, 0x15 }, { 0x3f, 0x3f, 0x3f }, 255 { 0x00, 0x00, 0x00 }, { 0x05, 0x05, 0x05 }, { 0x08, 0x08, 0x08 }, { 0x0b, 0x0b, 0x0b }, 256 { 0x0e, 0x0e, 0x0e }, { 0x11, 0x11, 0x11 }, { 0x14, 0x14, 0x14 }, { 0x18, 0x18, 0x18 }, 257 { 0x1c, 0x1c, 0x1c }, { 0x20, 0x20, 0x20 }, { 0x24, 0x24, 0x24 }, { 0x28, 0x28, 0x28 }, 258 { 0x2d, 0x2d, 0x2d }, { 0x32, 0x32, 0x32 }, { 0x38, 0x38, 0x38 }, { 0x3f, 0x3f, 0x3f }, 259 { 0x00, 0x00, 0x3f }, { 0x10, 0x00, 0x3f }, { 0x1f, 0x00, 0x3f }, { 0x2f, 0x00, 0x3f }, 260 { 0x3f, 0x00, 0x3f }, { 0x3f, 0x00, 0x2f }, { 0x3f, 0x00, 0x1f }, { 0x3f, 0x00, 0x10 }, 261 { 0x3f, 0x00, 0x00 }, { 0x3f, 0x10, 0x00 }, { 0x3f, 0x1f, 0x00 }, { 0x3f, 0x2f, 0x00 }, 262 { 0x3f, 0x3f, 0x00 }, { 0x2f, 0x3f, 0x00 }, { 0x1f, 0x3f, 0x00 }, { 0x10, 0x3f, 0x00 }, 263 { 0x00, 0x3f, 0x00 }, { 0x00, 0x3f, 0x10 }, { 0x00, 0x3f, 0x1f }, { 0x00, 0x3f, 0x2f }, 264 { 0x00, 0x3f, 0x3f }, { 0x00, 0x2f, 0x3f }, { 0x00, 0x1f, 0x3f }, { 0x00, 0x10, 0x3f }, 265 { 0x1f, 0x1f, 0x3f }, { 0x27, 0x1f, 0x3f }, { 0x2f, 0x1f, 0x3f }, { 0x37, 0x1f, 0x3f }, 266 { 0x3f, 0x1f, 0x3f }, { 0x3f, 0x1f, 0x37 }, { 0x3f, 0x1f, 0x2f }, { 0x3f, 0x1f, 0x27 }, 267 { 0x3f, 0x1f, 0x1f }, { 0x3f, 0x27, 0x1f }, { 0x3f, 0x2f, 0x1f }, { 0x3f, 0x37, 0x1f }, 268 { 0x3f, 0x3f, 0x1f }, { 0x37, 0x3f, 0x1f }, { 0x2f, 0x3f, 0x1f }, { 0x27, 0x3f, 0x1f }, 269 { 0x1f, 0x3f, 0x1f }, { 0x1f, 0x3f, 0x27 }, { 0x1f, 0x3f, 0x2f }, { 0x1f, 0x3f, 0x37 }, 270 { 0x1f, 0x3f, 0x3f }, { 0x1f, 0x37, 0x3f }, { 0x1f, 0x2f, 0x3f }, { 0x1f, 0x27, 0x3f }, 271 { 0x2d, 0x2d, 0x3f }, { 0x31, 0x2d, 0x3f }, { 0x36, 0x2d, 0x3f }, { 0x3a, 0x2d, 0x3f }, 272 { 0x3f, 0x2d, 0x3f }, { 0x3f, 0x2d, 0x3a }, { 0x3f, 0x2d, 0x36 }, { 0x3f, 0x2d, 0x31 }, 273 { 0x3f, 0x2d, 0x2d }, { 0x3f, 0x31, 0x2d }, { 0x3f, 0x36, 0x2d }, { 0x3f, 0x3a, 0x2d }, 274 { 0x3f, 0x3f, 0x2d }, { 0x3a, 0x3f, 0x2d }, { 0x36, 0x3f, 0x2d }, { 0x31, 0x3f, 0x2d }, 275 { 0x2d, 0x3f, 0x2d }, { 0x2d, 0x3f, 0x31 }, { 0x2d, 0x3f, 0x36 }, { 0x2d, 0x3f, 0x3a }, 276 { 0x2d, 0x3f, 0x3f }, { 0x2d, 0x3a, 0x3f }, { 0x2d, 0x36, 0x3f }, { 0x2d, 0x31, 0x3f }, 277 { 0x00, 0x00, 0x1c }, { 0x07, 0x00, 0x1c }, { 0x0e, 0x00, 0x1c }, { 0x15, 0x00, 0x1c }, 278 { 0x1c, 0x00, 0x1c }, { 0x1c, 0x00, 0x15 }, { 0x1c, 0x00, 0x0e }, { 0x1c, 0x00, 0x07 }, 279 { 0x1c, 0x00, 0x00 }, { 0x1c, 0x07, 0x00 }, { 0x1c, 0x0e, 0x00 }, { 0x1c, 0x15, 0x00 }, 280 { 0x1c, 0x1c, 0x00 }, { 0x15, 0x1c, 0x00 }, { 0x0e, 0x1c, 0x00 }, { 0x07, 0x1c, 0x00 }, 281 { 0x00, 0x1c, 0x00 }, { 0x00, 0x1c, 0x07 }, { 0x00, 0x1c, 0x0e }, { 0x00, 0x1c, 0x15 }, 282 { 0x00, 0x1c, 0x1c }, { 0x00, 0x15, 0x1c }, { 0x00, 0x0e, 0x1c }, { 0x00, 0x07, 0x1c }, 283 { 0x0e, 0x0e, 0x1c }, { 0x11, 0x0e, 0x1c }, { 0x15, 0x0e, 0x1c }, { 0x18, 0x0e, 0x1c }, 284 { 0x1c, 0x0e, 0x1c }, { 0x1c, 0x0e, 0x18 }, { 0x1c, 0x0e, 0x15 }, { 0x1c, 0x0e, 0x11 }, 285 { 0x1c, 0x0e, 0x0e }, { 0x1c, 0x11, 0x0e }, { 0x1c, 0x15, 0x0e }, { 0x1c, 0x18, 0x0e }, 286 { 0x1c, 0x1c, 0x0e }, { 0x18, 0x1c, 0x0e }, { 0x15, 0x1c, 0x0e }, { 0x11, 0x1c, 0x0e }, 287 { 0x0e, 0x1c, 0x0e }, { 0x0e, 0x1c, 0x11 }, { 0x0e, 0x1c, 0x15 }, { 0x0e, 0x1c, 0x18 }, 288 { 0x0e, 0x1c, 0x1c }, { 0x0e, 0x18, 0x1c }, { 0x0e, 0x15, 0x1c }, { 0x0e, 0x11, 0x1c }, 289 { 0x14, 0x14, 0x1c }, { 0x16, 0x14, 0x1c }, { 0x18, 0x14, 0x1c }, { 0x1a, 0x14, 0x1c }, 290 { 0x1c, 0x14, 0x1c }, { 0x1c, 0x14, 0x1a }, { 0x1c, 0x14, 0x18 }, { 0x1c, 0x14, 0x16 }, 291 { 0x1c, 0x14, 0x14 }, { 0x1c, 0x16, 0x14 }, { 0x1c, 0x18, 0x14 }, { 0x1c, 0x1a, 0x14 }, 292 { 0x1c, 0x1c, 0x14 }, { 0x1a, 0x1c, 0x14 }, { 0x18, 0x1c, 0x14 }, { 0x16, 0x1c, 0x14 }, 293 { 0x14, 0x1c, 0x14 }, { 0x14, 0x1c, 0x16 }, { 0x14, 0x1c, 0x18 }, { 0x14, 0x1c, 0x1a }, 294 { 0x14, 0x1c, 0x1c }, { 0x14, 0x1a, 0x1c }, { 0x14, 0x18, 0x1c }, { 0x14, 0x16, 0x1c }, 295 { 0x00, 0x00, 0x10 }, { 0x04, 0x00, 0x10 }, { 0x08, 0x00, 0x10 }, { 0x0c, 0x00, 0x10 }, 296 { 0x10, 0x00, 0x10 }, { 0x10, 0x00, 0x0c }, { 0x10, 0x00, 0x08 }, { 0x10, 0x00, 0x04 }, 297 { 0x10, 0x00, 0x00 }, { 0x10, 0x04, 0x00 }, { 0x10, 0x08, 0x00 }, { 0x10, 0x0c, 0x00 }, 298 { 0x10, 0x10, 0x00 }, { 0x0c, 0x10, 0x00 }, { 0x08, 0x10, 0x00 }, { 0x04, 0x10, 0x00 }, 299 { 0x00, 0x10, 0x00 }, { 0x00, 0x10, 0x04 }, { 0x00, 0x10, 0x08 }, { 0x00, 0x10, 0x0c }, 300 { 0x00, 0x10, 0x10 }, { 0x00, 0x0c, 0x10 }, { 0x00, 0x08, 0x10 }, { 0x00, 0x04, 0x10 }, 301 { 0x08, 0x08, 0x10 }, { 0x0a, 0x08, 0x10 }, { 0x0c, 0x08, 0x10 }, { 0x0e, 0x08, 0x10 }, 302 { 0x10, 0x08, 0x10 }, { 0x10, 0x08, 0x0e }, { 0x10, 0x08, 0x0c }, { 0x10, 0x08, 0x0a }, 303 { 0x10, 0x08, 0x08 }, { 0x10, 0x0a, 0x08 }, { 0x10, 0x0c, 0x08 }, { 0x10, 0x0e, 0x08 }, 304 { 0x10, 0x10, 0x08 }, { 0x0e, 0x10, 0x08 }, { 0x0c, 0x10, 0x08 }, { 0x0a, 0x10, 0x08 }, 305 { 0x08, 0x10, 0x08 }, { 0x08, 0x10, 0x0a }, { 0x08, 0x10, 0x0c }, { 0x08, 0x10, 0x0e }, 306 { 0x08, 0x10, 0x10 }, { 0x08, 0x0e, 0x10 }, { 0x08, 0x0c, 0x10 }, { 0x08, 0x0a, 0x10 }, 307 { 0x0b, 0x0b, 0x10 }, { 0x0c, 0x0b, 0x10 }, { 0x0d, 0x0b, 0x10 }, { 0x0f, 0x0b, 0x10 }, 308 { 0x10, 0x0b, 0x10 }, { 0x10, 0x0b, 0x0f }, { 0x10, 0x0b, 0x0d }, { 0x10, 0x0b, 0x0c }, 309 { 0x10, 0x0b, 0x0b }, { 0x10, 0x0c, 0x0b }, { 0x10, 0x0d, 0x0b }, { 0x10, 0x0f, 0x0b }, 310 { 0x10, 0x10, 0x0b }, { 0x0f, 0x10, 0x0b }, { 0x0d, 0x10, 0x0b }, { 0x0c, 0x10, 0x0b }, 311 { 0x0b, 0x10, 0x0b }, { 0x0b, 0x10, 0x0c }, { 0x0b, 0x10, 0x0d }, { 0x0b, 0x10, 0x0f }, 312 { 0x0b, 0x10, 0x10 }, { 0x0b, 0x0f, 0x10 }, { 0x0b, 0x0d, 0x10 }, { 0x0b, 0x0c, 0x10 }, 313 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, 314 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, 315}; 316 317/* extern. function */ 318extern void vASTOpenKey(ScrnInfoPtr pScrn); 319extern Bool bASTRegInit(ScrnInfoPtr pScrn); 320extern void vAST1000DisplayOn(ASTRecPtr pAST); 321extern void vAST1000DisplayOff(ASTRecPtr pAST); 322 323extern Bool bEnable2D(ScrnInfoPtr pScrn, ASTRecPtr pAST); 324extern void vDisable2D(ScrnInfoPtr pScrn, ASTRecPtr pAST); 325 326extern Bool bInitHWC(ScrnInfoPtr pScrn, ASTRecPtr pAST); 327 328/* Prototype type declaration*/ 329Bool ASTSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode); 330Bool bGetAST1000VGAModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 331void vSetStdReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 332void vSetCRTCReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 333void vSetOffsetReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 334void vSetDCLKReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 335void vSetExtReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 336Bool bSetDACReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 337 338Bool 339ASTSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode) 340{ 341 ASTRecPtr pAST; 342 VBIOS_MODE_INFO vgamodeinfo; 343 344 pAST = ASTPTR(pScrn); 345 346 vASTOpenKey(pScrn); 347 bASTRegInit(pScrn); 348 349 /* pre set mode */ 350 bGetAST1000VGAModeInfo(pScrn, mode, &vgamodeinfo); 351 352 /* set mode */ 353 vSetStdReg(pScrn, mode, &vgamodeinfo); 354 vSetCRTCReg(pScrn, mode, &vgamodeinfo); 355 vSetOffsetReg(pScrn, mode, &vgamodeinfo); 356 vSetDCLKReg(pScrn, mode, &vgamodeinfo); 357 vSetExtReg(pScrn, mode, &vgamodeinfo); 358 bSetDACReg(pScrn, mode, &vgamodeinfo); 359 360 /* post set mode */ 361#ifdef Accel_2D 362 if (!pAST->noAccel) { 363 if (!bEnable2D(pScrn, pAST)) { 364 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Enable 2D failed\n"); 365 pAST->noAccel = TRUE; 366 } 367 } 368#endif 369#ifdef HWC 370 if (!pAST->noHWC) { 371 if (!bInitHWC(pScrn, pAST)) { 372 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Init HWC failed\n"); 373 pAST->noHWC = TRUE; 374 } 375 } 376#endif 377 vAST1000DisplayOn(pAST); 378 379 return (TRUE); 380} 381 382 383Bool bGetAST1000VGAModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 384{ 385 ASTRecPtr pAST; 386 ULONG ulModeID, ulColorIndex, ulRefreshRate, ulRefreshRateIndex = 0; 387 ULONG ulHBorder, ulVBorder; 388 389 pAST = ASTPTR(pScrn); 390 391 switch (pScrn->bitsPerPixel) 392 { 393 case 8: 394 pVGAModeInfo->pStdTableEntry = (PVBIOS_STDTABLE_STRUCT) &StdTable[VGAModeIndex]; 395 ulColorIndex = VGAModeIndex-1; 396 break; 397 case 16: 398 pVGAModeInfo->pStdTableEntry = (PVBIOS_STDTABLE_STRUCT) &StdTable[HiCModeIndex]; 399 ulColorIndex = HiCModeIndex-1; 400 break; 401 case 24: 402 case 32: 403 pVGAModeInfo->pStdTableEntry = (PVBIOS_STDTABLE_STRUCT) &StdTable[TrueCModeIndex]; 404 ulColorIndex = TrueCModeIndex-1; 405 break; 406 default: 407 return (FALSE); 408 } 409 410 switch (mode->CrtcHDisplay) 411 { 412 case 640: 413 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res640x480Table[ulRefreshRateIndex]; 414 break; 415 case 800: 416 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res800x600Table[ulRefreshRateIndex]; 417 break; 418 case 1024: 419 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res1024x768Table[ulRefreshRateIndex]; 420 break; 421 case 1280: 422 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res1280x1024Table[ulRefreshRateIndex]; 423 break; 424 case 1600: 425 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res1600x1200Table[ulRefreshRateIndex]; 426 break; 427 default: 428 return (FALSE); 429 } 430 431 /* Get Proper Mode Index */ 432 ulRefreshRate = (mode->Clock * 1000) / (mode->HTotal * mode->VTotal); 433 434 while (pVGAModeInfo->pEnhTableEntry->ulRefreshRate < ulRefreshRate) 435 { 436 pVGAModeInfo->pEnhTableEntry++; 437 if ((pVGAModeInfo->pEnhTableEntry->ulRefreshRate > ulRefreshRate) || 438 (pVGAModeInfo->pEnhTableEntry->ulRefreshRate == 0xFF)) 439 { 440 pVGAModeInfo->pEnhTableEntry--; 441 break; 442 } 443 } 444 445 /* Update mode CRTC info */ 446 ulHBorder = (pVGAModeInfo->pEnhTableEntry->Flags & HBorder) ? 1:0; 447 ulVBorder = (pVGAModeInfo->pEnhTableEntry->Flags & VBorder) ? 1:0; 448 449 mode->CrtcHTotal = (int) pVGAModeInfo->pEnhTableEntry->HT; 450 mode->CrtcHBlankStart = (int) (pVGAModeInfo->pEnhTableEntry->HDE + ulHBorder); 451 mode->CrtcHBlankEnd = (int) (pVGAModeInfo->pEnhTableEntry->HT - ulHBorder); 452 mode->CrtcHSyncStart = (int) (pVGAModeInfo->pEnhTableEntry->HDE + ulHBorder 453 + pVGAModeInfo->pEnhTableEntry->HFP); 454 mode->CrtcHSyncEnd = (int) (pVGAModeInfo->pEnhTableEntry->HDE + ulHBorder 455 + pVGAModeInfo->pEnhTableEntry->HFP 456 + pVGAModeInfo->pEnhTableEntry->HSYNC); 457 458 mode->CrtcVTotal = (int) pVGAModeInfo->pEnhTableEntry->VT; 459 mode->CrtcVBlankStart = (int) (pVGAModeInfo->pEnhTableEntry->VDE + ulVBorder); 460 mode->CrtcVBlankEnd = (int) (pVGAModeInfo->pEnhTableEntry->VT - ulVBorder); 461 mode->CrtcVSyncStart = (int) (pVGAModeInfo->pEnhTableEntry->VDE + ulVBorder 462 + pVGAModeInfo->pEnhTableEntry->VFP); 463 mode->CrtcVSyncEnd = (int) (pVGAModeInfo->pEnhTableEntry->VDE + ulVBorder 464 + pVGAModeInfo->pEnhTableEntry->VFP 465 + pVGAModeInfo->pEnhTableEntry->VSYNC); 466 467 /* Write mode info to scratch */ 468 ulRefreshRateIndex = pVGAModeInfo->pEnhTableEntry->ulRefreshRateIndex; 469 ulModeID = pVGAModeInfo->pEnhTableEntry->ulModeID; 470 471 SetIndexReg(CRTC_PORT, 0x8C, (UCHAR) ((ulColorIndex & 0x0F) << 4)); 472 SetIndexReg(CRTC_PORT, 0x8D, (UCHAR) (ulRefreshRateIndex & 0xFF)); 473 SetIndexReg(CRTC_PORT, 0x8E, (UCHAR) (ulModeID & 0xFF)); 474 475 return (TRUE); 476} 477 478void vSetStdReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 479{ 480 481 PVBIOS_STDTABLE_STRUCT pStdModePtr; 482 ASTRecPtr pAST; 483 ULONG i; 484 UCHAR jReg; 485 486 pStdModePtr = pVGAModeInfo->pStdTableEntry; 487 pAST = ASTPTR(pScrn); 488 489 /* Set Misc */ 490 jReg = pStdModePtr->MISC; 491 SetReg(MISC_PORT_WRITE,jReg); 492 493 /* Set Seq */ 494 SetIndexReg(SEQ_PORT,0x00, 0x03); 495 for (i=0; i<4; i++) 496 { 497 jReg = pStdModePtr->SEQ[i]; 498 if (!i) (jReg |= 0x20); /* display off */ 499 SetIndexReg(SEQ_PORT,(UCHAR) (i+1), jReg); 500 } 501 502 /* Set CRTC */ 503 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00); 504 for (i=0; i<25; i++) 505 { 506 jReg = pStdModePtr->CRTC[i]; 507 SetIndexReg(CRTC_PORT,(UCHAR) i, jReg); 508 } 509 510 /* Set AR */ 511 jReg = GetReg(INPUT_STATUS1_READ); 512 for (i=0; i<20; i++) 513 { 514 jReg = pStdModePtr->AR[i]; 515 SetReg(AR_PORT_WRITE, (UCHAR) i); 516 SetReg(AR_PORT_WRITE, jReg); 517 } 518 SetReg(AR_PORT_WRITE, 0x14); 519 SetReg(AR_PORT_WRITE, 0x00); 520 521 jReg = GetReg(INPUT_STATUS1_READ); 522 SetReg (AR_PORT_WRITE, 0x20); /* set POS */ 523 524 /* Set GR */ 525 for (i=0; i<9; i++) 526 { 527 SetIndexReg(GR_PORT,(UCHAR) i, jReg); 528 529 } 530 531 532} 533 534void 535vSetCRTCReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 536{ 537 ASTRecPtr pAST; 538 USHORT usTemp; 539 UCHAR jReg05, jReg07, jReg09, jRegAC, jRegAD, jRegAE; 540 541 pAST = ASTPTR(pScrn); 542 jReg05 = jReg07 = jReg09 = jRegAC = jRegAD = jRegAE = 0; 543 544 /* unlock CRTC */ 545 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00); 546 547 /* Horizontal Timing Programming */ 548 usTemp = (mode->CrtcHTotal >> 3) - 5; 549 if (usTemp & 0x100) jRegAC |= 0x01; /* HT D[8] */ 550 SetIndexRegMask(CRTC_PORT,0x00, 0x00, (UCHAR) usTemp); 551 usTemp = (mode->CrtcHDisplay >> 3) - 1; 552 if (usTemp & 0x100) jRegAC |= 0x04; /* HDE D[8] */ 553 SetIndexRegMask(CRTC_PORT,0x01, 0x00, (UCHAR) usTemp); 554 usTemp = (mode->CrtcHBlankStart >> 3) - 1; 555 if (usTemp & 0x100) jRegAC |= 0x10; /* HBS D[8] */ 556 SetIndexRegMask(CRTC_PORT,0x02, 0x00, (UCHAR) usTemp); 557 usTemp = ((mode->CrtcHBlankEnd >> 3) - 1) & 0x7F; 558 if (usTemp & 0x20) jReg05 |= 0x80; /* HBE D[5] */ 559 if (usTemp & 0x40) jRegAD |= 0x01; /* HBE D[6] */ 560 SetIndexRegMask(CRTC_PORT,0x03, 0xE0, (UCHAR) (usTemp & 0x1F)); 561 usTemp = (mode->CrtcHSyncStart >> 3 ); 562 if (usTemp & 0x100) jRegAC |= 0x40; /* HRS D[5] */ 563 SetIndexRegMask(CRTC_PORT,0x04, 0x00, (UCHAR) (usTemp)); 564 usTemp = (mode->CrtcHSyncEnd >> 3 ) & 0x3F; 565 if (usTemp & 0x20) jRegAD |= 0x04; /* HRE D[5] */ 566 SetIndexRegMask(CRTC_PORT,0x05, 0x60, (UCHAR) ((usTemp & 0x1F) | jReg05)); 567 568 SetIndexRegMask(CRTC_PORT,0xAC, 0x00, (UCHAR) jRegAC); 569 SetIndexRegMask(CRTC_PORT,0xAD, 0x00, (UCHAR) jRegAD); 570 571 /* Vetical Timing Programming */ 572 usTemp = (mode->CrtcVTotal) - 2; 573 if (usTemp & 0x100) jReg07 |= 0x01; /* VT D[8] */ 574 if (usTemp & 0x200) jReg07 |= 0x20; 575 if (usTemp & 0x400) jRegAE |= 0x01; /* VT D[10] */ 576 SetIndexRegMask(CRTC_PORT,0x06, 0x00, (UCHAR) usTemp); 577 usTemp = (mode->CrtcVSyncStart) - 1; 578 if (usTemp & 0x100) jReg07 |= 0x04; /* VRS D[8] */ 579 if (usTemp & 0x200) jReg07 |= 0x80; /* VRS D[9] */ 580 if (usTemp & 0x400) jRegAE |= 0x08; /* VRS D[10] */ 581 SetIndexRegMask(CRTC_PORT,0x10, 0x00, (UCHAR) usTemp); 582 usTemp = ((mode->CrtcVSyncEnd) - 1) & 0x3F; 583 if (usTemp & 0x10) jRegAE |= 0x20; /* VRE D[4] */ 584 if (usTemp & 0x20) jRegAE |= 0x40; /* VRE D[5] */ 585 SetIndexRegMask(CRTC_PORT,0x11, 0x70, (UCHAR) (usTemp & 0x0F)); 586 usTemp = (mode->CrtcVDisplay) - 1; 587 if (usTemp & 0x100) jReg07 |= 0x02; /* VDE D[8] */ 588 if (usTemp & 0x200) jReg07 |= 0x40; /* VDE D[9] */ 589 if (usTemp & 0x400) jRegAE |= 0x02; /* VDE D[10] */ 590 SetIndexRegMask(CRTC_PORT,0x12, 0x00, (UCHAR) usTemp); 591 usTemp = (mode->CrtcVBlankStart) - 1; 592 if (usTemp & 0x100) jReg07 |= 0x08; /* VBS D[8] */ 593 if (usTemp & 0x200) jReg09 |= 0x20; /* VBS D[9] */ 594 if (usTemp & 0x400) jRegAE |= 0x04; /* VBS D[10] */ 595 SetIndexRegMask(CRTC_PORT,0x15, 0x00, (UCHAR) usTemp); 596 usTemp = (mode->CrtcVBlankEnd) - 1 ; 597 if (usTemp & 0x100) jRegAE |= 0x10; /* VBE D[8] */ 598 SetIndexRegMask(CRTC_PORT,0x16, 0x00, (UCHAR) usTemp); 599 600 SetIndexRegMask(CRTC_PORT,0x07, 0x00, (UCHAR) jReg07); 601 SetIndexRegMask(CRTC_PORT,0x09, 0xDF, (UCHAR) jReg09); 602 SetIndexRegMask(CRTC_PORT,0xAE, 0x00, (UCHAR) (jRegAE | 0x80)); /* disable line compare */ 603 604 /* lock CRTC */ 605 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x80); 606 607} 608 609void vSetOffsetReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 610{ 611 ASTRecPtr pAST; 612 USHORT usOffset; 613 614 pAST = ASTPTR(pScrn); 615 616 usOffset = pAST->VideoModeInfo.ScreenPitch >> 3; /* Unit: char */ 617 618 SetIndexReg(CRTC_PORT,0x13, (UCHAR) (usOffset & 0xFF)); 619 SetIndexReg(CRTC_PORT,0xB0, (UCHAR) ((usOffset >> 8) & 0x3F)); 620 621} 622 623void vSetDCLKReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 624{ 625 PVBIOS_ENHTABLE_STRUCT pEnhModePtr; 626 PVBIOS_DCLK_INFO pDCLKPtr; 627 ASTRecPtr pAST; 628 629 pAST = ASTPTR(pScrn); 630 631 pEnhModePtr = pVGAModeInfo->pEnhTableEntry; 632 pDCLKPtr = &DCLKTable[pEnhModePtr->DCLKIndex]; 633 634 SetIndexRegMask(CRTC_PORT,0xC0, 0x00, pDCLKPtr->Param1); 635 SetIndexRegMask(CRTC_PORT,0xC1, 0x00, pDCLKPtr->Param2); 636 SetIndexRegMask(CRTC_PORT,0xBB, 0xCF, ((pDCLKPtr->Param3 & 0x03) << 4)); 637 638} 639 640 641void vSetExtReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 642{ 643 644 ASTRecPtr pAST; 645 UCHAR jRegA0, jRegA3, jRegA8; 646 647 pAST = ASTPTR(pScrn); 648 649 jRegA0=jRegA3=jRegA8=0; 650 /* Mode Type Setting */ 651 switch (pScrn->bitsPerPixel) { 652 case 8: 653 jRegA0 = 0x70; 654 jRegA3 = 0x01; 655 jRegA8 = 0x00; 656 break; 657 case 15: 658 case 16: 659 jRegA0 = 0x70; 660 jRegA3 = 0x04; 661 jRegA8 = 0x02; 662 break; 663 case 32: 664 jRegA0 = 0x70; 665 jRegA3 = 0x08; 666 jRegA8 = 0x02; 667 break; 668 } 669 SetIndexRegMask(CRTC_PORT,0xA0, 0x8F, (UCHAR) jRegA0); 670 SetIndexRegMask(CRTC_PORT,0xA3, 0xF0, (UCHAR) jRegA3); 671 SetIndexRegMask(CRTC_PORT,0xA8, 0xFD, (UCHAR) jRegA8); 672 673 /* Set Threshold */ 674 SetIndexReg(CRTC_PORT,0xA7, 0x2F); 675 SetIndexReg(CRTC_PORT,0xA6, 0x1F); 676 677} 678 679 680Bool bSetDACReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 681{ 682 PVBIOS_DAC_INFO pDACPtr; 683 ASTRecPtr pAST; 684 ULONG i, ulDACNumber; 685 UCHAR DACR, DACG, DACB; 686 687 pAST = ASTPTR(pScrn); 688 689 switch (pScrn->bitsPerPixel) 690 { 691 case 8: 692 ulDACNumber = DAC_NUM_VGA; 693 pDACPtr = (PVBIOS_DAC_INFO) &DAC_VGA[0]; 694 break; 695 default: 696 return (FALSE); 697 } 698 699 for (i=0; i<ulDACNumber; i++) 700 { 701 DACR = pDACPtr->DACR; 702 DACG = pDACPtr->DACG; 703 DACB = pDACPtr->DACB; 704 705 VGA_LOAD_PALETTE_INDEX (i, DACR, DACG, DACB); 706 707 pDACPtr++; 708 } 709 710 return (TRUE); 711 712} 713 714 715