ast_mode.c revision de78e416
1/* 2 * Copyright (c) 2005 ASPEED Technology Inc. 3 * 4 * Permission to use, copy, modify, distribute, and sell this software and its 5 * documentation for any purpose is hereby granted without fee, provided that 6 * the above copyright notice appear in all copies and that both that 7 * copyright notice and this permission notice appear in supporting 8 * documentation, and that the name of the authors not be used in 9 * advertising or publicity pertaining to distribution of the software without 10 * specific, written prior permission. The authors makes no representations 11 * about the suitability of this software for any purpose. It is provided 12 * "as is" without express or implied warranty. 13 * 14 * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 16 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 20 * PERFORMANCE OF THIS SOFTWARE. 21 */ 22 23#ifdef HAVE_CONFIG_H 24#include <config.h> 25#endif 26#include "xf86.h" 27#include "xf86_OSproc.h" 28#include "xf86Resources.h" 29#include "xf86RAC.h" 30#include "xf86cmap.h" 31#include "compiler.h" 32#include "mibstore.h" 33#include "vgaHW.h" 34#include "mipointer.h" 35#include "micmap.h" 36 37#include "fb.h" 38#include "regionstr.h" 39#include "xf86xv.h" 40#include <X11/extensions/Xv.h> 41#include "vbe.h" 42 43#include "xf86PciInfo.h" 44#include "xf86Pci.h" 45 46/* framebuffer offscreen manager */ 47#include "xf86fbman.h" 48 49/* include xaa includes */ 50#include "xaa.h" 51#include "xaarop.h" 52 53/* H/W cursor support */ 54#include "xf86Cursor.h" 55 56/* Driver specific headers */ 57#include "ast.h" 58 59VBIOS_STDTABLE_STRUCT StdTable[] = { 60 /* MD_2_3_400 */ 61 { 62 0x67, 63 {0x00,0x03,0x00,0x02}, 64 {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, 65 0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00, 66 0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3, 67 0xff}, 68 {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, 69 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, 70 0x0c,0x00,0x0f,0x08}, 71 {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 72 0xff} 73 }, 74 /* Mode12/ExtEGATable */ 75 { 76 0xe3, 77 {0x01,0x0f,0x00,0x06}, 78 {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, 79 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 80 0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3, 81 0xff}, 82 {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, 83 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, 84 0x01,0x00,0x0f,0x00}, 85 {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 86 0xff} 87 }, 88 /* ExtVGATable */ 89 { 90 0x2f, 91 {0x01,0x0f,0x00,0x0e}, 92 {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, 93 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 94 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, 95 0xff}, 96 {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 97 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, 98 0x01,0x00,0x00,0x00}, 99 {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f, 100 0xff} 101 }, 102 /* ExtHiCTable */ 103 { 104 0x2f, 105 {0x01,0x0f,0x00,0x0e}, 106 {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, 107 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 108 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, 109 0xff}, 110 {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 111 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, 112 0x01,0x00,0x00,0x00}, 113 {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 114 0xff} 115 }, 116 /* ExtTrueCTable */ 117 { 118 0x2f, 119 {0x01,0x0f,0x00,0x0e}, 120 {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, 121 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 122 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, 123 0xff}, 124 {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 125 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, 126 0x01,0x00,0x00,0x00}, 127 {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 128 0xff} 129 }, 130}; 131 132VBIOS_ENHTABLE_STRUCT Res640x480Table[] = { 133 { 800, 640, 8, 96, 525, 480, 2, 2, VCLK25_175, /* 60Hz */ 134 (SyncNN | HBorder | VBorder | Charx8Dot), 60, 1, 0x2E }, 135 { 832, 640, 16, 40, 520, 480, 1, 3, VCLK31_5, /* 72Hz */ 136 (SyncNN | HBorder | VBorder | Charx8Dot), 72, 2, 0x2E }, 137 { 840, 640, 16, 64, 500, 480, 1, 3, VCLK31_5, /* 75Hz */ 138 (SyncNN | Charx8Dot) , 75, 3, 0x2E }, 139 { 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* 85Hz */ 140 (SyncNN | Charx8Dot) , 85, 4, 0x2E }, 141 { 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* end */ 142 (SyncNN | Charx8Dot) , 0xFF, 4, 0x2E }, 143}; 144 145 146VBIOS_ENHTABLE_STRUCT Res800x600Table[] = { 147 {1024, 800, 24, 72, 625, 600, 1, 2, VCLK36, /* 56Hz */ 148 (SyncPP | Charx8Dot), 56, 1, 0x30 }, 149 {1056, 800, 40, 128, 628, 600, 1, 4, VCLK40, /* 60Hz */ 150 (SyncPP | Charx8Dot), 60, 2, 0x30 }, 151 {1040, 800, 56, 120, 666, 600, 37, 6, VCLK50, /* 72Hz */ 152 (SyncPP | Charx8Dot), 72, 3, 0x30 }, 153 {1056, 800, 16, 80, 625, 600, 1, 3, VCLK49_5, /* 75Hz */ 154 (SyncPP | Charx8Dot), 75, 4, 0x30 }, 155 {1048, 800, 32, 64, 631, 600, 1, 3, VCLK56_25, /* 85Hz */ 156 (SyncPP | Charx8Dot), 85, 5, 0x30 }, 157 {1048, 800, 32, 64, 631, 600, 1, 3, VCLK56_25, /* end */ 158 (SyncPP | Charx8Dot), 0xFF, 5, 0x30 }, 159}; 160 161 162VBIOS_ENHTABLE_STRUCT Res1024x768Table[] = { 163 {1344, 1024, 24, 136, 806, 768, 3, 6, VCLK65, /* 60Hz */ 164 (SyncNN | Charx8Dot), 60, 1, 0x31 }, 165 {1328, 1024, 24, 136, 806, 768, 3, 6, VCLK75, /* 70Hz */ 166 (SyncNN | Charx8Dot), 70, 2, 0x31 }, 167 {1312, 1024, 16, 96, 800, 768, 1, 3, VCLK78_75, /* 75Hz */ 168 (SyncPP | Charx8Dot), 75, 3, 0x31 }, 169 {1376, 1024, 48, 96, 808, 768, 1, 3, VCLK94_5, /* 85Hz */ 170 (SyncPP | Charx8Dot), 84, 4, 0x31 }, 171 {1376, 1024, 48, 96, 808, 768, 1, 3, VCLK94_5, /* end */ 172 (SyncPP | Charx8Dot), 0xFF, 4, 0x31 }, 173}; 174 175VBIOS_ENHTABLE_STRUCT Res1280x1024Table[] = { 176 {1688, 1280, 48, 112, 1066, 1024, 1, 3, VCLK108, /* 60Hz */ 177 (SyncPP | Charx8Dot), 60, 1, 0x32 }, 178 {1688, 1280, 16, 144, 1066, 1024, 1, 3, VCLK135, /* 75Hz */ 179 (SyncPP | Charx8Dot), 75, 2, 0x32 }, 180 {1728, 1280, 64, 160, 1072, 1024, 1, 3, VCLK157_5, /* 85Hz */ 181 (SyncPP | Charx8Dot), 85, 3, 0x32 }, 182 {1728, 1280, 64, 160, 1072, 1024, 1, 3, VCLK157_5, /* end */ 183 (SyncPP | Charx8Dot), 0xFF, 3, 0x32 }, 184}; 185 186VBIOS_ENHTABLE_STRUCT Res1600x1200Table[] = { 187 {2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162, /* 60Hz */ 188 (SyncPP | Charx8Dot), 60, 1, 0x33 }, 189 {2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162, /* end */ 190 (SyncPP | Charx8Dot), 0xFF, 1, 0x33 }, 191}; 192 193VBIOS_ENHTABLE_STRUCT Res1920x1200Table[] = { 194 {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz */ 195 (SyncNP | Charx8Dot), 60, 1, 0x34 }, 196 {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz */ 197 (SyncNP | Charx8Dot), 0xFF, 1, 0x34 }, 198}; 199 200VBIOS_DCLK_INFO DCLKTable [] = { 201 {0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */ 202 {0x95, 0x62, 0x03}, /* 01: VCLK28_322 */ 203 {0x67, 0x63, 0x01}, /* 02: VCLK31_5 */ 204 {0x76, 0x63, 0x01}, /* 03: VCLK36 */ 205 {0xEE, 0x67, 0x01}, /* 04: VCLK40 */ 206 {0x82, 0x62, 0x01}, /* 05: VCLK49_5 */ 207 {0xC6, 0x64, 0x01}, /* 06: VCLK50 */ 208 {0x94, 0x62, 0x01}, /* 07: VCLK56_25 */ 209 {0x80, 0x64, 0x00}, /* 08: VCLK65 */ 210 {0x7B, 0x63, 0x00}, /* 09: VCLK75 */ 211 {0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */ 212 {0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */ 213 {0x8E, 0x62, 0x00}, /* 0C: VCLK108 */ 214 {0x85, 0x24, 0x00}, /* 0D: VCLK135 */ 215 {0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */ 216 {0x6A, 0x22, 0x00}, /* 0F: VCLK162 */ 217 {0x4d, 0x4c, 0x80}, /* 10: VCLK193_25 */ 218}; 219 220VBIOS_DAC_INFO DAC_TEXT[] = { 221 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x2a }, { 0x00, 0x2a, 0x00 }, { 0x00, 0x2a, 0x2a }, 222 { 0x2a, 0x00, 0x00 }, { 0x2a, 0x00, 0x2a }, { 0x2a, 0x2a, 0x00 }, { 0x2a, 0x2a, 0x2a }, 223 { 0x00, 0x00, 0x15 }, { 0x00, 0x00, 0x3f }, { 0x00, 0x2a, 0x15 }, { 0x00, 0x2a, 0x3f }, 224 { 0x2a, 0x00, 0x15 }, { 0x2a, 0x00, 0x3f }, { 0x2a, 0x2a, 0x15 }, { 0x2a, 0x2a, 0x3f }, 225 { 0x00, 0x15, 0x00 }, { 0x00, 0x15, 0x2a }, { 0x00, 0x3f, 0x00 }, { 0x00, 0x3f, 0x2a }, 226 { 0x2a, 0x15, 0x00 }, { 0x2a, 0x15, 0x2a }, { 0x2a, 0x3f, 0x00 }, { 0x2a, 0x3f, 0x2a }, 227 { 0x00, 0x15, 0x15 }, { 0x00, 0x15, 0x3f }, { 0x00, 0x3f, 0x15 }, { 0x00, 0x3f, 0x3f }, 228 { 0x2a, 0x15, 0x15 }, { 0x2a, 0x15, 0x3f }, { 0x2a, 0x3f, 0x15 }, { 0x2a, 0x3f, 0x3f }, 229 { 0x15, 0x00, 0x00 }, { 0x15, 0x00, 0x2a }, { 0x15, 0x2a, 0x00 }, { 0x15, 0x2a, 0x2a }, 230 { 0x3f, 0x00, 0x00 }, { 0x3f, 0x00, 0x2a }, { 0x3f, 0x2a, 0x00 }, { 0x3f, 0x2a, 0x2a }, 231 { 0x15, 0x00, 0x15 }, { 0x15, 0x00, 0x3f }, { 0x15, 0x2a, 0x15 }, { 0x15, 0x2a, 0x3f }, 232 { 0x3f, 0x00, 0x15 }, { 0x3f, 0x00, 0x3f }, { 0x3f, 0x2a, 0x15 }, { 0x3f, 0x2a, 0x3f }, 233 { 0x15, 0x15, 0x00 }, { 0x15, 0x15, 0x2a }, { 0x15, 0x3f, 0x00 }, { 0x15, 0x3f, 0x2a }, 234 { 0x3f, 0x15, 0x00 }, { 0x3f, 0x15, 0x2a }, { 0x3f, 0x3f, 0x00 }, { 0x3f, 0x3f, 0x2a }, 235 { 0x15, 0x15, 0x15 }, { 0x15, 0x15, 0x3f }, { 0x15, 0x3f, 0x15 }, { 0x15, 0x3f, 0x3f }, 236 { 0x3f, 0x15, 0x15 }, { 0x3f, 0x15, 0x3f }, { 0x3f, 0x3f, 0x15 }, { 0x3f, 0x3f, 0x3f }, 237}; 238 239VBIOS_DAC_INFO DAC_EGA[] = { 240 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x2a }, { 0x00, 0x2a, 0x00 }, { 0x00, 0x2a, 0x2a }, 241 { 0x2a, 0x00, 0x00 }, { 0x2a, 0x00, 0x2a }, { 0x2a, 0x2a, 0x00 }, { 0x2a, 0x2a, 0x2a }, 242 { 0x00, 0x00, 0x15 }, { 0x00, 0x00, 0x3f }, { 0x00, 0x2a, 0x15 }, { 0x00, 0x2a, 0x3f }, 243 { 0x2a, 0x00, 0x15 }, { 0x2a, 0x00, 0x3f }, { 0x2a, 0x2a, 0x15 }, { 0x2a, 0x2a, 0x3f }, 244 { 0x00, 0x15, 0x00 }, { 0x00, 0x15, 0x2a }, { 0x00, 0x3f, 0x00 }, { 0x00, 0x3f, 0x2a }, 245 { 0x2a, 0x15, 0x00 }, { 0x2a, 0x15, 0x2a }, { 0x2a, 0x3f, 0x00 }, { 0x2a, 0x3f, 0x2a }, 246 { 0x00, 0x15, 0x15 }, { 0x00, 0x15, 0x3f }, { 0x00, 0x3f, 0x15 }, { 0x00, 0x3f, 0x3f }, 247 { 0x2a, 0x15, 0x15 }, { 0x2a, 0x15, 0x3f }, { 0x2a, 0x3f, 0x15 }, { 0x2a, 0x3f, 0x3f }, 248 { 0x15, 0x00, 0x00 }, { 0x15, 0x00, 0x2a }, { 0x15, 0x2a, 0x00 }, { 0x15, 0x2a, 0x2a }, 249 { 0x3f, 0x00, 0x00 }, { 0x3f, 0x00, 0x2a }, { 0x3f, 0x2a, 0x00 }, { 0x3f, 0x2a, 0x2a }, 250 { 0x15, 0x00, 0x15 }, { 0x15, 0x00, 0x3f }, { 0x15, 0x2a, 0x15 }, { 0x15, 0x2a, 0x3f }, 251 { 0x3f, 0x00, 0x15 }, { 0x3f, 0x00, 0x3f }, { 0x3f, 0x2a, 0x15 }, { 0x3f, 0x2a, 0x3f }, 252 { 0x15, 0x15, 0x00 }, { 0x15, 0x15, 0x2a }, { 0x15, 0x3f, 0x00 }, { 0x15, 0x3f, 0x2a }, 253 { 0x3f, 0x15, 0x00 }, { 0x3f, 0x15, 0x2a }, { 0x3f, 0x3f, 0x00 }, { 0x3f, 0x3f, 0x2a }, 254 { 0x15, 0x15, 0x15 }, { 0x15, 0x15, 0x3f }, { 0x15, 0x3f, 0x15 }, { 0x15, 0x3f, 0x3f }, 255 { 0x3f, 0x15, 0x15 }, { 0x3f, 0x15, 0x3f }, { 0x3f, 0x3f, 0x15 }, { 0x3f, 0x3f, 0x3f }, 256}; 257 258VBIOS_DAC_INFO DAC_VGA[] = { 259 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x2a }, { 0x00, 0x2a, 0x00 }, { 0x00, 0x2a, 0x2a }, 260 { 0x2a, 0x00, 0x00 }, { 0x2a, 0x00, 0x2a }, { 0x2a, 0x15, 0x00 }, { 0x2a, 0x2a, 0x2a }, 261 { 0x15, 0x15, 0x15 }, { 0x15, 0x15, 0x3f }, { 0x15, 0x3f, 0x15 }, { 0x15, 0x3f, 0x3f }, 262 { 0x3f, 0x15, 0x15 }, { 0x3f, 0x15, 0x3f }, { 0x3f, 0x3f, 0x15 }, { 0x3f, 0x3f, 0x3f }, 263 { 0x00, 0x00, 0x00 }, { 0x05, 0x05, 0x05 }, { 0x08, 0x08, 0x08 }, { 0x0b, 0x0b, 0x0b }, 264 { 0x0e, 0x0e, 0x0e }, { 0x11, 0x11, 0x11 }, { 0x14, 0x14, 0x14 }, { 0x18, 0x18, 0x18 }, 265 { 0x1c, 0x1c, 0x1c }, { 0x20, 0x20, 0x20 }, { 0x24, 0x24, 0x24 }, { 0x28, 0x28, 0x28 }, 266 { 0x2d, 0x2d, 0x2d }, { 0x32, 0x32, 0x32 }, { 0x38, 0x38, 0x38 }, { 0x3f, 0x3f, 0x3f }, 267 { 0x00, 0x00, 0x3f }, { 0x10, 0x00, 0x3f }, { 0x1f, 0x00, 0x3f }, { 0x2f, 0x00, 0x3f }, 268 { 0x3f, 0x00, 0x3f }, { 0x3f, 0x00, 0x2f }, { 0x3f, 0x00, 0x1f }, { 0x3f, 0x00, 0x10 }, 269 { 0x3f, 0x00, 0x00 }, { 0x3f, 0x10, 0x00 }, { 0x3f, 0x1f, 0x00 }, { 0x3f, 0x2f, 0x00 }, 270 { 0x3f, 0x3f, 0x00 }, { 0x2f, 0x3f, 0x00 }, { 0x1f, 0x3f, 0x00 }, { 0x10, 0x3f, 0x00 }, 271 { 0x00, 0x3f, 0x00 }, { 0x00, 0x3f, 0x10 }, { 0x00, 0x3f, 0x1f }, { 0x00, 0x3f, 0x2f }, 272 { 0x00, 0x3f, 0x3f }, { 0x00, 0x2f, 0x3f }, { 0x00, 0x1f, 0x3f }, { 0x00, 0x10, 0x3f }, 273 { 0x1f, 0x1f, 0x3f }, { 0x27, 0x1f, 0x3f }, { 0x2f, 0x1f, 0x3f }, { 0x37, 0x1f, 0x3f }, 274 { 0x3f, 0x1f, 0x3f }, { 0x3f, 0x1f, 0x37 }, { 0x3f, 0x1f, 0x2f }, { 0x3f, 0x1f, 0x27 }, 275 { 0x3f, 0x1f, 0x1f }, { 0x3f, 0x27, 0x1f }, { 0x3f, 0x2f, 0x1f }, { 0x3f, 0x37, 0x1f }, 276 { 0x3f, 0x3f, 0x1f }, { 0x37, 0x3f, 0x1f }, { 0x2f, 0x3f, 0x1f }, { 0x27, 0x3f, 0x1f }, 277 { 0x1f, 0x3f, 0x1f }, { 0x1f, 0x3f, 0x27 }, { 0x1f, 0x3f, 0x2f }, { 0x1f, 0x3f, 0x37 }, 278 { 0x1f, 0x3f, 0x3f }, { 0x1f, 0x37, 0x3f }, { 0x1f, 0x2f, 0x3f }, { 0x1f, 0x27, 0x3f }, 279 { 0x2d, 0x2d, 0x3f }, { 0x31, 0x2d, 0x3f }, { 0x36, 0x2d, 0x3f }, { 0x3a, 0x2d, 0x3f }, 280 { 0x3f, 0x2d, 0x3f }, { 0x3f, 0x2d, 0x3a }, { 0x3f, 0x2d, 0x36 }, { 0x3f, 0x2d, 0x31 }, 281 { 0x3f, 0x2d, 0x2d }, { 0x3f, 0x31, 0x2d }, { 0x3f, 0x36, 0x2d }, { 0x3f, 0x3a, 0x2d }, 282 { 0x3f, 0x3f, 0x2d }, { 0x3a, 0x3f, 0x2d }, { 0x36, 0x3f, 0x2d }, { 0x31, 0x3f, 0x2d }, 283 { 0x2d, 0x3f, 0x2d }, { 0x2d, 0x3f, 0x31 }, { 0x2d, 0x3f, 0x36 }, { 0x2d, 0x3f, 0x3a }, 284 { 0x2d, 0x3f, 0x3f }, { 0x2d, 0x3a, 0x3f }, { 0x2d, 0x36, 0x3f }, { 0x2d, 0x31, 0x3f }, 285 { 0x00, 0x00, 0x1c }, { 0x07, 0x00, 0x1c }, { 0x0e, 0x00, 0x1c }, { 0x15, 0x00, 0x1c }, 286 { 0x1c, 0x00, 0x1c }, { 0x1c, 0x00, 0x15 }, { 0x1c, 0x00, 0x0e }, { 0x1c, 0x00, 0x07 }, 287 { 0x1c, 0x00, 0x00 }, { 0x1c, 0x07, 0x00 }, { 0x1c, 0x0e, 0x00 }, { 0x1c, 0x15, 0x00 }, 288 { 0x1c, 0x1c, 0x00 }, { 0x15, 0x1c, 0x00 }, { 0x0e, 0x1c, 0x00 }, { 0x07, 0x1c, 0x00 }, 289 { 0x00, 0x1c, 0x00 }, { 0x00, 0x1c, 0x07 }, { 0x00, 0x1c, 0x0e }, { 0x00, 0x1c, 0x15 }, 290 { 0x00, 0x1c, 0x1c }, { 0x00, 0x15, 0x1c }, { 0x00, 0x0e, 0x1c }, { 0x00, 0x07, 0x1c }, 291 { 0x0e, 0x0e, 0x1c }, { 0x11, 0x0e, 0x1c }, { 0x15, 0x0e, 0x1c }, { 0x18, 0x0e, 0x1c }, 292 { 0x1c, 0x0e, 0x1c }, { 0x1c, 0x0e, 0x18 }, { 0x1c, 0x0e, 0x15 }, { 0x1c, 0x0e, 0x11 }, 293 { 0x1c, 0x0e, 0x0e }, { 0x1c, 0x11, 0x0e }, { 0x1c, 0x15, 0x0e }, { 0x1c, 0x18, 0x0e }, 294 { 0x1c, 0x1c, 0x0e }, { 0x18, 0x1c, 0x0e }, { 0x15, 0x1c, 0x0e }, { 0x11, 0x1c, 0x0e }, 295 { 0x0e, 0x1c, 0x0e }, { 0x0e, 0x1c, 0x11 }, { 0x0e, 0x1c, 0x15 }, { 0x0e, 0x1c, 0x18 }, 296 { 0x0e, 0x1c, 0x1c }, { 0x0e, 0x18, 0x1c }, { 0x0e, 0x15, 0x1c }, { 0x0e, 0x11, 0x1c }, 297 { 0x14, 0x14, 0x1c }, { 0x16, 0x14, 0x1c }, { 0x18, 0x14, 0x1c }, { 0x1a, 0x14, 0x1c }, 298 { 0x1c, 0x14, 0x1c }, { 0x1c, 0x14, 0x1a }, { 0x1c, 0x14, 0x18 }, { 0x1c, 0x14, 0x16 }, 299 { 0x1c, 0x14, 0x14 }, { 0x1c, 0x16, 0x14 }, { 0x1c, 0x18, 0x14 }, { 0x1c, 0x1a, 0x14 }, 300 { 0x1c, 0x1c, 0x14 }, { 0x1a, 0x1c, 0x14 }, { 0x18, 0x1c, 0x14 }, { 0x16, 0x1c, 0x14 }, 301 { 0x14, 0x1c, 0x14 }, { 0x14, 0x1c, 0x16 }, { 0x14, 0x1c, 0x18 }, { 0x14, 0x1c, 0x1a }, 302 { 0x14, 0x1c, 0x1c }, { 0x14, 0x1a, 0x1c }, { 0x14, 0x18, 0x1c }, { 0x14, 0x16, 0x1c }, 303 { 0x00, 0x00, 0x10 }, { 0x04, 0x00, 0x10 }, { 0x08, 0x00, 0x10 }, { 0x0c, 0x00, 0x10 }, 304 { 0x10, 0x00, 0x10 }, { 0x10, 0x00, 0x0c }, { 0x10, 0x00, 0x08 }, { 0x10, 0x00, 0x04 }, 305 { 0x10, 0x00, 0x00 }, { 0x10, 0x04, 0x00 }, { 0x10, 0x08, 0x00 }, { 0x10, 0x0c, 0x00 }, 306 { 0x10, 0x10, 0x00 }, { 0x0c, 0x10, 0x00 }, { 0x08, 0x10, 0x00 }, { 0x04, 0x10, 0x00 }, 307 { 0x00, 0x10, 0x00 }, { 0x00, 0x10, 0x04 }, { 0x00, 0x10, 0x08 }, { 0x00, 0x10, 0x0c }, 308 { 0x00, 0x10, 0x10 }, { 0x00, 0x0c, 0x10 }, { 0x00, 0x08, 0x10 }, { 0x00, 0x04, 0x10 }, 309 { 0x08, 0x08, 0x10 }, { 0x0a, 0x08, 0x10 }, { 0x0c, 0x08, 0x10 }, { 0x0e, 0x08, 0x10 }, 310 { 0x10, 0x08, 0x10 }, { 0x10, 0x08, 0x0e }, { 0x10, 0x08, 0x0c }, { 0x10, 0x08, 0x0a }, 311 { 0x10, 0x08, 0x08 }, { 0x10, 0x0a, 0x08 }, { 0x10, 0x0c, 0x08 }, { 0x10, 0x0e, 0x08 }, 312 { 0x10, 0x10, 0x08 }, { 0x0e, 0x10, 0x08 }, { 0x0c, 0x10, 0x08 }, { 0x0a, 0x10, 0x08 }, 313 { 0x08, 0x10, 0x08 }, { 0x08, 0x10, 0x0a }, { 0x08, 0x10, 0x0c }, { 0x08, 0x10, 0x0e }, 314 { 0x08, 0x10, 0x10 }, { 0x08, 0x0e, 0x10 }, { 0x08, 0x0c, 0x10 }, { 0x08, 0x0a, 0x10 }, 315 { 0x0b, 0x0b, 0x10 }, { 0x0c, 0x0b, 0x10 }, { 0x0d, 0x0b, 0x10 }, { 0x0f, 0x0b, 0x10 }, 316 { 0x10, 0x0b, 0x10 }, { 0x10, 0x0b, 0x0f }, { 0x10, 0x0b, 0x0d }, { 0x10, 0x0b, 0x0c }, 317 { 0x10, 0x0b, 0x0b }, { 0x10, 0x0c, 0x0b }, { 0x10, 0x0d, 0x0b }, { 0x10, 0x0f, 0x0b }, 318 { 0x10, 0x10, 0x0b }, { 0x0f, 0x10, 0x0b }, { 0x0d, 0x10, 0x0b }, { 0x0c, 0x10, 0x0b }, 319 { 0x0b, 0x10, 0x0b }, { 0x0b, 0x10, 0x0c }, { 0x0b, 0x10, 0x0d }, { 0x0b, 0x10, 0x0f }, 320 { 0x0b, 0x10, 0x10 }, { 0x0b, 0x0f, 0x10 }, { 0x0b, 0x0d, 0x10 }, { 0x0b, 0x0c, 0x10 }, 321 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, 322 { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, 323}; 324 325/* extern. function */ 326extern void vASTOpenKey(ScrnInfoPtr pScrn); 327extern Bool bASTRegInit(ScrnInfoPtr pScrn); 328extern void vAST1000DisplayOn(ASTRecPtr pAST); 329extern void vAST1000DisplayOff(ASTRecPtr pAST); 330 331extern Bool bEnable2D(ScrnInfoPtr pScrn, ASTRecPtr pAST); 332extern void vDisable2D(ScrnInfoPtr pScrn, ASTRecPtr pAST); 333 334extern Bool bInitHWC(ScrnInfoPtr pScrn, ASTRecPtr pAST); 335 336/* Prototype type declaration*/ 337Bool ASTSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode); 338Bool bGetAST1000VGAModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 339void vSetStdReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 340void vSetCRTCReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 341void vSetOffsetReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 342void vSetDCLKReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 343void vSetExtReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 344void vSetSyncReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 345Bool bSetDACReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo); 346 347Bool 348ASTSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode) 349{ 350 ASTRecPtr pAST; 351 VBIOS_MODE_INFO vgamodeinfo; 352 353 pAST = ASTPTR(pScrn); 354 355 vASTOpenKey(pScrn); 356 bASTRegInit(pScrn); 357 358 /* pre set mode */ 359 bGetAST1000VGAModeInfo(pScrn, mode, &vgamodeinfo); 360 361 /* set mode */ 362 vSetStdReg(pScrn, mode, &vgamodeinfo); 363 vSetCRTCReg(pScrn, mode, &vgamodeinfo); 364 vSetOffsetReg(pScrn, mode, &vgamodeinfo); 365 vSetDCLKReg(pScrn, mode, &vgamodeinfo); 366 vSetExtReg(pScrn, mode, &vgamodeinfo); 367 vSetSyncReg(pScrn, mode, &vgamodeinfo); 368 bSetDACReg(pScrn, mode, &vgamodeinfo); 369 370 /* post set mode */ 371#ifdef Accel_2D 372 if (!pAST->noAccel) { 373 if (!bEnable2D(pScrn, pAST)) { 374 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Enable 2D failed\n"); 375 pAST->noAccel = TRUE; 376 } 377 } 378#endif 379#ifdef HWC 380 if (!pAST->noHWC) { 381 if (!bInitHWC(pScrn, pAST)) { 382 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Init HWC failed\n"); 383 pAST->noHWC = TRUE; 384 } 385 } 386#endif 387 vAST1000DisplayOn(pAST); 388 389 return (TRUE); 390} 391 392 393Bool bGetAST1000VGAModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 394{ 395 ASTRecPtr pAST; 396 ULONG ulModeID, ulColorIndex, ulRefreshRate, ulRefreshRateIndex = 0; 397 ULONG ulHBorder, ulVBorder; 398 399 pAST = ASTPTR(pScrn); 400 401 switch (pScrn->bitsPerPixel) 402 { 403 case 8: 404 pVGAModeInfo->pStdTableEntry = (PVBIOS_STDTABLE_STRUCT) &StdTable[VGAModeIndex]; 405 ulColorIndex = VGAModeIndex-1; 406 break; 407 case 16: 408 pVGAModeInfo->pStdTableEntry = (PVBIOS_STDTABLE_STRUCT) &StdTable[HiCModeIndex]; 409 ulColorIndex = HiCModeIndex-1; 410 break; 411 case 24: 412 case 32: 413 pVGAModeInfo->pStdTableEntry = (PVBIOS_STDTABLE_STRUCT) &StdTable[TrueCModeIndex]; 414 ulColorIndex = TrueCModeIndex-1; 415 break; 416 default: 417 return (FALSE); 418 } 419 420 switch (mode->CrtcHDisplay) 421 { 422 case 640: 423 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res640x480Table[ulRefreshRateIndex]; 424 break; 425 case 800: 426 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res800x600Table[ulRefreshRateIndex]; 427 break; 428 case 1024: 429 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res1024x768Table[ulRefreshRateIndex]; 430 break; 431 case 1280: 432 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res1280x1024Table[ulRefreshRateIndex]; 433 break; 434 case 1600: 435 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res1600x1200Table[ulRefreshRateIndex]; 436 break; 437 case 1920: 438 pVGAModeInfo->pEnhTableEntry = (PVBIOS_ENHTABLE_STRUCT) &Res1920x1200Table[ulRefreshRateIndex]; 439 break; default: 440 return (FALSE); 441 } 442 443 /* Get Proper Mode Index */ 444 ulRefreshRate = (mode->Clock * 1000) / (mode->HTotal * mode->VTotal); 445 446 while (pVGAModeInfo->pEnhTableEntry->ulRefreshRate < ulRefreshRate) 447 { 448 pVGAModeInfo->pEnhTableEntry++; 449 if ((pVGAModeInfo->pEnhTableEntry->ulRefreshRate > ulRefreshRate) || 450 (pVGAModeInfo->pEnhTableEntry->ulRefreshRate == 0xFF)) 451 { 452 pVGAModeInfo->pEnhTableEntry--; 453 break; 454 } 455 } 456 457 /* Update mode CRTC info */ 458 ulHBorder = (pVGAModeInfo->pEnhTableEntry->Flags & HBorder) ? 1:0; 459 ulVBorder = (pVGAModeInfo->pEnhTableEntry->Flags & VBorder) ? 1:0; 460 461 mode->CrtcHTotal = (int) pVGAModeInfo->pEnhTableEntry->HT; 462 mode->CrtcHBlankStart = (int) (pVGAModeInfo->pEnhTableEntry->HDE + ulHBorder); 463 mode->CrtcHBlankEnd = (int) (pVGAModeInfo->pEnhTableEntry->HT - ulHBorder); 464 mode->CrtcHSyncStart = (int) (pVGAModeInfo->pEnhTableEntry->HDE + ulHBorder 465 + pVGAModeInfo->pEnhTableEntry->HFP); 466 mode->CrtcHSyncEnd = (int) (pVGAModeInfo->pEnhTableEntry->HDE + ulHBorder 467 + pVGAModeInfo->pEnhTableEntry->HFP 468 + pVGAModeInfo->pEnhTableEntry->HSYNC); 469 470 mode->CrtcVTotal = (int) pVGAModeInfo->pEnhTableEntry->VT; 471 mode->CrtcVBlankStart = (int) (pVGAModeInfo->pEnhTableEntry->VDE + ulVBorder); 472 mode->CrtcVBlankEnd = (int) (pVGAModeInfo->pEnhTableEntry->VT - ulVBorder); 473 mode->CrtcVSyncStart = (int) (pVGAModeInfo->pEnhTableEntry->VDE + ulVBorder 474 + pVGAModeInfo->pEnhTableEntry->VFP); 475 mode->CrtcVSyncEnd = (int) (pVGAModeInfo->pEnhTableEntry->VDE + ulVBorder 476 + pVGAModeInfo->pEnhTableEntry->VFP 477 + pVGAModeInfo->pEnhTableEntry->VSYNC); 478 479 /* Write mode info to scratch */ 480 ulRefreshRateIndex = pVGAModeInfo->pEnhTableEntry->ulRefreshRateIndex; 481 ulModeID = pVGAModeInfo->pEnhTableEntry->ulModeID; 482 483 SetIndexReg(CRTC_PORT, 0x8C, (UCHAR) ((ulColorIndex & 0x0F) << 4)); 484 SetIndexReg(CRTC_PORT, 0x8D, (UCHAR) (ulRefreshRateIndex & 0xFF)); 485 SetIndexReg(CRTC_PORT, 0x8E, (UCHAR) (ulModeID & 0xFF)); 486 487 return (TRUE); 488} 489 490void vSetStdReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 491{ 492 493 PVBIOS_STDTABLE_STRUCT pStdModePtr; 494 ASTRecPtr pAST; 495 ULONG i; 496 UCHAR jReg; 497 498 pStdModePtr = pVGAModeInfo->pStdTableEntry; 499 pAST = ASTPTR(pScrn); 500 501 /* Set Misc */ 502 jReg = pStdModePtr->MISC; 503 SetReg(MISC_PORT_WRITE,jReg); 504 505 /* Set Seq */ 506 SetIndexReg(SEQ_PORT,0x00, 0x03); 507 for (i=0; i<4; i++) 508 { 509 jReg = pStdModePtr->SEQ[i]; 510 if (!i) (jReg |= 0x20); /* display off */ 511 SetIndexReg(SEQ_PORT,(UCHAR) (i+1), jReg); 512 } 513 514 /* Set CRTC */ 515 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00); 516 for (i=0; i<25; i++) 517 { 518 jReg = pStdModePtr->CRTC[i]; 519 SetIndexReg(CRTC_PORT,(UCHAR) i, jReg); 520 } 521 522 /* Set AR */ 523 jReg = GetReg(INPUT_STATUS1_READ); 524 for (i=0; i<20; i++) 525 { 526 jReg = pStdModePtr->AR[i]; 527 SetReg(AR_PORT_WRITE, (UCHAR) i); 528 SetReg(AR_PORT_WRITE, jReg); 529 } 530 SetReg(AR_PORT_WRITE, 0x14); 531 SetReg(AR_PORT_WRITE, 0x00); 532 533 jReg = GetReg(INPUT_STATUS1_READ); 534 SetReg (AR_PORT_WRITE, 0x20); /* set POS */ 535 536 /* Set GR */ 537 for (i=0; i<9; i++) 538 { 539 jReg = pStdModePtr->GR[i]; 540 SetIndexReg(GR_PORT,(UCHAR) i, jReg); 541 542 } 543 544 545} 546 547void 548vSetCRTCReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 549{ 550 ASTRecPtr pAST; 551 USHORT usTemp; 552 UCHAR jReg05, jReg07, jReg09, jRegAC, jRegAD, jRegAE; 553 554 pAST = ASTPTR(pScrn); 555 jReg05 = jReg07 = jReg09 = jRegAC = jRegAD = jRegAE = 0; 556 557 /* unlock CRTC */ 558 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00); 559 560 /* Horizontal Timing Programming */ 561 usTemp = (mode->CrtcHTotal >> 3) - 5; 562 if (usTemp & 0x100) jRegAC |= 0x01; /* HT D[8] */ 563 SetIndexRegMask(CRTC_PORT,0x00, 0x00, (UCHAR) usTemp); 564 usTemp = (mode->CrtcHDisplay >> 3) - 1; 565 if (usTemp & 0x100) jRegAC |= 0x04; /* HDE D[8] */ 566 SetIndexRegMask(CRTC_PORT,0x01, 0x00, (UCHAR) usTemp); 567 usTemp = (mode->CrtcHBlankStart >> 3) - 1; 568 if (usTemp & 0x100) jRegAC |= 0x10; /* HBS D[8] */ 569 SetIndexRegMask(CRTC_PORT,0x02, 0x00, (UCHAR) usTemp); 570 usTemp = ((mode->CrtcHBlankEnd >> 3) - 1) & 0x7F; 571 if (usTemp & 0x20) jReg05 |= 0x80; /* HBE D[5] */ 572 if (usTemp & 0x40) jRegAD |= 0x01; /* HBE D[6] */ 573 SetIndexRegMask(CRTC_PORT,0x03, 0xE0, (UCHAR) (usTemp & 0x1F)); 574 usTemp = (mode->CrtcHSyncStart >> 3 ) + 2; 575 if (usTemp & 0x100) jRegAC |= 0x40; /* HRS D[5] */ 576 SetIndexRegMask(CRTC_PORT,0x04, 0x00, (UCHAR) (usTemp)); 577 usTemp = ((mode->CrtcHSyncEnd >> 3 ) + 2) & 0x3F; 578 if (usTemp & 0x20) jRegAD |= 0x04; /* HRE D[5] */ 579 SetIndexRegMask(CRTC_PORT,0x05, 0x60, (UCHAR) ((usTemp & 0x1F) | jReg05)); 580 581 SetIndexRegMask(CRTC_PORT,0xAC, 0x00, (UCHAR) jRegAC); 582 SetIndexRegMask(CRTC_PORT,0xAD, 0x00, (UCHAR) jRegAD); 583 584 /* Vetical Timing Programming */ 585 usTemp = (mode->CrtcVTotal) - 2; 586 if (usTemp & 0x100) jReg07 |= 0x01; /* VT D[8] */ 587 if (usTemp & 0x200) jReg07 |= 0x20; 588 if (usTemp & 0x400) jRegAE |= 0x01; /* VT D[10] */ 589 SetIndexRegMask(CRTC_PORT,0x06, 0x00, (UCHAR) usTemp); 590 usTemp = (mode->CrtcVSyncStart) - 1; 591 if (usTemp & 0x100) jReg07 |= 0x04; /* VRS D[8] */ 592 if (usTemp & 0x200) jReg07 |= 0x80; /* VRS D[9] */ 593 if (usTemp & 0x400) jRegAE |= 0x08; /* VRS D[10] */ 594 SetIndexRegMask(CRTC_PORT,0x10, 0x00, (UCHAR) usTemp); 595 usTemp = ((mode->CrtcVSyncEnd) - 1) & 0x3F; 596 if (usTemp & 0x10) jRegAE |= 0x20; /* VRE D[4] */ 597 if (usTemp & 0x20) jRegAE |= 0x40; /* VRE D[5] */ 598 SetIndexRegMask(CRTC_PORT,0x11, 0x70, (UCHAR) (usTemp & 0x0F)); 599 usTemp = (mode->CrtcVDisplay) - 1; 600 if (usTemp & 0x100) jReg07 |= 0x02; /* VDE D[8] */ 601 if (usTemp & 0x200) jReg07 |= 0x40; /* VDE D[9] */ 602 if (usTemp & 0x400) jRegAE |= 0x02; /* VDE D[10] */ 603 SetIndexRegMask(CRTC_PORT,0x12, 0x00, (UCHAR) usTemp); 604 usTemp = (mode->CrtcVBlankStart) - 1; 605 if (usTemp & 0x100) jReg07 |= 0x08; /* VBS D[8] */ 606 if (usTemp & 0x200) jReg09 |= 0x20; /* VBS D[9] */ 607 if (usTemp & 0x400) jRegAE |= 0x04; /* VBS D[10] */ 608 SetIndexRegMask(CRTC_PORT,0x15, 0x00, (UCHAR) usTemp); 609 usTemp = (mode->CrtcVBlankEnd) - 1 ; 610 if (usTemp & 0x100) jRegAE |= 0x10; /* VBE D[8] */ 611 SetIndexRegMask(CRTC_PORT,0x16, 0x00, (UCHAR) usTemp); 612 613 SetIndexRegMask(CRTC_PORT,0x07, 0x00, (UCHAR) jReg07); 614 SetIndexRegMask(CRTC_PORT,0x09, 0xDF, (UCHAR) jReg09); 615 SetIndexRegMask(CRTC_PORT,0xAE, 0x00, (UCHAR) (jRegAE | 0x80)); /* disable line compare */ 616 617 /* lock CRTC */ 618 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x80); 619 620} 621 622void vSetOffsetReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 623{ 624 ASTRecPtr pAST; 625 USHORT usOffset; 626 627 pAST = ASTPTR(pScrn); 628 629 usOffset = pAST->VideoModeInfo.ScreenPitch >> 3; /* Unit: char */ 630 631 SetIndexReg(CRTC_PORT,0x13, (UCHAR) (usOffset & 0xFF)); 632 SetIndexReg(CRTC_PORT,0xB0, (UCHAR) ((usOffset >> 8) & 0x3F)); 633 634} 635 636void vSetDCLKReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 637{ 638 PVBIOS_ENHTABLE_STRUCT pEnhModePtr; 639 PVBIOS_DCLK_INFO pDCLKPtr; 640 ASTRecPtr pAST; 641 642 pAST = ASTPTR(pScrn); 643 644 pEnhModePtr = pVGAModeInfo->pEnhTableEntry; 645 pDCLKPtr = &DCLKTable[pEnhModePtr->DCLKIndex]; 646 647 SetIndexRegMask(CRTC_PORT,0xC0, 0x00, pDCLKPtr->Param1); 648 SetIndexRegMask(CRTC_PORT,0xC1, 0x00, pDCLKPtr->Param2); 649 SetIndexRegMask(CRTC_PORT,0xBB, 0x0F, (pDCLKPtr->Param3 & 0x80) | ((pDCLKPtr->Param3 & 0x03) << 4) ); 650 651} 652 653 654void vSetExtReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 655{ 656 657 ASTRecPtr pAST; 658 UCHAR jRegA0, jRegA3, jRegA8; 659 660 pAST = ASTPTR(pScrn); 661 662 jRegA0=jRegA3=jRegA8=0; 663 /* Mode Type Setting */ 664 switch (pScrn->bitsPerPixel) { 665 case 8: 666 jRegA0 = 0x70; 667 jRegA3 = 0x01; 668 jRegA8 = 0x00; 669 break; 670 case 15: 671 case 16: 672 jRegA0 = 0x70; 673 jRegA3 = 0x04; 674 jRegA8 = 0x02; 675 break; 676 case 32: 677 jRegA0 = 0x70; 678 jRegA3 = 0x08; 679 jRegA8 = 0x02; 680 break; 681 } 682 SetIndexRegMask(CRTC_PORT,0xA0, 0x8F, (UCHAR) jRegA0); 683 SetIndexRegMask(CRTC_PORT,0xA3, 0xF0, (UCHAR) jRegA3); 684 SetIndexRegMask(CRTC_PORT,0xA8, 0xFD, (UCHAR) jRegA8); 685 686 /* Set Threshold */ 687 if ((pAST->jChipType == AST2100) || (pAST->jChipType == AST1100) || (pAST->jChipType == AST2200) || (pAST->jChipType == AST2150) ) 688 { 689 SetIndexReg(CRTC_PORT,0xA7, 0x3F); 690 SetIndexReg(CRTC_PORT,0xA6, 0x2F); 691 } 692 else 693 { 694 SetIndexReg(CRTC_PORT,0xA7, 0x2F); 695 SetIndexReg(CRTC_PORT,0xA6, 0x1F); 696 } 697 698} 699 700void vSetSyncReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 701{ 702 PVBIOS_ENHTABLE_STRUCT pEnhModePtr; 703 ASTRecPtr pAST; 704 UCHAR jReg; 705 706 pAST = ASTPTR(pScrn); 707 pEnhModePtr = pVGAModeInfo->pEnhTableEntry; 708 709 jReg = GetReg(MISC_PORT_READ); 710 jReg |= (UCHAR) (pEnhModePtr->Flags & SyncNN); 711 SetReg(MISC_PORT_WRITE,jReg); 712 713} 714 715Bool bSetDACReg(ScrnInfoPtr pScrn, DisplayModePtr mode, PVBIOS_MODE_INFO pVGAModeInfo) 716{ 717 PVBIOS_DAC_INFO pDACPtr; 718 ASTRecPtr pAST; 719 ULONG i, ulDACNumber; 720 UCHAR DACR, DACG, DACB; 721 722 pAST = ASTPTR(pScrn); 723 724 switch (pScrn->bitsPerPixel) 725 { 726 case 8: 727 ulDACNumber = DAC_NUM_VGA; 728 pDACPtr = (PVBIOS_DAC_INFO) &DAC_VGA[0]; 729 break; 730 default: 731 return (FALSE); 732 } 733 734 for (i=0; i<ulDACNumber; i++) 735 { 736 DACR = pDACPtr->DACR; 737 DACG = pDACPtr->DACG; 738 DACB = pDACPtr->DACB; 739 740 VGA_LOAD_PALETTE_INDEX (i, DACR, DACG, DACB); 741 742 pDACPtr++; 743 } 744 745 return (TRUE); 746 747} 748 749 750