1de78e416Smrg/* 2de78e416Smrg * Copyright 2007 George Sapountzis 3de78e416Smrg * 4de78e416Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5de78e416Smrg * copy of this software and associated documentation files (the "Software"), 6de78e416Smrg * to deal in the Software without restriction, including without limitation 7de78e416Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8de78e416Smrg * and/or sell copies of the Software, and to permit persons to whom the 9de78e416Smrg * Software is furnished to do so, subject to the following conditions: 10de78e416Smrg * 11de78e416Smrg * The above copyright notice and this permission notice (including the next 12de78e416Smrg * paragraph) shall be included in all copies or substantial portions of the 13de78e416Smrg * Software. 14de78e416Smrg * 15de78e416Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16de78e416Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17de78e416Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18de78e416Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19de78e416Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20de78e416Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21de78e416Smrg * SOFTWARE. 22de78e416Smrg */ 23de78e416Smrg 24de78e416Smrg/** 25de78e416Smrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess 26de78e416Smrg * library. The main purpose being to facilitate source code compatibility. 27de78e416Smrg */ 28de78e416Smrg 29de78e416Smrg#ifndef ASTPCIRENAME_H 30de78e416Smrg#define ASTPCIRENAME_H 31de78e416Smrg 32de78e416Smrgenum region_type { 33de78e416Smrg REGION_MEM, 347fe5393cSmrg REGION_IO 35de78e416Smrg}; 36de78e416Smrg 37de78e416Smrg#ifndef XSERVER_LIBPCIACCESS 38de78e416Smrg 39de78e416Smrg/* pciVideoPtr */ 40de78e416Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor) 41de78e416Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType) 42de78e416Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->chipRev) 43de78e416Smrg 44de78e416Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor) 45de78e416Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard) 46de78e416Smrg 47de78e416Smrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus, \ 48de78e416Smrg (_pcidev)->device, \ 49de78e416Smrg (_pcidev)->func) 50de78e416Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 51de78e416Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->device) 52de78e416Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 53de78e416Smrg 54de78e416Smrg/* pciConfigPtr */ 55de78e416Smrg#define PCI_CFG_TAG(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->tag) 56de78e416Smrg#define PCI_CFG_BUS(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->busnum) 57de78e416Smrg#define PCI_CFG_DEV(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->devnum) 58de78e416Smrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum) 59de78e416Smrg 60de78e416Smrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */ 61de78e416Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) \ 62de78e416Smrg (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \ 63de78e416Smrg : (_pcidev)->ioBase[(_b)]) 64de78e416Smrg 65de78e416Smrg/* region size: xfree86 uses the log2 of the region size, 66de78e416Smrg * but with zero meaning no region, not size of one XXX */ 67de78e416Smrg#define PCI_REGION_SIZE(_pcidev, _b) \ 68de78e416Smrg (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0) 69de78e416Smrg 70de78e416Smrg/* read/write PCI configuration space */ 71de78e416Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 72de78e416Smrg *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset)) 73de78e416Smrg 74de78e416Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 75de78e416Smrg *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset)) 76de78e416Smrg 77de78e416Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 78de78e416Smrg pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value)) 79de78e416Smrg 80de78e416Smrg#else /* XSERVER_LIBPCIACCESS */ 81de78e416Smrg 82de78e416Smrgtypedef struct pci_device *pciVideoPtr; 83de78e416Smrg 84de78e416Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id) 85de78e416Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id) 86de78e416Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->revision) 87de78e416Smrg 88de78e416Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id) 89de78e416Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id) 90de78e416Smrg 91de78e416Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 92de78e416Smrg#define PCI_DEV_TAG(_pcidev) (_pcidev) 93de78e416Smrg 94de78e416Smrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */ 95de78e416Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 96de78e416Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->dev) 97de78e416Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 98de78e416Smrg 99de78e416Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 100de78e416Smrg#define PCI_CFG_TAG(_pcidev) (_pcidev) 101de78e416Smrg 102de78e416Smrg/* PCI_CFG macros, typically used in DRI init, contain the domain */ 103de78e416Smrg#define PCI_CFG_BUS(_pcidev) (((_pcidev)->domain << 8) | \ 104de78e416Smrg (_pcidev)->bus) 105de78e416Smrg#define PCI_CFG_DEV(_pcidev) ((_pcidev)->dev) 106de78e416Smrg#define PCI_CFG_FUNC(_pcidev) ((_pcidev)->func) 107de78e416Smrg 108de78e416Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr) 109de78e416Smrg#define PCI_REGION_SIZE(_pcidev, _b) ((_pcidev)->regions[(_b)].size) 110de78e416Smrg 111de78e416Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 112de78e416Smrg pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset)) 113de78e416Smrg 114de78e416Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 115de78e416Smrg pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset)) 116de78e416Smrg 117de78e416Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 118de78e416Smrg pci_device_cfg_write_u32((_pcidev), (_value), (_offset)) 119de78e416Smrg 120de78e416Smrg#endif /* XSERVER_LIBPCIACCESS */ 121de78e416Smrg 122de78e416Smrg#endif /* ASTPCIRENAME_H */ 123