radeon_glamor.h revision de2362d3
1de2362d3Smrg/*
2de2362d3Smrg * Copyright © 2011 Intel Corporation.
3de2362d3Smrg *             2012 Advanced Micro Devices, Inc.
4de2362d3Smrg *
5de2362d3Smrg * Permission is hereby granted, free of charge, to any person
6de2362d3Smrg * obtaining a copy of this software and associated documentation
7de2362d3Smrg * files (the "Software"), to deal in the Software without
8de2362d3Smrg * restriction, including without limitation the rights to use, copy,
9de2362d3Smrg * modify, merge, publish, distribute, sublicense, and/or sell copies
10de2362d3Smrg * of the Software, and to permit persons to whom the Software is
11de2362d3Smrg * furnished to do so, subject to the following conditions:
12de2362d3Smrg *
13de2362d3Smrg * The above copyright notice and this permission notice (including
14de2362d3Smrg * the next paragraph) shall be included in all copies or substantial
15de2362d3Smrg * portions of the Software.
16de2362d3Smrg *
17de2362d3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18de2362d3Smrg * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19de2362d3Smrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20de2362d3Smrg * NONINFRINGEMENT.  IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
21de2362d3Smrg * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
22de2362d3Smrg * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23de2362d3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24de2362d3Smrg * DEALINGS IN THE SOFTWARE.
25de2362d3Smrg */
26de2362d3Smrg
27de2362d3Smrg#ifndef RADEON_GLAMOR_H
28de2362d3Smrg#define RADEON_GLAMOR_H
29de2362d3Smrg
30de2362d3Smrg#include "xf86xv.h"
31de2362d3Smrg#ifdef USE_GLAMOR
32de2362d3Smrg
33de2362d3Smrg#include "radeon_surface.h"
34de2362d3Smrg
35de2362d3SmrgBool radeon_glamor_pre_init(ScrnInfoPtr scrn);
36de2362d3SmrgBool radeon_glamor_init(ScreenPtr screen);
37de2362d3SmrgBool radeon_glamor_create_screen_resources(ScreenPtr screen);
38de2362d3Smrgvoid radeon_glamor_free_screen(int scrnIndex, int flags);
39de2362d3Smrg
40de2362d3Smrgvoid radeon_glamor_flush(ScrnInfoPtr pScrn);
41de2362d3Smrg
42de2362d3SmrgBool radeon_glamor_create_textured_pixmap(PixmapPtr pixmap);
43de2362d3Smrgvoid radeon_glamor_exchange_buffers(PixmapPtr src, PixmapPtr dst);
44de2362d3Smrg
45de2362d3SmrgBool radeon_glamor_pixmap_is_offscreen(PixmapPtr pixmap);
46de2362d3Smrg
47de2362d3SmrgXF86VideoAdaptorPtr radeon_glamor_xv_init(ScreenPtr pScreen, int num_adapt);
48de2362d3Smrg
49de2362d3Smrgstruct radeon_pixmap {
50de2362d3Smrg	struct radeon_surface surface;
51de2362d3Smrg	struct radeon_bo *bo;
52de2362d3Smrg
53de2362d3Smrg	uint32_t tiling_flags;
54de2362d3Smrg	int stride;
55de2362d3Smrg};
56de2362d3Smrg
57de2362d3Smrg#if HAS_DEVPRIVATEKEYREC
58de2362d3Smrgextern DevPrivateKeyRec glamor_pixmap_index;
59de2362d3Smrg#else
60de2362d3Smrgextern int glamor_pixmap_index;
61de2362d3Smrg#endif
62de2362d3Smrg
63de2362d3Smrgstatic inline struct radeon_pixmap *radeon_get_pixmap_private(PixmapPtr pixmap)
64de2362d3Smrg{
65de2362d3Smrg#if HAS_DEVPRIVATEKEYREC
66de2362d3Smrg	return dixGetPrivate(&pixmap->devPrivates, &glamor_pixmap_index);
67de2362d3Smrg#else
68de2362d3Smrg	return dixLookupPrivate(&pixmap->devPrivates, &glamor_pixmap_index);
69de2362d3Smrg#endif
70de2362d3Smrg}
71de2362d3Smrg
72de2362d3Smrgstatic inline void radeon_set_pixmap_private(PixmapPtr pixmap, struct radeon_pixmap *priv)
73de2362d3Smrg{
74de2362d3Smrg	dixSetPrivate(&pixmap->devPrivates, &glamor_pixmap_index, priv);
75de2362d3Smrg}
76de2362d3Smrg
77de2362d3Smrg#else
78de2362d3Smrg
79de2362d3Smrgstatic inline Bool radeon_glamor_pre_init(ScrnInfoPtr scrn) { return FALSE; }
80de2362d3Smrgstatic inline Bool radeon_glamor_init(ScreenPtr screen) { return FALSE; }
81de2362d3Smrgstatic inline Bool radeon_glamor_create_screen_resources(ScreenPtr screen) { return FALSE; }
82de2362d3Smrgstatic inline void radeon_glamor_free_screen(int scrnIndex, int flags) { }
83de2362d3Smrg
84de2362d3Smrgstatic inline void radeon_glamor_flush(ScrnInfoPtr pScrn) { }
85de2362d3Smrg
86de2362d3Smrgstatic inline Bool radeon_glamor_create_textured_pixmap(PixmapPtr pixmap) { return TRUE; }
87de2362d3Smrg
88de2362d3Smrgstatic inline void radeon_glamor_exchange_buffers(PixmapPtr src, PixmapPtr dst) {}
89de2362d3Smrg
90de2362d3Smrgstatic inline Bool radeon_glamor_pixmap_is_offscreen(PixmapPtr pixmap) { return FALSE; }
91de2362d3Smrg
92de2362d3Smrgstatic inline struct radeon_pixmap *radeon_get_pixmap_private(PixmapPtr pixmap) { return NULL; }
93de2362d3Smrg
94de2362d3Smrgstatic inline XF86VideoAdaptorPtr radeon_glamor_xv_init(ScreenPtr pScreen, int num_adapt) { return NULL; }
95de2362d3Smrg#endif
96de2362d3Smrg
97de2362d3Smrg#endif /* RADEON_GLAMOR_H */
98