1209ff23fSmrg/*
2209ff23fSmrg * Copyright 2007 George Sapountzis
3209ff23fSmrg *
4209ff23fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
5209ff23fSmrg * copy of this software and associated documentation files (the "Software"),
6209ff23fSmrg * to deal in the Software without restriction, including without limitation
7209ff23fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8209ff23fSmrg * and/or sell copies of the Software, and to permit persons to whom the
9209ff23fSmrg * Software is furnished to do so, subject to the following conditions:
10209ff23fSmrg *
11209ff23fSmrg * The above copyright notice and this permission notice (including the next
12209ff23fSmrg * paragraph) shall be included in all copies or substantial portions of the
13209ff23fSmrg * Software.
14209ff23fSmrg *
15209ff23fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16209ff23fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17209ff23fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18209ff23fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19209ff23fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20209ff23fSmrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21209ff23fSmrg * SOFTWARE.
22209ff23fSmrg */
23209ff23fSmrg
24209ff23fSmrg/**
25209ff23fSmrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess
26209ff23fSmrg * library. The main purpose being to facilitate source code compatibility.
27209ff23fSmrg */
28209ff23fSmrg
29209ff23fSmrg#ifndef ATIPCIRENAME_H
30209ff23fSmrg#define ATIPCIRENAME_H
31209ff23fSmrg
32209ff23fSmrgenum region_type {
33209ff23fSmrg    REGION_MEM,
34209ff23fSmrg    REGION_IO
35209ff23fSmrg};
36209ff23fSmrg
3743df4709Smrg#ifndef XSERVER_LIBPCIACCESS
3843df4709Smrg
3943df4709Smrg/* pciVideoPtr */
4043df4709Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor)
4143df4709Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType)
4243df4709Smrg#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->chipRev)
4343df4709Smrg
4443df4709Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor)
4543df4709Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard)
4643df4709Smrg
4743df4709Smrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus,    \
4843df4709Smrg                                    (_pcidev)->device, \
4943df4709Smrg                                    (_pcidev)->func)
5043df4709Smrg#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
5143df4709Smrg#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->device)
5243df4709Smrg#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
5343df4709Smrg
5443df4709Smrg/* pciConfigPtr */
5543df4709Smrg#define PCI_CFG_TAG(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->tag)
5643df4709Smrg#define PCI_CFG_BUS(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->busnum)
5743df4709Smrg#define PCI_CFG_DEV(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->devnum)
5843df4709Smrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum)
5943df4709Smrg
6043df4709Smrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */
6143df4709Smrg#define PCI_REGION_BASE(_pcidev, _b, _type)             \
6243df4709Smrg    (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \
6343df4709Smrg                             : (_pcidev)->ioBase[(_b)])
6443df4709Smrg
6543df4709Smrg/* region size: xfree86 uses the log2 of the region size,
6643df4709Smrg * but with zero meaning no region, not size of one XXX */
6743df4709Smrg#define PCI_REGION_SIZE(_pcidev, _b) \
6843df4709Smrg    (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0)
6943df4709Smrg
7043df4709Smrg/* read/write PCI configuration space */
7143df4709Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
7243df4709Smrg    *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset))
7343df4709Smrg
7443df4709Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
7543df4709Smrg    *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset))
7643df4709Smrg
7743df4709Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
7843df4709Smrg    pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value))
7943df4709Smrg
8043df4709Smrg#else /* XSERVER_LIBPCIACCESS */
8143df4709Smrg
82209ff23fSmrgtypedef struct pci_device *pciVideoPtr;
83209ff23fSmrg
84209ff23fSmrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id)
85209ff23fSmrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
86209ff23fSmrg#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->revision)
87209ff23fSmrg
88209ff23fSmrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id)
89209ff23fSmrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id)
90209ff23fSmrg
91209ff23fSmrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */
92209ff23fSmrg#define PCI_DEV_TAG(_pcidev)        (_pcidev)
93209ff23fSmrg
94209ff23fSmrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */
95209ff23fSmrg#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
96209ff23fSmrg#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->dev)
97209ff23fSmrg#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
98209ff23fSmrg
99209ff23fSmrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */
100209ff23fSmrg#define PCI_CFG_TAG(_pcidev)        (_pcidev)
101209ff23fSmrg
102209ff23fSmrg/* PCI_CFG macros, typically used in DRI init, contain the domain */
103209ff23fSmrg#define PCI_CFG_BUS(_pcidev)      (((_pcidev)->domain << 8) | \
104209ff23fSmrg                                    (_pcidev)->bus)
105209ff23fSmrg#define PCI_CFG_DEV(_pcidev)       ((_pcidev)->dev)
106209ff23fSmrg#define PCI_CFG_FUNC(_pcidev)      ((_pcidev)->func)
107209ff23fSmrg
108209ff23fSmrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr)
109209ff23fSmrg#define PCI_REGION_SIZE(_pcidev, _b)        ((_pcidev)->regions[(_b)].size)
110209ff23fSmrg
111209ff23fSmrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
112209ff23fSmrg    pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset))
113209ff23fSmrg
114209ff23fSmrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
115209ff23fSmrg    pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset))
116209ff23fSmrg
117209ff23fSmrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
118209ff23fSmrg    pci_device_cfg_write_u32((_pcidev), (_value), (_offset))
119209ff23fSmrg
120209ff23fSmrg#define ATI_DEVICE_MATCH(d, i) \
121209ff23fSmrg    { PCI_VENDOR_ATI, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
122209ff23fSmrg
12343df4709Smrg#endif /* XSERVER_LIBPCIACCESS */
12443df4709Smrg
125209ff23fSmrg#endif /* ATIPCIRENAME_H */
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