1b7e1c893Smrg/* 2b7e1c893Smrg * RadeonHD R6xx, R7xx Register documentation 3b7e1c893Smrg * 4b7e1c893Smrg * Copyright (C) 2008-2009 Advanced Micro Devices, Inc. 5b7e1c893Smrg * Copyright (C) 2008-2009 Matthias Hopf 6b7e1c893Smrg * 7b7e1c893Smrg * Permission is hereby granted, free of charge, to any person obtaining a 8b7e1c893Smrg * copy of this software and associated documentation files (the "Software"), 9b7e1c893Smrg * to deal in the Software without restriction, including without limitation 10b7e1c893Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11b7e1c893Smrg * and/or sell copies of the Software, and to permit persons to whom the 12b7e1c893Smrg * Software is furnished to do so, subject to the following conditions: 13b7e1c893Smrg * 14b7e1c893Smrg * The above copyright notice and this permission notice shall be included 15b7e1c893Smrg * in all copies or substantial portions of the Software. 16b7e1c893Smrg * 17b7e1c893Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18b7e1c893Smrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19b7e1c893Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20b7e1c893Smrg * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 21b7e1c893Smrg * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22b7e1c893Smrg * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23b7e1c893Smrg */ 24b7e1c893Smrg 25b7e1c893Smrg#ifndef _R600_REG_R7xx_H_ 26b7e1c893Smrg#define _R600_REG_R7xx_H_ 27b7e1c893Smrg 28b7e1c893Smrg/* 29b7e1c893Smrg * Register update for R7xx chips 30b7e1c893Smrg */ 31b7e1c893Smrg 32b7e1c893Smrgenum { 33b7e1c893Smrg 34b7e1c893Smrg R7XX_MC_VM_FB_LOCATION = 0x00002024, 35b7e1c893Smrg 36b7e1c893Smrg// GRBM_STATUS = 0x00008010, 37b7e1c893Smrg R7XX_TA_BUSY_bit = 1 << 14, 38b7e1c893Smrg 39b7e1c893Smrg R7xx_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ = 0x00008d8c, 40b7e1c893Smrg RING0_OFFSET_mask = 0xff << 0, 41b7e1c893Smrg RING0_OFFSET_shift = 0, 42b7e1c893Smrg ISOLATE_ES_ENABLE_bit = 1 << 12, 43b7e1c893Smrg ISOLATE_GS_ENABLE_bit = 1 << 13, 44b7e1c893Smrg VS_PC_LIMIT_ENABLE_bit = 1 << 14, 45b7e1c893Smrg 46b7e1c893Smrg// SQ_ALU_WORD0 = 0x00008dfc, 47b7e1c893Smrg// SRC0_SEL_mask = 0x1ff << 0, 48b7e1c893Smrg// SRC1_SEL_mask = 0x1ff << 13, 49b7e1c893Smrg R7xx_SQ_ALU_SRC_1_DBL_L = 0xf4, 50b7e1c893Smrg R7xx_SQ_ALU_SRC_1_DBL_M = 0xf5, 51b7e1c893Smrg R7xx_SQ_ALU_SRC_0_5_DBL_L = 0xf6, 52b7e1c893Smrg R7xx_SQ_ALU_SRC_0_5_DBL_M = 0xf7, 53b7e1c893Smrg// INDEX_MODE_mask = 0x07 << 26, 54b7e1c893Smrg R7xx_SQ_INDEX_GLOBAL = 0x05, 55b7e1c893Smrg R7xx_SQ_INDEX_GLOBAL_AR_X = 0x06, 56b7e1c893Smrg R6xx_SQ_ALU_WORD1_OP2 = 0x00008dfc, 57b7e1c893Smrg R7xx_SQ_ALU_WORD1_OP2_V2 = 0x00008dfc, 58b7e1c893Smrg R6xx_FOG_MERGE_bit = 1 << 5, 59b7e1c893Smrg R6xx_OMOD_mask = 0x03 << 6, 60b7e1c893Smrg R7xx_OMOD_mask = 0x03 << 5, 61b7e1c893Smrg R6xx_OMOD_shift = 6, 62b7e1c893Smrg R7xx_OMOD_shift = 5, 63b7e1c893Smrg R6xx_SQ_ALU_WORD1_OP2__ALU_INST_mask = 0x3ff << 8, 64b7e1c893Smrg R7xx_SQ_ALU_WORD1_OP2_V2__ALU_INST_mask = 0x7ff << 7, 65b7e1c893Smrg R6xx_SQ_ALU_WORD1_OP2__ALU_INST_shift = 8, 66b7e1c893Smrg R7xx_SQ_ALU_WORD1_OP2_V2__ALU_INST_shift = 7, 67b7e1c893Smrg R7xx_SQ_OP2_INST_FREXP_64 = 0x07, 68b7e1c893Smrg R7xx_SQ_OP2_INST_ADD_64 = 0x17, 69b7e1c893Smrg R7xx_SQ_OP2_INST_MUL_64 = 0x1b, 70b7e1c893Smrg R7xx_SQ_OP2_INST_FLT64_TO_FLT32 = 0x1c, 71b7e1c893Smrg R7xx_SQ_OP2_INST_FLT32_TO_FLT64 = 0x1d, 72b7e1c893Smrg R7xx_SQ_OP2_INST_LDEXP_64 = 0x7a, 73b7e1c893Smrg R7xx_SQ_OP2_INST_FRACT_64 = 0x7b, 74b7e1c893Smrg R7xx_SQ_OP2_INST_PRED_SETGT_64 = 0x7c, 75b7e1c893Smrg R7xx_SQ_OP2_INST_PRED_SETE_64 = 0x7d, 76b7e1c893Smrg R7xx_SQ_OP2_INST_PRED_SETGE_64 = 0x7e, 77b7e1c893Smrg// SQ_ALU_WORD1_OP3 = 0x00008dfc, 78b7e1c893Smrg// SRC2_SEL_mask = 0x1ff << 0, 79b7e1c893Smrg// R7xx_SQ_ALU_SRC_1_DBL_L = 0xf4, 80b7e1c893Smrg// R7xx_SQ_ALU_SRC_1_DBL_M = 0xf5, 81b7e1c893Smrg// R7xx_SQ_ALU_SRC_0_5_DBL_L = 0xf6, 82b7e1c893Smrg// R7xx_SQ_ALU_SRC_0_5_DBL_M = 0xf7, 83b7e1c893Smrg// SQ_ALU_WORD1_OP3__ALU_INST_mask = 0x1f << 13, 84b7e1c893Smrg R7xx_SQ_OP3_INST_MULADD_64 = 0x08, 85b7e1c893Smrg R7xx_SQ_OP3_INST_MULADD_64_M2 = 0x09, 86b7e1c893Smrg R7xx_SQ_OP3_INST_MULADD_64_M4 = 0x0a, 87b7e1c893Smrg R7xx_SQ_OP3_INST_MULADD_64_D2 = 0x0b, 88b7e1c893Smrg// SQ_CF_ALU_WORD1 = 0x00008dfc, 89b7e1c893Smrg R6xx_USES_WATERFALL_bit = 1 << 25, 90b7e1c893Smrg R7xx_SQ_CF_ALU_WORD1__ALT_CONST_bit = 1 << 25, 91b7e1c893Smrg// SQ_CF_ALLOC_EXPORT_WORD0 = 0x00008dfc, 92b7e1c893Smrg// ARRAY_BASE_mask = 0x1fff << 0, 93b7e1c893Smrg// TYPE_mask = 0x03 << 13, 94b7e1c893Smrg// SQ_EXPORT_PARAM = 0x02, 95b7e1c893Smrg// X_UNUSED_FOR_SX_EXPORTS = 0x03, 96b7e1c893Smrg// ELEM_SIZE_mask = 0x03 << 30, 97b7e1c893Smrg// SQ_CF_ALLOC_EXPORT_WORD1 = 0x00008dfc, 98b7e1c893Smrg// SQ_CF_ALLOC_EXPORT_WORD1__CF_INST_mask = 0x7f << 23, 99b7e1c893Smrg R7xx_SQ_CF_INST_MEM_EXPORT = 0x3a, 100b7e1c893Smrg// SQ_CF_WORD1 = 0x00008dfc, 101b7e1c893Smrg// SQ_CF_WORD1__COUNT_mask = 0x07 << 10, 102b7e1c893Smrg R7xx_COUNT_3_bit = 1 << 19, 103b7e1c893Smrg// SQ_CF_WORD1__CF_INST_mask = 0x7f << 23, 104b7e1c893Smrg R7xx_SQ_CF_INST_END_PROGRAM = 0x19, 105b7e1c893Smrg R7xx_SQ_CF_INST_WAIT_ACK = 0x1a, 106b7e1c893Smrg R7xx_SQ_CF_INST_TEX_ACK = 0x1b, 107b7e1c893Smrg R7xx_SQ_CF_INST_VTX_ACK = 0x1c, 108b7e1c893Smrg R7xx_SQ_CF_INST_VTX_TC_ACK = 0x1d, 109b7e1c893Smrg// SQ_VTX_WORD0 = 0x00008dfc, 110b7e1c893Smrg// VTX_INST_mask = 0x1f << 0, 111b7e1c893Smrg R7xx_SQ_VTX_INST_MEM = 0x02, 112b7e1c893Smrg// SQ_VTX_WORD2 = 0x00008dfc, 113b7e1c893Smrg R7xx_SQ_VTX_WORD2__ALT_CONST_bit = 1 << 20, 114b7e1c893Smrg 115b7e1c893Smrg// SQ_TEX_WORD0 = 0x00008dfc, 116b7e1c893Smrg// TEX_INST_mask = 0x1f << 0, 117b7e1c893Smrg R7xx_X_MEMORY_READ = 0x02, 118b7e1c893Smrg R7xx_SQ_TEX_INST_KEEP_GRADIENTS = 0x0a, 119b7e1c893Smrg R7xx_X_FETCH4_LOAD4_INSTRUCTION_FOR_DX10_1 = 0x0f, 120b7e1c893Smrg R7xx_SQ_TEX_WORD0__ALT_CONST_bit = 1 << 24, 121b7e1c893Smrg 122b7e1c893Smrg R7xx_PA_SC_EDGERULE = 0x00028230, 123b7e1c893Smrg R7xx_SPI_THREAD_GROUPING = 0x000286c8, 124b7e1c893Smrg PS_GROUPING_mask = 0x1f << 0, 125b7e1c893Smrg PS_GROUPING_shift = 0, 126b7e1c893Smrg VS_GROUPING_mask = 0x1f << 8, 127b7e1c893Smrg VS_GROUPING_shift = 8, 128b7e1c893Smrg GS_GROUPING_mask = 0x1f << 16, 129b7e1c893Smrg GS_GROUPING_shift = 16, 130b7e1c893Smrg ES_GROUPING_mask = 0x1f << 24, 131b7e1c893Smrg ES_GROUPING_shift = 24, 132b7e1c893Smrg R7xx_CB_SHADER_CONTROL = 0x000287a0, 133b7e1c893Smrg RT0_ENABLE_bit = 1 << 0, 134b7e1c893Smrg RT1_ENABLE_bit = 1 << 1, 135b7e1c893Smrg RT2_ENABLE_bit = 1 << 2, 136b7e1c893Smrg RT3_ENABLE_bit = 1 << 3, 137b7e1c893Smrg RT4_ENABLE_bit = 1 << 4, 138b7e1c893Smrg RT5_ENABLE_bit = 1 << 5, 139b7e1c893Smrg RT6_ENABLE_bit = 1 << 6, 140b7e1c893Smrg RT7_ENABLE_bit = 1 << 7, 141b7e1c893Smrg// DB_ALPHA_TO_MASK = 0x00028d44, 142b7e1c893Smrg R7xx_OFFSET_ROUND_bit = 1 << 16, 143b7e1c893Smrg// SQ_TEX_SAMPLER_MISC_0 = 0x0003d03c, 144b7e1c893Smrg R7xx_TRUNCATE_COORD_bit = 1 << 9, 145b7e1c893Smrg R7xx_DISABLE_CUBE_WRAP_bit = 1 << 10, 146b7e1c893Smrg 147b7e1c893Smrg} ; 148b7e1c893Smrg 149b7e1c893Smrg#endif /* _R600_REG_R7xx_H_ */ 150